2 * LIRC SIR driver, (C) 2000 Milan Pikula <www@fornax.sk>
4 * lirc_sir - Device driver for use with SIR (serial infra red)
5 * mode of IrDA on many notebooks.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * 2000/09/16 Frank Przybylski <mail@frankprzybylski.de> :
23 * added timeout and relaxed pulse detection, removed gap bug
25 * 2000/12/15 Christoph Bartelmus <lirc@bartelmus.de> :
26 * added support for Tekram Irmate 210 (sending does not work yet,
27 * kind of disappointing that nobody was able to implement that
31 * 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
32 * added support for StrongARM SA1100 embedded microprocessor
33 * parts cut'n'pasted from sa1100_ir.c (C) 2000 Russell King
36 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
38 #include <linux/module.h>
39 #include <linux/sched.h>
40 #include <linux/errno.h>
41 #include <linux/signal.h>
43 #include <linux/interrupt.h>
44 #include <linux/ioport.h>
45 #include <linux/kernel.h>
46 #include <linux/serial_reg.h>
47 #include <linux/ktime.h>
48 #include <linux/string.h>
49 #include <linux/types.h>
50 #include <linux/wait.h>
52 #include <linux/delay.h>
53 #include <linux/poll.h>
56 #include <linux/fcntl.h>
57 #include <linux/platform_device.h>
59 #include <linux/timer.h>
61 #include <media/lirc.h>
62 #include <media/lirc_dev.h>
64 /* SECTION: Definitions */
66 /*** Tekram dongle ***/
67 #ifdef LIRC_SIR_TEKRAM
68 /* stolen from kernel source */
69 /* definitions for Tekram dongle */
70 #define TEKRAM_115200 0x00
71 #define TEKRAM_57600 0x01
72 #define TEKRAM_38400 0x02
73 #define TEKRAM_19200 0x03
74 #define TEKRAM_9600 0x04
75 #define TEKRAM_2400 0x08
77 #define TEKRAM_PW 0x10 /* Pulse select bit */
79 /* 10bit * 1s/115200bit in milliseconds = 87ms*/
80 #define TIME_CONST (10000000ul/115200ul)
84 #ifdef LIRC_SIR_ACTISYS_ACT200L
85 static void init_act200(void);
86 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
87 static void init_act220(void);
93 #define LIRC_DRIVER_NAME "lirc_sir"
97 #ifndef LIRC_SIR_TEKRAM
98 /* 9bit * 1s/115200bit in milli seconds = 78.125ms*/
99 #define TIME_CONST (9000000ul/115200ul)
103 /* timeout for sequences in jiffies (=5/100s), must be longer than TIME_CONST */
104 #define SIR_TIMEOUT (HZ*5/100)
106 #ifndef LIRC_ON_SA1100
111 /* for external dongles, default to com1 */
112 #if defined(LIRC_SIR_ACTISYS_ACT200L) || \
113 defined(LIRC_SIR_ACTISYS_ACT220L) || \
114 defined(LIRC_SIR_TEKRAM)
115 #define LIRC_PORT 0x3f8
117 /* onboard sir ports are typically com3 */
118 #define LIRC_PORT 0x3e8
122 static int io = LIRC_PORT;
123 static int irq = LIRC_IRQ;
124 static int threshold = 3;
127 static DEFINE_SPINLOCK(timer_lock);
128 static struct timer_list timerlist;
129 /* time of last signal change detected */
131 /* time of last UART data ready interrupt */
132 static ktime_t last_intr_time;
133 static int last_value;
135 static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue);
137 static DEFINE_SPINLOCK(hardware_lock);
139 static int rx_buf[RBUF_LEN];
140 static unsigned int rx_tail, rx_head;
144 /* SECTION: Prototypes */
146 /* Communication with user-space */
147 static unsigned int lirc_poll(struct file *file, poll_table *wait);
148 static ssize_t lirc_read(struct file *file, char __user *buf, size_t count,
150 static ssize_t lirc_write(struct file *file, const char __user *buf, size_t n,
152 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg);
153 static void add_read_queue(int flag, unsigned long val);
154 static int init_chrdev(void);
155 static void drop_chrdev(void);
157 static irqreturn_t sir_interrupt(int irq, void *dev_id);
158 static void send_space(unsigned long len);
159 static void send_pulse(unsigned long len);
160 static int init_hardware(void);
161 static void drop_hardware(void);
163 static int init_port(void);
164 static void drop_port(void);
166 static inline unsigned int sinp(int offset)
168 return inb(io + offset);
171 static inline void soutp(int offset, int value)
173 outb(value, io + offset);
176 #ifndef MAX_UDELAY_MS
177 #define MAX_UDELAY_US 5000
179 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
182 static void safe_udelay(unsigned long usecs)
184 while (usecs > MAX_UDELAY_US) {
185 udelay(MAX_UDELAY_US);
186 usecs -= MAX_UDELAY_US;
191 /* SECTION: Communication with user-space */
193 static unsigned int lirc_poll(struct file *file, poll_table *wait)
195 poll_wait(file, &lirc_read_queue, wait);
196 if (rx_head != rx_tail)
197 return POLLIN | POLLRDNORM;
201 static ssize_t lirc_read(struct file *file, char __user *buf, size_t count,
206 DECLARE_WAITQUEUE(wait, current);
208 if (count % sizeof(int))
211 add_wait_queue(&lirc_read_queue, &wait);
212 set_current_state(TASK_INTERRUPTIBLE);
214 if (rx_head != rx_tail) {
215 if (copy_to_user(buf + n,
221 rx_head = (rx_head + 1) & (RBUF_LEN - 1);
224 if (file->f_flags & O_NONBLOCK) {
228 if (signal_pending(current)) {
229 retval = -ERESTARTSYS;
233 set_current_state(TASK_INTERRUPTIBLE);
236 remove_wait_queue(&lirc_read_queue, &wait);
237 set_current_state(TASK_RUNNING);
238 return n ? n : retval;
240 static ssize_t lirc_write(struct file *file, const char __user *buf, size_t n,
247 count = n / sizeof(int);
248 if (n % sizeof(int) || count % 2 == 0)
250 tx_buf = memdup_user(buf, n);
252 return PTR_ERR(tx_buf);
254 local_irq_save(flags);
259 send_pulse(tx_buf[i]);
264 send_space(tx_buf[i]);
267 local_irq_restore(flags);
272 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
274 u32 __user *uptr = (u32 __user *)arg;
278 if (cmd == LIRC_GET_FEATURES)
279 value = LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2;
280 else if (cmd == LIRC_GET_SEND_MODE)
281 value = LIRC_MODE_PULSE;
282 else if (cmd == LIRC_GET_REC_MODE)
283 value = LIRC_MODE_MODE2;
286 case LIRC_GET_FEATURES:
287 case LIRC_GET_SEND_MODE:
288 case LIRC_GET_REC_MODE:
289 retval = put_user(value, uptr);
292 case LIRC_SET_SEND_MODE:
293 case LIRC_SET_REC_MODE:
294 retval = get_user(value, uptr);
297 retval = -ENOIOCTLCMD;
303 if (cmd == LIRC_SET_REC_MODE) {
304 if (value != LIRC_MODE_MODE2)
306 } else if (cmd == LIRC_SET_SEND_MODE) {
307 if (value != LIRC_MODE_PULSE)
314 static void add_read_queue(int flag, unsigned long val)
316 unsigned int new_rx_tail;
319 pr_debug("add flag %d with val %lu\n", flag, val);
321 newval = val & PULSE_MASK;
324 * statistically, pulses are ~TIME_CONST/2 too long. we could
325 * maybe make this more exact, but this is good enough
329 if (newval > TIME_CONST/2)
330 newval -= TIME_CONST/2;
331 else /* should not ever happen */
335 newval += TIME_CONST/2;
337 new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1);
338 if (new_rx_tail == rx_head) {
339 pr_debug("Buffer overrun.\n");
342 rx_buf[rx_tail] = newval;
343 rx_tail = new_rx_tail;
344 wake_up_interruptible(&lirc_read_queue);
347 static const struct file_operations lirc_fops = {
348 .owner = THIS_MODULE,
352 .unlocked_ioctl = lirc_ioctl,
354 .compat_ioctl = lirc_ioctl,
356 .open = lirc_dev_fop_open,
357 .release = lirc_dev_fop_close,
361 static int set_use_inc(void *data)
366 static void set_use_dec(void *data)
370 static struct lirc_driver driver = {
371 .name = LIRC_DRIVER_NAME,
377 .set_use_inc = set_use_inc,
378 .set_use_dec = set_use_dec,
381 .owner = THIS_MODULE,
384 static struct platform_device *lirc_sir_dev;
386 static int init_chrdev(void)
388 driver.dev = &lirc_sir_dev->dev;
389 driver.minor = lirc_register_driver(&driver);
390 if (driver.minor < 0) {
391 pr_err("init_chrdev() failed.\n");
397 static void drop_chrdev(void)
399 lirc_unregister_driver(driver.minor);
402 /* SECTION: Hardware */
403 static void sir_timeout(unsigned long data)
406 * if last received signal was a pulse, but receiving stopped
407 * within the 9 bit frame, we need to finish this pulse and
408 * simulate a signal change to from pulse to space. Otherwise
409 * upper layers will receive two sequences next time.
413 unsigned long pulse_end;
415 /* avoid interference with interrupt */
416 spin_lock_irqsave(&timer_lock, flags);
418 /* clear unread bits in UART and restart */
419 outb(UART_FCR_CLEAR_RCVR, io + UART_FCR);
420 /* determine 'virtual' pulse end: */
421 pulse_end = min_t(unsigned long,
422 ktime_us_delta(last, last_intr_time),
424 dev_dbg(driver.dev, "timeout add %d for %lu usec\n",
425 last_value, pulse_end);
426 add_read_queue(last_value, pulse_end);
428 last = last_intr_time;
430 spin_unlock_irqrestore(&timer_lock, flags);
433 static irqreturn_t sir_interrupt(int irq, void *dev_id)
437 static unsigned long delt;
438 unsigned long deltintr;
442 while ((iir = inb(io + UART_IIR) & UART_IIR_ID)) {
443 switch (iir&UART_IIR_ID) { /* FIXME toto treba preriedit */
445 (void) inb(io + UART_MSR);
448 (void) inb(io + UART_LSR);
452 if (lsr & UART_LSR_THRE) /* FIFO is empty */
453 outb(data, io + UART_TX)
457 /* avoid interference with timer */
458 spin_lock_irqsave(&timer_lock, flags);
460 del_timer(&timerlist);
461 data = inb(io + UART_RX);
462 curr_time = ktime_get();
463 delt = min_t(unsigned long,
464 ktime_us_delta(last, curr_time),
466 deltintr = min_t(unsigned long,
467 ktime_us_delta(last_intr_time,
470 dev_dbg(driver.dev, "t %lu, d %d\n",
471 deltintr, (int)data);
473 * if nothing came in last X cycles,
476 if (deltintr > TIME_CONST * threshold) {
478 dev_dbg(driver.dev, "GAP\n");
479 /* simulate signal change */
480 add_read_queue(last_value,
484 last = last_intr_time;
489 if (data ^ last_value) {
491 * deltintr > 2*TIME_CONST, remember?
492 * the other case is timeout
494 add_read_queue(last_value,
498 last = ktime_sub_us(last,
501 last_intr_time = curr_time;
504 * start timer for end of
507 timerlist.expires = jiffies +
509 add_timer(&timerlist);
512 lsr = inb(io + UART_LSR);
513 } while (lsr & UART_LSR_DR); /* data ready */
514 spin_unlock_irqrestore(&timer_lock, flags);
520 return IRQ_RETVAL(IRQ_HANDLED);
523 static void send_space(unsigned long len)
528 static void send_pulse(unsigned long len)
530 long bytes_out = len / TIME_CONST;
535 while (bytes_out--) {
536 outb(PULSE, io + UART_TX);
537 /* FIXME treba seriozne cakanie z char/serial.c */
538 while (!(inb(io + UART_LSR) & UART_LSR_THRE))
543 static int init_hardware(void)
547 spin_lock_irqsave(&hardware_lock, flags);
549 #if defined(LIRC_SIR_TEKRAM)
557 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
559 /* First of all, disable all interrupts */
560 soutp(UART_IER, sinp(UART_IER) &
561 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
564 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
566 /* Set divisor to 12 => 9600 Baud */
571 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
574 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
575 safe_udelay(50*1000);
577 /* -DTR low -> reset PIC */
578 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
581 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
585 /* -RTS low -> send control byte */
586 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
588 soutp(UART_TX, TEKRAM_115200|TEKRAM_PW);
590 /* one byte takes ~1042 usec to transmit at 9600,8N1 */
593 /* back to normal operation */
594 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
599 /* read previous control byte */
600 pr_info("0x%02x\n", sinp(UART_RX));
603 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
605 /* Set divisor to 1 => 115200 Baud */
609 /* Set DLAB 0, 8 Bit */
610 soutp(UART_LCR, UART_LCR_WLEN8);
611 /* enable interrupts */
612 soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
614 outb(0, io + UART_MCR);
615 outb(0, io + UART_IER);
617 /* set DLAB, speed = 115200 */
618 outb(UART_LCR_DLAB | UART_LCR_WLEN7, io + UART_LCR);
619 outb(1, io + UART_DLL); outb(0, io + UART_DLM);
620 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 44000 */
621 outb(UART_LCR_WLEN7, io + UART_LCR);
623 outb(UART_FCR_ENABLE_FIFO, io + UART_FCR);
625 /* outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, io + UART_IER); */
626 outb(UART_IER_RDI, io + UART_IER);
628 outb(UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2, io + UART_MCR);
629 #ifdef LIRC_SIR_ACTISYS_ACT200L
631 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
635 spin_unlock_irqrestore(&hardware_lock, flags);
639 static void drop_hardware(void)
643 spin_lock_irqsave(&hardware_lock, flags);
645 /* turn off interrupts */
646 outb(0, io + UART_IER);
648 spin_unlock_irqrestore(&hardware_lock, flags);
651 /* SECTION: Initialisation */
653 static int init_port(void)
657 /* get I/O port access and IRQ line */
658 if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
659 pr_err("i/o port 0x%.4x already in use.\n", io);
662 retval = request_irq(irq, sir_interrupt, 0,
663 LIRC_DRIVER_NAME, NULL);
665 release_region(io, 8);
666 pr_err("IRQ %d already in use.\n", irq);
669 pr_info("I/O port 0x%.4x, IRQ %d.\n", io, irq);
671 setup_timer(&timerlist, sir_timeout, 0);
676 static void drop_port(void)
679 del_timer_sync(&timerlist);
680 release_region(io, 8);
683 #ifdef LIRC_SIR_ACTISYS_ACT200L
684 /* Crystal/Cirrus CS8130 IR transceiver, used in Actisys Act200L dongle */
685 /* some code borrowed from Linux IRDA driver */
687 /* Register 0: Control register #1 */
688 #define ACT200L_REG0 0x00
689 #define ACT200L_TXEN 0x01 /* Enable transmitter */
690 #define ACT200L_RXEN 0x02 /* Enable receiver */
691 #define ACT200L_ECHO 0x08 /* Echo control chars */
693 /* Register 1: Control register #2 */
694 #define ACT200L_REG1 0x10
695 #define ACT200L_LODB 0x01 /* Load new baud rate count value */
696 #define ACT200L_WIDE 0x04 /* Expand the maximum allowable pulse */
698 /* Register 3: Transmit mode register #2 */
699 #define ACT200L_REG3 0x30
700 #define ACT200L_B0 0x01 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */
701 #define ACT200L_B1 0x02 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */
702 #define ACT200L_CHSY 0x04 /* StartBit Synced 0=bittime, 1=startbit */
704 /* Register 4: Output Power register */
705 #define ACT200L_REG4 0x40
706 #define ACT200L_OP0 0x01 /* Enable LED1C output */
707 #define ACT200L_OP1 0x02 /* Enable LED2C output */
708 #define ACT200L_BLKR 0x04
710 /* Register 5: Receive Mode register */
711 #define ACT200L_REG5 0x50
712 #define ACT200L_RWIDL 0x01 /* fixed 1.6us pulse mode */
713 /*.. other various IRDA bit modes, and TV remote modes..*/
715 /* Register 6: Receive Sensitivity register #1 */
716 #define ACT200L_REG6 0x60
717 #define ACT200L_RS0 0x01 /* receive threshold bit 0 */
718 #define ACT200L_RS1 0x02 /* receive threshold bit 1 */
720 /* Register 7: Receive Sensitivity register #2 */
721 #define ACT200L_REG7 0x70
722 #define ACT200L_ENPOS 0x04 /* Ignore the falling edge */
724 /* Register 8,9: Baud Rate Divider register #1,#2 */
725 #define ACT200L_REG8 0x80
726 #define ACT200L_REG9 0x90
728 #define ACT200L_2400 0x5f
729 #define ACT200L_9600 0x17
730 #define ACT200L_19200 0x0b
731 #define ACT200L_38400 0x05
732 #define ACT200L_57600 0x03
733 #define ACT200L_115200 0x01
735 /* Register 13: Control register #3 */
736 #define ACT200L_REG13 0xd0
737 #define ACT200L_SHDW 0x01 /* Enable access to shadow registers */
739 /* Register 15: Status register */
740 #define ACT200L_REG15 0xf0
742 /* Register 21: Control register #4 */
743 #define ACT200L_REG21 0x50
744 #define ACT200L_EXCK 0x02 /* Disable clock output driver */
745 #define ACT200L_OSCL 0x04 /* oscillator in low power, medium accuracy mode */
747 static void init_act200(void)
752 ACT200L_REG13 | ACT200L_SHDW,
753 ACT200L_REG21 | ACT200L_EXCK | ACT200L_OSCL,
755 ACT200L_REG7 | ACT200L_ENPOS,
756 ACT200L_REG6 | ACT200L_RS0 | ACT200L_RS1,
757 ACT200L_REG5 | ACT200L_RWIDL,
758 ACT200L_REG4 | ACT200L_OP0 | ACT200L_OP1 | ACT200L_BLKR,
759 ACT200L_REG3 | ACT200L_B0,
760 ACT200L_REG0 | ACT200L_TXEN | ACT200L_RXEN,
761 ACT200L_REG8 | (ACT200L_115200 & 0x0f),
762 ACT200L_REG9 | ((ACT200L_115200 >> 4) & 0x0f),
763 ACT200L_REG1 | ACT200L_LODB | ACT200L_WIDE
767 soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
769 /* Set divisor to 12 => 9600 Baud */
774 soutp(UART_LCR, UART_LCR_WLEN8);
775 /* Set divisor to 12 => 9600 Baud */
778 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
779 for (i = 0; i < 50; i++)
782 /* Reset the dongle : set RTS low for 25 ms */
783 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
784 for (i = 0; i < 25; i++)
787 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
790 /* Clear DTR and set RTS to enter command mode */
791 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
794 /* send out the control register settings for 115K 7N1 SIR operation */
795 for (i = 0; i < sizeof(control); i++) {
796 soutp(UART_TX, control[i]);
797 /* one byte takes ~1042 usec to transmit at 9600,8N1 */
801 /* back to normal operation */
802 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
806 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
809 soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
811 /* Set divisor to 1 => 115200 Baud */
816 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
818 /* Set DLAB 0, 7 Bit */
819 soutp(UART_LCR, UART_LCR_WLEN7);
821 /* enable interrupts */
822 soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
826 #ifdef LIRC_SIR_ACTISYS_ACT220L
828 * Derived from linux IrDA driver (net/irda/actisys.c)
829 * Drop me a mail for any kind of comment: maxx@spaceboyz.net
832 void init_act220(void)
837 soutp(UART_LCR, UART_LCR_DLAB|UART_LCR_WLEN7);
844 soutp(UART_LCR, UART_LCR_WLEN7);
846 /* reset the dongle, set DTR low for 10us */
847 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
850 /* back to normal (still 9600) */
851 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2);
854 * send RTS pulses until we reach 115200
855 * i hope this is really the same for act220l/act220l+
857 for (i = 0; i < 3; i++) {
859 /* set RTS low for 10 us */
860 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
862 /* set RTS high for 10 us */
863 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
866 /* back to normal operation */
867 udelay(1500); /* better safe than sorry ;) */
870 soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
872 /* Set divisor to 1 => 115200 Baud */
876 /* Set DLAB 0, 7 Bit */
877 /* The dongle doesn't seem to have any problems with operation at 7N1 */
878 soutp(UART_LCR, UART_LCR_WLEN7);
880 /* enable interrupts */
881 soutp(UART_IER, UART_IER_RDI);
885 static int init_lirc_sir(void)
889 init_waitqueue_head(&lirc_read_queue);
890 retval = init_port();
894 pr_info("Installed.\n");
898 static int lirc_sir_probe(struct platform_device *dev)
903 static int lirc_sir_remove(struct platform_device *dev)
908 static struct platform_driver lirc_sir_driver = {
909 .probe = lirc_sir_probe,
910 .remove = lirc_sir_remove,
916 static int __init lirc_sir_init(void)
920 retval = platform_driver_register(&lirc_sir_driver);
922 pr_err("Platform driver register failed!\n");
926 lirc_sir_dev = platform_device_alloc("lirc_dev", 0);
928 pr_err("Platform device alloc failed!\n");
930 goto pdev_alloc_fail;
933 retval = platform_device_add(lirc_sir_dev);
935 pr_err("Platform device add failed!\n");
940 retval = init_chrdev();
944 retval = init_lirc_sir();
953 platform_device_del(lirc_sir_dev);
955 platform_device_put(lirc_sir_dev);
957 platform_driver_unregister(&lirc_sir_driver);
961 static void __exit lirc_sir_exit(void)
966 platform_device_unregister(lirc_sir_dev);
967 platform_driver_unregister(&lirc_sir_driver);
968 pr_info("Uninstalled.\n");
971 module_init(lirc_sir_init);
972 module_exit(lirc_sir_exit);
974 #ifdef LIRC_SIR_TEKRAM
975 MODULE_DESCRIPTION("Infrared receiver driver for Tekram Irmate 210");
976 MODULE_AUTHOR("Christoph Bartelmus");
977 #elif defined(LIRC_SIR_ACTISYS_ACT200L)
978 MODULE_DESCRIPTION("LIRC driver for Actisys Act200L");
979 MODULE_AUTHOR("Karl Bongers");
980 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
981 MODULE_DESCRIPTION("LIRC driver for Actisys Act220L(+)");
982 MODULE_AUTHOR("Jan Roemisch");
984 MODULE_DESCRIPTION("Infrared receiver driver for SIR type serial ports");
985 MODULE_AUTHOR("Milan Pikula");
987 MODULE_LICENSE("GPL");
989 module_param(io, int, S_IRUGO);
990 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
992 module_param(irq, int, S_IRUGO);
993 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
995 module_param(threshold, int, S_IRUGO);
996 MODULE_PARM_DESC(threshold, "space detection threshold (3)");
998 module_param(debug, bool, S_IRUGO | S_IWUSR);
999 MODULE_PARM_DESC(debug, "Enable debugging messages");