kernel/drivers/staging/media/lirc/lirc_serial.c

   1 /*
   2  * lirc_serial.c
   3  *
   4  * lirc_serial - Device driver that records pulse- and pause-lengths
   5  *             (space-lengths) between DDCD event on a serial port.
   6  *
   7  * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
   8  * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
   9  * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
  10  * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
  11  * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
  12  *  This program is free software; you can redistribute it and/or modify
  13  *  it under the terms of the GNU General Public License as published by
  14  *  the Free Software Foundation; either version 2 of the License, or
  15  *  (at your option) any later version.
  16  *
  17  *  This program is distributed in the hope that it will be useful,
  18  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *  GNU General Public License for more details.
  21  *
  22  *  You should have received a copy of the GNU General Public License
  23  *  along with this program; if not, write to the Free Software
  24  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  25  *
  26  */
  27
  28 /*
  29  * Steve's changes to improve transmission fidelity:
  30  *   - for systems with the rdtsc instruction and the clock counter, a
  31  *     send_pule that times the pulses directly using the counter.
  32  *     This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
  33  *     not needed. Measurement shows very stable waveform, even where
  34  *     PCI activity slows the access to the UART, which trips up other
  35  *     versions.
  36  *   - For other system, non-integer-microsecond pulse/space lengths,
  37  *     done using fixed point binary. So, much more accurate carrier
  38  *     frequency.
  39  *   - fine tuned transmitter latency, taking advantage of fractional
  40  *     microseconds in previous change
  41  *   - Fixed bug in the way transmitter latency was accounted for by
  42  *     tuning the pulse lengths down - the send_pulse routine ignored
  43  *     this overhead as it timed the overall pulse length - so the
  44  *     pulse frequency was right but overall pulse length was too
  45  *     long. Fixed by accounting for latency on each pulse/space
  46  *     iteration.
  47  *
  48  * Steve Davies <steve@daviesfam.org>  July 2001
  49  */
  50
  51 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  52
  53 #include <linux/module.h>
  54 #include <linux/errno.h>
  55 #include <linux/signal.h>
  56 #include <linux/sched.h>
  57 #include <linux/fs.h>
  58 #include <linux/interrupt.h>
  59 #include <linux/ioport.h>
  60 #include <linux/kernel.h>
  61 #include <linux/serial_reg.h>
  62 #include <linux/time.h>
  63 #include <linux/string.h>
  64 #include <linux/types.h>
  65 #include <linux/wait.h>
  66 #include <linux/mm.h>
  67 #include <linux/delay.h>
  68 #include <linux/poll.h>
  69 #include <linux/platform_device.h>
  70 #include <linux/gpio.h>
  71 #include <linux/io.h>
  72 #include <linux/irq.h>
  73 #include <linux/fcntl.h>
  74 #include <linux/spinlock.h>
  75
  76 /* From Intel IXP42X Developer's Manual (#252480-005): */
  77 /* ftp://download.intel.com/design/network/manuals/25248005.pdf */
  78 #define UART_IE_IXP42X_UUE   0x40 /* IXP42X UART Unit enable */
  79 #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
  80
  81 #include <media/lirc.h>
  82 #include <media/lirc_dev.h>
  83
  84 #define LIRC_DRIVER_NAME "lirc_serial"
  85
  86 struct lirc_serial {
  87         int signal_pin;
  88         int signal_pin_change;
  89         u8 on;
  90         u8 off;
  91         long (*send_pulse)(unsigned long length);
  92         void (*send_space)(long length);
  93         int features;
  94         spinlock_t lock;
  95 };
  96
  97 #define LIRC_HOMEBREW           0
  98 #define LIRC_IRDEO              1
  99 #define LIRC_IRDEO_REMOTE       2
 100 #define LIRC_ANIMAX             3
 101 #define LIRC_IGOR               4
 102 #define LIRC_NSLU2              5
 103
 104 /*** module parameters ***/
 105 static int type;
 106 static int io;
 107 static int irq;
 108 static bool iommap;
 109 static int ioshift;
 110 static bool softcarrier = true;
 111 static bool share_irq;
 112 static bool debug;
 113 static int sense = -1;  /* -1 = auto, 0 = active high, 1 = active low */
 114 static bool txsense;    /* 0 = active high, 1 = active low */
 115
 116 #define dprintk(fmt, args...)                                   \
 117         do {                                                    \
 118                 if (debug)                                      \
 119                         printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
 120                                fmt, ## args);                   \
 121         } while (0)
 122
 123 /* forward declarations */
 124 static long send_pulse_irdeo(unsigned long length);
 125 static long send_pulse_homebrew(unsigned long length);
 126 static void send_space_irdeo(long length);
 127 static void send_space_homebrew(long length);
 128
 129 static struct lirc_serial hardware[] = {
 130         [LIRC_HOMEBREW] = {
 131                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_HOMEBREW].lock),
 132                 .signal_pin        = UART_MSR_DCD,
 133                 .signal_pin_change = UART_MSR_DDCD,
 134                 .on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
 135                 .off = (UART_MCR_RTS | UART_MCR_OUT2),
 136                 .send_pulse = send_pulse_homebrew,
 137                 .send_space = send_space_homebrew,
 138 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
 139                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 140                                 LIRC_CAN_SET_SEND_CARRIER |
 141                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 142 #else
 143                 .features    = LIRC_CAN_REC_MODE2
 144 #endif
 145         },
 146
 147         [LIRC_IRDEO] = {
 148                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO].lock),
 149                 .signal_pin        = UART_MSR_DSR,
 150                 .signal_pin_change = UART_MSR_DDSR,
 151                 .on  = UART_MCR_OUT2,
 152                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 153                 .send_pulse  = send_pulse_irdeo,
 154                 .send_space  = send_space_irdeo,
 155                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 156                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 157         },
 158
 159         [LIRC_IRDEO_REMOTE] = {
 160                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO_REMOTE].lock),
 161                 .signal_pin        = UART_MSR_DSR,
 162                 .signal_pin_change = UART_MSR_DDSR,
 163                 .on  = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 164                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 165                 .send_pulse  = send_pulse_irdeo,
 166                 .send_space  = send_space_irdeo,
 167                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 168                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 169         },
 170
 171         [LIRC_ANIMAX] = {
 172                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_ANIMAX].lock),
 173                 .signal_pin        = UART_MSR_DCD,
 174                 .signal_pin_change = UART_MSR_DDCD,
 175                 .on  = 0,
 176                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 177                 .send_pulse = NULL,
 178                 .send_space = NULL,
 179                 .features   = LIRC_CAN_REC_MODE2
 180         },
 181
 182         [LIRC_IGOR] = {
 183                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IGOR].lock),
 184                 .signal_pin        = UART_MSR_DSR,
 185                 .signal_pin_change = UART_MSR_DDSR,
 186                 .on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
 187                 .off = (UART_MCR_RTS | UART_MCR_OUT2),
 188                 .send_pulse = send_pulse_homebrew,
 189                 .send_space = send_space_homebrew,
 190 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
 191                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 192                                 LIRC_CAN_SET_SEND_CARRIER |
 193                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 194 #else
 195                 .features    = LIRC_CAN_REC_MODE2
 196 #endif
 197         },
 198 };
 199
 200 #define RS_ISR_PASS_LIMIT 256
 201
 202 /*
 203  * A long pulse code from a remote might take up to 300 bytes.  The
 204  * daemon should read the bytes as soon as they are generated, so take
 205  * the number of keys you think you can push before the daemon runs
 206  * and multiply by 300.  The driver will warn you if you overrun this
 207  * buffer.  If you have a slow computer or non-busmastering IDE disks,
 208  * maybe you will need to increase this.
 209  */
 210
 211 /* This MUST be a power of two!  It has to be larger than 1 as well. */
 212
 213 #define RBUF_LEN 256
 214
 215 static struct timeval lasttv = {0, 0};
 216
 217 static struct lirc_buffer rbuf;
 218
 219 static unsigned int freq = 38000;
 220 static unsigned int duty_cycle = 50;
 221
 222 /* Initialized in init_timing_params() */
 223 static unsigned long period;
 224 static unsigned long pulse_width;
 225 static unsigned long space_width;
 226
 227 #if defined(__i386__)
 228 /*
 229  * From:
 230  * Linux I/O port programming mini-HOWTO
 231  * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
 232  * v, 28 December 1997
 233  *
 234  * [...]
 235  * Actually, a port I/O instruction on most ports in the 0-0x3ff range
 236  * takes almost exactly 1 microsecond, so if you're, for example, using
 237  * the parallel port directly, just do additional inb()s from that port
 238  * to delay.
 239  * [...]
 240  */
 241 /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
 242  * comment above plus trimming to match actual measured frequency.
 243  * This will be sensitive to cpu speed, though hopefully most of the 1.5us
 244  * is spent in the uart access.  Still - for reference test machine was a
 245  * 1.13GHz Athlon system - Steve
 246  */
 247
 248 /*
 249  * changed from 400 to 450 as this works better on slower machines;
 250  * faster machines will use the rdtsc code anyway
 251  */
 252 #define LIRC_SERIAL_TRANSMITTER_LATENCY 450
 253
 254 #else
 255
 256 /* does anybody have information on other platforms ? */
 257 /* 256 = 1<<8 */
 258 #define LIRC_SERIAL_TRANSMITTER_LATENCY 256
 259
 260 #endif  /* __i386__ */
 261 /*
 262  * FIXME: should we be using hrtimers instead of this
 263  * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense?
 264  */
 265
 266 /* fetch serial input packet (1 byte) from register offset */
 267 static u8 sinp(int offset)
 268 {
 269         if (iommap)
 270                 /* the register is memory-mapped */
 271                 offset <<= ioshift;
 272
 273         return inb(io + offset);
 274 }
 275
 276 /* write serial output packet (1 byte) of value to register offset */
 277 static void soutp(int offset, u8 value)
 278 {
 279         if (iommap)
 280                 /* the register is memory-mapped */
 281                 offset <<= ioshift;
 282
 283         outb(value, io + offset);
 284 }
 285
 286 static void on(void)
 287 {
 288         if (txsense)
 289                 soutp(UART_MCR, hardware[type].off);
 290         else
 291                 soutp(UART_MCR, hardware[type].on);
 292 }
 293
 294 static void off(void)
 295 {
 296         if (txsense)
 297                 soutp(UART_MCR, hardware[type].on);
 298         else
 299                 soutp(UART_MCR, hardware[type].off);
 300 }
 301
 302 #ifndef MAX_UDELAY_MS
 303 #define MAX_UDELAY_US 5000
 304 #else
 305 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
 306 #endif
 307
 308 static void safe_udelay(unsigned long usecs)
 309 {
 310         while (usecs > MAX_UDELAY_US) {
 311                 udelay(MAX_UDELAY_US);
 312                 usecs -= MAX_UDELAY_US;
 313         }
 314         udelay(usecs);
 315 }
 316
 317 #ifdef USE_RDTSC
 318 /*
 319  * This is an overflow/precision juggle, complicated in that we can't
 320  * do long long divide in the kernel
 321  */
 322
 323 /*
 324  * When we use the rdtsc instruction to measure clocks, we keep the
 325  * pulse and space widths as clock cycles.  As this is CPU speed
 326  * dependent, the widths must be calculated in init_port and ioctl
 327  * time
 328  */
 329
 330 /* So send_pulse can quickly convert microseconds to clocks */
 331 static unsigned long conv_us_to_clocks;
 332
 333 static int init_timing_params(unsigned int new_duty_cycle,
 334                 unsigned int new_freq)
 335 {
 336         __u64 loops_per_sec, work;
 337
 338         duty_cycle = new_duty_cycle;
 339         freq = new_freq;
 340
 341         loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
 342         loops_per_sec *= HZ;
 343
 344         /* How many clocks in a microsecond?, avoiding long long divide */
 345         work = loops_per_sec;
 346         work *= 4295;  /* 4295 = 2^32 / 1e6 */
 347         conv_us_to_clocks = work >> 32;
 348
 349         /*
 350          * Carrier period in clocks, approach good up to 32GHz clock,
 351          * gets carrier frequency within 8Hz
 352          */
 353         period = loops_per_sec >> 3;
 354         period /= (freq >> 3);
 355
 356         /* Derive pulse and space from the period */
 357         pulse_width = period * duty_cycle / 100;
 358         space_width = period - pulse_width;
 359         dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
 360                 "clk/jiffy=%ld, pulse=%ld, space=%ld, "
 361                 "conv_us_to_clocks=%ld\n",
 362                 freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
 363                 pulse_width, space_width, conv_us_to_clocks);
 364         return 0;
 365 }
 366 #else /* ! USE_RDTSC */
 367 static int init_timing_params(unsigned int new_duty_cycle,
 368                 unsigned int new_freq)
 369 {
 370 /*
 371  * period, pulse/space width are kept with 8 binary places -
 372  * IE multiplied by 256.
 373  */
 374         if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
 375             LIRC_SERIAL_TRANSMITTER_LATENCY)
 376                 return -EINVAL;
 377         if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
 378             LIRC_SERIAL_TRANSMITTER_LATENCY)
 379                 return -EINVAL;
 380         duty_cycle = new_duty_cycle;
 381         freq = new_freq;
 382         period = 256 * 1000000L / freq;
 383         pulse_width = period * duty_cycle / 100;
 384         space_width = period - pulse_width;
 385         dprintk("in init_timing_params, freq=%d pulse=%ld, space=%ld\n",
 386                 freq, pulse_width, space_width);
 387         return 0;
 388 }
 389 #endif /* USE_RDTSC */
 390
 391
 392 /* return value: space length delta */
 393
 394 static long send_pulse_irdeo(unsigned long length)
 395 {
 396         long rawbits, ret;
 397         int i;
 398         unsigned char output;
 399         unsigned char chunk, shifted;
 400
 401         /* how many bits have to be sent ? */
 402         rawbits = length * 1152 / 10000;
 403         if (duty_cycle > 50)
 404                 chunk = 3;
 405         else
 406                 chunk = 1;
 407         for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
 408                 shifted = chunk << (i * 3);
 409                 shifted >>= 1;
 410                 output &= (~shifted);
 411                 i++;
 412                 if (i == 3) {
 413                         soutp(UART_TX, output);
 414                         while (!(sinp(UART_LSR) & UART_LSR_THRE))
 415                                 ;
 416                         output = 0x7f;
 417                         i = 0;
 418                 }
 419         }
 420         if (i != 0) {
 421                 soutp(UART_TX, output);
 422                 while (!(sinp(UART_LSR) & UART_LSR_TEMT))
 423                         ;
 424         }
 425
 426         if (i == 0)
 427                 ret = (-rawbits) * 10000 / 1152;
 428         else
 429                 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152;
 430
 431         return ret;
 432 }
 433
 434 #ifdef USE_RDTSC
 435 /* Version that uses Pentium rdtsc instruction to measure clocks */
 436
 437 /*
 438  * This version does sub-microsecond timing using rdtsc instruction,
 439  * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY
 440  * Implicitly i586 architecture...  - Steve
 441  */
 442
 443 static long send_pulse_homebrew_softcarrier(unsigned long length)
 444 {
 445         int flag;
 446         unsigned long target, start, now;
 447
 448         /* Get going quick as we can */
 449         rdtscl(start);
 450         on();
 451         /* Convert length from microseconds to clocks */
 452         length *= conv_us_to_clocks;
 453         /* And loop till time is up - flipping at right intervals */
 454         now = start;
 455         target = pulse_width;
 456         flag = 1;
 457         /*
 458          * FIXME: This looks like a hard busy wait, without even an occasional,
 459          * polite, cpu_relax() call.  There's got to be a better way?
 460          *
 461          * The i2c code has the result of a lot of bit-banging work, I wonder if
 462          * there's something there which could be helpful here.
 463          */
 464         while ((now - start) < length) {
 465                 /* Delay till flip time */
 466                 do {
 467                         rdtscl(now);
 468                 } while ((now - start) < target);
 469
 470                 /* flip */
 471                 if (flag) {
 472                         rdtscl(now);
 473                         off();
 474                         target += space_width;
 475                 } else {
 476                         rdtscl(now); on();
 477                         target += pulse_width;
 478                 }
 479                 flag = !flag;
 480         }
 481         rdtscl(now);
 482         return ((now - start) - length) / conv_us_to_clocks;
 483 }
 484 #else /* ! USE_RDTSC */
 485 /* Version using udelay() */
 486
 487 /*
 488  * here we use fixed point arithmetic, with 8
 489  * fractional bits.  that gets us within 0.1% or so of the right average
 490  * frequency, albeit with some jitter in pulse length - Steve
 491  */
 492
 493 /* To match 8 fractional bits used for pulse/space length */
 494
 495 static long send_pulse_homebrew_softcarrier(unsigned long length)
 496 {
 497         int flag;
 498         unsigned long actual, target, d;
 499
 500         length <<= 8;
 501
 502         actual = 0; target = 0; flag = 0;
 503         while (actual < length) {
 504                 if (flag) {
 505                         off();
 506                         target += space_width;
 507                 } else {
 508                         on();
 509                         target += pulse_width;
 510                 }
 511                 d = (target - actual -
 512                      LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
 513                 /*
 514                  * Note - we've checked in ioctl that the pulse/space
 515                  * widths are big enough so that d is > 0
 516                  */
 517                 udelay(d);
 518                 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
 519                 flag = !flag;
 520         }
 521         return (actual-length) >> 8;
 522 }
 523 #endif /* USE_RDTSC */
 524
 525 static long send_pulse_homebrew(unsigned long length)
 526 {
 527         if (length <= 0)
 528                 return 0;
 529
 530         if (softcarrier)
 531                 return send_pulse_homebrew_softcarrier(length);
 532
 533         on();
 534         safe_udelay(length);
 535         return 0;
 536 }
 537
 538 static void send_space_irdeo(long length)
 539 {
 540         if (length <= 0)
 541                 return;
 542
 543         safe_udelay(length);
 544 }
 545
 546 static void send_space_homebrew(long length)
 547 {
 548         off();
 549         if (length <= 0)
 550                 return;
 551         safe_udelay(length);
 552 }
 553
 554 static void rbwrite(int l)
 555 {
 556         if (lirc_buffer_full(&rbuf)) {
 557                 /* no new signals will be accepted */
 558                 dprintk("Buffer overrun\n");
 559                 return;
 560         }
 561         lirc_buffer_write(&rbuf, (void *)&l);
 562 }
 563
 564 static void frbwrite(int l)
 565 {
 566         /* simple noise filter */
 567         static int pulse, space;
 568         static unsigned int ptr;
 569
 570         if (ptr > 0 && (l & PULSE_BIT)) {
 571                 pulse += l & PULSE_MASK;
 572                 if (pulse > 250) {
 573                         rbwrite(space);
 574                         rbwrite(pulse | PULSE_BIT);
 575                         ptr = 0;
 576                         pulse = 0;
 577                 }
 578                 return;
 579         }
 580         if (!(l & PULSE_BIT)) {
 581                 if (ptr == 0) {
 582                         if (l > 20000) {
 583                                 space = l;
 584                                 ptr++;
 585                                 return;
 586                         }
 587                 } else {
 588                         if (l > 20000) {
 589                                 space += pulse;
 590                                 if (space > PULSE_MASK)
 591                                         space = PULSE_MASK;
 592                                 space += l;
 593                                 if (space > PULSE_MASK)
 594                                         space = PULSE_MASK;
 595                                 pulse = 0;
 596                                 return;
 597                         }
 598                         rbwrite(space);
 599                         rbwrite(pulse | PULSE_BIT);
 600                         ptr = 0;
 601                         pulse = 0;
 602                 }
 603         }
 604         rbwrite(l);
 605 }
 606
 607 static irqreturn_t lirc_irq_handler(int i, void *blah)
 608 {
 609         struct timeval tv;
 610         int counter, dcd;
 611         u8 status;
 612         long deltv;
 613         int data;
 614         static int last_dcd = -1;
 615
 616         if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
 617                 /* not our interrupt */
 618                 return IRQ_NONE;
 619         }
 620
 621         counter = 0;
 622         do {
 623                 counter++;
 624                 status = sinp(UART_MSR);
 625                 if (counter > RS_ISR_PASS_LIMIT) {
 626                         pr_warn("AIEEEE: We're caught!\n");
 627                         break;
 628                 }
 629                 if ((status & hardware[type].signal_pin_change)
 630                     && sense != -1) {
 631                         /* get current time */
 632                         do_gettimeofday(&tv);
 633
 634                         /* New mode, written by Trent Piepho
 635                            <xyzzy@u.washington.edu>. */
 636
 637                         /*
 638                          * The old format was not very portable.
 639                          * We now use an int to pass pulses
 640                          * and spaces to user space.
 641                          *
 642                          * If PULSE_BIT is set a pulse has been
 643                          * received, otherwise a space has been
 644                          * received.  The driver needs to know if your
 645                          * receiver is active high or active low, or
 646                          * the space/pulse sense could be
 647                          * inverted. The bits denoted by PULSE_MASK are
 648                          * the length in microseconds. Lengths greater
 649                          * than or equal to 16 seconds are clamped to
 650                          * PULSE_MASK.  All other bits are unused.
 651                          * This is a much simpler interface for user
 652                          * programs, as well as eliminating "out of
 653                          * phase" errors with space/pulse
 654                          * autodetection.
 655                          */
 656
 657                         /* calc time since last interrupt in microseconds */
 658                         dcd = (status & hardware[type].signal_pin) ? 1 : 0;
 659
 660                         if (dcd == last_dcd) {
 661                                 pr_warn("ignoring spike: %d %d %lx %lx %lx %lx\n",
 662                                         dcd, sense,
 663                                         tv.tv_sec, lasttv.tv_sec,
 664                                         (unsigned long)tv.tv_usec,
 665                                         (unsigned long)lasttv.tv_usec);
 666                                 continue;
 667                         }
 668
 669                         deltv = tv.tv_sec-lasttv.tv_sec;
 670                         if (tv.tv_sec < lasttv.tv_sec ||
 671                             (tv.tv_sec == lasttv.tv_sec &&
 672                              tv.tv_usec < lasttv.tv_usec)) {
 673                                 pr_warn("AIEEEE: your clock just jumped backwards\n");
 674                                 pr_warn("%d %d %lx %lx %lx %lx\n",
 675                                         dcd, sense,
 676                                         tv.tv_sec, lasttv.tv_sec,
 677                                         (unsigned long)tv.tv_usec,
 678                                         (unsigned long)lasttv.tv_usec);
 679                                 data = PULSE_MASK;
 680                         } else if (deltv > 15) {
 681                                 data = PULSE_MASK; /* really long time */
 682                                 if (!(dcd^sense)) {
 683                                         /* sanity check */
 684                                         pr_warn("AIEEEE: %d %d %lx %lx %lx %lx\n",
 685                                                 dcd, sense,
 686                                                 tv.tv_sec, lasttv.tv_sec,
 687                                                 (unsigned long)tv.tv_usec,
 688                                                 (unsigned long)lasttv.tv_usec);
 689                                         /*
 690                                          * detecting pulse while this
 691                                          * MUST be a space!
 692                                          */
 693                                         sense = sense ? 0 : 1;
 694                                 }
 695                         } else
 696                                 data = (int) (deltv*1000000 +
 697                                                tv.tv_usec -
 698                                                lasttv.tv_usec);
 699                         frbwrite(dcd^sense ? data : (data|PULSE_BIT));
 700                         lasttv = tv;
 701                         last_dcd = dcd;
 702                         wake_up_interruptible(&rbuf.wait_poll);
 703                 }
 704         } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
 705         return IRQ_HANDLED;
 706 }
 707
 708
 709 static int hardware_init_port(void)
 710 {
 711         u8 scratch, scratch2, scratch3;
 712
 713         /*
 714          * This is a simple port existence test, borrowed from the autoconfig
 715          * function in drivers/serial/8250.c
 716          */
 717         scratch = sinp(UART_IER);
 718         soutp(UART_IER, 0);
 719 #ifdef __i386__
 720         outb(0xff, 0x080);
 721 #endif
 722         scratch2 = sinp(UART_IER) & 0x0f;
 723         soutp(UART_IER, 0x0f);
 724 #ifdef __i386__
 725         outb(0x00, 0x080);
 726 #endif
 727         scratch3 = sinp(UART_IER) & 0x0f;
 728         soutp(UART_IER, scratch);
 729         if (scratch2 != 0 || scratch3 != 0x0f) {
 730                 /* we fail, there's nothing here */
 731                 pr_err("port existence test failed, cannot continue\n");
 732                 return -ENODEV;
 733         }
 734
 735
 736
 737         /* Set DLAB 0. */
 738         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 739
 740         /* First of all, disable all interrupts */
 741         soutp(UART_IER, sinp(UART_IER) &
 742               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
 743
 744         /* Clear registers. */
 745         sinp(UART_LSR);
 746         sinp(UART_RX);
 747         sinp(UART_IIR);
 748         sinp(UART_MSR);
 749
 750         /* Set line for power source */
 751         off();
 752
 753         /* Clear registers again to be sure. */
 754         sinp(UART_LSR);
 755         sinp(UART_RX);
 756         sinp(UART_IIR);
 757         sinp(UART_MSR);
 758
 759         switch (type) {
 760         case LIRC_IRDEO:
 761         case LIRC_IRDEO_REMOTE:
 762                 /* setup port to 7N1 @ 115200 Baud */
 763                 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
 764
 765                 /* Set DLAB 1. */
 766                 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
 767                 /* Set divisor to 1 => 115200 Baud */
 768                 soutp(UART_DLM, 0);
 769                 soutp(UART_DLL, 1);
 770                 /* Set DLAB 0 +  7N1 */
 771                 soutp(UART_LCR, UART_LCR_WLEN7);
 772                 /* THR interrupt already disabled at this point */
 773                 break;
 774         default:
 775                 break;
 776         }
 777
 778         return 0;
 779 }
 780
 781 static int lirc_serial_probe(struct platform_device *dev)
 782 {
 783         int i, nlow, nhigh, result;
 784
 785         result = devm_request_irq(&dev->dev, irq, lirc_irq_handler,
 786                              (share_irq ? IRQF_SHARED : 0),
 787                              LIRC_DRIVER_NAME, &hardware);
 788         if (result < 0) {
 789                 if (result == -EBUSY)
 790                         dev_err(&dev->dev, "IRQ %d busy\n", irq);
 791                 else if (result == -EINVAL)
 792                         dev_err(&dev->dev, "Bad irq number or handler\n");
 793                 return result;
 794         }
 795
 796         /* Reserve io region. */
 797         /*
 798          * Future MMAP-Developers: Attention!
 799          * For memory mapped I/O you *might* need to use ioremap() first,
 800          * for the NSLU2 it's done in boot code.
 801          */
 802         if (((iommap)
 803              && (devm_request_mem_region(&dev->dev, iommap, 8 << ioshift,
 804                                          LIRC_DRIVER_NAME) == NULL))
 805            || ((!iommap)
 806                && (devm_request_region(&dev->dev, io, 8,
 807                                        LIRC_DRIVER_NAME) == NULL))) {
 808                 dev_err(&dev->dev, "port %04x already in use\n", io);
 809                 dev_warn(&dev->dev, "use 'setserial /dev/ttySX uart none'\n");
 810                 dev_warn(&dev->dev,
 811                          "or compile the serial port driver as module and\n");
 812                 dev_warn(&dev->dev, "make sure this module is loaded first\n");
 813                 return -EBUSY;
 814         }
 815
 816         result = hardware_init_port();
 817         if (result < 0)
 818                 return result;
 819
 820         /* Initialize pulse/space widths */
 821         init_timing_params(duty_cycle, freq);
 822
 823         /* If pin is high, then this must be an active low receiver. */
 824         if (sense == -1) {
 825                 /* wait 1/2 sec for the power supply */
 826                 msleep(500);
 827
 828                 /*
 829                  * probe 9 times every 0.04s, collect "votes" for
 830                  * active high/low
 831                  */
 832                 nlow = 0;
 833                 nhigh = 0;
 834                 for (i = 0; i < 9; i++) {
 835                         if (sinp(UART_MSR) & hardware[type].signal_pin)
 836                                 nlow++;
 837                         else
 838                                 nhigh++;
 839                         msleep(40);
 840                 }
 841                 sense = nlow >= nhigh ? 1 : 0;
 842                 dev_info(&dev->dev, "auto-detected active %s receiver\n",
 843                          sense ? "low" : "high");
 844         } else
 845                 dev_info(&dev->dev, "Manually using active %s receiver\n",
 846                          sense ? "low" : "high");
 847
 848         dprintk("Interrupt %d, port %04x obtained\n", irq, io);
 849         return 0;
 850 }
 851
 852 static int set_use_inc(void *data)
 853 {
 854         unsigned long flags;
 855
 856         /* initialize timestamp */
 857         do_gettimeofday(&lasttv);
 858
 859         spin_lock_irqsave(&hardware[type].lock, flags);
 860
 861         /* Set DLAB 0. */
 862         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 863
 864         soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
 865
 866         spin_unlock_irqrestore(&hardware[type].lock, flags);
 867
 868         return 0;
 869 }
 870
 871 static void set_use_dec(void *data)
 872 {       unsigned long flags;
 873
 874         spin_lock_irqsave(&hardware[type].lock, flags);
 875
 876         /* Set DLAB 0. */
 877         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 878
 879         /* First of all, disable all interrupts */
 880         soutp(UART_IER, sinp(UART_IER) &
 881               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
 882         spin_unlock_irqrestore(&hardware[type].lock, flags);
 883 }
 884
 885 static ssize_t lirc_write(struct file *file, const char __user *buf,
 886                          size_t n, loff_t *ppos)
 887 {
 888         int i, count;
 889         unsigned long flags;
 890         long delta = 0;
 891         int *wbuf;
 892
 893         if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
 894                 return -EPERM;
 895
 896         count = n / sizeof(int);
 897         if (n % sizeof(int) || count % 2 == 0)
 898                 return -EINVAL;
 899         wbuf = memdup_user(buf, n);
 900         if (IS_ERR(wbuf))
 901                 return PTR_ERR(wbuf);
 902         spin_lock_irqsave(&hardware[type].lock, flags);
 903         if (type == LIRC_IRDEO) {
 904                 /* DTR, RTS down */
 905                 on();
 906         }
 907         for (i = 0; i < count; i++) {
 908                 if (i%2)
 909                         hardware[type].send_space(wbuf[i] - delta);
 910                 else
 911                         delta = hardware[type].send_pulse(wbuf[i]);
 912         }
 913         off();
 914         spin_unlock_irqrestore(&hardware[type].lock, flags);
 915         kfree(wbuf);
 916         return n;
 917 }
 918
 919 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
 920 {
 921         int result;
 922         u32 __user *uptr = (u32 __user *)arg;
 923         u32 value;
 924
 925         switch (cmd) {
 926         case LIRC_GET_SEND_MODE:
 927                 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
 928                         return -ENOIOCTLCMD;
 929
 930                 result = put_user(LIRC_SEND2MODE
 931                                   (hardware[type].features&LIRC_CAN_SEND_MASK),
 932                                   uptr);
 933                 if (result)
 934                         return result;
 935                 break;
 936
 937         case LIRC_SET_SEND_MODE:
 938                 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
 939                         return -ENOIOCTLCMD;
 940
 941                 result = get_user(value, uptr);
 942                 if (result)
 943                         return result;
 944                 /* only LIRC_MODE_PULSE supported */
 945                 if (value != LIRC_MODE_PULSE)
 946                         return -EINVAL;
 947                 break;
 948
 949         case LIRC_GET_LENGTH:
 950                 return -ENOIOCTLCMD;
 951
 952         case LIRC_SET_SEND_DUTY_CYCLE:
 953                 dprintk("SET_SEND_DUTY_CYCLE\n");
 954                 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
 955                         return -ENOIOCTLCMD;
 956
 957                 result = get_user(value, uptr);
 958                 if (result)
 959                         return result;
 960                 if (value <= 0 || value > 100)
 961                         return -EINVAL;
 962                 return init_timing_params(value, freq);
 963
 964         case LIRC_SET_SEND_CARRIER:
 965                 dprintk("SET_SEND_CARRIER\n");
 966                 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
 967                         return -ENOIOCTLCMD;
 968
 969                 result = get_user(value, uptr);
 970                 if (result)
 971                         return result;
 972                 if (value > 500000 || value < 20000)
 973                         return -EINVAL;
 974                 return init_timing_params(duty_cycle, value);
 975
 976         default:
 977                 return lirc_dev_fop_ioctl(filep, cmd, arg);
 978         }
 979         return 0;
 980 }
 981
 982 static const struct file_operations lirc_fops = {
 983         .owner          = THIS_MODULE,
 984         .write          = lirc_write,
 985         .unlocked_ioctl = lirc_ioctl,
 986 #ifdef CONFIG_COMPAT
 987         .compat_ioctl   = lirc_ioctl,
 988 #endif
 989         .read           = lirc_dev_fop_read,
 990         .poll           = lirc_dev_fop_poll,
 991         .open           = lirc_dev_fop_open,
 992         .release        = lirc_dev_fop_close,
 993         .llseek         = no_llseek,
 994 };
 995
 996 static struct lirc_driver driver = {
 997         .name           = LIRC_DRIVER_NAME,
 998         .minor          = -1,
 999         .code_length    = 1,
1000         .sample_rate    = 0,
1001         .data           = NULL,
1002         .add_to_buf     = NULL,
1003         .rbuf           = &rbuf,
1004         .set_use_inc    = set_use_inc,
1005         .set_use_dec    = set_use_dec,
1006         .fops           = &lirc_fops,
1007         .dev            = NULL,
1008         .owner          = THIS_MODULE,
1009 };
1010
1011 static struct platform_device *lirc_serial_dev;
1012
1013 static int lirc_serial_suspend(struct platform_device *dev,
1014                                pm_message_t state)
1015 {
1016         /* Set DLAB 0. */
1017         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
1018
1019         /* Disable all interrupts */
1020         soutp(UART_IER, sinp(UART_IER) &
1021               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
1022
1023         /* Clear registers. */
1024         sinp(UART_LSR);
1025         sinp(UART_RX);
1026         sinp(UART_IIR);
1027         sinp(UART_MSR);
1028
1029         return 0;
1030 }
1031
1032 /* twisty maze... need a forward-declaration here... */
1033 static void lirc_serial_exit(void);
1034
1035 static int lirc_serial_resume(struct platform_device *dev)
1036 {
1037         unsigned long flags;
1038         int result;
1039
1040         result = hardware_init_port();
1041         if (result < 0)
1042                 return result;
1043
1044         spin_lock_irqsave(&hardware[type].lock, flags);
1045         /* Enable Interrupt */
1046         do_gettimeofday(&lasttv);
1047         soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
1048         off();
1049
1050         lirc_buffer_clear(&rbuf);
1051
1052         spin_unlock_irqrestore(&hardware[type].lock, flags);
1053
1054         return 0;
1055 }
1056
1057 static struct platform_driver lirc_serial_driver = {
1058         .probe          = lirc_serial_probe,
1059         .suspend        = lirc_serial_suspend,
1060         .resume         = lirc_serial_resume,
1061         .driver         = {
1062                 .name   = "lirc_serial",
1063         },
1064 };
1065
1066 static int __init lirc_serial_init(void)
1067 {
1068         int result;
1069
1070         /* Init read buffer. */
1071         result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
1072         if (result < 0)
1073                 return result;
1074
1075         result = platform_driver_register(&lirc_serial_driver);
1076         if (result) {
1077                 printk("lirc register returned %d\n", result);
1078                 goto exit_buffer_free;
1079         }
1080
1081         lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
1082         if (!lirc_serial_dev) {
1083                 result = -ENOMEM;
1084                 goto exit_driver_unregister;
1085         }
1086
1087         result = platform_device_add(lirc_serial_dev);
1088         if (result)
1089                 goto exit_device_put;
1090
1091         return 0;
1092
1093 exit_device_put:
1094         platform_device_put(lirc_serial_dev);
1095 exit_driver_unregister:
1096         platform_driver_unregister(&lirc_serial_driver);
1097 exit_buffer_free:
1098         lirc_buffer_free(&rbuf);
1099         return result;
1100 }
1101
1102 static void lirc_serial_exit(void)
1103 {
1104         platform_device_unregister(lirc_serial_dev);
1105         platform_driver_unregister(&lirc_serial_driver);
1106         lirc_buffer_free(&rbuf);
1107 }
1108
1109 static int __init lirc_serial_init_module(void)
1110 {
1111         int result;
1112
1113         switch (type) {
1114         case LIRC_HOMEBREW:
1115         case LIRC_IRDEO:
1116         case LIRC_IRDEO_REMOTE:
1117         case LIRC_ANIMAX:
1118         case LIRC_IGOR:
1119                 /* if nothing specified, use ttyS0/com1 and irq 4 */
1120                 io = io ? io : 0x3f8;
1121                 irq = irq ? irq : 4;
1122                 break;
1123         default:
1124                 return -EINVAL;
1125         }
1126         if (!softcarrier) {
1127                 switch (type) {
1128                 case LIRC_HOMEBREW:
1129                 case LIRC_IGOR:
1130                         hardware[type].features &=
1131                                 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
1132                                   LIRC_CAN_SET_SEND_CARRIER);
1133                         break;
1134                 }
1135         }
1136
1137         /* make sure sense is either -1, 0, or 1 */
1138         if (sense != -1)
1139                 sense = !!sense;
1140
1141         result = lirc_serial_init();
1142         if (result)
1143                 return result;
1144
1145         driver.features = hardware[type].features;
1146         driver.dev = &lirc_serial_dev->dev;
1147         driver.minor = lirc_register_driver(&driver);
1148         if (driver.minor < 0) {
1149                 pr_err("register_chrdev failed!\n");
1150                 lirc_serial_exit();
1151                 return driver.minor;
1152         }
1153         return 0;
1154 }
1155
1156 static void __exit lirc_serial_exit_module(void)
1157 {
1158         lirc_unregister_driver(driver.minor);
1159         lirc_serial_exit();
1160         dprintk("cleaned up module\n");
1161 }
1162
1163
1164 module_init(lirc_serial_init_module);
1165 module_exit(lirc_serial_exit_module);
1166
1167 MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
1168 MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
1169               "Christoph Bartelmus, Andrei Tanas");
1170 MODULE_LICENSE("GPL");
1171
1172 module_param(type, int, S_IRUGO);
1173 MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
1174                  " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
1175                  " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
1176
1177 module_param(io, int, S_IRUGO);
1178 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1179
1180 /* some architectures (e.g. intel xscale) have memory mapped registers */
1181 module_param(iommap, bool, S_IRUGO);
1182 MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
1183                 " (0 = no memory mapped io)");
1184
1185 /*
1186  * some architectures (e.g. intel xscale) align the 8bit serial registers
1187  * on 32bit word boundaries.
1188  * See linux-kernel/drivers/tty/serial/8250/8250.c serial_in()/out()
1189  */
1190 module_param(ioshift, int, S_IRUGO);
1191 MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
1192
1193 module_param(irq, int, S_IRUGO);
1194 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1195
1196 module_param(share_irq, bool, S_IRUGO);
1197 MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
1198
1199 module_param(sense, int, S_IRUGO);
1200 MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
1201                  " (0 = active high, 1 = active low )");
1202
1203 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
1204 module_param(txsense, bool, S_IRUGO);
1205 MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
1206                  " (0 = active high, 1 = active low )");
1207 #endif
1208
1209 module_param(softcarrier, bool, S_IRUGO);
1210 MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");
1211
1212 module_param(debug, bool, S_IRUGO | S_IWUSR);
1213 MODULE_PARM_DESC(debug, "Enable debugging messages");