kernel/drivers/staging/iio/cdc/ad7746.c

   1 /*
   2  * AD7746 capacitive sensor driver supporting AD7745, AD7746 and AD7747
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/device.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/sysfs.h>
  14 #include <linux/i2c.h>
  15 #include <linux/delay.h>
  16 #include <linux/module.h>
  17 #include <linux/stat.h>
  18
  19 #include <linux/iio/iio.h>
  20 #include <linux/iio/sysfs.h>
  21
  22 #include "ad7746.h"
  23
  24 /*
  25  * AD7746 Register Definition
  26  */
  27
  28 #define AD7746_REG_STATUS               0
  29 #define AD7746_REG_CAP_DATA_HIGH        1
  30 #define AD7746_REG_VT_DATA_HIGH         4
  31 #define AD7746_REG_CAP_SETUP            7
  32 #define AD7746_REG_VT_SETUP             8
  33 #define AD7746_REG_EXC_SETUP            9
  34 #define AD7746_REG_CFG                  10
  35 #define AD7746_REG_CAPDACA              11
  36 #define AD7746_REG_CAPDACB              12
  37 #define AD7746_REG_CAP_OFFH             13
  38 #define AD7746_REG_CAP_GAINH            15
  39 #define AD7746_REG_VOLT_GAINH           17
  40
  41 /* Status Register Bit Designations (AD7746_REG_STATUS) */
  42 #define AD7746_STATUS_EXCERR            BIT(3)
  43 #define AD7746_STATUS_RDY               BIT(2)
  44 #define AD7746_STATUS_RDYVT             BIT(1)
  45 #define AD7746_STATUS_RDYCAP            BIT(0)
  46
  47 /* Capacitive Channel Setup Register Bit Designations (AD7746_REG_CAP_SETUP) */
  48 #define AD7746_CAPSETUP_CAPEN           (1 << 7)
  49 #define AD7746_CAPSETUP_CIN2            (1 << 6) /* AD7746 only */
  50 #define AD7746_CAPSETUP_CAPDIFF         (1 << 5)
  51 #define AD7746_CAPSETUP_CACHOP          (1 << 0)
  52
  53 /* Voltage/Temperature Setup Register Bit Designations (AD7746_REG_VT_SETUP) */
  54 #define AD7746_VTSETUP_VTEN             (1 << 7)
  55 #define AD7746_VTSETUP_VTMD_INT_TEMP    (0 << 5)
  56 #define AD7746_VTSETUP_VTMD_EXT_TEMP    (1 << 5)
  57 #define AD7746_VTSETUP_VTMD_VDD_MON     (2 << 5)
  58 #define AD7746_VTSETUP_VTMD_EXT_VIN     (3 << 5)
  59 #define AD7746_VTSETUP_EXTREF           (1 << 4)
  60 #define AD7746_VTSETUP_VTSHORT          (1 << 1)
  61 #define AD7746_VTSETUP_VTCHOP           (1 << 0)
  62
  63 /* Excitation Setup Register Bit Designations (AD7746_REG_EXC_SETUP) */
  64 #define AD7746_EXCSETUP_CLKCTRL         BIT(7)
  65 #define AD7746_EXCSETUP_EXCON           BIT(6)
  66 #define AD7746_EXCSETUP_EXCB            BIT(5)
  67 #define AD7746_EXCSETUP_NEXCB           BIT(4)
  68 #define AD7746_EXCSETUP_EXCA            BIT(3)
  69 #define AD7746_EXCSETUP_NEXCA           BIT(2)
  70 #define AD7746_EXCSETUP_EXCLVL(x)       (((x) & 0x3) << 0)
  71
  72 /* Config Register Bit Designations (AD7746_REG_CFG) */
  73 #define AD7746_CONF_VTFS(x)             ((x) << 6)
  74 #define AD7746_CONF_CAPFS(x)            ((x) << 3)
  75 #define AD7746_CONF_MODE_IDLE           (0 << 0)
  76 #define AD7746_CONF_MODE_CONT_CONV      (1 << 0)
  77 #define AD7746_CONF_MODE_SINGLE_CONV    (2 << 0)
  78 #define AD7746_CONF_MODE_PWRDN          (3 << 0)
  79 #define AD7746_CONF_MODE_OFFS_CAL       (5 << 0)
  80 #define AD7746_CONF_MODE_GAIN_CAL       (6 << 0)
  81
  82 /* CAPDAC Register Bit Designations (AD7746_REG_CAPDACx) */
  83 #define AD7746_CAPDAC_DACEN             (1 << 7)
  84 #define AD7746_CAPDAC_DACP(x)           ((x) & 0x7F)
  85
  86 /*
  87  * struct ad7746_chip_info - chip specific information
  88  */
  89
  90 struct ad7746_chip_info {
  91         struct i2c_client *client;
  92         /*
  93          * Capacitive channel digital filter setup;
  94          * conversion time/update rate setup per channel
  95          */
  96         u8      config;
  97         u8      cap_setup;
  98         u8      vt_setup;
  99         u8      capdac[2][2];
 100         s8      capdac_set;
 101
 102         union {
 103                 __be32 d32;
 104                 u8 d8[4];
 105         } data ____cacheline_aligned;
 106 };
 107
 108 enum ad7746_chan {
 109         VIN,
 110         VIN_VDD,
 111         TEMP_INT,
 112         TEMP_EXT,
 113         CIN1,
 114         CIN1_DIFF,
 115         CIN2,
 116         CIN2_DIFF,
 117 };
 118
 119 static const struct iio_chan_spec ad7746_channels[] = {
 120         [VIN] = {
 121                 .type = IIO_VOLTAGE,
 122                 .indexed = 1,
 123                 .channel = 0,
 124                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 125                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 126                 .address = AD7746_REG_VT_DATA_HIGH << 8 |
 127                         AD7746_VTSETUP_VTMD_EXT_VIN,
 128         },
 129         [VIN_VDD] = {
 130                 .type = IIO_VOLTAGE,
 131                 .indexed = 1,
 132                 .channel = 1,
 133                 .extend_name = "supply",
 134                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 135                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
 136                 .address = AD7746_REG_VT_DATA_HIGH << 8 |
 137                         AD7746_VTSETUP_VTMD_VDD_MON,
 138         },
 139         [TEMP_INT] = {
 140                 .type = IIO_TEMP,
 141                 .indexed = 1,
 142                 .channel = 0,
 143                 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
 144                 .address = AD7746_REG_VT_DATA_HIGH << 8 |
 145                         AD7746_VTSETUP_VTMD_INT_TEMP,
 146         },
 147         [TEMP_EXT] = {
 148                 .type = IIO_TEMP,
 149                 .indexed = 1,
 150                 .channel = 1,
 151                 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
 152                 .address = AD7746_REG_VT_DATA_HIGH << 8 |
 153                         AD7746_VTSETUP_VTMD_EXT_TEMP,
 154         },
 155         [CIN1] = {
 156                 .type = IIO_CAPACITANCE,
 157                 .indexed = 1,
 158                 .channel = 0,
 159                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 160                 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
 161                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
 162                 BIT(IIO_CHAN_INFO_SCALE),
 163                 .address = AD7746_REG_CAP_DATA_HIGH << 8,
 164         },
 165         [CIN1_DIFF] = {
 166                 .type = IIO_CAPACITANCE,
 167                 .differential = 1,
 168                 .indexed = 1,
 169                 .channel = 0,
 170                 .channel2 = 2,
 171                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 172                 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
 173                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
 174                 BIT(IIO_CHAN_INFO_SCALE),
 175                 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
 176                         AD7746_CAPSETUP_CAPDIFF
 177         },
 178         [CIN2] = {
 179                 .type = IIO_CAPACITANCE,
 180                 .indexed = 1,
 181                 .channel = 1,
 182                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 183                 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
 184                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
 185                 BIT(IIO_CHAN_INFO_SCALE),
 186                 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
 187                         AD7746_CAPSETUP_CIN2,
 188         },
 189         [CIN2_DIFF] = {
 190                 .type = IIO_CAPACITANCE,
 191                 .differential = 1,
 192                 .indexed = 1,
 193                 .channel = 1,
 194                 .channel2 = 3,
 195                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 196                 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
 197                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
 198                 BIT(IIO_CHAN_INFO_SCALE),
 199                 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
 200                         AD7746_CAPSETUP_CAPDIFF | AD7746_CAPSETUP_CIN2,
 201         }
 202 };
 203
 204 /* Values are Update Rate (Hz), Conversion Time (ms) + 1*/
 205 static const unsigned char ad7746_vt_filter_rate_table[][2] = {
 206         {50, 20 + 1}, {31, 32 + 1}, {16, 62 + 1}, {8, 122 + 1},
 207 };
 208
 209 static const unsigned char ad7746_cap_filter_rate_table[][2] = {
 210         {91, 11 + 1}, {84, 12 + 1}, {50, 20 + 1}, {26, 38 + 1},
 211         {16, 62 + 1}, {13, 77 + 1}, {11, 92 + 1}, {9, 110 + 1},
 212 };
 213
 214 static int ad7746_select_channel(struct iio_dev *indio_dev,
 215                             struct iio_chan_spec const *chan)
 216 {
 217         struct ad7746_chip_info *chip = iio_priv(indio_dev);
 218         int ret, delay;
 219         u8 vt_setup, cap_setup;
 220
 221         switch (chan->type) {
 222         case IIO_CAPACITANCE:
 223                 cap_setup = (chan->address & 0xFF) | AD7746_CAPSETUP_CAPEN;
 224                 vt_setup = chip->vt_setup & ~AD7746_VTSETUP_VTEN;
 225                 delay = ad7746_cap_filter_rate_table[(chip->config >> 3) &
 226                         0x7][1];
 227
 228                 if (chip->capdac_set != chan->channel) {
 229                         ret = i2c_smbus_write_byte_data(chip->client,
 230                                 AD7746_REG_CAPDACA,
 231                                 chip->capdac[chan->channel][0]);
 232                         if (ret < 0)
 233                                 return ret;
 234                         ret = i2c_smbus_write_byte_data(chip->client,
 235                                 AD7746_REG_CAPDACB,
 236                                 chip->capdac[chan->channel][1]);
 237                         if (ret < 0)
 238                                 return ret;
 239
 240                         chip->capdac_set = chan->channel;
 241                 }
 242                 break;
 243         case IIO_VOLTAGE:
 244         case IIO_TEMP:
 245                 vt_setup = (chan->address & 0xFF) | AD7746_VTSETUP_VTEN;
 246                 cap_setup = chip->cap_setup & ~AD7746_CAPSETUP_CAPEN;
 247                 delay = ad7746_cap_filter_rate_table[(chip->config >> 6) &
 248                         0x3][1];
 249                 break;
 250         default:
 251                 return -EINVAL;
 252         }
 253
 254         if (chip->cap_setup != cap_setup) {
 255                 ret = i2c_smbus_write_byte_data(chip->client,
 256                                                 AD7746_REG_CAP_SETUP,
 257                                                 cap_setup);
 258                 if (ret < 0)
 259                         return ret;
 260
 261                 chip->cap_setup = cap_setup;
 262         }
 263
 264         if (chip->vt_setup != vt_setup) {
 265                 ret = i2c_smbus_write_byte_data(chip->client,
 266                                                 AD7746_REG_VT_SETUP,
 267                                                 vt_setup);
 268                 if (ret < 0)
 269                         return ret;
 270
 271                 chip->vt_setup = vt_setup;
 272         }
 273
 274         return delay;
 275 }
 276
 277 static inline ssize_t ad7746_start_calib(struct device *dev,
 278                                          struct device_attribute *attr,
 279                                          const char *buf,
 280                                          size_t len,
 281                                          u8 regval)
 282 {
 283         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 284         struct ad7746_chip_info *chip = iio_priv(indio_dev);
 285         bool doit;
 286         int ret, timeout = 10;
 287
 288         ret = strtobool(buf, &doit);
 289         if (ret < 0)
 290                 return ret;
 291
 292         if (!doit)
 293                 return 0;
 294
 295         mutex_lock(&indio_dev->mlock);
 296         regval |= chip->config;
 297         ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG, regval);
 298         if (ret < 0) {
 299                 mutex_unlock(&indio_dev->mlock);
 300                 return ret;
 301         }
 302
 303         do {
 304                 msleep(20);
 305                 ret = i2c_smbus_read_byte_data(chip->client, AD7746_REG_CFG);
 306                 if (ret < 0) {
 307                         mutex_unlock(&indio_dev->mlock);
 308                         return ret;
 309                 }
 310         } while ((ret == regval) && timeout--);
 311
 312         mutex_unlock(&indio_dev->mlock);
 313
 314         return len;
 315 }
 316
 317 static ssize_t ad7746_start_offset_calib(struct device *dev,
 318                                          struct device_attribute *attr,
 319                                          const char *buf,
 320                                          size_t len)
 321 {
 322         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 323         int ret = ad7746_select_channel(indio_dev,
 324                               &ad7746_channels[to_iio_dev_attr(attr)->address]);
 325         if (ret < 0)
 326                 return ret;
 327
 328         return ad7746_start_calib(dev, attr, buf, len,
 329                                   AD7746_CONF_MODE_OFFS_CAL);
 330 }
 331
 332 static ssize_t ad7746_start_gain_calib(struct device *dev,
 333                                        struct device_attribute *attr,
 334                                        const char *buf,
 335                                        size_t len)
 336 {
 337         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 338         int ret = ad7746_select_channel(indio_dev,
 339                               &ad7746_channels[to_iio_dev_attr(attr)->address]);
 340         if (ret < 0)
 341                 return ret;
 342
 343         return ad7746_start_calib(dev, attr, buf, len,
 344                                   AD7746_CONF_MODE_GAIN_CAL);
 345 }
 346
 347 static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration,
 348                        S_IWUSR, NULL, ad7746_start_offset_calib, CIN1);
 349 static IIO_DEVICE_ATTR(in_capacitance1_calibbias_calibration,
 350                        S_IWUSR, NULL, ad7746_start_offset_calib, CIN2);
 351 static IIO_DEVICE_ATTR(in_capacitance0_calibscale_calibration,
 352                        S_IWUSR, NULL, ad7746_start_gain_calib, CIN1);
 353 static IIO_DEVICE_ATTR(in_capacitance1_calibscale_calibration,
 354                        S_IWUSR, NULL, ad7746_start_gain_calib, CIN2);
 355 static IIO_DEVICE_ATTR(in_voltage0_calibscale_calibration,
 356                        S_IWUSR, NULL, ad7746_start_gain_calib, VIN);
 357
 358 static ssize_t ad7746_show_cap_filter_rate_setup(struct device *dev,
 359                 struct device_attribute *attr,
 360                 char *buf)
 361 {
 362         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 363         struct ad7746_chip_info *chip = iio_priv(indio_dev);
 364
 365         return sprintf(buf, "%d\n", ad7746_cap_filter_rate_table[
 366                         (chip->config >> 3) & 0x7][0]);
 367 }
 368
 369 static ssize_t ad7746_store_cap_filter_rate_setup(struct device *dev,
 370                 struct device_attribute *attr,
 371                 const char *buf,
 372                 size_t len)
 373 {
 374         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 375         struct ad7746_chip_info *chip = iio_priv(indio_dev);
 376         u8 data;
 377         int ret, i;
 378
 379         ret = kstrtou8(buf, 10, &data);
 380         if (ret < 0)
 381                 return ret;
 382
 383         for (i = 0; i < ARRAY_SIZE(ad7746_cap_filter_rate_table); i++)
 384                 if (data >= ad7746_cap_filter_rate_table[i][0])
 385                         break;
 386
 387         if (i >= ARRAY_SIZE(ad7746_cap_filter_rate_table))
 388                 i = ARRAY_SIZE(ad7746_cap_filter_rate_table) - 1;
 389
 390         mutex_lock(&indio_dev->mlock);
 391         chip->config &= ~AD7746_CONF_CAPFS(0x7);
 392         chip->config |= AD7746_CONF_CAPFS(i);
 393         mutex_unlock(&indio_dev->mlock);
 394
 395         return len;
 396 }
 397
 398 static ssize_t ad7746_show_vt_filter_rate_setup(struct device *dev,
 399                 struct device_attribute *attr,
 400                 char *buf)
 401 {
 402         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 403         struct ad7746_chip_info *chip = iio_priv(indio_dev);
 404
 405         return sprintf(buf, "%d\n", ad7746_vt_filter_rate_table[
 406                         (chip->config >> 6) & 0x3][0]);
 407 }
 408
 409 static ssize_t ad7746_store_vt_filter_rate_setup(struct device *dev,
 410                 struct device_attribute *attr,
 411                 const char *buf,
 412                 size_t len)
 413 {
 414         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 415         struct ad7746_chip_info *chip = iio_priv(indio_dev);
 416         u8 data;
 417         int ret, i;
 418
 419         ret = kstrtou8(buf, 10, &data);
 420         if (ret < 0)
 421                 return ret;
 422
 423         for (i = 0; i < ARRAY_SIZE(ad7746_vt_filter_rate_table); i++)
 424                 if (data >= ad7746_vt_filter_rate_table[i][0])
 425                         break;
 426
 427         if (i >= ARRAY_SIZE(ad7746_vt_filter_rate_table))
 428                 i = ARRAY_SIZE(ad7746_vt_filter_rate_table) - 1;
 429
 430         mutex_lock(&indio_dev->mlock);
 431         chip->config &= ~AD7746_CONF_VTFS(0x3);
 432         chip->config |= AD7746_CONF_VTFS(i);
 433         mutex_unlock(&indio_dev->mlock);
 434
 435         return len;
 436 }
 437
 438 static IIO_DEVICE_ATTR(in_capacitance_sampling_frequency,
 439                        S_IRUGO | S_IWUSR, ad7746_show_cap_filter_rate_setup,
 440                         ad7746_store_cap_filter_rate_setup, 0);
 441
 442 static IIO_DEVICE_ATTR(in_voltage_sampling_frequency,
 443                        S_IRUGO | S_IWUSR, ad7746_show_vt_filter_rate_setup,
 444                        ad7746_store_vt_filter_rate_setup, 0);
 445
 446 static IIO_CONST_ATTR(in_voltage_sampling_frequency_available, "50 31 16 8");
 447 static IIO_CONST_ATTR(in_capacitance_sampling_frequency_available,
 448                        "91 84 50 26 16 13 11 9");
 449
 450 static struct attribute *ad7746_attributes[] = {
 451         &iio_dev_attr_in_capacitance_sampling_frequency.dev_attr.attr,
 452         &iio_dev_attr_in_voltage_sampling_frequency.dev_attr.attr,
 453         &iio_dev_attr_in_capacitance0_calibbias_calibration.dev_attr.attr,
 454         &iio_dev_attr_in_capacitance0_calibscale_calibration.dev_attr.attr,
 455         &iio_dev_attr_in_capacitance1_calibscale_calibration.dev_attr.attr,
 456         &iio_dev_attr_in_capacitance1_calibbias_calibration.dev_attr.attr,
 457         &iio_dev_attr_in_voltage0_calibscale_calibration.dev_attr.attr,
 458         &iio_const_attr_in_voltage_sampling_frequency_available.dev_attr.attr,
 459         &iio_const_attr_in_capacitance_sampling_frequency_available.
 460         dev_attr.attr,
 461         NULL,
 462 };
 463
 464 static const struct attribute_group ad7746_attribute_group = {
 465         .attrs = ad7746_attributes,
 466 };
 467
 468 static int ad7746_write_raw(struct iio_dev *indio_dev,
 469                             struct iio_chan_spec const *chan,
 470                             int val,
 471                             int val2,
 472                             long mask)
 473 {
 474         struct ad7746_chip_info *chip = iio_priv(indio_dev);
 475         int ret, reg;
 476
 477         mutex_lock(&indio_dev->mlock);
 478
 479         switch (mask) {
 480         case IIO_CHAN_INFO_CALIBSCALE:
 481                 if (val != 1) {
 482                         ret = -EINVAL;
 483                         goto out;
 484                 }
 485
 486                 val = (val2 * 1024) / 15625;
 487
 488                 switch (chan->type) {
 489                 case IIO_CAPACITANCE:
 490                         reg = AD7746_REG_CAP_GAINH;
 491                         break;
 492                 case IIO_VOLTAGE:
 493                         reg = AD7746_REG_VOLT_GAINH;
 494                         break;
 495                 default:
 496                         ret = -EINVAL;
 497                         goto out;
 498                 }
 499
 500                 ret = i2c_smbus_write_word_data(chip->client, reg, swab16(val));
 501                 if (ret < 0)
 502                         goto out;
 503
 504                 ret = 0;
 505                 break;
 506         case IIO_CHAN_INFO_CALIBBIAS:
 507                 if ((val < 0) | (val > 0xFFFF)) {
 508                         ret = -EINVAL;
 509                         goto out;
 510                 }
 511                 ret = i2c_smbus_write_word_data(chip->client,
 512                                 AD7746_REG_CAP_OFFH, swab16(val));
 513                 if (ret < 0)
 514                         goto out;
 515
 516                 ret = 0;
 517                 break;
 518         case IIO_CHAN_INFO_OFFSET:
 519                 if ((val < 0) | (val > 43008000)) { /* 21pF */
 520                         ret = -EINVAL;
 521                         goto out;
 522                 }
 523
 524                 /*
 525                  * CAPDAC Scale = 21pF_typ / 127
 526                  * CIN Scale = 8.192pF / 2^24
 527                  * Offset Scale = CAPDAC Scale / CIN Scale = 338646
 528                  */
 529
 530                 val /= 338646;
 531
 532                 chip->capdac[chan->channel][chan->differential] = (val > 0 ?
 533                         AD7746_CAPDAC_DACP(val) | AD7746_CAPDAC_DACEN : 0);
 534
 535                 ret = i2c_smbus_write_byte_data(chip->client,
 536                         AD7746_REG_CAPDACA,
 537                         chip->capdac[chan->channel][0]);
 538                 if (ret < 0)
 539                         goto out;
 540                 ret = i2c_smbus_write_byte_data(chip->client,
 541                         AD7746_REG_CAPDACB,
 542                         chip->capdac[chan->channel][1]);
 543                 if (ret < 0)
 544                         goto out;
 545
 546                 chip->capdac_set = chan->channel;
 547
 548                 ret = 0;
 549                 break;
 550         default:
 551                 ret = -EINVAL;
 552         }
 553
 554 out:
 555         mutex_unlock(&indio_dev->mlock);
 556         return ret;
 557 }
 558
 559 static int ad7746_read_raw(struct iio_dev *indio_dev,
 560                            struct iio_chan_spec const *chan,
 561                            int *val, int *val2,
 562                            long mask)
 563 {
 564         struct ad7746_chip_info *chip = iio_priv(indio_dev);
 565         int ret, delay;
 566         u8 regval, reg;
 567
 568         mutex_lock(&indio_dev->mlock);
 569
 570         switch (mask) {
 571         case IIO_CHAN_INFO_RAW:
 572         case IIO_CHAN_INFO_PROCESSED:
 573                 ret = ad7746_select_channel(indio_dev, chan);
 574                 if (ret < 0)
 575                         goto out;
 576                 delay = ret;
 577
 578                 regval = chip->config | AD7746_CONF_MODE_SINGLE_CONV;
 579                 ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG,
 580                                 regval);
 581                 if (ret < 0)
 582                         goto out;
 583
 584                 msleep(delay);
 585                 /* Now read the actual register */
 586
 587                 ret = i2c_smbus_read_i2c_block_data(chip->client,
 588                         chan->address >> 8, 3, &chip->data.d8[1]);
 589
 590                 if (ret < 0)
 591                         goto out;
 592
 593                 *val = (be32_to_cpu(chip->data.d32) & 0xFFFFFF) - 0x800000;
 594
 595                 switch (chan->type) {
 596                 case IIO_TEMP:
 597                 /*
 598                  * temperature in milli degrees Celsius
 599                  * T = ((*val / 2048) - 4096) * 1000
 600                  */
 601                         *val = (*val * 125) / 256;
 602                         break;
 603                 case IIO_VOLTAGE:
 604                         if (chan->channel == 1) /* supply_raw*/
 605                                 *val = *val * 6;
 606                         break;
 607                 default:
 608                         break;
 609                 }
 610
 611                 ret = IIO_VAL_INT;
 612                 break;
 613         case IIO_CHAN_INFO_CALIBSCALE:
 614                 switch (chan->type) {
 615                 case IIO_CAPACITANCE:
 616                         reg = AD7746_REG_CAP_GAINH;
 617                         break;
 618                 case IIO_VOLTAGE:
 619                         reg = AD7746_REG_VOLT_GAINH;
 620                         break;
 621                 default:
 622                         ret = -EINVAL;
 623                         goto out;
 624                 }
 625
 626                 ret = i2c_smbus_read_word_data(chip->client, reg);
 627                 if (ret < 0)
 628                         goto out;
 629                 /* 1 + gain_val / 2^16 */
 630                 *val = 1;
 631                 *val2 = (15625 * swab16(ret)) / 1024;
 632
 633                 ret = IIO_VAL_INT_PLUS_MICRO;
 634                 break;
 635         case IIO_CHAN_INFO_CALIBBIAS:
 636                 ret = i2c_smbus_read_word_data(chip->client,
 637                                                AD7746_REG_CAP_OFFH);
 638                 if (ret < 0)
 639                         goto out;
 640                 *val = swab16(ret);
 641
 642                 ret = IIO_VAL_INT;
 643                 break;
 644         case IIO_CHAN_INFO_OFFSET:
 645                 *val = AD7746_CAPDAC_DACP(chip->capdac[chan->channel]
 646                         [chan->differential]) * 338646;
 647
 648                 ret = IIO_VAL_INT;
 649                 break;
 650         case IIO_CHAN_INFO_SCALE:
 651                 switch (chan->type) {
 652                 case IIO_CAPACITANCE:
 653                         /* 8.192pf / 2^24 */
 654                         *val =  0;
 655                         *val2 = 488;
 656                         ret = IIO_VAL_INT_PLUS_NANO;
 657                         break;
 658                 case IIO_VOLTAGE:
 659                         /* 1170mV / 2^23 */
 660                         *val = 1170;
 661                         *val2 = 23;
 662                         ret = IIO_VAL_FRACTIONAL_LOG2;
 663                         break;
 664                 default:
 665                         ret = -EINVAL;
 666                         break;
 667                 }
 668
 669                 break;
 670         default:
 671                 ret = -EINVAL;
 672         }
 673 out:
 674         mutex_unlock(&indio_dev->mlock);
 675         return ret;
 676 }
 677
 678 static const struct iio_info ad7746_info = {
 679         .attrs = &ad7746_attribute_group,
 680         .read_raw = &ad7746_read_raw,
 681         .write_raw = &ad7746_write_raw,
 682         .driver_module = THIS_MODULE,
 683 };
 684
 685 /*
 686  * device probe and remove
 687  */
 688
 689 static int ad7746_probe(struct i2c_client *client,
 690                 const struct i2c_device_id *id)
 691 {
 692         struct ad7746_platform_data *pdata = client->dev.platform_data;
 693         struct ad7746_chip_info *chip;
 694         struct iio_dev *indio_dev;
 695         int ret = 0;
 696         unsigned char regval = 0;
 697
 698         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
 699         if (!indio_dev)
 700                 return -ENOMEM;
 701         chip = iio_priv(indio_dev);
 702         /* this is only used for device removal purposes */
 703         i2c_set_clientdata(client, indio_dev);
 704
 705         chip->client = client;
 706         chip->capdac_set = -1;
 707
 708         /* Establish that the iio_dev is a child of the i2c device */
 709         indio_dev->name = id->name;
 710         indio_dev->dev.parent = &client->dev;
 711         indio_dev->info = &ad7746_info;
 712         indio_dev->channels = ad7746_channels;
 713         if (id->driver_data == 7746)
 714                 indio_dev->num_channels = ARRAY_SIZE(ad7746_channels);
 715         else
 716                 indio_dev->num_channels =  ARRAY_SIZE(ad7746_channels) - 2;
 717         indio_dev->num_channels = ARRAY_SIZE(ad7746_channels);
 718         indio_dev->modes = INDIO_DIRECT_MODE;
 719
 720         if (pdata) {
 721                 if (pdata->exca_en) {
 722                         if (pdata->exca_inv_en)
 723                                 regval |= AD7746_EXCSETUP_NEXCA;
 724                         else
 725                                 regval |= AD7746_EXCSETUP_EXCA;
 726                 }
 727
 728                 if (pdata->excb_en) {
 729                         if (pdata->excb_inv_en)
 730                                 regval |= AD7746_EXCSETUP_NEXCB;
 731                         else
 732                                 regval |= AD7746_EXCSETUP_EXCB;
 733                 }
 734
 735                 regval |= AD7746_EXCSETUP_EXCLVL(pdata->exclvl);
 736         } else {
 737                 dev_warn(&client->dev, "No platform data? using default\n");
 738                 regval = AD7746_EXCSETUP_EXCA | AD7746_EXCSETUP_EXCB |
 739                         AD7746_EXCSETUP_EXCLVL(3);
 740         }
 741
 742         ret = i2c_smbus_write_byte_data(chip->client,
 743                                         AD7746_REG_EXC_SETUP, regval);
 744         if (ret < 0)
 745                 return ret;
 746
 747         ret = devm_iio_device_register(indio_dev->dev.parent, indio_dev);
 748         if (ret)
 749                 return ret;
 750
 751         return 0;
 752 }
 753
 754 static const struct i2c_device_id ad7746_id[] = {
 755         { "ad7745", 7745 },
 756         { "ad7746", 7746 },
 757         { "ad7747", 7747 },
 758         {}
 759 };
 760
 761 MODULE_DEVICE_TABLE(i2c, ad7746_id);
 762
 763 static struct i2c_driver ad7746_driver = {
 764         .driver = {
 765                 .name = KBUILD_MODNAME,
 766         },
 767         .probe = ad7746_probe,
 768         .id_table = ad7746_id,
 769 };
 770 module_i2c_driver(ad7746_driver);
 771
 772 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
 773 MODULE_DESCRIPTION("Analog Devices AD7746/5/7 capacitive sensor driver");
 774 MODULE_LICENSE("GPL v2");