Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / drivers / staging / goldfish / goldfish_nand_reg.h
1 /*
2  * drivers/mtd/devices/goldfish_nand_reg.h
3  *
4  * Copyright (C) 2007 Google, Inc.
5  *
6  * This software is licensed under the terms of the GNU General Public
7  * License version 2, as published by the Free Software Foundation, and
8  * may be copied, distributed, and modified under those terms.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  */
16
17 #ifndef GOLDFISH_NAND_REG_H
18 #define GOLDFISH_NAND_REG_H
19
20 enum nand_cmd {
21         /* Write device name for NAND_DEV to NAND_DATA (vaddr) */
22         NAND_CMD_GET_DEV_NAME,
23         NAND_CMD_READ,
24         NAND_CMD_WRITE,
25         NAND_CMD_ERASE,
26         /* NAND_RESULT is 1 if block is bad, 0 if it is not */
27         NAND_CMD_BLOCK_BAD_GET,
28         NAND_CMD_BLOCK_BAD_SET,
29         NAND_CMD_READ_WITH_PARAMS,
30         NAND_CMD_WRITE_WITH_PARAMS,
31         NAND_CMD_ERASE_WITH_PARAMS
32 };
33
34 enum nand_dev_flags {
35         NAND_DEV_FLAG_READ_ONLY = 0x00000001,
36         NAND_DEV_FLAG_CMD_PARAMS_CAP = 0x00000002,
37 };
38
39 #define NAND_VERSION_CURRENT (1)
40
41 enum nand_reg {
42         /* Global */
43         NAND_VERSION        = 0x000,
44         NAND_NUM_DEV        = 0x004,
45         NAND_DEV            = 0x008,
46
47         /* Dev info */
48         NAND_DEV_FLAGS      = 0x010,
49         NAND_DEV_NAME_LEN   = 0x014,
50         NAND_DEV_PAGE_SIZE  = 0x018,
51         NAND_DEV_EXTRA_SIZE = 0x01c,
52         NAND_DEV_ERASE_SIZE = 0x020,
53         NAND_DEV_SIZE_LOW   = 0x028,
54         NAND_DEV_SIZE_HIGH  = 0x02c,
55
56         /* Command */
57         NAND_RESULT         = 0x040,
58         NAND_COMMAND        = 0x044,
59         NAND_DATA           = 0x048,
60         NAND_DATA_HIGH      = 0x100,
61         NAND_TRANSFER_SIZE  = 0x04c,
62         NAND_ADDR_LOW       = 0x050,
63         NAND_ADDR_HIGH      = 0x054,
64         NAND_CMD_PARAMS_ADDR_LOW = 0x058,
65         NAND_CMD_PARAMS_ADDR_HIGH = 0x05c,
66 };
67
68 struct cmd_params {
69         uint32_t dev;
70         uint32_t addr_low;
71         uint32_t addr_high;
72         uint32_t transfer_size;
73         unsigned long data;
74         uint32_t result;
75 };
76 #endif