2 * FB driver for the SSD1289 LCD Controller
4 * Copyright (C) 2013 Noralf Tronnes
6 * Init sequence taken from ITDB02_Graph16.cpp - (C)2010-2011 Henning Karlsen
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/init.h>
26 #include <linux/gpio.h>
30 #define DRVNAME "fb_ssd1289"
33 #define DEFAULT_GAMMA "02 03 2 5 7 7 4 2 4 2\n" \
34 "02 03 2 5 7 5 4 2 4 2"
36 static unsigned reg11 = 0x6040;
37 module_param(reg11, uint, 0);
38 MODULE_PARM_DESC(reg11, "Register 11h value");
41 static int init_display(struct fbtft_par *par)
43 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
45 par->fbtftops.reset(par);
47 if (par->gpio.cs != -1)
48 gpio_set_value(par->gpio.cs, 0); /* Activate chip */
50 write_reg(par, 0x00, 0x0001);
51 write_reg(par, 0x03, 0xA8A4);
52 write_reg(par, 0x0C, 0x0000);
53 write_reg(par, 0x0D, 0x080C);
54 write_reg(par, 0x0E, 0x2B00);
55 write_reg(par, 0x1E, 0x00B7);
57 (1 << 13) | (par->bgr << 11) | (1 << 9) | (HEIGHT - 1));
58 write_reg(par, 0x02, 0x0600);
59 write_reg(par, 0x10, 0x0000);
60 write_reg(par, 0x05, 0x0000);
61 write_reg(par, 0x06, 0x0000);
62 write_reg(par, 0x16, 0xEF1C);
63 write_reg(par, 0x17, 0x0003);
64 write_reg(par, 0x07, 0x0233);
65 write_reg(par, 0x0B, 0x0000);
66 write_reg(par, 0x0F, 0x0000);
67 write_reg(par, 0x41, 0x0000);
68 write_reg(par, 0x42, 0x0000);
69 write_reg(par, 0x48, 0x0000);
70 write_reg(par, 0x49, 0x013F);
71 write_reg(par, 0x4A, 0x0000);
72 write_reg(par, 0x4B, 0x0000);
73 write_reg(par, 0x44, 0xEF00);
74 write_reg(par, 0x45, 0x0000);
75 write_reg(par, 0x46, 0x013F);
76 write_reg(par, 0x23, 0x0000);
77 write_reg(par, 0x24, 0x0000);
78 write_reg(par, 0x25, 0x8000);
79 write_reg(par, 0x4f, 0x0000);
80 write_reg(par, 0x4e, 0x0000);
85 static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
87 fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par,
88 "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye);
90 switch (par->info->var.rotate) {
91 /* R4Eh - Set GDDRAM X address counter */
92 /* R4Fh - Set GDDRAM Y address counter */
94 write_reg(par, 0x4e, xs);
95 write_reg(par, 0x4f, ys);
98 write_reg(par, 0x4e, par->info->var.xres - 1 - xs);
99 write_reg(par, 0x4f, par->info->var.yres - 1 - ys);
102 write_reg(par, 0x4e, par->info->var.yres - 1 - ys);
103 write_reg(par, 0x4f, xs);
106 write_reg(par, 0x4e, ys);
107 write_reg(par, 0x4f, par->info->var.xres - 1 - xs);
111 /* R22h - RAM data write */
112 write_reg(par, 0x22);
115 static int set_var(struct fbtft_par *par)
117 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
119 if (par->fbtftops.init_display != init_display) {
120 /* don't risk messing up register 11h */
121 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par,
122 "%s: skipping since custom init_display() is used\n",
127 switch (par->info->var.rotate) {
129 write_reg(par, 0x11, reg11 | 0x30);
132 write_reg(par, 0x11, reg11 | 0x28);
135 write_reg(par, 0x11, reg11 | 0x00);
138 write_reg(par, 0x11, reg11 | 0x18);
147 VRP0 VRP1 PRP0 PRP1 PKP0 PKP1 PKP2 PKP3 PKP4 PKP5
148 VRN0 VRN1 PRN0 PRN1 PKN0 PKN1 PKN2 PKN3 PKN4 PKN5
150 #define CURVE(num, idx) curves[num*par->gamma.num_values + idx]
151 static int set_gamma(struct fbtft_par *par, unsigned long *curves)
153 unsigned long mask[] = {
154 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
155 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
159 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
162 for (i = 0; i < 2; i++)
163 for (j = 0; j < 10; j++)
164 CURVE(i, j) &= mask[i*par->gamma.num_values + j];
166 write_reg(par, 0x0030, CURVE(0, 5) << 8 | CURVE(0, 4));
167 write_reg(par, 0x0031, CURVE(0, 7) << 8 | CURVE(0, 6));
168 write_reg(par, 0x0032, CURVE(0, 9) << 8 | CURVE(0, 8));
169 write_reg(par, 0x0033, CURVE(0, 3) << 8 | CURVE(0, 2));
170 write_reg(par, 0x0034, CURVE(1, 5) << 8 | CURVE(1, 4));
171 write_reg(par, 0x0035, CURVE(1, 7) << 8 | CURVE(1, 6));
172 write_reg(par, 0x0036, CURVE(1, 9) << 8 | CURVE(1, 8));
173 write_reg(par, 0x0037, CURVE(1, 3) << 8 | CURVE(1, 2));
174 write_reg(par, 0x003A, CURVE(0, 1) << 8 | CURVE(0, 0));
175 write_reg(par, 0x003B, CURVE(1, 1) << 8 | CURVE(1, 0));
182 static struct fbtft_display display = {
188 .gamma = DEFAULT_GAMMA,
190 .init_display = init_display,
191 .set_addr_win = set_addr_win,
193 .set_gamma = set_gamma,
196 FBTFT_REGISTER_DRIVER(DRVNAME, "solomon,ssd1289", &display);
198 MODULE_ALIAS("spi:" DRVNAME);
199 MODULE_ALIAS("platform:" DRVNAME);
200 MODULE_ALIAS("spi:ssd1289");
201 MODULE_ALIAS("platform:ssd1289");
203 MODULE_DESCRIPTION("FB driver for the SSD1289 LCD Controller");
204 MODULE_AUTHOR("Noralf Tronnes");
205 MODULE_LICENSE("GPL");