3 comedi/drivers/adl_pci9111.c
5 Hardware driver for PCI9111 ADLink cards:
9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
24 Description: Adlink PCI-9111HR
25 Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
26 Devices: [ADLink] PCI-9111HR (adl_pci9111)
35 - ai_do_cmd mode with the following sources:
38 - scan_begin_src TRIG_FOLLOW TRIG_TIMER TRIG_EXT
39 - convert_src TRIG_TIMER TRIG_EXT
40 - scan_end_src TRIG_COUNT
41 - stop_src TRIG_COUNT TRIG_NONE
43 The scanned channels must be consecutive and start from 0. They must
44 all have the same range and aref.
46 Configuration options: not applicable, uses PCI auto config
52 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
53 a multiple of chanlist_len*convert_arg.
54 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
55 2002/02/18 Added external trigger support for analog input.
59 - Really test implemented functionality.
60 - Add support for the PCI-9111DG with a probe routine to identify
61 the card type (perhaps with the help of the channel number readback
62 of the A/D Data register).
63 - Add external multiplexer support.
67 #include <linux/module.h>
68 #include <linux/delay.h>
69 #include <linux/interrupt.h>
71 #include "../comedi_pci.h"
74 #include "comedi_8254.h"
76 #define PCI9111_FIFO_HALF_SIZE 512
78 #define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS 10000
80 #define PCI9111_RANGE_SETTING_DELAY 10
81 #define PCI9111_AI_INSTANT_READ_UDELAY_US 2
84 * IO address map and bit defines
86 #define PCI9111_AI_FIFO_REG 0x00
87 #define PCI9111_AO_REG 0x00
88 #define PCI9111_DIO_REG 0x02
89 #define PCI9111_EDIO_REG 0x04
90 #define PCI9111_AI_CHANNEL_REG 0x06
91 #define PCI9111_AI_RANGE_STAT_REG 0x08
92 #define PCI9111_AI_STAT_AD_BUSY (1 << 7)
93 #define PCI9111_AI_STAT_FF_FF (1 << 6)
94 #define PCI9111_AI_STAT_FF_HF (1 << 5)
95 #define PCI9111_AI_STAT_FF_EF (1 << 4)
96 #define PCI9111_AI_RANGE_MASK (7 << 0)
97 #define PCI9111_AI_TRIG_CTRL_REG 0x0a
98 #define PCI9111_AI_TRIG_CTRL_TRGEVENT (1 << 5)
99 #define PCI9111_AI_TRIG_CTRL_POTRG (1 << 4)
100 #define PCI9111_AI_TRIG_CTRL_PTRG (1 << 3)
101 #define PCI9111_AI_TRIG_CTRL_ETIS (1 << 2)
102 #define PCI9111_AI_TRIG_CTRL_TPST (1 << 1)
103 #define PCI9111_AI_TRIG_CTRL_ASCAN (1 << 0)
104 #define PCI9111_INT_CTRL_REG 0x0c
105 #define PCI9111_INT_CTRL_ISC2 (1 << 3)
106 #define PCI9111_INT_CTRL_FFEN (1 << 2)
107 #define PCI9111_INT_CTRL_ISC1 (1 << 1)
108 #define PCI9111_INT_CTRL_ISC0 (1 << 0)
109 #define PCI9111_SOFT_TRIG_REG 0x0e
110 #define PCI9111_8254_BASE_REG 0x40
111 #define PCI9111_INT_CLR_REG 0x48
113 /* PLX 9052 Local Interrupt 1 enabled and active */
114 #define PCI9111_LI1_ACTIVE (PLX9052_INTCSR_LI1ENAB | \
115 PLX9052_INTCSR_LI1STAT)
117 /* PLX 9052 Local Interrupt 2 enabled and active */
118 #define PCI9111_LI2_ACTIVE (PLX9052_INTCSR_LI2ENAB | \
119 PLX9052_INTCSR_LI2STAT)
121 static const struct comedi_lrange pci9111_ai_range = {
131 struct pci9111_private_data {
132 unsigned long lcr_io_base;
134 unsigned int scan_delay;
135 unsigned int chunk_counter;
136 unsigned int chunk_num_samples;
138 unsigned short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
141 static void plx9050_interrupt_control(unsigned long io_base,
143 bool LINTi1_active_high,
145 bool LINTi2_active_high,
146 bool interrupt_enable)
151 flags |= PLX9052_INTCSR_LI1ENAB;
152 if (LINTi1_active_high)
153 flags |= PLX9052_INTCSR_LI1POL;
155 flags |= PLX9052_INTCSR_LI2ENAB;
156 if (LINTi2_active_high)
157 flags |= PLX9052_INTCSR_LI2POL;
159 if (interrupt_enable)
160 flags |= PLX9052_INTCSR_PCIENAB;
162 outb(flags, io_base + PLX9052_INTCSR);
165 enum pci9111_ISC0_sources {
167 irq_on_fifo_half_full
170 enum pci9111_ISC1_sources {
172 irq_on_external_trigger
175 static void pci9111_interrupt_source_set(struct comedi_device *dev,
176 enum pci9111_ISC0_sources irq_0_source,
177 enum pci9111_ISC1_sources irq_1_source)
181 /* Read the current interrupt control bits */
182 flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
183 /* Shift the bits so they are compatible with the write register */
185 /* Mask off the ISCx bits */
188 /* Now set the new ISCx bits */
189 if (irq_0_source == irq_on_fifo_half_full)
190 flags |= PCI9111_INT_CTRL_ISC0;
192 if (irq_1_source == irq_on_external_trigger)
193 flags |= PCI9111_INT_CTRL_ISC1;
195 outb(flags, dev->iobase + PCI9111_INT_CTRL_REG);
198 static void pci9111_fifo_reset(struct comedi_device *dev)
200 unsigned long int_ctrl_reg = dev->iobase + PCI9111_INT_CTRL_REG;
202 /* To reset the FIFO, set FFEN sequence as 0 -> 1 -> 0 */
203 outb(0, int_ctrl_reg);
204 outb(PCI9111_INT_CTRL_FFEN, int_ctrl_reg);
205 outb(0, int_ctrl_reg);
208 static int pci9111_ai_cancel(struct comedi_device *dev,
209 struct comedi_subdevice *s)
211 struct pci9111_private_data *dev_private = dev->private;
213 /* Disable interrupts */
214 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
217 /* disable A/D triggers (software trigger mode) and auto scan off */
218 outb(0, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
220 pci9111_fifo_reset(dev);
225 static int pci9111_ai_check_chanlist(struct comedi_device *dev,
226 struct comedi_subdevice *s,
227 struct comedi_cmd *cmd)
229 unsigned int range0 = CR_RANGE(cmd->chanlist[0]);
230 unsigned int aref0 = CR_AREF(cmd->chanlist[0]);
233 for (i = 1; i < cmd->chanlist_len; i++) {
234 unsigned int chan = CR_CHAN(cmd->chanlist[i]);
235 unsigned int range = CR_RANGE(cmd->chanlist[i]);
236 unsigned int aref = CR_AREF(cmd->chanlist[i]);
239 dev_dbg(dev->class_dev,
240 "entries in chanlist must be consecutive channels,counting upwards from 0\n");
244 if (range != range0) {
245 dev_dbg(dev->class_dev,
246 "entries in chanlist must all have the same gain\n");
251 dev_dbg(dev->class_dev,
252 "entries in chanlist must all have the same reference\n");
260 static int pci9111_ai_do_cmd_test(struct comedi_device *dev,
261 struct comedi_subdevice *s,
262 struct comedi_cmd *cmd)
267 /* Step 1 : check if triggers are trivially valid */
269 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
270 err |= comedi_check_trigger_src(&cmd->scan_begin_src,
271 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
272 err |= comedi_check_trigger_src(&cmd->convert_src,
273 TRIG_TIMER | TRIG_EXT);
274 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
275 err |= comedi_check_trigger_src(&cmd->stop_src,
276 TRIG_COUNT | TRIG_NONE);
281 /* Step 2a : make sure trigger sources are unique */
283 err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
284 err |= comedi_check_trigger_is_unique(cmd->convert_src);
285 err |= comedi_check_trigger_is_unique(cmd->stop_src);
287 /* Step 2b : and mutually compatible */
289 if (cmd->scan_begin_src != TRIG_FOLLOW) {
290 if (cmd->scan_begin_src != cmd->convert_src)
297 /* Step 3: check if arguments are trivially valid */
299 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
301 if (cmd->convert_src == TRIG_TIMER) {
302 err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
303 PCI9111_AI_ACQUISITION_PERIOD_MIN_NS);
304 } else { /* TRIG_EXT */
305 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
308 if (cmd->scan_begin_src == TRIG_TIMER) {
309 err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg,
310 PCI9111_AI_ACQUISITION_PERIOD_MIN_NS);
311 } else { /* TRIG_FOLLOW || TRIG_EXT */
312 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
315 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
318 if (cmd->stop_src == TRIG_COUNT)
319 err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
321 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
326 /* Step 4: fix up any arguments */
328 if (cmd->convert_src == TRIG_TIMER) {
329 arg = cmd->convert_arg;
330 comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
331 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
335 * There's only one timer on this card, so the scan_begin timer
336 * must be a multiple of chanlist_len*convert_arg
338 if (cmd->scan_begin_src == TRIG_TIMER) {
339 arg = cmd->chanlist_len * cmd->convert_arg;
341 if (arg < cmd->scan_begin_arg)
342 arg *= (cmd->scan_begin_arg / arg);
344 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
350 /* Step 5: check channel list if it exists */
351 if (cmd->chanlist && cmd->chanlist_len > 0)
352 err |= pci9111_ai_check_chanlist(dev, s, cmd);
360 static int pci9111_ai_do_cmd(struct comedi_device *dev,
361 struct comedi_subdevice *s)
363 struct pci9111_private_data *dev_private = dev->private;
364 struct comedi_cmd *cmd = &s->async->cmd;
365 unsigned int last_chan = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
366 unsigned int trig = 0;
368 /* Set channel scan limit */
369 /* PCI9111 allows only scanning from channel 0 to channel n */
370 /* TODO: handle the case of an external multiplexer */
372 if (cmd->chanlist_len > 1)
373 trig |= PCI9111_AI_TRIG_CTRL_ASCAN;
375 outb(last_chan, dev->iobase + PCI9111_AI_CHANNEL_REG);
378 /* This is the same gain on every channel */
380 outb(CR_RANGE(cmd->chanlist[0]) & PCI9111_AI_RANGE_MASK,
381 dev->iobase + PCI9111_AI_RANGE_STAT_REG);
383 /* Set timer pacer */
384 dev_private->scan_delay = 0;
385 if (cmd->convert_src == TRIG_TIMER) {
386 trig |= PCI9111_AI_TRIG_CTRL_TPST;
387 comedi_8254_update_divisors(dev->pacer);
388 comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
389 pci9111_fifo_reset(dev);
390 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
392 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
395 if (cmd->scan_begin_src == TRIG_TIMER) {
396 dev_private->scan_delay = (cmd->scan_begin_arg /
397 (cmd->convert_arg * cmd->chanlist_len)) - 1;
399 } else { /* TRIG_EXT */
400 trig |= PCI9111_AI_TRIG_CTRL_ETIS;
401 pci9111_fifo_reset(dev);
402 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
404 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
407 outb(trig, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
409 dev_private->chunk_counter = 0;
410 dev_private->chunk_num_samples = cmd->chanlist_len *
411 (1 + dev_private->scan_delay);
416 static void pci9111_ai_munge(struct comedi_device *dev,
417 struct comedi_subdevice *s, void *data,
418 unsigned int num_bytes,
419 unsigned int start_chan_index)
421 unsigned short *array = data;
422 unsigned int maxdata = s->maxdata;
423 unsigned int invert = (maxdata + 1) >> 1;
424 unsigned int shift = (maxdata == 0xffff) ? 0 : 4;
425 unsigned int num_samples = comedi_bytes_to_samples(s, num_bytes);
428 for (i = 0; i < num_samples; i++)
429 array[i] = ((array[i] >> shift) & maxdata) ^ invert;
432 static void pci9111_handle_fifo_half_full(struct comedi_device *dev,
433 struct comedi_subdevice *s)
435 struct pci9111_private_data *devpriv = dev->private;
436 struct comedi_cmd *cmd = &s->async->cmd;
437 unsigned int samples;
439 samples = comedi_nsamples_left(s, PCI9111_FIFO_HALF_SIZE);
440 insw(dev->iobase + PCI9111_AI_FIFO_REG,
441 devpriv->ai_bounce_buffer, samples);
443 if (devpriv->scan_delay < 1) {
444 comedi_buf_write_samples(s, devpriv->ai_bounce_buffer, samples);
446 unsigned int pos = 0;
447 unsigned int to_read;
449 while (pos < samples) {
450 if (devpriv->chunk_counter < cmd->chanlist_len) {
451 to_read = cmd->chanlist_len -
452 devpriv->chunk_counter;
454 if (to_read > samples - pos)
455 to_read = samples - pos;
457 comedi_buf_write_samples(s,
458 devpriv->ai_bounce_buffer + pos,
461 to_read = devpriv->chunk_num_samples -
462 devpriv->chunk_counter;
464 if (to_read > samples - pos)
465 to_read = samples - pos;
469 devpriv->chunk_counter += to_read;
471 if (devpriv->chunk_counter >=
472 devpriv->chunk_num_samples)
473 devpriv->chunk_counter = 0;
478 static irqreturn_t pci9111_interrupt(int irq, void *p_device)
480 struct comedi_device *dev = p_device;
481 struct pci9111_private_data *dev_private = dev->private;
482 struct comedi_subdevice *s = dev->read_subdev;
483 struct comedi_async *async;
484 struct comedi_cmd *cmd;
486 unsigned long irq_flags;
487 unsigned char intcsr;
489 if (!dev->attached) {
490 /* Ignore interrupt before device fully attached. */
491 /* Might not even have allocated subdevices yet! */
498 spin_lock_irqsave(&dev->spinlock, irq_flags);
500 /* Check if we are source of interrupt */
501 intcsr = inb(dev_private->lcr_io_base + PLX9052_INTCSR);
502 if (!(((intcsr & PLX9052_INTCSR_PCIENAB) != 0) &&
503 (((intcsr & PCI9111_LI1_ACTIVE) == PCI9111_LI1_ACTIVE) ||
504 ((intcsr & PCI9111_LI2_ACTIVE) == PCI9111_LI2_ACTIVE)))) {
505 /* Not the source of the interrupt. */
506 /* (N.B. not using PLX9052_INTCSR_SOFTINT) */
507 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
511 if ((intcsr & PCI9111_LI1_ACTIVE) == PCI9111_LI1_ACTIVE) {
512 /* Interrupt comes from fifo_half-full signal */
514 status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
516 /* '0' means FIFO is full, data may have been lost */
517 if (!(status & PCI9111_AI_STAT_FF_FF)) {
518 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
519 dev_dbg(dev->class_dev, "fifo overflow\n");
520 outb(0, dev->iobase + PCI9111_INT_CLR_REG);
521 async->events |= COMEDI_CB_ERROR;
522 comedi_handle_events(dev, s);
527 /* '0' means FIFO is half-full */
528 if (!(status & PCI9111_AI_STAT_FF_HF))
529 pci9111_handle_fifo_half_full(dev, s);
532 if (cmd->stop_src == TRIG_COUNT && async->scans_done >= cmd->stop_arg)
533 async->events |= COMEDI_CB_EOA;
535 outb(0, dev->iobase + PCI9111_INT_CLR_REG);
537 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
539 comedi_handle_events(dev, s);
544 static int pci9111_ai_eoc(struct comedi_device *dev,
545 struct comedi_subdevice *s,
546 struct comedi_insn *insn,
547 unsigned long context)
551 status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
552 if (status & PCI9111_AI_STAT_FF_EF)
557 static int pci9111_ai_insn_read(struct comedi_device *dev,
558 struct comedi_subdevice *s,
559 struct comedi_insn *insn, unsigned int *data)
561 unsigned int chan = CR_CHAN(insn->chanspec);
562 unsigned int range = CR_RANGE(insn->chanspec);
563 unsigned int maxdata = s->maxdata;
564 unsigned int invert = (maxdata + 1) >> 1;
565 unsigned int shift = (maxdata == 0xffff) ? 0 : 4;
570 outb(chan, dev->iobase + PCI9111_AI_CHANNEL_REG);
572 status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
573 if ((status & PCI9111_AI_RANGE_MASK) != range) {
574 outb(range & PCI9111_AI_RANGE_MASK,
575 dev->iobase + PCI9111_AI_RANGE_STAT_REG);
578 pci9111_fifo_reset(dev);
580 for (i = 0; i < insn->n; i++) {
581 /* Generate a software trigger */
582 outb(0, dev->iobase + PCI9111_SOFT_TRIG_REG);
584 ret = comedi_timeout(dev, s, insn, pci9111_ai_eoc, 0);
586 pci9111_fifo_reset(dev);
590 data[i] = inw(dev->iobase + PCI9111_AI_FIFO_REG);
591 data[i] = ((data[i] >> shift) & maxdata) ^ invert;
597 static int pci9111_ao_insn_write(struct comedi_device *dev,
598 struct comedi_subdevice *s,
599 struct comedi_insn *insn,
602 unsigned int chan = CR_CHAN(insn->chanspec);
603 unsigned int val = s->readback[chan];
606 for (i = 0; i < insn->n; i++) {
608 outw(val, dev->iobase + PCI9111_AO_REG);
610 s->readback[chan] = val;
615 static int pci9111_di_insn_bits(struct comedi_device *dev,
616 struct comedi_subdevice *s,
617 struct comedi_insn *insn,
620 data[1] = inw(dev->iobase + PCI9111_DIO_REG);
625 static int pci9111_do_insn_bits(struct comedi_device *dev,
626 struct comedi_subdevice *s,
627 struct comedi_insn *insn,
630 if (comedi_dio_update_state(s, data))
631 outw(s->state, dev->iobase + PCI9111_DIO_REG);
638 static int pci9111_reset(struct comedi_device *dev)
640 struct pci9111_private_data *dev_private = dev->private;
642 /* Set trigger source to software */
643 plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
646 /* disable A/D triggers (software trigger mode) and auto scan off */
647 outb(0, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
652 static int pci9111_auto_attach(struct comedi_device *dev,
653 unsigned long context_unused)
655 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
656 struct pci9111_private_data *dev_private;
657 struct comedi_subdevice *s;
660 dev_private = comedi_alloc_devpriv(dev, sizeof(*dev_private));
664 ret = comedi_pci_enable(dev);
667 dev_private->lcr_io_base = pci_resource_start(pcidev, 1);
668 dev->iobase = pci_resource_start(pcidev, 2);
673 ret = request_irq(pcidev->irq, pci9111_interrupt,
674 IRQF_SHARED, dev->board_name, dev);
676 dev->irq = pcidev->irq;
679 dev->pacer = comedi_8254_init(dev->iobase + PCI9111_8254_BASE_REG,
680 I8254_OSC_BASE_2MHZ, I8254_IO16, 0);
684 ret = comedi_alloc_subdevices(dev, 4);
688 s = &dev->subdevices[0];
689 s->type = COMEDI_SUBD_AI;
690 s->subdev_flags = SDF_READABLE | SDF_COMMON;
693 s->range_table = &pci9111_ai_range;
694 s->insn_read = pci9111_ai_insn_read;
696 dev->read_subdev = s;
697 s->subdev_flags |= SDF_CMD_READ;
698 s->len_chanlist = s->n_chan;
699 s->do_cmdtest = pci9111_ai_do_cmd_test;
700 s->do_cmd = pci9111_ai_do_cmd;
701 s->cancel = pci9111_ai_cancel;
702 s->munge = pci9111_ai_munge;
705 s = &dev->subdevices[1];
706 s->type = COMEDI_SUBD_AO;
707 s->subdev_flags = SDF_WRITABLE | SDF_COMMON;
711 s->range_table = &range_bipolar10;
712 s->insn_write = pci9111_ao_insn_write;
714 ret = comedi_alloc_subdev_readback(s);
718 s = &dev->subdevices[2];
719 s->type = COMEDI_SUBD_DI;
720 s->subdev_flags = SDF_READABLE;
723 s->range_table = &range_digital;
724 s->insn_bits = pci9111_di_insn_bits;
726 s = &dev->subdevices[3];
727 s->type = COMEDI_SUBD_DO;
728 s->subdev_flags = SDF_WRITABLE;
731 s->range_table = &range_digital;
732 s->insn_bits = pci9111_do_insn_bits;
737 static void pci9111_detach(struct comedi_device *dev)
741 comedi_pci_detach(dev);
744 static struct comedi_driver adl_pci9111_driver = {
745 .driver_name = "adl_pci9111",
746 .module = THIS_MODULE,
747 .auto_attach = pci9111_auto_attach,
748 .detach = pci9111_detach,
751 static int pci9111_pci_probe(struct pci_dev *dev,
752 const struct pci_device_id *id)
754 return comedi_pci_auto_config(dev, &adl_pci9111_driver,
758 static const struct pci_device_id pci9111_pci_table[] = {
759 { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, 0x9111) },
760 /* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
763 MODULE_DEVICE_TABLE(pci, pci9111_pci_table);
765 static struct pci_driver adl_pci9111_pci_driver = {
766 .name = "adl_pci9111",
767 .id_table = pci9111_pci_table,
768 .probe = pci9111_pci_probe,
769 .remove = comedi_pci_auto_unconfig,
771 module_comedi_pci_driver(adl_pci9111_driver, adl_pci9111_pci_driver);
773 MODULE_AUTHOR("Comedi http://www.comedi.org");
774 MODULE_DESCRIPTION("Comedi low-level driver");
775 MODULE_LICENSE("GPL");