3 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
4 * Project manager: Eric Stolz
9 * Tel: +19(0)7223/9493-0
10 * Fax: +49(0)7223/9493-92
11 * http://www.addi-data.com
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
19 * This program is distributed in the hope that it will be useful, but WITHOUT
20 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
21 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
26 * Driver: addi_apci_1032
27 * Description: ADDI-DATA APCI-1032 Digital Input Board
28 * Author: ADDI-DATA GmbH <info@addi-data.com>,
29 * H Hartley Sweeten <hsweeten@visionengravers.com>
31 * Devices: [ADDI-DATA] APCI-1032 (addi_apci_1032)
33 * Configuration options:
34 * None; devices are configured automatically.
36 * This driver models the APCI-1032 as a 32-channel, digital input subdevice
37 * plus an additional digital input subdevice to handle change-of-state (COS)
38 * interrupts (if an interrupt handler can be set up successfully).
40 * The COS subdevice supports comedi asynchronous read commands.
42 * Change-Of-State (COS) interrupt configuration:
44 * Channels 0 to 15 are interruptible. These channels can be configured
45 * to generate interrupts based on AND/OR logic for the desired channels.
48 * - reacts to rising or falling edges
49 * - interrupt is generated when any enabled channel meets the desired
53 * - reacts to changes in level of the selected inputs
54 * - interrupt is generated when all enabled channels meet the desired
56 * - after an interrupt, a change in level must occur on the selected
57 * inputs to release the IRQ logic
59 * The COS subdevice must be configured before setting up a comedi
60 * asynchronous command:
62 * data[0] : INSN_CONFIG_DIGITAL_TRIG
63 * data[1] : trigger number (= 0)
64 * data[2] : configuration operation:
65 * - COMEDI_DIGITAL_TRIG_DISABLE = no interrupts
66 * - COMEDI_DIGITAL_TRIG_ENABLE_EDGES = OR (edge) interrupts
67 * - COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = AND (level) interrupts
68 * data[3] : left-shift for data[4] and data[5]
69 * data[4] : rising-edge/high level channels
70 * data[5] : falling-edge/low level channels
73 #include <linux/module.h>
74 #include <linux/interrupt.h>
76 #include "../comedi_pci.h"
77 #include "amcc_s5933.h"
82 #define APCI1032_DI_REG 0x00
83 #define APCI1032_MODE1_REG 0x04
84 #define APCI1032_MODE2_REG 0x08
85 #define APCI1032_STATUS_REG 0x0c
86 #define APCI1032_CTRL_REG 0x10
87 #define APCI1032_CTRL_INT_OR (0 << 1)
88 #define APCI1032_CTRL_INT_AND (1 << 1)
89 #define APCI1032_CTRL_INT_ENA (1 << 2)
91 struct apci1032_private {
92 unsigned long amcc_iobase; /* base of AMCC I/O registers */
93 unsigned int mode1; /* rising-edge/high level channels */
94 unsigned int mode2; /* falling-edge/low level channels */
95 unsigned int ctrl; /* interrupt mode OR (edge) . AND (level) */
98 static int apci1032_reset(struct comedi_device *dev)
100 /* disable the interrupts */
101 outl(0x0, dev->iobase + APCI1032_CTRL_REG);
102 /* Reset the interrupt status register */
103 inl(dev->iobase + APCI1032_STATUS_REG);
104 /* Disable the and/or interrupt */
105 outl(0x0, dev->iobase + APCI1032_MODE1_REG);
106 outl(0x0, dev->iobase + APCI1032_MODE2_REG);
111 static int apci1032_cos_insn_config(struct comedi_device *dev,
112 struct comedi_subdevice *s,
113 struct comedi_insn *insn,
116 struct apci1032_private *devpriv = dev->private;
117 unsigned int shift, oldmask;
120 case INSN_CONFIG_DIGITAL_TRIG:
124 oldmask = (1U << shift) - 1;
126 case COMEDI_DIGITAL_TRIG_DISABLE:
132 case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
133 if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |
134 APCI1032_CTRL_INT_OR)) {
135 /* switching to 'OR' mode */
136 devpriv->ctrl = APCI1032_CTRL_INT_ENA |
137 APCI1032_CTRL_INT_OR;
138 /* wipe old channels */
142 /* preserve unspecified channels */
143 devpriv->mode1 &= oldmask;
144 devpriv->mode2 &= oldmask;
146 /* configure specified channels */
147 devpriv->mode1 |= data[4] << shift;
148 devpriv->mode2 |= data[5] << shift;
150 case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:
151 if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |
152 APCI1032_CTRL_INT_AND)) {
153 /* switching to 'AND' mode */
154 devpriv->ctrl = APCI1032_CTRL_INT_ENA |
155 APCI1032_CTRL_INT_AND;
156 /* wipe old channels */
160 /* preserve unspecified channels */
161 devpriv->mode1 &= oldmask;
162 devpriv->mode2 &= oldmask;
164 /* configure specified channels */
165 devpriv->mode1 |= data[4] << shift;
166 devpriv->mode2 |= data[5] << shift;
179 static int apci1032_cos_insn_bits(struct comedi_device *dev,
180 struct comedi_subdevice *s,
181 struct comedi_insn *insn,
189 static int apci1032_cos_cmdtest(struct comedi_device *dev,
190 struct comedi_subdevice *s,
191 struct comedi_cmd *cmd)
195 /* Step 1 : check if triggers are trivially valid */
197 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
198 err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
199 err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
200 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
201 err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_NONE);
206 /* Step 2a : make sure trigger sources are unique */
207 /* Step 2b : and mutually compatible */
209 /* Step 3: check if arguments are trivially valid */
211 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
212 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
213 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
214 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
216 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
221 /* Step 4: fix up any arguments */
223 /* Step 5: check channel list if it exists */
229 * Change-Of-State (COS) 'do_cmd' operation
231 * Enable the COS interrupt as configured by apci1032_cos_insn_config().
233 static int apci1032_cos_cmd(struct comedi_device *dev,
234 struct comedi_subdevice *s)
236 struct apci1032_private *devpriv = dev->private;
238 if (!devpriv->ctrl) {
239 dev_warn(dev->class_dev,
240 "Interrupts disabled due to mode configuration!\n");
244 outl(devpriv->mode1, dev->iobase + APCI1032_MODE1_REG);
245 outl(devpriv->mode2, dev->iobase + APCI1032_MODE2_REG);
246 outl(devpriv->ctrl, dev->iobase + APCI1032_CTRL_REG);
251 static int apci1032_cos_cancel(struct comedi_device *dev,
252 struct comedi_subdevice *s)
254 return apci1032_reset(dev);
257 static irqreturn_t apci1032_interrupt(int irq, void *d)
259 struct comedi_device *dev = d;
260 struct apci1032_private *devpriv = dev->private;
261 struct comedi_subdevice *s = dev->read_subdev;
264 /* check interrupt is from this device */
265 if ((inl(devpriv->amcc_iobase + AMCC_OP_REG_INTCSR) &
266 INTCSR_INTR_ASSERTED) == 0)
269 /* check interrupt is enabled */
270 ctrl = inl(dev->iobase + APCI1032_CTRL_REG);
271 if ((ctrl & APCI1032_CTRL_INT_ENA) == 0)
274 /* disable the interrupt */
275 outl(ctrl & ~APCI1032_CTRL_INT_ENA, dev->iobase + APCI1032_CTRL_REG);
277 s->state = inl(dev->iobase + APCI1032_STATUS_REG) & 0xffff;
278 comedi_buf_write_samples(s, &s->state, 1);
279 comedi_handle_events(dev, s);
281 /* enable the interrupt */
282 outl(ctrl, dev->iobase + APCI1032_CTRL_REG);
287 static int apci1032_di_insn_bits(struct comedi_device *dev,
288 struct comedi_subdevice *s,
289 struct comedi_insn *insn,
292 data[1] = inl(dev->iobase + APCI1032_DI_REG);
297 static int apci1032_auto_attach(struct comedi_device *dev,
298 unsigned long context_unused)
300 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
301 struct apci1032_private *devpriv;
302 struct comedi_subdevice *s;
305 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
309 ret = comedi_pci_enable(dev);
313 devpriv->amcc_iobase = pci_resource_start(pcidev, 0);
314 dev->iobase = pci_resource_start(pcidev, 1);
316 if (pcidev->irq > 0) {
317 ret = request_irq(pcidev->irq, apci1032_interrupt, IRQF_SHARED,
318 dev->board_name, dev);
320 dev->irq = pcidev->irq;
323 ret = comedi_alloc_subdevices(dev, 2);
327 /* Allocate and Initialise DI Subdevice Structures */
328 s = &dev->subdevices[0];
329 s->type = COMEDI_SUBD_DI;
330 s->subdev_flags = SDF_READABLE;
333 s->range_table = &range_digital;
334 s->insn_bits = apci1032_di_insn_bits;
336 /* Change-Of-State (COS) interrupt subdevice */
337 s = &dev->subdevices[1];
339 dev->read_subdev = s;
340 s->type = COMEDI_SUBD_DI;
341 s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
344 s->range_table = &range_digital;
345 s->insn_config = apci1032_cos_insn_config;
346 s->insn_bits = apci1032_cos_insn_bits;
348 s->do_cmdtest = apci1032_cos_cmdtest;
349 s->do_cmd = apci1032_cos_cmd;
350 s->cancel = apci1032_cos_cancel;
352 s->type = COMEDI_SUBD_UNUSED;
358 static void apci1032_detach(struct comedi_device *dev)
362 comedi_pci_detach(dev);
365 static struct comedi_driver apci1032_driver = {
366 .driver_name = "addi_apci_1032",
367 .module = THIS_MODULE,
368 .auto_attach = apci1032_auto_attach,
369 .detach = apci1032_detach,
372 static int apci1032_pci_probe(struct pci_dev *dev,
373 const struct pci_device_id *id)
375 return comedi_pci_auto_config(dev, &apci1032_driver, id->driver_data);
378 static const struct pci_device_id apci1032_pci_table[] = {
379 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1003) },
382 MODULE_DEVICE_TABLE(pci, apci1032_pci_table);
384 static struct pci_driver apci1032_pci_driver = {
385 .name = "addi_apci_1032",
386 .id_table = apci1032_pci_table,
387 .probe = apci1032_pci_probe,
388 .remove = comedi_pci_auto_unconfig,
390 module_comedi_pci_driver(apci1032_driver, apci1032_pci_driver);
392 MODULE_AUTHOR("Comedi http://www.comedi.org");
393 MODULE_DESCRIPTION("ADDI-DATA APCI-1032, 32 channel DI boards");
394 MODULE_LICENSE("GPL");