kernel/drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 int ql2xfdmienable=1;
 108 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 109 MODULE_PARM_DESC(ql2xfdmienable,
 110                 "Enables FDMI registrations. "
 111                 "0 - no FDMI. Default is 1 - perform FDMI.");
 112
 113 #define MAX_Q_DEPTH     32
 114 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 116 MODULE_PARM_DESC(ql2xmaxqdepth,
 117                 "Maximum queue depth to set for each LUN. "
 118                 "Default is 32.");
 119
 120 int ql2xenabledif = 2;
 121 module_param(ql2xenabledif, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xenabledif,
 123                 " Enable T10-CRC-DIF:\n"
 124                 " Default is 2.\n"
 125                 "  0 -- No DIF Support\n"
 126                 "  1 -- Enable DIF for all types\n"
 127                 "  2 -- Enable DIF for all types, except Type 0.\n");
 128
 129 int ql2xenablehba_err_chk = 2;
 130 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 131 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 132                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- Error isolation disabled\n"
 135                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 136                 "  2 -- Error isolation enabled for all Types\n");
 137
 138 int ql2xiidmaenable=1;
 139 module_param(ql2xiidmaenable, int, S_IRUGO);
 140 MODULE_PARM_DESC(ql2xiidmaenable,
 141                 "Enables iIDMA settings "
 142                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 143
 144 int ql2xmaxqueues = 1;
 145 module_param(ql2xmaxqueues, int, S_IRUGO);
 146 MODULE_PARM_DESC(ql2xmaxqueues,
 147                 "Enables MQ settings "
 148                 "Default is 1 for single queue. Set it to number "
 149                 "of queues in MQ mode.");
 150
 151 int ql2xmultique_tag;
 152 module_param(ql2xmultique_tag, int, S_IRUGO);
 153 MODULE_PARM_DESC(ql2xmultique_tag,
 154                 "Enables CPU affinity settings for the driver "
 155                 "Default is 0 for no affinity of request and response IO. "
 156                 "Set it to 1 to turn on the cpu affinity.");
 157
 158 int ql2xfwloadbin;
 159 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 160 MODULE_PARM_DESC(ql2xfwloadbin,
 161                 "Option to specify location from which to load ISP firmware:.\n"
 162                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 163                 "      interface.\n"
 164                 " 1 -- load firmware from flash.\n"
 165                 " 0 -- use default semantics.\n");
 166
 167 int ql2xetsenable;
 168 module_param(ql2xetsenable, int, S_IRUGO);
 169 MODULE_PARM_DESC(ql2xetsenable,
 170                 "Enables firmware ETS burst."
 171                 "Default is 0 - skip ETS enablement.");
 172
 173 int ql2xdbwr = 1;
 174 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 175 MODULE_PARM_DESC(ql2xdbwr,
 176                 "Option to specify scheme for request queue posting.\n"
 177                 " 0 -- Regular doorbell.\n"
 178                 " 1 -- CAMRAM doorbell (faster).\n");
 179
 180 int ql2xtargetreset = 1;
 181 module_param(ql2xtargetreset, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xtargetreset,
 183                  "Enable target reset."
 184                  "Default is 1 - use hw defaults.");
 185
 186 int ql2xgffidenable;
 187 module_param(ql2xgffidenable, int, S_IRUGO);
 188 MODULE_PARM_DESC(ql2xgffidenable,
 189                 "Enables GFF_ID checks of port type. "
 190                 "Default is 0 - Do not use GFF_ID information.");
 191
 192 int ql2xasynctmfenable;
 193 module_param(ql2xasynctmfenable, int, S_IRUGO);
 194 MODULE_PARM_DESC(ql2xasynctmfenable,
 195                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 196                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 197
 198 int ql2xdontresethba;
 199 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 200 MODULE_PARM_DESC(ql2xdontresethba,
 201                 "Option to specify reset behaviour.\n"
 202                 " 0 (Default) -- Reset on failure.\n"
 203                 " 1 -- Do not reset on failure.\n");
 204
 205 uint64_t ql2xmaxlun = MAX_LUNS;
 206 module_param(ql2xmaxlun, ullong, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xmaxlun,
 208                 "Defines the maximum LU number to register with the SCSI "
 209                 "midlayer. Default is 65535.");
 210
 211 int ql2xmdcapmask = 0x1F;
 212 module_param(ql2xmdcapmask, int, S_IRUGO);
 213 MODULE_PARM_DESC(ql2xmdcapmask,
 214                 "Set the Minidump driver capture mask level. "
 215                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 216
 217 int ql2xmdenable = 1;
 218 module_param(ql2xmdenable, int, S_IRUGO);
 219 MODULE_PARM_DESC(ql2xmdenable,
 220                 "Enable/disable MiniDump. "
 221                 "0 - MiniDump disabled. "
 222                 "1 (Default) - MiniDump enabled.");
 223
 224 /*
 225  * SCSI host template entry points
 226  */
 227 static int qla2xxx_slave_configure(struct scsi_device * device);
 228 static int qla2xxx_slave_alloc(struct scsi_device *);
 229 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 230 static void qla2xxx_scan_start(struct Scsi_Host *);
 231 static void qla2xxx_slave_destroy(struct scsi_device *);
 232 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 233 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 234 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 235 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 236 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 237 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 238
 239 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 240 static void qla2x00_free_device(scsi_qla_host_t *);
 241 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 242
 243 struct scsi_host_template qla2xxx_driver_template = {
 244         .module                 = THIS_MODULE,
 245         .name                   = QLA2XXX_DRIVER_NAME,
 246         .queuecommand           = qla2xxx_queuecommand,
 247
 248         .eh_abort_handler       = qla2xxx_eh_abort,
 249         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 250         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 251         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 252         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 253
 254         .slave_configure        = qla2xxx_slave_configure,
 255
 256         .slave_alloc            = qla2xxx_slave_alloc,
 257         .slave_destroy          = qla2xxx_slave_destroy,
 258         .scan_finished          = qla2xxx_scan_finished,
 259         .scan_start             = qla2xxx_scan_start,
 260         .change_queue_depth     = scsi_change_queue_depth,
 261         .this_id                = -1,
 262         .cmd_per_lun            = 3,
 263         .use_clustering         = ENABLE_CLUSTERING,
 264         .sg_tablesize           = SG_ALL,
 265
 266         .max_sectors            = 0xFFFF,
 267         .shost_attrs            = qla2x00_host_attrs,
 268
 269         .supported_mode         = MODE_INITIATOR,
 270         .track_queue_depth      = 1,
 271 };
 272
 273 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 274 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 275
 276 /* TODO Convert to inlines
 277  *
 278  * Timer routines
 279  */
 280
 281 __inline__ void
 282 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 283 {
 284         init_timer(&vha->timer);
 285         vha->timer.expires = jiffies + interval * HZ;
 286         vha->timer.data = (unsigned long)vha;
 287         vha->timer.function = (void (*)(unsigned long))func;
 288         add_timer(&vha->timer);
 289         vha->timer_active = 1;
 290 }
 291
 292 static inline void
 293 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 294 {
 295         /* Currently used for 82XX only. */
 296         if (vha->device_flags & DFLG_DEV_FAILED) {
 297                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 298                     "Device in a failed state, returning.\n");
 299                 return;
 300         }
 301
 302         mod_timer(&vha->timer, jiffies + interval * HZ);
 303 }
 304
 305 static __inline__ void
 306 qla2x00_stop_timer(scsi_qla_host_t *vha)
 307 {
 308         del_timer_sync(&vha->timer);
 309         vha->timer_active = 0;
 310 }
 311
 312 static int qla2x00_do_dpc(void *data);
 313
 314 static void qla2x00_rst_aen(scsi_qla_host_t *);
 315
 316 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 317         struct req_que **, struct rsp_que **);
 318 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 319 static void qla2x00_mem_free(struct qla_hw_data *);
 320
 321 /* -------------------------------------------------------------------------- */
 322 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 323                                 struct rsp_que *rsp)
 324 {
 325         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 326         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 327                                 GFP_KERNEL);
 328         if (!ha->req_q_map) {
 329                 ql_log(ql_log_fatal, vha, 0x003b,
 330                     "Unable to allocate memory for request queue ptrs.\n");
 331                 goto fail_req_map;
 332         }
 333
 334         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 335                                 GFP_KERNEL);
 336         if (!ha->rsp_q_map) {
 337                 ql_log(ql_log_fatal, vha, 0x003c,
 338                     "Unable to allocate memory for response queue ptrs.\n");
 339                 goto fail_rsp_map;
 340         }
 341         /*
 342          * Make sure we record at least the request and response queue zero in
 343          * case we need to free them if part of the probe fails.
 344          */
 345         ha->rsp_q_map[0] = rsp;
 346         ha->req_q_map[0] = req;
 347         set_bit(0, ha->rsp_qid_map);
 348         set_bit(0, ha->req_qid_map);
 349         return 1;
 350
 351 fail_rsp_map:
 352         kfree(ha->req_q_map);
 353         ha->req_q_map = NULL;
 354 fail_req_map:
 355         return -ENOMEM;
 356 }
 357
 358 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 359 {
 360         if (IS_QLAFX00(ha)) {
 361                 if (req && req->ring_fx00)
 362                         dma_free_coherent(&ha->pdev->dev,
 363                             (req->length_fx00 + 1) * sizeof(request_t),
 364                             req->ring_fx00, req->dma_fx00);
 365         } else if (req && req->ring)
 366                 dma_free_coherent(&ha->pdev->dev,
 367                 (req->length + 1) * sizeof(request_t),
 368                 req->ring, req->dma);
 369
 370         if (req)
 371                 kfree(req->outstanding_cmds);
 372
 373         kfree(req);
 374         req = NULL;
 375 }
 376
 377 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 378 {
 379         if (IS_QLAFX00(ha)) {
 380                 if (rsp && rsp->ring)
 381                         dma_free_coherent(&ha->pdev->dev,
 382                             (rsp->length_fx00 + 1) * sizeof(request_t),
 383                             rsp->ring_fx00, rsp->dma_fx00);
 384         } else if (rsp && rsp->ring) {
 385                 dma_free_coherent(&ha->pdev->dev,
 386                 (rsp->length + 1) * sizeof(response_t),
 387                 rsp->ring, rsp->dma);
 388         }
 389         kfree(rsp);
 390         rsp = NULL;
 391 }
 392
 393 static void qla2x00_free_queues(struct qla_hw_data *ha)
 394 {
 395         struct req_que *req;
 396         struct rsp_que *rsp;
 397         int cnt;
 398
 399         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 400                 if (!test_bit(cnt, ha->req_qid_map))
 401                         continue;
 402
 403                 req = ha->req_q_map[cnt];
 404                 qla2x00_free_req_que(ha, req);
 405         }
 406         kfree(ha->req_q_map);
 407         ha->req_q_map = NULL;
 408
 409         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 410                 if (!test_bit(cnt, ha->rsp_qid_map))
 411                         continue;
 412
 413                 rsp = ha->rsp_q_map[cnt];
 414                 qla2x00_free_rsp_que(ha, rsp);
 415         }
 416         kfree(ha->rsp_q_map);
 417         ha->rsp_q_map = NULL;
 418 }
 419
 420 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 421 {
 422         uint16_t options = 0;
 423         int ques, req, ret;
 424         struct qla_hw_data *ha = vha->hw;
 425
 426         if (!(ha->fw_attributes & BIT_6)) {
 427                 ql_log(ql_log_warn, vha, 0x00d8,
 428                     "Firmware is not multi-queue capable.\n");
 429                 goto fail;
 430         }
 431         if (ql2xmultique_tag) {
 432                 /* create a request queue for IO */
 433                 options |= BIT_7;
 434                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 435                         QLA_DEFAULT_QUE_QOS);
 436                 if (!req) {
 437                         ql_log(ql_log_warn, vha, 0x00e0,
 438                             "Failed to create request queue.\n");
 439                         goto fail;
 440                 }
 441                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 442                 vha->req = ha->req_q_map[req];
 443                 options |= BIT_1;
 444                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 445                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 446                         if (!ret) {
 447                                 ql_log(ql_log_warn, vha, 0x00e8,
 448                                     "Failed to create response queue.\n");
 449                                 goto fail2;
 450                         }
 451                 }
 452                 ha->flags.cpu_affinity_enabled = 1;
 453                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 454                     "CPU affinity mode enabled, "
 455                     "no. of response queues:%d no. of request queues:%d.\n",
 456                     ha->max_rsp_queues, ha->max_req_queues);
 457                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 458                     "CPU affinity mode enabled, "
 459                     "no. of response queues:%d no. of request queues:%d.\n",
 460                     ha->max_rsp_queues, ha->max_req_queues);
 461         }
 462         return 0;
 463 fail2:
 464         qla25xx_delete_queues(vha);
 465         destroy_workqueue(ha->wq);
 466         ha->wq = NULL;
 467         vha->req = ha->req_q_map[0];
 468 fail:
 469         ha->mqenable = 0;
 470         kfree(ha->req_q_map);
 471         kfree(ha->rsp_q_map);
 472         ha->max_req_queues = ha->max_rsp_queues = 1;
 473         return 1;
 474 }
 475
 476 static char *
 477 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 478 {
 479         struct qla_hw_data *ha = vha->hw;
 480         static char *pci_bus_modes[] = {
 481                 "33", "66", "100", "133",
 482         };
 483         uint16_t pci_bus;
 484
 485         strcpy(str, "PCI");
 486         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 487         if (pci_bus) {
 488                 strcat(str, "-X (");
 489                 strcat(str, pci_bus_modes[pci_bus]);
 490         } else {
 491                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 492                 strcat(str, " (");
 493                 strcat(str, pci_bus_modes[pci_bus]);
 494         }
 495         strcat(str, " MHz)");
 496
 497         return (str);
 498 }
 499
 500 static char *
 501 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 502 {
 503         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 504         struct qla_hw_data *ha = vha->hw;
 505         uint32_t pci_bus;
 506
 507         if (pci_is_pcie(ha->pdev)) {
 508                 char lwstr[6];
 509                 uint32_t lstat, lspeed, lwidth;
 510
 511                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 512                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 513                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 514
 515                 strcpy(str, "PCIe (");
 516                 switch (lspeed) {
 517                 case 1:
 518                         strcat(str, "2.5GT/s ");
 519                         break;
 520                 case 2:
 521                         strcat(str, "5.0GT/s ");
 522                         break;
 523                 case 3:
 524                         strcat(str, "8.0GT/s ");
 525                         break;
 526                 default:
 527                         strcat(str, "<unknown> ");
 528                         break;
 529                 }
 530                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 531                 strcat(str, lwstr);
 532
 533                 return str;
 534         }
 535
 536         strcpy(str, "PCI");
 537         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 538         if (pci_bus == 0 || pci_bus == 8) {
 539                 strcat(str, " (");
 540                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 541         } else {
 542                 strcat(str, "-X ");
 543                 if (pci_bus & BIT_2)
 544                         strcat(str, "Mode 2");
 545                 else
 546                         strcat(str, "Mode 1");
 547                 strcat(str, " (");
 548                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 549         }
 550         strcat(str, " MHz)");
 551
 552         return str;
 553 }
 554
 555 static char *
 556 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 557 {
 558         char un_str[10];
 559         struct qla_hw_data *ha = vha->hw;
 560
 561         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 562             ha->fw_minor_version, ha->fw_subminor_version);
 563
 564         if (ha->fw_attributes & BIT_9) {
 565                 strcat(str, "FLX");
 566                 return (str);
 567         }
 568
 569         switch (ha->fw_attributes & 0xFF) {
 570         case 0x7:
 571                 strcat(str, "EF");
 572                 break;
 573         case 0x17:
 574                 strcat(str, "TP");
 575                 break;
 576         case 0x37:
 577                 strcat(str, "IP");
 578                 break;
 579         case 0x77:
 580                 strcat(str, "VI");
 581                 break;
 582         default:
 583                 sprintf(un_str, "(%x)", ha->fw_attributes);
 584                 strcat(str, un_str);
 585                 break;
 586         }
 587         if (ha->fw_attributes & 0x100)
 588                 strcat(str, "X");
 589
 590         return (str);
 591 }
 592
 593 static char *
 594 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 595 {
 596         struct qla_hw_data *ha = vha->hw;
 597
 598         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 599             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 600         return str;
 601 }
 602
 603 void
 604 qla2x00_sp_free_dma(void *vha, void *ptr)
 605 {
 606         srb_t *sp = (srb_t *)ptr;
 607         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 608         struct qla_hw_data *ha = sp->fcport->vha->hw;
 609         void *ctx = GET_CMD_CTX_SP(sp);
 610
 611         if (sp->flags & SRB_DMA_VALID) {
 612                 scsi_dma_unmap(cmd);
 613                 sp->flags &= ~SRB_DMA_VALID;
 614         }
 615
 616         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 617                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 618                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 619                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 620         }
 621
 622         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 623                 /* List assured to be having elements */
 624                 qla2x00_clean_dsd_pool(ha, sp, NULL);
 625                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 626         }
 627
 628         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 629                 dma_pool_free(ha->dl_dma_pool, ctx,
 630                     ((struct crc_context *)ctx)->crc_ctx_dma);
 631                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 632         }
 633
 634         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 635                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 636
 637                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 638                         ctx1->fcp_cmnd_dma);
 639                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 640                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 641                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 642                 mempool_free(ctx1, ha->ctx_mempool);
 643                 ctx1 = NULL;
 644         }
 645
 646         CMD_SP(cmd) = NULL;
 647         qla2x00_rel_sp(sp->fcport->vha, sp);
 648 }
 649
 650 static void
 651 qla2x00_sp_compl(void *data, void *ptr, int res)
 652 {
 653         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 654         srb_t *sp = (srb_t *)ptr;
 655         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 656
 657         cmd->result = res;
 658
 659         if (atomic_read(&sp->ref_count) == 0) {
 660                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 661                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 662                     sp, GET_CMD_SP(sp));
 663                 if (ql2xextended_error_logging & ql_dbg_io)
 664                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 665                 return;
 666         }
 667         if (!atomic_dec_and_test(&sp->ref_count))
 668                 return;
 669
 670         qla2x00_sp_free_dma(ha, sp);
 671         cmd->scsi_done(cmd);
 672 }
 673
 674 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 675  * does not have the changes necessary to avoid taking host->host_lock.
 676  */
 677 static int
 678 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 679 {
 680         scsi_qla_host_t *vha = shost_priv(host);
 681         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 682         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 683         struct qla_hw_data *ha = vha->hw;
 684         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 685         srb_t *sp;
 686         int rval;
 687
 688         if (ha->flags.eeh_busy) {
 689                 if (ha->flags.pci_channel_io_perm_failure) {
 690                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 691                             "PCI Channel IO permanent failure, exiting "
 692                             "cmd=%p.\n", cmd);
 693                         cmd->result = DID_NO_CONNECT << 16;
 694                 } else {
 695                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 696                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 697                         cmd->result = DID_REQUEUE << 16;
 698                 }
 699                 goto qc24_fail_command;
 700         }
 701
 702         rval = fc_remote_port_chkready(rport);
 703         if (rval) {
 704                 cmd->result = rval;
 705                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 706                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 707                     cmd, rval);
 708                 goto qc24_fail_command;
 709         }
 710
 711         if (!vha->flags.difdix_supported &&
 712                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 713                         ql_dbg(ql_dbg_io, vha, 0x3004,
 714                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 715                             cmd);
 716                         cmd->result = DID_NO_CONNECT << 16;
 717                         goto qc24_fail_command;
 718         }
 719
 720         if (!fcport) {
 721                 cmd->result = DID_NO_CONNECT << 16;
 722                 goto qc24_fail_command;
 723         }
 724
 725         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 726                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 727                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 728                         ql_dbg(ql_dbg_io, vha, 0x3005,
 729                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 730                             atomic_read(&fcport->state),
 731                             atomic_read(&base_vha->loop_state));
 732                         cmd->result = DID_NO_CONNECT << 16;
 733                         goto qc24_fail_command;
 734                 }
 735                 goto qc24_target_busy;
 736         }
 737
 738         /*
 739          * Return target busy if we've received a non-zero retry_delay_timer
 740          * in a FCP_RSP.
 741          */
 742         if (fcport->retry_delay_timestamp == 0) {
 743                 /* retry delay not set */
 744         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 745                 fcport->retry_delay_timestamp = 0;
 746         else
 747                 goto qc24_target_busy;
 748
 749         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 750         if (!sp)
 751                 goto qc24_host_busy;
 752
 753         sp->u.scmd.cmd = cmd;
 754         sp->type = SRB_SCSI_CMD;
 755         atomic_set(&sp->ref_count, 1);
 756         CMD_SP(cmd) = (void *)sp;
 757         sp->free = qla2x00_sp_free_dma;
 758         sp->done = qla2x00_sp_compl;
 759
 760         rval = ha->isp_ops->start_scsi(sp);
 761         if (rval != QLA_SUCCESS) {
 762                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 763                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 764                 goto qc24_host_busy_free_sp;
 765         }
 766
 767         return 0;
 768
 769 qc24_host_busy_free_sp:
 770         qla2x00_sp_free_dma(ha, sp);
 771
 772 qc24_host_busy:
 773         return SCSI_MLQUEUE_HOST_BUSY;
 774
 775 qc24_target_busy:
 776         return SCSI_MLQUEUE_TARGET_BUSY;
 777
 778 qc24_fail_command:
 779         cmd->scsi_done(cmd);
 780
 781         return 0;
 782 }
 783
 784 /*
 785  * qla2x00_eh_wait_on_command
 786  *    Waits for the command to be returned by the Firmware for some
 787  *    max time.
 788  *
 789  * Input:
 790  *    cmd = Scsi Command to wait on.
 791  *
 792  * Return:
 793  *    Not Found : 0
 794  *    Found : 1
 795  */
 796 static int
 797 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 798 {
 799 #define ABORT_POLLING_PERIOD    1000
 800 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
 801         unsigned long wait_iter = ABORT_WAIT_ITER;
 802         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 803         struct qla_hw_data *ha = vha->hw;
 804         int ret = QLA_SUCCESS;
 805
 806         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 807                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 808                     "Return:eh_wait.\n");
 809                 return ret;
 810         }
 811
 812         while (CMD_SP(cmd) && wait_iter--) {
 813                 msleep(ABORT_POLLING_PERIOD);
 814         }
 815         if (CMD_SP(cmd))
 816                 ret = QLA_FUNCTION_FAILED;
 817
 818         return ret;
 819 }
 820
 821 /*
 822  * qla2x00_wait_for_hba_online
 823  *    Wait till the HBA is online after going through
 824  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 825  *    finally HBA is disabled ie marked offline
 826  *
 827  * Input:
 828  *     ha - pointer to host adapter structure
 829  *
 830  * Note:
 831  *    Does context switching-Release SPIN_LOCK
 832  *    (if any) before calling this routine.
 833  *
 834  * Return:
 835  *    Success (Adapter is online) : 0
 836  *    Failed  (Adapter is offline/disabled) : 1
 837  */
 838 int
 839 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 840 {
 841         int             return_status;
 842         unsigned long   wait_online;
 843         struct qla_hw_data *ha = vha->hw;
 844         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 845
 846         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 847         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 848             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 849             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 850             ha->dpc_active) && time_before(jiffies, wait_online)) {
 851
 852                 msleep(1000);
 853         }
 854         if (base_vha->flags.online)
 855                 return_status = QLA_SUCCESS;
 856         else
 857                 return_status = QLA_FUNCTION_FAILED;
 858
 859         return (return_status);
 860 }
 861
 862 /*
 863  * qla2x00_wait_for_hba_ready
 864  * Wait till the HBA is ready before doing driver unload
 865  *
 866  * Input:
 867  *     ha - pointer to host adapter structure
 868  *
 869  * Note:
 870  *    Does context switching-Release SPIN_LOCK
 871  *    (if any) before calling this routine.
 872  *
 873  */
 874 static void
 875 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
 876 {
 877         struct qla_hw_data *ha = vha->hw;
 878
 879         while (((qla2x00_reset_active(vha)) || ha->dpc_active ||
 880             ha->flags.mbox_busy) ||
 881                 test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
 882                 test_bit(FX00_TARGET_SCAN, &vha->dpc_flags))
 883                 msleep(1000);
 884 }
 885
 886 int
 887 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 888 {
 889         int             return_status;
 890         unsigned long   wait_reset;
 891         struct qla_hw_data *ha = vha->hw;
 892         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 893
 894         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 895         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 896             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 897             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 898             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 899
 900                 msleep(1000);
 901
 902                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 903                     ha->flags.chip_reset_done)
 904                         break;
 905         }
 906         if (ha->flags.chip_reset_done)
 907                 return_status = QLA_SUCCESS;
 908         else
 909                 return_status = QLA_FUNCTION_FAILED;
 910
 911         return return_status;
 912 }
 913
 914 static void
 915 sp_get(struct srb *sp)
 916 {
 917         atomic_inc(&sp->ref_count);
 918 }
 919
 920 /**************************************************************************
 921 * qla2xxx_eh_abort
 922 *
 923 * Description:
 924 *    The abort function will abort the specified command.
 925 *
 926 * Input:
 927 *    cmd = Linux SCSI command packet to be aborted.
 928 *
 929 * Returns:
 930 *    Either SUCCESS or FAILED.
 931 *
 932 * Note:
 933 *    Only return FAILED if command not returned by firmware.
 934 **************************************************************************/
 935 static int
 936 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 937 {
 938         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 939         srb_t *sp;
 940         int ret;
 941         unsigned int id;
 942         uint64_t lun;
 943         unsigned long flags;
 944         int rval, wait = 0;
 945         struct qla_hw_data *ha = vha->hw;
 946
 947         if (!CMD_SP(cmd))
 948                 return SUCCESS;
 949
 950         ret = fc_block_scsi_eh(cmd);
 951         if (ret != 0)
 952                 return ret;
 953         ret = SUCCESS;
 954
 955         id = cmd->device->id;
 956         lun = cmd->device->lun;
 957
 958         spin_lock_irqsave(&ha->hardware_lock, flags);
 959         sp = (srb_t *) CMD_SP(cmd);
 960         if (!sp) {
 961                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 962                 return SUCCESS;
 963         }
 964
 965         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 966             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
 967             vha->host_no, id, lun, sp, cmd, sp->handle);
 968
 969         /* Get a reference to the sp and drop the lock.*/
 970         sp_get(sp);
 971
 972         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 973         rval = ha->isp_ops->abort_command(sp);
 974         if (rval) {
 975                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
 976                         ret = SUCCESS;
 977                 else
 978                         ret = FAILED;
 979
 980                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 981                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
 982         } else {
 983                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 984                     "Abort command mbx success cmd=%p.\n", cmd);
 985                 wait = 1;
 986         }
 987
 988         spin_lock_irqsave(&ha->hardware_lock, flags);
 989         sp->done(ha, sp, 0);
 990         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 991
 992         /* Did the command return during mailbox execution? */
 993         if (ret == FAILED && !CMD_SP(cmd))
 994                 ret = SUCCESS;
 995
 996         /* Wait for the command to be returned. */
 997         if (wait) {
 998                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
 999                         ql_log(ql_log_warn, vha, 0x8006,
1000                             "Abort handler timed out cmd=%p.\n", cmd);
1001                         ret = FAILED;
1002                 }
1003         }
1004
1005         ql_log(ql_log_info, vha, 0x801c,
1006             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1007             vha->host_no, id, lun, wait, ret);
1008
1009         return ret;
1010 }
1011
1012 int
1013 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1014         uint64_t l, enum nexus_wait_type type)
1015 {
1016         int cnt, match, status;
1017         unsigned long flags;
1018         struct qla_hw_data *ha = vha->hw;
1019         struct req_que *req;
1020         srb_t *sp;
1021         struct scsi_cmnd *cmd;
1022
1023         status = QLA_SUCCESS;
1024
1025         spin_lock_irqsave(&ha->hardware_lock, flags);
1026         req = vha->req;
1027         for (cnt = 1; status == QLA_SUCCESS &&
1028                 cnt < req->num_outstanding_cmds; cnt++) {
1029                 sp = req->outstanding_cmds[cnt];
1030                 if (!sp)
1031                         continue;
1032                 if (sp->type != SRB_SCSI_CMD)
1033                         continue;
1034                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1035                         continue;
1036                 match = 0;
1037                 cmd = GET_CMD_SP(sp);
1038                 switch (type) {
1039                 case WAIT_HOST:
1040                         match = 1;
1041                         break;
1042                 case WAIT_TARGET:
1043                         match = cmd->device->id == t;
1044                         break;
1045                 case WAIT_LUN:
1046                         match = (cmd->device->id == t &&
1047                                 cmd->device->lun == l);
1048                         break;
1049                 }
1050                 if (!match)
1051                         continue;
1052
1053                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1054                 status = qla2x00_eh_wait_on_command(cmd);
1055                 spin_lock_irqsave(&ha->hardware_lock, flags);
1056         }
1057         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1058
1059         return status;
1060 }
1061
1062 static char *reset_errors[] = {
1063         "HBA not online",
1064         "HBA not ready",
1065         "Task management failed",
1066         "Waiting for command completions",
1067 };
1068
1069 static int
1070 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1071     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1072 {
1073         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1074         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1075         int err;
1076
1077         if (!fcport) {
1078                 return FAILED;
1079         }
1080
1081         err = fc_block_scsi_eh(cmd);
1082         if (err != 0)
1083                 return err;
1084
1085         ql_log(ql_log_info, vha, 0x8009,
1086             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1087             cmd->device->id, cmd->device->lun, cmd);
1088
1089         err = 0;
1090         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1091                 ql_log(ql_log_warn, vha, 0x800a,
1092                     "Wait for hba online failed for cmd=%p.\n", cmd);
1093                 goto eh_reset_failed;
1094         }
1095         err = 2;
1096         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1097                 != QLA_SUCCESS) {
1098                 ql_log(ql_log_warn, vha, 0x800c,
1099                     "do_reset failed for cmd=%p.\n", cmd);
1100                 goto eh_reset_failed;
1101         }
1102         err = 3;
1103         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1104             cmd->device->lun, type) != QLA_SUCCESS) {
1105                 ql_log(ql_log_warn, vha, 0x800d,
1106                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1107                 goto eh_reset_failed;
1108         }
1109
1110         ql_log(ql_log_info, vha, 0x800e,
1111             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1112             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1113
1114         return SUCCESS;
1115
1116 eh_reset_failed:
1117         ql_log(ql_log_info, vha, 0x800f,
1118             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1119             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1120             cmd);
1121         return FAILED;
1122 }
1123
1124 static int
1125 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1126 {
1127         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1128         struct qla_hw_data *ha = vha->hw;
1129
1130         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1131             ha->isp_ops->lun_reset);
1132 }
1133
1134 static int
1135 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1136 {
1137         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1138         struct qla_hw_data *ha = vha->hw;
1139
1140         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1141             ha->isp_ops->target_reset);
1142 }
1143
1144 /**************************************************************************
1145 * qla2xxx_eh_bus_reset
1146 *
1147 * Description:
1148 *    The bus reset function will reset the bus and abort any executing
1149 *    commands.
1150 *
1151 * Input:
1152 *    cmd = Linux SCSI command packet of the command that cause the
1153 *          bus reset.
1154 *
1155 * Returns:
1156 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1157 *
1158 **************************************************************************/
1159 static int
1160 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1161 {
1162         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1163         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1164         int ret = FAILED;
1165         unsigned int id;
1166         uint64_t lun;
1167
1168         id = cmd->device->id;
1169         lun = cmd->device->lun;
1170
1171         if (!fcport) {
1172                 return ret;
1173         }
1174
1175         ret = fc_block_scsi_eh(cmd);
1176         if (ret != 0)
1177                 return ret;
1178         ret = FAILED;
1179
1180         ql_log(ql_log_info, vha, 0x8012,
1181             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1182
1183         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1184                 ql_log(ql_log_fatal, vha, 0x8013,
1185                     "Wait for hba online failed board disabled.\n");
1186                 goto eh_bus_reset_done;
1187         }
1188
1189         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1190                 ret = SUCCESS;
1191
1192         if (ret == FAILED)
1193                 goto eh_bus_reset_done;
1194
1195         /* Flush outstanding commands. */
1196         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1197             QLA_SUCCESS) {
1198                 ql_log(ql_log_warn, vha, 0x8014,
1199                     "Wait for pending commands failed.\n");
1200                 ret = FAILED;
1201         }
1202
1203 eh_bus_reset_done:
1204         ql_log(ql_log_warn, vha, 0x802b,
1205             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1206             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1207
1208         return ret;
1209 }
1210
1211 /**************************************************************************
1212 * qla2xxx_eh_host_reset
1213 *
1214 * Description:
1215 *    The reset function will reset the Adapter.
1216 *
1217 * Input:
1218 *      cmd = Linux SCSI command packet of the command that cause the
1219 *            adapter reset.
1220 *
1221 * Returns:
1222 *      Either SUCCESS or FAILED.
1223 *
1224 * Note:
1225 **************************************************************************/
1226 static int
1227 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1228 {
1229         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1230         struct qla_hw_data *ha = vha->hw;
1231         int ret = FAILED;
1232         unsigned int id;
1233         uint64_t lun;
1234         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1235
1236         id = cmd->device->id;
1237         lun = cmd->device->lun;
1238
1239         ql_log(ql_log_info, vha, 0x8018,
1240             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1241
1242         /*
1243          * No point in issuing another reset if one is active.  Also do not
1244          * attempt a reset if we are updating flash.
1245          */
1246         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1247                 goto eh_host_reset_lock;
1248
1249         if (vha != base_vha) {
1250                 if (qla2x00_vp_abort_isp(vha))
1251                         goto eh_host_reset_lock;
1252         } else {
1253                 if (IS_P3P_TYPE(vha->hw)) {
1254                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1255                                 /* Ctx reset success */
1256                                 ret = SUCCESS;
1257                                 goto eh_host_reset_lock;
1258                         }
1259                         /* fall thru if ctx reset failed */
1260                 }
1261                 if (ha->wq)
1262                         flush_workqueue(ha->wq);
1263
1264                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1265                 if (ha->isp_ops->abort_isp(base_vha)) {
1266                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1267                         /* failed. schedule dpc to try */
1268                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1269
1270                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1271                                 ql_log(ql_log_warn, vha, 0x802a,
1272                                     "wait for hba online failed.\n");
1273                                 goto eh_host_reset_lock;
1274                         }
1275                 }
1276                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1277         }
1278
1279         /* Waiting for command to be returned to OS.*/
1280         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1281                 QLA_SUCCESS)
1282                 ret = SUCCESS;
1283
1284 eh_host_reset_lock:
1285         ql_log(ql_log_info, vha, 0x8017,
1286             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1287             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1288
1289         return ret;
1290 }
1291
1292 /*
1293 * qla2x00_loop_reset
1294 *      Issue loop reset.
1295 *
1296 * Input:
1297 *      ha = adapter block pointer.
1298 *
1299 * Returns:
1300 *      0 = success
1301 */
1302 int
1303 qla2x00_loop_reset(scsi_qla_host_t *vha)
1304 {
1305         int ret;
1306         struct fc_port *fcport;
1307         struct qla_hw_data *ha = vha->hw;
1308
1309         if (IS_QLAFX00(ha)) {
1310                 return qlafx00_loop_reset(vha);
1311         }
1312
1313         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1314                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1315                         if (fcport->port_type != FCT_TARGET)
1316                                 continue;
1317
1318                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1319                         if (ret != QLA_SUCCESS) {
1320                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1321                                     "Bus Reset failed: Reset=%d "
1322                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1323                         }
1324                 }
1325         }
1326
1327
1328         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1329                 atomic_set(&vha->loop_state, LOOP_DOWN);
1330                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1331                 qla2x00_mark_all_devices_lost(vha, 0);
1332                 ret = qla2x00_full_login_lip(vha);
1333                 if (ret != QLA_SUCCESS) {
1334                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1335                             "full_login_lip=%d.\n", ret);
1336                 }
1337         }
1338
1339         if (ha->flags.enable_lip_reset) {
1340                 ret = qla2x00_lip_reset(vha);
1341                 if (ret != QLA_SUCCESS)
1342                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1343                             "lip_reset failed (%d).\n", ret);
1344         }
1345
1346         /* Issue marker command only when we are going to start the I/O */
1347         vha->marker_needed = 1;
1348
1349         return QLA_SUCCESS;
1350 }
1351
1352 void
1353 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1354 {
1355         int que, cnt;
1356         unsigned long flags;
1357         srb_t *sp;
1358         struct qla_hw_data *ha = vha->hw;
1359         struct req_que *req;
1360
1361         qlt_host_reset_handler(ha);
1362
1363         spin_lock_irqsave(&ha->hardware_lock, flags);
1364         for (que = 0; que < ha->max_req_queues; que++) {
1365                 req = ha->req_q_map[que];
1366                 if (!req)
1367                         continue;
1368                 if (!req->outstanding_cmds)
1369                         continue;
1370                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1371                         sp = req->outstanding_cmds[cnt];
1372                         if (sp) {
1373                                 req->outstanding_cmds[cnt] = NULL;
1374                                 sp->done(vha, sp, res);
1375                         }
1376                 }
1377         }
1378         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1379 }
1380
1381 static int
1382 qla2xxx_slave_alloc(struct scsi_device *sdev)
1383 {
1384         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1385
1386         if (!rport || fc_remote_port_chkready(rport))
1387                 return -ENXIO;
1388
1389         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1390
1391         return 0;
1392 }
1393
1394 static int
1395 qla2xxx_slave_configure(struct scsi_device *sdev)
1396 {
1397         scsi_qla_host_t *vha = shost_priv(sdev->host);
1398         struct req_que *req = vha->req;
1399
1400         if (IS_T10_PI_CAPABLE(vha->hw))
1401                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1402
1403         scsi_change_queue_depth(sdev, req->max_q_depth);
1404         return 0;
1405 }
1406
1407 static void
1408 qla2xxx_slave_destroy(struct scsi_device *sdev)
1409 {
1410         sdev->hostdata = NULL;
1411 }
1412
1413 /**
1414  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1415  * @ha: HA context
1416  *
1417  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1418  * supported addressing method.
1419  */
1420 static void
1421 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1422 {
1423         /* Assume a 32bit DMA mask. */
1424         ha->flags.enable_64bit_addressing = 0;
1425
1426         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1427                 /* Any upper-dword bits set? */
1428                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1429                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1430                         /* Ok, a 64bit DMA mask is applicable. */
1431                         ha->flags.enable_64bit_addressing = 1;
1432                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1433                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1434                         return;
1435                 }
1436         }
1437
1438         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1439         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1440 }
1441
1442 static void
1443 qla2x00_enable_intrs(struct qla_hw_data *ha)
1444 {
1445         unsigned long flags = 0;
1446         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1447
1448         spin_lock_irqsave(&ha->hardware_lock, flags);
1449         ha->interrupts_on = 1;
1450         /* enable risc and host interrupts */
1451         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1452         RD_REG_WORD(&reg->ictrl);
1453         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1454
1455 }
1456
1457 static void
1458 qla2x00_disable_intrs(struct qla_hw_data *ha)
1459 {
1460         unsigned long flags = 0;
1461         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1462
1463         spin_lock_irqsave(&ha->hardware_lock, flags);
1464         ha->interrupts_on = 0;
1465         /* disable risc and host interrupts */
1466         WRT_REG_WORD(&reg->ictrl, 0);
1467         RD_REG_WORD(&reg->ictrl);
1468         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1469 }
1470
1471 static void
1472 qla24xx_enable_intrs(struct qla_hw_data *ha)
1473 {
1474         unsigned long flags = 0;
1475         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1476
1477         spin_lock_irqsave(&ha->hardware_lock, flags);
1478         ha->interrupts_on = 1;
1479         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1480         RD_REG_DWORD(&reg->ictrl);
1481         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1482 }
1483
1484 static void
1485 qla24xx_disable_intrs(struct qla_hw_data *ha)
1486 {
1487         unsigned long flags = 0;
1488         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1489
1490         if (IS_NOPOLLING_TYPE(ha))
1491                 return;
1492         spin_lock_irqsave(&ha->hardware_lock, flags);
1493         ha->interrupts_on = 0;
1494         WRT_REG_DWORD(&reg->ictrl, 0);
1495         RD_REG_DWORD(&reg->ictrl);
1496         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1497 }
1498
1499 static int
1500 qla2x00_iospace_config(struct qla_hw_data *ha)
1501 {
1502         resource_size_t pio;
1503         uint16_t msix;
1504         int cpus;
1505
1506         if (pci_request_selected_regions(ha->pdev, ha->bars,
1507             QLA2XXX_DRIVER_NAME)) {
1508                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1509                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1510                     pci_name(ha->pdev));
1511                 goto iospace_error_exit;
1512         }
1513         if (!(ha->bars & 1))
1514                 goto skip_pio;
1515
1516         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1517         pio = pci_resource_start(ha->pdev, 0);
1518         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1519                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1520                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1521                             "Invalid pci I/O region size (%s).\n",
1522                             pci_name(ha->pdev));
1523                         pio = 0;
1524                 }
1525         } else {
1526                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1527                     "Region #0 no a PIO resource (%s).\n",
1528                     pci_name(ha->pdev));
1529                 pio = 0;
1530         }
1531         ha->pio_address = pio;
1532         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1533             "PIO address=%llu.\n",
1534             (unsigned long long)ha->pio_address);
1535
1536 skip_pio:
1537         /* Use MMIO operations for all accesses. */
1538         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1539                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1540                     "Region #1 not an MMIO resource (%s), aborting.\n",
1541                     pci_name(ha->pdev));
1542                 goto iospace_error_exit;
1543         }
1544         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1545                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1546                     "Invalid PCI mem region size (%s), aborting.\n",
1547                     pci_name(ha->pdev));
1548                 goto iospace_error_exit;
1549         }
1550
1551         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1552         if (!ha->iobase) {
1553                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1554                     "Cannot remap MMIO (%s), aborting.\n",
1555                     pci_name(ha->pdev));
1556                 goto iospace_error_exit;
1557         }
1558
1559         /* Determine queue resources */
1560         ha->max_req_queues = ha->max_rsp_queues = 1;
1561         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1562                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1563                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1564                 goto mqiobase_exit;
1565
1566         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1567                         pci_resource_len(ha->pdev, 3));
1568         if (ha->mqiobase) {
1569                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1570                     "MQIO Base=%p.\n", ha->mqiobase);
1571                 /* Read MSIX vector size of the board */
1572                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1573                 ha->msix_count = msix;
1574                 /* Max queues are bounded by available msix vectors */
1575                 /* queue 0 uses two msix vectors */
1576                 if (ql2xmultique_tag) {
1577                         cpus = num_online_cpus();
1578                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1579                                 (cpus + 1) : (ha->msix_count - 1);
1580                         ha->max_req_queues = 2;
1581                 } else if (ql2xmaxqueues > 1) {
1582                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1583                             QLA_MQ_SIZE : ql2xmaxqueues;
1584                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1585                             "QoS mode set, max no of request queues:%d.\n",
1586                             ha->max_req_queues);
1587                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1588                             "QoS mode set, max no of request queues:%d.\n",
1589                             ha->max_req_queues);
1590                 }
1591                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1592                     "MSI-X vector count: %d.\n", msix);
1593         } else
1594                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1595                     "BAR 3 not enabled.\n");
1596
1597 mqiobase_exit:
1598         ha->msix_count = ha->max_rsp_queues + 1;
1599         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1600             "MSIX Count:%d.\n", ha->msix_count);
1601         return (0);
1602
1603 iospace_error_exit:
1604         return (-ENOMEM);
1605 }
1606
1607
1608 static int
1609 qla83xx_iospace_config(struct qla_hw_data *ha)
1610 {
1611         uint16_t msix;
1612         int cpus;
1613
1614         if (pci_request_selected_regions(ha->pdev, ha->bars,
1615             QLA2XXX_DRIVER_NAME)) {
1616                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1617                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1618                     pci_name(ha->pdev));
1619
1620                 goto iospace_error_exit;
1621         }
1622
1623         /* Use MMIO operations for all accesses. */
1624         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1625                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1626                     "Invalid pci I/O region size (%s).\n",
1627                     pci_name(ha->pdev));
1628                 goto iospace_error_exit;
1629         }
1630         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1631                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1632                     "Invalid PCI mem region size (%s), aborting\n",
1633                         pci_name(ha->pdev));
1634                 goto iospace_error_exit;
1635         }
1636
1637         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1638         if (!ha->iobase) {
1639                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1640                     "Cannot remap MMIO (%s), aborting.\n",
1641                     pci_name(ha->pdev));
1642                 goto iospace_error_exit;
1643         }
1644
1645         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1646         /* 83XX 26XX always use MQ type access for queues
1647          * - mbar 2, a.k.a region 4 */
1648         ha->max_req_queues = ha->max_rsp_queues = 1;
1649         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1650                         pci_resource_len(ha->pdev, 4));
1651
1652         if (!ha->mqiobase) {
1653                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1654                     "BAR2/region4 not enabled\n");
1655                 goto mqiobase_exit;
1656         }
1657
1658         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1659                         pci_resource_len(ha->pdev, 2));
1660         if (ha->msixbase) {
1661                 /* Read MSIX vector size of the board */
1662                 pci_read_config_word(ha->pdev,
1663                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1664                 ha->msix_count = msix;
1665                 /* Max queues are bounded by available msix vectors */
1666                 /* queue 0 uses two msix vectors */
1667                 if (ql2xmultique_tag) {
1668                         cpus = num_online_cpus();
1669                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1670                                 (cpus + 1) : (ha->msix_count - 1);
1671                         ha->max_req_queues = 2;
1672                 } else if (ql2xmaxqueues > 1) {
1673                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1674                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1675                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1676                             "QoS mode set, max no of request queues:%d.\n",
1677                             ha->max_req_queues);
1678                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1679                             "QoS mode set, max no of request queues:%d.\n",
1680                             ha->max_req_queues);
1681                 }
1682                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1683                     "MSI-X vector count: %d.\n", msix);
1684         } else
1685                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1686                     "BAR 1 not enabled.\n");
1687
1688 mqiobase_exit:
1689         ha->msix_count = ha->max_rsp_queues + 1;
1690
1691         qlt_83xx_iospace_config(ha);
1692
1693         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1694             "MSIX Count:%d.\n", ha->msix_count);
1695         return 0;
1696
1697 iospace_error_exit:
1698         return -ENOMEM;
1699 }
1700
1701 static struct isp_operations qla2100_isp_ops = {
1702         .pci_config             = qla2100_pci_config,
1703         .reset_chip             = qla2x00_reset_chip,
1704         .chip_diag              = qla2x00_chip_diag,
1705         .config_rings           = qla2x00_config_rings,
1706         .reset_adapter          = qla2x00_reset_adapter,
1707         .nvram_config           = qla2x00_nvram_config,
1708         .update_fw_options      = qla2x00_update_fw_options,
1709         .load_risc              = qla2x00_load_risc,
1710         .pci_info_str           = qla2x00_pci_info_str,
1711         .fw_version_str         = qla2x00_fw_version_str,
1712         .intr_handler           = qla2100_intr_handler,
1713         .enable_intrs           = qla2x00_enable_intrs,
1714         .disable_intrs          = qla2x00_disable_intrs,
1715         .abort_command          = qla2x00_abort_command,
1716         .target_reset           = qla2x00_abort_target,
1717         .lun_reset              = qla2x00_lun_reset,
1718         .fabric_login           = qla2x00_login_fabric,
1719         .fabric_logout          = qla2x00_fabric_logout,
1720         .calc_req_entries       = qla2x00_calc_iocbs_32,
1721         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1722         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1723         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1724         .read_nvram             = qla2x00_read_nvram_data,
1725         .write_nvram            = qla2x00_write_nvram_data,
1726         .fw_dump                = qla2100_fw_dump,
1727         .beacon_on              = NULL,
1728         .beacon_off             = NULL,
1729         .beacon_blink           = NULL,
1730         .read_optrom            = qla2x00_read_optrom_data,
1731         .write_optrom           = qla2x00_write_optrom_data,
1732         .get_flash_version      = qla2x00_get_flash_version,
1733         .start_scsi             = qla2x00_start_scsi,
1734         .abort_isp              = qla2x00_abort_isp,
1735         .iospace_config         = qla2x00_iospace_config,
1736         .initialize_adapter     = qla2x00_initialize_adapter,
1737 };
1738
1739 static struct isp_operations qla2300_isp_ops = {
1740         .pci_config             = qla2300_pci_config,
1741         .reset_chip             = qla2x00_reset_chip,
1742         .chip_diag              = qla2x00_chip_diag,
1743         .config_rings           = qla2x00_config_rings,
1744         .reset_adapter          = qla2x00_reset_adapter,
1745         .nvram_config           = qla2x00_nvram_config,
1746         .update_fw_options      = qla2x00_update_fw_options,
1747         .load_risc              = qla2x00_load_risc,
1748         .pci_info_str           = qla2x00_pci_info_str,
1749         .fw_version_str         = qla2x00_fw_version_str,
1750         .intr_handler           = qla2300_intr_handler,
1751         .enable_intrs           = qla2x00_enable_intrs,
1752         .disable_intrs          = qla2x00_disable_intrs,
1753         .abort_command          = qla2x00_abort_command,
1754         .target_reset           = qla2x00_abort_target,
1755         .lun_reset              = qla2x00_lun_reset,
1756         .fabric_login           = qla2x00_login_fabric,
1757         .fabric_logout          = qla2x00_fabric_logout,
1758         .calc_req_entries       = qla2x00_calc_iocbs_32,
1759         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1760         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1761         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1762         .read_nvram             = qla2x00_read_nvram_data,
1763         .write_nvram            = qla2x00_write_nvram_data,
1764         .fw_dump                = qla2300_fw_dump,
1765         .beacon_on              = qla2x00_beacon_on,
1766         .beacon_off             = qla2x00_beacon_off,
1767         .beacon_blink           = qla2x00_beacon_blink,
1768         .read_optrom            = qla2x00_read_optrom_data,
1769         .write_optrom           = qla2x00_write_optrom_data,
1770         .get_flash_version      = qla2x00_get_flash_version,
1771         .start_scsi             = qla2x00_start_scsi,
1772         .abort_isp              = qla2x00_abort_isp,
1773         .iospace_config         = qla2x00_iospace_config,
1774         .initialize_adapter     = qla2x00_initialize_adapter,
1775 };
1776
1777 static struct isp_operations qla24xx_isp_ops = {
1778         .pci_config             = qla24xx_pci_config,
1779         .reset_chip             = qla24xx_reset_chip,
1780         .chip_diag              = qla24xx_chip_diag,
1781         .config_rings           = qla24xx_config_rings,
1782         .reset_adapter          = qla24xx_reset_adapter,
1783         .nvram_config           = qla24xx_nvram_config,
1784         .update_fw_options      = qla24xx_update_fw_options,
1785         .load_risc              = qla24xx_load_risc,
1786         .pci_info_str           = qla24xx_pci_info_str,
1787         .fw_version_str         = qla24xx_fw_version_str,
1788         .intr_handler           = qla24xx_intr_handler,
1789         .enable_intrs           = qla24xx_enable_intrs,
1790         .disable_intrs          = qla24xx_disable_intrs,
1791         .abort_command          = qla24xx_abort_command,
1792         .target_reset           = qla24xx_abort_target,
1793         .lun_reset              = qla24xx_lun_reset,
1794         .fabric_login           = qla24xx_login_fabric,
1795         .fabric_logout          = qla24xx_fabric_logout,
1796         .calc_req_entries       = NULL,
1797         .build_iocbs            = NULL,
1798         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1799         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1800         .read_nvram             = qla24xx_read_nvram_data,
1801         .write_nvram            = qla24xx_write_nvram_data,
1802         .fw_dump                = qla24xx_fw_dump,
1803         .beacon_on              = qla24xx_beacon_on,
1804         .beacon_off             = qla24xx_beacon_off,
1805         .beacon_blink           = qla24xx_beacon_blink,
1806         .read_optrom            = qla24xx_read_optrom_data,
1807         .write_optrom           = qla24xx_write_optrom_data,
1808         .get_flash_version      = qla24xx_get_flash_version,
1809         .start_scsi             = qla24xx_start_scsi,
1810         .abort_isp              = qla2x00_abort_isp,
1811         .iospace_config         = qla2x00_iospace_config,
1812         .initialize_adapter     = qla2x00_initialize_adapter,
1813 };
1814
1815 static struct isp_operations qla25xx_isp_ops = {
1816         .pci_config             = qla25xx_pci_config,
1817         .reset_chip             = qla24xx_reset_chip,
1818         .chip_diag              = qla24xx_chip_diag,
1819         .config_rings           = qla24xx_config_rings,
1820         .reset_adapter          = qla24xx_reset_adapter,
1821         .nvram_config           = qla24xx_nvram_config,
1822         .update_fw_options      = qla24xx_update_fw_options,
1823         .load_risc              = qla24xx_load_risc,
1824         .pci_info_str           = qla24xx_pci_info_str,
1825         .fw_version_str         = qla24xx_fw_version_str,
1826         .intr_handler           = qla24xx_intr_handler,
1827         .enable_intrs           = qla24xx_enable_intrs,
1828         .disable_intrs          = qla24xx_disable_intrs,
1829         .abort_command          = qla24xx_abort_command,
1830         .target_reset           = qla24xx_abort_target,
1831         .lun_reset              = qla24xx_lun_reset,
1832         .fabric_login           = qla24xx_login_fabric,
1833         .fabric_logout          = qla24xx_fabric_logout,
1834         .calc_req_entries       = NULL,
1835         .build_iocbs            = NULL,
1836         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1837         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1838         .read_nvram             = qla25xx_read_nvram_data,
1839         .write_nvram            = qla25xx_write_nvram_data,
1840         .fw_dump                = qla25xx_fw_dump,
1841         .beacon_on              = qla24xx_beacon_on,
1842         .beacon_off             = qla24xx_beacon_off,
1843         .beacon_blink           = qla24xx_beacon_blink,
1844         .read_optrom            = qla25xx_read_optrom_data,
1845         .write_optrom           = qla24xx_write_optrom_data,
1846         .get_flash_version      = qla24xx_get_flash_version,
1847         .start_scsi             = qla24xx_dif_start_scsi,
1848         .abort_isp              = qla2x00_abort_isp,
1849         .iospace_config         = qla2x00_iospace_config,
1850         .initialize_adapter     = qla2x00_initialize_adapter,
1851 };
1852
1853 static struct isp_operations qla81xx_isp_ops = {
1854         .pci_config             = qla25xx_pci_config,
1855         .reset_chip             = qla24xx_reset_chip,
1856         .chip_diag              = qla24xx_chip_diag,
1857         .config_rings           = qla24xx_config_rings,
1858         .reset_adapter          = qla24xx_reset_adapter,
1859         .nvram_config           = qla81xx_nvram_config,
1860         .update_fw_options      = qla81xx_update_fw_options,
1861         .load_risc              = qla81xx_load_risc,
1862         .pci_info_str           = qla24xx_pci_info_str,
1863         .fw_version_str         = qla24xx_fw_version_str,
1864         .intr_handler           = qla24xx_intr_handler,
1865         .enable_intrs           = qla24xx_enable_intrs,
1866         .disable_intrs          = qla24xx_disable_intrs,
1867         .abort_command          = qla24xx_abort_command,
1868         .target_reset           = qla24xx_abort_target,
1869         .lun_reset              = qla24xx_lun_reset,
1870         .fabric_login           = qla24xx_login_fabric,
1871         .fabric_logout          = qla24xx_fabric_logout,
1872         .calc_req_entries       = NULL,
1873         .build_iocbs            = NULL,
1874         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1875         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1876         .read_nvram             = NULL,
1877         .write_nvram            = NULL,
1878         .fw_dump                = qla81xx_fw_dump,
1879         .beacon_on              = qla24xx_beacon_on,
1880         .beacon_off             = qla24xx_beacon_off,
1881         .beacon_blink           = qla83xx_beacon_blink,
1882         .read_optrom            = qla25xx_read_optrom_data,
1883         .write_optrom           = qla24xx_write_optrom_data,
1884         .get_flash_version      = qla24xx_get_flash_version,
1885         .start_scsi             = qla24xx_dif_start_scsi,
1886         .abort_isp              = qla2x00_abort_isp,
1887         .iospace_config         = qla2x00_iospace_config,
1888         .initialize_adapter     = qla2x00_initialize_adapter,
1889 };
1890
1891 static struct isp_operations qla82xx_isp_ops = {
1892         .pci_config             = qla82xx_pci_config,
1893         .reset_chip             = qla82xx_reset_chip,
1894         .chip_diag              = qla24xx_chip_diag,
1895         .config_rings           = qla82xx_config_rings,
1896         .reset_adapter          = qla24xx_reset_adapter,
1897         .nvram_config           = qla81xx_nvram_config,
1898         .update_fw_options      = qla24xx_update_fw_options,
1899         .load_risc              = qla82xx_load_risc,
1900         .pci_info_str           = qla24xx_pci_info_str,
1901         .fw_version_str         = qla24xx_fw_version_str,
1902         .intr_handler           = qla82xx_intr_handler,
1903         .enable_intrs           = qla82xx_enable_intrs,
1904         .disable_intrs          = qla82xx_disable_intrs,
1905         .abort_command          = qla24xx_abort_command,
1906         .target_reset           = qla24xx_abort_target,
1907         .lun_reset              = qla24xx_lun_reset,
1908         .fabric_login           = qla24xx_login_fabric,
1909         .fabric_logout          = qla24xx_fabric_logout,
1910         .calc_req_entries       = NULL,
1911         .build_iocbs            = NULL,
1912         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1913         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1914         .read_nvram             = qla24xx_read_nvram_data,
1915         .write_nvram            = qla24xx_write_nvram_data,
1916         .fw_dump                = qla82xx_fw_dump,
1917         .beacon_on              = qla82xx_beacon_on,
1918         .beacon_off             = qla82xx_beacon_off,
1919         .beacon_blink           = NULL,
1920         .read_optrom            = qla82xx_read_optrom_data,
1921         .write_optrom           = qla82xx_write_optrom_data,
1922         .get_flash_version      = qla82xx_get_flash_version,
1923         .start_scsi             = qla82xx_start_scsi,
1924         .abort_isp              = qla82xx_abort_isp,
1925         .iospace_config         = qla82xx_iospace_config,
1926         .initialize_adapter     = qla2x00_initialize_adapter,
1927 };
1928
1929 static struct isp_operations qla8044_isp_ops = {
1930         .pci_config             = qla82xx_pci_config,
1931         .reset_chip             = qla82xx_reset_chip,
1932         .chip_diag              = qla24xx_chip_diag,
1933         .config_rings           = qla82xx_config_rings,
1934         .reset_adapter          = qla24xx_reset_adapter,
1935         .nvram_config           = qla81xx_nvram_config,
1936         .update_fw_options      = qla24xx_update_fw_options,
1937         .load_risc              = qla82xx_load_risc,
1938         .pci_info_str           = qla24xx_pci_info_str,
1939         .fw_version_str         = qla24xx_fw_version_str,
1940         .intr_handler           = qla8044_intr_handler,
1941         .enable_intrs           = qla82xx_enable_intrs,
1942         .disable_intrs          = qla82xx_disable_intrs,
1943         .abort_command          = qla24xx_abort_command,
1944         .target_reset           = qla24xx_abort_target,
1945         .lun_reset              = qla24xx_lun_reset,
1946         .fabric_login           = qla24xx_login_fabric,
1947         .fabric_logout          = qla24xx_fabric_logout,
1948         .calc_req_entries       = NULL,
1949         .build_iocbs            = NULL,
1950         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1951         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1952         .read_nvram             = NULL,
1953         .write_nvram            = NULL,
1954         .fw_dump                = qla8044_fw_dump,
1955         .beacon_on              = qla82xx_beacon_on,
1956         .beacon_off             = qla82xx_beacon_off,
1957         .beacon_blink           = NULL,
1958         .read_optrom            = qla8044_read_optrom_data,
1959         .write_optrom           = qla8044_write_optrom_data,
1960         .get_flash_version      = qla82xx_get_flash_version,
1961         .start_scsi             = qla82xx_start_scsi,
1962         .abort_isp              = qla8044_abort_isp,
1963         .iospace_config         = qla82xx_iospace_config,
1964         .initialize_adapter     = qla2x00_initialize_adapter,
1965 };
1966
1967 static struct isp_operations qla83xx_isp_ops = {
1968         .pci_config             = qla25xx_pci_config,
1969         .reset_chip             = qla24xx_reset_chip,
1970         .chip_diag              = qla24xx_chip_diag,
1971         .config_rings           = qla24xx_config_rings,
1972         .reset_adapter          = qla24xx_reset_adapter,
1973         .nvram_config           = qla81xx_nvram_config,
1974         .update_fw_options      = qla81xx_update_fw_options,
1975         .load_risc              = qla81xx_load_risc,
1976         .pci_info_str           = qla24xx_pci_info_str,
1977         .fw_version_str         = qla24xx_fw_version_str,
1978         .intr_handler           = qla24xx_intr_handler,
1979         .enable_intrs           = qla24xx_enable_intrs,
1980         .disable_intrs          = qla24xx_disable_intrs,
1981         .abort_command          = qla24xx_abort_command,
1982         .target_reset           = qla24xx_abort_target,
1983         .lun_reset              = qla24xx_lun_reset,
1984         .fabric_login           = qla24xx_login_fabric,
1985         .fabric_logout          = qla24xx_fabric_logout,
1986         .calc_req_entries       = NULL,
1987         .build_iocbs            = NULL,
1988         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1989         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1990         .read_nvram             = NULL,
1991         .write_nvram            = NULL,
1992         .fw_dump                = qla83xx_fw_dump,
1993         .beacon_on              = qla24xx_beacon_on,
1994         .beacon_off             = qla24xx_beacon_off,
1995         .beacon_blink           = qla83xx_beacon_blink,
1996         .read_optrom            = qla25xx_read_optrom_data,
1997         .write_optrom           = qla24xx_write_optrom_data,
1998         .get_flash_version      = qla24xx_get_flash_version,
1999         .start_scsi             = qla24xx_dif_start_scsi,
2000         .abort_isp              = qla2x00_abort_isp,
2001         .iospace_config         = qla83xx_iospace_config,
2002         .initialize_adapter     = qla2x00_initialize_adapter,
2003 };
2004
2005 static struct isp_operations qlafx00_isp_ops = {
2006         .pci_config             = qlafx00_pci_config,
2007         .reset_chip             = qlafx00_soft_reset,
2008         .chip_diag              = qlafx00_chip_diag,
2009         .config_rings           = qlafx00_config_rings,
2010         .reset_adapter          = qlafx00_soft_reset,
2011         .nvram_config           = NULL,
2012         .update_fw_options      = NULL,
2013         .load_risc              = NULL,
2014         .pci_info_str           = qlafx00_pci_info_str,
2015         .fw_version_str         = qlafx00_fw_version_str,
2016         .intr_handler           = qlafx00_intr_handler,
2017         .enable_intrs           = qlafx00_enable_intrs,
2018         .disable_intrs          = qlafx00_disable_intrs,
2019         .abort_command          = qla24xx_async_abort_command,
2020         .target_reset           = qlafx00_abort_target,
2021         .lun_reset              = qlafx00_lun_reset,
2022         .fabric_login           = NULL,
2023         .fabric_logout          = NULL,
2024         .calc_req_entries       = NULL,
2025         .build_iocbs            = NULL,
2026         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2027         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2028         .read_nvram             = qla24xx_read_nvram_data,
2029         .write_nvram            = qla24xx_write_nvram_data,
2030         .fw_dump                = NULL,
2031         .beacon_on              = qla24xx_beacon_on,
2032         .beacon_off             = qla24xx_beacon_off,
2033         .beacon_blink           = NULL,
2034         .read_optrom            = qla24xx_read_optrom_data,
2035         .write_optrom           = qla24xx_write_optrom_data,
2036         .get_flash_version      = qla24xx_get_flash_version,
2037         .start_scsi             = qlafx00_start_scsi,
2038         .abort_isp              = qlafx00_abort_isp,
2039         .iospace_config         = qlafx00_iospace_config,
2040         .initialize_adapter     = qlafx00_initialize_adapter,
2041 };
2042
2043 static struct isp_operations qla27xx_isp_ops = {
2044         .pci_config             = qla25xx_pci_config,
2045         .reset_chip             = qla24xx_reset_chip,
2046         .chip_diag              = qla24xx_chip_diag,
2047         .config_rings           = qla24xx_config_rings,
2048         .reset_adapter          = qla24xx_reset_adapter,
2049         .nvram_config           = qla81xx_nvram_config,
2050         .update_fw_options      = qla81xx_update_fw_options,
2051         .load_risc              = qla81xx_load_risc,
2052         .pci_info_str           = qla24xx_pci_info_str,
2053         .fw_version_str         = qla24xx_fw_version_str,
2054         .intr_handler           = qla24xx_intr_handler,
2055         .enable_intrs           = qla24xx_enable_intrs,
2056         .disable_intrs          = qla24xx_disable_intrs,
2057         .abort_command          = qla24xx_abort_command,
2058         .target_reset           = qla24xx_abort_target,
2059         .lun_reset              = qla24xx_lun_reset,
2060         .fabric_login           = qla24xx_login_fabric,
2061         .fabric_logout          = qla24xx_fabric_logout,
2062         .calc_req_entries       = NULL,
2063         .build_iocbs            = NULL,
2064         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2065         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2066         .read_nvram             = NULL,
2067         .write_nvram            = NULL,
2068         .fw_dump                = qla27xx_fwdump,
2069         .beacon_on              = qla24xx_beacon_on,
2070         .beacon_off             = qla24xx_beacon_off,
2071         .beacon_blink           = qla83xx_beacon_blink,
2072         .read_optrom            = qla25xx_read_optrom_data,
2073         .write_optrom           = qla24xx_write_optrom_data,
2074         .get_flash_version      = qla24xx_get_flash_version,
2075         .start_scsi             = qla24xx_dif_start_scsi,
2076         .abort_isp              = qla2x00_abort_isp,
2077         .iospace_config         = qla83xx_iospace_config,
2078         .initialize_adapter     = qla2x00_initialize_adapter,
2079 };
2080
2081 static inline void
2082 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2083 {
2084         ha->device_type = DT_EXTENDED_IDS;
2085         switch (ha->pdev->device) {
2086         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2087                 ha->device_type |= DT_ISP2100;
2088                 ha->device_type &= ~DT_EXTENDED_IDS;
2089                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2090                 break;
2091         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2092                 ha->device_type |= DT_ISP2200;
2093                 ha->device_type &= ~DT_EXTENDED_IDS;
2094                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2095                 break;
2096         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2097                 ha->device_type |= DT_ISP2300;
2098                 ha->device_type |= DT_ZIO_SUPPORTED;
2099                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2100                 break;
2101         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2102                 ha->device_type |= DT_ISP2312;
2103                 ha->device_type |= DT_ZIO_SUPPORTED;
2104                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2105                 break;
2106         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2107                 ha->device_type |= DT_ISP2322;
2108                 ha->device_type |= DT_ZIO_SUPPORTED;
2109                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2110                     ha->pdev->subsystem_device == 0x0170)
2111                         ha->device_type |= DT_OEM_001;
2112                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2113                 break;
2114         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2115                 ha->device_type |= DT_ISP6312;
2116                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2117                 break;
2118         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2119                 ha->device_type |= DT_ISP6322;
2120                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2121                 break;
2122         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2123                 ha->device_type |= DT_ISP2422;
2124                 ha->device_type |= DT_ZIO_SUPPORTED;
2125                 ha->device_type |= DT_FWI2;
2126                 ha->device_type |= DT_IIDMA;
2127                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2128                 break;
2129         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2130                 ha->device_type |= DT_ISP2432;
2131                 ha->device_type |= DT_ZIO_SUPPORTED;
2132                 ha->device_type |= DT_FWI2;
2133                 ha->device_type |= DT_IIDMA;
2134                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2135                 break;
2136         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2137                 ha->device_type |= DT_ISP8432;
2138                 ha->device_type |= DT_ZIO_SUPPORTED;
2139                 ha->device_type |= DT_FWI2;
2140                 ha->device_type |= DT_IIDMA;
2141                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2142                 break;
2143         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2144                 ha->device_type |= DT_ISP5422;
2145                 ha->device_type |= DT_FWI2;
2146                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2147                 break;
2148         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2149                 ha->device_type |= DT_ISP5432;
2150                 ha->device_type |= DT_FWI2;
2151                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2152                 break;
2153         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2154                 ha->device_type |= DT_ISP2532;
2155                 ha->device_type |= DT_ZIO_SUPPORTED;
2156                 ha->device_type |= DT_FWI2;
2157                 ha->device_type |= DT_IIDMA;
2158                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2159                 break;
2160         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2161                 ha->device_type |= DT_ISP8001;
2162                 ha->device_type |= DT_ZIO_SUPPORTED;
2163                 ha->device_type |= DT_FWI2;
2164                 ha->device_type |= DT_IIDMA;
2165                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2166                 break;
2167         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2168                 ha->device_type |= DT_ISP8021;
2169                 ha->device_type |= DT_ZIO_SUPPORTED;
2170                 ha->device_type |= DT_FWI2;
2171                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2172                 /* Initialize 82XX ISP flags */
2173                 qla82xx_init_flags(ha);
2174                 break;
2175          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2176                 ha->device_type |= DT_ISP8044;
2177                 ha->device_type |= DT_ZIO_SUPPORTED;
2178                 ha->device_type |= DT_FWI2;
2179                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2180                 /* Initialize 82XX ISP flags */
2181                 qla82xx_init_flags(ha);
2182                 break;
2183         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2184                 ha->device_type |= DT_ISP2031;
2185                 ha->device_type |= DT_ZIO_SUPPORTED;
2186                 ha->device_type |= DT_FWI2;
2187                 ha->device_type |= DT_IIDMA;
2188                 ha->device_type |= DT_T10_PI;
2189                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2190                 break;
2191         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2192                 ha->device_type |= DT_ISP8031;
2193                 ha->device_type |= DT_ZIO_SUPPORTED;
2194                 ha->device_type |= DT_FWI2;
2195                 ha->device_type |= DT_IIDMA;
2196                 ha->device_type |= DT_T10_PI;
2197                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2198                 break;
2199         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2200                 ha->device_type |= DT_ISPFX00;
2201                 break;
2202         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2203                 ha->device_type |= DT_ISP2071;
2204                 ha->device_type |= DT_ZIO_SUPPORTED;
2205                 ha->device_type |= DT_FWI2;
2206                 ha->device_type |= DT_IIDMA;
2207                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2208                 break;
2209         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2210                 ha->device_type |= DT_ISP2271;
2211                 ha->device_type |= DT_ZIO_SUPPORTED;
2212                 ha->device_type |= DT_FWI2;
2213                 ha->device_type |= DT_IIDMA;
2214                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2215                 break;
2216         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2217                 ha->device_type |= DT_ISP2261;
2218                 ha->device_type |= DT_ZIO_SUPPORTED;
2219                 ha->device_type |= DT_FWI2;
2220                 ha->device_type |= DT_IIDMA;
2221                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2222                 break;
2223         }
2224
2225         if (IS_QLA82XX(ha))
2226                 ha->port_no = ha->portnum & 1;
2227         else {
2228                 /* Get adapter physical port no from interrupt pin register. */
2229                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2230                 if (IS_QLA27XX(ha))
2231                         ha->port_no--;
2232                 else
2233                         ha->port_no = !(ha->port_no & 1);
2234         }
2235
2236         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2237             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2238             ha->device_type, ha->port_no, ha->fw_srisc_address);
2239 }
2240
2241 static void
2242 qla2xxx_scan_start(struct Scsi_Host *shost)
2243 {
2244         scsi_qla_host_t *vha = shost_priv(shost);
2245
2246         if (vha->hw->flags.running_gold_fw)
2247                 return;
2248
2249         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2250         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2251         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2252         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2253 }
2254
2255 static int
2256 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2257 {
2258         scsi_qla_host_t *vha = shost_priv(shost);
2259
2260         if (test_bit(UNLOADING, &vha->dpc_flags))
2261                 return 1;
2262         if (!vha->host)
2263                 return 1;
2264         if (time > vha->hw->loop_reset_delay * HZ)
2265                 return 1;
2266
2267         return atomic_read(&vha->loop_state) == LOOP_READY;
2268 }
2269
2270 /*
2271  * PCI driver interface
2272  */
2273 static int
2274 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2275 {
2276         int     ret = -ENODEV;
2277         struct Scsi_Host *host;
2278         scsi_qla_host_t *base_vha = NULL;
2279         struct qla_hw_data *ha;
2280         char pci_info[30];
2281         char fw_str[30], wq_name[30];
2282         struct scsi_host_template *sht;
2283         int bars, mem_only = 0;
2284         uint16_t req_length = 0, rsp_length = 0;
2285         struct req_que *req = NULL;
2286         struct rsp_que *rsp = NULL;
2287         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2288         sht = &qla2xxx_driver_template;
2289         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2290             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2291             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2292             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2293             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2294             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2295             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2296             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2297             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2298             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2299             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2300             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2301             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2302             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2303             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2304                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2305                 mem_only = 1;
2306                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2307                     "Mem only adapter.\n");
2308         }
2309         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2310             "Bars=%d.\n", bars);
2311
2312         if (mem_only) {
2313                 if (pci_enable_device_mem(pdev))
2314                         goto probe_out;
2315         } else {
2316                 if (pci_enable_device(pdev))
2317                         goto probe_out;
2318         }
2319
2320         /* This may fail but that's ok */
2321         pci_enable_pcie_error_reporting(pdev);
2322
2323         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2324         if (!ha) {
2325                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2326                     "Unable to allocate memory for ha.\n");
2327                 goto probe_out;
2328         }
2329         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2330             "Memory allocated for ha=%p.\n", ha);
2331         ha->pdev = pdev;
2332         ha->tgt.enable_class_2 = ql2xenableclass2;
2333         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2334         spin_lock_init(&ha->tgt.q_full_lock);
2335
2336         /* Clear our data area */
2337         ha->bars = bars;
2338         ha->mem_only = mem_only;
2339         spin_lock_init(&ha->hardware_lock);
2340         spin_lock_init(&ha->vport_slock);
2341         mutex_init(&ha->selflogin_lock);
2342         mutex_init(&ha->optrom_mutex);
2343
2344         /* Set ISP-type information. */
2345         qla2x00_set_isp_flags(ha);
2346
2347         /* Set EEH reset type to fundamental if required by hba */
2348         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2349             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2350                 pdev->needs_freset = 1;
2351
2352         ha->prev_topology = 0;
2353         ha->init_cb_size = sizeof(init_cb_t);
2354         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2355         ha->optrom_size = OPTROM_SIZE_2300;
2356
2357         /* Assign ISP specific operations. */
2358         if (IS_QLA2100(ha)) {
2359                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2360                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2361                 req_length = REQUEST_ENTRY_CNT_2100;
2362                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2363                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2364                 ha->gid_list_info_size = 4;
2365                 ha->flash_conf_off = ~0;
2366                 ha->flash_data_off = ~0;
2367                 ha->nvram_conf_off = ~0;
2368                 ha->nvram_data_off = ~0;
2369                 ha->isp_ops = &qla2100_isp_ops;
2370         } else if (IS_QLA2200(ha)) {
2371                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2372                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2373                 req_length = REQUEST_ENTRY_CNT_2200;
2374                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2375                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2376                 ha->gid_list_info_size = 4;
2377                 ha->flash_conf_off = ~0;
2378                 ha->flash_data_off = ~0;
2379                 ha->nvram_conf_off = ~0;
2380                 ha->nvram_data_off = ~0;
2381                 ha->isp_ops = &qla2100_isp_ops;
2382         } else if (IS_QLA23XX(ha)) {
2383                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2384                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2385                 req_length = REQUEST_ENTRY_CNT_2200;
2386                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2387                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2388                 ha->gid_list_info_size = 6;
2389                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2390                         ha->optrom_size = OPTROM_SIZE_2322;
2391                 ha->flash_conf_off = ~0;
2392                 ha->flash_data_off = ~0;
2393                 ha->nvram_conf_off = ~0;
2394                 ha->nvram_data_off = ~0;
2395                 ha->isp_ops = &qla2300_isp_ops;
2396         } else if (IS_QLA24XX_TYPE(ha)) {
2397                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2398                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2399                 req_length = REQUEST_ENTRY_CNT_24XX;
2400                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2401                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2402                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2403                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2404                 ha->gid_list_info_size = 8;
2405                 ha->optrom_size = OPTROM_SIZE_24XX;
2406                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2407                 ha->isp_ops = &qla24xx_isp_ops;
2408                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2409                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2410                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2411                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2412         } else if (IS_QLA25XX(ha)) {
2413                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2414                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2415                 req_length = REQUEST_ENTRY_CNT_24XX;
2416                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2417                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2418                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2419                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2420                 ha->gid_list_info_size = 8;
2421                 ha->optrom_size = OPTROM_SIZE_25XX;
2422                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2423                 ha->isp_ops = &qla25xx_isp_ops;
2424                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2425                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2426                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2427                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2428         } else if (IS_QLA81XX(ha)) {
2429                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2430                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2431                 req_length = REQUEST_ENTRY_CNT_24XX;
2432                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2433                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2434                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2435                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2436                 ha->gid_list_info_size = 8;
2437                 ha->optrom_size = OPTROM_SIZE_81XX;
2438                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2439                 ha->isp_ops = &qla81xx_isp_ops;
2440                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2441                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2442                 ha->nvram_conf_off = ~0;
2443                 ha->nvram_data_off = ~0;
2444         } else if (IS_QLA82XX(ha)) {
2445                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2446                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2447                 req_length = REQUEST_ENTRY_CNT_82XX;
2448                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2449                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2450                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2451                 ha->gid_list_info_size = 8;
2452                 ha->optrom_size = OPTROM_SIZE_82XX;
2453                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2454                 ha->isp_ops = &qla82xx_isp_ops;
2455                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2456                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2457                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2458                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2459         } else if (IS_QLA8044(ha)) {
2460                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2461                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2462                 req_length = REQUEST_ENTRY_CNT_82XX;
2463                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2464                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2465                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2466                 ha->gid_list_info_size = 8;
2467                 ha->optrom_size = OPTROM_SIZE_83XX;
2468                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2469                 ha->isp_ops = &qla8044_isp_ops;
2470                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2471                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2472                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2473                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2474         } else if (IS_QLA83XX(ha)) {
2475                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2476                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2477                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2478                 req_length = REQUEST_ENTRY_CNT_83XX;
2479                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2480                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2481                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2482                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2483                 ha->gid_list_info_size = 8;
2484                 ha->optrom_size = OPTROM_SIZE_83XX;
2485                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2486                 ha->isp_ops = &qla83xx_isp_ops;
2487                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2488                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2489                 ha->nvram_conf_off = ~0;
2490                 ha->nvram_data_off = ~0;
2491         }  else if (IS_QLAFX00(ha)) {
2492                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2493                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2494                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2495                 req_length = REQUEST_ENTRY_CNT_FX00;
2496                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2497                 ha->isp_ops = &qlafx00_isp_ops;
2498                 ha->port_down_retry_count = 30; /* default value */
2499                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2500                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2501                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2502                 ha->mr.fw_hbt_en = 1;
2503                 ha->mr.host_info_resend = false;
2504                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2505         } else if (IS_QLA27XX(ha)) {
2506                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2507                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2508                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2509                 req_length = REQUEST_ENTRY_CNT_24XX;
2510                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2511                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2512                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2513                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2514                 ha->gid_list_info_size = 8;
2515                 ha->optrom_size = OPTROM_SIZE_83XX;
2516                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2517                 ha->isp_ops = &qla27xx_isp_ops;
2518                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2519                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2520                 ha->nvram_conf_off = ~0;
2521                 ha->nvram_data_off = ~0;
2522         }
2523
2524         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2525             "mbx_count=%d, req_length=%d, "
2526             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2527             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2528             "max_fibre_devices=%d.\n",
2529             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2530             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2531             ha->nvram_npiv_size, ha->max_fibre_devices);
2532         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2533             "isp_ops=%p, flash_conf_off=%d, "
2534             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2535             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2536             ha->nvram_conf_off, ha->nvram_data_off);
2537
2538         /* Configure PCI I/O space */
2539         ret = ha->isp_ops->iospace_config(ha);
2540         if (ret)
2541                 goto iospace_config_failed;
2542
2543         ql_log_pci(ql_log_info, pdev, 0x001d,
2544             "Found an ISP%04X irq %d iobase 0x%p.\n",
2545             pdev->device, pdev->irq, ha->iobase);
2546         mutex_init(&ha->vport_lock);
2547         init_completion(&ha->mbx_cmd_comp);
2548         complete(&ha->mbx_cmd_comp);
2549         init_completion(&ha->mbx_intr_comp);
2550         init_completion(&ha->dcbx_comp);
2551         init_completion(&ha->lb_portup_comp);
2552
2553         set_bit(0, (unsigned long *) ha->vp_idx_map);
2554
2555         qla2x00_config_dma_addressing(ha);
2556         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2557             "64 Bit addressing is %s.\n",
2558             ha->flags.enable_64bit_addressing ? "enable" :
2559             "disable");
2560         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2561         if (ret) {
2562                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2563                     "Failed to allocate memory for adapter, aborting.\n");
2564
2565                 goto probe_hw_failed;
2566         }
2567
2568         req->max_q_depth = MAX_Q_DEPTH;
2569         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2570                 req->max_q_depth = ql2xmaxqdepth;
2571
2572
2573         base_vha = qla2x00_create_host(sht, ha);
2574         if (!base_vha) {
2575                 ret = -ENOMEM;
2576                 qla2x00_mem_free(ha);
2577                 qla2x00_free_req_que(ha, req);
2578                 qla2x00_free_rsp_que(ha, rsp);
2579                 goto probe_hw_failed;
2580         }
2581
2582         pci_set_drvdata(pdev, base_vha);
2583         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2584
2585         host = base_vha->host;
2586         base_vha->req = req;
2587         if (IS_QLA2XXX_MIDTYPE(ha))
2588                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2589         else
2590                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2591                                                 base_vha->vp_idx;
2592
2593         /* Setup fcport template structure. */
2594         ha->mr.fcport.vha = base_vha;
2595         ha->mr.fcport.port_type = FCT_UNKNOWN;
2596         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2597         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2598         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2599         ha->mr.fcport.scan_state = 1;
2600
2601         /* Set the SG table size based on ISP type */
2602         if (!IS_FWI2_CAPABLE(ha)) {
2603                 if (IS_QLA2100(ha))
2604                         host->sg_tablesize = 32;
2605         } else {
2606                 if (!IS_QLA82XX(ha))
2607                         host->sg_tablesize = QLA_SG_ALL;
2608         }
2609         host->max_id = ha->max_fibre_devices;
2610         host->cmd_per_lun = 3;
2611         host->unique_id = host->host_no;
2612         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2613                 host->max_cmd_len = 32;
2614         else
2615                 host->max_cmd_len = MAX_CMDSZ;
2616         host->max_channel = MAX_BUSES - 1;
2617         /* Older HBAs support only 16-bit LUNs */
2618         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
2619             ql2xmaxlun > 0xffff)
2620                 host->max_lun = 0xffff;
2621         else
2622                 host->max_lun = ql2xmaxlun;
2623         host->transportt = qla2xxx_transport_template;
2624         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2625
2626         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2627             "max_id=%d this_id=%d "
2628             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2629             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
2630             host->this_id, host->cmd_per_lun, host->unique_id,
2631             host->max_cmd_len, host->max_channel, host->max_lun,
2632             host->transportt, sht->vendor_id);
2633
2634 que_init:
2635         /* Alloc arrays of request and response ring ptrs */
2636         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2637                 ql_log(ql_log_fatal, base_vha, 0x003d,
2638                     "Failed to allocate memory for queue pointers..."
2639                     "aborting.\n");
2640                 goto probe_init_failed;
2641         }
2642
2643         qlt_probe_one_stage1(base_vha, ha);
2644
2645         /* Set up the irqs */
2646         ret = qla2x00_request_irqs(ha, rsp);
2647         if (ret)
2648                 goto probe_init_failed;
2649
2650         pci_save_state(pdev);
2651
2652         /* Assign back pointers */
2653         rsp->req = req;
2654         req->rsp = rsp;
2655
2656         if (IS_QLAFX00(ha)) {
2657                 ha->rsp_q_map[0] = rsp;
2658                 ha->req_q_map[0] = req;
2659                 set_bit(0, ha->req_qid_map);
2660                 set_bit(0, ha->rsp_qid_map);
2661         }
2662
2663         /* FWI2-capable only. */
2664         req->req_q_in = &ha->iobase->isp24.req_q_in;
2665         req->req_q_out = &ha->iobase->isp24.req_q_out;
2666         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2667         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2668         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2669                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2670                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2671                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2672                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2673         }
2674
2675         if (IS_QLAFX00(ha)) {
2676                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2677                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2678                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2679                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2680         }
2681
2682         if (IS_P3P_TYPE(ha)) {
2683                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2684                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2685                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2686         }
2687
2688         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2689             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2690             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2691         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2692             "req->req_q_in=%p req->req_q_out=%p "
2693             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2694             req->req_q_in, req->req_q_out,
2695             rsp->rsp_q_in, rsp->rsp_q_out);
2696         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2697             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2698             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2699         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2700             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2701             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2702
2703         if (ha->isp_ops->initialize_adapter(base_vha)) {
2704                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2705                     "Failed to initialize adapter - Adapter flags %x.\n",
2706                     base_vha->device_flags);
2707
2708                 if (IS_QLA82XX(ha)) {
2709                         qla82xx_idc_lock(ha);
2710                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2711                                 QLA8XXX_DEV_FAILED);
2712                         qla82xx_idc_unlock(ha);
2713                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2714                             "HW State: FAILED.\n");
2715                 } else if (IS_QLA8044(ha)) {
2716                         qla8044_idc_lock(ha);
2717                         qla8044_wr_direct(base_vha,
2718                                 QLA8044_CRB_DEV_STATE_INDEX,
2719                                 QLA8XXX_DEV_FAILED);
2720                         qla8044_idc_unlock(ha);
2721                         ql_log(ql_log_fatal, base_vha, 0x0150,
2722                             "HW State: FAILED.\n");
2723                 }
2724
2725                 ret = -ENODEV;
2726                 goto probe_failed;
2727         }
2728
2729         if (IS_QLAFX00(ha))
2730                 host->can_queue = QLAFX00_MAX_CANQUEUE;
2731         else
2732                 host->can_queue = req->num_outstanding_cmds - 10;
2733
2734         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2735             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2736             host->can_queue, base_vha->req,
2737             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2738
2739         if (ha->mqenable) {
2740                 if (qla25xx_setup_mode(base_vha)) {
2741                         ql_log(ql_log_warn, base_vha, 0x00ec,
2742                             "Failed to create queues, falling back to single queue mode.\n");
2743                         goto que_init;
2744                 }
2745         }
2746
2747         if (ha->flags.running_gold_fw)
2748                 goto skip_dpc;
2749
2750         /*
2751          * Startup the kernel thread for this host adapter
2752          */
2753         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2754             "%s_dpc", base_vha->host_str);
2755         if (IS_ERR(ha->dpc_thread)) {
2756                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2757                     "Failed to start DPC thread.\n");
2758                 ret = PTR_ERR(ha->dpc_thread);
2759                 goto probe_failed;
2760         }
2761         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2762             "DPC thread started successfully.\n");
2763
2764         /*
2765          * If we're not coming up in initiator mode, we might sit for
2766          * a while without waking up the dpc thread, which leads to a
2767          * stuck process warning.  So just kick the dpc once here and
2768          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2769          */
2770         qla2xxx_wake_dpc(base_vha);
2771
2772         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
2773
2774         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2775                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2776                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2777                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2778
2779                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2780                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2781                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2782                 INIT_WORK(&ha->idc_state_handler,
2783                     qla83xx_idc_state_handler_work);
2784                 INIT_WORK(&ha->nic_core_unrecoverable,
2785                     qla83xx_nic_core_unrecoverable_work);
2786         }
2787
2788 skip_dpc:
2789         list_add_tail(&base_vha->list, &ha->vp_list);
2790         base_vha->host->irq = ha->pdev->irq;
2791
2792         /* Initialized the timer */
2793         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2794         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2795             "Started qla2x00_timer with "
2796             "interval=%d.\n", WATCH_INTERVAL);
2797         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2798             "Detected hba at address=%p.\n",
2799             ha);
2800
2801         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2802                 if (ha->fw_attributes & BIT_4) {
2803                         int prot = 0, guard;
2804                         base_vha->flags.difdix_supported = 1;
2805                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2806                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2807                         if (ql2xenabledif == 1)
2808                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2809                         scsi_host_set_prot(host,
2810                             prot | SHOST_DIF_TYPE1_PROTECTION
2811                             | SHOST_DIF_TYPE2_PROTECTION
2812                             | SHOST_DIF_TYPE3_PROTECTION
2813                             | SHOST_DIX_TYPE1_PROTECTION
2814                             | SHOST_DIX_TYPE2_PROTECTION
2815                             | SHOST_DIX_TYPE3_PROTECTION);
2816
2817                         guard = SHOST_DIX_GUARD_CRC;
2818
2819                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2820                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2821                                 guard |= SHOST_DIX_GUARD_IP;
2822
2823                         scsi_host_set_guard(host, guard);
2824                 } else
2825                         base_vha->flags.difdix_supported = 0;
2826         }
2827
2828         ha->isp_ops->enable_intrs(ha);
2829
2830         if (IS_QLAFX00(ha)) {
2831                 ret = qlafx00_fx_disc(base_vha,
2832                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2833                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2834                     QLA_SG_ALL : 128;
2835         }
2836
2837         ret = scsi_add_host(host, &pdev->dev);
2838         if (ret)
2839                 goto probe_failed;
2840
2841         base_vha->flags.init_done = 1;
2842         base_vha->flags.online = 1;
2843         ha->prev_minidump_failed = 0;
2844
2845         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2846             "Init done and hba is online.\n");
2847
2848         if (qla_ini_mode_enabled(base_vha))
2849                 scsi_scan_host(host);
2850         else
2851                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2852                         "skipping scsi_scan_host() for non-initiator port\n");
2853
2854         qla2x00_alloc_sysfs_attr(base_vha);
2855
2856         if (IS_QLAFX00(ha)) {
2857                 ret = qlafx00_fx_disc(base_vha,
2858                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2859
2860                 /* Register system information */
2861                 ret =  qlafx00_fx_disc(base_vha,
2862                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2863         }
2864
2865         qla2x00_init_host_attr(base_vha);
2866
2867         qla2x00_dfs_setup(base_vha);
2868
2869         ql_log(ql_log_info, base_vha, 0x00fb,
2870             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2871         ql_log(ql_log_info, base_vha, 0x00fc,
2872             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2873             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2874             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2875             base_vha->host_no,
2876             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
2877
2878         qlt_add_target(ha, base_vha);
2879
2880         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2881         return 0;
2882
2883 probe_init_failed:
2884         qla2x00_free_req_que(ha, req);
2885         ha->req_q_map[0] = NULL;
2886         clear_bit(0, ha->req_qid_map);
2887         qla2x00_free_rsp_que(ha, rsp);
2888         ha->rsp_q_map[0] = NULL;
2889         clear_bit(0, ha->rsp_qid_map);
2890         ha->max_req_queues = ha->max_rsp_queues = 0;
2891
2892 probe_failed:
2893         if (base_vha->timer_active)
2894                 qla2x00_stop_timer(base_vha);
2895         base_vha->flags.online = 0;
2896         if (ha->dpc_thread) {
2897                 struct task_struct *t = ha->dpc_thread;
2898
2899                 ha->dpc_thread = NULL;
2900                 kthread_stop(t);
2901         }
2902
2903         qla2x00_free_device(base_vha);
2904
2905         scsi_host_put(base_vha->host);
2906
2907 probe_hw_failed:
2908         qla2x00_clear_drv_active(ha);
2909
2910 iospace_config_failed:
2911         if (IS_P3P_TYPE(ha)) {
2912                 if (!ha->nx_pcibase)
2913                         iounmap((device_reg_t *)ha->nx_pcibase);
2914                 if (!ql2xdbwr)
2915                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
2916         } else {
2917                 if (ha->iobase)
2918                         iounmap(ha->iobase);
2919                 if (ha->cregbase)
2920                         iounmap(ha->cregbase);
2921         }
2922         pci_release_selected_regions(ha->pdev, ha->bars);
2923         kfree(ha);
2924         ha = NULL;
2925
2926 probe_out:
2927         pci_disable_device(pdev);
2928         return ret;
2929 }
2930
2931 static void
2932 qla2x00_shutdown(struct pci_dev *pdev)
2933 {
2934         scsi_qla_host_t *vha;
2935         struct qla_hw_data  *ha;
2936
2937         if (!atomic_read(&pdev->enable_cnt))
2938                 return;
2939
2940         vha = pci_get_drvdata(pdev);
2941         ha = vha->hw;
2942
2943         /* Notify ISPFX00 firmware */
2944         if (IS_QLAFX00(ha))
2945                 qlafx00_driver_shutdown(vha, 20);
2946
2947         /* Turn-off FCE trace */
2948         if (ha->flags.fce_enabled) {
2949                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2950                 ha->flags.fce_enabled = 0;
2951         }
2952
2953         /* Turn-off EFT trace */
2954         if (ha->eft)
2955                 qla2x00_disable_eft_trace(vha);
2956
2957         /* Stop currently executing firmware. */
2958         qla2x00_try_to_stop_firmware(vha);
2959
2960         /* Turn adapter off line */
2961         vha->flags.online = 0;
2962
2963         /* turn-off interrupts on the card */
2964         if (ha->interrupts_on) {
2965                 vha->flags.init_done = 0;
2966                 ha->isp_ops->disable_intrs(ha);
2967         }
2968
2969         qla2x00_free_irqs(vha);
2970
2971         qla2x00_free_fw_dump(ha);
2972
2973         pci_disable_pcie_error_reporting(pdev);
2974         pci_disable_device(pdev);
2975 }
2976
2977 /* Deletes all the virtual ports for a given ha */
2978 static void
2979 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
2980 {
2981         scsi_qla_host_t *vha;
2982         unsigned long flags;
2983
2984         mutex_lock(&ha->vport_lock);
2985         while (ha->cur_vport_count) {
2986                 spin_lock_irqsave(&ha->vport_slock, flags);
2987
2988                 BUG_ON(base_vha->list.next == &ha->vp_list);
2989                 /* This assumes first entry in ha->vp_list is always base vha */
2990                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2991                 scsi_host_get(vha->host);
2992
2993                 spin_unlock_irqrestore(&ha->vport_slock, flags);
2994                 mutex_unlock(&ha->vport_lock);
2995
2996                 fc_vport_terminate(vha->fc_vport);
2997                 scsi_host_put(vha->host);
2998
2999                 mutex_lock(&ha->vport_lock);
3000         }
3001         mutex_unlock(&ha->vport_lock);
3002 }
3003
3004 /* Stops all deferred work threads */
3005 static void
3006 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3007 {
3008         /* Flush the work queue and remove it */
3009         if (ha->wq) {
3010                 flush_workqueue(ha->wq);
3011                 destroy_workqueue(ha->wq);
3012                 ha->wq = NULL;
3013         }
3014
3015         /* Cancel all work and destroy DPC workqueues */
3016         if (ha->dpc_lp_wq) {
3017                 cancel_work_sync(&ha->idc_aen);
3018                 destroy_workqueue(ha->dpc_lp_wq);
3019                 ha->dpc_lp_wq = NULL;
3020         }
3021
3022         if (ha->dpc_hp_wq) {
3023                 cancel_work_sync(&ha->nic_core_reset);
3024                 cancel_work_sync(&ha->idc_state_handler);
3025                 cancel_work_sync(&ha->nic_core_unrecoverable);
3026                 destroy_workqueue(ha->dpc_hp_wq);
3027                 ha->dpc_hp_wq = NULL;
3028         }
3029
3030         /* Kill the kernel thread for this host */
3031         if (ha->dpc_thread) {
3032                 struct task_struct *t = ha->dpc_thread;
3033
3034                 /*
3035                  * qla2xxx_wake_dpc checks for ->dpc_thread
3036                  * so we need to zero it out.
3037                  */
3038                 ha->dpc_thread = NULL;
3039                 kthread_stop(t);
3040         }
3041 }
3042
3043 static void
3044 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3045 {
3046         if (IS_QLA82XX(ha)) {
3047
3048                 iounmap((device_reg_t *)ha->nx_pcibase);
3049                 if (!ql2xdbwr)
3050                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3051         } else {
3052                 if (ha->iobase)
3053                         iounmap(ha->iobase);
3054
3055                 if (ha->cregbase)
3056                         iounmap(ha->cregbase);
3057
3058                 if (ha->mqiobase)
3059                         iounmap(ha->mqiobase);
3060
3061                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3062                         iounmap(ha->msixbase);
3063         }
3064 }
3065
3066 static void
3067 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3068 {
3069         if (IS_QLA8044(ha)) {
3070                 qla8044_idc_lock(ha);
3071                 qla8044_clear_drv_active(ha);
3072                 qla8044_idc_unlock(ha);
3073         } else if (IS_QLA82XX(ha)) {
3074                 qla82xx_idc_lock(ha);
3075                 qla82xx_clear_drv_active(ha);
3076                 qla82xx_idc_unlock(ha);
3077         }
3078 }
3079
3080 static void
3081 qla2x00_remove_one(struct pci_dev *pdev)
3082 {
3083         scsi_qla_host_t *base_vha;
3084         struct qla_hw_data  *ha;
3085
3086         base_vha = pci_get_drvdata(pdev);
3087         ha = base_vha->hw;
3088
3089         /* Indicate device removal to prevent future board_disable and wait
3090          * until any pending board_disable has completed. */
3091         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3092         cancel_work_sync(&ha->board_disable);
3093
3094         /*
3095          * If the PCI device is disabled then there was a PCI-disconnect and
3096          * qla2x00_disable_board_on_pci_error has taken care of most of the
3097          * resources.
3098          */
3099         if (!atomic_read(&pdev->enable_cnt)) {
3100                 scsi_host_put(base_vha->host);
3101                 kfree(ha);
3102                 pci_set_drvdata(pdev, NULL);
3103                 return;
3104         }
3105
3106         qla2x00_wait_for_hba_ready(base_vha);
3107
3108         set_bit(UNLOADING, &base_vha->dpc_flags);
3109
3110         if (IS_QLAFX00(ha))
3111                 qlafx00_driver_shutdown(base_vha, 20);
3112
3113         qla2x00_delete_all_vps(ha, base_vha);
3114
3115         if (IS_QLA8031(ha)) {
3116                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3117                     "Clearing fcoe driver presence.\n");
3118                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3119                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3120                             "Error while clearing DRV-Presence.\n");
3121         }
3122
3123         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3124
3125         qla2x00_dfs_remove(base_vha);
3126
3127         qla84xx_put_chip(base_vha);
3128
3129         /* Laser should be disabled only for ISP2031 */
3130         if (IS_QLA2031(ha))
3131                 qla83xx_disable_laser(base_vha);
3132
3133         /* Disable timer */
3134         if (base_vha->timer_active)
3135                 qla2x00_stop_timer(base_vha);
3136
3137         base_vha->flags.online = 0;
3138
3139         qla2x00_destroy_deferred_work(ha);
3140
3141         qlt_remove_target(ha, base_vha);
3142
3143         qla2x00_free_sysfs_attr(base_vha, true);
3144
3145         fc_remove_host(base_vha->host);
3146
3147         scsi_remove_host(base_vha->host);
3148
3149         qla2x00_free_device(base_vha);
3150
3151         qla2x00_clear_drv_active(ha);
3152
3153         scsi_host_put(base_vha->host);
3154
3155         qla2x00_unmap_iobases(ha);
3156
3157         pci_release_selected_regions(ha->pdev, ha->bars);
3158         kfree(ha);
3159         ha = NULL;
3160
3161         pci_disable_pcie_error_reporting(pdev);
3162
3163         pci_disable_device(pdev);
3164 }
3165
3166 static void
3167 qla2x00_free_device(scsi_qla_host_t *vha)
3168 {
3169         struct qla_hw_data *ha = vha->hw;
3170
3171         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3172
3173         /* Disable timer */
3174         if (vha->timer_active)
3175                 qla2x00_stop_timer(vha);
3176
3177         qla25xx_delete_queues(vha);
3178
3179         if (ha->flags.fce_enabled)
3180                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3181
3182         if (ha->eft)
3183                 qla2x00_disable_eft_trace(vha);
3184
3185         /* Stop currently executing firmware. */
3186         qla2x00_try_to_stop_firmware(vha);
3187
3188         vha->flags.online = 0;
3189
3190         /* turn-off interrupts on the card */
3191         if (ha->interrupts_on) {
3192                 vha->flags.init_done = 0;
3193                 ha->isp_ops->disable_intrs(ha);
3194         }
3195
3196         qla2x00_free_irqs(vha);
3197
3198         qla2x00_free_fcports(vha);
3199
3200         qla2x00_mem_free(ha);
3201
3202         qla82xx_md_free(vha);
3203
3204         qla2x00_free_queues(ha);
3205 }
3206
3207 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3208 {
3209         fc_port_t *fcport, *tfcport;
3210
3211         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3212                 list_del(&fcport->list);
3213                 qla2x00_clear_loop_id(fcport);
3214                 kfree(fcport);
3215                 fcport = NULL;
3216         }
3217 }
3218
3219 static inline void
3220 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3221     int defer)
3222 {
3223         struct fc_rport *rport;
3224         scsi_qla_host_t *base_vha;
3225         unsigned long flags;
3226
3227         if (!fcport->rport)
3228                 return;
3229
3230         rport = fcport->rport;
3231         if (defer) {
3232                 base_vha = pci_get_drvdata(vha->hw->pdev);
3233                 spin_lock_irqsave(vha->host->host_lock, flags);
3234                 fcport->drport = rport;
3235                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3236                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3237                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3238                 qla2xxx_wake_dpc(base_vha);
3239         } else {
3240                 int now;
3241                 if (rport)
3242                         fc_remote_port_delete(rport);
3243                 qlt_do_generation_tick(vha, &now);
3244                 qlt_fc_port_deleted(vha, fcport, now);
3245         }
3246 }
3247
3248 /*
3249  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3250  *
3251  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3252  *
3253  * Return: None.
3254  *
3255  * Context:
3256  */
3257 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3258     int do_login, int defer)
3259 {
3260         if (IS_QLAFX00(vha->hw)) {
3261                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3262                 qla2x00_schedule_rport_del(vha, fcport, defer);
3263                 return;
3264         }
3265
3266         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3267             vha->vp_idx == fcport->vha->vp_idx) {
3268                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3269                 qla2x00_schedule_rport_del(vha, fcport, defer);
3270         }
3271         /*
3272          * We may need to retry the login, so don't change the state of the
3273          * port but do the retries.
3274          */
3275         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3276                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3277
3278         if (!do_login)
3279                 return;
3280
3281         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3282
3283         if (fcport->login_retry == 0) {
3284                 fcport->login_retry = vha->hw->login_retry_count;
3285
3286                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3287                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3288                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3289         }
3290 }
3291
3292 /*
3293  * qla2x00_mark_all_devices_lost
3294  *      Updates fcport state when device goes offline.
3295  *
3296  * Input:
3297  *      ha = adapter block pointer.
3298  *      fcport = port structure pointer.
3299  *
3300  * Return:
3301  *      None.
3302  *
3303  * Context:
3304  */
3305 void
3306 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3307 {
3308         fc_port_t *fcport;
3309
3310         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3311                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3312                         continue;
3313
3314                 /*
3315                  * No point in marking the device as lost, if the device is
3316                  * already DEAD.
3317                  */
3318                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3319                         continue;
3320                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3321                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3322                         if (defer)
3323                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3324                         else if (vha->vp_idx == fcport->vha->vp_idx)
3325                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3326                 }
3327         }
3328 }
3329
3330 /*
3331 * qla2x00_mem_alloc
3332 *      Allocates adapter memory.
3333 *
3334 * Returns:
3335 *      0  = success.
3336 *      !0  = failure.
3337 */
3338 static int
3339 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3340         struct req_que **req, struct rsp_que **rsp)
3341 {
3342         char    name[16];
3343
3344         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3345                 &ha->init_cb_dma, GFP_KERNEL);
3346         if (!ha->init_cb)
3347                 goto fail;
3348
3349         if (qlt_mem_alloc(ha) < 0)
3350                 goto fail_free_init_cb;
3351
3352         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3353                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3354         if (!ha->gid_list)
3355                 goto fail_free_tgt_mem;
3356
3357         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3358         if (!ha->srb_mempool)
3359                 goto fail_free_gid_list;
3360
3361         if (IS_P3P_TYPE(ha)) {
3362                 /* Allocate cache for CT6 Ctx. */
3363                 if (!ctx_cachep) {
3364                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3365                                 sizeof(struct ct6_dsd), 0,
3366                                 SLAB_HWCACHE_ALIGN, NULL);
3367                         if (!ctx_cachep)
3368                                 goto fail_free_srb_mempool;
3369                 }
3370                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3371                         ctx_cachep);
3372                 if (!ha->ctx_mempool)
3373                         goto fail_free_srb_mempool;
3374                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3375                     "ctx_cachep=%p ctx_mempool=%p.\n",
3376                     ctx_cachep, ha->ctx_mempool);
3377         }
3378
3379         /* Get memory for cached NVRAM */
3380         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3381         if (!ha->nvram)
3382                 goto fail_free_ctx_mempool;
3383
3384         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3385                 ha->pdev->device);
3386         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3387                 DMA_POOL_SIZE, 8, 0);
3388         if (!ha->s_dma_pool)
3389                 goto fail_free_nvram;
3390
3391         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3392             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3393             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3394
3395         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3396                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3397                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3398                 if (!ha->dl_dma_pool) {
3399                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3400                             "Failed to allocate memory for dl_dma_pool.\n");
3401                         goto fail_s_dma_pool;
3402                 }
3403
3404                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3405                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3406                 if (!ha->fcp_cmnd_dma_pool) {
3407                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3408                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3409                         goto fail_dl_dma_pool;
3410                 }
3411                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3412                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3413                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3414         }
3415
3416         /* Allocate memory for SNS commands */
3417         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3418         /* Get consistent memory allocated for SNS commands */
3419                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3420                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3421                 if (!ha->sns_cmd)
3422                         goto fail_dma_pool;
3423                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3424                     "sns_cmd: %p.\n", ha->sns_cmd);
3425         } else {
3426         /* Get consistent memory allocated for MS IOCB */
3427                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3428                         &ha->ms_iocb_dma);
3429                 if (!ha->ms_iocb)
3430                         goto fail_dma_pool;
3431         /* Get consistent memory allocated for CT SNS commands */
3432                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3433                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3434                 if (!ha->ct_sns)
3435                         goto fail_free_ms_iocb;
3436                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3437                     "ms_iocb=%p ct_sns=%p.\n",
3438                     ha->ms_iocb, ha->ct_sns);
3439         }
3440
3441         /* Allocate memory for request ring */
3442         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3443         if (!*req) {
3444                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3445                     "Failed to allocate memory for req.\n");
3446                 goto fail_req;
3447         }
3448         (*req)->length = req_len;
3449         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3450                 ((*req)->length + 1) * sizeof(request_t),
3451                 &(*req)->dma, GFP_KERNEL);
3452         if (!(*req)->ring) {
3453                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3454                     "Failed to allocate memory for req_ring.\n");
3455                 goto fail_req_ring;
3456         }
3457         /* Allocate memory for response ring */
3458         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3459         if (!*rsp) {
3460                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3461                     "Failed to allocate memory for rsp.\n");
3462                 goto fail_rsp;
3463         }
3464         (*rsp)->hw = ha;
3465         (*rsp)->length = rsp_len;
3466         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3467                 ((*rsp)->length + 1) * sizeof(response_t),
3468                 &(*rsp)->dma, GFP_KERNEL);
3469         if (!(*rsp)->ring) {
3470                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3471                     "Failed to allocate memory for rsp_ring.\n");
3472                 goto fail_rsp_ring;
3473         }
3474         (*req)->rsp = *rsp;
3475         (*rsp)->req = *req;
3476         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3477             "req=%p req->length=%d req->ring=%p rsp=%p "
3478             "rsp->length=%d rsp->ring=%p.\n",
3479             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3480             (*rsp)->ring);
3481         /* Allocate memory for NVRAM data for vports */
3482         if (ha->nvram_npiv_size) {
3483                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3484                     ha->nvram_npiv_size, GFP_KERNEL);
3485                 if (!ha->npiv_info) {
3486                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3487                             "Failed to allocate memory for npiv_info.\n");
3488                         goto fail_npiv_info;
3489                 }
3490         } else
3491                 ha->npiv_info = NULL;
3492
3493         /* Get consistent memory allocated for EX-INIT-CB. */
3494         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3495                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3496                     &ha->ex_init_cb_dma);
3497                 if (!ha->ex_init_cb)
3498                         goto fail_ex_init_cb;
3499                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3500                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3501         }
3502
3503         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3504
3505         /* Get consistent memory allocated for Async Port-Database. */
3506         if (!IS_FWI2_CAPABLE(ha)) {
3507                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3508                         &ha->async_pd_dma);
3509                 if (!ha->async_pd)
3510                         goto fail_async_pd;
3511                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3512                     "async_pd=%p.\n", ha->async_pd);
3513         }
3514
3515         INIT_LIST_HEAD(&ha->vp_list);
3516
3517         /* Allocate memory for our loop_id bitmap */
3518         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3519             GFP_KERNEL);
3520         if (!ha->loop_id_map)
3521                 goto fail_loop_id_map;
3522         else {
3523                 qla2x00_set_reserved_loop_ids(ha);
3524                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3525                     "loop_id_map=%p.\n", ha->loop_id_map);
3526         }
3527
3528         return 0;
3529
3530 fail_loop_id_map:
3531         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3532 fail_async_pd:
3533         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3534 fail_ex_init_cb:
3535         kfree(ha->npiv_info);
3536 fail_npiv_info:
3537         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3538                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3539         (*rsp)->ring = NULL;
3540         (*rsp)->dma = 0;
3541 fail_rsp_ring:
3542         kfree(*rsp);
3543 fail_rsp:
3544         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3545                 sizeof(request_t), (*req)->ring, (*req)->dma);
3546         (*req)->ring = NULL;
3547         (*req)->dma = 0;
3548 fail_req_ring:
3549         kfree(*req);
3550 fail_req:
3551         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3552                 ha->ct_sns, ha->ct_sns_dma);
3553         ha->ct_sns = NULL;
3554         ha->ct_sns_dma = 0;
3555 fail_free_ms_iocb:
3556         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3557         ha->ms_iocb = NULL;
3558         ha->ms_iocb_dma = 0;
3559
3560         if (ha->sns_cmd)
3561                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3562                     ha->sns_cmd, ha->sns_cmd_dma);
3563 fail_dma_pool:
3564         if (IS_QLA82XX(ha) || ql2xenabledif) {
3565                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3566                 ha->fcp_cmnd_dma_pool = NULL;
3567         }
3568 fail_dl_dma_pool:
3569         if (IS_QLA82XX(ha) || ql2xenabledif) {
3570                 dma_pool_destroy(ha->dl_dma_pool);
3571                 ha->dl_dma_pool = NULL;
3572         }
3573 fail_s_dma_pool:
3574         dma_pool_destroy(ha->s_dma_pool);
3575         ha->s_dma_pool = NULL;
3576 fail_free_nvram:
3577         kfree(ha->nvram);
3578         ha->nvram = NULL;
3579 fail_free_ctx_mempool:
3580         if (ha->ctx_mempool)
3581                 mempool_destroy(ha->ctx_mempool);
3582         ha->ctx_mempool = NULL;
3583 fail_free_srb_mempool:
3584         if (ha->srb_mempool)
3585                 mempool_destroy(ha->srb_mempool);
3586         ha->srb_mempool = NULL;
3587 fail_free_gid_list:
3588         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3589         ha->gid_list,
3590         ha->gid_list_dma);
3591         ha->gid_list = NULL;
3592         ha->gid_list_dma = 0;
3593 fail_free_tgt_mem:
3594         qlt_mem_free(ha);
3595 fail_free_init_cb:
3596         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3597         ha->init_cb_dma);
3598         ha->init_cb = NULL;
3599         ha->init_cb_dma = 0;
3600 fail:
3601         ql_log(ql_log_fatal, NULL, 0x0030,
3602             "Memory allocation failure.\n");
3603         return -ENOMEM;
3604 }
3605
3606 /*
3607 * qla2x00_free_fw_dump
3608 *       Frees fw dump stuff.
3609 *
3610 * Input:
3611 *       ha = adapter block pointer
3612 */
3613 static void
3614 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3615 {
3616         if (ha->fce)
3617                 dma_free_coherent(&ha->pdev->dev,
3618                     FCE_SIZE, ha->fce, ha->fce_dma);
3619
3620         if (ha->eft)
3621                 dma_free_coherent(&ha->pdev->dev,
3622                     EFT_SIZE, ha->eft, ha->eft_dma);
3623
3624         if (ha->fw_dump)
3625                 vfree(ha->fw_dump);
3626         if (ha->fw_dump_template)
3627                 vfree(ha->fw_dump_template);
3628
3629         ha->fce = NULL;
3630         ha->fce_dma = 0;
3631         ha->eft = NULL;
3632         ha->eft_dma = 0;
3633         ha->fw_dumped = 0;
3634         ha->fw_dump_cap_flags = 0;
3635         ha->fw_dump_reading = 0;
3636         ha->fw_dump = NULL;
3637         ha->fw_dump_len = 0;
3638         ha->fw_dump_template = NULL;
3639         ha->fw_dump_template_len = 0;
3640 }
3641
3642 /*
3643 * qla2x00_mem_free
3644 *      Frees all adapter allocated memory.
3645 *
3646 * Input:
3647 *      ha = adapter block pointer.
3648 */
3649 static void
3650 qla2x00_mem_free(struct qla_hw_data *ha)
3651 {
3652         qla2x00_free_fw_dump(ha);
3653
3654         if (ha->mctp_dump)
3655                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3656                     ha->mctp_dump_dma);
3657
3658         if (ha->srb_mempool)
3659                 mempool_destroy(ha->srb_mempool);
3660
3661         if (ha->dcbx_tlv)
3662                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3663                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3664
3665         if (ha->xgmac_data)
3666                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3667                     ha->xgmac_data, ha->xgmac_data_dma);
3668
3669         if (ha->sns_cmd)
3670                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3671                 ha->sns_cmd, ha->sns_cmd_dma);
3672
3673         if (ha->ct_sns)
3674                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3675                 ha->ct_sns, ha->ct_sns_dma);
3676
3677         if (ha->sfp_data)
3678                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3679
3680         if (ha->ms_iocb)
3681                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3682
3683         if (ha->ex_init_cb)
3684                 dma_pool_free(ha->s_dma_pool,
3685                         ha->ex_init_cb, ha->ex_init_cb_dma);
3686
3687         if (ha->async_pd)
3688                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3689
3690         if (ha->s_dma_pool)
3691                 dma_pool_destroy(ha->s_dma_pool);
3692
3693         if (ha->gid_list)
3694                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3695                 ha->gid_list, ha->gid_list_dma);
3696
3697         if (IS_QLA82XX(ha)) {
3698                 if (!list_empty(&ha->gbl_dsd_list)) {
3699                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3700
3701                         /* clean up allocated prev pool */
3702                         list_for_each_entry_safe(dsd_ptr,
3703                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3704                                 dma_pool_free(ha->dl_dma_pool,
3705                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3706                                 list_del(&dsd_ptr->list);
3707                                 kfree(dsd_ptr);
3708                         }
3709                 }
3710         }
3711
3712         if (ha->dl_dma_pool)
3713                 dma_pool_destroy(ha->dl_dma_pool);
3714
3715         if (ha->fcp_cmnd_dma_pool)
3716                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3717
3718         if (ha->ctx_mempool)
3719                 mempool_destroy(ha->ctx_mempool);
3720
3721         qlt_mem_free(ha);
3722
3723         if (ha->init_cb)
3724                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3725                         ha->init_cb, ha->init_cb_dma);
3726         vfree(ha->optrom_buffer);
3727         kfree(ha->nvram);
3728         kfree(ha->npiv_info);
3729         kfree(ha->swl);
3730         kfree(ha->loop_id_map);
3731
3732         ha->srb_mempool = NULL;
3733         ha->ctx_mempool = NULL;
3734         ha->sns_cmd = NULL;
3735         ha->sns_cmd_dma = 0;
3736         ha->ct_sns = NULL;
3737         ha->ct_sns_dma = 0;
3738         ha->ms_iocb = NULL;
3739         ha->ms_iocb_dma = 0;
3740         ha->init_cb = NULL;
3741         ha->init_cb_dma = 0;
3742         ha->ex_init_cb = NULL;
3743         ha->ex_init_cb_dma = 0;
3744         ha->async_pd = NULL;
3745         ha->async_pd_dma = 0;
3746
3747         ha->s_dma_pool = NULL;
3748         ha->dl_dma_pool = NULL;
3749         ha->fcp_cmnd_dma_pool = NULL;
3750
3751         ha->gid_list = NULL;
3752         ha->gid_list_dma = 0;
3753
3754         ha->tgt.atio_ring = NULL;
3755         ha->tgt.atio_dma = 0;
3756         ha->tgt.tgt_vp_map = NULL;
3757 }
3758
3759 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3760                                                 struct qla_hw_data *ha)
3761 {
3762         struct Scsi_Host *host;
3763         struct scsi_qla_host *vha = NULL;
3764
3765         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3766         if (host == NULL) {
3767                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3768                     "Failed to allocate host from the scsi layer, aborting.\n");
3769                 goto fail;
3770         }
3771
3772         /* Clear our data area */
3773         vha = shost_priv(host);
3774         memset(vha, 0, sizeof(scsi_qla_host_t));
3775
3776         vha->host = host;
3777         vha->host_no = host->host_no;
3778         vha->hw = ha;
3779
3780         INIT_LIST_HEAD(&vha->vp_fcports);
3781         INIT_LIST_HEAD(&vha->work_list);
3782         INIT_LIST_HEAD(&vha->list);
3783         INIT_LIST_HEAD(&vha->qla_cmd_list);
3784         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
3785
3786         spin_lock_init(&vha->work_lock);
3787         spin_lock_init(&vha->cmd_list_lock);
3788
3789         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3790         ql_dbg(ql_dbg_init, vha, 0x0041,
3791             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3792             vha->host, vha->hw, vha,
3793             dev_name(&(ha->pdev->dev)));
3794
3795         return vha;
3796
3797 fail:
3798         return vha;
3799 }
3800
3801 static struct qla_work_evt *
3802 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3803 {
3804         struct qla_work_evt *e;
3805         uint8_t bail;
3806
3807         QLA_VHA_MARK_BUSY(vha, bail);
3808         if (bail)
3809                 return NULL;
3810
3811         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3812         if (!e) {
3813                 QLA_VHA_MARK_NOT_BUSY(vha);
3814                 return NULL;
3815         }
3816
3817         INIT_LIST_HEAD(&e->list);
3818         e->type = type;
3819         e->flags = QLA_EVT_FLAG_FREE;
3820         return e;
3821 }
3822
3823 static int
3824 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3825 {
3826         unsigned long flags;
3827
3828         spin_lock_irqsave(&vha->work_lock, flags);
3829         list_add_tail(&e->list, &vha->work_list);
3830         spin_unlock_irqrestore(&vha->work_lock, flags);
3831         qla2xxx_wake_dpc(vha);
3832
3833         return QLA_SUCCESS;
3834 }
3835
3836 int
3837 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3838     u32 data)
3839 {
3840         struct qla_work_evt *e;
3841
3842         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3843         if (!e)
3844                 return QLA_FUNCTION_FAILED;
3845
3846         e->u.aen.code = code;
3847         e->u.aen.data = data;
3848         return qla2x00_post_work(vha, e);
3849 }
3850
3851 int
3852 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3853 {
3854         struct qla_work_evt *e;
3855
3856         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3857         if (!e)
3858                 return QLA_FUNCTION_FAILED;
3859
3860         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3861         return qla2x00_post_work(vha, e);
3862 }
3863
3864 #define qla2x00_post_async_work(name, type)     \
3865 int qla2x00_post_async_##name##_work(           \
3866     struct scsi_qla_host *vha,                  \
3867     fc_port_t *fcport, uint16_t *data)          \
3868 {                                               \
3869         struct qla_work_evt *e;                 \
3870                                                 \
3871         e = qla2x00_alloc_work(vha, type);      \
3872         if (!e)                                 \
3873                 return QLA_FUNCTION_FAILED;     \
3874                                                 \
3875         e->u.logio.fcport = fcport;             \
3876         if (data) {                             \
3877                 e->u.logio.data[0] = data[0];   \
3878                 e->u.logio.data[1] = data[1];   \
3879         }                                       \
3880         return qla2x00_post_work(vha, e);       \
3881 }
3882
3883 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3884 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3885 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3886 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3887 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3888 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3889
3890 int
3891 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3892 {
3893         struct qla_work_evt *e;
3894
3895         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3896         if (!e)
3897                 return QLA_FUNCTION_FAILED;
3898
3899         e->u.uevent.code = code;
3900         return qla2x00_post_work(vha, e);
3901 }
3902
3903 static void
3904 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3905 {
3906         char event_string[40];
3907         char *envp[] = { event_string, NULL };
3908
3909         switch (code) {
3910         case QLA_UEVENT_CODE_FW_DUMP:
3911                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3912                     vha->host_no);
3913                 break;
3914         default:
3915                 /* do nothing */
3916                 break;
3917         }
3918         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3919 }
3920
3921 int
3922 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3923                         uint32_t *data, int cnt)
3924 {
3925         struct qla_work_evt *e;
3926
3927         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3928         if (!e)
3929                 return QLA_FUNCTION_FAILED;
3930
3931         e->u.aenfx.evtcode = evtcode;
3932         e->u.aenfx.count = cnt;
3933         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3934         return qla2x00_post_work(vha, e);
3935 }
3936
3937 void
3938 qla2x00_do_work(struct scsi_qla_host *vha)
3939 {
3940         struct qla_work_evt *e, *tmp;
3941         unsigned long flags;
3942         LIST_HEAD(work);
3943
3944         spin_lock_irqsave(&vha->work_lock, flags);
3945         list_splice_init(&vha->work_list, &work);
3946         spin_unlock_irqrestore(&vha->work_lock, flags);
3947
3948         list_for_each_entry_safe(e, tmp, &work, list) {
3949                 list_del_init(&e->list);
3950
3951                 switch (e->type) {
3952                 case QLA_EVT_AEN:
3953                         fc_host_post_event(vha->host, fc_get_event_number(),
3954                             e->u.aen.code, e->u.aen.data);
3955                         break;
3956                 case QLA_EVT_IDC_ACK:
3957                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3958                         break;
3959                 case QLA_EVT_ASYNC_LOGIN:
3960                         qla2x00_async_login(vha, e->u.logio.fcport,
3961                             e->u.logio.data);
3962                         break;
3963                 case QLA_EVT_ASYNC_LOGIN_DONE:
3964                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3965                             e->u.logio.data);
3966                         break;
3967                 case QLA_EVT_ASYNC_LOGOUT:
3968                         qla2x00_async_logout(vha, e->u.logio.fcport);
3969                         break;
3970                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3971                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3972                             e->u.logio.data);
3973                         break;
3974                 case QLA_EVT_ASYNC_ADISC:
3975                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3976                             e->u.logio.data);
3977                         break;
3978                 case QLA_EVT_ASYNC_ADISC_DONE:
3979                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3980                             e->u.logio.data);
3981                         break;
3982                 case QLA_EVT_UEVENT:
3983                         qla2x00_uevent_emit(vha, e->u.uevent.code);
3984                         break;
3985                 case QLA_EVT_AENFX:
3986                         qlafx00_process_aen(vha, e);
3987                         break;
3988                 }
3989                 if (e->flags & QLA_EVT_FLAG_FREE)
3990                         kfree(e);
3991
3992                 /* For each work completed decrement vha ref count */
3993                 QLA_VHA_MARK_NOT_BUSY(vha);
3994         }
3995 }
3996
3997 /* Relogins all the fcports of a vport
3998  * Context: dpc thread
3999  */
4000 void qla2x00_relogin(struct scsi_qla_host *vha)
4001 {
4002         fc_port_t       *fcport;
4003         int status;
4004         uint16_t        next_loopid = 0;
4005         struct qla_hw_data *ha = vha->hw;
4006         uint16_t data[2];
4007
4008         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4009         /*
4010          * If the port is not ONLINE then try to login
4011          * to it if we haven't run out of retries.
4012          */
4013                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4014                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4015                         fcport->login_retry--;
4016                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4017                                 if (fcport->flags & FCF_FCP2_DEVICE)
4018                                         ha->isp_ops->fabric_logout(vha,
4019                                                         fcport->loop_id,
4020                                                         fcport->d_id.b.domain,
4021                                                         fcport->d_id.b.area,
4022                                                         fcport->d_id.b.al_pa);
4023
4024                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
4025                                         fcport->loop_id = next_loopid =
4026                                             ha->min_external_loopid;
4027                                         status = qla2x00_find_new_loop_id(
4028                                             vha, fcport);
4029                                         if (status != QLA_SUCCESS) {
4030                                                 /* Ran out of IDs to use */
4031                                                 break;
4032                                         }
4033                                 }
4034
4035                                 if (IS_ALOGIO_CAPABLE(ha)) {
4036                                         fcport->flags |= FCF_ASYNC_SENT;
4037                                         data[0] = 0;
4038                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
4039                                         status = qla2x00_post_async_login_work(
4040                                             vha, fcport, data);
4041                                         if (status == QLA_SUCCESS)
4042                                                 continue;
4043                                         /* Attempt a retry. */
4044                                         status = 1;
4045                                 } else {
4046                                         status = qla2x00_fabric_login(vha,
4047                                             fcport, &next_loopid);
4048                                         if (status ==  QLA_SUCCESS) {
4049                                                 int status2;
4050                                                 uint8_t opts;
4051
4052                                                 opts = 0;
4053                                                 if (fcport->flags &
4054                                                     FCF_FCP2_DEVICE)
4055                                                         opts |= BIT_1;
4056                                                 status2 =
4057                                                     qla2x00_get_port_database(
4058                                                         vha, fcport, opts);
4059                                                 if (status2 != QLA_SUCCESS)
4060                                                         status = 1;
4061                                         }
4062                                 }
4063                         } else
4064                                 status = qla2x00_local_device_login(vha,
4065                                                                 fcport);
4066
4067                         if (status == QLA_SUCCESS) {
4068                                 fcport->old_loop_id = fcport->loop_id;
4069
4070                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4071                                     "Port login OK: logged in ID 0x%x.\n",
4072                                     fcport->loop_id);
4073
4074                                 qla2x00_update_fcport(vha, fcport);
4075
4076                         } else if (status == 1) {
4077                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4078                                 /* retry the login again */
4079                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4080                                     "Retrying %d login again loop_id 0x%x.\n",
4081                                     fcport->login_retry, fcport->loop_id);
4082                         } else {
4083                                 fcport->login_retry = 0;
4084                         }
4085
4086                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4087                                 qla2x00_clear_loop_id(fcport);
4088                 }
4089                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4090                         break;
4091         }
4092 }
4093
4094 /* Schedule work on any of the dpc-workqueues */
4095 void
4096 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4097 {
4098         struct qla_hw_data *ha = base_vha->hw;
4099
4100         switch (work_code) {
4101         case MBA_IDC_AEN: /* 0x8200 */
4102                 if (ha->dpc_lp_wq)
4103                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4104                 break;
4105
4106         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4107                 if (!ha->flags.nic_core_reset_hdlr_active) {
4108                         if (ha->dpc_hp_wq)
4109                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4110                 } else
4111                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4112                             "NIC Core reset is already active. Skip "
4113                             "scheduling it again.\n");
4114                 break;
4115         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4116                 if (ha->dpc_hp_wq)
4117                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4118                 break;
4119         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4120                 if (ha->dpc_hp_wq)
4121                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4122                 break;
4123         default:
4124                 ql_log(ql_log_warn, base_vha, 0xb05f,
4125                     "Unknown work-code=0x%x.\n", work_code);
4126         }
4127
4128         return;
4129 }
4130
4131 /* Work: Perform NIC Core Unrecoverable state handling */
4132 void
4133 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4134 {
4135         struct qla_hw_data *ha =
4136                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4137         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4138         uint32_t dev_state = 0;
4139
4140         qla83xx_idc_lock(base_vha, 0);
4141         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4142         qla83xx_reset_ownership(base_vha);
4143         if (ha->flags.nic_core_reset_owner) {
4144                 ha->flags.nic_core_reset_owner = 0;
4145                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4146                     QLA8XXX_DEV_FAILED);
4147                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4148                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4149         }
4150         qla83xx_idc_unlock(base_vha, 0);
4151 }
4152
4153 /* Work: Execute IDC state handler */
4154 void
4155 qla83xx_idc_state_handler_work(struct work_struct *work)
4156 {
4157         struct qla_hw_data *ha =
4158                 container_of(work, struct qla_hw_data, idc_state_handler);
4159         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4160         uint32_t dev_state = 0;
4161
4162         qla83xx_idc_lock(base_vha, 0);
4163         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4164         if (dev_state == QLA8XXX_DEV_FAILED ||
4165                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4166                 qla83xx_idc_state_handler(base_vha);
4167         qla83xx_idc_unlock(base_vha, 0);
4168 }
4169
4170 static int
4171 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4172 {
4173         int rval = QLA_SUCCESS;
4174         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4175         uint32_t heart_beat_counter1, heart_beat_counter2;
4176
4177         do {
4178                 if (time_after(jiffies, heart_beat_wait)) {
4179                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4180                             "Nic Core f/w is not alive.\n");
4181                         rval = QLA_FUNCTION_FAILED;
4182                         break;
4183                 }
4184
4185                 qla83xx_idc_lock(base_vha, 0);
4186                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4187                     &heart_beat_counter1);
4188                 qla83xx_idc_unlock(base_vha, 0);
4189                 msleep(100);
4190                 qla83xx_idc_lock(base_vha, 0);
4191                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4192                     &heart_beat_counter2);
4193                 qla83xx_idc_unlock(base_vha, 0);
4194         } while (heart_beat_counter1 == heart_beat_counter2);
4195
4196         return rval;
4197 }
4198
4199 /* Work: Perform NIC Core Reset handling */
4200 void
4201 qla83xx_nic_core_reset_work(struct work_struct *work)
4202 {
4203         struct qla_hw_data *ha =
4204                 container_of(work, struct qla_hw_data, nic_core_reset);
4205         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4206         uint32_t dev_state = 0;
4207
4208         if (IS_QLA2031(ha)) {
4209                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4210                         ql_log(ql_log_warn, base_vha, 0xb081,
4211                             "Failed to dump mctp\n");
4212                 return;
4213         }
4214
4215         if (!ha->flags.nic_core_reset_hdlr_active) {
4216                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4217                         qla83xx_idc_lock(base_vha, 0);
4218                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4219                             &dev_state);
4220                         qla83xx_idc_unlock(base_vha, 0);
4221                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4222                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4223                                     "Nic Core f/w is alive.\n");
4224                                 return;
4225                         }
4226                 }
4227
4228                 ha->flags.nic_core_reset_hdlr_active = 1;
4229                 if (qla83xx_nic_core_reset(base_vha)) {
4230                         /* NIC Core reset failed. */
4231                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4232                             "NIC Core reset failed.\n");
4233                 }
4234                 ha->flags.nic_core_reset_hdlr_active = 0;
4235         }
4236 }
4237
4238 /* Work: Handle 8200 IDC aens */
4239 void
4240 qla83xx_service_idc_aen(struct work_struct *work)
4241 {
4242         struct qla_hw_data *ha =
4243                 container_of(work, struct qla_hw_data, idc_aen);
4244         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4245         uint32_t dev_state, idc_control;
4246
4247         qla83xx_idc_lock(base_vha, 0);
4248         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4249         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4250         qla83xx_idc_unlock(base_vha, 0);
4251         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4252                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4253                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4254                             "Application requested NIC Core Reset.\n");
4255                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4256                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4257                     QLA_SUCCESS) {
4258                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4259                             "Other protocol driver requested NIC Core Reset.\n");
4260                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4261                 }
4262         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4263                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4264                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4265         }
4266 }
4267
4268 static void
4269 qla83xx_wait_logic(void)
4270 {
4271         int i;
4272
4273         /* Yield CPU */
4274         if (!in_interrupt()) {
4275                 /*
4276                  * Wait about 200ms before retrying again.
4277                  * This controls the number of retries for single
4278                  * lock operation.
4279                  */
4280                 msleep(100);
4281                 schedule();
4282         } else {
4283                 for (i = 0; i < 20; i++)
4284                         cpu_relax(); /* This a nop instr on i386 */
4285         }
4286 }
4287
4288 static int
4289 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4290 {
4291         int rval;
4292         uint32_t data;
4293         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4294         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4295         struct qla_hw_data *ha = base_vha->hw;
4296         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4297             "Trying force recovery of the IDC lock.\n");
4298
4299         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4300         if (rval)
4301                 return rval;
4302
4303         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4304                 return QLA_SUCCESS;
4305         } else {
4306                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4307                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4308                     data);
4309                 if (rval)
4310                         return rval;
4311
4312                 msleep(200);
4313
4314                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4315                     &data);
4316                 if (rval)
4317                         return rval;
4318
4319                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4320                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4321                                         ~(idc_lck_rcvry_stage_mask));
4322                         rval = qla83xx_wr_reg(base_vha,
4323                             QLA83XX_IDC_LOCK_RECOVERY, data);
4324                         if (rval)
4325                                 return rval;
4326
4327                         /* Forcefully perform IDC UnLock */
4328                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4329                             &data);
4330                         if (rval)
4331                                 return rval;
4332                         /* Clear lock-id by setting 0xff */
4333                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4334                             0xff);
4335                         if (rval)
4336                                 return rval;
4337                         /* Clear lock-recovery by setting 0x0 */
4338                         rval = qla83xx_wr_reg(base_vha,
4339                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4340                         if (rval)
4341                                 return rval;
4342                 } else
4343                         return QLA_SUCCESS;
4344         }
4345
4346         return rval;
4347 }
4348
4349 static int
4350 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4351 {
4352         int rval = QLA_SUCCESS;
4353         uint32_t o_drv_lockid, n_drv_lockid;
4354         unsigned long lock_recovery_timeout;
4355
4356         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4357 retry_lockid:
4358         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4359         if (rval)
4360                 goto exit;
4361
4362         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4363         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4364                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4365                         return QLA_SUCCESS;
4366                 else
4367                         return QLA_FUNCTION_FAILED;
4368         }
4369
4370         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4371         if (rval)
4372                 goto exit;
4373
4374         if (o_drv_lockid == n_drv_lockid) {
4375                 qla83xx_wait_logic();
4376                 goto retry_lockid;
4377         } else
4378                 return QLA_SUCCESS;
4379
4380 exit:
4381         return rval;
4382 }
4383
4384 void
4385 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4386 {
4387         uint16_t options = (requester_id << 15) | BIT_6;
4388         uint32_t data;
4389         uint32_t lock_owner;
4390         struct qla_hw_data *ha = base_vha->hw;
4391
4392         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4393 retry_lock:
4394         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4395             == QLA_SUCCESS) {
4396                 if (data) {
4397                         /* Setting lock-id to our function-number */
4398                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4399                             ha->portnum);
4400                 } else {
4401                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4402                             &lock_owner);
4403                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4404                             "Failed to acquire IDC lock, acquired by %d, "
4405                             "retrying...\n", lock_owner);
4406
4407                         /* Retry/Perform IDC-Lock recovery */
4408                         if (qla83xx_idc_lock_recovery(base_vha)
4409                             == QLA_SUCCESS) {
4410                                 qla83xx_wait_logic();
4411                                 goto retry_lock;
4412                         } else
4413                                 ql_log(ql_log_warn, base_vha, 0xb075,
4414                                     "IDC Lock recovery FAILED.\n");
4415                 }
4416
4417         }
4418
4419         return;
4420
4421         /* XXX: IDC-lock implementation using access-control mbx */
4422 retry_lock2:
4423         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4424                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4425                     "Failed to acquire IDC lock. retrying...\n");
4426                 /* Retry/Perform IDC-Lock recovery */
4427                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4428                         qla83xx_wait_logic();
4429                         goto retry_lock2;
4430                 } else
4431                         ql_log(ql_log_warn, base_vha, 0xb076,
4432                             "IDC Lock recovery FAILED.\n");
4433         }
4434
4435         return;
4436 }
4437
4438 void
4439 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4440 {
4441 #if 0
4442         uint16_t options = (requester_id << 15) | BIT_7;
4443 #endif
4444         uint16_t retry;
4445         uint32_t data;
4446         struct qla_hw_data *ha = base_vha->hw;
4447
4448         /* IDC-unlock implementation using driver-unlock/lock-id
4449          * remote registers
4450          */
4451         retry = 0;
4452 retry_unlock:
4453         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4454             == QLA_SUCCESS) {
4455                 if (data == ha->portnum) {
4456                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4457                         /* Clearing lock-id by setting 0xff */
4458                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4459                 } else if (retry < 10) {
4460                         /* SV: XXX: IDC unlock retrying needed here? */
4461
4462                         /* Retry for IDC-unlock */
4463                         qla83xx_wait_logic();
4464                         retry++;
4465                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4466                             "Failed to release IDC lock, retyring=%d\n", retry);
4467                         goto retry_unlock;
4468                 }
4469         } else if (retry < 10) {
4470                 /* Retry for IDC-unlock */
4471                 qla83xx_wait_logic();
4472                 retry++;
4473                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4474                     "Failed to read drv-lockid, retyring=%d\n", retry);
4475                 goto retry_unlock;
4476         }
4477
4478         return;
4479
4480 #if 0
4481         /* XXX: IDC-unlock implementation using access-control mbx */
4482         retry = 0;
4483 retry_unlock2:
4484         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4485                 if (retry < 10) {
4486                         /* Retry for IDC-unlock */
4487                         qla83xx_wait_logic();
4488                         retry++;
4489                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4490                             "Failed to release IDC lock, retyring=%d\n", retry);
4491                         goto retry_unlock2;
4492                 }
4493         }
4494
4495         return;
4496 #endif
4497 }
4498
4499 int
4500 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4501 {
4502         int rval = QLA_SUCCESS;
4503         struct qla_hw_data *ha = vha->hw;
4504         uint32_t drv_presence;
4505
4506         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4507         if (rval == QLA_SUCCESS) {
4508                 drv_presence |= (1 << ha->portnum);
4509                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4510                     drv_presence);
4511         }
4512
4513         return rval;
4514 }
4515
4516 int
4517 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4518 {
4519         int rval = QLA_SUCCESS;
4520
4521         qla83xx_idc_lock(vha, 0);
4522         rval = __qla83xx_set_drv_presence(vha);
4523         qla83xx_idc_unlock(vha, 0);
4524
4525         return rval;
4526 }
4527
4528 int
4529 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4530 {
4531         int rval = QLA_SUCCESS;
4532         struct qla_hw_data *ha = vha->hw;
4533         uint32_t drv_presence;
4534
4535         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4536         if (rval == QLA_SUCCESS) {
4537                 drv_presence &= ~(1 << ha->portnum);
4538                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4539                     drv_presence);
4540         }
4541
4542         return rval;
4543 }
4544
4545 int
4546 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4547 {
4548         int rval = QLA_SUCCESS;
4549
4550         qla83xx_idc_lock(vha, 0);
4551         rval = __qla83xx_clear_drv_presence(vha);
4552         qla83xx_idc_unlock(vha, 0);
4553
4554         return rval;
4555 }
4556
4557 static void
4558 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4559 {
4560         struct qla_hw_data *ha = vha->hw;
4561         uint32_t drv_ack, drv_presence;
4562         unsigned long ack_timeout;
4563
4564         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4565         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4566         while (1) {
4567                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4568                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4569                 if ((drv_ack & drv_presence) == drv_presence)
4570                         break;
4571
4572                 if (time_after_eq(jiffies, ack_timeout)) {
4573                         ql_log(ql_log_warn, vha, 0xb067,
4574                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4575                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4576                         /*
4577                          * The function(s) which did not ack in time are forced
4578                          * to withdraw any further participation in the IDC
4579                          * reset.
4580                          */
4581                         if (drv_ack != drv_presence)
4582                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4583                                     drv_ack);
4584                         break;
4585                 }
4586
4587                 qla83xx_idc_unlock(vha, 0);
4588                 msleep(1000);
4589                 qla83xx_idc_lock(vha, 0);
4590         }
4591
4592         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4593         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4594 }
4595
4596 static int
4597 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4598 {
4599         int rval = QLA_SUCCESS;
4600         uint32_t idc_control;
4601
4602         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4603         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4604
4605         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4606         __qla83xx_get_idc_control(vha, &idc_control);
4607         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4608         __qla83xx_set_idc_control(vha, 0);
4609
4610         qla83xx_idc_unlock(vha, 0);
4611         rval = qla83xx_restart_nic_firmware(vha);
4612         qla83xx_idc_lock(vha, 0);
4613
4614         if (rval != QLA_SUCCESS) {
4615                 ql_log(ql_log_fatal, vha, 0xb06a,
4616                     "Failed to restart NIC f/w.\n");
4617                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4618                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4619         } else {
4620                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4621                     "Success in restarting nic f/w.\n");
4622                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4623                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4624         }
4625
4626         return rval;
4627 }
4628
4629 /* Assumes idc_lock always held on entry */
4630 int
4631 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4632 {
4633         struct qla_hw_data *ha = base_vha->hw;
4634         int rval = QLA_SUCCESS;
4635         unsigned long dev_init_timeout;
4636         uint32_t dev_state;
4637
4638         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4639         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4640
4641         while (1) {
4642
4643                 if (time_after_eq(jiffies, dev_init_timeout)) {
4644                         ql_log(ql_log_warn, base_vha, 0xb06e,
4645                             "Initialization TIMEOUT!\n");
4646                         /* Init timeout. Disable further NIC Core
4647                          * communication.
4648                          */
4649                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4650                                 QLA8XXX_DEV_FAILED);
4651                         ql_log(ql_log_info, base_vha, 0xb06f,
4652                             "HW State: FAILED.\n");
4653                 }
4654
4655                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4656                 switch (dev_state) {
4657                 case QLA8XXX_DEV_READY:
4658                         if (ha->flags.nic_core_reset_owner)
4659                                 qla83xx_idc_audit(base_vha,
4660                                     IDC_AUDIT_COMPLETION);
4661                         ha->flags.nic_core_reset_owner = 0;
4662                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4663                             "Reset_owner reset by 0x%x.\n",
4664                             ha->portnum);
4665                         goto exit;
4666                 case QLA8XXX_DEV_COLD:
4667                         if (ha->flags.nic_core_reset_owner)
4668                                 rval = qla83xx_device_bootstrap(base_vha);
4669                         else {
4670                         /* Wait for AEN to change device-state */
4671                                 qla83xx_idc_unlock(base_vha, 0);
4672                                 msleep(1000);
4673                                 qla83xx_idc_lock(base_vha, 0);
4674                         }
4675                         break;
4676                 case QLA8XXX_DEV_INITIALIZING:
4677                         /* Wait for AEN to change device-state */
4678                         qla83xx_idc_unlock(base_vha, 0);
4679                         msleep(1000);
4680                         qla83xx_idc_lock(base_vha, 0);
4681                         break;
4682                 case QLA8XXX_DEV_NEED_RESET:
4683                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4684                                 qla83xx_need_reset_handler(base_vha);
4685                         else {
4686                                 /* Wait for AEN to change device-state */
4687                                 qla83xx_idc_unlock(base_vha, 0);
4688                                 msleep(1000);
4689                                 qla83xx_idc_lock(base_vha, 0);
4690                         }
4691                         /* reset timeout value after need reset handler */
4692                         dev_init_timeout = jiffies +
4693                             (ha->fcoe_dev_init_timeout * HZ);
4694                         break;
4695                 case QLA8XXX_DEV_NEED_QUIESCENT:
4696                         /* XXX: DEBUG for now */
4697                         qla83xx_idc_unlock(base_vha, 0);
4698                         msleep(1000);
4699                         qla83xx_idc_lock(base_vha, 0);
4700                         break;
4701                 case QLA8XXX_DEV_QUIESCENT:
4702                         /* XXX: DEBUG for now */
4703                         if (ha->flags.quiesce_owner)
4704                                 goto exit;
4705
4706                         qla83xx_idc_unlock(base_vha, 0);
4707                         msleep(1000);
4708                         qla83xx_idc_lock(base_vha, 0);
4709                         dev_init_timeout = jiffies +
4710                             (ha->fcoe_dev_init_timeout * HZ);
4711                         break;
4712                 case QLA8XXX_DEV_FAILED:
4713                         if (ha->flags.nic_core_reset_owner)
4714                                 qla83xx_idc_audit(base_vha,
4715                                     IDC_AUDIT_COMPLETION);
4716                         ha->flags.nic_core_reset_owner = 0;
4717                         __qla83xx_clear_drv_presence(base_vha);
4718                         qla83xx_idc_unlock(base_vha, 0);
4719                         qla8xxx_dev_failed_handler(base_vha);
4720                         rval = QLA_FUNCTION_FAILED;
4721                         qla83xx_idc_lock(base_vha, 0);
4722                         goto exit;
4723                 case QLA8XXX_BAD_VALUE:
4724                         qla83xx_idc_unlock(base_vha, 0);
4725                         msleep(1000);
4726                         qla83xx_idc_lock(base_vha, 0);
4727                         break;
4728                 default:
4729                         ql_log(ql_log_warn, base_vha, 0xb071,
4730                             "Unknown Device State: %x.\n", dev_state);
4731                         qla83xx_idc_unlock(base_vha, 0);
4732                         qla8xxx_dev_failed_handler(base_vha);
4733                         rval = QLA_FUNCTION_FAILED;
4734                         qla83xx_idc_lock(base_vha, 0);
4735                         goto exit;
4736                 }
4737         }
4738
4739 exit:
4740         return rval;
4741 }
4742
4743 void
4744 qla2x00_disable_board_on_pci_error(struct work_struct *work)
4745 {
4746         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
4747             board_disable);
4748         struct pci_dev *pdev = ha->pdev;
4749         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4750
4751         ql_log(ql_log_warn, base_vha, 0x015b,
4752             "Disabling adapter.\n");
4753
4754         set_bit(UNLOADING, &base_vha->dpc_flags);
4755
4756         qla2x00_delete_all_vps(ha, base_vha);
4757
4758         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4759
4760         qla2x00_dfs_remove(base_vha);
4761
4762         qla84xx_put_chip(base_vha);
4763
4764         if (base_vha->timer_active)
4765                 qla2x00_stop_timer(base_vha);
4766
4767         base_vha->flags.online = 0;
4768
4769         qla2x00_destroy_deferred_work(ha);
4770
4771         /*
4772          * Do not try to stop beacon blink as it will issue a mailbox
4773          * command.
4774          */
4775         qla2x00_free_sysfs_attr(base_vha, false);
4776
4777         fc_remove_host(base_vha->host);
4778
4779         scsi_remove_host(base_vha->host);
4780
4781         base_vha->flags.init_done = 0;
4782         qla25xx_delete_queues(base_vha);
4783         qla2x00_free_irqs(base_vha);
4784         qla2x00_free_fcports(base_vha);
4785         qla2x00_mem_free(ha);
4786         qla82xx_md_free(base_vha);
4787         qla2x00_free_queues(ha);
4788
4789         qla2x00_unmap_iobases(ha);
4790
4791         pci_release_selected_regions(ha->pdev, ha->bars);
4792         pci_disable_pcie_error_reporting(pdev);
4793         pci_disable_device(pdev);
4794
4795         /*
4796          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
4797          */
4798 }
4799
4800 /**************************************************************************
4801 * qla2x00_do_dpc
4802 *   This kernel thread is a task that is schedule by the interrupt handler
4803 *   to perform the background processing for interrupts.
4804 *
4805 * Notes:
4806 * This task always run in the context of a kernel thread.  It
4807 * is kick-off by the driver's detect code and starts up
4808 * up one per adapter. It immediately goes to sleep and waits for
4809 * some fibre event.  When either the interrupt handler or
4810 * the timer routine detects a event it will one of the task
4811 * bits then wake us up.
4812 **************************************************************************/
4813 static int
4814 qla2x00_do_dpc(void *data)
4815 {
4816         scsi_qla_host_t *base_vha;
4817         struct qla_hw_data *ha;
4818
4819         ha = (struct qla_hw_data *)data;
4820         base_vha = pci_get_drvdata(ha->pdev);
4821
4822         set_user_nice(current, MIN_NICE);
4823
4824         set_current_state(TASK_INTERRUPTIBLE);
4825         while (!kthread_should_stop()) {
4826                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4827                     "DPC handler sleeping.\n");
4828
4829                 schedule();
4830
4831                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4832                         goto end_loop;
4833
4834                 if (ha->flags.eeh_busy) {
4835                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4836                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4837                         goto end_loop;
4838                 }
4839
4840                 ha->dpc_active = 1;
4841
4842                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4843                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4844                     base_vha->dpc_flags);
4845
4846                 qla2x00_do_work(base_vha);
4847
4848                 if (IS_P3P_TYPE(ha)) {
4849                         if (IS_QLA8044(ha)) {
4850                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4851                                         &base_vha->dpc_flags)) {
4852                                         qla8044_idc_lock(ha);
4853                                         qla8044_wr_direct(base_vha,
4854                                                 QLA8044_CRB_DEV_STATE_INDEX,
4855                                                 QLA8XXX_DEV_FAILED);
4856                                         qla8044_idc_unlock(ha);
4857                                         ql_log(ql_log_info, base_vha, 0x4004,
4858                                                 "HW State: FAILED.\n");
4859                                         qla8044_device_state_handler(base_vha);
4860                                         continue;
4861                                 }
4862
4863                         } else {
4864                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4865                                         &base_vha->dpc_flags)) {
4866                                         qla82xx_idc_lock(ha);
4867                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4868                                                 QLA8XXX_DEV_FAILED);
4869                                         qla82xx_idc_unlock(ha);
4870                                         ql_log(ql_log_info, base_vha, 0x0151,
4871                                                 "HW State: FAILED.\n");
4872                                         qla82xx_device_state_handler(base_vha);
4873                                         continue;
4874                                 }
4875                         }
4876
4877                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4878                                 &base_vha->dpc_flags)) {
4879
4880                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4881                                     "FCoE context reset scheduled.\n");
4882                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4883                                         &base_vha->dpc_flags))) {
4884                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4885                                                 /* FCoE-ctx reset failed.
4886                                                  * Escalate to chip-reset
4887                                                  */
4888                                                 set_bit(ISP_ABORT_NEEDED,
4889                                                         &base_vha->dpc_flags);
4890                                         }
4891                                         clear_bit(ABORT_ISP_ACTIVE,
4892                                                 &base_vha->dpc_flags);
4893                                 }
4894
4895                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4896                                     "FCoE context reset end.\n");
4897                         }
4898                 } else if (IS_QLAFX00(ha)) {
4899                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4900                                 &base_vha->dpc_flags)) {
4901                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4902                                     "Firmware Reset Recovery\n");
4903                                 if (qlafx00_reset_initialize(base_vha)) {
4904                                         /* Failed. Abort isp later. */
4905                                         if (!test_bit(UNLOADING,
4906                                             &base_vha->dpc_flags)) {
4907                                                 set_bit(ISP_UNRECOVERABLE,
4908                                                     &base_vha->dpc_flags);
4909                                                 ql_dbg(ql_dbg_dpc, base_vha,
4910                                                     0x4021,
4911                                                     "Reset Recovery Failed\n");
4912                                         }
4913                                 }
4914                         }
4915
4916                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4917                                 &base_vha->dpc_flags)) {
4918                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4919                                     "ISPFx00 Target Scan scheduled\n");
4920                                 if (qlafx00_rescan_isp(base_vha)) {
4921                                         if (!test_bit(UNLOADING,
4922                                             &base_vha->dpc_flags))
4923                                                 set_bit(ISP_UNRECOVERABLE,
4924                                                     &base_vha->dpc_flags);
4925                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4926                                             "ISPFx00 Target Scan Failed\n");
4927                                 }
4928                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4929                                     "ISPFx00 Target Scan End\n");
4930                         }
4931                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
4932                                 &base_vha->dpc_flags)) {
4933                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
4934                                     "ISPFx00 Host Info resend scheduled\n");
4935                                 qlafx00_fx_disc(base_vha,
4936                                     &base_vha->hw->mr.fcport,
4937                                     FXDISC_REG_HOST_INFO);
4938                         }
4939                 }
4940
4941                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4942                                                 &base_vha->dpc_flags)) {
4943
4944                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4945                             "ISP abort scheduled.\n");
4946                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4947                             &base_vha->dpc_flags))) {
4948
4949                                 if (ha->isp_ops->abort_isp(base_vha)) {
4950                                         /* failed. retry later */
4951                                         set_bit(ISP_ABORT_NEEDED,
4952                                             &base_vha->dpc_flags);
4953                                 }
4954                                 clear_bit(ABORT_ISP_ACTIVE,
4955                                                 &base_vha->dpc_flags);
4956                         }
4957
4958                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4959                             "ISP abort end.\n");
4960                 }
4961
4962                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4963                     &base_vha->dpc_flags)) {
4964                         qla2x00_update_fcports(base_vha);
4965                 }
4966
4967                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4968                         int ret;
4969                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4970                         if (ret != QLA_SUCCESS)
4971                                 ql_log(ql_log_warn, base_vha, 0x121,
4972                                     "Failed to enable receiving of RSCN "
4973                                     "requests: 0x%x.\n", ret);
4974                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4975                 }
4976
4977                 if (IS_QLAFX00(ha))
4978                         goto loop_resync_check;
4979
4980                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4981                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
4982                             "Quiescence mode scheduled.\n");
4983                         if (IS_P3P_TYPE(ha)) {
4984                                 if (IS_QLA82XX(ha))
4985                                         qla82xx_device_state_handler(base_vha);
4986                                 if (IS_QLA8044(ha))
4987                                         qla8044_device_state_handler(base_vha);
4988                                 clear_bit(ISP_QUIESCE_NEEDED,
4989                                     &base_vha->dpc_flags);
4990                                 if (!ha->flags.quiesce_owner) {
4991                                         qla2x00_perform_loop_resync(base_vha);
4992                                         if (IS_QLA82XX(ha)) {
4993                                                 qla82xx_idc_lock(ha);
4994                                                 qla82xx_clear_qsnt_ready(
4995                                                     base_vha);
4996                                                 qla82xx_idc_unlock(ha);
4997                                         } else if (IS_QLA8044(ha)) {
4998                                                 qla8044_idc_lock(ha);
4999                                                 qla8044_clear_qsnt_ready(
5000                                                     base_vha);
5001                                                 qla8044_idc_unlock(ha);
5002                                         }
5003                                 }
5004                         } else {
5005                                 clear_bit(ISP_QUIESCE_NEEDED,
5006                                     &base_vha->dpc_flags);
5007                                 qla2x00_quiesce_io(base_vha);
5008                         }
5009                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5010                             "Quiescence mode end.\n");
5011                 }
5012
5013                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5014                                 &base_vha->dpc_flags) &&
5015                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5016
5017                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5018                             "Reset marker scheduled.\n");
5019                         qla2x00_rst_aen(base_vha);
5020                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5021                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5022                             "Reset marker end.\n");
5023                 }
5024
5025                 /* Retry each device up to login retry count */
5026                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5027                                                 &base_vha->dpc_flags)) &&
5028                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5029                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5030
5031                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5032                             "Relogin scheduled.\n");
5033                         qla2x00_relogin(base_vha);
5034                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5035                             "Relogin end.\n");
5036                 }
5037 loop_resync_check:
5038                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5039                     &base_vha->dpc_flags)) {
5040
5041                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5042                             "Loop resync scheduled.\n");
5043
5044                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5045                             &base_vha->dpc_flags))) {
5046
5047                                 qla2x00_loop_resync(base_vha);
5048
5049                                 clear_bit(LOOP_RESYNC_ACTIVE,
5050                                                 &base_vha->dpc_flags);
5051                         }
5052
5053                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5054                             "Loop resync end.\n");
5055                 }
5056
5057                 if (IS_QLAFX00(ha))
5058                         goto intr_on_check;
5059
5060                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5061                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5062                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5063                         qla2xxx_flash_npiv_conf(base_vha);
5064                 }
5065
5066 intr_on_check:
5067                 if (!ha->interrupts_on)
5068                         ha->isp_ops->enable_intrs(ha);
5069
5070                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5071                                         &base_vha->dpc_flags)) {
5072                         if (ha->beacon_blink_led == 1)
5073                                 ha->isp_ops->beacon_blink(base_vha);
5074                 }
5075
5076                 if (!IS_QLAFX00(ha))
5077                         qla2x00_do_dpc_all_vps(base_vha);
5078
5079                 ha->dpc_active = 0;
5080 end_loop:
5081                 set_current_state(TASK_INTERRUPTIBLE);
5082         } /* End of while(1) */
5083         __set_current_state(TASK_RUNNING);
5084
5085         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5086             "DPC handler exiting.\n");
5087
5088         /*
5089          * Make sure that nobody tries to wake us up again.
5090          */
5091         ha->dpc_active = 0;
5092
5093         /* Cleanup any residual CTX SRBs. */
5094         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5095
5096         return 0;
5097 }
5098
5099 void
5100 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5101 {
5102         struct qla_hw_data *ha = vha->hw;
5103         struct task_struct *t = ha->dpc_thread;
5104
5105         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5106                 wake_up_process(t);
5107 }
5108
5109 /*
5110 *  qla2x00_rst_aen
5111 *      Processes asynchronous reset.
5112 *
5113 * Input:
5114 *      ha  = adapter block pointer.
5115 */
5116 static void
5117 qla2x00_rst_aen(scsi_qla_host_t *vha)
5118 {
5119         if (vha->flags.online && !vha->flags.reset_active &&
5120             !atomic_read(&vha->loop_down_timer) &&
5121             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5122                 do {
5123                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5124
5125                         /*
5126                          * Issue marker command only when we are going to start
5127                          * the I/O.
5128                          */
5129                         vha->marker_needed = 1;
5130                 } while (!atomic_read(&vha->loop_down_timer) &&
5131                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5132         }
5133 }
5134
5135 /**************************************************************************
5136 *   qla2x00_timer
5137 *
5138 * Description:
5139 *   One second timer
5140 *
5141 * Context: Interrupt
5142 ***************************************************************************/
5143 void
5144 qla2x00_timer(scsi_qla_host_t *vha)
5145 {
5146         unsigned long   cpu_flags = 0;
5147         int             start_dpc = 0;
5148         int             index;
5149         srb_t           *sp;
5150         uint16_t        w;
5151         struct qla_hw_data *ha = vha->hw;
5152         struct req_que *req;
5153
5154         if (ha->flags.eeh_busy) {
5155                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5156                     "EEH = %d, restarting timer.\n",
5157                     ha->flags.eeh_busy);
5158                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5159                 return;
5160         }
5161
5162         /*
5163          * Hardware read to raise pending EEH errors during mailbox waits. If
5164          * the read returns -1 then disable the board.
5165          */
5166         if (!pci_channel_offline(ha->pdev)) {
5167                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5168                 qla2x00_check_reg16_for_disconnect(vha, w);
5169         }
5170
5171         /* Make sure qla82xx_watchdog is run only for physical port */
5172         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5173                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5174                         start_dpc++;
5175                 if (IS_QLA82XX(ha))
5176                         qla82xx_watchdog(vha);
5177                 else if (IS_QLA8044(ha))
5178                         qla8044_watchdog(vha);
5179         }
5180
5181         if (!vha->vp_idx && IS_QLAFX00(ha))
5182                 qlafx00_timer_routine(vha);
5183
5184         /* Loop down handler. */
5185         if (atomic_read(&vha->loop_down_timer) > 0 &&
5186             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5187             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5188                 && vha->flags.online) {
5189
5190                 if (atomic_read(&vha->loop_down_timer) ==
5191                     vha->loop_down_abort_time) {
5192
5193                         ql_log(ql_log_info, vha, 0x6008,
5194                             "Loop down - aborting the queues before time expires.\n");
5195
5196                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5197                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5198
5199                         /*
5200                          * Schedule an ISP abort to return any FCP2-device
5201                          * commands.
5202                          */
5203                         /* NPIV - scan physical port only */
5204                         if (!vha->vp_idx) {
5205                                 spin_lock_irqsave(&ha->hardware_lock,
5206                                     cpu_flags);
5207                                 req = ha->req_q_map[0];
5208                                 for (index = 1;
5209                                     index < req->num_outstanding_cmds;
5210                                     index++) {
5211                                         fc_port_t *sfcp;
5212
5213                                         sp = req->outstanding_cmds[index];
5214                                         if (!sp)
5215                                                 continue;
5216                                         if (sp->type != SRB_SCSI_CMD)
5217                                                 continue;
5218                                         sfcp = sp->fcport;
5219                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5220                                                 continue;
5221
5222                                         if (IS_QLA82XX(ha))
5223                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5224                                                         &vha->dpc_flags);
5225                                         else
5226                                                 set_bit(ISP_ABORT_NEEDED,
5227                                                         &vha->dpc_flags);
5228                                         break;
5229                                 }
5230                                 spin_unlock_irqrestore(&ha->hardware_lock,
5231                                                                 cpu_flags);
5232                         }
5233                         start_dpc++;
5234                 }
5235
5236                 /* if the loop has been down for 4 minutes, reinit adapter */
5237                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5238                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5239                                 ql_log(ql_log_warn, vha, 0x6009,
5240                                     "Loop down - aborting ISP.\n");
5241
5242                                 if (IS_QLA82XX(ha))
5243                                         set_bit(FCOE_CTX_RESET_NEEDED,
5244                                                 &vha->dpc_flags);
5245                                 else
5246                                         set_bit(ISP_ABORT_NEEDED,
5247                                                 &vha->dpc_flags);
5248                         }
5249                 }
5250                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5251                     "Loop down - seconds remaining %d.\n",
5252                     atomic_read(&vha->loop_down_timer));
5253         }
5254         /* Check if beacon LED needs to be blinked for physical host only */
5255         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5256                 /* There is no beacon_blink function for ISP82xx */
5257                 if (!IS_P3P_TYPE(ha)) {
5258                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5259                         start_dpc++;
5260                 }
5261         }
5262
5263         /* Process any deferred work. */
5264         if (!list_empty(&vha->work_list))
5265                 start_dpc++;
5266
5267         /* Schedule the DPC routine if needed */
5268         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5269             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5270             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5271             start_dpc ||
5272             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5273             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5274             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5275             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5276             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5277             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5278                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5279                     "isp_abort_needed=%d loop_resync_needed=%d "
5280                     "fcport_update_needed=%d start_dpc=%d "
5281                     "reset_marker_needed=%d",
5282                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5283                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5284                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5285                     start_dpc,
5286                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5287                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5288                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5289                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5290                     "relogin_needed=%d.\n",
5291                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5292                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5293                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5294                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5295                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5296                 qla2xxx_wake_dpc(vha);
5297         }
5298
5299         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5300 }
5301
5302 /* Firmware interface routines. */
5303
5304 #define FW_BLOBS        11
5305 #define FW_ISP21XX      0
5306 #define FW_ISP22XX      1
5307 #define FW_ISP2300      2
5308 #define FW_ISP2322      3
5309 #define FW_ISP24XX      4
5310 #define FW_ISP25XX      5
5311 #define FW_ISP81XX      6
5312 #define FW_ISP82XX      7
5313 #define FW_ISP2031      8
5314 #define FW_ISP8031      9
5315 #define FW_ISP27XX      10
5316
5317 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5318 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5319 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5320 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5321 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5322 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5323 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5324 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5325 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5326 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5327 #define FW_FILE_ISP27XX "ql2700_fw.bin"
5328
5329
5330 static DEFINE_MUTEX(qla_fw_lock);
5331
5332 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5333         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5334         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5335         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5336         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5337         { .name = FW_FILE_ISP24XX, },
5338         { .name = FW_FILE_ISP25XX, },
5339         { .name = FW_FILE_ISP81XX, },
5340         { .name = FW_FILE_ISP82XX, },
5341         { .name = FW_FILE_ISP2031, },
5342         { .name = FW_FILE_ISP8031, },
5343         { .name = FW_FILE_ISP27XX, },
5344 };
5345
5346 struct fw_blob *
5347 qla2x00_request_firmware(scsi_qla_host_t *vha)
5348 {
5349         struct qla_hw_data *ha = vha->hw;
5350         struct fw_blob *blob;
5351
5352         if (IS_QLA2100(ha)) {
5353                 blob = &qla_fw_blobs[FW_ISP21XX];
5354         } else if (IS_QLA2200(ha)) {
5355                 blob = &qla_fw_blobs[FW_ISP22XX];
5356         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5357                 blob = &qla_fw_blobs[FW_ISP2300];
5358         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5359                 blob = &qla_fw_blobs[FW_ISP2322];
5360         } else if (IS_QLA24XX_TYPE(ha)) {
5361                 blob = &qla_fw_blobs[FW_ISP24XX];
5362         } else if (IS_QLA25XX(ha)) {
5363                 blob = &qla_fw_blobs[FW_ISP25XX];
5364         } else if (IS_QLA81XX(ha)) {
5365                 blob = &qla_fw_blobs[FW_ISP81XX];
5366         } else if (IS_QLA82XX(ha)) {
5367                 blob = &qla_fw_blobs[FW_ISP82XX];
5368         } else if (IS_QLA2031(ha)) {
5369                 blob = &qla_fw_blobs[FW_ISP2031];
5370         } else if (IS_QLA8031(ha)) {
5371                 blob = &qla_fw_blobs[FW_ISP8031];
5372         } else if (IS_QLA27XX(ha)) {
5373                 blob = &qla_fw_blobs[FW_ISP27XX];
5374         } else {
5375                 return NULL;
5376         }
5377
5378         mutex_lock(&qla_fw_lock);
5379         if (blob->fw)
5380                 goto out;
5381
5382         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5383                 ql_log(ql_log_warn, vha, 0x0063,
5384                     "Failed to load firmware image (%s).\n", blob->name);
5385                 blob->fw = NULL;
5386                 blob = NULL;
5387                 goto out;
5388         }
5389
5390 out:
5391         mutex_unlock(&qla_fw_lock);
5392         return blob;
5393 }
5394
5395 static void
5396 qla2x00_release_firmware(void)
5397 {
5398         int idx;
5399
5400         mutex_lock(&qla_fw_lock);
5401         for (idx = 0; idx < FW_BLOBS; idx++)
5402                 release_firmware(qla_fw_blobs[idx].fw);
5403         mutex_unlock(&qla_fw_lock);
5404 }
5405
5406 static pci_ers_result_t
5407 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5408 {
5409         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5410         struct qla_hw_data *ha = vha->hw;
5411
5412         ql_dbg(ql_dbg_aer, vha, 0x9000,
5413             "PCI error detected, state %x.\n", state);
5414
5415         switch (state) {
5416         case pci_channel_io_normal:
5417                 ha->flags.eeh_busy = 0;
5418                 return PCI_ERS_RESULT_CAN_RECOVER;
5419         case pci_channel_io_frozen:
5420                 ha->flags.eeh_busy = 1;
5421                 /* For ISP82XX complete any pending mailbox cmd */
5422                 if (IS_QLA82XX(ha)) {
5423                         ha->flags.isp82xx_fw_hung = 1;
5424                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5425                         qla82xx_clear_pending_mbx(vha);
5426                 }
5427                 qla2x00_free_irqs(vha);
5428                 pci_disable_device(pdev);
5429                 /* Return back all IOs */
5430                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5431                 return PCI_ERS_RESULT_NEED_RESET;
5432         case pci_channel_io_perm_failure:
5433                 ha->flags.pci_channel_io_perm_failure = 1;
5434                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5435                 return PCI_ERS_RESULT_DISCONNECT;
5436         }
5437         return PCI_ERS_RESULT_NEED_RESET;
5438 }
5439
5440 static pci_ers_result_t
5441 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5442 {
5443         int risc_paused = 0;
5444         uint32_t stat;
5445         unsigned long flags;
5446         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5447         struct qla_hw_data *ha = base_vha->hw;
5448         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5449         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5450
5451         if (IS_QLA82XX(ha))
5452                 return PCI_ERS_RESULT_RECOVERED;
5453
5454         spin_lock_irqsave(&ha->hardware_lock, flags);
5455         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5456                 stat = RD_REG_DWORD(&reg->hccr);
5457                 if (stat & HCCR_RISC_PAUSE)
5458                         risc_paused = 1;
5459         } else if (IS_QLA23XX(ha)) {
5460                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5461                 if (stat & HSR_RISC_PAUSED)
5462                         risc_paused = 1;
5463         } else if (IS_FWI2_CAPABLE(ha)) {
5464                 stat = RD_REG_DWORD(&reg24->host_status);
5465                 if (stat & HSRX_RISC_PAUSED)
5466                         risc_paused = 1;
5467         }
5468         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5469
5470         if (risc_paused) {
5471                 ql_log(ql_log_info, base_vha, 0x9003,
5472                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5473                 ha->isp_ops->fw_dump(base_vha, 0);
5474
5475                 return PCI_ERS_RESULT_NEED_RESET;
5476         } else
5477                 return PCI_ERS_RESULT_RECOVERED;
5478 }
5479
5480 static uint32_t
5481 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5482 {
5483         uint32_t rval = QLA_FUNCTION_FAILED;
5484         uint32_t drv_active = 0;
5485         struct qla_hw_data *ha = base_vha->hw;
5486         int fn;
5487         struct pci_dev *other_pdev = NULL;
5488
5489         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5490             "Entered %s.\n", __func__);
5491
5492         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5493
5494         if (base_vha->flags.online) {
5495                 /* Abort all outstanding commands,
5496                  * so as to be requeued later */
5497                 qla2x00_abort_isp_cleanup(base_vha);
5498         }
5499
5500
5501         fn = PCI_FUNC(ha->pdev->devfn);
5502         while (fn > 0) {
5503                 fn--;
5504                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5505                     "Finding pci device at function = 0x%x.\n", fn);
5506                 other_pdev =
5507                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5508                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5509                     fn));
5510
5511                 if (!other_pdev)
5512                         continue;
5513                 if (atomic_read(&other_pdev->enable_cnt)) {
5514                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5515                             "Found PCI func available and enable at 0x%x.\n",
5516                             fn);
5517                         pci_dev_put(other_pdev);
5518                         break;
5519                 }
5520                 pci_dev_put(other_pdev);
5521         }
5522
5523         if (!fn) {
5524                 /* Reset owner */
5525                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5526                     "This devfn is reset owner = 0x%x.\n",
5527                     ha->pdev->devfn);
5528                 qla82xx_idc_lock(ha);
5529
5530                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5531                     QLA8XXX_DEV_INITIALIZING);
5532
5533                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5534                     QLA82XX_IDC_VERSION);
5535
5536                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5537                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5538                     "drv_active = 0x%x.\n", drv_active);
5539
5540                 qla82xx_idc_unlock(ha);
5541                 /* Reset if device is not already reset
5542                  * drv_active would be 0 if a reset has already been done
5543                  */
5544                 if (drv_active)
5545                         rval = qla82xx_start_firmware(base_vha);
5546                 else
5547                         rval = QLA_SUCCESS;
5548                 qla82xx_idc_lock(ha);
5549
5550                 if (rval != QLA_SUCCESS) {
5551                         ql_log(ql_log_info, base_vha, 0x900b,
5552                             "HW State: FAILED.\n");
5553                         qla82xx_clear_drv_active(ha);
5554                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5555                             QLA8XXX_DEV_FAILED);
5556                 } else {
5557                         ql_log(ql_log_info, base_vha, 0x900c,
5558                             "HW State: READY.\n");
5559                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5560                             QLA8XXX_DEV_READY);
5561                         qla82xx_idc_unlock(ha);
5562                         ha->flags.isp82xx_fw_hung = 0;
5563                         rval = qla82xx_restart_isp(base_vha);
5564                         qla82xx_idc_lock(ha);
5565                         /* Clear driver state register */
5566                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5567                         qla82xx_set_drv_active(base_vha);
5568                 }
5569                 qla82xx_idc_unlock(ha);
5570         } else {
5571                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5572                     "This devfn is not reset owner = 0x%x.\n",
5573                     ha->pdev->devfn);
5574                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5575                     QLA8XXX_DEV_READY)) {
5576                         ha->flags.isp82xx_fw_hung = 0;
5577                         rval = qla82xx_restart_isp(base_vha);
5578                         qla82xx_idc_lock(ha);
5579                         qla82xx_set_drv_active(base_vha);
5580                         qla82xx_idc_unlock(ha);
5581                 }
5582         }
5583         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5584
5585         return rval;
5586 }
5587
5588 static pci_ers_result_t
5589 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5590 {
5591         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5592         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5593         struct qla_hw_data *ha = base_vha->hw;
5594         struct rsp_que *rsp;
5595         int rc, retries = 10;
5596
5597         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5598             "Slot Reset.\n");
5599
5600         /* Workaround: qla2xxx driver which access hardware earlier
5601          * needs error state to be pci_channel_io_online.
5602          * Otherwise mailbox command timesout.
5603          */
5604         pdev->error_state = pci_channel_io_normal;
5605
5606         pci_restore_state(pdev);
5607
5608         /* pci_restore_state() clears the saved_state flag of the device
5609          * save restored state which resets saved_state flag
5610          */
5611         pci_save_state(pdev);
5612
5613         if (ha->mem_only)
5614                 rc = pci_enable_device_mem(pdev);
5615         else
5616                 rc = pci_enable_device(pdev);
5617
5618         if (rc) {
5619                 ql_log(ql_log_warn, base_vha, 0x9005,
5620                     "Can't re-enable PCI device after reset.\n");
5621                 goto exit_slot_reset;
5622         }
5623
5624         rsp = ha->rsp_q_map[0];
5625         if (qla2x00_request_irqs(ha, rsp))
5626                 goto exit_slot_reset;
5627
5628         if (ha->isp_ops->pci_config(base_vha))
5629                 goto exit_slot_reset;
5630
5631         if (IS_QLA82XX(ha)) {
5632                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5633                         ret = PCI_ERS_RESULT_RECOVERED;
5634                         goto exit_slot_reset;
5635                 } else
5636                         goto exit_slot_reset;
5637         }
5638
5639         while (ha->flags.mbox_busy && retries--)
5640                 msleep(1000);
5641
5642         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5643         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5644                 ret =  PCI_ERS_RESULT_RECOVERED;
5645         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5646
5647
5648 exit_slot_reset:
5649         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5650             "slot_reset return %x.\n", ret);
5651
5652         return ret;
5653 }
5654
5655 static void
5656 qla2xxx_pci_resume(struct pci_dev *pdev)
5657 {
5658         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5659         struct qla_hw_data *ha = base_vha->hw;
5660         int ret;
5661
5662         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5663             "pci_resume.\n");
5664
5665         ret = qla2x00_wait_for_hba_online(base_vha);
5666         if (ret != QLA_SUCCESS) {
5667                 ql_log(ql_log_fatal, base_vha, 0x9002,
5668                     "The device failed to resume I/O from slot/link_reset.\n");
5669         }
5670
5671         pci_cleanup_aer_uncorrect_error_status(pdev);
5672
5673         ha->flags.eeh_busy = 0;
5674 }
5675
5676 static void
5677 qla83xx_disable_laser(scsi_qla_host_t *vha)
5678 {
5679         uint32_t reg, data, fn;
5680         struct qla_hw_data *ha = vha->hw;
5681         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
5682
5683         /* pci func #/port # */
5684         ql_dbg(ql_dbg_init, vha, 0x004b,
5685             "Disabling Laser for hba: %p\n", vha);
5686
5687         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
5688                 (BIT_15|BIT_14|BIT_13|BIT_12));
5689
5690         fn = (fn >> 12);
5691
5692         if (fn & 1)
5693                 reg = PORT_1_2031;
5694         else
5695                 reg = PORT_0_2031;
5696
5697         data = LASER_OFF_2031;
5698
5699         qla83xx_wr_reg(vha, reg, data);
5700 }
5701
5702 static const struct pci_error_handlers qla2xxx_err_handler = {
5703         .error_detected = qla2xxx_pci_error_detected,
5704         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5705         .slot_reset = qla2xxx_pci_slot_reset,
5706         .resume = qla2xxx_pci_resume,
5707 };
5708
5709 static struct pci_device_id qla2xxx_pci_tbl[] = {
5710         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5711         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5712         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5713         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5714         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5715         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5716         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5717         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5718         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5719         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5720         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5721         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5722         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5723         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5724         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5725         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5726         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5727         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5728         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5729         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
5730         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
5731         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
5732         { 0 },
5733 };
5734 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5735
5736 static struct pci_driver qla2xxx_pci_driver = {
5737         .name           = QLA2XXX_DRIVER_NAME,
5738         .driver         = {
5739                 .owner          = THIS_MODULE,
5740         },
5741         .id_table       = qla2xxx_pci_tbl,
5742         .probe          = qla2x00_probe_one,
5743         .remove         = qla2x00_remove_one,
5744         .shutdown       = qla2x00_shutdown,
5745         .err_handler    = &qla2xxx_err_handler,
5746 };
5747
5748 static const struct file_operations apidev_fops = {
5749         .owner = THIS_MODULE,
5750         .llseek = noop_llseek,
5751 };
5752
5753 /**
5754  * qla2x00_module_init - Module initialization.
5755  **/
5756 static int __init
5757 qla2x00_module_init(void)
5758 {
5759         int ret = 0;
5760
5761         /* Allocate cache for SRBs. */
5762         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5763             SLAB_HWCACHE_ALIGN, NULL);
5764         if (srb_cachep == NULL) {
5765                 ql_log(ql_log_fatal, NULL, 0x0001,
5766                     "Unable to allocate SRB cache...Failing load!.\n");
5767                 return -ENOMEM;
5768         }
5769
5770         /* Initialize target kmem_cache and mem_pools */
5771         ret = qlt_init();
5772         if (ret < 0) {
5773                 kmem_cache_destroy(srb_cachep);
5774                 return ret;
5775         } else if (ret > 0) {
5776                 /*
5777                  * If initiator mode is explictly disabled by qlt_init(),
5778                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5779                  * performing scsi_scan_target() during LOOP UP event.
5780                  */
5781                 qla2xxx_transport_functions.disable_target_scan = 1;
5782                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5783         }
5784
5785         /* Derive version string. */
5786         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5787         if (ql2xextended_error_logging)
5788                 strcat(qla2x00_version_str, "-debug");
5789
5790         qla2xxx_transport_template =
5791             fc_attach_transport(&qla2xxx_transport_functions);
5792         if (!qla2xxx_transport_template) {
5793                 kmem_cache_destroy(srb_cachep);
5794                 ql_log(ql_log_fatal, NULL, 0x0002,
5795                     "fc_attach_transport failed...Failing load!.\n");
5796                 qlt_exit();
5797                 return -ENODEV;
5798         }
5799
5800         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5801         if (apidev_major < 0) {
5802                 ql_log(ql_log_fatal, NULL, 0x0003,
5803                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5804         }
5805
5806         qla2xxx_transport_vport_template =
5807             fc_attach_transport(&qla2xxx_transport_vport_functions);
5808         if (!qla2xxx_transport_vport_template) {
5809                 kmem_cache_destroy(srb_cachep);
5810                 qlt_exit();
5811                 fc_release_transport(qla2xxx_transport_template);
5812                 ql_log(ql_log_fatal, NULL, 0x0004,
5813                     "fc_attach_transport vport failed...Failing load!.\n");
5814                 return -ENODEV;
5815         }
5816         ql_log(ql_log_info, NULL, 0x0005,
5817             "QLogic Fibre Channel HBA Driver: %s.\n",
5818             qla2x00_version_str);
5819         ret = pci_register_driver(&qla2xxx_pci_driver);
5820         if (ret) {
5821                 kmem_cache_destroy(srb_cachep);
5822                 qlt_exit();
5823                 fc_release_transport(qla2xxx_transport_template);
5824                 fc_release_transport(qla2xxx_transport_vport_template);
5825                 ql_log(ql_log_fatal, NULL, 0x0006,
5826                     "pci_register_driver failed...ret=%d Failing load!.\n",
5827                     ret);
5828         }
5829         return ret;
5830 }
5831
5832 /**
5833  * qla2x00_module_exit - Module cleanup.
5834  **/
5835 static void __exit
5836 qla2x00_module_exit(void)
5837 {
5838         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5839         pci_unregister_driver(&qla2xxx_pci_driver);
5840         qla2x00_release_firmware();
5841         kmem_cache_destroy(srb_cachep);
5842         qlt_exit();
5843         if (ctx_cachep)
5844                 kmem_cache_destroy(ctx_cachep);
5845         fc_release_transport(qla2xxx_transport_template);
5846         fc_release_transport(qla2xxx_transport_vport_template);
5847 }
5848
5849 module_init(qla2x00_module_init);
5850 module_exit(qla2x00_module_exit);
5851
5852 MODULE_AUTHOR("QLogic Corporation");
5853 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5854 MODULE_LICENSE("GPL");
5855 MODULE_VERSION(QLA2XXX_VERSION);
5856 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5857 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5858 MODULE_FIRMWARE(FW_FILE_ISP2300);
5859 MODULE_FIRMWARE(FW_FILE_ISP2322);
5860 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5861 MODULE_FIRMWARE(FW_FILE_ISP25XX);
5862 MODULE_FIRMWARE(FW_FILE_ISP2031);
5863 MODULE_FIRMWARE(FW_FILE_ISP8031);
5864 MODULE_FIRMWARE(FW_FILE_ISP27XX);