kernel/drivers/scsi/mpt3sas/mpt3sas_base.c

   1 /*
   2  * This is the Fusion MPT base driver providing common API layer interface
   3  * for access to MPT (Message Passing Technology) firmware.
   4  *
   5  * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.c
   6  * Copyright (C) 2012-2014  LSI Corporation
   7  * Copyright (C) 2013-2014 Avago Technologies
   8  *  (mailto: MPT-FusionLinux.pdl@avagotech.com)
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version 2
  13  * of the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * NO WARRANTY
  21  * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  22  * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  23  * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  24  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  25  * solely responsible for determining the appropriateness of using and
  26  * distributing the Program and assumes all risks associated with its
  27  * exercise of rights under this Agreement, including but not limited to
  28  * the risks and costs of program errors, damage to or loss of data,
  29  * programs or equipment, and unavailability or interruption of operations.
  30
  31  * DISCLAIMER OF LIABILITY
  32  * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  33  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34  * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  35  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  36  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  37  * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  38  * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  39
  40  * You should have received a copy of the GNU General Public License
  41  * along with this program; if not, write to the Free Software
  42  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
  43  * USA.
  44  */
  45
  46 #include <linux/kernel.h>
  47 #include <linux/module.h>
  48 #include <linux/errno.h>
  49 #include <linux/init.h>
  50 #include <linux/slab.h>
  51 #include <linux/types.h>
  52 #include <linux/pci.h>
  53 #include <linux/kdev_t.h>
  54 #include <linux/blkdev.h>
  55 #include <linux/delay.h>
  56 #include <linux/interrupt.h>
  57 #include <linux/dma-mapping.h>
  58 #include <linux/io.h>
  59 #include <linux/time.h>
  60 #include <linux/kthread.h>
  61 #include <linux/aer.h>
  62
  63
  64 #include "mpt3sas_base.h"
  65
  66 static MPT_CALLBACK     mpt_callbacks[MPT_MAX_CALLBACKS];
  67
  68
  69 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  70
  71  /* maximum controller queue depth */
  72 #define MAX_HBA_QUEUE_DEPTH     30000
  73 #define MAX_CHAIN_DEPTH         100000
  74 static int max_queue_depth = -1;
  75 module_param(max_queue_depth, int, 0);
  76 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  77
  78 static int max_sgl_entries = -1;
  79 module_param(max_sgl_entries, int, 0);
  80 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  81
  82 static int msix_disable = -1;
  83 module_param(msix_disable, int, 0);
  84 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  85
  86 static int max_msix_vectors = -1;
  87 module_param(max_msix_vectors, int, 0);
  88 MODULE_PARM_DESC(max_msix_vectors,
  89         " max msix vectors");
  90
  91 static int mpt3sas_fwfault_debug;
  92 MODULE_PARM_DESC(mpt3sas_fwfault_debug,
  93         " enable detection of firmware fault and halt firmware - (default=0)");
  94
  95 static int
  96 _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc, int sleep_flag);
  97
  98 /**
  99  * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
 100  *
 101  */
 102 static int
 103 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
 104 {
 105         int ret = param_set_int(val, kp);
 106         struct MPT3SAS_ADAPTER *ioc;
 107
 108         if (ret)
 109                 return ret;
 110
 111         /* global ioc spinlock to protect controller list on list operations */
 112         pr_info("setting fwfault_debug(%d)\n", mpt3sas_fwfault_debug);
 113         spin_lock(&gioc_lock);
 114         list_for_each_entry(ioc, &mpt3sas_ioc_list, list)
 115                 ioc->fwfault_debug = mpt3sas_fwfault_debug;
 116         spin_unlock(&gioc_lock);
 117         return 0;
 118 }
 119 module_param_call(mpt3sas_fwfault_debug, _scsih_set_fwfault_debug,
 120         param_get_int, &mpt3sas_fwfault_debug, 0644);
 121
 122 /**
 123  *  mpt3sas_remove_dead_ioc_func - kthread context to remove dead ioc
 124  * @arg: input argument, used to derive ioc
 125  *
 126  * Return 0 if controller is removed from pci subsystem.
 127  * Return -1 for other case.
 128  */
 129 static int mpt3sas_remove_dead_ioc_func(void *arg)
 130 {
 131         struct MPT3SAS_ADAPTER *ioc = (struct MPT3SAS_ADAPTER *)arg;
 132         struct pci_dev *pdev;
 133
 134         if ((ioc == NULL))
 135                 return -1;
 136
 137         pdev = ioc->pdev;
 138         if ((pdev == NULL))
 139                 return -1;
 140         pci_stop_and_remove_bus_device_locked(pdev);
 141         return 0;
 142 }
 143
 144 /**
 145  * _base_fault_reset_work - workq handling ioc fault conditions
 146  * @work: input argument, used to derive ioc
 147  * Context: sleep.
 148  *
 149  * Return nothing.
 150  */
 151 static void
 152 _base_fault_reset_work(struct work_struct *work)
 153 {
 154         struct MPT3SAS_ADAPTER *ioc =
 155             container_of(work, struct MPT3SAS_ADAPTER, fault_reset_work.work);
 156         unsigned long    flags;
 157         u32 doorbell;
 158         int rc;
 159         struct task_struct *p;
 160
 161
 162         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 163         if (ioc->shost_recovery || ioc->pci_error_recovery)
 164                 goto rearm_timer;
 165         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 166
 167         doorbell = mpt3sas_base_get_iocstate(ioc, 0);
 168         if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
 169                 pr_err(MPT3SAS_FMT "SAS host is non-operational !!!!\n",
 170                     ioc->name);
 171
 172                 /* It may be possible that EEH recovery can resolve some of
 173                  * pci bus failure issues rather removing the dead ioc function
 174                  * by considering controller is in a non-operational state. So
 175                  * here priority is given to the EEH recovery. If it doesn't
 176                  * not resolve this issue, mpt3sas driver will consider this
 177                  * controller to non-operational state and remove the dead ioc
 178                  * function.
 179                  */
 180                 if (ioc->non_operational_loop++ < 5) {
 181                         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock,
 182                                                          flags);
 183                         goto rearm_timer;
 184                 }
 185
 186                 /*
 187                  * Call _scsih_flush_pending_cmds callback so that we flush all
 188                  * pending commands back to OS. This call is required to aovid
 189                  * deadlock at block layer. Dead IOC will fail to do diag reset,
 190                  * and this call is safe since dead ioc will never return any
 191                  * command back from HW.
 192                  */
 193                 ioc->schedule_dead_ioc_flush_running_cmds(ioc);
 194                 /*
 195                  * Set remove_host flag early since kernel thread will
 196                  * take some time to execute.
 197                  */
 198                 ioc->remove_host = 1;
 199                 /*Remove the Dead Host */
 200                 p = kthread_run(mpt3sas_remove_dead_ioc_func, ioc,
 201                     "%s_dead_ioc_%d", ioc->driver_name, ioc->id);
 202                 if (IS_ERR(p))
 203                         pr_err(MPT3SAS_FMT
 204                         "%s: Running mpt3sas_dead_ioc thread failed !!!!\n",
 205                         ioc->name, __func__);
 206                 else
 207                         pr_err(MPT3SAS_FMT
 208                         "%s: Running mpt3sas_dead_ioc thread success !!!!\n",
 209                         ioc->name, __func__);
 210                 return; /* don't rearm timer */
 211         }
 212
 213         ioc->non_operational_loop = 0;
 214
 215         if ((doorbell & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) {
 216                 rc = mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
 217                     FORCE_BIG_HAMMER);
 218                 pr_warn(MPT3SAS_FMT "%s: hard reset: %s\n", ioc->name,
 219                     __func__, (rc == 0) ? "success" : "failed");
 220                 doorbell = mpt3sas_base_get_iocstate(ioc, 0);
 221                 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
 222                         mpt3sas_base_fault_info(ioc, doorbell &
 223                             MPI2_DOORBELL_DATA_MASK);
 224                 if (rc && (doorbell & MPI2_IOC_STATE_MASK) !=
 225                     MPI2_IOC_STATE_OPERATIONAL)
 226                         return; /* don't rearm timer */
 227         }
 228
 229         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 230  rearm_timer:
 231         if (ioc->fault_reset_work_q)
 232                 queue_delayed_work(ioc->fault_reset_work_q,
 233                     &ioc->fault_reset_work,
 234                     msecs_to_jiffies(FAULT_POLLING_INTERVAL));
 235         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 236 }
 237
 238 /**
 239  * mpt3sas_base_start_watchdog - start the fault_reset_work_q
 240  * @ioc: per adapter object
 241  * Context: sleep.
 242  *
 243  * Return nothing.
 244  */
 245 void
 246 mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc)
 247 {
 248         unsigned long    flags;
 249
 250         if (ioc->fault_reset_work_q)
 251                 return;
 252
 253         /* initialize fault polling */
 254
 255         INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
 256         snprintf(ioc->fault_reset_work_q_name,
 257             sizeof(ioc->fault_reset_work_q_name), "poll_%s%d_status",
 258             ioc->driver_name, ioc->id);
 259         ioc->fault_reset_work_q =
 260                 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
 261         if (!ioc->fault_reset_work_q) {
 262                 pr_err(MPT3SAS_FMT "%s: failed (line=%d)\n",
 263                     ioc->name, __func__, __LINE__);
 264                         return;
 265         }
 266         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 267         if (ioc->fault_reset_work_q)
 268                 queue_delayed_work(ioc->fault_reset_work_q,
 269                     &ioc->fault_reset_work,
 270                     msecs_to_jiffies(FAULT_POLLING_INTERVAL));
 271         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 272 }
 273
 274 /**
 275  * mpt3sas_base_stop_watchdog - stop the fault_reset_work_q
 276  * @ioc: per adapter object
 277  * Context: sleep.
 278  *
 279  * Return nothing.
 280  */
 281 void
 282 mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc)
 283 {
 284         unsigned long flags;
 285         struct workqueue_struct *wq;
 286
 287         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 288         wq = ioc->fault_reset_work_q;
 289         ioc->fault_reset_work_q = NULL;
 290         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 291         if (wq) {
 292                 if (!cancel_delayed_work_sync(&ioc->fault_reset_work))
 293                         flush_workqueue(wq);
 294                 destroy_workqueue(wq);
 295         }
 296 }
 297
 298 /**
 299  * mpt3sas_base_fault_info - verbose translation of firmware FAULT code
 300  * @ioc: per adapter object
 301  * @fault_code: fault code
 302  *
 303  * Return nothing.
 304  */
 305 void
 306 mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code)
 307 {
 308         pr_err(MPT3SAS_FMT "fault_state(0x%04x)!\n",
 309             ioc->name, fault_code);
 310 }
 311
 312 /**
 313  * mpt3sas_halt_firmware - halt's mpt controller firmware
 314  * @ioc: per adapter object
 315  *
 316  * For debugging timeout related issues.  Writing 0xCOFFEE00
 317  * to the doorbell register will halt controller firmware. With
 318  * the purpose to stop both driver and firmware, the enduser can
 319  * obtain a ring buffer from controller UART.
 320  */
 321 void
 322 mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc)
 323 {
 324         u32 doorbell;
 325
 326         if (!ioc->fwfault_debug)
 327                 return;
 328
 329         dump_stack();
 330
 331         doorbell = readl(&ioc->chip->Doorbell);
 332         if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
 333                 mpt3sas_base_fault_info(ioc , doorbell);
 334         else {
 335                 writel(0xC0FFEE00, &ioc->chip->Doorbell);
 336                 pr_err(MPT3SAS_FMT "Firmware is halted due to command timeout\n",
 337                         ioc->name);
 338         }
 339
 340         if (ioc->fwfault_debug == 2)
 341                 for (;;)
 342                         ;
 343         else
 344                 panic("panic in %s\n", __func__);
 345 }
 346
 347 /**
 348  * _base_sas_ioc_info - verbose translation of the ioc status
 349  * @ioc: per adapter object
 350  * @mpi_reply: reply mf payload returned from firmware
 351  * @request_hdr: request mf
 352  *
 353  * Return nothing.
 354  */
 355 static void
 356 _base_sas_ioc_info(struct MPT3SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
 357         MPI2RequestHeader_t *request_hdr)
 358 {
 359         u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
 360             MPI2_IOCSTATUS_MASK;
 361         char *desc = NULL;
 362         u16 frame_sz;
 363         char *func_str = NULL;
 364
 365         /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
 366         if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
 367             request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
 368             request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
 369                 return;
 370
 371         if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
 372                 return;
 373
 374         switch (ioc_status) {
 375
 376 /****************************************************************************
 377 *  Common IOCStatus values for all replies
 378 ****************************************************************************/
 379
 380         case MPI2_IOCSTATUS_INVALID_FUNCTION:
 381                 desc = "invalid function";
 382                 break;
 383         case MPI2_IOCSTATUS_BUSY:
 384                 desc = "busy";
 385                 break;
 386         case MPI2_IOCSTATUS_INVALID_SGL:
 387                 desc = "invalid sgl";
 388                 break;
 389         case MPI2_IOCSTATUS_INTERNAL_ERROR:
 390                 desc = "internal error";
 391                 break;
 392         case MPI2_IOCSTATUS_INVALID_VPID:
 393                 desc = "invalid vpid";
 394                 break;
 395         case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
 396                 desc = "insufficient resources";
 397                 break;
 398         case MPI2_IOCSTATUS_INVALID_FIELD:
 399                 desc = "invalid field";
 400                 break;
 401         case MPI2_IOCSTATUS_INVALID_STATE:
 402                 desc = "invalid state";
 403                 break;
 404         case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
 405                 desc = "op state not supported";
 406                 break;
 407
 408 /****************************************************************************
 409 *  Config IOCStatus values
 410 ****************************************************************************/
 411
 412         case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
 413                 desc = "config invalid action";
 414                 break;
 415         case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
 416                 desc = "config invalid type";
 417                 break;
 418         case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
 419                 desc = "config invalid page";
 420                 break;
 421         case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
 422                 desc = "config invalid data";
 423                 break;
 424         case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
 425                 desc = "config no defaults";
 426                 break;
 427         case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
 428                 desc = "config cant commit";
 429                 break;
 430
 431 /****************************************************************************
 432 *  SCSI IO Reply
 433 ****************************************************************************/
 434
 435         case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
 436         case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
 437         case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
 438         case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
 439         case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
 440         case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
 441         case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
 442         case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
 443         case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
 444         case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
 445         case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
 446         case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
 447                 break;
 448
 449 /****************************************************************************
 450 *  For use by SCSI Initiator and SCSI Target end-to-end data protection
 451 ****************************************************************************/
 452
 453         case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
 454                 desc = "eedp guard error";
 455                 break;
 456         case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
 457                 desc = "eedp ref tag error";
 458                 break;
 459         case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
 460                 desc = "eedp app tag error";
 461                 break;
 462
 463 /****************************************************************************
 464 *  SCSI Target values
 465 ****************************************************************************/
 466
 467         case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
 468                 desc = "target invalid io index";
 469                 break;
 470         case MPI2_IOCSTATUS_TARGET_ABORTED:
 471                 desc = "target aborted";
 472                 break;
 473         case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
 474                 desc = "target no conn retryable";
 475                 break;
 476         case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
 477                 desc = "target no connection";
 478                 break;
 479         case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
 480                 desc = "target xfer count mismatch";
 481                 break;
 482         case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
 483                 desc = "target data offset error";
 484                 break;
 485         case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
 486                 desc = "target too much write data";
 487                 break;
 488         case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
 489                 desc = "target iu too short";
 490                 break;
 491         case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
 492                 desc = "target ack nak timeout";
 493                 break;
 494         case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
 495                 desc = "target nak received";
 496                 break;
 497
 498 /****************************************************************************
 499 *  Serial Attached SCSI values
 500 ****************************************************************************/
 501
 502         case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
 503                 desc = "smp request failed";
 504                 break;
 505         case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
 506                 desc = "smp data overrun";
 507                 break;
 508
 509 /****************************************************************************
 510 *  Diagnostic Buffer Post / Diagnostic Release values
 511 ****************************************************************************/
 512
 513         case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
 514                 desc = "diagnostic released";
 515                 break;
 516         default:
 517                 break;
 518         }
 519
 520         if (!desc)
 521                 return;
 522
 523         switch (request_hdr->Function) {
 524         case MPI2_FUNCTION_CONFIG:
 525                 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
 526                 func_str = "config_page";
 527                 break;
 528         case MPI2_FUNCTION_SCSI_TASK_MGMT:
 529                 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
 530                 func_str = "task_mgmt";
 531                 break;
 532         case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
 533                 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
 534                 func_str = "sas_iounit_ctl";
 535                 break;
 536         case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
 537                 frame_sz = sizeof(Mpi2SepRequest_t);
 538                 func_str = "enclosure";
 539                 break;
 540         case MPI2_FUNCTION_IOC_INIT:
 541                 frame_sz = sizeof(Mpi2IOCInitRequest_t);
 542                 func_str = "ioc_init";
 543                 break;
 544         case MPI2_FUNCTION_PORT_ENABLE:
 545                 frame_sz = sizeof(Mpi2PortEnableRequest_t);
 546                 func_str = "port_enable";
 547                 break;
 548         case MPI2_FUNCTION_SMP_PASSTHROUGH:
 549                 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
 550                 func_str = "smp_passthru";
 551                 break;
 552         default:
 553                 frame_sz = 32;
 554                 func_str = "unknown";
 555                 break;
 556         }
 557
 558         pr_warn(MPT3SAS_FMT "ioc_status: %s(0x%04x), request(0x%p),(%s)\n",
 559                 ioc->name, desc, ioc_status, request_hdr, func_str);
 560
 561         _debug_dump_mf(request_hdr, frame_sz/4);
 562 }
 563
 564 /**
 565  * _base_display_event_data - verbose translation of firmware asyn events
 566  * @ioc: per adapter object
 567  * @mpi_reply: reply mf payload returned from firmware
 568  *
 569  * Return nothing.
 570  */
 571 static void
 572 _base_display_event_data(struct MPT3SAS_ADAPTER *ioc,
 573         Mpi2EventNotificationReply_t *mpi_reply)
 574 {
 575         char *desc = NULL;
 576         u16 event;
 577
 578         if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
 579                 return;
 580
 581         event = le16_to_cpu(mpi_reply->Event);
 582
 583         switch (event) {
 584         case MPI2_EVENT_LOG_DATA:
 585                 desc = "Log Data";
 586                 break;
 587         case MPI2_EVENT_STATE_CHANGE:
 588                 desc = "Status Change";
 589                 break;
 590         case MPI2_EVENT_HARD_RESET_RECEIVED:
 591                 desc = "Hard Reset Received";
 592                 break;
 593         case MPI2_EVENT_EVENT_CHANGE:
 594                 desc = "Event Change";
 595                 break;
 596         case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
 597                 desc = "Device Status Change";
 598                 break;
 599         case MPI2_EVENT_IR_OPERATION_STATUS:
 600                 if (!ioc->hide_ir_msg)
 601                         desc = "IR Operation Status";
 602                 break;
 603         case MPI2_EVENT_SAS_DISCOVERY:
 604         {
 605                 Mpi2EventDataSasDiscovery_t *event_data =
 606                     (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
 607                 pr_info(MPT3SAS_FMT "Discovery: (%s)", ioc->name,
 608                     (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
 609                     "start" : "stop");
 610                 if (event_data->DiscoveryStatus)
 611                         pr_info("discovery_status(0x%08x)",
 612                             le32_to_cpu(event_data->DiscoveryStatus));
 613                         pr_info("\n");
 614                 return;
 615         }
 616         case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
 617                 desc = "SAS Broadcast Primitive";
 618                 break;
 619         case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
 620                 desc = "SAS Init Device Status Change";
 621                 break;
 622         case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
 623                 desc = "SAS Init Table Overflow";
 624                 break;
 625         case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
 626                 desc = "SAS Topology Change List";
 627                 break;
 628         case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
 629                 desc = "SAS Enclosure Device Status Change";
 630                 break;
 631         case MPI2_EVENT_IR_VOLUME:
 632                 if (!ioc->hide_ir_msg)
 633                         desc = "IR Volume";
 634                 break;
 635         case MPI2_EVENT_IR_PHYSICAL_DISK:
 636                 if (!ioc->hide_ir_msg)
 637                         desc = "IR Physical Disk";
 638                 break;
 639         case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
 640                 if (!ioc->hide_ir_msg)
 641                         desc = "IR Configuration Change List";
 642                 break;
 643         case MPI2_EVENT_LOG_ENTRY_ADDED:
 644                 if (!ioc->hide_ir_msg)
 645                         desc = "Log Entry Added";
 646                 break;
 647         case MPI2_EVENT_TEMP_THRESHOLD:
 648                 desc = "Temperature Threshold";
 649                 break;
 650         }
 651
 652         if (!desc)
 653                 return;
 654
 655         pr_info(MPT3SAS_FMT "%s\n", ioc->name, desc);
 656 }
 657
 658 /**
 659  * _base_sas_log_info - verbose translation of firmware log info
 660  * @ioc: per adapter object
 661  * @log_info: log info
 662  *
 663  * Return nothing.
 664  */
 665 static void
 666 _base_sas_log_info(struct MPT3SAS_ADAPTER *ioc , u32 log_info)
 667 {
 668         union loginfo_type {
 669                 u32     loginfo;
 670                 struct {
 671                         u32     subcode:16;
 672                         u32     code:8;
 673                         u32     originator:4;
 674                         u32     bus_type:4;
 675                 } dw;
 676         };
 677         union loginfo_type sas_loginfo;
 678         char *originator_str = NULL;
 679
 680         sas_loginfo.loginfo = log_info;
 681         if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
 682                 return;
 683
 684         /* each nexus loss loginfo */
 685         if (log_info == 0x31170000)
 686                 return;
 687
 688         /* eat the loginfos associated with task aborts */
 689         if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
 690             0x31140000 || log_info == 0x31130000))
 691                 return;
 692
 693         switch (sas_loginfo.dw.originator) {
 694         case 0:
 695                 originator_str = "IOP";
 696                 break;
 697         case 1:
 698                 originator_str = "PL";
 699                 break;
 700         case 2:
 701                 if (!ioc->hide_ir_msg)
 702                         originator_str = "IR";
 703                 else
 704                         originator_str = "WarpDrive";
 705                 break;
 706         }
 707
 708         pr_warn(MPT3SAS_FMT
 709                 "log_info(0x%08x): originator(%s), code(0x%02x), sub_code(0x%04x)\n",
 710                 ioc->name, log_info,
 711              originator_str, sas_loginfo.dw.code,
 712              sas_loginfo.dw.subcode);
 713 }
 714
 715 /**
 716  * _base_display_reply_info -
 717  * @ioc: per adapter object
 718  * @smid: system request message index
 719  * @msix_index: MSIX table index supplied by the OS
 720  * @reply: reply message frame(lower 32bit addr)
 721  *
 722  * Return nothing.
 723  */
 724 static void
 725 _base_display_reply_info(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
 726         u32 reply)
 727 {
 728         MPI2DefaultReply_t *mpi_reply;
 729         u16 ioc_status;
 730         u32 loginfo = 0;
 731
 732         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 733         if (unlikely(!mpi_reply)) {
 734                 pr_err(MPT3SAS_FMT "mpi_reply not valid at %s:%d/%s()!\n",
 735                     ioc->name, __FILE__, __LINE__, __func__);
 736                 return;
 737         }
 738         ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
 739
 740         if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
 741             (ioc->logging_level & MPT_DEBUG_REPLY)) {
 742                 _base_sas_ioc_info(ioc , mpi_reply,
 743                    mpt3sas_base_get_msg_frame(ioc, smid));
 744         }
 745
 746         if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
 747                 loginfo = le32_to_cpu(mpi_reply->IOCLogInfo);
 748                 _base_sas_log_info(ioc, loginfo);
 749         }
 750
 751         if (ioc_status || loginfo) {
 752                 ioc_status &= MPI2_IOCSTATUS_MASK;
 753                 mpt3sas_trigger_mpi(ioc, ioc_status, loginfo);
 754         }
 755 }
 756
 757 /**
 758  * mpt3sas_base_done - base internal command completion routine
 759  * @ioc: per adapter object
 760  * @smid: system request message index
 761  * @msix_index: MSIX table index supplied by the OS
 762  * @reply: reply message frame(lower 32bit addr)
 763  *
 764  * Return 1 meaning mf should be freed from _base_interrupt
 765  *        0 means the mf is freed from this function.
 766  */
 767 u8
 768 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
 769         u32 reply)
 770 {
 771         MPI2DefaultReply_t *mpi_reply;
 772
 773         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 774         if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
 775                 return 1;
 776
 777         if (ioc->base_cmds.status == MPT3_CMD_NOT_USED)
 778                 return 1;
 779
 780         ioc->base_cmds.status |= MPT3_CMD_COMPLETE;
 781         if (mpi_reply) {
 782                 ioc->base_cmds.status |= MPT3_CMD_REPLY_VALID;
 783                 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
 784         }
 785         ioc->base_cmds.status &= ~MPT3_CMD_PENDING;
 786
 787         complete(&ioc->base_cmds.done);
 788         return 1;
 789 }
 790
 791 /**
 792  * _base_async_event - main callback handler for firmware asyn events
 793  * @ioc: per adapter object
 794  * @msix_index: MSIX table index supplied by the OS
 795  * @reply: reply message frame(lower 32bit addr)
 796  *
 797  * Return 1 meaning mf should be freed from _base_interrupt
 798  *        0 means the mf is freed from this function.
 799  */
 800 static u8
 801 _base_async_event(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
 802 {
 803         Mpi2EventNotificationReply_t *mpi_reply;
 804         Mpi2EventAckRequest_t *ack_request;
 805         u16 smid;
 806
 807         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 808         if (!mpi_reply)
 809                 return 1;
 810         if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
 811                 return 1;
 812
 813         _base_display_event_data(ioc, mpi_reply);
 814
 815         if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
 816                 goto out;
 817         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
 818         if (!smid) {
 819                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
 820                     ioc->name, __func__);
 821                 goto out;
 822         }
 823
 824         ack_request = mpt3sas_base_get_msg_frame(ioc, smid);
 825         memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
 826         ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
 827         ack_request->Event = mpi_reply->Event;
 828         ack_request->EventContext = mpi_reply->EventContext;
 829         ack_request->VF_ID = 0;  /* TODO */
 830         ack_request->VP_ID = 0;
 831         mpt3sas_base_put_smid_default(ioc, smid);
 832
 833  out:
 834
 835         /* scsih callback handler */
 836         mpt3sas_scsih_event_callback(ioc, msix_index, reply);
 837
 838         /* ctl callback handler */
 839         mpt3sas_ctl_event_callback(ioc, msix_index, reply);
 840
 841         return 1;
 842 }
 843
 844 /**
 845  * _base_get_cb_idx - obtain the callback index
 846  * @ioc: per adapter object
 847  * @smid: system request message index
 848  *
 849  * Return callback index.
 850  */
 851 static u8
 852 _base_get_cb_idx(struct MPT3SAS_ADAPTER *ioc, u16 smid)
 853 {
 854         int i;
 855         u8 cb_idx;
 856
 857         if (smid < ioc->hi_priority_smid) {
 858                 i = smid - 1;
 859                 cb_idx = ioc->scsi_lookup[i].cb_idx;
 860         } else if (smid < ioc->internal_smid) {
 861                 i = smid - ioc->hi_priority_smid;
 862                 cb_idx = ioc->hpr_lookup[i].cb_idx;
 863         } else if (smid <= ioc->hba_queue_depth) {
 864                 i = smid - ioc->internal_smid;
 865                 cb_idx = ioc->internal_lookup[i].cb_idx;
 866         } else
 867                 cb_idx = 0xFF;
 868         return cb_idx;
 869 }
 870
 871 /**
 872  * _base_mask_interrupts - disable interrupts
 873  * @ioc: per adapter object
 874  *
 875  * Disabling ResetIRQ, Reply and Doorbell Interrupts
 876  *
 877  * Return nothing.
 878  */
 879 static void
 880 _base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc)
 881 {
 882         u32 him_register;
 883
 884         ioc->mask_interrupts = 1;
 885         him_register = readl(&ioc->chip->HostInterruptMask);
 886         him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
 887         writel(him_register, &ioc->chip->HostInterruptMask);
 888         readl(&ioc->chip->HostInterruptMask);
 889 }
 890
 891 /**
 892  * _base_unmask_interrupts - enable interrupts
 893  * @ioc: per adapter object
 894  *
 895  * Enabling only Reply Interrupts
 896  *
 897  * Return nothing.
 898  */
 899 static void
 900 _base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc)
 901 {
 902         u32 him_register;
 903
 904         him_register = readl(&ioc->chip->HostInterruptMask);
 905         him_register &= ~MPI2_HIM_RIM;
 906         writel(him_register, &ioc->chip->HostInterruptMask);
 907         ioc->mask_interrupts = 0;
 908 }
 909
 910 union reply_descriptor {
 911         u64 word;
 912         struct {
 913                 u32 low;
 914                 u32 high;
 915         } u;
 916 };
 917
 918 /**
 919  * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
 920  * @irq: irq number (not used)
 921  * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
 922  * @r: pt_regs pointer (not used)
 923  *
 924  * Return IRQ_HANDLE if processed, else IRQ_NONE.
 925  */
 926 static irqreturn_t
 927 _base_interrupt(int irq, void *bus_id)
 928 {
 929         struct adapter_reply_queue *reply_q = bus_id;
 930         union reply_descriptor rd;
 931         u32 completed_cmds;
 932         u8 request_desript_type;
 933         u16 smid;
 934         u8 cb_idx;
 935         u32 reply;
 936         u8 msix_index = reply_q->msix_index;
 937         struct MPT3SAS_ADAPTER *ioc = reply_q->ioc;
 938         Mpi2ReplyDescriptorsUnion_t *rpf;
 939         u8 rc;
 940
 941         if (ioc->mask_interrupts)
 942                 return IRQ_NONE;
 943
 944         if (!atomic_add_unless(&reply_q->busy, 1, 1))
 945                 return IRQ_NONE;
 946
 947         rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
 948         request_desript_type = rpf->Default.ReplyFlags
 949              & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
 950         if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
 951                 atomic_dec(&reply_q->busy);
 952                 return IRQ_NONE;
 953         }
 954
 955         completed_cmds = 0;
 956         cb_idx = 0xFF;
 957         do {
 958                 rd.word = le64_to_cpu(rpf->Words);
 959                 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
 960                         goto out;
 961                 reply = 0;
 962                 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
 963                 if (request_desript_type ==
 964                     MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS ||
 965                     request_desript_type ==
 966                     MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS) {
 967                         cb_idx = _base_get_cb_idx(ioc, smid);
 968                         if ((likely(cb_idx < MPT_MAX_CALLBACKS)) &&
 969                             (likely(mpt_callbacks[cb_idx] != NULL))) {
 970                                 rc = mpt_callbacks[cb_idx](ioc, smid,
 971                                     msix_index, 0);
 972                                 if (rc)
 973                                         mpt3sas_base_free_smid(ioc, smid);
 974                         }
 975                 } else if (request_desript_type ==
 976                     MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
 977                         reply = le32_to_cpu(
 978                             rpf->AddressReply.ReplyFrameAddress);
 979                         if (reply > ioc->reply_dma_max_address ||
 980                             reply < ioc->reply_dma_min_address)
 981                                 reply = 0;
 982                         if (smid) {
 983                                 cb_idx = _base_get_cb_idx(ioc, smid);
 984                                 if ((likely(cb_idx < MPT_MAX_CALLBACKS)) &&
 985                                     (likely(mpt_callbacks[cb_idx] != NULL))) {
 986                                         rc = mpt_callbacks[cb_idx](ioc, smid,
 987                                             msix_index, reply);
 988                                         if (reply)
 989                                                 _base_display_reply_info(ioc,
 990                                                     smid, msix_index, reply);
 991                                         if (rc)
 992                                                 mpt3sas_base_free_smid(ioc,
 993                                                     smid);
 994                                 }
 995                         } else {
 996                                 _base_async_event(ioc, msix_index, reply);
 997                         }
 998
 999                         /* reply free queue handling */
1000                         if (reply) {
1001                                 ioc->reply_free_host_index =
1002                                     (ioc->reply_free_host_index ==
1003                                     (ioc->reply_free_queue_depth - 1)) ?
1004                                     0 : ioc->reply_free_host_index + 1;
1005                                 ioc->reply_free[ioc->reply_free_host_index] =
1006                                     cpu_to_le32(reply);
1007                                 wmb();
1008                                 writel(ioc->reply_free_host_index,
1009                                     &ioc->chip->ReplyFreeHostIndex);
1010                         }
1011                 }
1012
1013                 rpf->Words = cpu_to_le64(ULLONG_MAX);
1014                 reply_q->reply_post_host_index =
1015                     (reply_q->reply_post_host_index ==
1016                     (ioc->reply_post_queue_depth - 1)) ? 0 :
1017                     reply_q->reply_post_host_index + 1;
1018                 request_desript_type =
1019                     reply_q->reply_post_free[reply_q->reply_post_host_index].
1020                     Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1021                 completed_cmds++;
1022                 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
1023                         goto out;
1024                 if (!reply_q->reply_post_host_index)
1025                         rpf = reply_q->reply_post_free;
1026                 else
1027                         rpf++;
1028         } while (1);
1029
1030  out:
1031
1032         if (!completed_cmds) {
1033                 atomic_dec(&reply_q->busy);
1034                 return IRQ_NONE;
1035         }
1036
1037         wmb();
1038         if (ioc->is_warpdrive) {
1039                 writel(reply_q->reply_post_host_index,
1040                 ioc->reply_post_host_index[msix_index]);
1041                 atomic_dec(&reply_q->busy);
1042                 return IRQ_HANDLED;
1043         }
1044
1045         /* Update Reply Post Host Index.
1046          * For those HBA's which support combined reply queue feature
1047          * 1. Get the correct Supplemental Reply Post Host Index Register.
1048          *    i.e. (msix_index / 8)th entry from Supplemental Reply Post Host
1049          *    Index Register address bank i.e replyPostRegisterIndex[],
1050          * 2. Then update this register with new reply host index value
1051          *    in ReplyPostIndex field and the MSIxIndex field with
1052          *    msix_index value reduced to a value between 0 and 7,
1053          *    using a modulo 8 operation. Since each Supplemental Reply Post
1054          *    Host Index Register supports 8 MSI-X vectors.
1055          *
1056          * For other HBA's just update the Reply Post Host Index register with
1057          * new reply host index value in ReplyPostIndex Field and msix_index
1058          * value in MSIxIndex field.
1059          */
1060         if (ioc->msix96_vector)
1061                 writel(reply_q->reply_post_host_index | ((msix_index  & 7) <<
1062                         MPI2_RPHI_MSIX_INDEX_SHIFT),
1063                         ioc->replyPostRegisterIndex[msix_index/8]);
1064         else
1065                 writel(reply_q->reply_post_host_index | (msix_index <<
1066                         MPI2_RPHI_MSIX_INDEX_SHIFT),
1067                         &ioc->chip->ReplyPostHostIndex);
1068         atomic_dec(&reply_q->busy);
1069         return IRQ_HANDLED;
1070 }
1071
1072 /**
1073  * _base_is_controller_msix_enabled - is controller support muli-reply queues
1074  * @ioc: per adapter object
1075  *
1076  */
1077 static inline int
1078 _base_is_controller_msix_enabled(struct MPT3SAS_ADAPTER *ioc)
1079 {
1080         return (ioc->facts.IOCCapabilities &
1081             MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
1082 }
1083
1084 /**
1085  * mpt3sas_base_flush_reply_queues - flushing the MSIX reply queues
1086  * @ioc: per adapter object
1087  * Context: ISR conext
1088  *
1089  * Called when a Task Management request has completed. We want
1090  * to flush the other reply queues so all the outstanding IO has been
1091  * completed back to OS before we process the TM completetion.
1092  *
1093  * Return nothing.
1094  */
1095 void
1096 mpt3sas_base_flush_reply_queues(struct MPT3SAS_ADAPTER *ioc)
1097 {
1098         struct adapter_reply_queue *reply_q;
1099
1100         /* If MSIX capability is turned off
1101          * then multi-queues are not enabled
1102          */
1103         if (!_base_is_controller_msix_enabled(ioc))
1104                 return;
1105
1106         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1107                 if (ioc->shost_recovery)
1108                         return;
1109                 /* TMs are on msix_index == 0 */
1110                 if (reply_q->msix_index == 0)
1111                         continue;
1112                 _base_interrupt(reply_q->vector, (void *)reply_q);
1113         }
1114 }
1115
1116 /**
1117  * mpt3sas_base_release_callback_handler - clear interrupt callback handler
1118  * @cb_idx: callback index
1119  *
1120  * Return nothing.
1121  */
1122 void
1123 mpt3sas_base_release_callback_handler(u8 cb_idx)
1124 {
1125         mpt_callbacks[cb_idx] = NULL;
1126 }
1127
1128 /**
1129  * mpt3sas_base_register_callback_handler - obtain index for the interrupt callback handler
1130  * @cb_func: callback function
1131  *
1132  * Returns cb_func.
1133  */
1134 u8
1135 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func)
1136 {
1137         u8 cb_idx;
1138
1139         for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
1140                 if (mpt_callbacks[cb_idx] == NULL)
1141                         break;
1142
1143         mpt_callbacks[cb_idx] = cb_func;
1144         return cb_idx;
1145 }
1146
1147 /**
1148  * mpt3sas_base_initialize_callback_handler - initialize the interrupt callback handler
1149  *
1150  * Return nothing.
1151  */
1152 void
1153 mpt3sas_base_initialize_callback_handler(void)
1154 {
1155         u8 cb_idx;
1156
1157         for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
1158                 mpt3sas_base_release_callback_handler(cb_idx);
1159 }
1160
1161
1162 /**
1163  * _base_build_zero_len_sge - build zero length sg entry
1164  * @ioc: per adapter object
1165  * @paddr: virtual address for SGE
1166  *
1167  * Create a zero length scatter gather entry to insure the IOCs hardware has
1168  * something to use if the target device goes brain dead and tries
1169  * to send data even when none is asked for.
1170  *
1171  * Return nothing.
1172  */
1173 static void
1174 _base_build_zero_len_sge(struct MPT3SAS_ADAPTER *ioc, void *paddr)
1175 {
1176         u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
1177             MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
1178             MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
1179             MPI2_SGE_FLAGS_SHIFT);
1180         ioc->base_add_sg_single(paddr, flags_length, -1);
1181 }
1182
1183 /**
1184  * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1185  * @paddr: virtual address for SGE
1186  * @flags_length: SGE flags and data transfer length
1187  * @dma_addr: Physical address
1188  *
1189  * Return nothing.
1190  */
1191 static void
1192 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1193 {
1194         Mpi2SGESimple32_t *sgel = paddr;
1195
1196         flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1197             MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1198         sgel->FlagsLength = cpu_to_le32(flags_length);
1199         sgel->Address = cpu_to_le32(dma_addr);
1200 }
1201
1202
1203 /**
1204  * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1205  * @paddr: virtual address for SGE
1206  * @flags_length: SGE flags and data transfer length
1207  * @dma_addr: Physical address
1208  *
1209  * Return nothing.
1210  */
1211 static void
1212 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1213 {
1214         Mpi2SGESimple64_t *sgel = paddr;
1215
1216         flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1217             MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1218         sgel->FlagsLength = cpu_to_le32(flags_length);
1219         sgel->Address = cpu_to_le64(dma_addr);
1220 }
1221
1222 /**
1223  * _base_get_chain_buffer_tracker - obtain chain tracker
1224  * @ioc: per adapter object
1225  * @smid: smid associated to an IO request
1226  *
1227  * Returns chain tracker(from ioc->free_chain_list)
1228  */
1229 static struct chain_tracker *
1230 _base_get_chain_buffer_tracker(struct MPT3SAS_ADAPTER *ioc, u16 smid)
1231 {
1232         struct chain_tracker *chain_req;
1233         unsigned long flags;
1234
1235         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1236         if (list_empty(&ioc->free_chain_list)) {
1237                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1238                 dfailprintk(ioc, pr_warn(MPT3SAS_FMT
1239                         "chain buffers not available\n", ioc->name));
1240                 return NULL;
1241         }
1242         chain_req = list_entry(ioc->free_chain_list.next,
1243             struct chain_tracker, tracker_list);
1244         list_del_init(&chain_req->tracker_list);
1245         list_add_tail(&chain_req->tracker_list,
1246             &ioc->scsi_lookup[smid - 1].chain_list);
1247         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1248         return chain_req;
1249 }
1250
1251
1252 /**
1253  * _base_build_sg - build generic sg
1254  * @ioc: per adapter object
1255  * @psge: virtual address for SGE
1256  * @data_out_dma: physical address for WRITES
1257  * @data_out_sz: data xfer size for WRITES
1258  * @data_in_dma: physical address for READS
1259  * @data_in_sz: data xfer size for READS
1260  *
1261  * Return nothing.
1262  */
1263 static void
1264 _base_build_sg(struct MPT3SAS_ADAPTER *ioc, void *psge,
1265         dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
1266         size_t data_in_sz)
1267 {
1268         u32 sgl_flags;
1269
1270         if (!data_out_sz && !data_in_sz) {
1271                 _base_build_zero_len_sge(ioc, psge);
1272                 return;
1273         }
1274
1275         if (data_out_sz && data_in_sz) {
1276                 /* WRITE sgel first */
1277                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1278                     MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_HOST_TO_IOC);
1279                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1280                 ioc->base_add_sg_single(psge, sgl_flags |
1281                     data_out_sz, data_out_dma);
1282
1283                 /* incr sgel */
1284                 psge += ioc->sge_size;
1285
1286                 /* READ sgel last */
1287                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1288                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1289                     MPI2_SGE_FLAGS_END_OF_LIST);
1290                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1291                 ioc->base_add_sg_single(psge, sgl_flags |
1292                     data_in_sz, data_in_dma);
1293         } else if (data_out_sz) /* WRITE */ {
1294                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1295                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1296                     MPI2_SGE_FLAGS_END_OF_LIST | MPI2_SGE_FLAGS_HOST_TO_IOC);
1297                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1298                 ioc->base_add_sg_single(psge, sgl_flags |
1299                     data_out_sz, data_out_dma);
1300         } else if (data_in_sz) /* READ */ {
1301                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1302                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1303                     MPI2_SGE_FLAGS_END_OF_LIST);
1304                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1305                 ioc->base_add_sg_single(psge, sgl_flags |
1306                     data_in_sz, data_in_dma);
1307         }
1308 }
1309
1310 /* IEEE format sgls */
1311
1312 /**
1313  * _base_add_sg_single_ieee - add sg element for IEEE format
1314  * @paddr: virtual address for SGE
1315  * @flags: SGE flags
1316  * @chain_offset: number of 128 byte elements from start of segment
1317  * @length: data transfer length
1318  * @dma_addr: Physical address
1319  *
1320  * Return nothing.
1321  */
1322 static void
1323 _base_add_sg_single_ieee(void *paddr, u8 flags, u8 chain_offset, u32 length,
1324         dma_addr_t dma_addr)
1325 {
1326         Mpi25IeeeSgeChain64_t *sgel = paddr;
1327
1328         sgel->Flags = flags;
1329         sgel->NextChainOffset = chain_offset;
1330         sgel->Length = cpu_to_le32(length);
1331         sgel->Address = cpu_to_le64(dma_addr);
1332 }
1333
1334 /**
1335  * _base_build_zero_len_sge_ieee - build zero length sg entry for IEEE format
1336  * @ioc: per adapter object
1337  * @paddr: virtual address for SGE
1338  *
1339  * Create a zero length scatter gather entry to insure the IOCs hardware has
1340  * something to use if the target device goes brain dead and tries
1341  * to send data even when none is asked for.
1342  *
1343  * Return nothing.
1344  */
1345 static void
1346 _base_build_zero_len_sge_ieee(struct MPT3SAS_ADAPTER *ioc, void *paddr)
1347 {
1348         u8 sgl_flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1349                 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR |
1350                 MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
1351         _base_add_sg_single_ieee(paddr, sgl_flags, 0, 0, -1);
1352 }
1353
1354 /**
1355  * _base_build_sg_scmd - main sg creation routine
1356  * @ioc: per adapter object
1357  * @scmd: scsi command
1358  * @smid: system request message index
1359  * Context: none.
1360  *
1361  * The main routine that builds scatter gather table from a given
1362  * scsi request sent via the .queuecommand main handler.
1363  *
1364  * Returns 0 success, anything else error
1365  */
1366 static int
1367 _base_build_sg_scmd(struct MPT3SAS_ADAPTER *ioc,
1368                 struct scsi_cmnd *scmd, u16 smid)
1369 {
1370         Mpi2SCSIIORequest_t *mpi_request;
1371         dma_addr_t chain_dma;
1372         struct scatterlist *sg_scmd;
1373         void *sg_local, *chain;
1374         u32 chain_offset;
1375         u32 chain_length;
1376         u32 chain_flags;
1377         int sges_left;
1378         u32 sges_in_segment;
1379         u32 sgl_flags;
1380         u32 sgl_flags_last_element;
1381         u32 sgl_flags_end_buffer;
1382         struct chain_tracker *chain_req;
1383
1384         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
1385
1386         /* init scatter gather flags */
1387         sgl_flags = MPI2_SGE_FLAGS_SIMPLE_ELEMENT;
1388         if (scmd->sc_data_direction == DMA_TO_DEVICE)
1389                 sgl_flags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
1390         sgl_flags_last_element = (sgl_flags | MPI2_SGE_FLAGS_LAST_ELEMENT)
1391             << MPI2_SGE_FLAGS_SHIFT;
1392         sgl_flags_end_buffer = (sgl_flags | MPI2_SGE_FLAGS_LAST_ELEMENT |
1393             MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST)
1394             << MPI2_SGE_FLAGS_SHIFT;
1395         sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1396
1397         sg_scmd = scsi_sglist(scmd);
1398         sges_left = scsi_dma_map(scmd);
1399         if (sges_left < 0) {
1400                 sdev_printk(KERN_ERR, scmd->device,
1401                  "pci_map_sg failed: request for %d bytes!\n",
1402                  scsi_bufflen(scmd));
1403                 return -ENOMEM;
1404         }
1405
1406         sg_local = &mpi_request->SGL;
1407         sges_in_segment = ioc->max_sges_in_main_message;
1408         if (sges_left <= sges_in_segment)
1409                 goto fill_in_last_segment;
1410
1411         mpi_request->ChainOffset = (offsetof(Mpi2SCSIIORequest_t, SGL) +
1412             (sges_in_segment * ioc->sge_size))/4;
1413
1414         /* fill in main message segment when there is a chain following */
1415         while (sges_in_segment) {
1416                 if (sges_in_segment == 1)
1417                         ioc->base_add_sg_single(sg_local,
1418                             sgl_flags_last_element | sg_dma_len(sg_scmd),
1419                             sg_dma_address(sg_scmd));
1420                 else
1421                         ioc->base_add_sg_single(sg_local, sgl_flags |
1422                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1423                 sg_scmd = sg_next(sg_scmd);
1424                 sg_local += ioc->sge_size;
1425                 sges_left--;
1426                 sges_in_segment--;
1427         }
1428
1429         /* initializing the chain flags and pointers */
1430         chain_flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT << MPI2_SGE_FLAGS_SHIFT;
1431         chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1432         if (!chain_req)
1433                 return -1;
1434         chain = chain_req->chain_buffer;
1435         chain_dma = chain_req->chain_buffer_dma;
1436         do {
1437                 sges_in_segment = (sges_left <=
1438                     ioc->max_sges_in_chain_message) ? sges_left :
1439                     ioc->max_sges_in_chain_message;
1440                 chain_offset = (sges_left == sges_in_segment) ?
1441                     0 : (sges_in_segment * ioc->sge_size)/4;
1442                 chain_length = sges_in_segment * ioc->sge_size;
1443                 if (chain_offset) {
1444                         chain_offset = chain_offset <<
1445                             MPI2_SGE_CHAIN_OFFSET_SHIFT;
1446                         chain_length += ioc->sge_size;
1447                 }
1448                 ioc->base_add_sg_single(sg_local, chain_flags | chain_offset |
1449                     chain_length, chain_dma);
1450                 sg_local = chain;
1451                 if (!chain_offset)
1452                         goto fill_in_last_segment;
1453
1454                 /* fill in chain segments */
1455                 while (sges_in_segment) {
1456                         if (sges_in_segment == 1)
1457                                 ioc->base_add_sg_single(sg_local,
1458                                     sgl_flags_last_element |
1459                                     sg_dma_len(sg_scmd),
1460                                     sg_dma_address(sg_scmd));
1461                         else
1462                                 ioc->base_add_sg_single(sg_local, sgl_flags |
1463                                     sg_dma_len(sg_scmd),
1464                                     sg_dma_address(sg_scmd));
1465                         sg_scmd = sg_next(sg_scmd);
1466                         sg_local += ioc->sge_size;
1467                         sges_left--;
1468                         sges_in_segment--;
1469                 }
1470
1471                 chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1472                 if (!chain_req)
1473                         return -1;
1474                 chain = chain_req->chain_buffer;
1475                 chain_dma = chain_req->chain_buffer_dma;
1476         } while (1);
1477
1478
1479  fill_in_last_segment:
1480
1481         /* fill the last segment */
1482         while (sges_left) {
1483                 if (sges_left == 1)
1484                         ioc->base_add_sg_single(sg_local, sgl_flags_end_buffer |
1485                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1486                 else
1487                         ioc->base_add_sg_single(sg_local, sgl_flags |
1488                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1489                 sg_scmd = sg_next(sg_scmd);
1490                 sg_local += ioc->sge_size;
1491                 sges_left--;
1492         }
1493
1494         return 0;
1495 }
1496
1497 /**
1498  * _base_build_sg_scmd_ieee - main sg creation routine for IEEE format
1499  * @ioc: per adapter object
1500  * @scmd: scsi command
1501  * @smid: system request message index
1502  * Context: none.
1503  *
1504  * The main routine that builds scatter gather table from a given
1505  * scsi request sent via the .queuecommand main handler.
1506  *
1507  * Returns 0 success, anything else error
1508  */
1509 static int
1510 _base_build_sg_scmd_ieee(struct MPT3SAS_ADAPTER *ioc,
1511         struct scsi_cmnd *scmd, u16 smid)
1512 {
1513         Mpi2SCSIIORequest_t *mpi_request;
1514         dma_addr_t chain_dma;
1515         struct scatterlist *sg_scmd;
1516         void *sg_local, *chain;
1517         u32 chain_offset;
1518         u32 chain_length;
1519         int sges_left;
1520         u32 sges_in_segment;
1521         u8 simple_sgl_flags;
1522         u8 simple_sgl_flags_last;
1523         u8 chain_sgl_flags;
1524         struct chain_tracker *chain_req;
1525
1526         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
1527
1528         /* init scatter gather flags */
1529         simple_sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1530             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1531         simple_sgl_flags_last = simple_sgl_flags |
1532             MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
1533         chain_sgl_flags = MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
1534             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1535
1536         sg_scmd = scsi_sglist(scmd);
1537         sges_left = scsi_dma_map(scmd);
1538         if (sges_left < 0) {
1539                 sdev_printk(KERN_ERR, scmd->device,
1540                         "pci_map_sg failed: request for %d bytes!\n",
1541                         scsi_bufflen(scmd));
1542                 return -ENOMEM;
1543         }
1544
1545         sg_local = &mpi_request->SGL;
1546         sges_in_segment = (ioc->request_sz -
1547             offsetof(Mpi2SCSIIORequest_t, SGL))/ioc->sge_size_ieee;
1548         if (sges_left <= sges_in_segment)
1549                 goto fill_in_last_segment;
1550
1551         mpi_request->ChainOffset = (sges_in_segment - 1 /* chain element */) +
1552             (offsetof(Mpi2SCSIIORequest_t, SGL)/ioc->sge_size_ieee);
1553
1554         /* fill in main message segment when there is a chain following */
1555         while (sges_in_segment > 1) {
1556                 _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1557                     sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1558                 sg_scmd = sg_next(sg_scmd);
1559                 sg_local += ioc->sge_size_ieee;
1560                 sges_left--;
1561                 sges_in_segment--;
1562         }
1563
1564         /* initializing the pointers */
1565         chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1566         if (!chain_req)
1567                 return -1;
1568         chain = chain_req->chain_buffer;
1569         chain_dma = chain_req->chain_buffer_dma;
1570         do {
1571                 sges_in_segment = (sges_left <=
1572                     ioc->max_sges_in_chain_message) ? sges_left :
1573                     ioc->max_sges_in_chain_message;
1574                 chain_offset = (sges_left == sges_in_segment) ?
1575                     0 : sges_in_segment;
1576                 chain_length = sges_in_segment * ioc->sge_size_ieee;
1577                 if (chain_offset)
1578                         chain_length += ioc->sge_size_ieee;
1579                 _base_add_sg_single_ieee(sg_local, chain_sgl_flags,
1580                     chain_offset, chain_length, chain_dma);
1581
1582                 sg_local = chain;
1583                 if (!chain_offset)
1584                         goto fill_in_last_segment;
1585
1586                 /* fill in chain segments */
1587                 while (sges_in_segment) {
1588                         _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1589                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1590                         sg_scmd = sg_next(sg_scmd);
1591                         sg_local += ioc->sge_size_ieee;
1592                         sges_left--;
1593                         sges_in_segment--;
1594                 }
1595
1596                 chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1597                 if (!chain_req)
1598                         return -1;
1599                 chain = chain_req->chain_buffer;
1600                 chain_dma = chain_req->chain_buffer_dma;
1601         } while (1);
1602
1603
1604  fill_in_last_segment:
1605
1606         /* fill the last segment */
1607         while (sges_left > 0) {
1608                 if (sges_left == 1)
1609                         _base_add_sg_single_ieee(sg_local,
1610                             simple_sgl_flags_last, 0, sg_dma_len(sg_scmd),
1611                             sg_dma_address(sg_scmd));
1612                 else
1613                         _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1614                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1615                 sg_scmd = sg_next(sg_scmd);
1616                 sg_local += ioc->sge_size_ieee;
1617                 sges_left--;
1618         }
1619
1620         return 0;
1621 }
1622
1623 /**
1624  * _base_build_sg_ieee - build generic sg for IEEE format
1625  * @ioc: per adapter object
1626  * @psge: virtual address for SGE
1627  * @data_out_dma: physical address for WRITES
1628  * @data_out_sz: data xfer size for WRITES
1629  * @data_in_dma: physical address for READS
1630  * @data_in_sz: data xfer size for READS
1631  *
1632  * Return nothing.
1633  */
1634 static void
1635 _base_build_sg_ieee(struct MPT3SAS_ADAPTER *ioc, void *psge,
1636         dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
1637         size_t data_in_sz)
1638 {
1639         u8 sgl_flags;
1640
1641         if (!data_out_sz && !data_in_sz) {
1642                 _base_build_zero_len_sge_ieee(ioc, psge);
1643                 return;
1644         }
1645
1646         if (data_out_sz && data_in_sz) {
1647                 /* WRITE sgel first */
1648                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1649                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1650                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_out_sz,
1651                     data_out_dma);
1652
1653                 /* incr sgel */
1654                 psge += ioc->sge_size_ieee;
1655
1656                 /* READ sgel last */
1657                 sgl_flags |= MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
1658                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_in_sz,
1659                     data_in_dma);
1660         } else if (data_out_sz) /* WRITE */ {
1661                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1662                     MPI25_IEEE_SGE_FLAGS_END_OF_LIST |
1663                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1664                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_out_sz,
1665                     data_out_dma);
1666         } else if (data_in_sz) /* READ */ {
1667                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1668                     MPI25_IEEE_SGE_FLAGS_END_OF_LIST |
1669                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1670                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_in_sz,
1671                     data_in_dma);
1672         }
1673 }
1674
1675 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1676
1677 /**
1678  * _base_config_dma_addressing - set dma addressing
1679  * @ioc: per adapter object
1680  * @pdev: PCI device struct
1681  *
1682  * Returns 0 for success, non-zero for failure.
1683  */
1684 static int
1685 _base_config_dma_addressing(struct MPT3SAS_ADAPTER *ioc, struct pci_dev *pdev)
1686 {
1687         struct sysinfo s;
1688         u64 consistent_dma_mask;
1689
1690         if (ioc->dma_mask)
1691                 consistent_dma_mask = DMA_BIT_MASK(64);
1692         else
1693                 consistent_dma_mask = DMA_BIT_MASK(32);
1694
1695         if (sizeof(dma_addr_t) > 4) {
1696                 const uint64_t required_mask =
1697                     dma_get_required_mask(&pdev->dev);
1698                 if ((required_mask > DMA_BIT_MASK(32)) &&
1699                     !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
1700                     !pci_set_consistent_dma_mask(pdev, consistent_dma_mask)) {
1701                         ioc->base_add_sg_single = &_base_add_sg_single_64;
1702                         ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1703                         ioc->dma_mask = 64;
1704                         goto out;
1705                 }
1706         }
1707
1708         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1709             && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1710                 ioc->base_add_sg_single = &_base_add_sg_single_32;
1711                 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1712                 ioc->dma_mask = 32;
1713         } else
1714                 return -ENODEV;
1715
1716  out:
1717         si_meminfo(&s);
1718         pr_info(MPT3SAS_FMT
1719                 "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n",
1720                 ioc->name, ioc->dma_mask, convert_to_kb(s.totalram));
1721
1722         return 0;
1723 }
1724
1725 static int
1726 _base_change_consistent_dma_mask(struct MPT3SAS_ADAPTER *ioc,
1727                                       struct pci_dev *pdev)
1728 {
1729         if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1730                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
1731                         return -ENODEV;
1732         }
1733         return 0;
1734 }
1735
1736 /**
1737  * _base_check_enable_msix - checks MSIX capabable.
1738  * @ioc: per adapter object
1739  *
1740  * Check to see if card is capable of MSIX, and set number
1741  * of available msix vectors
1742  */
1743 static int
1744 _base_check_enable_msix(struct MPT3SAS_ADAPTER *ioc)
1745 {
1746         int base;
1747         u16 message_control;
1748
1749         /* Check whether controller SAS2008 B0 controller,
1750          * if it is SAS2008 B0 controller use IO-APIC instead of MSIX
1751          */
1752         if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
1753             ioc->pdev->revision == SAS2_PCI_DEVICE_B0_REVISION) {
1754                 return -EINVAL;
1755         }
1756
1757         base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1758         if (!base) {
1759                 dfailprintk(ioc, pr_info(MPT3SAS_FMT "msix not supported\n",
1760                         ioc->name));
1761                 return -EINVAL;
1762         }
1763
1764         /* get msix vector count */
1765         /* NUMA_IO not supported for older controllers */
1766         if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
1767             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
1768             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
1769             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
1770             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
1771             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
1772             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
1773                 ioc->msix_vector_count = 1;
1774         else {
1775                 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1776                 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1777         }
1778         dinitprintk(ioc, pr_info(MPT3SAS_FMT
1779                 "msix is supported, vector_count(%d)\n",
1780                 ioc->name, ioc->msix_vector_count));
1781         return 0;
1782 }
1783
1784 /**
1785  * _base_free_irq - free irq
1786  * @ioc: per adapter object
1787  *
1788  * Freeing respective reply_queue from the list.
1789  */
1790 static void
1791 _base_free_irq(struct MPT3SAS_ADAPTER *ioc)
1792 {
1793         struct adapter_reply_queue *reply_q, *next;
1794
1795         if (list_empty(&ioc->reply_queue_list))
1796                 return;
1797
1798         list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
1799                 list_del(&reply_q->list);
1800                 irq_set_affinity_hint(reply_q->vector, NULL);
1801                 free_cpumask_var(reply_q->affinity_hint);
1802                 synchronize_irq(reply_q->vector);
1803                 free_irq(reply_q->vector, reply_q);
1804                 kfree(reply_q);
1805         }
1806 }
1807
1808 /**
1809  * _base_request_irq - request irq
1810  * @ioc: per adapter object
1811  * @index: msix index into vector table
1812  * @vector: irq vector
1813  *
1814  * Inserting respective reply_queue into the list.
1815  */
1816 static int
1817 _base_request_irq(struct MPT3SAS_ADAPTER *ioc, u8 index, u32 vector)
1818 {
1819         struct adapter_reply_queue *reply_q;
1820         int r;
1821
1822         reply_q =  kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
1823         if (!reply_q) {
1824                 pr_err(MPT3SAS_FMT "unable to allocate memory %d!\n",
1825                     ioc->name, (int)sizeof(struct adapter_reply_queue));
1826                 return -ENOMEM;
1827         }
1828         reply_q->ioc = ioc;
1829         reply_q->msix_index = index;
1830         reply_q->vector = vector;
1831
1832         if (!alloc_cpumask_var(&reply_q->affinity_hint, GFP_KERNEL))
1833                 return -ENOMEM;
1834         cpumask_clear(reply_q->affinity_hint);
1835
1836         atomic_set(&reply_q->busy, 0);
1837         if (ioc->msix_enable)
1838                 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
1839                     ioc->driver_name, ioc->id, index);
1840         else
1841                 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
1842                     ioc->driver_name, ioc->id);
1843         r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
1844             reply_q);
1845         if (r) {
1846                 pr_err(MPT3SAS_FMT "unable to allocate interrupt %d!\n",
1847                     reply_q->name, vector);
1848                 kfree(reply_q);
1849                 return -EBUSY;
1850         }
1851
1852         INIT_LIST_HEAD(&reply_q->list);
1853         list_add_tail(&reply_q->list, &ioc->reply_queue_list);
1854         return 0;
1855 }
1856
1857 /**
1858  * _base_assign_reply_queues - assigning msix index for each cpu
1859  * @ioc: per adapter object
1860  *
1861  * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1862  *
1863  * It would nice if we could call irq_set_affinity, however it is not
1864  * an exported symbol
1865  */
1866 static void
1867 _base_assign_reply_queues(struct MPT3SAS_ADAPTER *ioc)
1868 {
1869         unsigned int cpu, nr_cpus, nr_msix, index = 0;
1870         struct adapter_reply_queue *reply_q;
1871
1872         if (!_base_is_controller_msix_enabled(ioc))
1873                 return;
1874
1875         memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
1876
1877         nr_cpus = num_online_cpus();
1878         nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count,
1879                                                ioc->facts.MaxMSIxVectors);
1880         if (!nr_msix)
1881                 return;
1882
1883         cpu = cpumask_first(cpu_online_mask);
1884
1885         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1886
1887                 unsigned int i, group = nr_cpus / nr_msix;
1888
1889                 if (cpu >= nr_cpus)
1890                         break;
1891
1892                 if (index < nr_cpus % nr_msix)
1893                         group++;
1894
1895                 for (i = 0 ; i < group ; i++) {
1896                         ioc->cpu_msix_table[cpu] = index;
1897                         cpumask_or(reply_q->affinity_hint,
1898                                    reply_q->affinity_hint, get_cpu_mask(cpu));
1899                         cpu = cpumask_next(cpu, cpu_online_mask);
1900                 }
1901
1902                 if (irq_set_affinity_hint(reply_q->vector,
1903                                            reply_q->affinity_hint))
1904                         dinitprintk(ioc, pr_info(MPT3SAS_FMT
1905                             "error setting affinity hint for irq vector %d\n",
1906                             ioc->name, reply_q->vector));
1907                 index++;
1908         }
1909 }
1910
1911 /**
1912  * _base_disable_msix - disables msix
1913  * @ioc: per adapter object
1914  *
1915  */
1916 static void
1917 _base_disable_msix(struct MPT3SAS_ADAPTER *ioc)
1918 {
1919         if (!ioc->msix_enable)
1920                 return;
1921         pci_disable_msix(ioc->pdev);
1922         ioc->msix_enable = 0;
1923 }
1924
1925 /**
1926  * _base_enable_msix - enables msix, failback to io_apic
1927  * @ioc: per adapter object
1928  *
1929  */
1930 static int
1931 _base_enable_msix(struct MPT3SAS_ADAPTER *ioc)
1932 {
1933         struct msix_entry *entries, *a;
1934         int r;
1935         int i;
1936         u8 try_msix = 0;
1937
1938         if (msix_disable == -1 || msix_disable == 0)
1939                 try_msix = 1;
1940
1941         if (!try_msix)
1942                 goto try_ioapic;
1943
1944         if (_base_check_enable_msix(ioc) != 0)
1945                 goto try_ioapic;
1946
1947         ioc->reply_queue_count = min_t(int, ioc->cpu_count,
1948             ioc->msix_vector_count);
1949
1950         printk(MPT3SAS_FMT "MSI-X vectors supported: %d, no of cores"
1951           ": %d, max_msix_vectors: %d\n", ioc->name, ioc->msix_vector_count,
1952           ioc->cpu_count, max_msix_vectors);
1953
1954         if (!ioc->rdpq_array_enable && max_msix_vectors == -1)
1955                 max_msix_vectors = 8;
1956
1957         if (max_msix_vectors > 0) {
1958                 ioc->reply_queue_count = min_t(int, max_msix_vectors,
1959                         ioc->reply_queue_count);
1960                 ioc->msix_vector_count = ioc->reply_queue_count;
1961         } else if (max_msix_vectors == 0)
1962                 goto try_ioapic;
1963
1964         entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
1965             GFP_KERNEL);
1966         if (!entries) {
1967                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
1968                         "kcalloc failed @ at %s:%d/%s() !!!\n",
1969                         ioc->name, __FILE__, __LINE__, __func__));
1970                 goto try_ioapic;
1971         }
1972
1973         for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
1974                 a->entry = i;
1975
1976         r = pci_enable_msix_exact(ioc->pdev, entries, ioc->reply_queue_count);
1977         if (r) {
1978                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
1979                         "pci_enable_msix_exact failed (r=%d) !!!\n",
1980                         ioc->name, r));
1981                 kfree(entries);
1982                 goto try_ioapic;
1983         }
1984
1985         ioc->msix_enable = 1;
1986         for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
1987                 r = _base_request_irq(ioc, i, a->vector);
1988                 if (r) {
1989                         _base_free_irq(ioc);
1990                         _base_disable_msix(ioc);
1991                         kfree(entries);
1992                         goto try_ioapic;
1993                 }
1994         }
1995
1996         kfree(entries);
1997         return 0;
1998
1999 /* failback to io_apic interrupt routing */
2000  try_ioapic:
2001
2002         ioc->reply_queue_count = 1;
2003         r = _base_request_irq(ioc, 0, ioc->pdev->irq);
2004
2005         return r;
2006 }
2007
2008 /**
2009  * mpt3sas_base_unmap_resources - free controller resources
2010  * @ioc: per adapter object
2011  */
2012 void
2013 mpt3sas_base_unmap_resources(struct MPT3SAS_ADAPTER *ioc)
2014 {
2015         struct pci_dev *pdev = ioc->pdev;
2016
2017         dexitprintk(ioc, printk(MPT3SAS_FMT "%s\n",
2018                 ioc->name, __func__));
2019
2020         _base_free_irq(ioc);
2021         _base_disable_msix(ioc);
2022
2023         if (ioc->msix96_vector) {
2024                 kfree(ioc->replyPostRegisterIndex);
2025                 ioc->replyPostRegisterIndex = NULL;
2026         }
2027
2028         if (ioc->chip_phys) {
2029                 iounmap(ioc->chip);
2030                 ioc->chip_phys = 0;
2031         }
2032
2033         if (pci_is_enabled(pdev)) {
2034                 pci_release_selected_regions(ioc->pdev, ioc->bars);
2035                 pci_disable_pcie_error_reporting(pdev);
2036                 pci_disable_device(pdev);
2037         }
2038 }
2039
2040 /**
2041  * mpt3sas_base_map_resources - map in controller resources (io/irq/memap)
2042  * @ioc: per adapter object
2043  *
2044  * Returns 0 for success, non-zero for failure.
2045  */
2046 int
2047 mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc)
2048 {
2049         struct pci_dev *pdev = ioc->pdev;
2050         u32 memap_sz;
2051         u32 pio_sz;
2052         int i, r = 0;
2053         u64 pio_chip = 0;
2054         u64 chip_phys = 0;
2055         struct adapter_reply_queue *reply_q;
2056
2057         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n",
2058             ioc->name, __func__));
2059
2060         ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
2061         if (pci_enable_device_mem(pdev)) {
2062                 pr_warn(MPT3SAS_FMT "pci_enable_device_mem: failed\n",
2063                         ioc->name);
2064                 ioc->bars = 0;
2065                 return -ENODEV;
2066         }
2067
2068
2069         if (pci_request_selected_regions(pdev, ioc->bars,
2070             ioc->driver_name)) {
2071                 pr_warn(MPT3SAS_FMT "pci_request_selected_regions: failed\n",
2072                         ioc->name);
2073                 ioc->bars = 0;
2074                 r = -ENODEV;
2075                 goto out_fail;
2076         }
2077
2078 /* AER (Advanced Error Reporting) hooks */
2079         pci_enable_pcie_error_reporting(pdev);
2080
2081         pci_set_master(pdev);
2082
2083
2084         if (_base_config_dma_addressing(ioc, pdev) != 0) {
2085                 pr_warn(MPT3SAS_FMT "no suitable DMA mask for %s\n",
2086                     ioc->name, pci_name(pdev));
2087                 r = -ENODEV;
2088                 goto out_fail;
2089         }
2090
2091         for (i = 0, memap_sz = 0, pio_sz = 0; (i < DEVICE_COUNT_RESOURCE) &&
2092              (!memap_sz || !pio_sz); i++) {
2093                 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
2094                         if (pio_sz)
2095                                 continue;
2096                         pio_chip = (u64)pci_resource_start(pdev, i);
2097                         pio_sz = pci_resource_len(pdev, i);
2098                 } else if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
2099                         if (memap_sz)
2100                                 continue;
2101                         ioc->chip_phys = pci_resource_start(pdev, i);
2102                         chip_phys = (u64)ioc->chip_phys;
2103                         memap_sz = pci_resource_len(pdev, i);
2104                         ioc->chip = ioremap(ioc->chip_phys, memap_sz);
2105                 }
2106         }
2107
2108         if (ioc->chip == NULL) {
2109                 pr_err(MPT3SAS_FMT "unable to map adapter memory! "
2110                         " or resource not found\n", ioc->name);
2111                 r = -EINVAL;
2112                 goto out_fail;
2113         }
2114
2115         _base_mask_interrupts(ioc);
2116
2117         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
2118         if (r)
2119                 goto out_fail;
2120
2121         if (!ioc->rdpq_array_enable_assigned) {
2122                 ioc->rdpq_array_enable = ioc->rdpq_array_capable;
2123                 ioc->rdpq_array_enable_assigned = 1;
2124         }
2125
2126         r = _base_enable_msix(ioc);
2127         if (r)
2128                 goto out_fail;
2129
2130         /* Use the Combined reply queue feature only for SAS3 C0 & higher
2131          * revision HBAs and also only when reply queue count is greater than 8
2132          */
2133         if (ioc->msix96_vector && ioc->reply_queue_count > 8) {
2134                 /* Determine the Supplemental Reply Post Host Index Registers
2135                  * Addresse. Supplemental Reply Post Host Index Registers
2136                  * starts at offset MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET and
2137                  * each register is at offset bytes of
2138                  * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET from previous one.
2139                  */
2140                 ioc->replyPostRegisterIndex = kcalloc(
2141                      MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT,
2142                      sizeof(resource_size_t *), GFP_KERNEL);
2143                 if (!ioc->replyPostRegisterIndex) {
2144                         dfailprintk(ioc, printk(MPT3SAS_FMT
2145                         "allocation for reply Post Register Index failed!!!\n",
2146                                                                    ioc->name));
2147                         r = -ENOMEM;
2148                         goto out_fail;
2149                 }
2150
2151                 for (i = 0; i < MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT; i++) {
2152                         ioc->replyPostRegisterIndex[i] = (resource_size_t *)
2153                              ((u8 *)&ioc->chip->Doorbell +
2154                              MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET +
2155                              (i * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET));
2156                 }
2157         } else
2158                 ioc->msix96_vector = 0;
2159
2160         if (ioc->is_warpdrive) {
2161                 ioc->reply_post_host_index[0] = (resource_size_t __iomem *)
2162                     &ioc->chip->ReplyPostHostIndex;
2163
2164                 for (i = 1; i < ioc->cpu_msix_table_sz; i++)
2165                         ioc->reply_post_host_index[i] =
2166                         (resource_size_t __iomem *)
2167                         ((u8 __iomem *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
2168                         * 4)));
2169         }
2170
2171         list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
2172                 pr_info(MPT3SAS_FMT "%s: IRQ %d\n",
2173                     reply_q->name,  ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
2174                     "IO-APIC enabled"), reply_q->vector);
2175
2176         pr_info(MPT3SAS_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
2177             ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
2178         pr_info(MPT3SAS_FMT "ioport(0x%016llx), size(%d)\n",
2179             ioc->name, (unsigned long long)pio_chip, pio_sz);
2180
2181         /* Save PCI configuration state for recovery from PCI AER/EEH errors */
2182         pci_save_state(pdev);
2183         return 0;
2184
2185  out_fail:
2186         mpt3sas_base_unmap_resources(ioc);
2187         return r;
2188 }
2189
2190 /**
2191  * mpt3sas_base_get_msg_frame - obtain request mf pointer
2192  * @ioc: per adapter object
2193  * @smid: system request message index(smid zero is invalid)
2194  *
2195  * Returns virt pointer to message frame.
2196  */
2197 void *
2198 mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2199 {
2200         return (void *)(ioc->request + (smid * ioc->request_sz));
2201 }
2202
2203 /**
2204  * mpt3sas_base_get_sense_buffer - obtain a sense buffer virt addr
2205  * @ioc: per adapter object
2206  * @smid: system request message index
2207  *
2208  * Returns virt pointer to sense buffer.
2209  */
2210 void *
2211 mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2212 {
2213         return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
2214 }
2215
2216 /**
2217  * mpt3sas_base_get_sense_buffer_dma - obtain a sense buffer dma addr
2218  * @ioc: per adapter object
2219  * @smid: system request message index
2220  *
2221  * Returns phys pointer to the low 32bit address of the sense buffer.
2222  */
2223 __le32
2224 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2225 {
2226         return cpu_to_le32(ioc->sense_dma + ((smid - 1) *
2227             SCSI_SENSE_BUFFERSIZE));
2228 }
2229
2230 /**
2231  * mpt3sas_base_get_reply_virt_addr - obtain reply frames virt address
2232  * @ioc: per adapter object
2233  * @phys_addr: lower 32 physical addr of the reply
2234  *
2235  * Converts 32bit lower physical addr into a virt address.
2236  */
2237 void *
2238 mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, u32 phys_addr)
2239 {
2240         if (!phys_addr)
2241                 return NULL;
2242         return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
2243 }
2244
2245 static inline u8
2246 _base_get_msix_index(struct MPT3SAS_ADAPTER *ioc)
2247 {
2248         return ioc->cpu_msix_table[raw_smp_processor_id()];
2249 }
2250
2251 /**
2252  * mpt3sas_base_get_smid - obtain a free smid from internal queue
2253  * @ioc: per adapter object
2254  * @cb_idx: callback index
2255  *
2256  * Returns smid (zero is invalid)
2257  */
2258 u16
2259 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx)
2260 {
2261         unsigned long flags;
2262         struct request_tracker *request;
2263         u16 smid;
2264
2265         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2266         if (list_empty(&ioc->internal_free_list)) {
2267                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2268                 pr_err(MPT3SAS_FMT "%s: smid not available\n",
2269                     ioc->name, __func__);
2270                 return 0;
2271         }
2272
2273         request = list_entry(ioc->internal_free_list.next,
2274             struct request_tracker, tracker_list);
2275         request->cb_idx = cb_idx;
2276         smid = request->smid;
2277         list_del(&request->tracker_list);
2278         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2279         return smid;
2280 }
2281
2282 /**
2283  * mpt3sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
2284  * @ioc: per adapter object
2285  * @cb_idx: callback index
2286  * @scmd: pointer to scsi command object
2287  *
2288  * Returns smid (zero is invalid)
2289  */
2290 u16
2291 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
2292         struct scsi_cmnd *scmd)
2293 {
2294         unsigned long flags;
2295         struct scsiio_tracker *request;
2296         u16 smid;
2297
2298         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2299         if (list_empty(&ioc->free_list)) {
2300                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2301                 pr_err(MPT3SAS_FMT "%s: smid not available\n",
2302                     ioc->name, __func__);
2303                 return 0;
2304         }
2305
2306         request = list_entry(ioc->free_list.next,
2307             struct scsiio_tracker, tracker_list);
2308         request->scmd = scmd;
2309         request->cb_idx = cb_idx;
2310         smid = request->smid;
2311         request->msix_io = _base_get_msix_index(ioc);
2312         list_del(&request->tracker_list);
2313         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2314         return smid;
2315 }
2316
2317 /**
2318  * mpt3sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
2319  * @ioc: per adapter object
2320  * @cb_idx: callback index
2321  *
2322  * Returns smid (zero is invalid)
2323  */
2324 u16
2325 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx)
2326 {
2327         unsigned long flags;
2328         struct request_tracker *request;
2329         u16 smid;
2330
2331         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2332         if (list_empty(&ioc->hpr_free_list)) {
2333                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2334                 return 0;
2335         }
2336
2337         request = list_entry(ioc->hpr_free_list.next,
2338             struct request_tracker, tracker_list);
2339         request->cb_idx = cb_idx;
2340         smid = request->smid;
2341         list_del(&request->tracker_list);
2342         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2343         return smid;
2344 }
2345
2346 /**
2347  * mpt3sas_base_free_smid - put smid back on free_list
2348  * @ioc: per adapter object
2349  * @smid: system request message index
2350  *
2351  * Return nothing.
2352  */
2353 void
2354 mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2355 {
2356         unsigned long flags;
2357         int i;
2358         struct chain_tracker *chain_req, *next;
2359
2360         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2361         if (smid < ioc->hi_priority_smid) {
2362                 /* scsiio queue */
2363                 i = smid - 1;
2364                 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
2365                         list_for_each_entry_safe(chain_req, next,
2366                             &ioc->scsi_lookup[i].chain_list, tracker_list) {
2367                                 list_del_init(&chain_req->tracker_list);
2368                                 list_add(&chain_req->tracker_list,
2369                                     &ioc->free_chain_list);
2370                         }
2371                 }
2372                 ioc->scsi_lookup[i].cb_idx = 0xFF;
2373                 ioc->scsi_lookup[i].scmd = NULL;
2374                 ioc->scsi_lookup[i].direct_io = 0;
2375                 list_add(&ioc->scsi_lookup[i].tracker_list, &ioc->free_list);
2376                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2377
2378                 /*
2379                  * See _wait_for_commands_to_complete() call with regards
2380                  * to this code.
2381                  */
2382                 if (ioc->shost_recovery && ioc->pending_io_count) {
2383                         if (ioc->pending_io_count == 1)
2384                                 wake_up(&ioc->reset_wq);
2385                         ioc->pending_io_count--;
2386                 }
2387                 return;
2388         } else if (smid < ioc->internal_smid) {
2389                 /* hi-priority */
2390                 i = smid - ioc->hi_priority_smid;
2391                 ioc->hpr_lookup[i].cb_idx = 0xFF;
2392                 list_add(&ioc->hpr_lookup[i].tracker_list, &ioc->hpr_free_list);
2393         } else if (smid <= ioc->hba_queue_depth) {
2394                 /* internal queue */
2395                 i = smid - ioc->internal_smid;
2396                 ioc->internal_lookup[i].cb_idx = 0xFF;
2397                 list_add(&ioc->internal_lookup[i].tracker_list,
2398                     &ioc->internal_free_list);
2399         }
2400         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2401 }
2402
2403 /**
2404  * _base_writeq - 64 bit write to MMIO
2405  * @ioc: per adapter object
2406  * @b: data payload
2407  * @addr: address in MMIO space
2408  * @writeq_lock: spin lock
2409  *
2410  * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
2411  * care of 32 bit environment where its not quarenteed to send the entire word
2412  * in one transfer.
2413  */
2414 #if defined(writeq) && defined(CONFIG_64BIT)
2415 static inline void
2416 _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock)
2417 {
2418         writeq(cpu_to_le64(b), addr);
2419 }
2420 #else
2421 static inline void
2422 _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock)
2423 {
2424         unsigned long flags;
2425         __u64 data_out = cpu_to_le64(b);
2426
2427         spin_lock_irqsave(writeq_lock, flags);
2428         writel((u32)(data_out), addr);
2429         writel((u32)(data_out >> 32), (addr + 4));
2430         spin_unlock_irqrestore(writeq_lock, flags);
2431 }
2432 #endif
2433
2434 /**
2435  * mpt3sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
2436  * @ioc: per adapter object
2437  * @smid: system request message index
2438  * @handle: device handle
2439  *
2440  * Return nothing.
2441  */
2442 void
2443 mpt3sas_base_put_smid_scsi_io(struct MPT3SAS_ADAPTER *ioc, u16 smid, u16 handle)
2444 {
2445         Mpi2RequestDescriptorUnion_t descriptor;
2446         u64 *request = (u64 *)&descriptor;
2447
2448
2449         descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
2450         descriptor.SCSIIO.MSIxIndex =  _base_get_msix_index(ioc);
2451         descriptor.SCSIIO.SMID = cpu_to_le16(smid);
2452         descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
2453         descriptor.SCSIIO.LMID = 0;
2454         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2455             &ioc->scsi_lookup_lock);
2456 }
2457
2458 /**
2459  * mpt3sas_base_put_smid_fast_path - send fast path request to firmware
2460  * @ioc: per adapter object
2461  * @smid: system request message index
2462  * @handle: device handle
2463  *
2464  * Return nothing.
2465  */
2466 void
2467 mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
2468         u16 handle)
2469 {
2470         Mpi2RequestDescriptorUnion_t descriptor;
2471         u64 *request = (u64 *)&descriptor;
2472
2473         descriptor.SCSIIO.RequestFlags =
2474             MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO;
2475         descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
2476         descriptor.SCSIIO.SMID = cpu_to_le16(smid);
2477         descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
2478         descriptor.SCSIIO.LMID = 0;
2479         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2480             &ioc->scsi_lookup_lock);
2481 }
2482
2483 /**
2484  * mpt3sas_base_put_smid_hi_priority - send Task Managment request to firmware
2485  * @ioc: per adapter object
2486  * @smid: system request message index
2487  * @msix_task: msix_task will be same as msix of IO incase of task abort else 0.
2488  * Return nothing.
2489  */
2490 void
2491 mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
2492         u16 msix_task)
2493 {
2494         Mpi2RequestDescriptorUnion_t descriptor;
2495         u64 *request = (u64 *)&descriptor;
2496
2497         descriptor.HighPriority.RequestFlags =
2498             MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
2499         descriptor.HighPriority.MSIxIndex =  msix_task;
2500         descriptor.HighPriority.SMID = cpu_to_le16(smid);
2501         descriptor.HighPriority.LMID = 0;
2502         descriptor.HighPriority.Reserved1 = 0;
2503         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2504             &ioc->scsi_lookup_lock);
2505 }
2506
2507 /**
2508  * mpt3sas_base_put_smid_default - Default, primarily used for config pages
2509  * @ioc: per adapter object
2510  * @smid: system request message index
2511  *
2512  * Return nothing.
2513  */
2514 void
2515 mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2516 {
2517         Mpi2RequestDescriptorUnion_t descriptor;
2518         u64 *request = (u64 *)&descriptor;
2519
2520         descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2521         descriptor.Default.MSIxIndex =  _base_get_msix_index(ioc);
2522         descriptor.Default.SMID = cpu_to_le16(smid);
2523         descriptor.Default.LMID = 0;
2524         descriptor.Default.DescriptorTypeDependent = 0;
2525         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2526             &ioc->scsi_lookup_lock);
2527 }
2528
2529 /**
2530  * _base_display_OEMs_branding - Display branding string
2531  * @ioc: per adapter object
2532  *
2533  * Return nothing.
2534  */
2535 static void
2536 _base_display_OEMs_branding(struct MPT3SAS_ADAPTER *ioc)
2537 {
2538         if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
2539                 return;
2540
2541         switch (ioc->pdev->subsystem_vendor) {
2542         case PCI_VENDOR_ID_INTEL:
2543                 switch (ioc->pdev->device) {
2544                 case MPI2_MFGPAGE_DEVID_SAS2008:
2545                         switch (ioc->pdev->subsystem_device) {
2546                         case MPT2SAS_INTEL_RMS2LL080_SSDID:
2547                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2548                                     MPT2SAS_INTEL_RMS2LL080_BRANDING);
2549                                 break;
2550                         case MPT2SAS_INTEL_RMS2LL040_SSDID:
2551                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2552                                     MPT2SAS_INTEL_RMS2LL040_BRANDING);
2553                                 break;
2554                         case MPT2SAS_INTEL_SSD910_SSDID:
2555                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2556                                     MPT2SAS_INTEL_SSD910_BRANDING);
2557                                 break;
2558                         default:
2559                                 pr_info(MPT3SAS_FMT
2560                                  "Intel(R) Controller: Subsystem ID: 0x%X\n",
2561                                  ioc->name, ioc->pdev->subsystem_device);
2562                                 break;
2563                         }
2564                 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2565                         switch (ioc->pdev->subsystem_device) {
2566                         case MPT2SAS_INTEL_RS25GB008_SSDID:
2567                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2568                                     MPT2SAS_INTEL_RS25GB008_BRANDING);
2569                                 break;
2570                         case MPT2SAS_INTEL_RMS25JB080_SSDID:
2571                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2572                                     MPT2SAS_INTEL_RMS25JB080_BRANDING);
2573                                 break;
2574                         case MPT2SAS_INTEL_RMS25JB040_SSDID:
2575                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2576                                     MPT2SAS_INTEL_RMS25JB040_BRANDING);
2577                                 break;
2578                         case MPT2SAS_INTEL_RMS25KB080_SSDID:
2579                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2580                                     MPT2SAS_INTEL_RMS25KB080_BRANDING);
2581                                 break;
2582                         case MPT2SAS_INTEL_RMS25KB040_SSDID:
2583                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2584                                     MPT2SAS_INTEL_RMS25KB040_BRANDING);
2585                                 break;
2586                         case MPT2SAS_INTEL_RMS25LB040_SSDID:
2587                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2588                                     MPT2SAS_INTEL_RMS25LB040_BRANDING);
2589                                 break;
2590                         case MPT2SAS_INTEL_RMS25LB080_SSDID:
2591                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2592                                     MPT2SAS_INTEL_RMS25LB080_BRANDING);
2593                                 break;
2594                         default:
2595                                 pr_info(MPT3SAS_FMT
2596                                  "Intel(R) Controller: Subsystem ID: 0x%X\n",
2597                                  ioc->name, ioc->pdev->subsystem_device);
2598                                 break;
2599                         }
2600                 case MPI25_MFGPAGE_DEVID_SAS3008:
2601                         switch (ioc->pdev->subsystem_device) {
2602                         case MPT3SAS_INTEL_RMS3JC080_SSDID:
2603                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2604                                         MPT3SAS_INTEL_RMS3JC080_BRANDING);
2605                                 break;
2606
2607                         case MPT3SAS_INTEL_RS3GC008_SSDID:
2608                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2609                                         MPT3SAS_INTEL_RS3GC008_BRANDING);
2610                                 break;
2611                         case MPT3SAS_INTEL_RS3FC044_SSDID:
2612                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2613                                         MPT3SAS_INTEL_RS3FC044_BRANDING);
2614                                 break;
2615                         case MPT3SAS_INTEL_RS3UC080_SSDID:
2616                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2617                                         MPT3SAS_INTEL_RS3UC080_BRANDING);
2618                                 break;
2619                         default:
2620                                 pr_info(MPT3SAS_FMT
2621                                  "Intel(R) Controller: Subsystem ID: 0x%X\n",
2622                                  ioc->name, ioc->pdev->subsystem_device);
2623                                 break;
2624                         }
2625                         break;
2626                 default:
2627                         pr_info(MPT3SAS_FMT
2628                          "Intel(R) Controller: Subsystem ID: 0x%X\n",
2629                          ioc->name, ioc->pdev->subsystem_device);
2630                         break;
2631                 }
2632                 break;
2633         case PCI_VENDOR_ID_DELL:
2634                 switch (ioc->pdev->device) {
2635                 case MPI2_MFGPAGE_DEVID_SAS2008:
2636                         switch (ioc->pdev->subsystem_device) {
2637                         case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
2638                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2639                                  MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING);
2640                                 break;
2641                         case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
2642                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2643                                  MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING);
2644                                 break;
2645                         case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
2646                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2647                                  MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING);
2648                                 break;
2649                         case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
2650                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2651                                  MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING);
2652                                 break;
2653                         case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
2654                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2655                                  MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING);
2656                                 break;
2657                         case MPT2SAS_DELL_PERC_H200_SSDID:
2658                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2659                                  MPT2SAS_DELL_PERC_H200_BRANDING);
2660                                 break;
2661                         case MPT2SAS_DELL_6GBPS_SAS_SSDID:
2662                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2663                                  MPT2SAS_DELL_6GBPS_SAS_BRANDING);
2664                                 break;
2665                         default:
2666                                 pr_info(MPT3SAS_FMT
2667                                    "Dell 6Gbps HBA: Subsystem ID: 0x%X\n",
2668                                    ioc->name, ioc->pdev->subsystem_device);
2669                                 break;
2670                         }
2671                         break;
2672                 case MPI25_MFGPAGE_DEVID_SAS3008:
2673                         switch (ioc->pdev->subsystem_device) {
2674                         case MPT3SAS_DELL_12G_HBA_SSDID:
2675                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2676                                         MPT3SAS_DELL_12G_HBA_BRANDING);
2677                                 break;
2678                         default:
2679                                 pr_info(MPT3SAS_FMT
2680                                    "Dell 12Gbps HBA: Subsystem ID: 0x%X\n",
2681                                    ioc->name, ioc->pdev->subsystem_device);
2682                                 break;
2683                         }
2684                         break;
2685                 default:
2686                         pr_info(MPT3SAS_FMT
2687                            "Dell HBA: Subsystem ID: 0x%X\n", ioc->name,
2688                            ioc->pdev->subsystem_device);
2689                         break;
2690                 }
2691                 break;
2692         case PCI_VENDOR_ID_CISCO:
2693                 switch (ioc->pdev->device) {
2694                 case MPI25_MFGPAGE_DEVID_SAS3008:
2695                         switch (ioc->pdev->subsystem_device) {
2696                         case MPT3SAS_CISCO_12G_8E_HBA_SSDID:
2697                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2698                                         MPT3SAS_CISCO_12G_8E_HBA_BRANDING);
2699                                 break;
2700                         case MPT3SAS_CISCO_12G_8I_HBA_SSDID:
2701                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2702                                         MPT3SAS_CISCO_12G_8I_HBA_BRANDING);
2703                                 break;
2704                         case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID:
2705                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2706                                         MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING);
2707                                 break;
2708                         default:
2709                                 pr_info(MPT3SAS_FMT
2710                                   "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2711                                   ioc->name, ioc->pdev->subsystem_device);
2712                                 break;
2713                         }
2714                         break;
2715                 case MPI25_MFGPAGE_DEVID_SAS3108_1:
2716                         switch (ioc->pdev->subsystem_device) {
2717                         case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID:
2718                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2719                                 MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING);
2720                                 break;
2721                         case MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID:
2722                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2723                                 MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING
2724                                 );
2725                                 break;
2726                         default:
2727                                 pr_info(MPT3SAS_FMT
2728                                  "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2729                                  ioc->name, ioc->pdev->subsystem_device);
2730                                 break;
2731                         }
2732                         break;
2733                 default:
2734                         pr_info(MPT3SAS_FMT
2735                            "Cisco SAS HBA: Subsystem ID: 0x%X\n",
2736                            ioc->name, ioc->pdev->subsystem_device);
2737                         break;
2738                 }
2739                 break;
2740         case MPT2SAS_HP_3PAR_SSVID:
2741                 switch (ioc->pdev->device) {
2742                 case MPI2_MFGPAGE_DEVID_SAS2004:
2743                         switch (ioc->pdev->subsystem_device) {
2744                         case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
2745                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2746                                     MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
2747                                 break;
2748                         default:
2749                                 pr_info(MPT3SAS_FMT
2750                                    "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n",
2751                                    ioc->name, ioc->pdev->subsystem_device);
2752                                 break;
2753                         }
2754                 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2755                         switch (ioc->pdev->subsystem_device) {
2756                         case MPT2SAS_HP_2_4_INTERNAL_SSDID:
2757                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2758                                     MPT2SAS_HP_2_4_INTERNAL_BRANDING);
2759                                 break;
2760                         case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
2761                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2762                                     MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
2763                                 break;
2764                         case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
2765                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2766                                  MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
2767                                 break;
2768                         case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
2769                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2770                                     MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
2771                                 break;
2772                         default:
2773                                 pr_info(MPT3SAS_FMT
2774                                    "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n",
2775                                    ioc->name, ioc->pdev->subsystem_device);
2776                                 break;
2777                         }
2778                 default:
2779                         pr_info(MPT3SAS_FMT
2780                            "HP SAS HBA: Subsystem ID: 0x%X\n",
2781                            ioc->name, ioc->pdev->subsystem_device);
2782                         break;
2783                 }
2784         default:
2785                 break;
2786         }
2787 }
2788
2789 /**
2790  * _base_display_ioc_capabilities - Disply IOC's capabilities.
2791  * @ioc: per adapter object
2792  *
2793  * Return nothing.
2794  */
2795 static void
2796 _base_display_ioc_capabilities(struct MPT3SAS_ADAPTER *ioc)
2797 {
2798         int i = 0;
2799         char desc[16];
2800         u32 iounit_pg1_flags;
2801         u32 bios_version;
2802
2803         bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
2804         strncpy(desc, ioc->manu_pg0.ChipName, 16);
2805         pr_info(MPT3SAS_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "\
2806            "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2807             ioc->name, desc,
2808            (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2809            (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2810            (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2811            ioc->facts.FWVersion.Word & 0x000000FF,
2812            ioc->pdev->revision,
2813            (bios_version & 0xFF000000) >> 24,
2814            (bios_version & 0x00FF0000) >> 16,
2815            (bios_version & 0x0000FF00) >> 8,
2816             bios_version & 0x000000FF);
2817
2818         _base_display_OEMs_branding(ioc);
2819
2820         pr_info(MPT3SAS_FMT "Protocol=(", ioc->name);
2821
2822         if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
2823                 pr_info("Initiator");
2824                 i++;
2825         }
2826
2827         if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
2828                 pr_info("%sTarget", i ? "," : "");
2829                 i++;
2830         }
2831
2832         i = 0;
2833         pr_info("), ");
2834         pr_info("Capabilities=(");
2835
2836         if (!ioc->hide_ir_msg) {
2837                 if (ioc->facts.IOCCapabilities &
2838                     MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
2839                         pr_info("Raid");
2840                         i++;
2841                 }
2842         }
2843
2844         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
2845                 pr_info("%sTLR", i ? "," : "");
2846                 i++;
2847         }
2848
2849         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
2850                 pr_info("%sMulticast", i ? "," : "");
2851                 i++;
2852         }
2853
2854         if (ioc->facts.IOCCapabilities &
2855             MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
2856                 pr_info("%sBIDI Target", i ? "," : "");
2857                 i++;
2858         }
2859
2860         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
2861                 pr_info("%sEEDP", i ? "," : "");
2862                 i++;
2863         }
2864
2865         if (ioc->facts.IOCCapabilities &
2866             MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
2867                 pr_info("%sSnapshot Buffer", i ? "," : "");
2868                 i++;
2869         }
2870
2871         if (ioc->facts.IOCCapabilities &
2872             MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
2873                 pr_info("%sDiag Trace Buffer", i ? "," : "");
2874                 i++;
2875         }
2876
2877         if (ioc->facts.IOCCapabilities &
2878             MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
2879                 pr_info("%sDiag Extended Buffer", i ? "," : "");
2880                 i++;
2881         }
2882
2883         if (ioc->facts.IOCCapabilities &
2884             MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
2885                 pr_info("%sTask Set Full", i ? "," : "");
2886                 i++;
2887         }
2888
2889         iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2890         if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
2891                 pr_info("%sNCQ", i ? "," : "");
2892                 i++;
2893         }
2894
2895         pr_info(")\n");
2896 }
2897
2898 /**
2899  * mpt3sas_base_update_missing_delay - change the missing delay timers
2900  * @ioc: per adapter object
2901  * @device_missing_delay: amount of time till device is reported missing
2902  * @io_missing_delay: interval IO is returned when there is a missing device
2903  *
2904  * Return nothing.
2905  *
2906  * Passed on the command line, this function will modify the device missing
2907  * delay, as well as the io missing delay. This should be called at driver
2908  * load time.
2909  */
2910 void
2911 mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
2912         u16 device_missing_delay, u8 io_missing_delay)
2913 {
2914         u16 dmd, dmd_new, dmd_orignal;
2915         u8 io_missing_delay_original;
2916         u16 sz;
2917         Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
2918         Mpi2ConfigReply_t mpi_reply;
2919         u8 num_phys = 0;
2920         u16 ioc_status;
2921
2922         mpt3sas_config_get_number_hba_phys(ioc, &num_phys);
2923         if (!num_phys)
2924                 return;
2925
2926         sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
2927             sizeof(Mpi2SasIOUnit1PhyData_t));
2928         sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
2929         if (!sas_iounit_pg1) {
2930                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2931                     ioc->name, __FILE__, __LINE__, __func__);
2932                 goto out;
2933         }
2934         if ((mpt3sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
2935             sas_iounit_pg1, sz))) {
2936                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2937                     ioc->name, __FILE__, __LINE__, __func__);
2938                 goto out;
2939         }
2940         ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
2941             MPI2_IOCSTATUS_MASK;
2942         if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
2943                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2944                     ioc->name, __FILE__, __LINE__, __func__);
2945                 goto out;
2946         }
2947
2948         /* device missing delay */
2949         dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
2950         if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2951                 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2952         else
2953                 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2954         dmd_orignal = dmd;
2955         if (device_missing_delay > 0x7F) {
2956                 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
2957                     device_missing_delay;
2958                 dmd = dmd / 16;
2959                 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
2960         } else
2961                 dmd = device_missing_delay;
2962         sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
2963
2964         /* io missing delay */
2965         io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
2966         sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
2967
2968         if (!mpt3sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
2969             sz)) {
2970                 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2971                         dmd_new = (dmd &
2972                             MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2973                 else
2974                         dmd_new =
2975                     dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2976                 pr_info(MPT3SAS_FMT "device_missing_delay: old(%d), new(%d)\n",
2977                         ioc->name, dmd_orignal, dmd_new);
2978                 pr_info(MPT3SAS_FMT "ioc_missing_delay: old(%d), new(%d)\n",
2979                         ioc->name, io_missing_delay_original,
2980                     io_missing_delay);
2981                 ioc->device_missing_delay = dmd_new;
2982                 ioc->io_missing_delay = io_missing_delay;
2983         }
2984
2985 out:
2986         kfree(sas_iounit_pg1);
2987 }
2988 /**
2989  * _base_static_config_pages - static start of day config pages
2990  * @ioc: per adapter object
2991  *
2992  * Return nothing.
2993  */
2994 static void
2995 _base_static_config_pages(struct MPT3SAS_ADAPTER *ioc)
2996 {
2997         Mpi2ConfigReply_t mpi_reply;
2998         u32 iounit_pg1_flags;
2999
3000         mpt3sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
3001         if (ioc->ir_firmware)
3002                 mpt3sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
3003                     &ioc->manu_pg10);
3004
3005         /*
3006          * Ensure correct T10 PI operation if vendor left EEDPTagMode
3007          * flag unset in NVDATA.
3008          */
3009         mpt3sas_config_get_manufacturing_pg11(ioc, &mpi_reply, &ioc->manu_pg11);
3010         if (ioc->manu_pg11.EEDPTagMode == 0) {
3011                 pr_err("%s: overriding NVDATA EEDPTagMode setting\n",
3012                     ioc->name);
3013                 ioc->manu_pg11.EEDPTagMode &= ~0x3;
3014                 ioc->manu_pg11.EEDPTagMode |= 0x1;
3015                 mpt3sas_config_set_manufacturing_pg11(ioc, &mpi_reply,
3016                     &ioc->manu_pg11);
3017         }
3018
3019         mpt3sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
3020         mpt3sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
3021         mpt3sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
3022         mpt3sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
3023         mpt3sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
3024         mpt3sas_config_get_iounit_pg8(ioc, &mpi_reply, &ioc->iounit_pg8);
3025         _base_display_ioc_capabilities(ioc);
3026
3027         /*
3028          * Enable task_set_full handling in iounit_pg1 when the
3029          * facts capabilities indicate that its supported.
3030          */
3031         iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
3032         if ((ioc->facts.IOCCapabilities &
3033             MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
3034                 iounit_pg1_flags &=
3035                     ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
3036         else
3037                 iounit_pg1_flags |=
3038                     MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
3039         ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
3040         mpt3sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
3041
3042         if (ioc->iounit_pg8.NumSensors)
3043                 ioc->temp_sensors_count = ioc->iounit_pg8.NumSensors;
3044 }
3045
3046 /**
3047  * _base_release_memory_pools - release memory
3048  * @ioc: per adapter object
3049  *
3050  * Free memory allocated from _base_allocate_memory_pools.
3051  *
3052  * Return nothing.
3053  */
3054 static void
3055 _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
3056 {
3057         int i = 0;
3058         struct reply_post_struct *rps;
3059
3060         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3061             __func__));
3062
3063         if (ioc->request) {
3064                 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
3065                     ioc->request,  ioc->request_dma);
3066                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3067                         "request_pool(0x%p): free\n",
3068                         ioc->name, ioc->request));
3069                 ioc->request = NULL;
3070         }
3071
3072         if (ioc->sense) {
3073                 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
3074                 if (ioc->sense_dma_pool)
3075                         pci_pool_destroy(ioc->sense_dma_pool);
3076                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3077                         "sense_pool(0x%p): free\n",
3078                         ioc->name, ioc->sense));
3079                 ioc->sense = NULL;
3080         }
3081
3082         if (ioc->reply) {
3083                 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
3084                 if (ioc->reply_dma_pool)
3085                         pci_pool_destroy(ioc->reply_dma_pool);
3086                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3087                         "reply_pool(0x%p): free\n",
3088                         ioc->name, ioc->reply));
3089                 ioc->reply = NULL;
3090         }
3091
3092         if (ioc->reply_free) {
3093                 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
3094                     ioc->reply_free_dma);
3095                 if (ioc->reply_free_dma_pool)
3096                         pci_pool_destroy(ioc->reply_free_dma_pool);
3097                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3098                         "reply_free_pool(0x%p): free\n",
3099                         ioc->name, ioc->reply_free));
3100                 ioc->reply_free = NULL;
3101         }
3102
3103         if (ioc->reply_post) {
3104                 do {
3105                         rps = &ioc->reply_post[i];
3106                         if (rps->reply_post_free) {
3107                                 pci_pool_free(
3108                                     ioc->reply_post_free_dma_pool,
3109                                     rps->reply_post_free,
3110                                     rps->reply_post_free_dma);
3111                                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3112                                     "reply_post_free_pool(0x%p): free\n",
3113                                     ioc->name, rps->reply_post_free));
3114                                 rps->reply_post_free = NULL;
3115                         }
3116                 } while (ioc->rdpq_array_enable &&
3117                            (++i < ioc->reply_queue_count));
3118
3119                 if (ioc->reply_post_free_dma_pool)
3120                         pci_pool_destroy(ioc->reply_post_free_dma_pool);
3121                 kfree(ioc->reply_post);
3122         }
3123
3124         if (ioc->config_page) {
3125                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3126                     "config_page(0x%p): free\n", ioc->name,
3127                     ioc->config_page));
3128                 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
3129                     ioc->config_page, ioc->config_page_dma);
3130         }
3131
3132         if (ioc->scsi_lookup) {
3133                 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
3134                 ioc->scsi_lookup = NULL;
3135         }
3136         kfree(ioc->hpr_lookup);
3137         kfree(ioc->internal_lookup);
3138         if (ioc->chain_lookup) {
3139                 for (i = 0; i < ioc->chain_depth; i++) {
3140                         if (ioc->chain_lookup[i].chain_buffer)
3141                                 pci_pool_free(ioc->chain_dma_pool,
3142                                     ioc->chain_lookup[i].chain_buffer,
3143                                     ioc->chain_lookup[i].chain_buffer_dma);
3144                 }
3145                 if (ioc->chain_dma_pool)
3146                         pci_pool_destroy(ioc->chain_dma_pool);
3147                 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
3148                 ioc->chain_lookup = NULL;
3149         }
3150 }
3151
3152 /**
3153  * _base_allocate_memory_pools - allocate start of day memory pools
3154  * @ioc: per adapter object
3155  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3156  *
3157  * Returns 0 success, anything else error
3158  */
3159 static int
3160 _base_allocate_memory_pools(struct MPT3SAS_ADAPTER *ioc,  int sleep_flag)
3161 {
3162         struct mpt3sas_facts *facts;
3163         u16 max_sge_elements;
3164         u16 chains_needed_per_io;
3165         u32 sz, total_sz, reply_post_free_sz;
3166         u32 retry_sz;
3167         u16 max_request_credit;
3168         unsigned short sg_tablesize;
3169         u16 sge_size;
3170         int i;
3171
3172         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3173             __func__));
3174
3175
3176         retry_sz = 0;
3177         facts = &ioc->facts;
3178
3179         /* command line tunables for max sgl entries */
3180         if (max_sgl_entries != -1)
3181                 sg_tablesize = max_sgl_entries;
3182         else {
3183                 if (ioc->hba_mpi_version_belonged == MPI2_VERSION)
3184                         sg_tablesize = MPT2SAS_SG_DEPTH;
3185                 else
3186                         sg_tablesize = MPT3SAS_SG_DEPTH;
3187         }
3188
3189         if (sg_tablesize < MPT_MIN_PHYS_SEGMENTS)
3190                 sg_tablesize = MPT_MIN_PHYS_SEGMENTS;
3191         else if (sg_tablesize > MPT_MAX_PHYS_SEGMENTS) {
3192                 sg_tablesize = min_t(unsigned short, sg_tablesize,
3193                                       SCSI_MAX_SG_CHAIN_SEGMENTS);
3194                 pr_warn(MPT3SAS_FMT
3195                  "sg_tablesize(%u) is bigger than kernel"
3196                  " defined SCSI_MAX_SG_SEGMENTS(%u)\n", ioc->name,
3197                  sg_tablesize, MPT_MAX_PHYS_SEGMENTS);
3198         }
3199         ioc->shost->sg_tablesize = sg_tablesize;
3200
3201         ioc->hi_priority_depth = facts->HighPriorityCredit;
3202         ioc->internal_depth = ioc->hi_priority_depth + (5);
3203         /* command line tunables  for max controller queue depth */
3204         if (max_queue_depth != -1 && max_queue_depth != 0) {
3205                 max_request_credit = min_t(u16, max_queue_depth +
3206                     ioc->hi_priority_depth + ioc->internal_depth,
3207                     facts->RequestCredit);
3208                 if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
3209                         max_request_credit =  MAX_HBA_QUEUE_DEPTH;
3210         } else
3211                 max_request_credit = min_t(u16, facts->RequestCredit,
3212                     MAX_HBA_QUEUE_DEPTH);
3213
3214         ioc->hba_queue_depth = max_request_credit;
3215
3216         /* request frame size */
3217         ioc->request_sz = facts->IOCRequestFrameSize * 4;
3218
3219         /* reply frame size */
3220         ioc->reply_sz = facts->ReplyFrameSize * 4;
3221
3222         /* calculate the max scatter element size */
3223         sge_size = max_t(u16, ioc->sge_size, ioc->sge_size_ieee);
3224
3225  retry_allocation:
3226         total_sz = 0;
3227         /* calculate number of sg elements left over in the 1st frame */
3228         max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
3229             sizeof(Mpi2SGEIOUnion_t)) + sge_size);
3230         ioc->max_sges_in_main_message = max_sge_elements/sge_size;
3231
3232         /* now do the same for a chain buffer */
3233         max_sge_elements = ioc->request_sz - sge_size;
3234         ioc->max_sges_in_chain_message = max_sge_elements/sge_size;
3235
3236         /*
3237          *  MPT3SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
3238          */
3239         chains_needed_per_io = ((ioc->shost->sg_tablesize -
3240            ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
3241             + 1;
3242         if (chains_needed_per_io > facts->MaxChainDepth) {
3243                 chains_needed_per_io = facts->MaxChainDepth;
3244                 ioc->shost->sg_tablesize = min_t(u16,
3245                 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
3246                 * chains_needed_per_io), ioc->shost->sg_tablesize);
3247         }
3248         ioc->chains_needed_per_io = chains_needed_per_io;
3249
3250         /* reply free queue sizing - taking into account for 64 FW events */
3251         ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
3252
3253         /* calculate reply descriptor post queue depth */
3254         ioc->reply_post_queue_depth = ioc->hba_queue_depth +
3255                                 ioc->reply_free_queue_depth +  1 ;
3256         /* align the reply post queue on the next 16 count boundary */
3257         if (ioc->reply_post_queue_depth % 16)
3258                 ioc->reply_post_queue_depth += 16 -
3259                 (ioc->reply_post_queue_depth % 16);
3260
3261
3262         if (ioc->reply_post_queue_depth >
3263             facts->MaxReplyDescriptorPostQueueDepth) {
3264                 ioc->reply_post_queue_depth =
3265                                 facts->MaxReplyDescriptorPostQueueDepth -
3266                     (facts->MaxReplyDescriptorPostQueueDepth % 16);
3267                 ioc->hba_queue_depth =
3268                                 ((ioc->reply_post_queue_depth - 64) / 2) - 1;
3269                 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
3270         }
3271
3272         dinitprintk(ioc, pr_info(MPT3SAS_FMT "scatter gather: " \
3273             "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
3274             "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
3275             ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
3276             ioc->chains_needed_per_io));
3277
3278         /* reply post queue, 16 byte align */
3279         reply_post_free_sz = ioc->reply_post_queue_depth *
3280             sizeof(Mpi2DefaultReplyDescriptor_t);
3281
3282         sz = reply_post_free_sz;
3283         if (_base_is_controller_msix_enabled(ioc) && !ioc->rdpq_array_enable)
3284                 sz *= ioc->reply_queue_count;
3285
3286         ioc->reply_post = kcalloc((ioc->rdpq_array_enable) ?
3287             (ioc->reply_queue_count):1,
3288             sizeof(struct reply_post_struct), GFP_KERNEL);
3289
3290         if (!ioc->reply_post) {
3291                 pr_err(MPT3SAS_FMT "reply_post_free pool: kcalloc failed\n",
3292                         ioc->name);
3293                 goto out;
3294         }
3295         ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
3296             ioc->pdev, sz, 16, 0);
3297         if (!ioc->reply_post_free_dma_pool) {
3298                 pr_err(MPT3SAS_FMT
3299                  "reply_post_free pool: pci_pool_create failed\n",
3300                  ioc->name);
3301                 goto out;
3302         }
3303         i = 0;
3304         do {
3305                 ioc->reply_post[i].reply_post_free =
3306                     pci_pool_alloc(ioc->reply_post_free_dma_pool,
3307                     GFP_KERNEL,
3308                     &ioc->reply_post[i].reply_post_free_dma);
3309                 if (!ioc->reply_post[i].reply_post_free) {
3310                         pr_err(MPT3SAS_FMT
3311                         "reply_post_free pool: pci_pool_alloc failed\n",
3312                         ioc->name);
3313                         goto out;
3314                 }
3315                 memset(ioc->reply_post[i].reply_post_free, 0, sz);
3316                 dinitprintk(ioc, pr_info(MPT3SAS_FMT
3317                     "reply post free pool (0x%p): depth(%d),"
3318                     "element_size(%d), pool_size(%d kB)\n", ioc->name,
3319                     ioc->reply_post[i].reply_post_free,
3320                     ioc->reply_post_queue_depth, 8, sz/1024));
3321                 dinitprintk(ioc, pr_info(MPT3SAS_FMT
3322                     "reply_post_free_dma = (0x%llx)\n", ioc->name,
3323                     (unsigned long long)
3324                     ioc->reply_post[i].reply_post_free_dma));
3325                 total_sz += sz;
3326         } while (ioc->rdpq_array_enable && (++i < ioc->reply_queue_count));
3327
3328         if (ioc->dma_mask == 64) {
3329                 if (_base_change_consistent_dma_mask(ioc, ioc->pdev) != 0) {
3330                         pr_warn(MPT3SAS_FMT
3331                             "no suitable consistent DMA mask for %s\n",
3332                             ioc->name, pci_name(ioc->pdev));
3333                         goto out;
3334                 }
3335         }
3336
3337         ioc->scsiio_depth = ioc->hba_queue_depth -
3338             ioc->hi_priority_depth - ioc->internal_depth;
3339
3340         /* set the scsi host can_queue depth
3341          * with some internal commands that could be outstanding
3342          */
3343         ioc->shost->can_queue = ioc->scsiio_depth;
3344         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3345                 "scsi host: can_queue depth (%d)\n",
3346                 ioc->name, ioc->shost->can_queue));
3347
3348
3349         /* contiguous pool for request and chains, 16 byte align, one extra "
3350          * "frame for smid=0
3351          */
3352         ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
3353         sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
3354
3355         /* hi-priority queue */
3356         sz += (ioc->hi_priority_depth * ioc->request_sz);
3357
3358         /* internal queue */
3359         sz += (ioc->internal_depth * ioc->request_sz);
3360
3361         ioc->request_dma_sz = sz;
3362         ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
3363         if (!ioc->request) {
3364                 pr_err(MPT3SAS_FMT "request pool: pci_alloc_consistent " \
3365                     "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3366                     "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
3367                     ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
3368                 if (ioc->scsiio_depth < MPT3SAS_SAS_QUEUE_DEPTH)
3369                         goto out;
3370                 retry_sz += 64;
3371                 ioc->hba_queue_depth = max_request_credit - retry_sz;
3372                 goto retry_allocation;
3373         }
3374
3375         if (retry_sz)
3376                 pr_err(MPT3SAS_FMT "request pool: pci_alloc_consistent " \
3377                     "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3378                     "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
3379                     ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
3380
3381         /* hi-priority queue */
3382         ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
3383             ioc->request_sz);
3384         ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
3385             ioc->request_sz);
3386
3387         /* internal queue */
3388         ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
3389             ioc->request_sz);
3390         ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
3391             ioc->request_sz);
3392
3393         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3394                 "request pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3395                 ioc->name, ioc->request, ioc->hba_queue_depth, ioc->request_sz,
3396             (ioc->hba_queue_depth * ioc->request_sz)/1024));
3397
3398         dinitprintk(ioc, pr_info(MPT3SAS_FMT "request pool: dma(0x%llx)\n",
3399             ioc->name, (unsigned long long) ioc->request_dma));
3400         total_sz += sz;
3401
3402         sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
3403         ioc->scsi_lookup_pages = get_order(sz);
3404         ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
3405             GFP_KERNEL, ioc->scsi_lookup_pages);
3406         if (!ioc->scsi_lookup) {
3407                 pr_err(MPT3SAS_FMT "scsi_lookup: get_free_pages failed, sz(%d)\n",
3408                         ioc->name, (int)sz);
3409                 goto out;
3410         }
3411
3412         dinitprintk(ioc, pr_info(MPT3SAS_FMT "scsiio(0x%p): depth(%d)\n",
3413                 ioc->name, ioc->request, ioc->scsiio_depth));
3414
3415         ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
3416         sz = ioc->chain_depth * sizeof(struct chain_tracker);
3417         ioc->chain_pages = get_order(sz);
3418         ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
3419             GFP_KERNEL, ioc->chain_pages);
3420         if (!ioc->chain_lookup) {
3421                 pr_err(MPT3SAS_FMT "chain_lookup: __get_free_pages failed\n",
3422                         ioc->name);
3423                 goto out;
3424         }
3425         ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
3426             ioc->request_sz, 16, 0);
3427         if (!ioc->chain_dma_pool) {
3428                 pr_err(MPT3SAS_FMT "chain_dma_pool: pci_pool_create failed\n",
3429                         ioc->name);
3430                 goto out;
3431         }
3432         for (i = 0; i < ioc->chain_depth; i++) {
3433                 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
3434                     ioc->chain_dma_pool , GFP_KERNEL,
3435                     &ioc->chain_lookup[i].chain_buffer_dma);
3436                 if (!ioc->chain_lookup[i].chain_buffer) {
3437                         ioc->chain_depth = i;
3438                         goto chain_done;
3439                 }
3440                 total_sz += ioc->request_sz;
3441         }
3442  chain_done:
3443         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3444                 "chain pool depth(%d), frame_size(%d), pool_size(%d kB)\n",
3445                 ioc->name, ioc->chain_depth, ioc->request_sz,
3446                 ((ioc->chain_depth *  ioc->request_sz))/1024));
3447
3448         /* initialize hi-priority queue smid's */
3449         ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
3450             sizeof(struct request_tracker), GFP_KERNEL);
3451         if (!ioc->hpr_lookup) {
3452                 pr_err(MPT3SAS_FMT "hpr_lookup: kcalloc failed\n",
3453                     ioc->name);
3454                 goto out;
3455         }
3456         ioc->hi_priority_smid = ioc->scsiio_depth + 1;
3457         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3458                 "hi_priority(0x%p): depth(%d), start smid(%d)\n",
3459                 ioc->name, ioc->hi_priority,
3460             ioc->hi_priority_depth, ioc->hi_priority_smid));
3461
3462         /* initialize internal queue smid's */
3463         ioc->internal_lookup = kcalloc(ioc->internal_depth,
3464             sizeof(struct request_tracker), GFP_KERNEL);
3465         if (!ioc->internal_lookup) {
3466                 pr_err(MPT3SAS_FMT "internal_lookup: kcalloc failed\n",
3467                     ioc->name);
3468                 goto out;
3469         }
3470         ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
3471         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3472                 "internal(0x%p): depth(%d), start smid(%d)\n",
3473                 ioc->name, ioc->internal,
3474             ioc->internal_depth, ioc->internal_smid));
3475
3476         /* sense buffers, 4 byte align */
3477         sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
3478         ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
3479             0);
3480         if (!ioc->sense_dma_pool) {
3481                 pr_err(MPT3SAS_FMT "sense pool: pci_pool_create failed\n",
3482                     ioc->name);
3483                 goto out;
3484         }
3485         ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
3486             &ioc->sense_dma);
3487         if (!ioc->sense) {
3488                 pr_err(MPT3SAS_FMT "sense pool: pci_pool_alloc failed\n",
3489                     ioc->name);
3490                 goto out;
3491         }
3492         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3493             "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
3494             "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
3495             SCSI_SENSE_BUFFERSIZE, sz/1024));
3496         dinitprintk(ioc, pr_info(MPT3SAS_FMT "sense_dma(0x%llx)\n",
3497             ioc->name, (unsigned long long)ioc->sense_dma));
3498         total_sz += sz;
3499
3500         /* reply pool, 4 byte align */
3501         sz = ioc->reply_free_queue_depth * ioc->reply_sz;
3502         ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
3503             0);
3504         if (!ioc->reply_dma_pool) {
3505                 pr_err(MPT3SAS_FMT "reply pool: pci_pool_create failed\n",
3506                     ioc->name);
3507                 goto out;
3508         }
3509         ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
3510             &ioc->reply_dma);
3511         if (!ioc->reply) {
3512                 pr_err(MPT3SAS_FMT "reply pool: pci_pool_alloc failed\n",
3513                     ioc->name);
3514                 goto out;
3515         }
3516         ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
3517         ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
3518         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3519                 "reply pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3520                 ioc->name, ioc->reply,
3521             ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
3522         dinitprintk(ioc, pr_info(MPT3SAS_FMT "reply_dma(0x%llx)\n",
3523             ioc->name, (unsigned long long)ioc->reply_dma));
3524         total_sz += sz;
3525
3526         /* reply free queue, 16 byte align */
3527         sz = ioc->reply_free_queue_depth * 4;
3528         ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
3529             ioc->pdev, sz, 16, 0);
3530         if (!ioc->reply_free_dma_pool) {
3531                 pr_err(MPT3SAS_FMT "reply_free pool: pci_pool_create failed\n",
3532                         ioc->name);
3533                 goto out;
3534         }
3535         ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
3536             &ioc->reply_free_dma);
3537         if (!ioc->reply_free) {
3538                 pr_err(MPT3SAS_FMT "reply_free pool: pci_pool_alloc failed\n",
3539                         ioc->name);
3540                 goto out;
3541         }
3542         memset(ioc->reply_free, 0, sz);
3543         dinitprintk(ioc, pr_info(MPT3SAS_FMT "reply_free pool(0x%p): " \
3544             "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
3545             ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
3546         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3547                 "reply_free_dma (0x%llx)\n",
3548                 ioc->name, (unsigned long long)ioc->reply_free_dma));
3549         total_sz += sz;
3550
3551         ioc->config_page_sz = 512;
3552         ioc->config_page = pci_alloc_consistent(ioc->pdev,
3553             ioc->config_page_sz, &ioc->config_page_dma);
3554         if (!ioc->config_page) {
3555                 pr_err(MPT3SAS_FMT
3556                         "config page: pci_pool_alloc failed\n",
3557                         ioc->name);
3558                 goto out;
3559         }
3560         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3561                 "config page(0x%p): size(%d)\n",
3562                 ioc->name, ioc->config_page, ioc->config_page_sz));
3563         dinitprintk(ioc, pr_info(MPT3SAS_FMT "config_page_dma(0x%llx)\n",
3564                 ioc->name, (unsigned long long)ioc->config_page_dma));
3565         total_sz += ioc->config_page_sz;
3566
3567         pr_info(MPT3SAS_FMT "Allocated physical memory: size(%d kB)\n",
3568             ioc->name, total_sz/1024);
3569         pr_info(MPT3SAS_FMT
3570                 "Current Controller Queue Depth(%d),Max Controller Queue Depth(%d)\n",
3571             ioc->name, ioc->shost->can_queue, facts->RequestCredit);
3572         pr_info(MPT3SAS_FMT "Scatter Gather Elements per IO(%d)\n",
3573             ioc->name, ioc->shost->sg_tablesize);
3574         return 0;
3575
3576  out:
3577         return -ENOMEM;
3578 }
3579
3580 /**
3581  * mpt3sas_base_get_iocstate - Get the current state of a MPT adapter.
3582  * @ioc: Pointer to MPT_ADAPTER structure
3583  * @cooked: Request raw or cooked IOC state
3584  *
3585  * Returns all IOC Doorbell register bits if cooked==0, else just the
3586  * Doorbell bits in MPI_IOC_STATE_MASK.
3587  */
3588 u32
3589 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked)
3590 {
3591         u32 s, sc;
3592
3593         s = readl(&ioc->chip->Doorbell);
3594         sc = s & MPI2_IOC_STATE_MASK;
3595         return cooked ? sc : s;
3596 }
3597
3598 /**
3599  * _base_wait_on_iocstate - waiting on a particular ioc state
3600  * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
3601  * @timeout: timeout in second
3602  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3603  *
3604  * Returns 0 for success, non-zero for failure.
3605  */
3606 static int
3607 _base_wait_on_iocstate(struct MPT3SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
3608         int sleep_flag)
3609 {
3610         u32 count, cntdn;
3611         u32 current_state;
3612
3613         count = 0;
3614         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3615         do {
3616                 current_state = mpt3sas_base_get_iocstate(ioc, 1);
3617                 if (current_state == ioc_state)
3618                         return 0;
3619                 if (count && current_state == MPI2_IOC_STATE_FAULT)
3620                         break;
3621                 if (sleep_flag == CAN_SLEEP)
3622                         usleep_range(1000, 1500);
3623                 else
3624                         udelay(500);
3625                 count++;
3626         } while (--cntdn);
3627
3628         return current_state;
3629 }
3630
3631 /**
3632  * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
3633  * a write to the doorbell)
3634  * @ioc: per adapter object
3635  * @timeout: timeout in second
3636  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3637  *
3638  * Returns 0 for success, non-zero for failure.
3639  *
3640  * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
3641  */
3642 static int
3643 _base_diag_reset(struct MPT3SAS_ADAPTER *ioc, int sleep_flag);
3644
3645 static int
3646 _base_wait_for_doorbell_int(struct MPT3SAS_ADAPTER *ioc, int timeout,
3647         int sleep_flag)
3648 {
3649         u32 cntdn, count;
3650         u32 int_status;
3651
3652         count = 0;
3653         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3654         do {
3655                 int_status = readl(&ioc->chip->HostInterruptStatus);
3656                 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
3657                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3658                                 "%s: successful count(%d), timeout(%d)\n",
3659                                 ioc->name, __func__, count, timeout));
3660                         return 0;
3661                 }
3662                 if (sleep_flag == CAN_SLEEP)
3663                         usleep_range(1000, 1500);
3664                 else
3665                         udelay(500);
3666                 count++;
3667         } while (--cntdn);
3668
3669         pr_err(MPT3SAS_FMT
3670                 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3671                 ioc->name, __func__, count, int_status);
3672         return -EFAULT;
3673 }
3674
3675 /**
3676  * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
3677  * @ioc: per adapter object
3678  * @timeout: timeout in second
3679  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3680  *
3681  * Returns 0 for success, non-zero for failure.
3682  *
3683  * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
3684  * doorbell.
3685  */
3686 static int
3687 _base_wait_for_doorbell_ack(struct MPT3SAS_ADAPTER *ioc, int timeout,
3688         int sleep_flag)
3689 {
3690         u32 cntdn, count;
3691         u32 int_status;
3692         u32 doorbell;
3693
3694         count = 0;
3695         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3696         do {
3697                 int_status = readl(&ioc->chip->HostInterruptStatus);
3698                 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
3699                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3700                                 "%s: successful count(%d), timeout(%d)\n",
3701                                 ioc->name, __func__, count, timeout));
3702                         return 0;
3703                 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
3704                         doorbell = readl(&ioc->chip->Doorbell);
3705                         if ((doorbell & MPI2_IOC_STATE_MASK) ==
3706                             MPI2_IOC_STATE_FAULT) {
3707                                 mpt3sas_base_fault_info(ioc , doorbell);
3708                                 return -EFAULT;
3709                         }
3710                 } else if (int_status == 0xFFFFFFFF)
3711                         goto out;
3712
3713                 if (sleep_flag == CAN_SLEEP)
3714                         usleep_range(1000, 1500);
3715                 else
3716                         udelay(500);
3717                 count++;
3718         } while (--cntdn);
3719
3720  out:
3721         pr_err(MPT3SAS_FMT
3722          "%s: failed due to timeout count(%d), int_status(%x)!\n",
3723          ioc->name, __func__, count, int_status);
3724         return -EFAULT;
3725 }
3726
3727 /**
3728  * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
3729  * @ioc: per adapter object
3730  * @timeout: timeout in second
3731  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3732  *
3733  * Returns 0 for success, non-zero for failure.
3734  *
3735  */
3736 static int
3737 _base_wait_for_doorbell_not_used(struct MPT3SAS_ADAPTER *ioc, int timeout,
3738         int sleep_flag)
3739 {
3740         u32 cntdn, count;
3741         u32 doorbell_reg;
3742
3743         count = 0;
3744         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3745         do {
3746                 doorbell_reg = readl(&ioc->chip->Doorbell);
3747                 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
3748                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3749                                 "%s: successful count(%d), timeout(%d)\n",
3750                                 ioc->name, __func__, count, timeout));
3751                         return 0;
3752                 }
3753                 if (sleep_flag == CAN_SLEEP)
3754                         usleep_range(1000, 1500);
3755                 else
3756                         udelay(500);
3757                 count++;
3758         } while (--cntdn);
3759
3760         pr_err(MPT3SAS_FMT
3761                 "%s: failed due to timeout count(%d), doorbell_reg(%x)!\n",
3762                 ioc->name, __func__, count, doorbell_reg);
3763         return -EFAULT;
3764 }
3765
3766 /**
3767  * _base_send_ioc_reset - send doorbell reset
3768  * @ioc: per adapter object
3769  * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
3770  * @timeout: timeout in second
3771  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3772  *
3773  * Returns 0 for success, non-zero for failure.
3774  */
3775 static int
3776 _base_send_ioc_reset(struct MPT3SAS_ADAPTER *ioc, u8 reset_type, int timeout,
3777         int sleep_flag)
3778 {
3779         u32 ioc_state;
3780         int r = 0;
3781
3782         if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
3783                 pr_err(MPT3SAS_FMT "%s: unknown reset_type\n",
3784                     ioc->name, __func__);
3785                 return -EFAULT;
3786         }
3787
3788         if (!(ioc->facts.IOCCapabilities &
3789            MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
3790                 return -EFAULT;
3791
3792         pr_info(MPT3SAS_FMT "sending message unit reset !!\n", ioc->name);
3793
3794         writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
3795             &ioc->chip->Doorbell);
3796         if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
3797                 r = -EFAULT;
3798                 goto out;
3799         }
3800         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
3801             timeout, sleep_flag);
3802         if (ioc_state) {
3803                 pr_err(MPT3SAS_FMT
3804                         "%s: failed going to ready state (ioc_state=0x%x)\n",
3805                         ioc->name, __func__, ioc_state);
3806                 r = -EFAULT;
3807                 goto out;
3808         }
3809  out:
3810         pr_info(MPT3SAS_FMT "message unit reset: %s\n",
3811             ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3812         return r;
3813 }
3814
3815 /**
3816  * _base_handshake_req_reply_wait - send request thru doorbell interface
3817  * @ioc: per adapter object
3818  * @request_bytes: request length
3819  * @request: pointer having request payload
3820  * @reply_bytes: reply length
3821  * @reply: pointer to reply payload
3822  * @timeout: timeout in second
3823  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3824  *
3825  * Returns 0 for success, non-zero for failure.
3826  */
3827 static int
3828 _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER *ioc, int request_bytes,
3829         u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
3830 {
3831         MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
3832         int i;
3833         u8 failed;
3834         u16 dummy;
3835         __le32 *mfp;
3836
3837         /* make sure doorbell is not in use */
3838         if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
3839                 pr_err(MPT3SAS_FMT
3840                         "doorbell is in use (line=%d)\n",
3841                         ioc->name, __LINE__);
3842                 return -EFAULT;
3843         }
3844
3845         /* clear pending doorbell interrupts from previous state changes */
3846         if (readl(&ioc->chip->HostInterruptStatus) &
3847             MPI2_HIS_IOC2SYS_DB_STATUS)
3848                 writel(0, &ioc->chip->HostInterruptStatus);
3849
3850         /* send message to ioc */
3851         writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
3852             ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
3853             &ioc->chip->Doorbell);
3854
3855         if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
3856                 pr_err(MPT3SAS_FMT
3857                         "doorbell handshake int failed (line=%d)\n",
3858                         ioc->name, __LINE__);
3859                 return -EFAULT;
3860         }
3861         writel(0, &ioc->chip->HostInterruptStatus);
3862
3863         if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
3864                 pr_err(MPT3SAS_FMT
3865                         "doorbell handshake ack failed (line=%d)\n",
3866                         ioc->name, __LINE__);
3867                 return -EFAULT;
3868         }
3869
3870         /* send message 32-bits at a time */
3871         for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
3872                 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
3873                 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
3874                         failed = 1;
3875         }
3876
3877         if (failed) {
3878                 pr_err(MPT3SAS_FMT
3879                         "doorbell handshake sending request failed (line=%d)\n",
3880                         ioc->name, __LINE__);
3881                 return -EFAULT;
3882         }
3883
3884         /* now wait for the reply */
3885         if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
3886                 pr_err(MPT3SAS_FMT
3887                         "doorbell handshake int failed (line=%d)\n",
3888                         ioc->name, __LINE__);
3889                 return -EFAULT;
3890         }
3891
3892         /* read the first two 16-bits, it gives the total length of the reply */
3893         reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3894             & MPI2_DOORBELL_DATA_MASK);
3895         writel(0, &ioc->chip->HostInterruptStatus);
3896         if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3897                 pr_err(MPT3SAS_FMT
3898                         "doorbell handshake int failed (line=%d)\n",
3899                         ioc->name, __LINE__);
3900                 return -EFAULT;
3901         }
3902         reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3903             & MPI2_DOORBELL_DATA_MASK);
3904         writel(0, &ioc->chip->HostInterruptStatus);
3905
3906         for (i = 2; i < default_reply->MsgLength * 2; i++)  {
3907                 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3908                         pr_err(MPT3SAS_FMT
3909                                 "doorbell handshake int failed (line=%d)\n",
3910                                 ioc->name, __LINE__);
3911                         return -EFAULT;
3912                 }
3913                 if (i >=  reply_bytes/2) /* overflow case */
3914                         dummy = readl(&ioc->chip->Doorbell);
3915                 else
3916                         reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3917                             & MPI2_DOORBELL_DATA_MASK);
3918                 writel(0, &ioc->chip->HostInterruptStatus);
3919         }
3920
3921         _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
3922         if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
3923                 dhsprintk(ioc, pr_info(MPT3SAS_FMT
3924                         "doorbell is in use (line=%d)\n", ioc->name, __LINE__));
3925         }
3926         writel(0, &ioc->chip->HostInterruptStatus);
3927
3928         if (ioc->logging_level & MPT_DEBUG_INIT) {
3929                 mfp = (__le32 *)reply;
3930                 pr_info("\toffset:data\n");
3931                 for (i = 0; i < reply_bytes/4; i++)
3932                         pr_info("\t[0x%02x]:%08x\n", i*4,
3933                             le32_to_cpu(mfp[i]));
3934         }
3935         return 0;
3936 }
3937
3938 /**
3939  * mpt3sas_base_sas_iounit_control - send sas iounit control to FW
3940  * @ioc: per adapter object
3941  * @mpi_reply: the reply payload from FW
3942  * @mpi_request: the request payload sent to FW
3943  *
3944  * The SAS IO Unit Control Request message allows the host to perform low-level
3945  * operations, such as resets on the PHYs of the IO Unit, also allows the host
3946  * to obtain the IOC assigned device handles for a device if it has other
3947  * identifying information about the device, in addition allows the host to
3948  * remove IOC resources associated with the device.
3949  *
3950  * Returns 0 for success, non-zero for failure.
3951  */
3952 int
3953 mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
3954         Mpi2SasIoUnitControlReply_t *mpi_reply,
3955         Mpi2SasIoUnitControlRequest_t *mpi_request)
3956 {
3957         u16 smid;
3958         u32 ioc_state;
3959         unsigned long timeleft;
3960         bool issue_reset = false;
3961         int rc;
3962         void *request;
3963         u16 wait_state_count;
3964
3965         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3966             __func__));
3967
3968         mutex_lock(&ioc->base_cmds.mutex);
3969
3970         if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) {
3971                 pr_err(MPT3SAS_FMT "%s: base_cmd in use\n",
3972                     ioc->name, __func__);
3973                 rc = -EAGAIN;
3974                 goto out;
3975         }
3976
3977         wait_state_count = 0;
3978         ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
3979         while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3980                 if (wait_state_count++ == 10) {
3981                         pr_err(MPT3SAS_FMT
3982                             "%s: failed due to ioc not operational\n",
3983                             ioc->name, __func__);
3984                         rc = -EFAULT;
3985                         goto out;
3986                 }
3987                 ssleep(1);
3988                 ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
3989                 pr_info(MPT3SAS_FMT
3990                         "%s: waiting for operational state(count=%d)\n",
3991                         ioc->name, __func__, wait_state_count);
3992         }
3993
3994         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
3995         if (!smid) {
3996                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
3997                     ioc->name, __func__);
3998                 rc = -EAGAIN;
3999                 goto out;
4000         }
4001
4002         rc = 0;
4003         ioc->base_cmds.status = MPT3_CMD_PENDING;
4004         request = mpt3sas_base_get_msg_frame(ioc, smid);
4005         ioc->base_cmds.smid = smid;
4006         memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
4007         if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
4008             mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
4009                 ioc->ioc_link_reset_in_progress = 1;
4010         init_completion(&ioc->base_cmds.done);
4011         mpt3sas_base_put_smid_default(ioc, smid);
4012         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
4013             msecs_to_jiffies(10000));
4014         if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
4015             mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
4016             ioc->ioc_link_reset_in_progress)
4017                 ioc->ioc_link_reset_in_progress = 0;
4018         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4019                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4020                     ioc->name, __func__);
4021                 _debug_dump_mf(mpi_request,
4022                     sizeof(Mpi2SasIoUnitControlRequest_t)/4);
4023                 if (!(ioc->base_cmds.status & MPT3_CMD_RESET))
4024                         issue_reset = true;
4025                 goto issue_host_reset;
4026         }
4027         if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID)
4028                 memcpy(mpi_reply, ioc->base_cmds.reply,
4029                     sizeof(Mpi2SasIoUnitControlReply_t));
4030         else
4031                 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
4032         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4033         goto out;
4034
4035  issue_host_reset:
4036         if (issue_reset)
4037                 mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
4038                     FORCE_BIG_HAMMER);
4039         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4040         rc = -EFAULT;
4041  out:
4042         mutex_unlock(&ioc->base_cmds.mutex);
4043         return rc;
4044 }
4045
4046 /**
4047  * mpt3sas_base_scsi_enclosure_processor - sending request to sep device
4048  * @ioc: per adapter object
4049  * @mpi_reply: the reply payload from FW
4050  * @mpi_request: the request payload sent to FW
4051  *
4052  * The SCSI Enclosure Processor request message causes the IOC to
4053  * communicate with SES devices to control LED status signals.
4054  *
4055  * Returns 0 for success, non-zero for failure.
4056  */
4057 int
4058 mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
4059         Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
4060 {
4061         u16 smid;
4062         u32 ioc_state;
4063         unsigned long timeleft;
4064         bool issue_reset = false;
4065         int rc;
4066         void *request;
4067         u16 wait_state_count;
4068
4069         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4070             __func__));
4071
4072         mutex_lock(&ioc->base_cmds.mutex);
4073
4074         if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) {
4075                 pr_err(MPT3SAS_FMT "%s: base_cmd in use\n",
4076                     ioc->name, __func__);
4077                 rc = -EAGAIN;
4078                 goto out;
4079         }
4080
4081         wait_state_count = 0;
4082         ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
4083         while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
4084                 if (wait_state_count++ == 10) {
4085                         pr_err(MPT3SAS_FMT
4086                             "%s: failed due to ioc not operational\n",
4087                             ioc->name, __func__);
4088                         rc = -EFAULT;
4089                         goto out;
4090                 }
4091                 ssleep(1);
4092                 ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
4093                 pr_info(MPT3SAS_FMT
4094                         "%s: waiting for operational state(count=%d)\n",
4095                         ioc->name,
4096                     __func__, wait_state_count);
4097         }
4098
4099         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
4100         if (!smid) {
4101                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4102                     ioc->name, __func__);
4103                 rc = -EAGAIN;
4104                 goto out;
4105         }
4106
4107         rc = 0;
4108         ioc->base_cmds.status = MPT3_CMD_PENDING;
4109         request = mpt3sas_base_get_msg_frame(ioc, smid);
4110         ioc->base_cmds.smid = smid;
4111         memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
4112         init_completion(&ioc->base_cmds.done);
4113         mpt3sas_base_put_smid_default(ioc, smid);
4114         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
4115             msecs_to_jiffies(10000));
4116         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4117                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4118                     ioc->name, __func__);
4119                 _debug_dump_mf(mpi_request,
4120                     sizeof(Mpi2SepRequest_t)/4);
4121                 if (!(ioc->base_cmds.status & MPT3_CMD_RESET))
4122                         issue_reset = false;
4123                 goto issue_host_reset;
4124         }
4125         if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID)
4126                 memcpy(mpi_reply, ioc->base_cmds.reply,
4127                     sizeof(Mpi2SepReply_t));
4128         else
4129                 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
4130         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4131         goto out;
4132
4133  issue_host_reset:
4134         if (issue_reset)
4135                 mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
4136                     FORCE_BIG_HAMMER);
4137         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4138         rc = -EFAULT;
4139  out:
4140         mutex_unlock(&ioc->base_cmds.mutex);
4141         return rc;
4142 }
4143
4144 /**
4145  * _base_get_port_facts - obtain port facts reply and save in ioc
4146  * @ioc: per adapter object
4147  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4148  *
4149  * Returns 0 for success, non-zero for failure.
4150  */
4151 static int
4152 _base_get_port_facts(struct MPT3SAS_ADAPTER *ioc, int port, int sleep_flag)
4153 {
4154         Mpi2PortFactsRequest_t mpi_request;
4155         Mpi2PortFactsReply_t mpi_reply;
4156         struct mpt3sas_port_facts *pfacts;
4157         int mpi_reply_sz, mpi_request_sz, r;
4158
4159         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4160             __func__));
4161
4162         mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
4163         mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
4164         memset(&mpi_request, 0, mpi_request_sz);
4165         mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
4166         mpi_request.PortNumber = port;
4167         r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
4168             (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
4169
4170         if (r != 0) {
4171                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4172                     ioc->name, __func__, r);
4173                 return r;
4174         }
4175
4176         pfacts = &ioc->pfacts[port];
4177         memset(pfacts, 0, sizeof(struct mpt3sas_port_facts));
4178         pfacts->PortNumber = mpi_reply.PortNumber;
4179         pfacts->VP_ID = mpi_reply.VP_ID;
4180         pfacts->VF_ID = mpi_reply.VF_ID;
4181         pfacts->MaxPostedCmdBuffers =
4182             le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
4183
4184         return 0;
4185 }
4186
4187 /**
4188  * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL
4189  * @ioc: per adapter object
4190  * @timeout:
4191  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4192  *
4193  * Returns 0 for success, non-zero for failure.
4194  */
4195 static int
4196 _base_wait_for_iocstate(struct MPT3SAS_ADAPTER *ioc, int timeout,
4197         int sleep_flag)
4198 {
4199         u32 ioc_state;
4200         int rc;
4201
4202         dinitprintk(ioc, printk(MPT3SAS_FMT "%s\n", ioc->name,
4203             __func__));
4204
4205         if (ioc->pci_error_recovery) {
4206                 dfailprintk(ioc, printk(MPT3SAS_FMT
4207                     "%s: host in pci error recovery\n", ioc->name, __func__));
4208                 return -EFAULT;
4209         }
4210
4211         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4212         dhsprintk(ioc, printk(MPT3SAS_FMT "%s: ioc_state(0x%08x)\n",
4213             ioc->name, __func__, ioc_state));
4214
4215         if (((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) ||
4216             (ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4217                 return 0;
4218
4219         if (ioc_state & MPI2_DOORBELL_USED) {
4220                 dhsprintk(ioc, printk(MPT3SAS_FMT
4221                     "unexpected doorbell active!\n", ioc->name));
4222                 goto issue_diag_reset;
4223         }
4224
4225         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4226                 mpt3sas_base_fault_info(ioc, ioc_state &
4227                     MPI2_DOORBELL_DATA_MASK);
4228                 goto issue_diag_reset;
4229         }
4230
4231         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
4232             timeout, sleep_flag);
4233         if (ioc_state) {
4234                 dfailprintk(ioc, printk(MPT3SAS_FMT
4235                     "%s: failed going to ready state (ioc_state=0x%x)\n",
4236                     ioc->name, __func__, ioc_state));
4237                 return -EFAULT;
4238         }
4239
4240  issue_diag_reset:
4241         rc = _base_diag_reset(ioc, sleep_flag);
4242         return rc;
4243 }
4244
4245 /**
4246  * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
4247  * @ioc: per adapter object
4248  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4249  *
4250  * Returns 0 for success, non-zero for failure.
4251  */
4252 static int
4253 _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4254 {
4255         Mpi2IOCFactsRequest_t mpi_request;
4256         Mpi2IOCFactsReply_t mpi_reply;
4257         struct mpt3sas_facts *facts;
4258         int mpi_reply_sz, mpi_request_sz, r;
4259
4260         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4261             __func__));
4262
4263         r = _base_wait_for_iocstate(ioc, 10, sleep_flag);
4264         if (r) {
4265                 dfailprintk(ioc, printk(MPT3SAS_FMT
4266                     "%s: failed getting to correct state\n",
4267                     ioc->name, __func__));
4268                 return r;
4269         }
4270         mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
4271         mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
4272         memset(&mpi_request, 0, mpi_request_sz);
4273         mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
4274         r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
4275             (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
4276
4277         if (r != 0) {
4278                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4279                     ioc->name, __func__, r);
4280                 return r;
4281         }
4282
4283         facts = &ioc->facts;
4284         memset(facts, 0, sizeof(struct mpt3sas_facts));
4285         facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
4286         facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
4287         facts->VP_ID = mpi_reply.VP_ID;
4288         facts->VF_ID = mpi_reply.VF_ID;
4289         facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
4290         facts->MaxChainDepth = mpi_reply.MaxChainDepth;
4291         facts->WhoInit = mpi_reply.WhoInit;
4292         facts->NumberOfPorts = mpi_reply.NumberOfPorts;
4293         facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
4294         facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
4295         facts->MaxReplyDescriptorPostQueueDepth =
4296             le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
4297         facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
4298         facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
4299         if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
4300                 ioc->ir_firmware = 1;
4301         if ((facts->IOCCapabilities &
4302               MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE))
4303                 ioc->rdpq_array_capable = 1;
4304         facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
4305         facts->IOCRequestFrameSize =
4306             le16_to_cpu(mpi_reply.IOCRequestFrameSize);
4307         facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
4308         facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
4309         ioc->shost->max_id = -1;
4310         facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
4311         facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
4312         facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
4313         facts->HighPriorityCredit =
4314             le16_to_cpu(mpi_reply.HighPriorityCredit);
4315         facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
4316         facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
4317
4318         dinitprintk(ioc, pr_info(MPT3SAS_FMT
4319                 "hba queue depth(%d), max chains per io(%d)\n",
4320                 ioc->name, facts->RequestCredit,
4321             facts->MaxChainDepth));
4322         dinitprintk(ioc, pr_info(MPT3SAS_FMT
4323                 "request frame size(%d), reply frame size(%d)\n", ioc->name,
4324             facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
4325         return 0;
4326 }
4327
4328 /**
4329  * _base_send_ioc_init - send ioc_init to firmware
4330  * @ioc: per adapter object
4331  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4332  *
4333  * Returns 0 for success, non-zero for failure.
4334  */
4335 static int
4336 _base_send_ioc_init(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4337 {
4338         Mpi2IOCInitRequest_t mpi_request;
4339         Mpi2IOCInitReply_t mpi_reply;
4340         int i, r = 0;
4341         struct timeval current_time;
4342         u16 ioc_status;
4343         u32 reply_post_free_array_sz = 0;
4344         Mpi2IOCInitRDPQArrayEntry *reply_post_free_array = NULL;
4345         dma_addr_t reply_post_free_array_dma;
4346
4347         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4348             __func__));
4349
4350         memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
4351         mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
4352         mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
4353         mpi_request.VF_ID = 0; /* TODO */
4354         mpi_request.VP_ID = 0;
4355         mpi_request.MsgVersion = cpu_to_le16(ioc->hba_mpi_version_belonged);
4356         mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
4357
4358         if (_base_is_controller_msix_enabled(ioc))
4359                 mpi_request.HostMSIxVectors = ioc->reply_queue_count;
4360         mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
4361         mpi_request.ReplyDescriptorPostQueueDepth =
4362             cpu_to_le16(ioc->reply_post_queue_depth);
4363         mpi_request.ReplyFreeQueueDepth =
4364             cpu_to_le16(ioc->reply_free_queue_depth);
4365
4366         mpi_request.SenseBufferAddressHigh =
4367             cpu_to_le32((u64)ioc->sense_dma >> 32);
4368         mpi_request.SystemReplyAddressHigh =
4369             cpu_to_le32((u64)ioc->reply_dma >> 32);
4370         mpi_request.SystemRequestFrameBaseAddress =
4371             cpu_to_le64((u64)ioc->request_dma);
4372         mpi_request.ReplyFreeQueueAddress =
4373             cpu_to_le64((u64)ioc->reply_free_dma);
4374
4375         if (ioc->rdpq_array_enable) {
4376                 reply_post_free_array_sz = ioc->reply_queue_count *
4377                     sizeof(Mpi2IOCInitRDPQArrayEntry);
4378                 reply_post_free_array = pci_alloc_consistent(ioc->pdev,
4379                         reply_post_free_array_sz, &reply_post_free_array_dma);
4380                 if (!reply_post_free_array) {
4381                         pr_err(MPT3SAS_FMT
4382                         "reply_post_free_array: pci_alloc_consistent failed\n",
4383                         ioc->name);
4384                         r = -ENOMEM;
4385                         goto out;
4386                 }
4387                 memset(reply_post_free_array, 0, reply_post_free_array_sz);
4388                 for (i = 0; i < ioc->reply_queue_count; i++)
4389                         reply_post_free_array[i].RDPQBaseAddress =
4390                             cpu_to_le64(
4391                                 (u64)ioc->reply_post[i].reply_post_free_dma);
4392                 mpi_request.MsgFlags = MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE;
4393                 mpi_request.ReplyDescriptorPostQueueAddress =
4394                     cpu_to_le64((u64)reply_post_free_array_dma);
4395         } else {
4396                 mpi_request.ReplyDescriptorPostQueueAddress =
4397                     cpu_to_le64((u64)ioc->reply_post[0].reply_post_free_dma);
4398         }
4399
4400         /* This time stamp specifies number of milliseconds
4401          * since epoch ~ midnight January 1, 1970.
4402          */
4403         do_gettimeofday(&current_time);
4404         mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
4405             (current_time.tv_usec / 1000));
4406
4407         if (ioc->logging_level & MPT_DEBUG_INIT) {
4408                 __le32 *mfp;
4409                 int i;
4410
4411                 mfp = (__le32 *)&mpi_request;
4412                 pr_info("\toffset:data\n");
4413                 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
4414                         pr_info("\t[0x%02x]:%08x\n", i*4,
4415                             le32_to_cpu(mfp[i]));
4416         }
4417
4418         r = _base_handshake_req_reply_wait(ioc,
4419             sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
4420             sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
4421             sleep_flag);
4422
4423         if (r != 0) {
4424                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4425                     ioc->name, __func__, r);
4426                 goto out;
4427         }
4428
4429         ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
4430         if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
4431             mpi_reply.IOCLogInfo) {
4432                 pr_err(MPT3SAS_FMT "%s: failed\n", ioc->name, __func__);
4433                 r = -EIO;
4434         }
4435
4436 out:
4437         if (reply_post_free_array)
4438                 pci_free_consistent(ioc->pdev, reply_post_free_array_sz,
4439                                     reply_post_free_array,
4440                                     reply_post_free_array_dma);
4441         return r;
4442 }
4443
4444 /**
4445  * mpt3sas_port_enable_done - command completion routine for port enable
4446  * @ioc: per adapter object
4447  * @smid: system request message index
4448  * @msix_index: MSIX table index supplied by the OS
4449  * @reply: reply message frame(lower 32bit addr)
4450  *
4451  * Return 1 meaning mf should be freed from _base_interrupt
4452  *        0 means the mf is freed from this function.
4453  */
4454 u8
4455 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
4456         u32 reply)
4457 {
4458         MPI2DefaultReply_t *mpi_reply;
4459         u16 ioc_status;
4460
4461         if (ioc->port_enable_cmds.status == MPT3_CMD_NOT_USED)
4462                 return 1;
4463
4464         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
4465         if (!mpi_reply)
4466                 return 1;
4467
4468         if (mpi_reply->Function != MPI2_FUNCTION_PORT_ENABLE)
4469                 return 1;
4470
4471         ioc->port_enable_cmds.status &= ~MPT3_CMD_PENDING;
4472         ioc->port_enable_cmds.status |= MPT3_CMD_COMPLETE;
4473         ioc->port_enable_cmds.status |= MPT3_CMD_REPLY_VALID;
4474         memcpy(ioc->port_enable_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
4475         ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
4476         if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
4477                 ioc->port_enable_failed = 1;
4478
4479         if (ioc->is_driver_loading) {
4480                 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
4481                         mpt3sas_port_enable_complete(ioc);
4482                         return 1;
4483                 } else {
4484                         ioc->start_scan_failed = ioc_status;
4485                         ioc->start_scan = 0;
4486                         return 1;
4487                 }
4488         }
4489         complete(&ioc->port_enable_cmds.done);
4490         return 1;
4491 }
4492
4493 /**
4494  * _base_send_port_enable - send port_enable(discovery stuff) to firmware
4495  * @ioc: per adapter object
4496  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4497  *
4498  * Returns 0 for success, non-zero for failure.
4499  */
4500 static int
4501 _base_send_port_enable(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4502 {
4503         Mpi2PortEnableRequest_t *mpi_request;
4504         Mpi2PortEnableReply_t *mpi_reply;
4505         unsigned long timeleft;
4506         int r = 0;
4507         u16 smid;
4508         u16 ioc_status;
4509
4510         pr_info(MPT3SAS_FMT "sending port enable !!\n", ioc->name);
4511
4512         if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
4513                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4514                     ioc->name, __func__);
4515                 return -EAGAIN;
4516         }
4517
4518         smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
4519         if (!smid) {
4520                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4521                     ioc->name, __func__);
4522                 return -EAGAIN;
4523         }
4524
4525         ioc->port_enable_cmds.status = MPT3_CMD_PENDING;
4526         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4527         ioc->port_enable_cmds.smid = smid;
4528         memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
4529         mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
4530
4531         init_completion(&ioc->port_enable_cmds.done);
4532         mpt3sas_base_put_smid_default(ioc, smid);
4533         timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
4534             300*HZ);
4535         if (!(ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE)) {
4536                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4537                     ioc->name, __func__);
4538                 _debug_dump_mf(mpi_request,
4539                     sizeof(Mpi2PortEnableRequest_t)/4);
4540                 if (ioc->port_enable_cmds.status & MPT3_CMD_RESET)
4541                         r = -EFAULT;
4542                 else
4543                         r = -ETIME;
4544                 goto out;
4545         }
4546
4547         mpi_reply = ioc->port_enable_cmds.reply;
4548         ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
4549         if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
4550                 pr_err(MPT3SAS_FMT "%s: failed with (ioc_status=0x%08x)\n",
4551                     ioc->name, __func__, ioc_status);
4552                 r = -EFAULT;
4553                 goto out;
4554         }
4555
4556  out:
4557         ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED;
4558         pr_info(MPT3SAS_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
4559             "SUCCESS" : "FAILED"));
4560         return r;
4561 }
4562
4563 /**
4564  * mpt3sas_port_enable - initiate firmware discovery (don't wait for reply)
4565  * @ioc: per adapter object
4566  *
4567  * Returns 0 for success, non-zero for failure.
4568  */
4569 int
4570 mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc)
4571 {
4572         Mpi2PortEnableRequest_t *mpi_request;
4573         u16 smid;
4574
4575         pr_info(MPT3SAS_FMT "sending port enable !!\n", ioc->name);
4576
4577         if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
4578                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4579                     ioc->name, __func__);
4580                 return -EAGAIN;
4581         }
4582
4583         smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
4584         if (!smid) {
4585                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4586                     ioc->name, __func__);
4587                 return -EAGAIN;
4588         }
4589
4590         ioc->port_enable_cmds.status = MPT3_CMD_PENDING;
4591         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4592         ioc->port_enable_cmds.smid = smid;
4593         memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
4594         mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
4595
4596         mpt3sas_base_put_smid_default(ioc, smid);
4597         return 0;
4598 }
4599
4600 /**
4601  * _base_determine_wait_on_discovery - desposition
4602  * @ioc: per adapter object
4603  *
4604  * Decide whether to wait on discovery to complete. Used to either
4605  * locate boot device, or report volumes ahead of physical devices.
4606  *
4607  * Returns 1 for wait, 0 for don't wait
4608  */
4609 static int
4610 _base_determine_wait_on_discovery(struct MPT3SAS_ADAPTER *ioc)
4611 {
4612         /* We wait for discovery to complete if IR firmware is loaded.
4613          * The sas topology events arrive before PD events, so we need time to
4614          * turn on the bit in ioc->pd_handles to indicate PD
4615          * Also, it maybe required to report Volumes ahead of physical
4616          * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
4617          */
4618         if (ioc->ir_firmware)
4619                 return 1;
4620
4621         /* if no Bios, then we don't need to wait */
4622         if (!ioc->bios_pg3.BiosVersion)
4623                 return 0;
4624
4625         /* Bios is present, then we drop down here.
4626          *
4627          * If there any entries in the Bios Page 2, then we wait
4628          * for discovery to complete.
4629          */
4630
4631         /* Current Boot Device */
4632         if ((ioc->bios_pg2.CurrentBootDeviceForm &
4633             MPI2_BIOSPAGE2_FORM_MASK) ==
4634             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
4635         /* Request Boot Device */
4636            (ioc->bios_pg2.ReqBootDeviceForm &
4637             MPI2_BIOSPAGE2_FORM_MASK) ==
4638             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
4639         /* Alternate Request Boot Device */
4640            (ioc->bios_pg2.ReqAltBootDeviceForm &
4641             MPI2_BIOSPAGE2_FORM_MASK) ==
4642             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
4643                 return 0;
4644
4645         return 1;
4646 }
4647
4648 /**
4649  * _base_unmask_events - turn on notification for this event
4650  * @ioc: per adapter object
4651  * @event: firmware event
4652  *
4653  * The mask is stored in ioc->event_masks.
4654  */
4655 static void
4656 _base_unmask_events(struct MPT3SAS_ADAPTER *ioc, u16 event)
4657 {
4658         u32 desired_event;
4659
4660         if (event >= 128)
4661                 return;
4662
4663         desired_event = (1 << (event % 32));
4664
4665         if (event < 32)
4666                 ioc->event_masks[0] &= ~desired_event;
4667         else if (event < 64)
4668                 ioc->event_masks[1] &= ~desired_event;
4669         else if (event < 96)
4670                 ioc->event_masks[2] &= ~desired_event;
4671         else if (event < 128)
4672                 ioc->event_masks[3] &= ~desired_event;
4673 }
4674
4675 /**
4676  * _base_event_notification - send event notification
4677  * @ioc: per adapter object
4678  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4679  *
4680  * Returns 0 for success, non-zero for failure.
4681  */
4682 static int
4683 _base_event_notification(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4684 {
4685         Mpi2EventNotificationRequest_t *mpi_request;
4686         unsigned long timeleft;
4687         u16 smid;
4688         int r = 0;
4689         int i;
4690
4691         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4692             __func__));
4693
4694         if (ioc->base_cmds.status & MPT3_CMD_PENDING) {
4695                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4696                     ioc->name, __func__);
4697                 return -EAGAIN;
4698         }
4699
4700         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
4701         if (!smid) {
4702                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4703                     ioc->name, __func__);
4704                 return -EAGAIN;
4705         }
4706         ioc->base_cmds.status = MPT3_CMD_PENDING;
4707         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4708         ioc->base_cmds.smid = smid;
4709         memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
4710         mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
4711         mpi_request->VF_ID = 0; /* TODO */
4712         mpi_request->VP_ID = 0;
4713         for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
4714                 mpi_request->EventMasks[i] =
4715                     cpu_to_le32(ioc->event_masks[i]);
4716         init_completion(&ioc->base_cmds.done);
4717         mpt3sas_base_put_smid_default(ioc, smid);
4718         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
4719         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4720                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4721                     ioc->name, __func__);
4722                 _debug_dump_mf(mpi_request,
4723                     sizeof(Mpi2EventNotificationRequest_t)/4);
4724                 if (ioc->base_cmds.status & MPT3_CMD_RESET)
4725                         r = -EFAULT;
4726                 else
4727                         r = -ETIME;
4728         } else
4729                 dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s: complete\n",
4730                     ioc->name, __func__));
4731         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4732         return r;
4733 }
4734
4735 /**
4736  * mpt3sas_base_validate_event_type - validating event types
4737  * @ioc: per adapter object
4738  * @event: firmware event
4739  *
4740  * This will turn on firmware event notification when application
4741  * ask for that event. We don't mask events that are already enabled.
4742  */
4743 void
4744 mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, u32 *event_type)
4745 {
4746         int i, j;
4747         u32 event_mask, desired_event;
4748         u8 send_update_to_fw;
4749
4750         for (i = 0, send_update_to_fw = 0; i <
4751             MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
4752                 event_mask = ~event_type[i];
4753                 desired_event = 1;
4754                 for (j = 0; j < 32; j++) {
4755                         if (!(event_mask & desired_event) &&
4756                             (ioc->event_masks[i] & desired_event)) {
4757                                 ioc->event_masks[i] &= ~desired_event;
4758                                 send_update_to_fw = 1;
4759                         }
4760                         desired_event = (desired_event << 1);
4761                 }
4762         }
4763
4764         if (!send_update_to_fw)
4765                 return;
4766
4767         mutex_lock(&ioc->base_cmds.mutex);
4768         _base_event_notification(ioc, CAN_SLEEP);
4769         mutex_unlock(&ioc->base_cmds.mutex);
4770 }
4771
4772 /**
4773  * _base_diag_reset - the "big hammer" start of day reset
4774  * @ioc: per adapter object
4775  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4776  *
4777  * Returns 0 for success, non-zero for failure.
4778  */
4779 static int
4780 _base_diag_reset(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4781 {
4782         u32 host_diagnostic;
4783         u32 ioc_state;
4784         u32 count;
4785         u32 hcb_size;
4786
4787         pr_info(MPT3SAS_FMT "sending diag reset !!\n", ioc->name);
4788
4789         drsprintk(ioc, pr_info(MPT3SAS_FMT "clear interrupts\n",
4790             ioc->name));
4791
4792         count = 0;
4793         do {
4794                 /* Write magic sequence to WriteSequence register
4795                  * Loop until in diagnostic mode
4796                  */
4797                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4798                         "write magic sequence\n", ioc->name));
4799                 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
4800                 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
4801                 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
4802                 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
4803                 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
4804                 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
4805                 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
4806
4807                 /* wait 100 msec */
4808                 if (sleep_flag == CAN_SLEEP)
4809                         msleep(100);
4810                 else
4811                         mdelay(100);
4812
4813                 if (count++ > 20)
4814                         goto out;
4815
4816                 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
4817                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4818                         "wrote magic sequence: count(%d), host_diagnostic(0x%08x)\n",
4819                     ioc->name, count, host_diagnostic));
4820
4821         } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
4822
4823         hcb_size = readl(&ioc->chip->HCBSize);
4824
4825         drsprintk(ioc, pr_info(MPT3SAS_FMT "diag reset: issued\n",
4826             ioc->name));
4827         writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
4828              &ioc->chip->HostDiagnostic);
4829
4830         /*This delay allows the chip PCIe hardware time to finish reset tasks*/
4831         if (sleep_flag == CAN_SLEEP)
4832                 msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
4833         else
4834                 mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
4835
4836         /* Approximately 300 second max wait */
4837         for (count = 0; count < (300000000 /
4838                 MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
4839
4840                 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
4841
4842                 if (host_diagnostic == 0xFFFFFFFF)
4843                         goto out;
4844                 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
4845                         break;
4846
4847                 /* Wait to pass the second read delay window */
4848                 if (sleep_flag == CAN_SLEEP)
4849                         msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4850                                                                 / 1000);
4851                 else
4852                         mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4853                                                                 / 1000);
4854         }
4855
4856         if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
4857
4858                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4859                 "restart the adapter assuming the HCB Address points to good F/W\n",
4860                     ioc->name));
4861                 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
4862                 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
4863                 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
4864
4865                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4866                     "re-enable the HCDW\n", ioc->name));
4867                 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
4868                     &ioc->chip->HCBSize);
4869         }
4870
4871         drsprintk(ioc, pr_info(MPT3SAS_FMT "restart the adapter\n",
4872             ioc->name));
4873         writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
4874             &ioc->chip->HostDiagnostic);
4875
4876         drsprintk(ioc, pr_info(MPT3SAS_FMT
4877                 "disable writes to the diagnostic register\n", ioc->name));
4878         writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
4879
4880         drsprintk(ioc, pr_info(MPT3SAS_FMT
4881                 "Wait for FW to go to the READY state\n", ioc->name));
4882         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
4883             sleep_flag);
4884         if (ioc_state) {
4885                 pr_err(MPT3SAS_FMT
4886                         "%s: failed going to ready state (ioc_state=0x%x)\n",
4887                         ioc->name, __func__, ioc_state);
4888                 goto out;
4889         }
4890
4891         pr_info(MPT3SAS_FMT "diag reset: SUCCESS\n", ioc->name);
4892         return 0;
4893
4894  out:
4895         pr_err(MPT3SAS_FMT "diag reset: FAILED\n", ioc->name);
4896         return -EFAULT;
4897 }
4898
4899 /**
4900  * _base_make_ioc_ready - put controller in READY state
4901  * @ioc: per adapter object
4902  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4903  * @type: FORCE_BIG_HAMMER or SOFT_RESET
4904  *
4905  * Returns 0 for success, non-zero for failure.
4906  */
4907 static int
4908 _base_make_ioc_ready(struct MPT3SAS_ADAPTER *ioc, int sleep_flag,
4909         enum reset_type type)
4910 {
4911         u32 ioc_state;
4912         int rc;
4913         int count;
4914
4915         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4916             __func__));
4917
4918         if (ioc->pci_error_recovery)
4919                 return 0;
4920
4921         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4922         dhsprintk(ioc, pr_info(MPT3SAS_FMT "%s: ioc_state(0x%08x)\n",
4923             ioc->name, __func__, ioc_state));
4924
4925         /* if in RESET state, it should move to READY state shortly */
4926         count = 0;
4927         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_RESET) {
4928                 while ((ioc_state & MPI2_IOC_STATE_MASK) !=
4929                     MPI2_IOC_STATE_READY) {
4930                         if (count++ == 10) {
4931                                 pr_err(MPT3SAS_FMT
4932                                         "%s: failed going to ready state (ioc_state=0x%x)\n",
4933                                     ioc->name, __func__, ioc_state);
4934                                 return -EFAULT;
4935                         }
4936                         if (sleep_flag == CAN_SLEEP)
4937                                 ssleep(1);
4938                         else
4939                                 mdelay(1000);
4940                         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4941                 }
4942         }
4943
4944         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
4945                 return 0;
4946
4947         if (ioc_state & MPI2_DOORBELL_USED) {
4948                 dhsprintk(ioc, pr_info(MPT3SAS_FMT
4949                         "unexpected doorbell active!\n",
4950                         ioc->name));
4951                 goto issue_diag_reset;
4952         }
4953
4954         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4955                 mpt3sas_base_fault_info(ioc, ioc_state &
4956                     MPI2_DOORBELL_DATA_MASK);
4957                 goto issue_diag_reset;
4958         }
4959
4960         if (type == FORCE_BIG_HAMMER)
4961                 goto issue_diag_reset;
4962
4963         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4964                 if (!(_base_send_ioc_reset(ioc,
4965                     MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
4966                         return 0;
4967         }
4968
4969  issue_diag_reset:
4970         rc = _base_diag_reset(ioc, CAN_SLEEP);
4971         return rc;
4972 }
4973
4974 /**
4975  * _base_make_ioc_operational - put controller in OPERATIONAL state
4976  * @ioc: per adapter object
4977  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4978  *
4979  * Returns 0 for success, non-zero for failure.
4980  */
4981 static int
4982 _base_make_ioc_operational(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4983 {
4984         int r, i;
4985         unsigned long   flags;
4986         u32 reply_address;
4987         u16 smid;
4988         struct _tr_list *delayed_tr, *delayed_tr_next;
4989         u8 hide_flag;
4990         struct adapter_reply_queue *reply_q;
4991         long reply_post_free;
4992         u32 reply_post_free_sz, index = 0;
4993
4994         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4995             __func__));
4996
4997         /* clean the delayed target reset list */
4998         list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4999             &ioc->delayed_tr_list, list) {
5000                 list_del(&delayed_tr->list);
5001                 kfree(delayed_tr);
5002         }
5003
5004
5005         list_for_each_entry_safe(delayed_tr, delayed_tr_next,
5006             &ioc->delayed_tr_volume_list, list) {
5007                 list_del(&delayed_tr->list);
5008                 kfree(delayed_tr);
5009         }
5010
5011         /* initialize the scsi lookup free list */
5012         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
5013         INIT_LIST_HEAD(&ioc->free_list);
5014         smid = 1;
5015         for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
5016                 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
5017                 ioc->scsi_lookup[i].cb_idx = 0xFF;
5018                 ioc->scsi_lookup[i].smid = smid;
5019                 ioc->scsi_lookup[i].scmd = NULL;
5020                 ioc->scsi_lookup[i].direct_io = 0;
5021                 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
5022                     &ioc->free_list);
5023         }
5024
5025         /* hi-priority queue */
5026         INIT_LIST_HEAD(&ioc->hpr_free_list);
5027         smid = ioc->hi_priority_smid;
5028         for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
5029                 ioc->hpr_lookup[i].cb_idx = 0xFF;
5030                 ioc->hpr_lookup[i].smid = smid;
5031                 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
5032                     &ioc->hpr_free_list);
5033         }
5034
5035         /* internal queue */
5036         INIT_LIST_HEAD(&ioc->internal_free_list);
5037         smid = ioc->internal_smid;
5038         for (i = 0; i < ioc->internal_depth; i++, smid++) {
5039                 ioc->internal_lookup[i].cb_idx = 0xFF;
5040                 ioc->internal_lookup[i].smid = smid;
5041                 list_add_tail(&ioc->internal_lookup[i].tracker_list,
5042                     &ioc->internal_free_list);
5043         }
5044
5045         /* chain pool */
5046         INIT_LIST_HEAD(&ioc->free_chain_list);
5047         for (i = 0; i < ioc->chain_depth; i++)
5048                 list_add_tail(&ioc->chain_lookup[i].tracker_list,
5049                     &ioc->free_chain_list);
5050
5051         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
5052
5053         /* initialize Reply Free Queue */
5054         for (i = 0, reply_address = (u32)ioc->reply_dma ;
5055             i < ioc->reply_free_queue_depth ; i++, reply_address +=
5056             ioc->reply_sz)
5057                 ioc->reply_free[i] = cpu_to_le32(reply_address);
5058
5059         /* initialize reply queues */
5060         if (ioc->is_driver_loading)
5061                 _base_assign_reply_queues(ioc);
5062
5063         /* initialize Reply Post Free Queue */
5064         reply_post_free_sz = ioc->reply_post_queue_depth *
5065             sizeof(Mpi2DefaultReplyDescriptor_t);
5066         reply_post_free = (long)ioc->reply_post[index].reply_post_free;
5067         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
5068                 reply_q->reply_post_host_index = 0;
5069                 reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
5070                     reply_post_free;
5071                 for (i = 0; i < ioc->reply_post_queue_depth; i++)
5072                         reply_q->reply_post_free[i].Words =
5073                             cpu_to_le64(ULLONG_MAX);
5074                 if (!_base_is_controller_msix_enabled(ioc))
5075                         goto skip_init_reply_post_free_queue;
5076                 /*
5077                  * If RDPQ is enabled, switch to the next allocation.
5078                  * Otherwise advance within the contiguous region.
5079                  */
5080                 if (ioc->rdpq_array_enable)
5081                         reply_post_free = (long)
5082                             ioc->reply_post[++index].reply_post_free;
5083                 else
5084                         reply_post_free += reply_post_free_sz;
5085         }
5086  skip_init_reply_post_free_queue:
5087
5088         r = _base_send_ioc_init(ioc, sleep_flag);
5089         if (r)
5090                 return r;
5091
5092         /* initialize reply free host index */
5093         ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
5094         writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
5095
5096         /* initialize reply post host index */
5097         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
5098                 if (ioc->msix96_vector)
5099                         writel((reply_q->msix_index & 7)<<
5100                            MPI2_RPHI_MSIX_INDEX_SHIFT,
5101                            ioc->replyPostRegisterIndex[reply_q->msix_index/8]);
5102                 else
5103                         writel(reply_q->msix_index <<
5104                                 MPI2_RPHI_MSIX_INDEX_SHIFT,
5105                                 &ioc->chip->ReplyPostHostIndex);
5106
5107                 if (!_base_is_controller_msix_enabled(ioc))
5108                         goto skip_init_reply_post_host_index;
5109         }
5110
5111  skip_init_reply_post_host_index:
5112
5113         _base_unmask_interrupts(ioc);
5114         r = _base_event_notification(ioc, sleep_flag);
5115         if (r)
5116                 return r;
5117
5118         if (sleep_flag == CAN_SLEEP)
5119                 _base_static_config_pages(ioc);
5120
5121
5122         if (ioc->is_driver_loading) {
5123
5124                 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
5125                     == 0x80) {
5126                         hide_flag = (u8) (
5127                             le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) &
5128                             MFG_PAGE10_HIDE_SSDS_MASK);
5129                         if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
5130                                 ioc->mfg_pg10_hide_flag = hide_flag;
5131                 }
5132
5133                 ioc->wait_for_discovery_to_complete =
5134                     _base_determine_wait_on_discovery(ioc);
5135
5136                 return r; /* scan_start and scan_finished support */
5137         }
5138
5139         r = _base_send_port_enable(ioc, sleep_flag);
5140         if (r)
5141                 return r;
5142
5143         return r;
5144 }
5145
5146 /**
5147  * mpt3sas_base_free_resources - free resources controller resources
5148  * @ioc: per adapter object
5149  *
5150  * Return nothing.
5151  */
5152 void
5153 mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc)
5154 {
5155         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5156             __func__));
5157
5158         /* synchronizing freeing resource with pci_access_mutex lock */
5159         mutex_lock(&ioc->pci_access_mutex);
5160         if (ioc->chip_phys && ioc->chip) {
5161                 _base_mask_interrupts(ioc);
5162                 ioc->shost_recovery = 1;
5163                 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
5164                 ioc->shost_recovery = 0;
5165         }
5166
5167         mpt3sas_base_unmap_resources(ioc);
5168         mutex_unlock(&ioc->pci_access_mutex);
5169         return;
5170 }
5171
5172 /**
5173  * mpt3sas_base_attach - attach controller instance
5174  * @ioc: per adapter object
5175  *
5176  * Returns 0 for success, non-zero for failure.
5177  */
5178 int
5179 mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc)
5180 {
5181         int r, i;
5182         int cpu_id, last_cpu_id = 0;
5183
5184         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5185             __func__));
5186
5187         /* setup cpu_msix_table */
5188         ioc->cpu_count = num_online_cpus();
5189         for_each_online_cpu(cpu_id)
5190                 last_cpu_id = cpu_id;
5191         ioc->cpu_msix_table_sz = last_cpu_id + 1;
5192         ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
5193         ioc->reply_queue_count = 1;
5194         if (!ioc->cpu_msix_table) {
5195                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
5196                         "allocation for cpu_msix_table failed!!!\n",
5197                         ioc->name));
5198                 r = -ENOMEM;
5199                 goto out_free_resources;
5200         }
5201
5202         if (ioc->is_warpdrive) {
5203                 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
5204                     sizeof(resource_size_t *), GFP_KERNEL);
5205                 if (!ioc->reply_post_host_index) {
5206                         dfailprintk(ioc, pr_info(MPT3SAS_FMT "allocation "
5207                                 "for cpu_msix_table failed!!!\n", ioc->name));
5208                         r = -ENOMEM;
5209                         goto out_free_resources;
5210                 }
5211         }
5212
5213         ioc->rdpq_array_enable_assigned = 0;
5214         ioc->dma_mask = 0;
5215         r = mpt3sas_base_map_resources(ioc);
5216         if (r)
5217                 goto out_free_resources;
5218
5219         pci_set_drvdata(ioc->pdev, ioc->shost);
5220         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
5221         if (r)
5222                 goto out_free_resources;
5223
5224         switch (ioc->hba_mpi_version_belonged) {
5225         case MPI2_VERSION:
5226                 ioc->build_sg_scmd = &_base_build_sg_scmd;
5227                 ioc->build_sg = &_base_build_sg;
5228                 ioc->build_zero_len_sge = &_base_build_zero_len_sge;
5229                 break;
5230         case MPI25_VERSION:
5231                 /*
5232                  * In SAS3.0,
5233                  * SCSI_IO, SMP_PASSTHRU, SATA_PASSTHRU, Target Assist, and
5234                  * Target Status - all require the IEEE formated scatter gather
5235                  * elements.
5236                  */
5237                 ioc->build_sg_scmd = &_base_build_sg_scmd_ieee;
5238                 ioc->build_sg = &_base_build_sg_ieee;
5239                 ioc->build_zero_len_sge = &_base_build_zero_len_sge_ieee;
5240                 ioc->sge_size_ieee = sizeof(Mpi2IeeeSgeSimple64_t);
5241                 break;
5242         }
5243
5244         /*
5245          * These function pointers for other requests that don't
5246          * the require IEEE scatter gather elements.
5247          *
5248          * For example Configuration Pages and SAS IOUNIT Control don't.
5249          */
5250         ioc->build_sg_mpi = &_base_build_sg;
5251         ioc->build_zero_len_sge_mpi = &_base_build_zero_len_sge;
5252
5253         r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
5254         if (r)
5255                 goto out_free_resources;
5256
5257         ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
5258             sizeof(struct mpt3sas_port_facts), GFP_KERNEL);
5259         if (!ioc->pfacts) {
5260                 r = -ENOMEM;
5261                 goto out_free_resources;
5262         }
5263
5264         for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
5265                 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
5266                 if (r)
5267                         goto out_free_resources;
5268         }
5269
5270         r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
5271         if (r)
5272                 goto out_free_resources;
5273
5274         init_waitqueue_head(&ioc->reset_wq);
5275
5276         /* allocate memory pd handle bitmask list */
5277         ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
5278         if (ioc->facts.MaxDevHandle % 8)
5279                 ioc->pd_handles_sz++;
5280         ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
5281             GFP_KERNEL);
5282         if (!ioc->pd_handles) {
5283                 r = -ENOMEM;
5284                 goto out_free_resources;
5285         }
5286         ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
5287             GFP_KERNEL);
5288         if (!ioc->blocking_handles) {
5289                 r = -ENOMEM;
5290                 goto out_free_resources;
5291         }
5292
5293         ioc->fwfault_debug = mpt3sas_fwfault_debug;
5294
5295         /* base internal command bits */
5296         mutex_init(&ioc->base_cmds.mutex);
5297         ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5298         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
5299
5300         /* port_enable command bits */
5301         ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5302         ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED;
5303
5304         /* transport internal command bits */
5305         ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5306         ioc->transport_cmds.status = MPT3_CMD_NOT_USED;
5307         mutex_init(&ioc->transport_cmds.mutex);
5308
5309         /* scsih internal command bits */
5310         ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5311         ioc->scsih_cmds.status = MPT3_CMD_NOT_USED;
5312         mutex_init(&ioc->scsih_cmds.mutex);
5313
5314         /* task management internal command bits */
5315         ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5316         ioc->tm_cmds.status = MPT3_CMD_NOT_USED;
5317         mutex_init(&ioc->tm_cmds.mutex);
5318
5319         /* config page internal command bits */
5320         ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5321         ioc->config_cmds.status = MPT3_CMD_NOT_USED;
5322         mutex_init(&ioc->config_cmds.mutex);
5323
5324         /* ctl module internal command bits */
5325         ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5326         ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
5327         ioc->ctl_cmds.status = MPT3_CMD_NOT_USED;
5328         mutex_init(&ioc->ctl_cmds.mutex);
5329
5330         if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
5331             !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
5332             !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
5333             !ioc->ctl_cmds.sense) {
5334                 r = -ENOMEM;
5335                 goto out_free_resources;
5336         }
5337
5338         for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
5339                 ioc->event_masks[i] = -1;
5340
5341         /* here we enable the events we care about */
5342         _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
5343         _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
5344         _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
5345         _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
5346         _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
5347         _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
5348         _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
5349         _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
5350         _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
5351         _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
5352         _base_unmask_events(ioc, MPI2_EVENT_TEMP_THRESHOLD);
5353
5354         r = _base_make_ioc_operational(ioc, CAN_SLEEP);
5355         if (r)
5356                 goto out_free_resources;
5357
5358         ioc->non_operational_loop = 0;
5359         return 0;
5360
5361  out_free_resources:
5362
5363         ioc->remove_host = 1;
5364
5365         mpt3sas_base_free_resources(ioc);
5366         _base_release_memory_pools(ioc);
5367         pci_set_drvdata(ioc->pdev, NULL);
5368         kfree(ioc->cpu_msix_table);
5369         if (ioc->is_warpdrive)
5370                 kfree(ioc->reply_post_host_index);
5371         kfree(ioc->pd_handles);
5372         kfree(ioc->blocking_handles);
5373         kfree(ioc->tm_cmds.reply);
5374         kfree(ioc->transport_cmds.reply);
5375         kfree(ioc->scsih_cmds.reply);
5376         kfree(ioc->config_cmds.reply);
5377         kfree(ioc->base_cmds.reply);
5378         kfree(ioc->port_enable_cmds.reply);
5379         kfree(ioc->ctl_cmds.reply);
5380         kfree(ioc->ctl_cmds.sense);
5381         kfree(ioc->pfacts);
5382         ioc->ctl_cmds.reply = NULL;
5383         ioc->base_cmds.reply = NULL;
5384         ioc->tm_cmds.reply = NULL;
5385         ioc->scsih_cmds.reply = NULL;
5386         ioc->transport_cmds.reply = NULL;
5387         ioc->config_cmds.reply = NULL;
5388         ioc->pfacts = NULL;
5389         return r;
5390 }
5391
5392
5393 /**
5394  * mpt3sas_base_detach - remove controller instance
5395  * @ioc: per adapter object
5396  *
5397  * Return nothing.
5398  */
5399 void
5400 mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc)
5401 {
5402         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5403             __func__));
5404
5405         mpt3sas_base_stop_watchdog(ioc);
5406         mpt3sas_base_free_resources(ioc);
5407         _base_release_memory_pools(ioc);
5408         pci_set_drvdata(ioc->pdev, NULL);
5409         kfree(ioc->cpu_msix_table);
5410         if (ioc->is_warpdrive)
5411                 kfree(ioc->reply_post_host_index);
5412         kfree(ioc->pd_handles);
5413         kfree(ioc->blocking_handles);
5414         kfree(ioc->pfacts);
5415         kfree(ioc->ctl_cmds.reply);
5416         kfree(ioc->ctl_cmds.sense);
5417         kfree(ioc->base_cmds.reply);
5418         kfree(ioc->port_enable_cmds.reply);
5419         kfree(ioc->tm_cmds.reply);
5420         kfree(ioc->transport_cmds.reply);
5421         kfree(ioc->scsih_cmds.reply);
5422         kfree(ioc->config_cmds.reply);
5423 }
5424
5425 /**
5426  * _base_reset_handler - reset callback handler (for base)
5427  * @ioc: per adapter object
5428  * @reset_phase: phase
5429  *
5430  * The handler for doing any required cleanup or initialization.
5431  *
5432  * The reset phase can be MPT3_IOC_PRE_RESET, MPT3_IOC_AFTER_RESET,
5433  * MPT3_IOC_DONE_RESET
5434  *
5435  * Return nothing.
5436  */
5437 static void
5438 _base_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase)
5439 {
5440         mpt3sas_scsih_reset_handler(ioc, reset_phase);
5441         mpt3sas_ctl_reset_handler(ioc, reset_phase);
5442         switch (reset_phase) {
5443         case MPT3_IOC_PRE_RESET:
5444                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5445                 "%s: MPT3_IOC_PRE_RESET\n", ioc->name, __func__));
5446                 break;
5447         case MPT3_IOC_AFTER_RESET:
5448                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5449                 "%s: MPT3_IOC_AFTER_RESET\n", ioc->name, __func__));
5450                 if (ioc->transport_cmds.status & MPT3_CMD_PENDING) {
5451                         ioc->transport_cmds.status |= MPT3_CMD_RESET;
5452                         mpt3sas_base_free_smid(ioc, ioc->transport_cmds.smid);
5453                         complete(&ioc->transport_cmds.done);
5454                 }
5455                 if (ioc->base_cmds.status & MPT3_CMD_PENDING) {
5456                         ioc->base_cmds.status |= MPT3_CMD_RESET;
5457                         mpt3sas_base_free_smid(ioc, ioc->base_cmds.smid);
5458                         complete(&ioc->base_cmds.done);
5459                 }
5460                 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
5461                         ioc->port_enable_failed = 1;
5462                         ioc->port_enable_cmds.status |= MPT3_CMD_RESET;
5463                         mpt3sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
5464                         if (ioc->is_driver_loading) {
5465                                 ioc->start_scan_failed =
5466                                     MPI2_IOCSTATUS_INTERNAL_ERROR;
5467                                 ioc->start_scan = 0;
5468                                 ioc->port_enable_cmds.status =
5469                                     MPT3_CMD_NOT_USED;
5470                         } else
5471                                 complete(&ioc->port_enable_cmds.done);
5472                 }
5473                 if (ioc->config_cmds.status & MPT3_CMD_PENDING) {
5474                         ioc->config_cmds.status |= MPT3_CMD_RESET;
5475                         mpt3sas_base_free_smid(ioc, ioc->config_cmds.smid);
5476                         ioc->config_cmds.smid = USHRT_MAX;
5477                         complete(&ioc->config_cmds.done);
5478                 }
5479                 break;
5480         case MPT3_IOC_DONE_RESET:
5481                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5482                         "%s: MPT3_IOC_DONE_RESET\n", ioc->name, __func__));
5483                 break;
5484         }
5485 }
5486
5487 /**
5488  * _wait_for_commands_to_complete - reset controller
5489  * @ioc: Pointer to MPT_ADAPTER structure
5490  * @sleep_flag: CAN_SLEEP or NO_SLEEP
5491  *
5492  * This function waiting(3s) for all pending commands to complete
5493  * prior to putting controller in reset.
5494  */
5495 static void
5496 _wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
5497 {
5498         u32 ioc_state;
5499         unsigned long flags;
5500         u16 i;
5501
5502         ioc->pending_io_count = 0;
5503         if (sleep_flag != CAN_SLEEP)
5504                 return;
5505
5506         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
5507         if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
5508                 return;
5509
5510         /* pending command count */
5511         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
5512         for (i = 0; i < ioc->scsiio_depth; i++)
5513                 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
5514                         ioc->pending_io_count++;
5515         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
5516
5517         if (!ioc->pending_io_count)
5518                 return;
5519
5520         /* wait for pending commands to complete */
5521         wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
5522 }
5523
5524 /**
5525  * mpt3sas_base_hard_reset_handler - reset controller
5526  * @ioc: Pointer to MPT_ADAPTER structure
5527  * @sleep_flag: CAN_SLEEP or NO_SLEEP
5528  * @type: FORCE_BIG_HAMMER or SOFT_RESET
5529  *
5530  * Returns 0 for success, non-zero for failure.
5531  */
5532 int
5533 mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, int sleep_flag,
5534         enum reset_type type)
5535 {
5536         int r;
5537         unsigned long flags;
5538         u32 ioc_state;
5539         u8 is_fault = 0, is_trigger = 0;
5540
5541         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: enter\n", ioc->name,
5542             __func__));
5543
5544         if (ioc->pci_error_recovery) {
5545                 pr_err(MPT3SAS_FMT "%s: pci error recovery reset\n",
5546                     ioc->name, __func__);
5547                 r = 0;
5548                 goto out_unlocked;
5549         }
5550
5551         if (mpt3sas_fwfault_debug)
5552                 mpt3sas_halt_firmware(ioc);
5553
5554         /* TODO - What we really should be doing is pulling
5555          * out all the code associated with NO_SLEEP; its never used.
5556          * That is legacy code from mpt fusion driver, ported over.
5557          * I will leave this BUG_ON here for now till its been resolved.
5558          */
5559         BUG_ON(sleep_flag == NO_SLEEP);
5560
5561         /* wait for an active reset in progress to complete */
5562         if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
5563                 do {
5564                         ssleep(1);
5565                 } while (ioc->shost_recovery == 1);
5566                 dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
5567                     __func__));
5568                 return ioc->ioc_reset_in_progress_status;
5569         }
5570
5571         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
5572         ioc->shost_recovery = 1;
5573         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
5574
5575         if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
5576             MPT3_DIAG_BUFFER_IS_REGISTERED) &&
5577             (!(ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
5578             MPT3_DIAG_BUFFER_IS_RELEASED))) {
5579                 is_trigger = 1;
5580                 ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
5581                 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
5582                         is_fault = 1;
5583         }
5584         _base_reset_handler(ioc, MPT3_IOC_PRE_RESET);
5585         _wait_for_commands_to_complete(ioc, sleep_flag);
5586         _base_mask_interrupts(ioc);
5587         r = _base_make_ioc_ready(ioc, sleep_flag, type);
5588         if (r)
5589                 goto out;
5590         _base_reset_handler(ioc, MPT3_IOC_AFTER_RESET);
5591
5592         /* If this hard reset is called while port enable is active, then
5593          * there is no reason to call make_ioc_operational
5594          */
5595         if (ioc->is_driver_loading && ioc->port_enable_failed) {
5596                 ioc->remove_host = 1;
5597                 r = -EFAULT;
5598                 goto out;
5599         }
5600         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
5601         if (r)
5602                 goto out;
5603
5604         if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable)
5605                 panic("%s: Issue occurred with flashing controller firmware."
5606                       "Please reboot the system and ensure that the correct"
5607                       " firmware version is running\n", ioc->name);
5608
5609         r = _base_make_ioc_operational(ioc, sleep_flag);
5610         if (!r)
5611                 _base_reset_handler(ioc, MPT3_IOC_DONE_RESET);
5612
5613  out:
5614         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: %s\n",
5615             ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
5616
5617         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
5618         ioc->ioc_reset_in_progress_status = r;
5619         ioc->shost_recovery = 0;
5620         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
5621         ioc->ioc_reset_count++;
5622         mutex_unlock(&ioc->reset_in_progress_mutex);
5623
5624  out_unlocked:
5625         if ((r == 0) && is_trigger) {
5626                 if (is_fault)
5627                         mpt3sas_trigger_master(ioc, MASTER_TRIGGER_FW_FAULT);
5628                 else
5629                         mpt3sas_trigger_master(ioc,
5630                             MASTER_TRIGGER_ADAPTER_RESET);
5631         }
5632         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
5633             __func__));
5634         return r;
5635 }