Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / drivers / scsi / aacraid / aacraid.h
1 #ifndef dprintk
2 # define dprintk(x)
3 #endif
4 /* eg: if (nblank(dprintk(x))) */
5 #define _nblank(x) #x
6 #define nblank(x) _nblank(x)[0]
7
8 #include <linux/interrupt.h>
9 #include <linux/pci.h>
10
11 /*------------------------------------------------------------------------------
12  *              D E F I N E S
13  *----------------------------------------------------------------------------*/
14
15 #define AAC_MAX_MSIX            8       /* vectors */
16 #define AAC_PCI_MSI_ENABLE      0x8000
17
18 enum {
19         AAC_ENABLE_INTERRUPT    = 0x0,
20         AAC_DISABLE_INTERRUPT,
21         AAC_ENABLE_MSIX,
22         AAC_DISABLE_MSIX,
23         AAC_CLEAR_AIF_BIT,
24         AAC_CLEAR_SYNC_BIT,
25         AAC_ENABLE_INTX
26 };
27
28 #define AAC_INT_MODE_INTX               (1<<0)
29 #define AAC_INT_MODE_MSI                (1<<1)
30 #define AAC_INT_MODE_AIF                (1<<2)
31 #define AAC_INT_MODE_SYNC               (1<<3)
32
33 #define AAC_INT_ENABLE_TYPE1_INTX       0xfffffffb
34 #define AAC_INT_ENABLE_TYPE1_MSIX       0xfffffffa
35 #define AAC_INT_DISABLE_ALL             0xffffffff
36
37 /* Bit definitions in IOA->Host Interrupt Register */
38 #define PMC_TRANSITION_TO_OPERATIONAL   (1<<31)
39 #define PMC_IOARCB_TRANSFER_FAILED      (1<<28)
40 #define PMC_IOA_UNIT_CHECK              (1<<27)
41 #define PMC_NO_HOST_RRQ_FOR_CMD_RESPONSE (1<<26)
42 #define PMC_CRITICAL_IOA_OP_IN_PROGRESS (1<<25)
43 #define PMC_IOARRIN_LOST                (1<<4)
44 #define PMC_SYSTEM_BUS_MMIO_ERROR       (1<<3)
45 #define PMC_IOA_PROCESSOR_IN_ERROR_STATE (1<<2)
46 #define PMC_HOST_RRQ_VALID              (1<<1)
47 #define PMC_OPERATIONAL_STATUS          (1<<31)
48 #define PMC_ALLOW_MSIX_VECTOR0          (1<<0)
49
50 #define PMC_IOA_ERROR_INTERRUPTS        (PMC_IOARCB_TRANSFER_FAILED | \
51                                          PMC_IOA_UNIT_CHECK | \
52                                          PMC_NO_HOST_RRQ_FOR_CMD_RESPONSE | \
53                                          PMC_IOARRIN_LOST | \
54                                          PMC_SYSTEM_BUS_MMIO_ERROR | \
55                                          PMC_IOA_PROCESSOR_IN_ERROR_STATE)
56
57 #define PMC_ALL_INTERRUPT_BITS          (PMC_IOA_ERROR_INTERRUPTS | \
58                                          PMC_HOST_RRQ_VALID | \
59                                          PMC_TRANSITION_TO_OPERATIONAL | \
60                                          PMC_ALLOW_MSIX_VECTOR0)
61 #define PMC_GLOBAL_INT_BIT2             0x00000004
62 #define PMC_GLOBAL_INT_BIT0             0x00000001
63
64 #ifndef AAC_DRIVER_BUILD
65 # define AAC_DRIVER_BUILD 40709
66 # define AAC_DRIVER_BRANCH "-ms"
67 #endif
68 #define MAXIMUM_NUM_CONTAINERS  32
69
70 #define AAC_NUM_MGT_FIB         8
71 #define AAC_NUM_IO_FIB          (1024 - AAC_NUM_MGT_FIB)
72 #define AAC_NUM_FIB             (AAC_NUM_IO_FIB + AAC_NUM_MGT_FIB)
73
74 #define AAC_MAX_LUN             (8)
75
76 #define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff)
77 #define AAC_MAX_32BIT_SGBCOUNT  ((unsigned short)256)
78
79 #define AAC_DEBUG_INSTRUMENT_AIF_DELETE
80
81 /*
82  * These macros convert from physical channels to virtual channels
83  */
84 #define CONTAINER_CHANNEL               (0)
85 #define CONTAINER_TO_CHANNEL(cont)      (CONTAINER_CHANNEL)
86 #define CONTAINER_TO_ID(cont)           (cont)
87 #define CONTAINER_TO_LUN(cont)          (0)
88
89 #define PMC_DEVICE_S6   0x28b
90 #define PMC_DEVICE_S7   0x28c
91 #define PMC_DEVICE_S8   0x28d
92 #define PMC_DEVICE_S9   0x28f
93
94 #define aac_phys_to_logical(x)  ((x)+1)
95 #define aac_logical_to_phys(x)  ((x)?(x)-1:0)
96
97 /* #define AAC_DETAILED_STATUS_INFO */
98
99 struct diskparm
100 {
101         int heads;
102         int sectors;
103         int cylinders;
104 };
105
106
107 /*
108  *      Firmware constants
109  */
110
111 #define         CT_NONE                 0
112 #define         CT_OK                   218
113 #define         FT_FILESYS      8       /* ADAPTEC's "FSA"(tm) filesystem */
114 #define         FT_DRIVE        9       /* physical disk - addressable in scsi by bus/id/lun */
115
116 /*
117  *      Host side memory scatter gather list
118  *      Used by the adapter for read, write, and readdirplus operations
119  *      We have separate 32 and 64 bit version because even
120  *      on 64 bit systems not all cards support the 64 bit version
121  */
122 struct sgentry {
123         __le32  addr;   /* 32-bit address. */
124         __le32  count;  /* Length. */
125 };
126
127 struct user_sgentry {
128         u32     addr;   /* 32-bit address. */
129         u32     count;  /* Length. */
130 };
131
132 struct sgentry64 {
133         __le32  addr[2];        /* 64-bit addr. 2 pieces for data alignment */
134         __le32  count;  /* Length. */
135 };
136
137 struct user_sgentry64 {
138         u32     addr[2];        /* 64-bit addr. 2 pieces for data alignment */
139         u32     count;  /* Length. */
140 };
141
142 struct sgentryraw {
143         __le32          next;   /* reserved for F/W use */
144         __le32          prev;   /* reserved for F/W use */
145         __le32          addr[2];
146         __le32          count;
147         __le32          flags;  /* reserved for F/W use */
148 };
149
150 struct user_sgentryraw {
151         u32             next;   /* reserved for F/W use */
152         u32             prev;   /* reserved for F/W use */
153         u32             addr[2];
154         u32             count;
155         u32             flags;  /* reserved for F/W use */
156 };
157
158 struct sge_ieee1212 {
159         u32     addrLow;
160         u32     addrHigh;
161         u32     length;
162         u32     flags;
163 };
164
165 /*
166  *      SGMAP
167  *
168  *      This is the SGMAP structure for all commands that use
169  *      32-bit addressing.
170  */
171
172 struct sgmap {
173         __le32          count;
174         struct sgentry  sg[1];
175 };
176
177 struct user_sgmap {
178         u32             count;
179         struct user_sgentry     sg[1];
180 };
181
182 struct sgmap64 {
183         __le32          count;
184         struct sgentry64 sg[1];
185 };
186
187 struct user_sgmap64 {
188         u32             count;
189         struct user_sgentry64 sg[1];
190 };
191
192 struct sgmapraw {
193         __le32            count;
194         struct sgentryraw sg[1];
195 };
196
197 struct user_sgmapraw {
198         u32               count;
199         struct user_sgentryraw sg[1];
200 };
201
202 struct creation_info
203 {
204         u8              buildnum;               /* e.g., 588 */
205         u8              usec;                   /* e.g., 588 */
206         u8              via;                    /* e.g., 1 = FSU,
207                                                  *       2 = API
208                                                  */
209         u8              year;                   /* e.g., 1997 = 97 */
210         __le32          date;                   /*
211                                                  * unsigned     Month           :4;     // 1 - 12
212                                                  * unsigned     Day             :6;     // 1 - 32
213                                                  * unsigned     Hour            :6;     // 0 - 23
214                                                  * unsigned     Minute          :6;     // 0 - 60
215                                                  * unsigned     Second          :6;     // 0 - 60
216                                                  */
217         __le32          serial[2];                      /* e.g., 0x1DEADB0BFAFAF001 */
218 };
219
220
221 /*
222  *      Define all the constants needed for the communication interface
223  */
224
225 /*
226  *      Define how many queue entries each queue will have and the total
227  *      number of entries for the entire communication interface. Also define
228  *      how many queues we support.
229  *
230  *      This has to match the controller
231  */
232
233 #define NUMBER_OF_COMM_QUEUES  8   // 4 command; 4 response
234 #define HOST_HIGH_CMD_ENTRIES  4
235 #define HOST_NORM_CMD_ENTRIES  8
236 #define ADAP_HIGH_CMD_ENTRIES  4
237 #define ADAP_NORM_CMD_ENTRIES  512
238 #define HOST_HIGH_RESP_ENTRIES 4
239 #define HOST_NORM_RESP_ENTRIES 512
240 #define ADAP_HIGH_RESP_ENTRIES 4
241 #define ADAP_NORM_RESP_ENTRIES 8
242
243 #define TOTAL_QUEUE_ENTRIES  \
244     (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \
245             HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES)
246
247
248 /*
249  *      Set the queues on a 16 byte alignment
250  */
251
252 #define QUEUE_ALIGNMENT         16
253
254 /*
255  *      The queue headers define the Communication Region queues. These
256  *      are physically contiguous and accessible by both the adapter and the
257  *      host. Even though all queue headers are in the same contiguous block
258  *      they will be represented as individual units in the data structures.
259  */
260
261 struct aac_entry {
262         __le32 size; /* Size in bytes of Fib which this QE points to */
263         __le32 addr; /* Receiver address of the FIB */
264 };
265
266 /*
267  *      The adapter assumes the ProducerIndex and ConsumerIndex are grouped
268  *      adjacently and in that order.
269  */
270
271 struct aac_qhdr {
272         __le64 header_addr;/* Address to hand the adapter to access
273                               to this queue head */
274         __le32 *producer; /* The producer index for this queue (host address) */
275         __le32 *consumer; /* The consumer index for this queue (host address) */
276 };
277
278 /*
279  *      Define all the events which the adapter would like to notify
280  *      the host of.
281  */
282
283 #define         HostNormCmdQue          1       /* Change in host normal priority command queue */
284 #define         HostHighCmdQue          2       /* Change in host high priority command queue */
285 #define         HostNormRespQue         3       /* Change in host normal priority response queue */
286 #define         HostHighRespQue         4       /* Change in host high priority response queue */
287 #define         AdapNormRespNotFull     5
288 #define         AdapHighRespNotFull     6
289 #define         AdapNormCmdNotFull      7
290 #define         AdapHighCmdNotFull      8
291 #define         SynchCommandComplete    9
292 #define         AdapInternalError       0xfe    /* The adapter detected an internal error shutting down */
293
294 /*
295  *      Define all the events the host wishes to notify the
296  *      adapter of. The first four values much match the Qid the
297  *      corresponding queue.
298  */
299
300 #define         AdapNormCmdQue          2
301 #define         AdapHighCmdQue          3
302 #define         AdapNormRespQue         6
303 #define         AdapHighRespQue         7
304 #define         HostShutdown            8
305 #define         HostPowerFail           9
306 #define         FatalCommError          10
307 #define         HostNormRespNotFull     11
308 #define         HostHighRespNotFull     12
309 #define         HostNormCmdNotFull      13
310 #define         HostHighCmdNotFull      14
311 #define         FastIo                  15
312 #define         AdapPrintfDone          16
313
314 /*
315  *      Define all the queues that the adapter and host use to communicate
316  *      Number them to match the physical queue layout.
317  */
318
319 enum aac_queue_types {
320         HostNormCmdQueue = 0,   /* Adapter to host normal priority command traffic */
321         HostHighCmdQueue,       /* Adapter to host high priority command traffic */
322         AdapNormCmdQueue,       /* Host to adapter normal priority command traffic */
323         AdapHighCmdQueue,       /* Host to adapter high priority command traffic */
324         HostNormRespQueue,      /* Adapter to host normal priority response traffic */
325         HostHighRespQueue,      /* Adapter to host high priority response traffic */
326         AdapNormRespQueue,      /* Host to adapter normal priority response traffic */
327         AdapHighRespQueue       /* Host to adapter high priority response traffic */
328 };
329
330 /*
331  *      Assign type values to the FSA communication data structures
332  */
333
334 #define         FIB_MAGIC       0x0001
335 #define         FIB_MAGIC2      0x0004
336 #define         FIB_MAGIC2_64   0x0005
337
338 /*
339  *      Define the priority levels the FSA communication routines support.
340  */
341
342 #define         FsaNormal       1
343
344 /* transport FIB header (PMC) */
345 struct aac_fib_xporthdr {
346         u64     HostAddress;    /* FIB host address w/o xport header */
347         u32     Size;           /* FIB size excluding xport header */
348         u32     Handle;         /* driver handle to reference the FIB */
349         u64     Reserved[2];
350 };
351
352 #define         ALIGN32         32
353
354 /*
355  * Define the FIB. The FIB is the where all the requested data and
356  * command information are put to the application on the FSA adapter.
357  */
358
359 struct aac_fibhdr {
360         __le32 XferState;       /* Current transfer state for this CCB */
361         __le16 Command;         /* Routing information for the destination */
362         u8 StructType;          /* Type FIB */
363         u8 Unused;              /* Unused */
364         __le16 Size;            /* Size of this FIB in bytes */
365         __le16 SenderSize;      /* Size of the FIB in the sender
366                                    (for response sizing) */
367         __le32 SenderFibAddress;  /* Host defined data in the FIB */
368         union {
369                 __le32 ReceiverFibAddress;/* Logical address of this FIB for
370                                      the adapter (old) */
371                 __le32 SenderFibAddressHigh;/* upper 32bit of phys. FIB address */
372                 __le32 TimeStamp;       /* otherwise timestamp for FW internal use */
373         } u;
374         u32 Handle;             /* FIB handle used for MSGU commnunication */
375         u32 Previous;           /* FW internal use */
376         u32 Next;               /* FW internal use */
377 };
378
379 struct hw_fib {
380         struct aac_fibhdr header;
381         u8 data[512-sizeof(struct aac_fibhdr)]; // Command specific data
382 };
383
384 /*
385  *      FIB commands
386  */
387
388 #define         TestCommandResponse             1
389 #define         TestAdapterCommand              2
390 /*
391  *      Lowlevel and comm commands
392  */
393 #define         LastTestCommand                 100
394 #define         ReinitHostNormCommandQueue      101
395 #define         ReinitHostHighCommandQueue      102
396 #define         ReinitHostHighRespQueue         103
397 #define         ReinitHostNormRespQueue         104
398 #define         ReinitAdapNormCommandQueue      105
399 #define         ReinitAdapHighCommandQueue      107
400 #define         ReinitAdapHighRespQueue         108
401 #define         ReinitAdapNormRespQueue         109
402 #define         InterfaceShutdown               110
403 #define         DmaCommandFib                   120
404 #define         StartProfile                    121
405 #define         TermProfile                     122
406 #define         SpeedTest                       123
407 #define         TakeABreakPt                    124
408 #define         RequestPerfData                 125
409 #define         SetInterruptDefTimer            126
410 #define         SetInterruptDefCount            127
411 #define         GetInterruptDefStatus           128
412 #define         LastCommCommand                 129
413 /*
414  *      Filesystem commands
415  */
416 #define         NuFileSystem                    300
417 #define         UFS                             301
418 #define         HostFileSystem                  302
419 #define         LastFileSystemCommand           303
420 /*
421  *      Container Commands
422  */
423 #define         ContainerCommand                500
424 #define         ContainerCommand64              501
425 #define         ContainerRawIo                  502
426 #define         ContainerRawIo2                 503
427 /*
428  *      Scsi Port commands (scsi passthrough)
429  */
430 #define         ScsiPortCommand                 600
431 #define         ScsiPortCommand64               601
432 /*
433  *      Misc house keeping and generic adapter initiated commands
434  */
435 #define         AifRequest                      700
436 #define         CheckRevision                   701
437 #define         FsaHostShutdown                 702
438 #define         RequestAdapterInfo              703
439 #define         IsAdapterPaused                 704
440 #define         SendHostTime                    705
441 #define         RequestSupplementAdapterInfo    706
442 #define         LastMiscCommand                 707
443
444 /*
445  * Commands that will target the failover level on the FSA adapter
446  */
447
448 enum fib_xfer_state {
449         HostOwned                       = (1<<0),
450         AdapterOwned                    = (1<<1),
451         FibInitialized                  = (1<<2),
452         FibEmpty                        = (1<<3),
453         AllocatedFromPool               = (1<<4),
454         SentFromHost                    = (1<<5),
455         SentFromAdapter                 = (1<<6),
456         ResponseExpected                = (1<<7),
457         NoResponseExpected              = (1<<8),
458         AdapterProcessed                = (1<<9),
459         HostProcessed                   = (1<<10),
460         HighPriority                    = (1<<11),
461         NormalPriority                  = (1<<12),
462         Async                           = (1<<13),
463         AsyncIo                         = (1<<13),      // rpbfix: remove with new regime
464         PageFileIo                      = (1<<14),      // rpbfix: remove with new regime
465         ShutdownRequest                 = (1<<15),
466         LazyWrite                       = (1<<16),      // rpbfix: remove with new regime
467         AdapterMicroFib                 = (1<<17),
468         BIOSFibPath                     = (1<<18),
469         FastResponseCapable             = (1<<19),
470         ApiFib                          = (1<<20),      /* Its an API Fib */
471         /* PMC NEW COMM: There is no more AIF data pending */
472         NoMoreAifDataAvailable          = (1<<21)
473 };
474
475 /*
476  *      The following defines needs to be updated any time there is an
477  *      incompatible change made to the aac_init structure.
478  */
479
480 #define ADAPTER_INIT_STRUCT_REVISION            3
481 #define ADAPTER_INIT_STRUCT_REVISION_4          4 // rocket science
482 #define ADAPTER_INIT_STRUCT_REVISION_6          6 /* PMC src */
483 #define ADAPTER_INIT_STRUCT_REVISION_7          7 /* Denali */
484
485 struct aac_init
486 {
487         __le32  InitStructRevision;
488         __le32  Sa_MSIXVectors;
489         __le32  fsrev;
490         __le32  CommHeaderAddress;
491         __le32  FastIoCommAreaAddress;
492         __le32  AdapterFibsPhysicalAddress;
493         __le32  AdapterFibsVirtualAddress;
494         __le32  AdapterFibsSize;
495         __le32  AdapterFibAlign;
496         __le32  printfbuf;
497         __le32  printfbufsiz;
498         __le32  HostPhysMemPages;   /* number of 4k pages of host
499                                        physical memory */
500         __le32  HostElapsedSeconds; /* number of seconds since 1970. */
501         /*
502          * ADAPTER_INIT_STRUCT_REVISION_4 begins here
503          */
504         __le32  InitFlags;      /* flags for supported features */
505 #define INITFLAGS_NEW_COMM_SUPPORTED    0x00000001
506 #define INITFLAGS_DRIVER_USES_UTC_TIME  0x00000010
507 #define INITFLAGS_DRIVER_SUPPORTS_PM    0x00000020
508 #define INITFLAGS_NEW_COMM_TYPE1_SUPPORTED      0x00000040
509 #define INITFLAGS_FAST_JBOD_SUPPORTED   0x00000080
510 #define INITFLAGS_NEW_COMM_TYPE2_SUPPORTED      0x00000100
511         __le32  MaxIoCommands;  /* max outstanding commands */
512         __le32  MaxIoSize;      /* largest I/O command */
513         __le32  MaxFibSize;     /* largest FIB to adapter */
514         /* ADAPTER_INIT_STRUCT_REVISION_5 begins here */
515         __le32  MaxNumAif;      /* max number of aif */
516         /* ADAPTER_INIT_STRUCT_REVISION_6 begins here */
517         __le32  HostRRQ_AddrLow;
518         __le32  HostRRQ_AddrHigh;       /* Host RRQ (response queue) for SRC */
519 };
520
521 enum aac_log_level {
522         LOG_AAC_INIT                    = 10,
523         LOG_AAC_INFORMATIONAL           = 20,
524         LOG_AAC_WARNING                 = 30,
525         LOG_AAC_LOW_ERROR               = 40,
526         LOG_AAC_MEDIUM_ERROR            = 50,
527         LOG_AAC_HIGH_ERROR              = 60,
528         LOG_AAC_PANIC                   = 70,
529         LOG_AAC_DEBUG                   = 80,
530         LOG_AAC_WINDBG_PRINT            = 90
531 };
532
533 #define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT       0x030b
534 #define FSAFS_NTC_FIB_CONTEXT                   0x030c
535
536 struct aac_dev;
537 struct fib;
538 struct scsi_cmnd;
539
540 struct adapter_ops
541 {
542         /* Low level operations */
543         void (*adapter_interrupt)(struct aac_dev *dev);
544         void (*adapter_notify)(struct aac_dev *dev, u32 event);
545         void (*adapter_disable_int)(struct aac_dev *dev);
546         void (*adapter_enable_int)(struct aac_dev *dev);
547         int  (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, u32 *status, u32 *r1, u32 *r2, u32 *r3, u32 *r4);
548         int  (*adapter_check_health)(struct aac_dev *dev);
549         int  (*adapter_restart)(struct aac_dev *dev, int bled);
550         /* Transport operations */
551         int  (*adapter_ioremap)(struct aac_dev * dev, u32 size);
552         irq_handler_t adapter_intr;
553         /* Packet operations */
554         int  (*adapter_deliver)(struct fib * fib);
555         int  (*adapter_bounds)(struct aac_dev * dev, struct scsi_cmnd * cmd, u64 lba);
556         int  (*adapter_read)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count);
557         int  (*adapter_write)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count, int fua);
558         int  (*adapter_scsi)(struct fib * fib, struct scsi_cmnd * cmd);
559         /* Administrative operations */
560         int  (*adapter_comm)(struct aac_dev * dev, int comm);
561 };
562
563 /*
564  *      Define which interrupt handler needs to be installed
565  */
566
567 struct aac_driver_ident
568 {
569         int     (*init)(struct aac_dev *dev);
570         char *  name;
571         char *  vname;
572         char *  model;
573         u16     channels;
574         int     quirks;
575 };
576 /*
577  * Some adapter firmware needs communication memory
578  * below 2gig. This tells the init function to set the
579  * dma mask such that fib memory will be allocated where the
580  * adapter firmware can get to it.
581  */
582 #define AAC_QUIRK_31BIT 0x0001
583
584 /*
585  * Some adapter firmware, when the raid card's cache is turned off, can not
586  * split up scatter gathers in order to deal with the limits of the
587  * underlying CHIM. This limit is 34 scatter gather elements.
588  */
589 #define AAC_QUIRK_34SG  0x0002
590
591 /*
592  * This adapter is a slave (no Firmware)
593  */
594 #define AAC_QUIRK_SLAVE 0x0004
595
596 /*
597  * This adapter is a master.
598  */
599 #define AAC_QUIRK_MASTER 0x0008
600
601 /*
602  * Some adapter firmware perform poorly when it must split up scatter gathers
603  * in order to deal with the limits of the underlying CHIM. This limit in this
604  * class of adapters is 17 scatter gather elements.
605  */
606 #define AAC_QUIRK_17SG  0x0010
607
608 /*
609  *      Some adapter firmware does not support 64 bit scsi passthrough
610  * commands.
611  */
612 #define AAC_QUIRK_SCSI_32       0x0020
613
614 /*
615  *      The adapter interface specs all queues to be located in the same
616  *      physically contiguous block. The host structure that defines the
617  *      commuication queues will assume they are each a separate physically
618  *      contiguous memory region that will support them all being one big
619  *      contiguous block.
620  *      There is a command and response queue for each level and direction of
621  *      commuication. These regions are accessed by both the host and adapter.
622  */
623
624 struct aac_queue {
625         u64                     logical;        /*address we give the adapter */
626         struct aac_entry        *base;          /*system virtual address */
627         struct aac_qhdr         headers;        /*producer,consumer q headers*/
628         u32                     entries;        /*Number of queue entries */
629         wait_queue_head_t       qfull;          /*Event to wait on if q full */
630         wait_queue_head_t       cmdready;       /*Cmd ready from the adapter */
631                 /* This is only valid for adapter to host command queues. */
632         spinlock_t              *lock;          /* Spinlock for this queue must take this lock before accessing the lock */
633         spinlock_t              lockdata;       /* Actual lock (used only on one side of the lock) */
634         struct list_head        cmdq;           /* A queue of FIBs which need to be prcessed by the FS thread. This is */
635                                                 /* only valid for command queues which receive entries from the adapter. */
636         /* Number of entries on outstanding queue. */
637         atomic_t                numpending;
638         struct aac_dev *        dev;            /* Back pointer to adapter structure */
639 };
640
641 /*
642  *      Message queues. The order here is important, see also the
643  *      queue type ordering
644  */
645
646 struct aac_queue_block
647 {
648         struct aac_queue queue[8];
649 };
650
651 /*
652  *      SaP1 Message Unit Registers
653  */
654
655 struct sa_drawbridge_CSR {
656                                 /*      Offset  |  Name */
657         __le32  reserved[10];   /*      00h-27h |  Reserved */
658         u8      LUT_Offset;     /*      28h     |  Lookup Table Offset */
659         u8      reserved1[3];   /*      29h-2bh |  Reserved */
660         __le32  LUT_Data;       /*      2ch     |  Looup Table Data */
661         __le32  reserved2[26];  /*      30h-97h |  Reserved */
662         __le16  PRICLEARIRQ;    /*      98h     |  Primary Clear Irq */
663         __le16  SECCLEARIRQ;    /*      9ah     |  Secondary Clear Irq */
664         __le16  PRISETIRQ;      /*      9ch     |  Primary Set Irq */
665         __le16  SECSETIRQ;      /*      9eh     |  Secondary Set Irq */
666         __le16  PRICLEARIRQMASK;/*      a0h     |  Primary Clear Irq Mask */
667         __le16  SECCLEARIRQMASK;/*      a2h     |  Secondary Clear Irq Mask */
668         __le16  PRISETIRQMASK;  /*      a4h     |  Primary Set Irq Mask */
669         __le16  SECSETIRQMASK;  /*      a6h     |  Secondary Set Irq Mask */
670         __le32  MAILBOX0;       /*      a8h     |  Scratchpad 0 */
671         __le32  MAILBOX1;       /*      ach     |  Scratchpad 1 */
672         __le32  MAILBOX2;       /*      b0h     |  Scratchpad 2 */
673         __le32  MAILBOX3;       /*      b4h     |  Scratchpad 3 */
674         __le32  MAILBOX4;       /*      b8h     |  Scratchpad 4 */
675         __le32  MAILBOX5;       /*      bch     |  Scratchpad 5 */
676         __le32  MAILBOX6;       /*      c0h     |  Scratchpad 6 */
677         __le32  MAILBOX7;       /*      c4h     |  Scratchpad 7 */
678         __le32  ROM_Setup_Data; /*      c8h     |  Rom Setup and Data */
679         __le32  ROM_Control_Addr;/*     cch     |  Rom Control and Address */
680         __le32  reserved3[12];  /*      d0h-ffh |  reserved */
681         __le32  LUT[64];        /*    100h-1ffh |  Lookup Table Entries */
682 };
683
684 #define Mailbox0        SaDbCSR.MAILBOX0
685 #define Mailbox1        SaDbCSR.MAILBOX1
686 #define Mailbox2        SaDbCSR.MAILBOX2
687 #define Mailbox3        SaDbCSR.MAILBOX3
688 #define Mailbox4        SaDbCSR.MAILBOX4
689 #define Mailbox5        SaDbCSR.MAILBOX5
690 #define Mailbox6        SaDbCSR.MAILBOX6
691 #define Mailbox7        SaDbCSR.MAILBOX7
692
693 #define DoorbellReg_p SaDbCSR.PRISETIRQ
694 #define DoorbellReg_s SaDbCSR.SECSETIRQ
695 #define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ
696
697
698 #define DOORBELL_0      0x0001
699 #define DOORBELL_1      0x0002
700 #define DOORBELL_2      0x0004
701 #define DOORBELL_3      0x0008
702 #define DOORBELL_4      0x0010
703 #define DOORBELL_5      0x0020
704 #define DOORBELL_6      0x0040
705
706
707 #define PrintfReady     DOORBELL_5
708 #define PrintfDone      DOORBELL_5
709
710 struct sa_registers {
711         struct sa_drawbridge_CSR        SaDbCSR;                        /* 98h - c4h */
712 };
713
714
715 #define Sa_MINIPORT_REVISION                    1
716
717 #define sa_readw(AEP, CSR)              readl(&((AEP)->regs.sa->CSR))
718 #define sa_readl(AEP, CSR)              readl(&((AEP)->regs.sa->CSR))
719 #define sa_writew(AEP, CSR, value)      writew(value, &((AEP)->regs.sa->CSR))
720 #define sa_writel(AEP, CSR, value)      writel(value, &((AEP)->regs.sa->CSR))
721
722 /*
723  *      Rx Message Unit Registers
724  */
725
726 struct rx_mu_registers {
727                             /*  Local  | PCI*| Name */
728         __le32  ARSR;       /*  1300h  | 00h | APIC Register Select Register */
729         __le32  reserved0;  /*  1304h  | 04h | Reserved */
730         __le32  AWR;        /*  1308h  | 08h | APIC Window Register */
731         __le32  reserved1;  /*  130Ch  | 0Ch | Reserved */
732         __le32  IMRx[2];    /*  1310h  | 10h | Inbound Message Registers */
733         __le32  OMRx[2];    /*  1318h  | 18h | Outbound Message Registers */
734         __le32  IDR;        /*  1320h  | 20h | Inbound Doorbell Register */
735         __le32  IISR;       /*  1324h  | 24h | Inbound Interrupt
736                                                 Status Register */
737         __le32  IIMR;       /*  1328h  | 28h | Inbound Interrupt
738                                                 Mask Register */
739         __le32  ODR;        /*  132Ch  | 2Ch | Outbound Doorbell Register */
740         __le32  OISR;       /*  1330h  | 30h | Outbound Interrupt
741                                                 Status Register */
742         __le32  OIMR;       /*  1334h  | 34h | Outbound Interrupt
743                                                 Mask Register */
744         __le32  reserved2;  /*  1338h  | 38h | Reserved */
745         __le32  reserved3;  /*  133Ch  | 3Ch | Reserved */
746         __le32  InboundQueue;/* 1340h  | 40h | Inbound Queue Port relative to firmware */
747         __le32  OutboundQueue;/*1344h  | 44h | Outbound Queue Port relative to firmware */
748                             /* * Must access through ATU Inbound
749                                  Translation Window */
750 };
751
752 struct rx_inbound {
753         __le32  Mailbox[8];
754 };
755
756 #define INBOUNDDOORBELL_0       0x00000001
757 #define INBOUNDDOORBELL_1       0x00000002
758 #define INBOUNDDOORBELL_2       0x00000004
759 #define INBOUNDDOORBELL_3       0x00000008
760 #define INBOUNDDOORBELL_4       0x00000010
761 #define INBOUNDDOORBELL_5       0x00000020
762 #define INBOUNDDOORBELL_6       0x00000040
763
764 #define OUTBOUNDDOORBELL_0      0x00000001
765 #define OUTBOUNDDOORBELL_1      0x00000002
766 #define OUTBOUNDDOORBELL_2      0x00000004
767 #define OUTBOUNDDOORBELL_3      0x00000008
768 #define OUTBOUNDDOORBELL_4      0x00000010
769
770 #define InboundDoorbellReg      MUnit.IDR
771 #define OutboundDoorbellReg     MUnit.ODR
772
773 struct rx_registers {
774         struct rx_mu_registers          MUnit;          /* 1300h - 1347h */
775         __le32                          reserved1[2];   /* 1348h - 134ch */
776         struct rx_inbound               IndexRegs;
777 };
778
779 #define rx_readb(AEP, CSR)              readb(&((AEP)->regs.rx->CSR))
780 #define rx_readl(AEP, CSR)              readl(&((AEP)->regs.rx->CSR))
781 #define rx_writeb(AEP, CSR, value)      writeb(value, &((AEP)->regs.rx->CSR))
782 #define rx_writel(AEP, CSR, value)      writel(value, &((AEP)->regs.rx->CSR))
783
784 /*
785  *      Rkt Message Unit Registers (same as Rx, except a larger reserve region)
786  */
787
788 #define rkt_mu_registers rx_mu_registers
789 #define rkt_inbound rx_inbound
790
791 struct rkt_registers {
792         struct rkt_mu_registers         MUnit;           /* 1300h - 1347h */
793         __le32                          reserved1[1006]; /* 1348h - 22fch */
794         struct rkt_inbound              IndexRegs;       /* 2300h - */
795 };
796
797 #define rkt_readb(AEP, CSR)             readb(&((AEP)->regs.rkt->CSR))
798 #define rkt_readl(AEP, CSR)             readl(&((AEP)->regs.rkt->CSR))
799 #define rkt_writeb(AEP, CSR, value)     writeb(value, &((AEP)->regs.rkt->CSR))
800 #define rkt_writel(AEP, CSR, value)     writel(value, &((AEP)->regs.rkt->CSR))
801
802 /*
803  * PMC SRC message unit registers
804  */
805
806 #define src_inbound rx_inbound
807
808 struct src_mu_registers {
809                                 /*      PCI*| Name */
810         __le32  reserved0[6];   /*      00h | Reserved */
811         __le32  IOAR[2];        /*      18h | IOA->host interrupt register */
812         __le32  IDR;            /*      20h | Inbound Doorbell Register */
813         __le32  IISR;           /*      24h | Inbound Int. Status Register */
814         __le32  reserved1[3];   /*      28h | Reserved */
815         __le32  OIMR;           /*      34h | Outbound Int. Mask Register */
816         __le32  reserved2[25];  /*      38h | Reserved */
817         __le32  ODR_R;          /*      9ch | Outbound Doorbell Read */
818         __le32  ODR_C;          /*      a0h | Outbound Doorbell Clear */
819         __le32  reserved3[6];   /*      a4h | Reserved */
820         __le32  OMR;            /*      bch | Outbound Message Register */
821         __le32  IQ_L;           /*  c0h | Inbound Queue (Low address) */
822         __le32  IQ_H;           /*  c4h | Inbound Queue (High address) */
823         __le32  ODR_MSI;        /*  c8h | MSI register for sync./AIF */
824 };
825
826 struct src_registers {
827         struct src_mu_registers MUnit;  /* 00h - cbh */
828         union {
829                 struct {
830                         __le32 reserved1[130789];       /* cch - 7fc5fh */
831                         struct src_inbound IndexRegs;   /* 7fc60h */
832                 } tupelo;
833                 struct {
834                         __le32 reserved1[973];          /* cch - fffh */
835                         struct src_inbound IndexRegs;   /* 1000h */
836                 } denali;
837         } u;
838 };
839
840 #define src_readb(AEP, CSR)             readb(&((AEP)->regs.src.bar0->CSR))
841 #define src_readl(AEP, CSR)             readl(&((AEP)->regs.src.bar0->CSR))
842 #define src_writeb(AEP, CSR, value)     writeb(value, \
843                                                 &((AEP)->regs.src.bar0->CSR))
844 #define src_writel(AEP, CSR, value)     writel(value, \
845                                                 &((AEP)->regs.src.bar0->CSR))
846
847 #define SRC_ODR_SHIFT           12
848 #define SRC_IDR_SHIFT           9
849
850 typedef void (*fib_callback)(void *ctxt, struct fib *fibctx);
851
852 struct aac_fib_context {
853         s16                     type;           // used for verification of structure
854         s16                     size;
855         u32                     unique;         // unique value representing this context
856         ulong                   jiffies;        // used for cleanup - dmb changed to ulong
857         struct list_head        next;           // used to link context's into a linked list
858         struct semaphore        wait_sem;       // this is used to wait for the next fib to arrive.
859         int                     wait;           // Set to true when thread is in WaitForSingleObject
860         unsigned long           count;          // total number of FIBs on FibList
861         struct list_head        fib_list;       // this holds fibs and their attachd hw_fibs
862 };
863
864 struct sense_data {
865         u8 error_code;          /* 70h (current errors), 71h(deferred errors) */
866         u8 valid:1;             /* A valid bit of one indicates that the information  */
867                                 /* field contains valid information as defined in the
868                                  * SCSI-2 Standard.
869                                  */
870         u8 segment_number;      /* Only used for COPY, COMPARE, or COPY AND VERIFY Commands */
871         u8 sense_key:4;         /* Sense Key */
872         u8 reserved:1;
873         u8 ILI:1;               /* Incorrect Length Indicator */
874         u8 EOM:1;               /* End Of Medium - reserved for random access devices */
875         u8 filemark:1;          /* Filemark - reserved for random access devices */
876
877         u8 information[4];      /* for direct-access devices, contains the unsigned
878                                  * logical block address or residue associated with
879                                  * the sense key
880                                  */
881         u8 add_sense_len;       /* number of additional sense bytes to follow this field */
882         u8 cmnd_info[4];        /* not used */
883         u8 ASC;                 /* Additional Sense Code */
884         u8 ASCQ;                /* Additional Sense Code Qualifier */
885         u8 FRUC;                /* Field Replaceable Unit Code - not used */
886         u8 bit_ptr:3;           /* indicates which byte of the CDB or parameter data
887                                  * was in error
888                                  */
889         u8 BPV:1;               /* bit pointer valid (BPV): 1- indicates that
890                                  * the bit_ptr field has valid value
891                                  */
892         u8 reserved2:2;
893         u8 CD:1;                /* command data bit: 1- illegal parameter in CDB.
894                                  * 0- illegal parameter in data.
895                                  */
896         u8 SKSV:1;
897         u8 field_ptr[2];        /* byte of the CDB or parameter data in error */
898 };
899
900 struct fsa_dev_info {
901         u64             last;
902         u64             size;
903         u32             type;
904         u32             config_waiting_on;
905         unsigned long   config_waiting_stamp;
906         u16             queue_depth;
907         u8              config_needed;
908         u8              valid;
909         u8              ro;
910         u8              locked;
911         u8              deleted;
912         char            devname[8];
913         struct sense_data sense_data;
914         u32             block_size;
915 };
916
917 struct fib {
918         void                    *next;  /* this is used by the allocator */
919         s16                     type;
920         s16                     size;
921         /*
922          *      The Adapter that this I/O is destined for.
923          */
924         struct aac_dev          *dev;
925         /*
926          *      This is the event the sendfib routine will wait on if the
927          *      caller did not pass one and this is synch io.
928          */
929         struct semaphore        event_wait;
930         spinlock_t              event_lock;
931
932         u32                     done;   /* gets set to 1 when fib is complete */
933         fib_callback            callback;
934         void                    *callback_data;
935         u32                     flags; // u32 dmb was ulong
936         /*
937          *      And for the internal issue/reply queues (we may be able
938          *      to merge these two)
939          */
940         struct list_head        fiblink;
941         void                    *data;
942         struct hw_fib           *hw_fib_va;             /* Actual shared object */
943         dma_addr_t              hw_fib_pa;              /* physical address of hw_fib*/
944 };
945
946 /*
947  *      Adapter Information Block
948  *
949  *      This is returned by the RequestAdapterInfo block
950  */
951
952 struct aac_adapter_info
953 {
954         __le32  platform;
955         __le32  cpu;
956         __le32  subcpu;
957         __le32  clock;
958         __le32  execmem;
959         __le32  buffermem;
960         __le32  totalmem;
961         __le32  kernelrev;
962         __le32  kernelbuild;
963         __le32  monitorrev;
964         __le32  monitorbuild;
965         __le32  hwrev;
966         __le32  hwbuild;
967         __le32  biosrev;
968         __le32  biosbuild;
969         __le32  cluster;
970         __le32  clusterchannelmask;
971         __le32  serial[2];
972         __le32  battery;
973         __le32  options;
974         __le32  OEM;
975 };
976
977 struct aac_supplement_adapter_info
978 {
979         u8      AdapterTypeText[17+1];
980         u8      Pad[2];
981         __le32  FlashMemoryByteSize;
982         __le32  FlashImageId;
983         __le32  MaxNumberPorts;
984         __le32  Version;
985         __le32  FeatureBits;
986         u8      SlotNumber;
987         u8      ReservedPad0[3];
988         u8      BuildDate[12];
989         __le32  CurrentNumberPorts;
990         struct {
991                 u8      AssemblyPn[8];
992                 u8      FruPn[8];
993                 u8      BatteryFruPn[8];
994                 u8      EcVersionString[8];
995                 u8      Tsid[12];
996         }       VpdInfo;
997         __le32  FlashFirmwareRevision;
998         __le32  FlashFirmwareBuild;
999         __le32  RaidTypeMorphOptions;
1000         __le32  FlashFirmwareBootRevision;
1001         __le32  FlashFirmwareBootBuild;
1002         u8      MfgPcbaSerialNo[12];
1003         u8      MfgWWNName[8];
1004         __le32  SupportedOptions2;
1005         __le32  StructExpansion;
1006         /* StructExpansion == 1 */
1007         __le32  FeatureBits3;
1008         __le32  SupportedPerformanceModes;
1009         __le32  ReservedForFutureGrowth[80];
1010 };
1011 #define AAC_FEATURE_FALCON      cpu_to_le32(0x00000010)
1012 #define AAC_FEATURE_JBOD        cpu_to_le32(0x08000000)
1013 /* SupportedOptions2 */
1014 #define AAC_OPTION_MU_RESET             cpu_to_le32(0x00000001)
1015 #define AAC_OPTION_IGNORE_RESET         cpu_to_le32(0x00000002)
1016 #define AAC_OPTION_POWER_MANAGEMENT     cpu_to_le32(0x00000004)
1017 #define AAC_OPTION_DOORBELL_RESET       cpu_to_le32(0x00004000)
1018 /* 4KB sector size */
1019 #define AAC_OPTION_VARIABLE_BLOCK_SIZE  cpu_to_le32(0x00040000)
1020 /* 240 simple volume support */
1021 #define AAC_OPTION_SUPPORTED_240_VOLUMES cpu_to_le32(0x10000000)
1022 #define AAC_SIS_VERSION_V3      3
1023 #define AAC_SIS_SLOT_UNKNOWN    0xFF
1024
1025 #define GetBusInfo 0x00000009
1026 struct aac_bus_info {
1027         __le32  Command;        /* VM_Ioctl */
1028         __le32  ObjType;        /* FT_DRIVE */
1029         __le32  MethodId;       /* 1 = SCSI Layer */
1030         __le32  ObjectId;       /* Handle */
1031         __le32  CtlCmd;         /* GetBusInfo */
1032 };
1033
1034 struct aac_bus_info_response {
1035         __le32  Status;         /* ST_OK */
1036         __le32  ObjType;
1037         __le32  MethodId;       /* unused */
1038         __le32  ObjectId;       /* unused */
1039         __le32  CtlCmd;         /* unused */
1040         __le32  ProbeComplete;
1041         __le32  BusCount;
1042         __le32  TargetsPerBus;
1043         u8      InitiatorBusId[10];
1044         u8      BusValid[10];
1045 };
1046
1047 /*
1048  * Battery platforms
1049  */
1050 #define AAC_BAT_REQ_PRESENT     (1)
1051 #define AAC_BAT_REQ_NOTPRESENT  (2)
1052 #define AAC_BAT_OPT_PRESENT     (3)
1053 #define AAC_BAT_OPT_NOTPRESENT  (4)
1054 #define AAC_BAT_NOT_SUPPORTED   (5)
1055 /*
1056  * cpu types
1057  */
1058 #define AAC_CPU_SIMULATOR       (1)
1059 #define AAC_CPU_I960            (2)
1060 #define AAC_CPU_STRONGARM       (3)
1061
1062 /*
1063  * Supported Options
1064  */
1065 #define AAC_OPT_SNAPSHOT                cpu_to_le32(1)
1066 #define AAC_OPT_CLUSTERS                cpu_to_le32(1<<1)
1067 #define AAC_OPT_WRITE_CACHE             cpu_to_le32(1<<2)
1068 #define AAC_OPT_64BIT_DATA              cpu_to_le32(1<<3)
1069 #define AAC_OPT_HOST_TIME_FIB           cpu_to_le32(1<<4)
1070 #define AAC_OPT_RAID50                  cpu_to_le32(1<<5)
1071 #define AAC_OPT_4GB_WINDOW              cpu_to_le32(1<<6)
1072 #define AAC_OPT_SCSI_UPGRADEABLE        cpu_to_le32(1<<7)
1073 #define AAC_OPT_SOFT_ERR_REPORT         cpu_to_le32(1<<8)
1074 #define AAC_OPT_SUPPORTED_RECONDITION   cpu_to_le32(1<<9)
1075 #define AAC_OPT_SGMAP_HOST64            cpu_to_le32(1<<10)
1076 #define AAC_OPT_ALARM                   cpu_to_le32(1<<11)
1077 #define AAC_OPT_NONDASD                 cpu_to_le32(1<<12)
1078 #define AAC_OPT_SCSI_MANAGED            cpu_to_le32(1<<13)
1079 #define AAC_OPT_RAID_SCSI_MODE          cpu_to_le32(1<<14)
1080 #define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16)
1081 #define AAC_OPT_NEW_COMM                cpu_to_le32(1<<17)
1082 #define AAC_OPT_NEW_COMM_64             cpu_to_le32(1<<18)
1083 #define AAC_OPT_NEW_COMM_TYPE1          cpu_to_le32(1<<28)
1084 #define AAC_OPT_NEW_COMM_TYPE2          cpu_to_le32(1<<29)
1085 #define AAC_OPT_NEW_COMM_TYPE3          cpu_to_le32(1<<30)
1086 #define AAC_OPT_NEW_COMM_TYPE4          cpu_to_le32(1<<31)
1087
1088 /* MSIX context */
1089 struct aac_msix_ctx {
1090         int             vector_no;
1091         struct aac_dev  *dev;
1092 };
1093
1094 struct aac_dev
1095 {
1096         struct list_head        entry;
1097         const char              *name;
1098         int                     id;
1099
1100         /*
1101          *      negotiated FIB settings
1102          */
1103         unsigned                max_fib_size;
1104         unsigned                sg_tablesize;
1105         unsigned                max_num_aif;
1106
1107         /*
1108          *      Map for 128 fib objects (64k)
1109          */
1110         dma_addr_t              hw_fib_pa;
1111         struct hw_fib           *hw_fib_va;
1112         struct hw_fib           *aif_base_va;
1113         /*
1114          *      Fib Headers
1115          */
1116         struct fib              *fibs;
1117
1118         struct fib              *free_fib;
1119         spinlock_t              fib_lock;
1120
1121         struct aac_queue_block *queues;
1122         /*
1123          *      The user API will use an IOCTL to register itself to receive
1124          *      FIBs from the adapter.  The following list is used to keep
1125          *      track of all the threads that have requested these FIBs.  The
1126          *      mutex is used to synchronize access to all data associated
1127          *      with the adapter fibs.
1128          */
1129         struct list_head        fib_list;
1130
1131         struct adapter_ops      a_ops;
1132         unsigned long           fsrev;          /* Main driver's revision number */
1133
1134         resource_size_t         base_start;     /* main IO base */
1135         resource_size_t         dbg_base;       /* address of UART
1136                                                  * debug buffer */
1137
1138         resource_size_t         base_size, dbg_size;    /* Size of
1139                                                          *  mapped in region */
1140
1141         struct aac_init         *init;          /* Holds initialization info to communicate with adapter */
1142         dma_addr_t              init_pa;        /* Holds physical address of the init struct */
1143
1144         u32                     *host_rrq;      /* response queue
1145                                                  * if AAC_COMM_MESSAGE_TYPE1 */
1146
1147         dma_addr_t              host_rrq_pa;    /* phys. address */
1148         /* index into rrq buffer */
1149         u32                     host_rrq_idx[AAC_MAX_MSIX];
1150         atomic_t                rrq_outstanding[AAC_MAX_MSIX];
1151         u32                     fibs_pushed_no;
1152         struct pci_dev          *pdev;          /* Our PCI interface */
1153         void *                  printfbuf;      /* pointer to buffer used for printf's from the adapter */
1154         void *                  comm_addr;      /* Base address of Comm area */
1155         dma_addr_t              comm_phys;      /* Physical Address of Comm area */
1156         size_t                  comm_size;
1157
1158         struct Scsi_Host        *scsi_host_ptr;
1159         int                     maximum_num_containers;
1160         int                     maximum_num_physicals;
1161         int                     maximum_num_channels;
1162         struct fsa_dev_info     *fsa_dev;
1163         struct task_struct      *thread;
1164         int                     cardtype;
1165
1166         /*
1167          *      The following is the device specific extension.
1168          */
1169 #ifndef AAC_MIN_FOOTPRINT_SIZE
1170 #       define AAC_MIN_FOOTPRINT_SIZE 8192
1171 #       define AAC_MIN_SRC_BAR0_SIZE 0x400000
1172 #       define AAC_MIN_SRC_BAR1_SIZE 0x800
1173 #       define AAC_MIN_SRCV_BAR0_SIZE 0x100000
1174 #       define AAC_MIN_SRCV_BAR1_SIZE 0x400
1175 #endif
1176         union
1177         {
1178                 struct sa_registers __iomem *sa;
1179                 struct rx_registers __iomem *rx;
1180                 struct rkt_registers __iomem *rkt;
1181                 struct {
1182                         struct src_registers __iomem *bar0;
1183                         char __iomem *bar1;
1184                 } src;
1185         } regs;
1186         volatile void __iomem *base, *dbg_base_mapped;
1187         volatile struct rx_inbound __iomem *IndexRegs;
1188         u32                     OIMR; /* Mask Register Cache */
1189         /*
1190          *      AIF thread states
1191          */
1192         u32                     aif_thread;
1193         struct aac_adapter_info adapter_info;
1194         struct aac_supplement_adapter_info supplement_adapter_info;
1195         /* These are in adapter info but they are in the io flow so
1196          * lets break them out so we don't have to do an AND to check them
1197          */
1198         u8                      nondasd_support;
1199         u8                      jbod;
1200         u8                      cache_protected;
1201         u8                      dac_support;
1202         u8                      needs_dac;
1203         u8                      raid_scsi_mode;
1204         u8                      comm_interface;
1205 #       define AAC_COMM_PRODUCER 0
1206 #       define AAC_COMM_MESSAGE  1
1207 #       define AAC_COMM_MESSAGE_TYPE1   3
1208 #       define AAC_COMM_MESSAGE_TYPE2   4
1209         u8                      raw_io_interface;
1210         u8                      raw_io_64;
1211         u8                      printf_enabled;
1212         u8                      in_reset;
1213         u8                      msi;
1214         int                     management_fib_count;
1215         spinlock_t              manage_lock;
1216         spinlock_t              sync_lock;
1217         int                     sync_mode;
1218         struct fib              *sync_fib;
1219         struct list_head        sync_fib_list;
1220         u32                     doorbell_mask;
1221         u32                     max_msix;       /* max. MSI-X vectors */
1222         u32                     vector_cap;     /* MSI-X vector capab.*/
1223         int                     msi_enabled;    /* MSI/MSI-X enabled */
1224         struct msix_entry       msixentry[AAC_MAX_MSIX];
1225         struct aac_msix_ctx     aac_msix[AAC_MAX_MSIX]; /* context */
1226         u8                      adapter_shutdown;
1227 };
1228
1229 #define aac_adapter_interrupt(dev) \
1230         (dev)->a_ops.adapter_interrupt(dev)
1231
1232 #define aac_adapter_notify(dev, event) \
1233         (dev)->a_ops.adapter_notify(dev, event)
1234
1235 #define aac_adapter_disable_int(dev) \
1236         (dev)->a_ops.adapter_disable_int(dev)
1237
1238 #define aac_adapter_enable_int(dev) \
1239         (dev)->a_ops.adapter_enable_int(dev)
1240
1241 #define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \
1242         (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4)
1243
1244 #define aac_adapter_check_health(dev) \
1245         (dev)->a_ops.adapter_check_health(dev)
1246
1247 #define aac_adapter_restart(dev,bled) \
1248         (dev)->a_ops.adapter_restart(dev,bled)
1249
1250 #define aac_adapter_ioremap(dev, size) \
1251         (dev)->a_ops.adapter_ioremap(dev, size)
1252
1253 #define aac_adapter_deliver(fib) \
1254         ((fib)->dev)->a_ops.adapter_deliver(fib)
1255
1256 #define aac_adapter_bounds(dev,cmd,lba) \
1257         dev->a_ops.adapter_bounds(dev,cmd,lba)
1258
1259 #define aac_adapter_read(fib,cmd,lba,count) \
1260         ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count)
1261
1262 #define aac_adapter_write(fib,cmd,lba,count,fua) \
1263         ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua)
1264
1265 #define aac_adapter_scsi(fib,cmd) \
1266         ((fib)->dev)->a_ops.adapter_scsi(fib,cmd)
1267
1268 #define aac_adapter_comm(dev,comm) \
1269         (dev)->a_ops.adapter_comm(dev, comm)
1270
1271 #define FIB_CONTEXT_FLAG_TIMED_OUT              (0x00000001)
1272 #define FIB_CONTEXT_FLAG                        (0x00000002)
1273 #define FIB_CONTEXT_FLAG_WAIT                   (0x00000004)
1274 #define FIB_CONTEXT_FLAG_FASTRESP               (0x00000008)
1275
1276 /*
1277  *      Define the command values
1278  */
1279
1280 #define         Null                    0
1281 #define         GetAttributes           1
1282 #define         SetAttributes           2
1283 #define         Lookup                  3
1284 #define         ReadLink                4
1285 #define         Read                    5
1286 #define         Write                   6
1287 #define         Create                  7
1288 #define         MakeDirectory           8
1289 #define         SymbolicLink            9
1290 #define         MakeNode                10
1291 #define         Removex                 11
1292 #define         RemoveDirectoryx        12
1293 #define         Rename                  13
1294 #define         Link                    14
1295 #define         ReadDirectory           15
1296 #define         ReadDirectoryPlus       16
1297 #define         FileSystemStatus        17
1298 #define         FileSystemInfo          18
1299 #define         PathConfigure           19
1300 #define         Commit                  20
1301 #define         Mount                   21
1302 #define         UnMount                 22
1303 #define         Newfs                   23
1304 #define         FsCheck                 24
1305 #define         FsSync                  25
1306 #define         SimReadWrite            26
1307 #define         SetFileSystemStatus     27
1308 #define         BlockRead               28
1309 #define         BlockWrite              29
1310 #define         NvramIoctl              30
1311 #define         FsSyncWait              31
1312 #define         ClearArchiveBit         32
1313 #define         SetAcl                  33
1314 #define         GetAcl                  34
1315 #define         AssignAcl               35
1316 #define         FaultInsertion          36      /* Fault Insertion Command */
1317 #define         CrazyCache              37      /* Crazycache */
1318
1319 #define         MAX_FSACOMMAND_NUM      38
1320
1321
1322 /*
1323  *      Define the status returns. These are very unixlike although
1324  *      most are not in fact used
1325  */
1326
1327 #define         ST_OK           0
1328 #define         ST_PERM         1
1329 #define         ST_NOENT        2
1330 #define         ST_IO           5
1331 #define         ST_NXIO         6
1332 #define         ST_E2BIG        7
1333 #define         ST_ACCES        13
1334 #define         ST_EXIST        17
1335 #define         ST_XDEV         18
1336 #define         ST_NODEV        19
1337 #define         ST_NOTDIR       20
1338 #define         ST_ISDIR        21
1339 #define         ST_INVAL        22
1340 #define         ST_FBIG         27
1341 #define         ST_NOSPC        28
1342 #define         ST_ROFS         30
1343 #define         ST_MLINK        31
1344 #define         ST_WOULDBLOCK   35
1345 #define         ST_NAMETOOLONG  63
1346 #define         ST_NOTEMPTY     66
1347 #define         ST_DQUOT        69
1348 #define         ST_STALE        70
1349 #define         ST_REMOTE       71
1350 #define         ST_NOT_READY    72
1351 #define         ST_BADHANDLE    10001
1352 #define         ST_NOT_SYNC     10002
1353 #define         ST_BAD_COOKIE   10003
1354 #define         ST_NOTSUPP      10004
1355 #define         ST_TOOSMALL     10005
1356 #define         ST_SERVERFAULT  10006
1357 #define         ST_BADTYPE      10007
1358 #define         ST_JUKEBOX      10008
1359 #define         ST_NOTMOUNTED   10009
1360 #define         ST_MAINTMODE    10010
1361 #define         ST_STALEACL     10011
1362
1363 /*
1364  *      On writes how does the client want the data written.
1365  */
1366
1367 #define CACHE_CSTABLE           1
1368 #define CACHE_UNSTABLE          2
1369
1370 /*
1371  *      Lets the client know at which level the data was committed on
1372  *      a write request
1373  */
1374
1375 #define CMFILE_SYNCH_NVRAM      1
1376 #define CMDATA_SYNCH_NVRAM      2
1377 #define CMFILE_SYNCH            3
1378 #define CMDATA_SYNCH            4
1379 #define CMUNSTABLE              5
1380
1381 #define RIO_TYPE_WRITE                  0x0000
1382 #define RIO_TYPE_READ                   0x0001
1383 #define RIO_SUREWRITE                   0x0008
1384
1385 #define RIO2_IO_TYPE                    0x0003
1386 #define RIO2_IO_TYPE_WRITE              0x0000
1387 #define RIO2_IO_TYPE_READ               0x0001
1388 #define RIO2_IO_TYPE_VERIFY             0x0002
1389 #define RIO2_IO_ERROR                   0x0004
1390 #define RIO2_IO_SUREWRITE               0x0008
1391 #define RIO2_SGL_CONFORMANT             0x0010
1392 #define RIO2_SG_FORMAT                  0xF000
1393 #define RIO2_SG_FORMAT_ARC              0x0000
1394 #define RIO2_SG_FORMAT_SRL              0x1000
1395 #define RIO2_SG_FORMAT_IEEE1212         0x2000
1396
1397 struct aac_read
1398 {
1399         __le32          command;
1400         __le32          cid;
1401         __le32          block;
1402         __le32          count;
1403         struct sgmap    sg;     // Must be last in struct because it is variable
1404 };
1405
1406 struct aac_read64
1407 {
1408         __le32          command;
1409         __le16          cid;
1410         __le16          sector_count;
1411         __le32          block;
1412         __le16          pad;
1413         __le16          flags;
1414         struct sgmap64  sg;     // Must be last in struct because it is variable
1415 };
1416
1417 struct aac_read_reply
1418 {
1419         __le32          status;
1420         __le32          count;
1421 };
1422
1423 struct aac_write
1424 {
1425         __le32          command;
1426         __le32          cid;
1427         __le32          block;
1428         __le32          count;
1429         __le32          stable; // Not used
1430         struct sgmap    sg;     // Must be last in struct because it is variable
1431 };
1432
1433 struct aac_write64
1434 {
1435         __le32          command;
1436         __le16          cid;
1437         __le16          sector_count;
1438         __le32          block;
1439         __le16          pad;
1440         __le16          flags;
1441         struct sgmap64  sg;     // Must be last in struct because it is variable
1442 };
1443 struct aac_write_reply
1444 {
1445         __le32          status;
1446         __le32          count;
1447         __le32          committed;
1448 };
1449
1450 struct aac_raw_io
1451 {
1452         __le32          block[2];
1453         __le32          count;
1454         __le16          cid;
1455         __le16          flags;          /* 00 W, 01 R */
1456         __le16          bpTotal;        /* reserved for F/W use */
1457         __le16          bpComplete;     /* reserved for F/W use */
1458         struct sgmapraw sg;
1459 };
1460
1461 struct aac_raw_io2 {
1462         __le32          blockLow;
1463         __le32          blockHigh;
1464         __le32          byteCount;
1465         __le16          cid;
1466         __le16          flags;          /* RIO2 flags */
1467         __le32          sgeFirstSize;   /* size of first sge el. */
1468         __le32          sgeNominalSize; /* size of 2nd sge el. (if conformant) */
1469         u8              sgeCnt;         /* only 8 bits required */
1470         u8              bpTotal;        /* reserved for F/W use */
1471         u8              bpComplete;     /* reserved for F/W use */
1472         u8              sgeFirstIndex;  /* reserved for F/W use */
1473         u8              unused[4];
1474         struct sge_ieee1212     sge[1];
1475 };
1476
1477 #define CT_FLUSH_CACHE 129
1478 struct aac_synchronize {
1479         __le32          command;        /* VM_ContainerConfig */
1480         __le32          type;           /* CT_FLUSH_CACHE */
1481         __le32          cid;
1482         __le32          parm1;
1483         __le32          parm2;
1484         __le32          parm3;
1485         __le32          parm4;
1486         __le32          count;  /* sizeof(((struct aac_synchronize_reply *)NULL)->data) */
1487 };
1488
1489 struct aac_synchronize_reply {
1490         __le32          dummy0;
1491         __le32          dummy1;
1492         __le32          status; /* CT_OK */
1493         __le32          parm1;
1494         __le32          parm2;
1495         __le32          parm3;
1496         __le32          parm4;
1497         __le32          parm5;
1498         u8              data[16];
1499 };
1500
1501 #define CT_POWER_MANAGEMENT     245
1502 #define CT_PM_START_UNIT        2
1503 #define CT_PM_STOP_UNIT         3
1504 #define CT_PM_UNIT_IMMEDIATE    1
1505 struct aac_power_management {
1506         __le32          command;        /* VM_ContainerConfig */
1507         __le32          type;           /* CT_POWER_MANAGEMENT */
1508         __le32          sub;            /* CT_PM_* */
1509         __le32          cid;
1510         __le32          parm;           /* CT_PM_sub_* */
1511 };
1512
1513 #define CT_PAUSE_IO    65
1514 #define CT_RELEASE_IO  66
1515 struct aac_pause {
1516         __le32          command;        /* VM_ContainerConfig */
1517         __le32          type;           /* CT_PAUSE_IO */
1518         __le32          timeout;        /* 10ms ticks */
1519         __le32          min;
1520         __le32          noRescan;
1521         __le32          parm3;
1522         __le32          parm4;
1523         __le32          count;  /* sizeof(((struct aac_pause_reply *)NULL)->data) */
1524 };
1525
1526 struct aac_srb
1527 {
1528         __le32          function;
1529         __le32          channel;
1530         __le32          id;
1531         __le32          lun;
1532         __le32          timeout;
1533         __le32          flags;
1534         __le32          count;          // Data xfer size
1535         __le32          retry_limit;
1536         __le32          cdb_size;
1537         u8              cdb[16];
1538         struct  sgmap   sg;
1539 };
1540
1541 /*
1542  * This and associated data structs are used by the
1543  * ioctl caller and are in cpu order.
1544  */
1545 struct user_aac_srb
1546 {
1547         u32             function;
1548         u32             channel;
1549         u32             id;
1550         u32             lun;
1551         u32             timeout;
1552         u32             flags;
1553         u32             count;          // Data xfer size
1554         u32             retry_limit;
1555         u32             cdb_size;
1556         u8              cdb[16];
1557         struct  user_sgmap      sg;
1558 };
1559
1560 #define         AAC_SENSE_BUFFERSIZE     30
1561
1562 struct aac_srb_reply
1563 {
1564         __le32          status;
1565         __le32          srb_status;
1566         __le32          scsi_status;
1567         __le32          data_xfer_length;
1568         __le32          sense_data_size;
1569         u8              sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE
1570 };
1571 /*
1572  * SRB Flags
1573  */
1574 #define         SRB_NoDataXfer           0x0000
1575 #define         SRB_DisableDisconnect    0x0004
1576 #define         SRB_DisableSynchTransfer 0x0008
1577 #define         SRB_BypassFrozenQueue    0x0010
1578 #define         SRB_DisableAutosense     0x0020
1579 #define         SRB_DataIn               0x0040
1580 #define         SRB_DataOut              0x0080
1581
1582 /*
1583  * SRB Functions - set in aac_srb->function
1584  */
1585 #define SRBF_ExecuteScsi        0x0000
1586 #define SRBF_ClaimDevice        0x0001
1587 #define SRBF_IO_Control         0x0002
1588 #define SRBF_ReceiveEvent       0x0003
1589 #define SRBF_ReleaseQueue       0x0004
1590 #define SRBF_AttachDevice       0x0005
1591 #define SRBF_ReleaseDevice      0x0006
1592 #define SRBF_Shutdown           0x0007
1593 #define SRBF_Flush              0x0008
1594 #define SRBF_AbortCommand       0x0010
1595 #define SRBF_ReleaseRecovery    0x0011
1596 #define SRBF_ResetBus           0x0012
1597 #define SRBF_ResetDevice        0x0013
1598 #define SRBF_TerminateIO        0x0014
1599 #define SRBF_FlushQueue         0x0015
1600 #define SRBF_RemoveDevice       0x0016
1601 #define SRBF_DomainValidation   0x0017
1602
1603 /*
1604  * SRB SCSI Status - set in aac_srb->scsi_status
1605  */
1606 #define SRB_STATUS_PENDING                  0x00
1607 #define SRB_STATUS_SUCCESS                  0x01
1608 #define SRB_STATUS_ABORTED                  0x02
1609 #define SRB_STATUS_ABORT_FAILED             0x03
1610 #define SRB_STATUS_ERROR                    0x04
1611 #define SRB_STATUS_BUSY                     0x05
1612 #define SRB_STATUS_INVALID_REQUEST          0x06
1613 #define SRB_STATUS_INVALID_PATH_ID          0x07
1614 #define SRB_STATUS_NO_DEVICE                0x08
1615 #define SRB_STATUS_TIMEOUT                  0x09
1616 #define SRB_STATUS_SELECTION_TIMEOUT        0x0A
1617 #define SRB_STATUS_COMMAND_TIMEOUT          0x0B
1618 #define SRB_STATUS_MESSAGE_REJECTED         0x0D
1619 #define SRB_STATUS_BUS_RESET                0x0E
1620 #define SRB_STATUS_PARITY_ERROR             0x0F
1621 #define SRB_STATUS_REQUEST_SENSE_FAILED     0x10
1622 #define SRB_STATUS_NO_HBA                   0x11
1623 #define SRB_STATUS_DATA_OVERRUN             0x12
1624 #define SRB_STATUS_UNEXPECTED_BUS_FREE      0x13
1625 #define SRB_STATUS_PHASE_SEQUENCE_FAILURE   0x14
1626 #define SRB_STATUS_BAD_SRB_BLOCK_LENGTH     0x15
1627 #define SRB_STATUS_REQUEST_FLUSHED          0x16
1628 #define SRB_STATUS_DELAYED_RETRY            0x17
1629 #define SRB_STATUS_INVALID_LUN              0x20
1630 #define SRB_STATUS_INVALID_TARGET_ID        0x21
1631 #define SRB_STATUS_BAD_FUNCTION             0x22
1632 #define SRB_STATUS_ERROR_RECOVERY           0x23
1633 #define SRB_STATUS_NOT_STARTED              0x24
1634 #define SRB_STATUS_NOT_IN_USE               0x30
1635 #define SRB_STATUS_FORCE_ABORT              0x31
1636 #define SRB_STATUS_DOMAIN_VALIDATION_FAIL   0x32
1637
1638 /*
1639  * Object-Server / Volume-Manager Dispatch Classes
1640  */
1641
1642 #define         VM_Null                 0
1643 #define         VM_NameServe            1
1644 #define         VM_ContainerConfig      2
1645 #define         VM_Ioctl                3
1646 #define         VM_FilesystemIoctl      4
1647 #define         VM_CloseAll             5
1648 #define         VM_CtBlockRead          6
1649 #define         VM_CtBlockWrite         7
1650 #define         VM_SliceBlockRead       8       /* raw access to configured "storage objects" */
1651 #define         VM_SliceBlockWrite      9
1652 #define         VM_DriveBlockRead       10      /* raw access to physical devices */
1653 #define         VM_DriveBlockWrite      11
1654 #define         VM_EnclosureMgt         12      /* enclosure management */
1655 #define         VM_Unused               13      /* used to be diskset management */
1656 #define         VM_CtBlockVerify        14
1657 #define         VM_CtPerf               15      /* performance test */
1658 #define         VM_CtBlockRead64        16
1659 #define         VM_CtBlockWrite64       17
1660 #define         VM_CtBlockVerify64      18
1661 #define         VM_CtHostRead64         19
1662 #define         VM_CtHostWrite64        20
1663 #define         VM_DrvErrTblLog         21
1664 #define         VM_NameServe64          22
1665 #define         VM_NameServeAllBlk      30
1666
1667 #define         MAX_VMCOMMAND_NUM       23      /* used for sizing stats array - leave last */
1668
1669 /*
1670  *      Descriptive information (eg, vital stats)
1671  *      that a content manager might report.  The
1672  *      FileArray filesystem component is one example
1673  *      of a content manager.  Raw mode might be
1674  *      another.
1675  */
1676
1677 struct aac_fsinfo {
1678         __le32  fsTotalSize;    /* Consumed by fs, incl. metadata */
1679         __le32  fsBlockSize;
1680         __le32  fsFragSize;
1681         __le32  fsMaxExtendSize;
1682         __le32  fsSpaceUnits;
1683         __le32  fsMaxNumFiles;
1684         __le32  fsNumFreeFiles;
1685         __le32  fsInodeDensity;
1686 };      /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1687
1688 struct  aac_blockdevinfo {
1689         __le32  block_size;
1690 };
1691
1692 union aac_contentinfo {
1693         struct  aac_fsinfo              filesys;
1694         struct  aac_blockdevinfo        bdevinfo;
1695 };
1696
1697 /*
1698  *      Query for Container Configuration Status
1699  */
1700
1701 #define CT_GET_CONFIG_STATUS 147
1702 struct aac_get_config_status {
1703         __le32          command;        /* VM_ContainerConfig */
1704         __le32          type;           /* CT_GET_CONFIG_STATUS */
1705         __le32          parm1;
1706         __le32          parm2;
1707         __le32          parm3;
1708         __le32          parm4;
1709         __le32          parm5;
1710         __le32          count;  /* sizeof(((struct aac_get_config_status_resp *)NULL)->data) */
1711 };
1712
1713 #define CFACT_CONTINUE 0
1714 #define CFACT_PAUSE    1
1715 #define CFACT_ABORT    2
1716 struct aac_get_config_status_resp {
1717         __le32          response; /* ST_OK */
1718         __le32          dummy0;
1719         __le32          status; /* CT_OK */
1720         __le32          parm1;
1721         __le32          parm2;
1722         __le32          parm3;
1723         __le32          parm4;
1724         __le32          parm5;
1725         struct {
1726                 __le32  action; /* CFACT_CONTINUE, CFACT_PAUSE or CFACT_ABORT */
1727                 __le16  flags;
1728                 __le16  count;
1729         }               data;
1730 };
1731
1732 /*
1733  *      Accept the configuration as-is
1734  */
1735
1736 #define CT_COMMIT_CONFIG 152
1737
1738 struct aac_commit_config {
1739         __le32          command;        /* VM_ContainerConfig */
1740         __le32          type;           /* CT_COMMIT_CONFIG */
1741 };
1742
1743 /*
1744  *      Query for Container Configuration Status
1745  */
1746
1747 #define CT_GET_CONTAINER_COUNT 4
1748 struct aac_get_container_count {
1749         __le32          command;        /* VM_ContainerConfig */
1750         __le32          type;           /* CT_GET_CONTAINER_COUNT */
1751 };
1752
1753 struct aac_get_container_count_resp {
1754         __le32          response; /* ST_OK */
1755         __le32          dummy0;
1756         __le32          MaxContainers;
1757         __le32          ContainerSwitchEntries;
1758         __le32          MaxPartitions;
1759         __le32          MaxSimpleVolumes;
1760 };
1761
1762
1763 /*
1764  *      Query for "mountable" objects, ie, objects that are typically
1765  *      associated with a drive letter on the client (host) side.
1766  */
1767
1768 struct aac_mntent {
1769         __le32                  oid;
1770         u8                      name[16];       /* if applicable */
1771         struct creation_info    create_info;    /* if applicable */
1772         __le32                  capacity;
1773         __le32                  vol;            /* substrate structure */
1774         __le32                  obj;            /* FT_FILESYS, etc. */
1775         __le32                  state;          /* unready for mounting,
1776                                                    readonly, etc. */
1777         union aac_contentinfo   fileinfo;       /* Info specific to content
1778                                                    manager (eg, filesystem) */
1779         __le32                  altoid;         /* != oid <==> snapshot or
1780                                                    broken mirror exists */
1781         __le32                  capacityhigh;
1782 };
1783
1784 #define FSCS_NOTCLEAN   0x0001  /* fsck is necessary before mounting */
1785 #define FSCS_READONLY   0x0002  /* possible result of broken mirror */
1786 #define FSCS_HIDDEN     0x0004  /* should be ignored - set during a clear */
1787 #define FSCS_NOT_READY  0x0008  /* Array spinning up to fulfil request */
1788
1789 struct aac_query_mount {
1790         __le32          command;
1791         __le32          type;
1792         __le32          count;
1793 };
1794
1795 struct aac_mount {
1796         __le32          status;
1797         __le32          type;           /* should be same as that requested */
1798         __le32          count;
1799         struct aac_mntent mnt[1];
1800 };
1801
1802 #define CT_READ_NAME 130
1803 struct aac_get_name {
1804         __le32          command;        /* VM_ContainerConfig */
1805         __le32          type;           /* CT_READ_NAME */
1806         __le32          cid;
1807         __le32          parm1;
1808         __le32          parm2;
1809         __le32          parm3;
1810         __le32          parm4;
1811         __le32          count;  /* sizeof(((struct aac_get_name_resp *)NULL)->data) */
1812 };
1813
1814 struct aac_get_name_resp {
1815         __le32          dummy0;
1816         __le32          dummy1;
1817         __le32          status; /* CT_OK */
1818         __le32          parm1;
1819         __le32          parm2;
1820         __le32          parm3;
1821         __le32          parm4;
1822         __le32          parm5;
1823         u8              data[16];
1824 };
1825
1826 #define CT_CID_TO_32BITS_UID 165
1827 struct aac_get_serial {
1828         __le32          command;        /* VM_ContainerConfig */
1829         __le32          type;           /* CT_CID_TO_32BITS_UID */
1830         __le32          cid;
1831 };
1832
1833 struct aac_get_serial_resp {
1834         __le32          dummy0;
1835         __le32          dummy1;
1836         __le32          status; /* CT_OK */
1837         __le32          uid;
1838 };
1839
1840 /*
1841  * The following command is sent to shut down each container.
1842  */
1843
1844 struct aac_close {
1845         __le32  command;
1846         __le32  cid;
1847 };
1848
1849 struct aac_query_disk
1850 {
1851         s32     cnum;
1852         s32     bus;
1853         s32     id;
1854         s32     lun;
1855         u32     valid;
1856         u32     locked;
1857         u32     deleted;
1858         s32     instance;
1859         s8      name[10];
1860         u32     unmapped;
1861 };
1862
1863 struct aac_delete_disk {
1864         u32     disknum;
1865         u32     cnum;
1866 };
1867
1868 struct fib_ioctl
1869 {
1870         u32     fibctx;
1871         s32     wait;
1872         char    __user *fib;
1873 };
1874
1875 struct revision
1876 {
1877         u32 compat;
1878         __le32 version;
1879         __le32 build;
1880 };
1881
1882
1883 /*
1884  *      Ugly - non Linux like ioctl coding for back compat.
1885  */
1886
1887 #define CTL_CODE(function, method) (                 \
1888     (4<< 16) | ((function) << 2) | (method) \
1889 )
1890
1891 /*
1892  *      Define the method codes for how buffers are passed for I/O and FS
1893  *      controls
1894  */
1895
1896 #define METHOD_BUFFERED                 0
1897 #define METHOD_NEITHER                  3
1898
1899 /*
1900  *      Filesystem ioctls
1901  */
1902
1903 #define FSACTL_SENDFIB                          CTL_CODE(2050, METHOD_BUFFERED)
1904 #define FSACTL_SEND_RAW_SRB                     CTL_CODE(2067, METHOD_BUFFERED)
1905 #define FSACTL_DELETE_DISK                      0x163
1906 #define FSACTL_QUERY_DISK                       0x173
1907 #define FSACTL_OPEN_GET_ADAPTER_FIB             CTL_CODE(2100, METHOD_BUFFERED)
1908 #define FSACTL_GET_NEXT_ADAPTER_FIB             CTL_CODE(2101, METHOD_BUFFERED)
1909 #define FSACTL_CLOSE_GET_ADAPTER_FIB            CTL_CODE(2102, METHOD_BUFFERED)
1910 #define FSACTL_MINIPORT_REV_CHECK               CTL_CODE(2107, METHOD_BUFFERED)
1911 #define FSACTL_GET_PCI_INFO                     CTL_CODE(2119, METHOD_BUFFERED)
1912 #define FSACTL_FORCE_DELETE_DISK                CTL_CODE(2120, METHOD_NEITHER)
1913 #define FSACTL_GET_CONTAINERS                   2131
1914 #define FSACTL_SEND_LARGE_FIB                   CTL_CODE(2138, METHOD_BUFFERED)
1915
1916
1917 struct aac_common
1918 {
1919         /*
1920          *      If this value is set to 1 then interrupt moderation will occur
1921          *      in the base commuication support.
1922          */
1923         u32 irq_mod;
1924         u32 peak_fibs;
1925         u32 zero_fibs;
1926         u32 fib_timeouts;
1927         /*
1928          *      Statistical counters in debug mode
1929          */
1930 #ifdef DBG
1931         u32 FibsSent;
1932         u32 FibRecved;
1933         u32 NoResponseSent;
1934         u32 NoResponseRecved;
1935         u32 AsyncSent;
1936         u32 AsyncRecved;
1937         u32 NormalSent;
1938         u32 NormalRecved;
1939 #endif
1940 };
1941
1942 extern struct aac_common aac_config;
1943
1944
1945 /*
1946  *      The following macro is used when sending and receiving FIBs. It is
1947  *      only used for debugging.
1948  */
1949
1950 #ifdef DBG
1951 #define FIB_COUNTER_INCREMENT(counter)          (counter)++
1952 #else
1953 #define FIB_COUNTER_INCREMENT(counter)
1954 #endif
1955
1956 /*
1957  *      Adapter direct commands
1958  *      Monitor/Kernel API
1959  */
1960
1961 #define BREAKPOINT_REQUEST              0x00000004
1962 #define INIT_STRUCT_BASE_ADDRESS        0x00000005
1963 #define READ_PERMANENT_PARAMETERS       0x0000000a
1964 #define WRITE_PERMANENT_PARAMETERS      0x0000000b
1965 #define HOST_CRASHING                   0x0000000d
1966 #define SEND_SYNCHRONOUS_FIB            0x0000000c
1967 #define COMMAND_POST_RESULTS            0x00000014
1968 #define GET_ADAPTER_PROPERTIES          0x00000019
1969 #define GET_DRIVER_BUFFER_PROPERTIES    0x00000023
1970 #define RCV_TEMP_READINGS               0x00000025
1971 #define GET_COMM_PREFERRED_SETTINGS     0x00000026
1972 #define IOP_RESET                       0x00001000
1973 #define IOP_RESET_ALWAYS                0x00001001
1974 #define RE_INIT_ADAPTER                 0x000000ee
1975
1976 /*
1977  *      Adapter Status Register
1978  *
1979  *  Phase Staus mailbox is 32bits:
1980  *      <31:16> = Phase Status
1981  *      <15:0>  = Phase
1982  *
1983  *      The adapter reports is present state through the phase.  Only
1984  *      a single phase should be ever be set.  Each phase can have multiple
1985  *      phase status bits to provide more detailed information about the
1986  *      state of the board.  Care should be taken to ensure that any phase
1987  *      status bits that are set when changing the phase are also valid
1988  *      for the new phase or be cleared out.  Adapter software (monitor,
1989  *      iflash, kernel) is responsible for properly maintining the phase
1990  *      status mailbox when it is running.
1991  *
1992  *      MONKER_API Phases
1993  *
1994  *      Phases are bit oriented.  It is NOT valid  to have multiple bits set
1995  */
1996
1997 #define SELF_TEST_FAILED                0x00000004
1998 #define MONITOR_PANIC                   0x00000020
1999 #define KERNEL_UP_AND_RUNNING           0x00000080
2000 #define KERNEL_PANIC                    0x00000100
2001 #define FLASH_UPD_PENDING               0x00002000
2002 #define FLASH_UPD_SUCCESS               0x00004000
2003 #define FLASH_UPD_FAILED                0x00008000
2004 #define FWUPD_TIMEOUT                   (5 * 60)
2005
2006 /*
2007  *      Doorbell bit defines
2008  */
2009
2010 #define DoorBellSyncCmdAvailable        (1<<0)  /* Host -> Adapter */
2011 #define DoorBellPrintfDone              (1<<5)  /* Host -> Adapter */
2012 #define DoorBellAdapterNormCmdReady     (1<<1)  /* Adapter -> Host */
2013 #define DoorBellAdapterNormRespReady    (1<<2)  /* Adapter -> Host */
2014 #define DoorBellAdapterNormCmdNotFull   (1<<3)  /* Adapter -> Host */
2015 #define DoorBellAdapterNormRespNotFull  (1<<4)  /* Adapter -> Host */
2016 #define DoorBellPrintfReady             (1<<5)  /* Adapter -> Host */
2017 #define DoorBellAifPending              (1<<6)  /* Adapter -> Host */
2018
2019 /* PMC specific outbound doorbell bits */
2020 #define PmDoorBellResponseSent          (1<<1)  /* Adapter -> Host */
2021
2022 /*
2023  *      For FIB communication, we need all of the following things
2024  *      to send back to the user.
2025  */
2026
2027 #define         AifCmdEventNotify       1       /* Notify of event */
2028 #define                 AifEnConfigChange       3       /* Adapter configuration change */
2029 #define                 AifEnContainerChange    4       /* Container configuration change */
2030 #define                 AifEnDeviceFailure      5       /* SCSI device failed */
2031 #define                 AifEnEnclosureManagement 13     /* EM_DRIVE_* */
2032 #define                         EM_DRIVE_INSERTION      31
2033 #define                         EM_DRIVE_REMOVAL        32
2034 #define                 EM_SES_DRIVE_INSERTION  33
2035 #define                 EM_SES_DRIVE_REMOVAL    26
2036 #define                 AifEnBatteryEvent       14      /* Change in Battery State */
2037 #define                 AifEnAddContainer       15      /* A new array was created */
2038 #define                 AifEnDeleteContainer    16      /* A container was deleted */
2039 #define                 AifEnExpEvent           23      /* Firmware Event Log */
2040 #define                 AifExeFirmwarePanic     3       /* Firmware Event Panic */
2041 #define                 AifHighPriority         3       /* Highest Priority Event */
2042 #define                 AifEnAddJBOD            30      /* JBOD created */
2043 #define                 AifEnDeleteJBOD         31      /* JBOD deleted */
2044
2045 #define         AifCmdJobProgress       2       /* Progress report */
2046 #define                 AifJobCtrZero   101     /* Array Zero progress */
2047 #define                 AifJobStsSuccess 1      /* Job completes */
2048 #define                 AifJobStsRunning 102    /* Job running */
2049 #define         AifCmdAPIReport         3       /* Report from other user of API */
2050 #define         AifCmdDriverNotify      4       /* Notify host driver of event */
2051 #define                 AifDenMorphComplete 200 /* A morph operation completed */
2052 #define                 AifDenVolumeExtendComplete 201 /* A volume extend completed */
2053 #define         AifReqJobList           100     /* Gets back complete job list */
2054 #define         AifReqJobsForCtr        101     /* Gets back jobs for specific container */
2055 #define         AifReqJobsForScsi       102     /* Gets back jobs for specific SCSI device */
2056 #define         AifReqJobReport         103     /* Gets back a specific job report or list of them */
2057 #define         AifReqTerminateJob      104     /* Terminates job */
2058 #define         AifReqSuspendJob        105     /* Suspends a job */
2059 #define         AifReqResumeJob         106     /* Resumes a job */
2060 #define         AifReqSendAPIReport     107     /* API generic report requests */
2061 #define         AifReqAPIJobStart       108     /* Start a job from the API */
2062 #define         AifReqAPIJobUpdate      109     /* Update a job report from the API */
2063 #define         AifReqAPIJobFinish      110     /* Finish a job from the API */
2064
2065 /* PMC NEW COMM: Request the event data */
2066 #define         AifReqEvent             200
2067
2068 /* RAW device deleted */
2069 #define         AifRawDeviceRemove      203
2070
2071 /*
2072  *      Adapter Initiated FIB command structures. Start with the adapter
2073  *      initiated FIBs that really come from the adapter, and get responded
2074  *      to by the host.
2075  */
2076
2077 struct aac_aifcmd {
2078         __le32 command;         /* Tell host what type of notify this is */
2079         __le32 seqnum;          /* To allow ordering of reports (if necessary) */
2080         u8 data[1];             /* Undefined length (from kernel viewpoint) */
2081 };
2082
2083 /**
2084  *      Convert capacity to cylinders
2085  *      accounting for the fact capacity could be a 64 bit value
2086  *
2087  */
2088 static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor)
2089 {
2090         sector_div(capacity, divisor);
2091         return capacity;
2092 }
2093
2094 /* SCp.phase values */
2095 #define AAC_OWNER_MIDLEVEL      0x101
2096 #define AAC_OWNER_LOWLEVEL      0x102
2097 #define AAC_OWNER_ERROR_HANDLER 0x103
2098 #define AAC_OWNER_FIRMWARE      0x106
2099
2100 const char *aac_driverinfo(struct Scsi_Host *);
2101 struct fib *aac_fib_alloc(struct aac_dev *dev);
2102 int aac_fib_setup(struct aac_dev *dev);
2103 void aac_fib_map_free(struct aac_dev *dev);
2104 void aac_fib_free(struct fib * context);
2105 void aac_fib_init(struct fib * context);
2106 void aac_printf(struct aac_dev *dev, u32 val);
2107 int aac_fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt);
2108 int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry);
2109 void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum);
2110 int aac_fib_complete(struct fib * context);
2111 #define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data)
2112 struct aac_dev *aac_init_adapter(struct aac_dev *dev);
2113 void aac_src_access_devreg(struct aac_dev *dev, int mode);
2114 int aac_get_config_status(struct aac_dev *dev, int commit_flag);
2115 int aac_get_containers(struct aac_dev *dev);
2116 int aac_scsi_cmd(struct scsi_cmnd *cmd);
2117 int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg);
2118 #ifndef shost_to_class
2119 #define shost_to_class(shost) &shost->shost_dev
2120 #endif
2121 ssize_t aac_get_serial_number(struct device *dev, char *buf);
2122 int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg);
2123 int aac_rx_init(struct aac_dev *dev);
2124 int aac_rkt_init(struct aac_dev *dev);
2125 int aac_nark_init(struct aac_dev *dev);
2126 int aac_sa_init(struct aac_dev *dev);
2127 int aac_src_init(struct aac_dev *dev);
2128 int aac_srcv_init(struct aac_dev *dev);
2129 int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify);
2130 unsigned int aac_response_normal(struct aac_queue * q);
2131 unsigned int aac_command_normal(struct aac_queue * q);
2132 unsigned int aac_intr_normal(struct aac_dev *dev, u32 Index,
2133                         int isAif, int isFastResponse,
2134                         struct hw_fib *aif_fib);
2135 int aac_reset_adapter(struct aac_dev * dev, int forced);
2136 int aac_check_health(struct aac_dev * dev);
2137 int aac_command_thread(void *data);
2138 int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx);
2139 int aac_fib_adapter_complete(struct fib * fibptr, unsigned short size);
2140 struct aac_driver_ident* aac_get_driver_ident(int devtype);
2141 int aac_get_adapter_info(struct aac_dev* dev);
2142 int aac_send_shutdown(struct aac_dev *dev);
2143 int aac_probe_container(struct aac_dev *dev, int cid);
2144 int _aac_rx_init(struct aac_dev *dev);
2145 int aac_rx_select_comm(struct aac_dev *dev, int comm);
2146 int aac_rx_deliver_producer(struct fib * fib);
2147 char * get_container_type(unsigned type);
2148 extern int numacb;
2149 extern int acbsize;
2150 extern char aac_driver_version[];
2151 extern int startup_timeout;
2152 extern int aif_timeout;
2153 extern int expose_physicals;
2154 extern int aac_reset_devices;
2155 extern int aac_msi;
2156 extern int aac_commit;
2157 extern int update_interval;
2158 extern int check_interval;
2159 extern int aac_check_reset;