Kernel bump from 4.1.3-rt to 4.1.7-rt.
[kvmfornfv.git] / kernel / drivers / pinctrl / mvebu / pinctrl-armada-xp.c
1 /*
2  * Marvell Armada XP pinctrl driver based on mvebu pinctrl core
3  *
4  * Copyright (C) 2012 Marvell
5  *
6  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This file supports the three variants of Armada XP SoCs that are
14  * available: mv78230, mv78260 and mv78460. From a pin muxing
15  * perspective, the mv78230 has 49 MPP pins. The mv78260 and mv78460
16  * both have 67 MPP pins (more GPIOs and address lines for the memory
17  * bus mainly).
18  */
19
20 #include <linux/err.h>
21 #include <linux/init.h>
22 #include <linux/io.h>
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/of.h>
27 #include <linux/of_device.h>
28 #include <linux/pinctrl/pinctrl.h>
29 #include <linux/bitops.h>
30
31 #include "pinctrl-mvebu.h"
32
33 static void __iomem *mpp_base;
34 static u32 *mpp_saved_regs;
35
36 static int armada_xp_mpp_ctrl_get(unsigned pid, unsigned long *config)
37 {
38         return default_mpp_ctrl_get(mpp_base, pid, config);
39 }
40
41 static int armada_xp_mpp_ctrl_set(unsigned pid, unsigned long config)
42 {
43         return default_mpp_ctrl_set(mpp_base, pid, config);
44 }
45
46 enum armada_xp_variant {
47         V_MV78230       = BIT(0),
48         V_MV78260       = BIT(1),
49         V_MV78460       = BIT(2),
50         V_MV78230_PLUS  = (V_MV78230 | V_MV78260 | V_MV78460),
51         V_MV78260_PLUS  = (V_MV78260 | V_MV78460),
52 };
53
54 static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
55         MPP_MODE(0,
56                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
57                  MPP_VAR_FUNCTION(0x1, "ge0", "txclko",     V_MV78230_PLUS),
58                  MPP_VAR_FUNCTION(0x4, "lcd", "d0",         V_MV78230_PLUS)),
59         MPP_MODE(1,
60                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
61                  MPP_VAR_FUNCTION(0x1, "ge0", "txd0",       V_MV78230_PLUS),
62                  MPP_VAR_FUNCTION(0x4, "lcd", "d1",         V_MV78230_PLUS)),
63         MPP_MODE(2,
64                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
65                  MPP_VAR_FUNCTION(0x1, "ge0", "txd1",       V_MV78230_PLUS),
66                  MPP_VAR_FUNCTION(0x4, "lcd", "d2",         V_MV78230_PLUS)),
67         MPP_MODE(3,
68                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
69                  MPP_VAR_FUNCTION(0x1, "ge0", "txd2",       V_MV78230_PLUS),
70                  MPP_VAR_FUNCTION(0x4, "lcd", "d3",         V_MV78230_PLUS)),
71         MPP_MODE(4,
72                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
73                  MPP_VAR_FUNCTION(0x1, "ge0", "txd3",       V_MV78230_PLUS),
74                  MPP_VAR_FUNCTION(0x4, "lcd", "d4",         V_MV78230_PLUS)),
75         MPP_MODE(5,
76                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
77                  MPP_VAR_FUNCTION(0x1, "ge0", "txctl",      V_MV78230_PLUS),
78                  MPP_VAR_FUNCTION(0x4, "lcd", "d5",         V_MV78230_PLUS)),
79         MPP_MODE(6,
80                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
81                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd0",       V_MV78230_PLUS),
82                  MPP_VAR_FUNCTION(0x4, "lcd", "d6",         V_MV78230_PLUS)),
83         MPP_MODE(7,
84                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
85                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd1",       V_MV78230_PLUS),
86                  MPP_VAR_FUNCTION(0x4, "lcd", "d7",         V_MV78230_PLUS)),
87         MPP_MODE(8,
88                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
89                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd2",       V_MV78230_PLUS),
90                  MPP_VAR_FUNCTION(0x4, "lcd", "d8",         V_MV78230_PLUS)),
91         MPP_MODE(9,
92                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
93                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd3",       V_MV78230_PLUS),
94                  MPP_VAR_FUNCTION(0x4, "lcd", "d9",         V_MV78230_PLUS)),
95         MPP_MODE(10,
96                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
97                  MPP_VAR_FUNCTION(0x1, "ge0", "rxctl",      V_MV78230_PLUS),
98                  MPP_VAR_FUNCTION(0x4, "lcd", "d10",        V_MV78230_PLUS)),
99         MPP_MODE(11,
100                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
101                  MPP_VAR_FUNCTION(0x1, "ge0", "rxclk",      V_MV78230_PLUS),
102                  MPP_VAR_FUNCTION(0x4, "lcd", "d11",        V_MV78230_PLUS)),
103         MPP_MODE(12,
104                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
105                  MPP_VAR_FUNCTION(0x1, "ge0", "txd4",       V_MV78230_PLUS),
106                  MPP_VAR_FUNCTION(0x2, "ge1", "clkout",     V_MV78230_PLUS),
107                  MPP_VAR_FUNCTION(0x4, "lcd", "d12",        V_MV78230_PLUS)),
108         MPP_MODE(13,
109                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
110                  MPP_VAR_FUNCTION(0x1, "ge0", "txd5",       V_MV78230_PLUS),
111                  MPP_VAR_FUNCTION(0x2, "ge1", "txd0",       V_MV78230_PLUS),
112                  MPP_VAR_FUNCTION(0x4, "lcd", "d13",        V_MV78230_PLUS)),
113         MPP_MODE(14,
114                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
115                  MPP_VAR_FUNCTION(0x1, "ge0", "txd6",       V_MV78230_PLUS),
116                  MPP_VAR_FUNCTION(0x2, "ge1", "txd1",       V_MV78230_PLUS),
117                  MPP_VAR_FUNCTION(0x4, "lcd", "d14",        V_MV78230_PLUS)),
118         MPP_MODE(15,
119                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
120                  MPP_VAR_FUNCTION(0x1, "ge0", "txd7",       V_MV78230_PLUS),
121                  MPP_VAR_FUNCTION(0x2, "ge1", "txd2",       V_MV78230_PLUS),
122                  MPP_VAR_FUNCTION(0x4, "lcd", "d15",        V_MV78230_PLUS)),
123         MPP_MODE(16,
124                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
125                  MPP_VAR_FUNCTION(0x1, "ge0", "txclk",      V_MV78230_PLUS),
126                  MPP_VAR_FUNCTION(0x2, "ge1", "txd3",       V_MV78230_PLUS),
127                  MPP_VAR_FUNCTION(0x4, "lcd", "d16",        V_MV78230_PLUS)),
128         MPP_MODE(17,
129                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
130                  MPP_VAR_FUNCTION(0x1, "ge0", "col",        V_MV78230_PLUS),
131                  MPP_VAR_FUNCTION(0x2, "ge1", "txctl",      V_MV78230_PLUS),
132                  MPP_VAR_FUNCTION(0x4, "lcd", "d17",        V_MV78230_PLUS)),
133         MPP_MODE(18,
134                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
135                  MPP_VAR_FUNCTION(0x1, "ge0", "rxerr",      V_MV78230_PLUS),
136                  MPP_VAR_FUNCTION(0x2, "ge1", "rxd0",       V_MV78230_PLUS),
137                  MPP_VAR_FUNCTION(0x3, "ptp", "trig",       V_MV78230_PLUS),
138                  MPP_VAR_FUNCTION(0x4, "lcd", "d18",        V_MV78230_PLUS)),
139         MPP_MODE(19,
140                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
141                  MPP_VAR_FUNCTION(0x1, "ge0", "crs",        V_MV78230_PLUS),
142                  MPP_VAR_FUNCTION(0x2, "ge1", "rxd1",       V_MV78230_PLUS),
143                  MPP_VAR_FUNCTION(0x3, "ptp", "evreq",      V_MV78230_PLUS),
144                  MPP_VAR_FUNCTION(0x4, "lcd", "d19",        V_MV78230_PLUS)),
145         MPP_MODE(20,
146                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
147                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd4",       V_MV78230_PLUS),
148                  MPP_VAR_FUNCTION(0x2, "ge1", "rxd2",       V_MV78230_PLUS),
149                  MPP_VAR_FUNCTION(0x3, "ptp", "clk",        V_MV78230_PLUS),
150                  MPP_VAR_FUNCTION(0x4, "lcd", "d20",        V_MV78230_PLUS)),
151         MPP_MODE(21,
152                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
153                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd5",       V_MV78230_PLUS),
154                  MPP_VAR_FUNCTION(0x2, "ge1", "rxd3",       V_MV78230_PLUS),
155                  MPP_VAR_FUNCTION(0x3, "mem", "bat",        V_MV78230_PLUS),
156                  MPP_VAR_FUNCTION(0x4, "lcd", "d21",        V_MV78230_PLUS)),
157         MPP_MODE(22,
158                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
159                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd6",       V_MV78230_PLUS),
160                  MPP_VAR_FUNCTION(0x2, "ge1", "rxctl",      V_MV78230_PLUS),
161                  MPP_VAR_FUNCTION(0x3, "sata0", "prsnt",    V_MV78230_PLUS),
162                  MPP_VAR_FUNCTION(0x4, "lcd", "d22",        V_MV78230_PLUS)),
163         MPP_MODE(23,
164                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
165                  MPP_VAR_FUNCTION(0x1, "ge0", "rxd7",       V_MV78230_PLUS),
166                  MPP_VAR_FUNCTION(0x2, "ge1", "rxclk",      V_MV78230_PLUS),
167                  MPP_VAR_FUNCTION(0x3, "sata1", "prsnt",    V_MV78230_PLUS),
168                  MPP_VAR_FUNCTION(0x4, "lcd", "d23",        V_MV78230_PLUS)),
169         MPP_MODE(24,
170                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
171                  MPP_VAR_FUNCTION(0x1, "sata1", "prsnt",    V_MV78230_PLUS),
172                  MPP_VAR_FUNCTION(0x3, "tdm", "rst",        V_MV78230_PLUS),
173                  MPP_VAR_FUNCTION(0x4, "lcd", "hsync",      V_MV78230_PLUS)),
174         MPP_MODE(25,
175                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
176                  MPP_VAR_FUNCTION(0x1, "sata0", "prsnt",    V_MV78230_PLUS),
177                  MPP_VAR_FUNCTION(0x3, "tdm", "pclk",       V_MV78230_PLUS),
178                  MPP_VAR_FUNCTION(0x4, "lcd", "vsync",      V_MV78230_PLUS)),
179         MPP_MODE(26,
180                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
181                  MPP_VAR_FUNCTION(0x3, "tdm", "fsync",      V_MV78230_PLUS),
182                  MPP_VAR_FUNCTION(0x4, "lcd", "clk",        V_MV78230_PLUS)),
183         MPP_MODE(27,
184                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
185                  MPP_VAR_FUNCTION(0x1, "ptp", "trig",       V_MV78230_PLUS),
186                  MPP_VAR_FUNCTION(0x3, "tdm", "dtx",        V_MV78230_PLUS),
187                  MPP_VAR_FUNCTION(0x4, "lcd", "e",          V_MV78230_PLUS)),
188         MPP_MODE(28,
189                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
190                  MPP_VAR_FUNCTION(0x1, "ptp", "evreq",      V_MV78230_PLUS),
191                  MPP_VAR_FUNCTION(0x3, "tdm", "drx",        V_MV78230_PLUS),
192                  MPP_VAR_FUNCTION(0x4, "lcd", "pwm",        V_MV78230_PLUS)),
193         MPP_MODE(29,
194                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
195                  MPP_VAR_FUNCTION(0x1, "ptp", "clk",        V_MV78230_PLUS),
196                  MPP_VAR_FUNCTION(0x3, "tdm", "int0",       V_MV78230_PLUS),
197                  MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk",    V_MV78230_PLUS)),
198         MPP_MODE(30,
199                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
200                  MPP_VAR_FUNCTION(0x1, "sd0", "clk",        V_MV78230_PLUS),
201                  MPP_VAR_FUNCTION(0x3, "tdm", "int1",       V_MV78230_PLUS)),
202         MPP_MODE(31,
203                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
204                  MPP_VAR_FUNCTION(0x1, "sd0", "cmd",        V_MV78230_PLUS),
205                  MPP_VAR_FUNCTION(0x3, "tdm", "int2",       V_MV78230_PLUS)),
206         MPP_MODE(32,
207                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
208                  MPP_VAR_FUNCTION(0x1, "sd0", "d0",         V_MV78230_PLUS),
209                  MPP_VAR_FUNCTION(0x3, "tdm", "int3",       V_MV78230_PLUS)),
210         MPP_MODE(33,
211                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
212                  MPP_VAR_FUNCTION(0x1, "sd0", "d1",         V_MV78230_PLUS),
213                  MPP_VAR_FUNCTION(0x3, "tdm", "int4",       V_MV78230_PLUS),
214                  MPP_VAR_FUNCTION(0x4, "mem", "bat",        V_MV78230_PLUS)),
215         MPP_MODE(34,
216                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
217                  MPP_VAR_FUNCTION(0x1, "sd0", "d2",         V_MV78230_PLUS),
218                  MPP_VAR_FUNCTION(0x2, "sata0", "prsnt",    V_MV78230_PLUS),
219                  MPP_VAR_FUNCTION(0x3, "tdm", "int5",       V_MV78230_PLUS)),
220         MPP_MODE(35,
221                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
222                  MPP_VAR_FUNCTION(0x1, "sd0", "d3",         V_MV78230_PLUS),
223                  MPP_VAR_FUNCTION(0x2, "sata1", "prsnt",    V_MV78230_PLUS),
224                  MPP_VAR_FUNCTION(0x3, "tdm", "int6",       V_MV78230_PLUS)),
225         MPP_MODE(36,
226                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
227                  MPP_VAR_FUNCTION(0x1, "spi", "mosi",       V_MV78230_PLUS)),
228         MPP_MODE(37,
229                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
230                  MPP_VAR_FUNCTION(0x1, "spi", "miso",       V_MV78230_PLUS)),
231         MPP_MODE(38,
232                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
233                  MPP_VAR_FUNCTION(0x1, "spi", "sck",        V_MV78230_PLUS)),
234         MPP_MODE(39,
235                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
236                  MPP_VAR_FUNCTION(0x1, "spi", "cs0",        V_MV78230_PLUS)),
237         MPP_MODE(40,
238                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
239                  MPP_VAR_FUNCTION(0x1, "spi", "cs1",        V_MV78230_PLUS),
240                  MPP_VAR_FUNCTION(0x2, "uart2", "cts",      V_MV78230_PLUS),
241                  MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync",  V_MV78230_PLUS),
242                  MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0",   V_MV78230_PLUS)),
243         MPP_MODE(41,
244                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
245                  MPP_VAR_FUNCTION(0x1, "spi", "cs2",        V_MV78230_PLUS),
246                  MPP_VAR_FUNCTION(0x2, "uart2", "rts",      V_MV78230_PLUS),
247                  MPP_VAR_FUNCTION(0x3, "sata1", "prsnt",    V_MV78230_PLUS),
248                  MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync",  V_MV78230_PLUS),
249                  MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1",   V_MV78230_PLUS)),
250         MPP_MODE(42,
251                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
252                  MPP_VAR_FUNCTION(0x1, "uart2", "rxd",      V_MV78230_PLUS),
253                  MPP_VAR_FUNCTION(0x2, "uart0", "cts",      V_MV78230_PLUS),
254                  MPP_VAR_FUNCTION(0x3, "tdm", "int7",       V_MV78230_PLUS),
255                  MPP_VAR_FUNCTION(0x4, "tdm-1", "timer",    V_MV78230_PLUS)),
256         MPP_MODE(43,
257                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
258                  MPP_VAR_FUNCTION(0x1, "uart2", "txd",      V_MV78230_PLUS),
259                  MPP_VAR_FUNCTION(0x2, "uart0", "rts",      V_MV78230_PLUS),
260                  MPP_VAR_FUNCTION(0x3, "spi", "cs3",        V_MV78230_PLUS),
261                  MPP_VAR_FUNCTION(0x4, "pcie", "rstout",    V_MV78230_PLUS)),
262         MPP_MODE(44,
263                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
264                  MPP_VAR_FUNCTION(0x1, "uart2", "cts",      V_MV78230_PLUS),
265                  MPP_VAR_FUNCTION(0x2, "uart3", "rxd",      V_MV78230_PLUS),
266                  MPP_VAR_FUNCTION(0x3, "spi", "cs4",        V_MV78230_PLUS),
267                  MPP_VAR_FUNCTION(0x4, "mem", "bat",        V_MV78230_PLUS),
268                  MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2",   V_MV78230_PLUS)),
269         MPP_MODE(45,
270                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
271                  MPP_VAR_FUNCTION(0x1, "uart2", "rts",      V_MV78230_PLUS),
272                  MPP_VAR_FUNCTION(0x2, "uart3", "txd",      V_MV78230_PLUS),
273                  MPP_VAR_FUNCTION(0x3, "spi", "cs5",        V_MV78230_PLUS),
274                  MPP_VAR_FUNCTION(0x4, "sata1", "prsnt",    V_MV78230_PLUS)),
275         MPP_MODE(46,
276                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
277                  MPP_VAR_FUNCTION(0x1, "uart3", "rts",      V_MV78230_PLUS),
278                  MPP_VAR_FUNCTION(0x2, "uart1", "rts",      V_MV78230_PLUS),
279                  MPP_VAR_FUNCTION(0x3, "spi", "cs6",        V_MV78230_PLUS),
280                  MPP_VAR_FUNCTION(0x4, "sata0", "prsnt",    V_MV78230_PLUS)),
281         MPP_MODE(47,
282                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
283                  MPP_VAR_FUNCTION(0x1, "uart3", "cts",      V_MV78230_PLUS),
284                  MPP_VAR_FUNCTION(0x2, "uart1", "cts",      V_MV78230_PLUS),
285                  MPP_VAR_FUNCTION(0x3, "spi", "cs7",        V_MV78230_PLUS),
286                  MPP_VAR_FUNCTION(0x4, "ref", "clkout",     V_MV78230_PLUS),
287                  MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3",   V_MV78230_PLUS)),
288         MPP_MODE(48,
289                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
290                  MPP_VAR_FUNCTION(0x1, "dev", "clkout",     V_MV78230_PLUS),
291                  MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS)),
292         MPP_MODE(49,
293                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
294                  MPP_VAR_FUNCTION(0x1, "dev", "we3",        V_MV78260_PLUS)),
295         MPP_MODE(50,
296                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
297                  MPP_VAR_FUNCTION(0x1, "dev", "we2",        V_MV78260_PLUS)),
298         MPP_MODE(51,
299                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
300                  MPP_VAR_FUNCTION(0x1, "dev", "ad16",       V_MV78260_PLUS)),
301         MPP_MODE(52,
302                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
303                  MPP_VAR_FUNCTION(0x1, "dev", "ad17",       V_MV78260_PLUS)),
304         MPP_MODE(53,
305                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
306                  MPP_VAR_FUNCTION(0x1, "dev", "ad18",       V_MV78260_PLUS)),
307         MPP_MODE(54,
308                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
309                  MPP_VAR_FUNCTION(0x1, "dev", "ad19",       V_MV78260_PLUS)),
310         MPP_MODE(55,
311                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
312                  MPP_VAR_FUNCTION(0x1, "dev", "ad20",       V_MV78260_PLUS)),
313         MPP_MODE(56,
314                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
315                  MPP_VAR_FUNCTION(0x1, "dev", "ad21",       V_MV78260_PLUS)),
316         MPP_MODE(57,
317                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
318                  MPP_VAR_FUNCTION(0x1, "dev", "ad22",       V_MV78260_PLUS)),
319         MPP_MODE(58,
320                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
321                  MPP_VAR_FUNCTION(0x1, "dev", "ad23",       V_MV78260_PLUS)),
322         MPP_MODE(59,
323                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
324                  MPP_VAR_FUNCTION(0x1, "dev", "ad24",       V_MV78260_PLUS)),
325         MPP_MODE(60,
326                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
327                  MPP_VAR_FUNCTION(0x1, "dev", "ad25",       V_MV78260_PLUS)),
328         MPP_MODE(61,
329                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
330                  MPP_VAR_FUNCTION(0x1, "dev", "ad26",       V_MV78260_PLUS)),
331         MPP_MODE(62,
332                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
333                  MPP_VAR_FUNCTION(0x1, "dev", "ad27",       V_MV78260_PLUS)),
334         MPP_MODE(63,
335                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
336                  MPP_VAR_FUNCTION(0x1, "dev", "ad28",       V_MV78260_PLUS)),
337         MPP_MODE(64,
338                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
339                  MPP_VAR_FUNCTION(0x1, "dev", "ad29",       V_MV78260_PLUS)),
340         MPP_MODE(65,
341                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
342                  MPP_VAR_FUNCTION(0x1, "dev", "ad30",       V_MV78260_PLUS)),
343         MPP_MODE(66,
344                  MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
345                  MPP_VAR_FUNCTION(0x1, "dev", "ad31",       V_MV78260_PLUS)),
346 };
347
348 static struct mvebu_pinctrl_soc_info armada_xp_pinctrl_info;
349
350 static const struct of_device_id armada_xp_pinctrl_of_match[] = {
351         {
352                 .compatible = "marvell,mv78230-pinctrl",
353                 .data       = (void *) V_MV78230,
354         },
355         {
356                 .compatible = "marvell,mv78260-pinctrl",
357                 .data       = (void *) V_MV78260,
358         },
359         {
360                 .compatible = "marvell,mv78460-pinctrl",
361                 .data       = (void *) V_MV78460,
362         },
363         { },
364 };
365
366 static struct mvebu_mpp_ctrl mv78230_mpp_controls[] = {
367         MPP_FUNC_CTRL(0, 48, NULL, armada_xp_mpp_ctrl),
368 };
369
370 static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = {
371         MPP_GPIO_RANGE(0,   0,  0, 32),
372         MPP_GPIO_RANGE(1,  32, 32, 17),
373 };
374
375 static struct mvebu_mpp_ctrl mv78260_mpp_controls[] = {
376         MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
377 };
378
379 static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = {
380         MPP_GPIO_RANGE(0,   0,  0, 32),
381         MPP_GPIO_RANGE(1,  32, 32, 32),
382         MPP_GPIO_RANGE(2,  64, 64,  3),
383 };
384
385 static struct mvebu_mpp_ctrl mv78460_mpp_controls[] = {
386         MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl),
387 };
388
389 static struct pinctrl_gpio_range mv78460_mpp_gpio_ranges[] = {
390         MPP_GPIO_RANGE(0,   0,  0, 32),
391         MPP_GPIO_RANGE(1,  32, 32, 32),
392         MPP_GPIO_RANGE(2,  64, 64,  3),
393 };
394
395 static int armada_xp_pinctrl_suspend(struct platform_device *pdev,
396                                      pm_message_t state)
397 {
398         struct mvebu_pinctrl_soc_info *soc =
399                 platform_get_drvdata(pdev);
400         int i, nregs;
401
402         nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);
403
404         for (i = 0; i < nregs; i++)
405                 mpp_saved_regs[i] = readl(mpp_base + i * 4);
406
407         return 0;
408 }
409
410 static int armada_xp_pinctrl_resume(struct platform_device *pdev)
411 {
412         struct mvebu_pinctrl_soc_info *soc =
413                 platform_get_drvdata(pdev);
414         int i, nregs;
415
416         nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);
417
418         for (i = 0; i < nregs; i++)
419                 writel(mpp_saved_regs[i], mpp_base + i * 4);
420
421         return 0;
422 }
423
424 static int armada_xp_pinctrl_probe(struct platform_device *pdev)
425 {
426         struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info;
427         const struct of_device_id *match =
428                 of_match_device(armada_xp_pinctrl_of_match, &pdev->dev);
429         struct resource *res;
430         int nregs;
431
432         if (!match)
433                 return -ENODEV;
434
435         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
436         mpp_base = devm_ioremap_resource(&pdev->dev, res);
437         if (IS_ERR(mpp_base))
438                 return PTR_ERR(mpp_base);
439
440         soc->variant = (unsigned) match->data & 0xff;
441
442         switch (soc->variant) {
443         case V_MV78230:
444                 soc->controls = mv78230_mpp_controls;
445                 soc->ncontrols = ARRAY_SIZE(mv78230_mpp_controls);
446                 soc->modes = armada_xp_mpp_modes;
447                 /* We don't necessarily want the full list of the
448                  * armada_xp_mpp_modes, but only the first 'n' ones
449                  * that are available on this SoC */
450                 soc->nmodes = mv78230_mpp_controls[0].npins;
451                 soc->gpioranges = mv78230_mpp_gpio_ranges;
452                 soc->ngpioranges = ARRAY_SIZE(mv78230_mpp_gpio_ranges);
453                 break;
454         case V_MV78260:
455                 soc->controls = mv78260_mpp_controls;
456                 soc->ncontrols = ARRAY_SIZE(mv78260_mpp_controls);
457                 soc->modes = armada_xp_mpp_modes;
458                 /* We don't necessarily want the full list of the
459                  * armada_xp_mpp_modes, but only the first 'n' ones
460                  * that are available on this SoC */
461                 soc->nmodes = mv78260_mpp_controls[0].npins;
462                 soc->gpioranges = mv78260_mpp_gpio_ranges;
463                 soc->ngpioranges = ARRAY_SIZE(mv78260_mpp_gpio_ranges);
464                 break;
465         case V_MV78460:
466                 soc->controls = mv78460_mpp_controls;
467                 soc->ncontrols = ARRAY_SIZE(mv78460_mpp_controls);
468                 soc->modes = armada_xp_mpp_modes;
469                 /* We don't necessarily want the full list of the
470                  * armada_xp_mpp_modes, but only the first 'n' ones
471                  * that are available on this SoC */
472                 soc->nmodes = mv78460_mpp_controls[0].npins;
473                 soc->gpioranges = mv78460_mpp_gpio_ranges;
474                 soc->ngpioranges = ARRAY_SIZE(mv78460_mpp_gpio_ranges);
475                 break;
476         }
477
478         nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG);
479
480         mpp_saved_regs = devm_kmalloc(&pdev->dev, nregs * sizeof(u32),
481                                       GFP_KERNEL);
482         if (!mpp_saved_regs)
483                 return -ENOMEM;
484
485         pdev->dev.platform_data = soc;
486
487         return mvebu_pinctrl_probe(pdev);
488 }
489
490 static int armada_xp_pinctrl_remove(struct platform_device *pdev)
491 {
492         return mvebu_pinctrl_remove(pdev);
493 }
494
495 static struct platform_driver armada_xp_pinctrl_driver = {
496         .driver = {
497                 .name = "armada-xp-pinctrl",
498                 .of_match_table = armada_xp_pinctrl_of_match,
499         },
500         .probe = armada_xp_pinctrl_probe,
501         .remove = armada_xp_pinctrl_remove,
502         .suspend = armada_xp_pinctrl_suspend,
503         .resume = armada_xp_pinctrl_resume,
504 };
505
506 module_platform_driver(armada_xp_pinctrl_driver);
507
508 MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
509 MODULE_DESCRIPTION("Marvell Armada XP pinctrl driver");
510 MODULE_LICENSE("GPL v2");