kernel/drivers/pinctrl/mvebu/pinctrl-armada-375.c

   1 /*
   2  * Marvell Armada 375 pinctrl driver based on mvebu pinctrl core
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/err.h>
  15 #include <linux/init.h>
  16 #include <linux/io.h>
  17 #include <linux/module.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/clk.h>
  20 #include <linux/of.h>
  21 #include <linux/of_device.h>
  22 #include <linux/pinctrl/pinctrl.h>
  23
  24 #include "pinctrl-mvebu.h"
  25
  26 static void __iomem *mpp_base;
  27
  28 static int armada_375_mpp_ctrl_get(unsigned pid, unsigned long *config)
  29 {
  30         return default_mpp_ctrl_get(mpp_base, pid, config);
  31 }
  32
  33 static int armada_375_mpp_ctrl_set(unsigned pid, unsigned long config)
  34 {
  35         return default_mpp_ctrl_set(mpp_base, pid, config);
  36 }
  37
  38 static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
  39         MPP_MODE(0,
  40                  MPP_FUNCTION(0x0, "gpio", NULL),
  41                  MPP_FUNCTION(0x1, "dev", "ad2"),
  42                  MPP_FUNCTION(0x2, "spi0", "cs1"),
  43                  MPP_FUNCTION(0x3, "spi1", "cs1"),
  44                  MPP_FUNCTION(0x5, "nand", "io2")),
  45         MPP_MODE(1,
  46                  MPP_FUNCTION(0x0, "gpio", NULL),
  47                  MPP_FUNCTION(0x1, "dev", "ad3"),
  48                  MPP_FUNCTION(0x2, "spi0", "mosi"),
  49                  MPP_FUNCTION(0x3, "spi1", "mosi"),
  50                  MPP_FUNCTION(0x5, "nand", "io3")),
  51         MPP_MODE(2,
  52                  MPP_FUNCTION(0x0, "gpio", NULL),
  53                  MPP_FUNCTION(0x1, "dev", "ad4"),
  54                  MPP_FUNCTION(0x2, "ptp", "eventreq"),
  55                  MPP_FUNCTION(0x3, "led", "c0"),
  56                  MPP_FUNCTION(0x4, "audio", "sdi"),
  57                  MPP_FUNCTION(0x5, "nand", "io4"),
  58                  MPP_FUNCTION(0x6, "spi1", "mosi")),
  59         MPP_MODE(3,
  60                  MPP_FUNCTION(0x0, "gpio", NULL),
  61                  MPP_FUNCTION(0x1, "dev", "ad5"),
  62                  MPP_FUNCTION(0x2, "ptp", "triggen"),
  63                  MPP_FUNCTION(0x3, "led", "p3"),
  64                  MPP_FUNCTION(0x4, "audio", "mclk"),
  65                  MPP_FUNCTION(0x5, "nand", "io5"),
  66                  MPP_FUNCTION(0x6, "spi1", "miso")),
  67         MPP_MODE(4,
  68                  MPP_FUNCTION(0x0, "gpio", NULL),
  69                  MPP_FUNCTION(0x1, "dev", "ad6"),
  70                  MPP_FUNCTION(0x2, "spi0", "miso"),
  71                  MPP_FUNCTION(0x3, "spi1", "miso"),
  72                  MPP_FUNCTION(0x5, "nand", "io6")),
  73         MPP_MODE(5,
  74                  MPP_FUNCTION(0x0, "gpio", NULL),
  75                  MPP_FUNCTION(0x1, "dev", "ad7"),
  76                  MPP_FUNCTION(0x2, "spi0", "cs2"),
  77                  MPP_FUNCTION(0x3, "spi1", "cs2"),
  78                  MPP_FUNCTION(0x5, "nand", "io7"),
  79                  MPP_FUNCTION(0x6, "spi1", "miso")),
  80         MPP_MODE(6,
  81                  MPP_FUNCTION(0x0, "gpio", NULL),
  82                  MPP_FUNCTION(0x1, "dev", "ad0"),
  83                  MPP_FUNCTION(0x3, "led", "p1"),
  84                  MPP_FUNCTION(0x4, "audio", "rclk"),
  85                  MPP_FUNCTION(0x5, "nand", "io0")),
  86         MPP_MODE(7,
  87                  MPP_FUNCTION(0x0, "gpio", NULL),
  88                  MPP_FUNCTION(0x1, "dev", "ad1"),
  89                  MPP_FUNCTION(0x2, "ptp", "clk"),
  90                  MPP_FUNCTION(0x3, "led", "p2"),
  91                  MPP_FUNCTION(0x4, "audio", "extclk"),
  92                  MPP_FUNCTION(0x5, "nand", "io1")),
  93         MPP_MODE(8,
  94                  MPP_FUNCTION(0x0, "gpio", NULL),
  95                  MPP_FUNCTION(0x1, "dev", "bootcs"),
  96                  MPP_FUNCTION(0x2, "spi0", "cs0"),
  97                  MPP_FUNCTION(0x3, "spi1", "cs0"),
  98                  MPP_FUNCTION(0x5, "nand", "ce")),
  99         MPP_MODE(9,
 100                  MPP_FUNCTION(0x0, "gpio", NULL),
 101                  MPP_FUNCTION(0x2, "spi0", "sck"),
 102                  MPP_FUNCTION(0x3, "spi1", "sck"),
 103                  MPP_FUNCTION(0x5, "nand", "we")),
 104         MPP_MODE(10,
 105                  MPP_FUNCTION(0x0, "gpio", NULL),
 106                  MPP_FUNCTION(0x2, "dram", "vttctrl"),
 107                  MPP_FUNCTION(0x3, "led", "c1"),
 108                  MPP_FUNCTION(0x5, "nand", "re"),
 109                  MPP_FUNCTION(0x6, "spi1", "sck")),
 110         MPP_MODE(11,
 111                  MPP_FUNCTION(0x0, "gpio", NULL),
 112                  MPP_FUNCTION(0x1, "dev", "a0"),
 113                  MPP_FUNCTION(0x3, "led", "c2"),
 114                  MPP_FUNCTION(0x4, "audio", "sdo"),
 115                  MPP_FUNCTION(0x5, "nand", "cle")),
 116         MPP_MODE(12,
 117                  MPP_FUNCTION(0x0, "gpio", NULL),
 118                  MPP_FUNCTION(0x1, "dev", "a1"),
 119                  MPP_FUNCTION(0x4, "audio", "bclk"),
 120                  MPP_FUNCTION(0x5, "nand", "ale")),
 121         MPP_MODE(13,
 122                  MPP_FUNCTION(0x0, "gpio", NULL),
 123                  MPP_FUNCTION(0x1, "dev", "readyn"),
 124                  MPP_FUNCTION(0x2, "pcie0", "rstoutn"),
 125                  MPP_FUNCTION(0x3, "pcie1", "rstoutn"),
 126                  MPP_FUNCTION(0x5, "nand", "rb"),
 127                  MPP_FUNCTION(0x6, "spi1", "mosi")),
 128         MPP_MODE(14,
 129                  MPP_FUNCTION(0x0, "gpio", NULL),
 130                  MPP_FUNCTION(0x2, "i2c0", "sda"),
 131                  MPP_FUNCTION(0x3, "uart1", "txd")),
 132         MPP_MODE(15,
 133                  MPP_FUNCTION(0x0, "gpio", NULL),
 134                  MPP_FUNCTION(0x2, "i2c0", "sck"),
 135                  MPP_FUNCTION(0x3, "uart1", "rxd")),
 136         MPP_MODE(16,
 137                  MPP_FUNCTION(0x0, "gpio", NULL),
 138                  MPP_FUNCTION(0x2, "uart0", "txd")),
 139         MPP_MODE(17,
 140                  MPP_FUNCTION(0x0, "gpio", NULL),
 141                  MPP_FUNCTION(0x2, "uart0", "rxd")),
 142         MPP_MODE(18,
 143                  MPP_FUNCTION(0x0, "gpio", NULL),
 144                  MPP_FUNCTION(0x2, "tdm", "intn")),
 145         MPP_MODE(19,
 146                  MPP_FUNCTION(0x0, "gpio", NULL),
 147                  MPP_FUNCTION(0x2, "tdm", "rstn")),
 148         MPP_MODE(20,
 149                  MPP_FUNCTION(0x0, "gpio", NULL),
 150                  MPP_FUNCTION(0x2, "tdm", "pclk")),
 151         MPP_MODE(21,
 152                  MPP_FUNCTION(0x0, "gpio", NULL),
 153                  MPP_FUNCTION(0x2, "tdm", "fsync")),
 154         MPP_MODE(22,
 155                  MPP_FUNCTION(0x0, "gpio", NULL),
 156                  MPP_FUNCTION(0x2, "tdm", "drx")),
 157         MPP_MODE(23,
 158                  MPP_FUNCTION(0x0, "gpio", NULL),
 159                  MPP_FUNCTION(0x2, "tdm", "dtx")),
 160         MPP_MODE(24,
 161                  MPP_FUNCTION(0x0, "gpio", NULL),
 162                  MPP_FUNCTION(0x1, "led", "p0"),
 163                  MPP_FUNCTION(0x2, "ge1", "rxd0"),
 164                  MPP_FUNCTION(0x3, "sd", "cmd"),
 165                  MPP_FUNCTION(0x4, "uart0", "rts"),
 166                  MPP_FUNCTION(0x5, "spi0", "cs0"),
 167                  MPP_FUNCTION(0x6, "dev", "cs1")),
 168         MPP_MODE(25,
 169                  MPP_FUNCTION(0x0, "gpio", NULL),
 170                  MPP_FUNCTION(0x1, "led", "p2"),
 171                  MPP_FUNCTION(0x2, "ge1", "rxd1"),
 172                  MPP_FUNCTION(0x3, "sd", "d0"),
 173                  MPP_FUNCTION(0x4, "uart0", "cts"),
 174                  MPP_FUNCTION(0x5, "spi0", "mosi"),
 175                  MPP_FUNCTION(0x6, "dev", "cs2")),
 176         MPP_MODE(26,
 177                  MPP_FUNCTION(0x0, "gpio", NULL),
 178                  MPP_FUNCTION(0x1, "pcie0", "clkreq"),
 179                  MPP_FUNCTION(0x2, "ge1", "rxd2"),
 180                  MPP_FUNCTION(0x3, "sd", "d2"),
 181                  MPP_FUNCTION(0x4, "uart1", "rts"),
 182                  MPP_FUNCTION(0x5, "spi0", "cs1"),
 183                  MPP_FUNCTION(0x6, "led", "c1")),
 184         MPP_MODE(27,
 185                  MPP_FUNCTION(0x0, "gpio", NULL),
 186                  MPP_FUNCTION(0x1, "pcie1", "clkreq"),
 187                  MPP_FUNCTION(0x2, "ge1", "rxd3"),
 188                  MPP_FUNCTION(0x3, "sd", "d1"),
 189                  MPP_FUNCTION(0x4, "uart1", "cts"),
 190                  MPP_FUNCTION(0x5, "spi0", "miso"),
 191                  MPP_FUNCTION(0x6, "led", "c2")),
 192         MPP_MODE(28,
 193                  MPP_FUNCTION(0x0, "gpio", NULL),
 194                  MPP_FUNCTION(0x1, "led", "p3"),
 195                  MPP_FUNCTION(0x2, "ge1", "txctl"),
 196                  MPP_FUNCTION(0x3, "sd", "clk"),
 197                  MPP_FUNCTION(0x5, "dram", "vttctrl")),
 198         MPP_MODE(29,
 199                  MPP_FUNCTION(0x0, "gpio", NULL),
 200                  MPP_FUNCTION(0x1, "pcie1", "clkreq"),
 201                  MPP_FUNCTION(0x2, "ge1", "rxclk"),
 202                  MPP_FUNCTION(0x3, "sd", "d3"),
 203                  MPP_FUNCTION(0x5, "spi0", "sck"),
 204                  MPP_FUNCTION(0x6, "pcie0", "rstoutn")),
 205         MPP_MODE(30,
 206                  MPP_FUNCTION(0x0, "gpio", NULL),
 207                  MPP_FUNCTION(0x2, "ge1", "txd0"),
 208                  MPP_FUNCTION(0x3, "spi1", "cs0"),
 209                  MPP_FUNCTION(0x5, "led", "p3"),
 210                  MPP_FUNCTION(0x6, "ptp", "eventreq")),
 211         MPP_MODE(31,
 212                  MPP_FUNCTION(0x0, "gpio", NULL),
 213                  MPP_FUNCTION(0x2, "ge1", "txd1"),
 214                  MPP_FUNCTION(0x3, "spi1", "mosi"),
 215                  MPP_FUNCTION(0x5, "led", "p0")),
 216         MPP_MODE(32,
 217                  MPP_FUNCTION(0x0, "gpio", NULL),
 218                  MPP_FUNCTION(0x2, "ge1", "txd2"),
 219                  MPP_FUNCTION(0x3, "spi1", "sck"),
 220                  MPP_FUNCTION(0x4, "ptp", "triggen"),
 221                  MPP_FUNCTION(0x5, "led", "c0")),
 222         MPP_MODE(33,
 223                  MPP_FUNCTION(0x0, "gpio", NULL),
 224                  MPP_FUNCTION(0x2, "ge1", "txd3"),
 225                  MPP_FUNCTION(0x3, "spi1", "miso"),
 226                  MPP_FUNCTION(0x5, "led", "p2")),
 227         MPP_MODE(34,
 228                  MPP_FUNCTION(0x0, "gpio", NULL),
 229                  MPP_FUNCTION(0x2, "ge1", "txclkout"),
 230                  MPP_FUNCTION(0x3, "spi1", "sck"),
 231                  MPP_FUNCTION(0x5, "led", "c1")),
 232         MPP_MODE(35,
 233                  MPP_FUNCTION(0x0, "gpio", NULL),
 234                  MPP_FUNCTION(0x2, "ge1", "rxctl"),
 235                  MPP_FUNCTION(0x3, "spi1", "cs1"),
 236                  MPP_FUNCTION(0x4, "spi0", "cs2"),
 237                  MPP_FUNCTION(0x5, "led", "p1")),
 238         MPP_MODE(36,
 239                  MPP_FUNCTION(0x0, "gpio", NULL),
 240                  MPP_FUNCTION(0x1, "pcie0", "clkreq"),
 241                  MPP_FUNCTION(0x5, "led", "c2")),
 242         MPP_MODE(37,
 243                  MPP_FUNCTION(0x0, "gpio", NULL),
 244                  MPP_FUNCTION(0x1, "pcie0", "clkreq"),
 245                  MPP_FUNCTION(0x2, "tdm", "intn"),
 246                  MPP_FUNCTION(0x4, "ge", "mdc")),
 247         MPP_MODE(38,
 248                  MPP_FUNCTION(0x0, "gpio", NULL),
 249                  MPP_FUNCTION(0x1, "pcie1", "clkreq"),
 250                  MPP_FUNCTION(0x4, "ge", "mdio")),
 251         MPP_MODE(39,
 252                  MPP_FUNCTION(0x0, "gpio", NULL),
 253                  MPP_FUNCTION(0x4, "ref", "clkout"),
 254                  MPP_FUNCTION(0x5, "led", "p3")),
 255         MPP_MODE(40,
 256                  MPP_FUNCTION(0x0, "gpio", NULL),
 257                  MPP_FUNCTION(0x4, "uart1", "txd"),
 258                  MPP_FUNCTION(0x5, "led", "p0")),
 259         MPP_MODE(41,
 260                  MPP_FUNCTION(0x0, "gpio", NULL),
 261                  MPP_FUNCTION(0x4, "uart1", "rxd"),
 262                  MPP_FUNCTION(0x5, "led", "p1")),
 263         MPP_MODE(42,
 264                  MPP_FUNCTION(0x0, "gpio", NULL),
 265                  MPP_FUNCTION(0x3, "spi1", "cs2"),
 266                  MPP_FUNCTION(0x4, "led", "c0"),
 267                  MPP_FUNCTION(0x6, "ptp", "clk")),
 268         MPP_MODE(43,
 269                  MPP_FUNCTION(0x0, "gpio", NULL),
 270                  MPP_FUNCTION(0x2, "sata0", "prsnt"),
 271                  MPP_FUNCTION(0x4, "dram", "vttctrl"),
 272                  MPP_FUNCTION(0x5, "led", "c1")),
 273         MPP_MODE(44,
 274                  MPP_FUNCTION(0x0, "gpio", NULL),
 275                  MPP_FUNCTION(0x4, "sata0", "prsnt")),
 276         MPP_MODE(45,
 277                  MPP_FUNCTION(0x0, "gpio", NULL),
 278                  MPP_FUNCTION(0x2, "spi0", "cs2"),
 279                  MPP_FUNCTION(0x4, "pcie0", "rstoutn"),
 280                  MPP_FUNCTION(0x5, "led", "c2"),
 281                  MPP_FUNCTION(0x6, "spi1", "cs2")),
 282         MPP_MODE(46,
 283                  MPP_FUNCTION(0x0, "gpio", NULL),
 284                  MPP_FUNCTION(0x1, "led", "p0"),
 285                  MPP_FUNCTION(0x2, "ge0", "txd0"),
 286                  MPP_FUNCTION(0x3, "ge1", "txd0"),
 287                  MPP_FUNCTION(0x6, "dev", "wen1")),
 288         MPP_MODE(47,
 289                  MPP_FUNCTION(0x0, "gpio", NULL),
 290                  MPP_FUNCTION(0x1, "led", "p1"),
 291                  MPP_FUNCTION(0x2, "ge0", "txd1"),
 292                  MPP_FUNCTION(0x3, "ge1", "txd1"),
 293                  MPP_FUNCTION(0x5, "ptp", "triggen"),
 294                  MPP_FUNCTION(0x6, "dev", "ale0")),
 295         MPP_MODE(48,
 296                  MPP_FUNCTION(0x0, "gpio", NULL),
 297                  MPP_FUNCTION(0x1, "led", "p2"),
 298                  MPP_FUNCTION(0x2, "ge0", "txd2"),
 299                  MPP_FUNCTION(0x3, "ge1", "txd2"),
 300                  MPP_FUNCTION(0x6, "dev", "ale1")),
 301         MPP_MODE(49,
 302                  MPP_FUNCTION(0x0, "gpio", NULL),
 303                  MPP_FUNCTION(0x1, "led", "p3"),
 304                  MPP_FUNCTION(0x2, "ge0", "txd3"),
 305                  MPP_FUNCTION(0x3, "ge1", "txd3"),
 306                  MPP_FUNCTION(0x6, "dev", "a2")),
 307         MPP_MODE(50,
 308                  MPP_FUNCTION(0x0, "gpio", NULL),
 309                  MPP_FUNCTION(0x1, "led", "c0"),
 310                  MPP_FUNCTION(0x2, "ge0", "rxd0"),
 311                  MPP_FUNCTION(0x3, "ge1", "rxd0"),
 312                  MPP_FUNCTION(0x5, "ptp", "eventreq"),
 313                  MPP_FUNCTION(0x6, "dev", "ad12")),
 314         MPP_MODE(51,
 315                  MPP_FUNCTION(0x0, "gpio", NULL),
 316                  MPP_FUNCTION(0x1, "led", "c1"),
 317                  MPP_FUNCTION(0x2, "ge0", "rxd1"),
 318                  MPP_FUNCTION(0x3, "ge1", "rxd1"),
 319                  MPP_FUNCTION(0x6, "dev", "ad8")),
 320         MPP_MODE(52,
 321                  MPP_FUNCTION(0x0, "gpio", NULL),
 322                  MPP_FUNCTION(0x1, "led", "c2"),
 323                  MPP_FUNCTION(0x2, "ge0", "rxd2"),
 324                  MPP_FUNCTION(0x3, "ge1", "rxd2"),
 325                  MPP_FUNCTION(0x5, "i2c0", "sda"),
 326                  MPP_FUNCTION(0x6, "dev", "ad9")),
 327         MPP_MODE(53,
 328                  MPP_FUNCTION(0x0, "gpio", NULL),
 329                  MPP_FUNCTION(0x1, "pcie1", "rstoutn"),
 330                  MPP_FUNCTION(0x2, "ge0", "rxd3"),
 331                  MPP_FUNCTION(0x3, "ge1", "rxd3"),
 332                  MPP_FUNCTION(0x5, "i2c0", "sck"),
 333                  MPP_FUNCTION(0x6, "dev", "ad10")),
 334         MPP_MODE(54,
 335                  MPP_FUNCTION(0x0, "gpio", NULL),
 336                  MPP_FUNCTION(0x1, "pcie0", "rstoutn"),
 337                  MPP_FUNCTION(0x2, "ge0", "rxctl"),
 338                  MPP_FUNCTION(0x3, "ge1", "rxctl"),
 339                  MPP_FUNCTION(0x6, "dev", "ad11")),
 340         MPP_MODE(55,
 341                  MPP_FUNCTION(0x0, "gpio", NULL),
 342                  MPP_FUNCTION(0x2, "ge0", "rxclk"),
 343                  MPP_FUNCTION(0x3, "ge1", "rxclk"),
 344                  MPP_FUNCTION(0x6, "dev", "cs0")),
 345         MPP_MODE(56,
 346                  MPP_FUNCTION(0x0, "gpio", NULL),
 347                  MPP_FUNCTION(0x2, "ge0", "txclkout"),
 348                  MPP_FUNCTION(0x3, "ge1", "txclkout"),
 349                  MPP_FUNCTION(0x6, "dev", "oe")),
 350         MPP_MODE(57,
 351                  MPP_FUNCTION(0x0, "gpio", NULL),
 352                  MPP_FUNCTION(0x2, "ge0", "txctl"),
 353                  MPP_FUNCTION(0x3, "ge1", "txctl"),
 354                  MPP_FUNCTION(0x6, "dev", "wen0")),
 355         MPP_MODE(58,
 356                  MPP_FUNCTION(0x0, "gpio", NULL),
 357                  MPP_FUNCTION(0x4, "led", "c0")),
 358         MPP_MODE(59,
 359                  MPP_FUNCTION(0x0, "gpio", NULL),
 360                  MPP_FUNCTION(0x4, "led", "c1")),
 361         MPP_MODE(60,
 362                  MPP_FUNCTION(0x0, "gpio", NULL),
 363                  MPP_FUNCTION(0x2, "uart1", "txd"),
 364                  MPP_FUNCTION(0x4, "led", "c2"),
 365                  MPP_FUNCTION(0x6, "dev", "ad13")),
 366         MPP_MODE(61,
 367                  MPP_FUNCTION(0x0, "gpio", NULL),
 368                  MPP_FUNCTION(0x1, "i2c1", "sda"),
 369                  MPP_FUNCTION(0x2, "uart1", "rxd"),
 370                  MPP_FUNCTION(0x3, "spi1", "cs2"),
 371                  MPP_FUNCTION(0x4, "led", "p0"),
 372                  MPP_FUNCTION(0x6, "dev", "ad14")),
 373         MPP_MODE(62,
 374                  MPP_FUNCTION(0x0, "gpio", NULL),
 375                  MPP_FUNCTION(0x1, "i2c1", "sck"),
 376                  MPP_FUNCTION(0x4, "led", "p1"),
 377                  MPP_FUNCTION(0x6, "dev", "ad15")),
 378         MPP_MODE(63,
 379                  MPP_FUNCTION(0x0, "gpio", NULL),
 380                  MPP_FUNCTION(0x2, "ptp", "triggen"),
 381                  MPP_FUNCTION(0x4, "led", "p2"),
 382                  MPP_FUNCTION(0x6, "dev", "burst")),
 383         MPP_MODE(64,
 384                  MPP_FUNCTION(0x0, "gpio", NULL),
 385                  MPP_FUNCTION(0x2, "dram", "vttctrl"),
 386                  MPP_FUNCTION(0x4, "led", "p3")),
 387         MPP_MODE(65,
 388                  MPP_FUNCTION(0x0, "gpio", NULL),
 389                  MPP_FUNCTION(0x1, "sata1", "prsnt")),
 390         MPP_MODE(66,
 391                  MPP_FUNCTION(0x0, "gpio", NULL),
 392                  MPP_FUNCTION(0x2, "ptp", "eventreq"),
 393                  MPP_FUNCTION(0x4, "spi1", "cs3"),
 394                  MPP_FUNCTION(0x5, "pcie0", "rstoutn"),
 395                  MPP_FUNCTION(0x6, "dev", "cs3")),
 396 };
 397
 398 static struct mvebu_pinctrl_soc_info armada_375_pinctrl_info;
 399
 400 static const struct of_device_id armada_375_pinctrl_of_match[] = {
 401         { .compatible = "marvell,mv88f6720-pinctrl" },
 402         { },
 403 };
 404
 405 static struct mvebu_mpp_ctrl mv88f6720_mpp_controls[] = {
 406         MPP_FUNC_CTRL(0, 69, NULL, armada_375_mpp_ctrl),
 407 };
 408
 409 static struct pinctrl_gpio_range mv88f6720_mpp_gpio_ranges[] = {
 410         MPP_GPIO_RANGE(0,   0,  0, 32),
 411         MPP_GPIO_RANGE(1,  32, 32, 32),
 412         MPP_GPIO_RANGE(2,  64, 64,  3),
 413 };
 414
 415 static int armada_375_pinctrl_probe(struct platform_device *pdev)
 416 {
 417         struct mvebu_pinctrl_soc_info *soc = &armada_375_pinctrl_info;
 418         struct resource *res;
 419
 420         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 421         mpp_base = devm_ioremap_resource(&pdev->dev, res);
 422         if (IS_ERR(mpp_base))
 423                 return PTR_ERR(mpp_base);
 424
 425         soc->variant = 0; /* no variants for Armada 375 */
 426         soc->controls = mv88f6720_mpp_controls;
 427         soc->ncontrols = ARRAY_SIZE(mv88f6720_mpp_controls);
 428         soc->modes = mv88f6720_mpp_modes;
 429         soc->nmodes = ARRAY_SIZE(mv88f6720_mpp_modes);
 430         soc->gpioranges = mv88f6720_mpp_gpio_ranges;
 431         soc->ngpioranges = ARRAY_SIZE(mv88f6720_mpp_gpio_ranges);
 432
 433         pdev->dev.platform_data = soc;
 434
 435         return mvebu_pinctrl_probe(pdev);
 436 }
 437
 438 static int armada_375_pinctrl_remove(struct platform_device *pdev)
 439 {
 440         return mvebu_pinctrl_remove(pdev);
 441 }
 442
 443 static struct platform_driver armada_375_pinctrl_driver = {
 444         .driver = {
 445                 .name = "armada-375-pinctrl",
 446                 .of_match_table = of_match_ptr(armada_375_pinctrl_of_match),
 447         },
 448         .probe = armada_375_pinctrl_probe,
 449         .remove = armada_375_pinctrl_remove,
 450 };
 451
 452 module_platform_driver(armada_375_pinctrl_driver);
 453
 454 MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
 455 MODULE_DESCRIPTION("Marvell Armada 375 pinctrl driver");
 456 MODULE_LICENSE("GPL v2");