kernel/drivers/net/wireless/realtek/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include "wifi.h"
  31 #include "core.h"
  32 #include "pci.h"
  33 #include "base.h"
  34 #include "ps.h"
  35 #include "efuse.h"
  36 #include <linux/interrupt.h>
  37 #include <linux/export.h>
  38 #include <linux/kmemleak.h>
  39 #include <linux/module.h>
  40
  41 MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
  42 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
  43 MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
  44 MODULE_LICENSE("GPL");
  45 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  46
  47 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  48         INTEL_VENDOR_ID,
  49         ATI_VENDOR_ID,
  50         AMD_VENDOR_ID,
  51         SIS_VENDOR_ID
  52 };
  53
  54 static const u8 ac_to_hwq[] = {
  55         VO_QUEUE,
  56         VI_QUEUE,
  57         BE_QUEUE,
  58         BK_QUEUE
  59 };
  60
  61 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  62                        struct sk_buff *skb)
  63 {
  64         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  65         __le16 fc = rtl_get_fc(skb);
  66         u8 queue_index = skb_get_queue_mapping(skb);
  67
  68         if (unlikely(ieee80211_is_beacon(fc)))
  69                 return BEACON_QUEUE;
  70         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  71                 return MGNT_QUEUE;
  72         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  73                 if (ieee80211_is_nullfunc(fc))
  74                         return HIGH_QUEUE;
  75
  76         return ac_to_hwq[queue_index];
  77 }
  78
  79 /* Update PCI dependent default settings*/
  80 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  81 {
  82         struct rtl_priv *rtlpriv = rtl_priv(hw);
  83         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  84         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  85         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  86         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  87         u8 init_aspm;
  88
  89         ppsc->reg_rfps_level = 0;
  90         ppsc->support_aspm = false;
  91
  92         /*Update PCI ASPM setting */
  93         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  94         switch (rtlpci->const_pci_aspm) {
  95         case 0:
  96                 /*No ASPM */
  97                 break;
  98
  99         case 1:
 100                 /*ASPM dynamically enabled/disable. */
 101                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
 102                 break;
 103
 104         case 2:
 105                 /*ASPM with Clock Req dynamically enabled/disable. */
 106                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
 107                                          RT_RF_OFF_LEVL_CLK_REQ);
 108                 break;
 109
 110         case 3:
 111                 /*
 112                  * Always enable ASPM and Clock Req
 113                  * from initialization to halt.
 114                  * */
 115                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 116                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 117                                          RT_RF_OFF_LEVL_CLK_REQ);
 118                 break;
 119
 120         case 4:
 121                 /*
 122                  * Always enable ASPM without Clock Req
 123                  * from initialization to halt.
 124                  * */
 125                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 126                                           RT_RF_OFF_LEVL_CLK_REQ);
 127                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 128                 break;
 129         }
 130
 131         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 132
 133         /*Update Radio OFF setting */
 134         switch (rtlpci->const_hwsw_rfoff_d3) {
 135         case 1:
 136                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 137                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 138                 break;
 139
 140         case 2:
 141                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 142                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 143                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 144                 break;
 145
 146         case 3:
 147                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 148                 break;
 149         }
 150
 151         /*Set HW definition to determine if it supports ASPM. */
 152         switch (rtlpci->const_support_pciaspm) {
 153         case 0:{
 154                         /*Not support ASPM. */
 155                         bool support_aspm = false;
 156                         ppsc->support_aspm = support_aspm;
 157                         break;
 158                 }
 159         case 1:{
 160                         /*Support ASPM. */
 161                         bool support_aspm = true;
 162                         bool support_backdoor = true;
 163                         ppsc->support_aspm = support_aspm;
 164
 165                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 166                            !priv->ndis_adapter.amd_l1_patch)
 167                            support_backdoor = false; */
 168
 169                         ppsc->support_backdoor = support_backdoor;
 170
 171                         break;
 172                 }
 173         case 2:
 174                 /*ASPM value set by chipset. */
 175                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 176                         bool support_aspm = true;
 177                         ppsc->support_aspm = support_aspm;
 178                 }
 179                 break;
 180         default:
 181                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 182                          "switch case not processed\n");
 183                 break;
 184         }
 185
 186         /* toshiba aspm issue, toshiba will set aspm selfly
 187          * so we should not set aspm in driver */
 188         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 189         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 190                 init_aspm == 0x43)
 191                 ppsc->support_aspm = false;
 192 }
 193
 194 static bool _rtl_pci_platform_switch_device_pci_aspm(
 195                         struct ieee80211_hw *hw,
 196                         u8 value)
 197 {
 198         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 199         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 200
 201         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 202                 value |= 0x40;
 203
 204         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 205
 206         return false;
 207 }
 208
 209 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 210 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 211 {
 212         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 213         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 214
 215         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 216
 217         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 218                 udelay(100);
 219 }
 220
 221 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 222 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 223 {
 224         struct rtl_priv *rtlpriv = rtl_priv(hw);
 225         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 226         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 227         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 228         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 229         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 230         /*Retrieve original configuration settings. */
 231         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 232         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 233                                 pcibridge_linkctrlreg;
 234         u16 aspmlevel = 0;
 235         u8 tmp_u1b = 0;
 236
 237         if (!ppsc->support_aspm)
 238                 return;
 239
 240         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 241                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 242                          "PCI(Bridge) UNKNOWN\n");
 243
 244                 return;
 245         }
 246
 247         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 248                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 249                 _rtl_pci_switch_clk_req(hw, 0x0);
 250         }
 251
 252         /*for promising device will in L0 state after an I/O. */
 253         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 254
 255         /*Set corresponding value. */
 256         aspmlevel |= BIT(0) | BIT(1);
 257         linkctrl_reg &= ~aspmlevel;
 258         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 259
 260         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 261         udelay(50);
 262
 263         /*4 Disable Pci Bridge ASPM */
 264         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 265                               pcibridge_linkctrlreg);
 266
 267         udelay(50);
 268 }
 269
 270 /*
 271  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 272  *power saving We should follow the sequence to enable
 273  *RTL8192SE first then enable Pci Bridge ASPM
 274  *or the system will show bluescreen.
 275  */
 276 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 277 {
 278         struct rtl_priv *rtlpriv = rtl_priv(hw);
 279         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 280         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 281         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 282         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 283         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 284         u16 aspmlevel;
 285         u8 u_pcibridge_aspmsetting;
 286         u8 u_device_aspmsetting;
 287
 288         if (!ppsc->support_aspm)
 289                 return;
 290
 291         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 292                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 293                          "PCI(Bridge) UNKNOWN\n");
 294                 return;
 295         }
 296
 297         /*4 Enable Pci Bridge ASPM */
 298
 299         u_pcibridge_aspmsetting =
 300             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 301             rtlpci->const_hostpci_aspm_setting;
 302
 303         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 304                 u_pcibridge_aspmsetting &= ~BIT(0);
 305
 306         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 307                               u_pcibridge_aspmsetting);
 308
 309         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 310                  "PlatformEnableASPM(): Write reg[%x] = %x\n",
 311                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 312                  u_pcibridge_aspmsetting);
 313
 314         udelay(50);
 315
 316         /*Get ASPM level (with/without Clock Req) */
 317         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 318         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 319
 320         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 321         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 322
 323         u_device_aspmsetting |= aspmlevel;
 324
 325         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 326
 327         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 328                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 329                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 330                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 331         }
 332         udelay(100);
 333 }
 334
 335 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 336 {
 337         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 338
 339         bool status = false;
 340         u8 offset_e0;
 341         unsigned offset_e4;
 342
 343         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 344
 345         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 346
 347         if (offset_e0 == 0xA0) {
 348                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 349                 if (offset_e4 & BIT(23))
 350                         status = true;
 351         }
 352
 353         return status;
 354 }
 355
 356 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 357                                      struct rtl_priv **buddy_priv)
 358 {
 359         struct rtl_priv *rtlpriv = rtl_priv(hw);
 360         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 361         bool find_buddy_priv = false;
 362         struct rtl_priv *tpriv = NULL;
 363         struct rtl_pci_priv *tpcipriv = NULL;
 364
 365         if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 366                 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
 367                                     list) {
 368                         if (tpriv) {
 369                                 tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
 370                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 371                                          "pcipriv->ndis_adapter.funcnumber %x\n",
 372                                         pcipriv->ndis_adapter.funcnumber);
 373                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 374                                          "tpcipriv->ndis_adapter.funcnumber %x\n",
 375                                         tpcipriv->ndis_adapter.funcnumber);
 376
 377                                 if ((pcipriv->ndis_adapter.busnumber ==
 378                                      tpcipriv->ndis_adapter.busnumber) &&
 379                                     (pcipriv->ndis_adapter.devnumber ==
 380                                     tpcipriv->ndis_adapter.devnumber) &&
 381                                     (pcipriv->ndis_adapter.funcnumber !=
 382                                     tpcipriv->ndis_adapter.funcnumber)) {
 383                                         find_buddy_priv = true;
 384                                         break;
 385                                 }
 386                         }
 387                 }
 388         }
 389
 390         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 391                  "find_buddy_priv %d\n", find_buddy_priv);
 392
 393         if (find_buddy_priv)
 394                 *buddy_priv = tpriv;
 395
 396         return find_buddy_priv;
 397 }
 398
 399 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 400 {
 401         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 402         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 403         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 404         u8 linkctrl_reg;
 405         u8 num4bbytes;
 406
 407         num4bbytes = (capabilityoffset + 0x10) / 4;
 408
 409         /*Read  Link Control Register */
 410         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 411
 412         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 413 }
 414
 415 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 416                 struct ieee80211_hw *hw)
 417 {
 418         struct rtl_priv *rtlpriv = rtl_priv(hw);
 419         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 420
 421         u8 tmp;
 422         u16 linkctrl_reg;
 423
 424         /*Link Control Register */
 425         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 426         pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 427
 428         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 429                  pcipriv->ndis_adapter.linkctrl_reg);
 430
 431         pci_read_config_byte(pdev, 0x98, &tmp);
 432         tmp |= BIT(4);
 433         pci_write_config_byte(pdev, 0x98, tmp);
 434
 435         tmp = 0x17;
 436         pci_write_config_byte(pdev, 0x70f, tmp);
 437 }
 438
 439 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 440 {
 441         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 442
 443         _rtl_pci_update_default_setting(hw);
 444
 445         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 446                 /*Always enable ASPM & Clock Req. */
 447                 rtl_pci_enable_aspm(hw);
 448                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 449         }
 450
 451 }
 452
 453 static void _rtl_pci_io_handler_init(struct device *dev,
 454                                      struct ieee80211_hw *hw)
 455 {
 456         struct rtl_priv *rtlpriv = rtl_priv(hw);
 457
 458         rtlpriv->io.dev = dev;
 459
 460         rtlpriv->io.write8_async = pci_write8_async;
 461         rtlpriv->io.write16_async = pci_write16_async;
 462         rtlpriv->io.write32_async = pci_write32_async;
 463
 464         rtlpriv->io.read8_sync = pci_read8_sync;
 465         rtlpriv->io.read16_sync = pci_read16_sync;
 466         rtlpriv->io.read32_sync = pci_read32_sync;
 467
 468 }
 469
 470 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 471                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 472 {
 473         struct rtl_priv *rtlpriv = rtl_priv(hw);
 474         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 475         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 476         struct sk_buff *next_skb;
 477         u8 additionlen = FCS_LEN;
 478
 479         /* here open is 4, wep/tkip is 8, aes is 12*/
 480         if (info->control.hw_key)
 481                 additionlen += info->control.hw_key->icv_len;
 482
 483         /* The most skb num is 6 */
 484         tcb_desc->empkt_num = 0;
 485         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 486         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 487                 struct ieee80211_tx_info *next_info;
 488
 489                 next_info = IEEE80211_SKB_CB(next_skb);
 490                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 491                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 492                                 next_skb->len + additionlen;
 493                         tcb_desc->empkt_num++;
 494                 } else {
 495                         break;
 496                 }
 497
 498                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 499                                       next_skb))
 500                         break;
 501
 502                 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 503                         break;
 504         }
 505         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 506
 507         return true;
 508 }
 509
 510 /* just for early mode now */
 511 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 512 {
 513         struct rtl_priv *rtlpriv = rtl_priv(hw);
 514         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 515         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 516         struct sk_buff *skb = NULL;
 517         struct ieee80211_tx_info *info = NULL;
 518         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 519         int tid;
 520
 521         if (!rtlpriv->rtlhal.earlymode_enable)
 522                 return;
 523
 524         if (rtlpriv->dm.supp_phymode_switch &&
 525             (rtlpriv->easy_concurrent_ctl.switch_in_process ||
 526             (rtlpriv->buddy_priv &&
 527             rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
 528                 return;
 529         /* we juse use em for BE/BK/VI/VO */
 530         for (tid = 7; tid >= 0; tid--) {
 531                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 532                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 533                 while (!mac->act_scanning &&
 534                        rtlpriv->psc.rfpwr_state == ERFON) {
 535                         struct rtl_tcb_desc tcb_desc;
 536                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 537
 538                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 539                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 540                             (ring->entries - skb_queue_len(&ring->queue) >
 541                              rtlhal->max_earlymode_num)) {
 542                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 543                         } else {
 544                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 545                                 break;
 546                         }
 547                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 548
 549                         /* Some macaddr can't do early mode. like
 550                          * multicast/broadcast/no_qos data */
 551                         info = IEEE80211_SKB_CB(skb);
 552                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 553                                 _rtl_update_earlymode_info(hw, skb,
 554                                                            &tcb_desc, tid);
 555
 556                         rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 557                 }
 558         }
 559 }
 560
 561
 562 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 563 {
 564         struct rtl_priv *rtlpriv = rtl_priv(hw);
 565         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 566
 567         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 568
 569         while (skb_queue_len(&ring->queue)) {
 570                 struct sk_buff *skb;
 571                 struct ieee80211_tx_info *info;
 572                 __le16 fc;
 573                 u8 tid;
 574                 u8 *entry;
 575
 576                 if (rtlpriv->use_new_trx_flow)
 577                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 578                 else
 579                         entry = (u8 *)(&ring->desc[ring->idx]);
 580
 581                 if (rtlpriv->cfg->ops->get_available_desc &&
 582                     rtlpriv->cfg->ops->get_available_desc(hw, prio) <= 1) {
 583                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_DMESG,
 584                                  "no available desc!\n");
 585                         return;
 586                 }
 587
 588                 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 589                         return;
 590                 ring->idx = (ring->idx + 1) % ring->entries;
 591
 592                 skb = __skb_dequeue(&ring->queue);
 593                 pci_unmap_single(rtlpci->pdev,
 594                                  rtlpriv->cfg->ops->
 595                                              get_desc((u8 *)entry, true,
 596                                                       HW_DESC_TXBUFF_ADDR),
 597                                  skb->len, PCI_DMA_TODEVICE);
 598
 599                 /* remove early mode header */
 600                 if (rtlpriv->rtlhal.earlymode_enable)
 601                         skb_pull(skb, EM_HDR_LEN);
 602
 603                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 604                          "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 605                          ring->idx,
 606                          skb_queue_len(&ring->queue),
 607                          *(u16 *)(skb->data + 22));
 608
 609                 if (prio == TXCMD_QUEUE) {
 610                         dev_kfree_skb(skb);
 611                         goto tx_status_ok;
 612
 613                 }
 614
 615                 /* for sw LPS, just after NULL skb send out, we can
 616                  * sure AP knows we are sleeping, we should not let
 617                  * rf sleep
 618                  */
 619                 fc = rtl_get_fc(skb);
 620                 if (ieee80211_is_nullfunc(fc)) {
 621                         if (ieee80211_has_pm(fc)) {
 622                                 rtlpriv->mac80211.offchan_delay = true;
 623                                 rtlpriv->psc.state_inap = true;
 624                         } else {
 625                                 rtlpriv->psc.state_inap = false;
 626                         }
 627                 }
 628                 if (ieee80211_is_action(fc)) {
 629                         struct ieee80211_mgmt *action_frame =
 630                                 (struct ieee80211_mgmt *)skb->data;
 631                         if (action_frame->u.action.u.ht_smps.action ==
 632                             WLAN_HT_ACTION_SMPS) {
 633                                 dev_kfree_skb(skb);
 634                                 goto tx_status_ok;
 635                         }
 636                 }
 637
 638                 /* update tid tx pkt num */
 639                 tid = rtl_get_tid(skb);
 640                 if (tid <= 7)
 641                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 642
 643                 info = IEEE80211_SKB_CB(skb);
 644                 ieee80211_tx_info_clear_status(info);
 645
 646                 info->flags |= IEEE80211_TX_STAT_ACK;
 647                 /*info->status.rates[0].count = 1; */
 648
 649                 ieee80211_tx_status_irqsafe(hw, skb);
 650
 651                 if ((ring->entries - skb_queue_len(&ring->queue)) <= 4) {
 652
 653                         RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG,
 654                                  "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 655                                  prio, ring->idx,
 656                                  skb_queue_len(&ring->queue));
 657
 658                         ieee80211_wake_queue(hw,
 659                                         skb_get_queue_mapping
 660                                         (skb));
 661                 }
 662 tx_status_ok:
 663                 skb = NULL;
 664         }
 665
 666         if (((rtlpriv->link_info.num_rx_inperiod +
 667               rtlpriv->link_info.num_tx_inperiod) > 8) ||
 668               (rtlpriv->link_info.num_rx_inperiod > 2))
 669                 rtl_lps_leave(hw);
 670 }
 671
 672 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 673                                     struct sk_buff *new_skb, u8 *entry,
 674                                     int rxring_idx, int desc_idx)
 675 {
 676         struct rtl_priv *rtlpriv = rtl_priv(hw);
 677         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 678         u32 bufferaddress;
 679         u8 tmp_one = 1;
 680         struct sk_buff *skb;
 681
 682         if (likely(new_skb)) {
 683                 skb = new_skb;
 684                 goto remap;
 685         }
 686         skb = dev_alloc_skb(rtlpci->rxbuffersize);
 687         if (!skb)
 688                 return 0;
 689
 690 remap:
 691         /* just set skb->cb to mapping addr for pci_unmap_single use */
 692         *((dma_addr_t *)skb->cb) =
 693                 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 694                                rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 695         bufferaddress = *((dma_addr_t *)skb->cb);
 696         if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
 697                 return 0;
 698         rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 699         if (rtlpriv->use_new_trx_flow) {
 700                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 701                                             HW_DESC_RX_PREPARE,
 702                                             (u8 *)&bufferaddress);
 703         } else {
 704                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 705                                             HW_DESC_RXBUFF_ADDR,
 706                                             (u8 *)&bufferaddress);
 707                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 708                                             HW_DESC_RXPKT_LEN,
 709                                             (u8 *)&rtlpci->rxbuffersize);
 710                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 711                                             HW_DESC_RXOWN,
 712                                             (u8 *)&tmp_one);
 713         }
 714         return 1;
 715 }
 716
 717 /* inorder to receive 8K AMSDU we have set skb to
 718  * 9100bytes in init rx ring, but if this packet is
 719  * not a AMSDU, this large packet will be sent to
 720  * TCP/IP directly, this cause big packet ping fail
 721  * like: "ping -s 65507", so here we will realloc skb
 722  * based on the true size of packet, Mac80211
 723  * Probably will do it better, but does not yet.
 724  *
 725  * Some platform will fail when alloc skb sometimes.
 726  * in this condition, we will send the old skb to
 727  * mac80211 directly, this will not cause any other
 728  * issues, but only this packet will be lost by TCP/IP
 729  */
 730 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 731                                     struct sk_buff *skb,
 732                                     struct ieee80211_rx_status rx_status)
 733 {
 734         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 735                 dev_kfree_skb_any(skb);
 736         } else {
 737                 struct sk_buff *uskb = NULL;
 738                 u8 *pdata;
 739
 740                 uskb = dev_alloc_skb(skb->len + 128);
 741                 if (likely(uskb)) {
 742                         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 743                                sizeof(rx_status));
 744                         pdata = (u8 *)skb_put(uskb, skb->len);
 745                         memcpy(pdata, skb->data, skb->len);
 746                         dev_kfree_skb_any(skb);
 747                         ieee80211_rx_irqsafe(hw, uskb);
 748                 } else {
 749                         ieee80211_rx_irqsafe(hw, skb);
 750                 }
 751         }
 752 }
 753
 754 /*hsisr interrupt handler*/
 755 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 756 {
 757         struct rtl_priv *rtlpriv = rtl_priv(hw);
 758         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 759
 760         rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 761                        rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 762                        rtlpci->sys_irq_mask);
 763 }
 764
 765 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 766 {
 767         struct rtl_priv *rtlpriv = rtl_priv(hw);
 768         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 769         int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 770         struct ieee80211_rx_status rx_status = { 0 };
 771         unsigned int count = rtlpci->rxringcount;
 772         u8 own;
 773         u8 tmp_one;
 774         bool unicast = false;
 775         u8 hw_queue = 0;
 776         unsigned int rx_remained_cnt;
 777         struct rtl_stats stats = {
 778                 .signal = 0,
 779                 .rate = 0,
 780         };
 781
 782         /*RX NORMAL PKT */
 783         while (count--) {
 784                 struct ieee80211_hdr *hdr;
 785                 __le16 fc;
 786                 u16 len;
 787                 /*rx buffer descriptor */
 788                 struct rtl_rx_buffer_desc *buffer_desc = NULL;
 789                 /*if use new trx flow, it means wifi info */
 790                 struct rtl_rx_desc *pdesc = NULL;
 791                 /*rx pkt */
 792                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 793                                       rtlpci->rx_ring[rxring_idx].idx];
 794                 struct sk_buff *new_skb;
 795
 796                 if (rtlpriv->use_new_trx_flow) {
 797                         rx_remained_cnt =
 798                                 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 799                                                                       hw_queue);
 800                         if (rx_remained_cnt == 0)
 801                                 return;
 802                         buffer_desc = &rtlpci->rx_ring[rxring_idx].buffer_desc[
 803                                 rtlpci->rx_ring[rxring_idx].idx];
 804                         pdesc = (struct rtl_rx_desc *)skb->data;
 805                 } else {        /* rx descriptor */
 806                         pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 807                                 rtlpci->rx_ring[rxring_idx].idx];
 808
 809                         own = (u8)rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
 810                                                               false,
 811                                                               HW_DESC_OWN);
 812                         if (own) /* wait data to be filled by hardware */
 813                                 return;
 814                 }
 815
 816                 /* Reaching this point means: data is filled already
 817                  * AAAAAAttention !!!
 818                  * We can NOT access 'skb' before 'pci_unmap_single'
 819                  */
 820                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
 821                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 822
 823                 /* get a new skb - if fail, old one will be reused */
 824                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 825                 if (unlikely(!new_skb))
 826                         goto no_new;
 827                 memset(&rx_status , 0 , sizeof(rx_status));
 828                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 829                                                  &rx_status, (u8 *)pdesc, skb);
 830
 831                 if (rtlpriv->use_new_trx_flow)
 832                         rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 833                                                            (u8 *)buffer_desc,
 834                                                            hw_queue);
 835
 836                 len = rtlpriv->cfg->ops->get_desc((u8 *)pdesc, false,
 837                                                   HW_DESC_RXPKT_LEN);
 838
 839                 if (skb->end - skb->tail > len) {
 840                         skb_put(skb, len);
 841                         if (rtlpriv->use_new_trx_flow)
 842                                 skb_reserve(skb, stats.rx_drvinfo_size +
 843                                             stats.rx_bufshift + 24);
 844                         else
 845                                 skb_reserve(skb, stats.rx_drvinfo_size +
 846                                             stats.rx_bufshift);
 847                 } else {
 848                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 849                                  "skb->end - skb->tail = %d, len is %d\n",
 850                                  skb->end - skb->tail, len);
 851                         dev_kfree_skb_any(skb);
 852                         goto new_trx_end;
 853                 }
 854                 /* handle command packet here */
 855                 if (rtlpriv->cfg->ops->rx_command_packet &&
 856                     rtlpriv->cfg->ops->rx_command_packet(hw, stats, skb)) {
 857                                 dev_kfree_skb_any(skb);
 858                                 goto new_trx_end;
 859                 }
 860
 861                 /*
 862                  * NOTICE This can not be use for mac80211,
 863                  * this is done in mac80211 code,
 864                  * if done here sec DHCP will fail
 865                  * skb_trim(skb, skb->len - 4);
 866                  */
 867
 868                 hdr = rtl_get_hdr(skb);
 869                 fc = rtl_get_fc(skb);
 870
 871                 if (!stats.crc && !stats.hwerror) {
 872                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 873                                sizeof(rx_status));
 874
 875                         if (is_broadcast_ether_addr(hdr->addr1)) {
 876                                 ;/*TODO*/
 877                         } else if (is_multicast_ether_addr(hdr->addr1)) {
 878                                 ;/*TODO*/
 879                         } else {
 880                                 unicast = true;
 881                                 rtlpriv->stats.rxbytesunicast += skb->len;
 882                         }
 883                         rtl_is_special_data(hw, skb, false, true);
 884
 885                         if (ieee80211_is_data(fc)) {
 886                                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 887                                 if (unicast)
 888                                         rtlpriv->link_info.num_rx_inperiod++;
 889                         }
 890                         /* static bcn for roaming */
 891                         rtl_beacon_statistic(hw, skb);
 892                         rtl_p2p_info(hw, (void *)skb->data, skb->len);
 893                         /* for sw lps */
 894                         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 895                         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 896                         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 897                             (rtlpriv->rtlhal.current_bandtype ==
 898                              BAND_ON_2_4G) &&
 899                             (ieee80211_is_beacon(fc) ||
 900                              ieee80211_is_probe_resp(fc))) {
 901                                 dev_kfree_skb_any(skb);
 902                         } else {
 903                                 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 904                         }
 905                 } else {
 906                         dev_kfree_skb_any(skb);
 907                 }
 908 new_trx_end:
 909                 if (rtlpriv->use_new_trx_flow) {
 910                         rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 911                         rtlpci->rx_ring[hw_queue].next_rx_rp %=
 912                                         RTL_PCI_MAX_RX_COUNT;
 913
 914                         rx_remained_cnt--;
 915                         rtl_write_word(rtlpriv, 0x3B4,
 916                                        rtlpci->rx_ring[hw_queue].next_rx_rp);
 917                 }
 918                 if (((rtlpriv->link_info.num_rx_inperiod +
 919                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
 920                       (rtlpriv->link_info.num_rx_inperiod > 2))
 921                         rtl_lps_leave(hw);
 922                 skb = new_skb;
 923 no_new:
 924                 if (rtlpriv->use_new_trx_flow) {
 925                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 926                                                  rxring_idx,
 927                                                  rtlpci->rx_ring[rxring_idx].idx);
 928                 } else {
 929                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 930                                                  rxring_idx,
 931                                                  rtlpci->rx_ring[rxring_idx].idx);
 932                         if (rtlpci->rx_ring[rxring_idx].idx ==
 933                             rtlpci->rxringcount - 1)
 934                                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 935                                                             false,
 936                                                             HW_DESC_RXERO,
 937                                                             (u8 *)&tmp_one);
 938                 }
 939                 rtlpci->rx_ring[rxring_idx].idx =
 940                                 (rtlpci->rx_ring[rxring_idx].idx + 1) %
 941                                 rtlpci->rxringcount;
 942         }
 943 }
 944
 945 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 946 {
 947         struct ieee80211_hw *hw = dev_id;
 948         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 949         struct rtl_priv *rtlpriv = rtl_priv(hw);
 950         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 951         unsigned long flags;
 952         u32 inta = 0;
 953         u32 intb = 0;
 954         irqreturn_t ret = IRQ_HANDLED;
 955
 956         if (rtlpci->irq_enabled == 0)
 957                 return ret;
 958
 959         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock , flags);
 960         rtlpriv->cfg->ops->disable_interrupt(hw);
 961
 962         /*read ISR: 4/8bytes */
 963         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 964
 965         /*Shared IRQ or HW disappared */
 966         if (!inta || inta == 0xffff)
 967                 goto done;
 968
 969         /*<1> beacon related */
 970         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 971                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 972                          "beacon ok interrupt!\n");
 973         }
 974
 975         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 976                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 977                          "beacon err interrupt!\n");
 978         }
 979
 980         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 981                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 982         }
 983
 984         if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 985                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 986                          "prepare beacon for interrupt!\n");
 987                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 988         }
 989
 990         /*<2> Tx related */
 991         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 992                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
 993
 994         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 995                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 996                          "Manage ok interrupt!\n");
 997                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 998         }
 999
1000         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
1001                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1002                          "HIGH_QUEUE ok interrupt!\n");
1003                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
1004         }
1005
1006         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
1007                 rtlpriv->link_info.num_tx_inperiod++;
1008
1009                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1010                          "BK Tx OK interrupt!\n");
1011                 _rtl_pci_tx_isr(hw, BK_QUEUE);
1012         }
1013
1014         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
1015                 rtlpriv->link_info.num_tx_inperiod++;
1016
1017                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1018                          "BE TX OK interrupt!\n");
1019                 _rtl_pci_tx_isr(hw, BE_QUEUE);
1020         }
1021
1022         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
1023                 rtlpriv->link_info.num_tx_inperiod++;
1024
1025                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1026                          "VI TX OK interrupt!\n");
1027                 _rtl_pci_tx_isr(hw, VI_QUEUE);
1028         }
1029
1030         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
1031                 rtlpriv->link_info.num_tx_inperiod++;
1032
1033                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1034                          "Vo TX OK interrupt!\n");
1035                 _rtl_pci_tx_isr(hw, VO_QUEUE);
1036         }
1037
1038         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1039                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1040                         rtlpriv->link_info.num_tx_inperiod++;
1041
1042                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1043                                  "CMD TX OK interrupt!\n");
1044                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1045                 }
1046         }
1047
1048         /*<3> Rx related */
1049         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1050                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1051                 _rtl_pci_rx_interrupt(hw);
1052         }
1053
1054         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1055                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1056                          "rx descriptor unavailable!\n");
1057                 _rtl_pci_rx_interrupt(hw);
1058         }
1059
1060         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1061                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1062                 _rtl_pci_rx_interrupt(hw);
1063         }
1064
1065         /*<4> fw related*/
1066         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1067                 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1068                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1069                                  "firmware interrupt!\n");
1070                         queue_delayed_work(rtlpriv->works.rtl_wq,
1071                                            &rtlpriv->works.fwevt_wq, 0);
1072                 }
1073         }
1074
1075         /*<5> hsisr related*/
1076         /* Only 8188EE & 8723BE Supported.
1077          * If Other ICs Come in, System will corrupt,
1078          * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1079          * are not initialized
1080          */
1081         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1082             rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1083                 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1084                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1085                                  "hsisr interrupt!\n");
1086                         _rtl_pci_hs_interrupt(hw);
1087                 }
1088         }
1089
1090         if (rtlpriv->rtlhal.earlymode_enable)
1091                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1092
1093 done:
1094         rtlpriv->cfg->ops->enable_interrupt(hw);
1095         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1096         return ret;
1097 }
1098
1099 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
1100 {
1101         _rtl_pci_tx_chk_waitq(hw);
1102 }
1103
1104 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
1105 {
1106         struct rtl_priv *rtlpriv = rtl_priv(hw);
1107         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1108         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1109         struct rtl8192_tx_ring *ring = NULL;
1110         struct ieee80211_hdr *hdr = NULL;
1111         struct ieee80211_tx_info *info = NULL;
1112         struct sk_buff *pskb = NULL;
1113         struct rtl_tx_desc *pdesc = NULL;
1114         struct rtl_tcb_desc tcb_desc;
1115         /*This is for new trx flow*/
1116         struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1117         u8 temp_one = 1;
1118         u8 *entry;
1119
1120         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1121         ring = &rtlpci->tx_ring[BEACON_QUEUE];
1122         pskb = __skb_dequeue(&ring->queue);
1123         if (rtlpriv->use_new_trx_flow)
1124                 entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1125         else
1126                 entry = (u8 *)(&ring->desc[ring->idx]);
1127         if (pskb) {
1128                 pci_unmap_single(rtlpci->pdev,
1129                                  rtlpriv->cfg->ops->get_desc(
1130                                  (u8 *)entry, true, HW_DESC_TXBUFF_ADDR),
1131                                  pskb->len, PCI_DMA_TODEVICE);
1132                 kfree_skb(pskb);
1133         }
1134
1135         /*NB: the beacon data buffer must be 32-bit aligned. */
1136         pskb = ieee80211_beacon_get(hw, mac->vif);
1137         if (pskb == NULL)
1138                 return;
1139         hdr = rtl_get_hdr(pskb);
1140         info = IEEE80211_SKB_CB(pskb);
1141         pdesc = &ring->desc[0];
1142         if (rtlpriv->use_new_trx_flow)
1143                 pbuffer_desc = &ring->buffer_desc[0];
1144
1145         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1146                                         (u8 *)pbuffer_desc, info, NULL, pskb,
1147                                         BEACON_QUEUE, &tcb_desc);
1148
1149         __skb_queue_tail(&ring->queue, pskb);
1150
1151         if (rtlpriv->use_new_trx_flow) {
1152                 temp_one = 4;
1153                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1154                                             HW_DESC_OWN, (u8 *)&temp_one);
1155         } else {
1156                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1157                                             &temp_one);
1158         }
1159         return;
1160 }
1161
1162 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1163 {
1164         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1165         struct rtl_priv *rtlpriv = rtl_priv(hw);
1166         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1167         u8 i;
1168         u16 desc_num;
1169
1170         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1171                 desc_num = TX_DESC_NUM_92E;
1172         else
1173                 desc_num = RT_TXDESC_NUM;
1174
1175         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1176                 rtlpci->txringcount[i] = desc_num;
1177
1178         /*
1179          *we just alloc 2 desc for beacon queue,
1180          *because we just need first desc in hw beacon.
1181          */
1182         rtlpci->txringcount[BEACON_QUEUE] = 2;
1183
1184         /*BE queue need more descriptor for performance
1185          *consideration or, No more tx desc will happen,
1186          *and may cause mac80211 mem leakage.
1187          */
1188         if (!rtl_priv(hw)->use_new_trx_flow)
1189                 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1190
1191         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1192         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1193 }
1194
1195 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1196                 struct pci_dev *pdev)
1197 {
1198         struct rtl_priv *rtlpriv = rtl_priv(hw);
1199         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1200         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1201         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1202
1203         rtlpci->up_first_time = true;
1204         rtlpci->being_init_adapter = false;
1205
1206         rtlhal->hw = hw;
1207         rtlpci->pdev = pdev;
1208
1209         /*Tx/Rx related var */
1210         _rtl_pci_init_trx_var(hw);
1211
1212         /*IBSS*/ mac->beacon_interval = 100;
1213
1214         /*AMPDU*/
1215         mac->min_space_cfg = 0;
1216         mac->max_mss_density = 0;
1217         /*set sane AMPDU defaults */
1218         mac->current_ampdu_density = 7;
1219         mac->current_ampdu_factor = 3;
1220
1221         /*QOS*/
1222         rtlpci->acm_method = EACMWAY2_SW;
1223
1224         /*task */
1225         tasklet_init(&rtlpriv->works.irq_tasklet,
1226                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1227                      (unsigned long)hw);
1228         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1229                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1230                      (unsigned long)hw);
1231         INIT_WORK(&rtlpriv->works.lps_change_work,
1232                   rtl_lps_change_work_callback);
1233 }
1234
1235 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1236                                  unsigned int prio, unsigned int entries)
1237 {
1238         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1239         struct rtl_priv *rtlpriv = rtl_priv(hw);
1240         struct rtl_tx_buffer_desc *buffer_desc;
1241         struct rtl_tx_desc *desc;
1242         dma_addr_t buffer_desc_dma, desc_dma;
1243         u32 nextdescaddress;
1244         int i;
1245
1246         /* alloc tx buffer desc for new trx flow*/
1247         if (rtlpriv->use_new_trx_flow) {
1248                 buffer_desc =
1249                    pci_zalloc_consistent(rtlpci->pdev,
1250                                          sizeof(*buffer_desc) * entries,
1251                                          &buffer_desc_dma);
1252
1253                 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1254                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1255                                  "Cannot allocate TX ring (prio = %d)\n",
1256                                  prio);
1257                         return -ENOMEM;
1258                 }
1259
1260                 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1261                 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1262
1263                 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1264                 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1265                 rtlpci->tx_ring[prio].avl_desc = entries;
1266         }
1267
1268         /* alloc dma for this ring */
1269         desc = pci_zalloc_consistent(rtlpci->pdev,
1270                                      sizeof(*desc) * entries, &desc_dma);
1271
1272         if (!desc || (unsigned long)desc & 0xFF) {
1273                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1274                          "Cannot allocate TX ring (prio = %d)\n", prio);
1275                 return -ENOMEM;
1276         }
1277
1278         rtlpci->tx_ring[prio].desc = desc;
1279         rtlpci->tx_ring[prio].dma = desc_dma;
1280
1281         rtlpci->tx_ring[prio].idx = 0;
1282         rtlpci->tx_ring[prio].entries = entries;
1283         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1284
1285         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1286                  prio, desc);
1287
1288         /* init every desc in this ring */
1289         if (!rtlpriv->use_new_trx_flow) {
1290                 for (i = 0; i < entries; i++) {
1291                         nextdescaddress = (u32)desc_dma +
1292                                           ((i + 1) % entries) *
1293                                           sizeof(*desc);
1294
1295                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1296                                                     true,
1297                                                     HW_DESC_TX_NEXTDESC_ADDR,
1298                                                     (u8 *)&nextdescaddress);
1299                 }
1300         }
1301         return 0;
1302 }
1303
1304 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1305 {
1306         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1307         struct rtl_priv *rtlpriv = rtl_priv(hw);
1308         int i;
1309
1310         if (rtlpriv->use_new_trx_flow) {
1311                 struct rtl_rx_buffer_desc *entry = NULL;
1312                 /* alloc dma for this ring */
1313                 rtlpci->rx_ring[rxring_idx].buffer_desc =
1314                     pci_zalloc_consistent(rtlpci->pdev,
1315                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1316                                                  buffer_desc) *
1317                                                  rtlpci->rxringcount,
1318                                           &rtlpci->rx_ring[rxring_idx].dma);
1319                 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1320                     (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1321                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1322                                  "Cannot allocate RX ring\n");
1323                         return -ENOMEM;
1324                 }
1325
1326                 /* init every desc in this ring */
1327                 rtlpci->rx_ring[rxring_idx].idx = 0;
1328                 for (i = 0; i < rtlpci->rxringcount; i++) {
1329                         entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1330                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1331                                                       rxring_idx, i))
1332                                 return -ENOMEM;
1333                 }
1334         } else {
1335                 struct rtl_rx_desc *entry = NULL;
1336                 u8 tmp_one = 1;
1337                 /* alloc dma for this ring */
1338                 rtlpci->rx_ring[rxring_idx].desc =
1339                     pci_zalloc_consistent(rtlpci->pdev,
1340                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1341                                           desc) * rtlpci->rxringcount,
1342                                           &rtlpci->rx_ring[rxring_idx].dma);
1343                 if (!rtlpci->rx_ring[rxring_idx].desc ||
1344                     (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1345                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1346                                  "Cannot allocate RX ring\n");
1347                         return -ENOMEM;
1348                 }
1349
1350                 /* init every desc in this ring */
1351                 rtlpci->rx_ring[rxring_idx].idx = 0;
1352
1353                 for (i = 0; i < rtlpci->rxringcount; i++) {
1354                         entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1355                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1356                                                       rxring_idx, i))
1357                                 return -ENOMEM;
1358                 }
1359
1360                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1361                                             HW_DESC_RXERO, &tmp_one);
1362         }
1363         return 0;
1364 }
1365
1366 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1367                 unsigned int prio)
1368 {
1369         struct rtl_priv *rtlpriv = rtl_priv(hw);
1370         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1371         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1372
1373         /* free every desc in this ring */
1374         while (skb_queue_len(&ring->queue)) {
1375                 u8 *entry;
1376                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1377
1378                 if (rtlpriv->use_new_trx_flow)
1379                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1380                 else
1381                         entry = (u8 *)(&ring->desc[ring->idx]);
1382
1383                 pci_unmap_single(rtlpci->pdev,
1384                                  rtlpriv->cfg->
1385                                              ops->get_desc((u8 *)entry, true,
1386                                                    HW_DESC_TXBUFF_ADDR),
1387                                  skb->len, PCI_DMA_TODEVICE);
1388                 kfree_skb(skb);
1389                 ring->idx = (ring->idx + 1) % ring->entries;
1390         }
1391
1392         /* free dma of this ring */
1393         pci_free_consistent(rtlpci->pdev,
1394                             sizeof(*ring->desc) * ring->entries,
1395                             ring->desc, ring->dma);
1396         ring->desc = NULL;
1397         if (rtlpriv->use_new_trx_flow) {
1398                 pci_free_consistent(rtlpci->pdev,
1399                                     sizeof(*ring->buffer_desc) * ring->entries,
1400                                     ring->buffer_desc, ring->buffer_desc_dma);
1401                 ring->buffer_desc = NULL;
1402         }
1403 }
1404
1405 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1406 {
1407         struct rtl_priv *rtlpriv = rtl_priv(hw);
1408         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1409         int i;
1410
1411         /* free every desc in this ring */
1412         for (i = 0; i < rtlpci->rxringcount; i++) {
1413                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1414
1415                 if (!skb)
1416                         continue;
1417                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1418                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1419                 kfree_skb(skb);
1420         }
1421
1422         /* free dma of this ring */
1423         if (rtlpriv->use_new_trx_flow) {
1424                 pci_free_consistent(rtlpci->pdev,
1425                                     sizeof(*rtlpci->rx_ring[rxring_idx].
1426                                     buffer_desc) * rtlpci->rxringcount,
1427                                     rtlpci->rx_ring[rxring_idx].buffer_desc,
1428                                     rtlpci->rx_ring[rxring_idx].dma);
1429                 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1430         } else {
1431                 pci_free_consistent(rtlpci->pdev,
1432                                     sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1433                                     rtlpci->rxringcount,
1434                                     rtlpci->rx_ring[rxring_idx].desc,
1435                                     rtlpci->rx_ring[rxring_idx].dma);
1436                 rtlpci->rx_ring[rxring_idx].desc = NULL;
1437         }
1438 }
1439
1440 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1441 {
1442         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1443         int ret;
1444         int i, rxring_idx;
1445
1446         /* rxring_idx 0:RX_MPDU_QUEUE
1447          * rxring_idx 1:RX_CMD_QUEUE
1448          */
1449         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1450                 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1451                 if (ret)
1452                         return ret;
1453         }
1454
1455         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1456                 ret = _rtl_pci_init_tx_ring(hw, i,
1457                                  rtlpci->txringcount[i]);
1458                 if (ret)
1459                         goto err_free_rings;
1460         }
1461
1462         return 0;
1463
1464 err_free_rings:
1465         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1466                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1467
1468         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1469                 if (rtlpci->tx_ring[i].desc ||
1470                     rtlpci->tx_ring[i].buffer_desc)
1471                         _rtl_pci_free_tx_ring(hw, i);
1472
1473         return 1;
1474 }
1475
1476 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1477 {
1478         u32 i, rxring_idx;
1479
1480         /*free rx rings */
1481         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1482                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1483
1484         /*free tx rings */
1485         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1486                 _rtl_pci_free_tx_ring(hw, i);
1487
1488         return 0;
1489 }
1490
1491 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1492 {
1493         struct rtl_priv *rtlpriv = rtl_priv(hw);
1494         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1495         int i, rxring_idx;
1496         unsigned long flags;
1497         u8 tmp_one = 1;
1498         u32 bufferaddress;
1499         /* rxring_idx 0:RX_MPDU_QUEUE */
1500         /* rxring_idx 1:RX_CMD_QUEUE */
1501         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1502                 /* force the rx_ring[RX_MPDU_QUEUE/
1503                  * RX_CMD_QUEUE].idx to the first one
1504                  *new trx flow, do nothing
1505                 */
1506                 if (!rtlpriv->use_new_trx_flow &&
1507                     rtlpci->rx_ring[rxring_idx].desc) {
1508                         struct rtl_rx_desc *entry = NULL;
1509
1510                         rtlpci->rx_ring[rxring_idx].idx = 0;
1511                         for (i = 0; i < rtlpci->rxringcount; i++) {
1512                                 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1513                                 bufferaddress =
1514                                   rtlpriv->cfg->ops->get_desc((u8 *)entry,
1515                                   false , HW_DESC_RXBUFF_ADDR);
1516                                 memset((u8 *)entry , 0 ,
1517                                        sizeof(*rtlpci->rx_ring
1518                                        [rxring_idx].desc));/*clear one entry*/
1519                                 if (rtlpriv->use_new_trx_flow) {
1520                                         rtlpriv->cfg->ops->set_desc(hw,
1521                                             (u8 *)entry, false,
1522                                             HW_DESC_RX_PREPARE,
1523                                             (u8 *)&bufferaddress);
1524                                 } else {
1525                                         rtlpriv->cfg->ops->set_desc(hw,
1526                                             (u8 *)entry, false,
1527                                             HW_DESC_RXBUFF_ADDR,
1528                                             (u8 *)&bufferaddress);
1529                                         rtlpriv->cfg->ops->set_desc(hw,
1530                                             (u8 *)entry, false,
1531                                             HW_DESC_RXPKT_LEN,
1532                                             (u8 *)&rtlpci->rxbuffersize);
1533                                         rtlpriv->cfg->ops->set_desc(hw,
1534                                             (u8 *)entry, false,
1535                                             HW_DESC_RXOWN,
1536                                             (u8 *)&tmp_one);
1537                                 }
1538                         }
1539                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1540                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1541                 }
1542                 rtlpci->rx_ring[rxring_idx].idx = 0;
1543         }
1544
1545         /*
1546          *after reset, release previous pending packet,
1547          *and force the  tx idx to the first one
1548          */
1549         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1550         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1551                 if (rtlpci->tx_ring[i].desc ||
1552                     rtlpci->tx_ring[i].buffer_desc) {
1553                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1554
1555                         while (skb_queue_len(&ring->queue)) {
1556                                 u8 *entry;
1557                                 struct sk_buff *skb =
1558                                         __skb_dequeue(&ring->queue);
1559                                 if (rtlpriv->use_new_trx_flow)
1560                                         entry = (u8 *)(&ring->buffer_desc
1561                                                                 [ring->idx]);
1562                                 else
1563                                         entry = (u8 *)(&ring->desc[ring->idx]);
1564
1565                                 pci_unmap_single(rtlpci->pdev,
1566                                                  rtlpriv->cfg->ops->
1567                                                          get_desc((u8 *)
1568                                                          entry,
1569                                                          true,
1570                                                          HW_DESC_TXBUFF_ADDR),
1571                                                  skb->len, PCI_DMA_TODEVICE);
1572                                 dev_kfree_skb_irq(skb);
1573                                 ring->idx = (ring->idx + 1) % ring->entries;
1574                         }
1575                         ring->idx = 0;
1576                 }
1577         }
1578         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1579
1580         return 0;
1581 }
1582
1583 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1584                                         struct ieee80211_sta *sta,
1585                                         struct sk_buff *skb)
1586 {
1587         struct rtl_priv *rtlpriv = rtl_priv(hw);
1588         struct rtl_sta_info *sta_entry = NULL;
1589         u8 tid = rtl_get_tid(skb);
1590         __le16 fc = rtl_get_fc(skb);
1591
1592         if (!sta)
1593                 return false;
1594         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1595
1596         if (!rtlpriv->rtlhal.earlymode_enable)
1597                 return false;
1598         if (ieee80211_is_nullfunc(fc))
1599                 return false;
1600         if (ieee80211_is_qos_nullfunc(fc))
1601                 return false;
1602         if (ieee80211_is_pspoll(fc))
1603                 return false;
1604         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1605                 return false;
1606         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1607                 return false;
1608         if (tid > 7)
1609                 return false;
1610
1611         /* maybe every tid should be checked */
1612         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1613                 return false;
1614
1615         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1616         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1617         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1618
1619         return true;
1620 }
1621
1622 static int rtl_pci_tx(struct ieee80211_hw *hw,
1623                       struct ieee80211_sta *sta,
1624                       struct sk_buff *skb,
1625                       struct rtl_tcb_desc *ptcb_desc)
1626 {
1627         struct rtl_priv *rtlpriv = rtl_priv(hw);
1628         struct rtl_sta_info *sta_entry = NULL;
1629         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1630         struct rtl8192_tx_ring *ring;
1631         struct rtl_tx_desc *pdesc;
1632         struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1633         u16 idx;
1634         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1635         unsigned long flags;
1636         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1637         __le16 fc = rtl_get_fc(skb);
1638         u8 *pda_addr = hdr->addr1;
1639         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1640         /*ssn */
1641         u8 tid = 0;
1642         u16 seq_number = 0;
1643         u8 own;
1644         u8 temp_one = 1;
1645
1646         if (ieee80211_is_mgmt(fc))
1647                 rtl_tx_mgmt_proc(hw, skb);
1648
1649         if (rtlpriv->psc.sw_ps_enabled) {
1650                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1651                         !ieee80211_has_pm(fc))
1652                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1653         }
1654
1655         rtl_action_proc(hw, skb, true);
1656
1657         if (is_multicast_ether_addr(pda_addr))
1658                 rtlpriv->stats.txbytesmulticast += skb->len;
1659         else if (is_broadcast_ether_addr(pda_addr))
1660                 rtlpriv->stats.txbytesbroadcast += skb->len;
1661         else
1662                 rtlpriv->stats.txbytesunicast += skb->len;
1663
1664         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1665         ring = &rtlpci->tx_ring[hw_queue];
1666         if (hw_queue != BEACON_QUEUE) {
1667                 if (rtlpriv->use_new_trx_flow)
1668                         idx = ring->cur_tx_wp;
1669                 else
1670                         idx = (ring->idx + skb_queue_len(&ring->queue)) %
1671                               ring->entries;
1672         } else {
1673                 idx = 0;
1674         }
1675
1676         pdesc = &ring->desc[idx];
1677         if (rtlpriv->use_new_trx_flow) {
1678                 ptx_bd_desc = &ring->buffer_desc[idx];
1679         } else {
1680                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
1681                                 true, HW_DESC_OWN);
1682
1683                 if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1684                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1685                                  "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1686                                  hw_queue, ring->idx, idx,
1687                                  skb_queue_len(&ring->queue));
1688
1689                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1690                                                flags);
1691                         return skb->len;
1692                 }
1693         }
1694
1695         if (rtlpriv->cfg->ops->get_available_desc &&
1696             rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) {
1697                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1698                                  "get_available_desc fail\n");
1699                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1700                                                flags);
1701                         return skb->len;
1702         }
1703
1704         if (ieee80211_is_data_qos(fc)) {
1705                 tid = rtl_get_tid(skb);
1706                 if (sta) {
1707                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1708                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1709                                       IEEE80211_SCTL_SEQ) >> 4;
1710                         seq_number += 1;
1711
1712                         if (!ieee80211_has_morefrags(hdr->frame_control))
1713                                 sta_entry->tids[tid].seq_number = seq_number;
1714                 }
1715         }
1716
1717         if (ieee80211_is_data(fc))
1718                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1719
1720         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1721                         (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1722
1723         __skb_queue_tail(&ring->queue, skb);
1724
1725         if (rtlpriv->use_new_trx_flow) {
1726                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1727                                             HW_DESC_OWN, &hw_queue);
1728         } else {
1729                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1730                                             HW_DESC_OWN, &temp_one);
1731         }
1732
1733         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1734             hw_queue != BEACON_QUEUE) {
1735                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1736                          "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1737                          hw_queue, ring->idx, idx,
1738                          skb_queue_len(&ring->queue));
1739
1740                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1741         }
1742
1743         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1744
1745         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1746
1747         return 0;
1748 }
1749
1750 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1751 {
1752         struct rtl_priv *rtlpriv = rtl_priv(hw);
1753         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1754         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1755         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1756         u16 i = 0;
1757         int queue_id;
1758         struct rtl8192_tx_ring *ring;
1759
1760         if (mac->skip_scan)
1761                 return;
1762
1763         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1764                 u32 queue_len;
1765
1766                 if (((queues >> queue_id) & 0x1) == 0) {
1767                         queue_id--;
1768                         continue;
1769                 }
1770                 ring = &pcipriv->dev.tx_ring[queue_id];
1771                 queue_len = skb_queue_len(&ring->queue);
1772                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1773                         queue_id == TXCMD_QUEUE) {
1774                         queue_id--;
1775                         continue;
1776                 } else {
1777                         msleep(20);
1778                         i++;
1779                 }
1780
1781                 /* we just wait 1s for all queues */
1782                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1783                         is_hal_stop(rtlhal) || i >= 200)
1784                         return;
1785         }
1786 }
1787
1788 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1789 {
1790         struct rtl_priv *rtlpriv = rtl_priv(hw);
1791         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1792
1793         _rtl_pci_deinit_trx_ring(hw);
1794
1795         synchronize_irq(rtlpci->pdev->irq);
1796         tasklet_kill(&rtlpriv->works.irq_tasklet);
1797         cancel_work_sync(&rtlpriv->works.lps_change_work);
1798
1799         flush_workqueue(rtlpriv->works.rtl_wq);
1800         destroy_workqueue(rtlpriv->works.rtl_wq);
1801
1802 }
1803
1804 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1805 {
1806         struct rtl_priv *rtlpriv = rtl_priv(hw);
1807         int err;
1808
1809         _rtl_pci_init_struct(hw, pdev);
1810
1811         err = _rtl_pci_init_trx_ring(hw);
1812         if (err) {
1813                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1814                          "tx ring initialization failed\n");
1815                 return err;
1816         }
1817
1818         return 0;
1819 }
1820
1821 static int rtl_pci_start(struct ieee80211_hw *hw)
1822 {
1823         struct rtl_priv *rtlpriv = rtl_priv(hw);
1824         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1825         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1826         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1827
1828         int err;
1829
1830         rtl_pci_reset_trx_ring(hw);
1831
1832         rtlpci->driver_is_goingto_unload = false;
1833         if (rtlpriv->cfg->ops->get_btc_status &&
1834             rtlpriv->cfg->ops->get_btc_status()) {
1835                 rtlpriv->btcoexist.btc_ops->btc_init_variables(rtlpriv);
1836                 rtlpriv->btcoexist.btc_ops->btc_init_hal_vars(rtlpriv);
1837         }
1838         err = rtlpriv->cfg->ops->hw_init(hw);
1839         if (err) {
1840                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1841                          "Failed to config hardware!\n");
1842                 return err;
1843         }
1844
1845         rtlpriv->cfg->ops->enable_interrupt(hw);
1846         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1847
1848         rtl_init_rx_config(hw);
1849
1850         /*should be after adapter start and interrupt enable. */
1851         set_hal_start(rtlhal);
1852
1853         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1854
1855         rtlpci->up_first_time = false;
1856
1857         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "rtl_pci_start OK\n");
1858         return 0;
1859 }
1860
1861 static void rtl_pci_stop(struct ieee80211_hw *hw)
1862 {
1863         struct rtl_priv *rtlpriv = rtl_priv(hw);
1864         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1865         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1866         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1867         unsigned long flags;
1868         u8 RFInProgressTimeOut = 0;
1869
1870         if (rtlpriv->cfg->ops->get_btc_status())
1871                 rtlpriv->btcoexist.btc_ops->btc_halt_notify();
1872
1873         /*
1874          *should be before disable interrupt&adapter
1875          *and will do it immediately.
1876          */
1877         set_hal_stop(rtlhal);
1878
1879         rtlpci->driver_is_goingto_unload = true;
1880         rtlpriv->cfg->ops->disable_interrupt(hw);
1881         cancel_work_sync(&rtlpriv->works.lps_change_work);
1882
1883         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1884         while (ppsc->rfchange_inprogress) {
1885                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1886                 if (RFInProgressTimeOut > 100) {
1887                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1888                         break;
1889                 }
1890                 mdelay(1);
1891                 RFInProgressTimeOut++;
1892                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1893         }
1894         ppsc->rfchange_inprogress = true;
1895         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1896
1897         rtlpriv->cfg->ops->hw_disable(hw);
1898         /* some things are not needed if firmware not available */
1899         if (!rtlpriv->max_fw_size)
1900                 return;
1901         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1902
1903         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1904         ppsc->rfchange_inprogress = false;
1905         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1906
1907         rtl_pci_enable_aspm(hw);
1908 }
1909
1910 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1911                 struct ieee80211_hw *hw)
1912 {
1913         struct rtl_priv *rtlpriv = rtl_priv(hw);
1914         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1915         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1916         struct pci_dev *bridge_pdev = pdev->bus->self;
1917         u16 venderid;
1918         u16 deviceid;
1919         u8 revisionid;
1920         u16 irqline;
1921         u8 tmp;
1922
1923         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1924         venderid = pdev->vendor;
1925         deviceid = pdev->device;
1926         pci_read_config_byte(pdev, 0x8, &revisionid);
1927         pci_read_config_word(pdev, 0x3C, &irqline);
1928
1929         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1930          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1931          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1932          * the correct driver is r8192e_pci, thus this routine should
1933          * return false.
1934          */
1935         if (deviceid == RTL_PCI_8192SE_DID &&
1936             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1937                 return false;
1938
1939         if (deviceid == RTL_PCI_8192_DID ||
1940             deviceid == RTL_PCI_0044_DID ||
1941             deviceid == RTL_PCI_0047_DID ||
1942             deviceid == RTL_PCI_8192SE_DID ||
1943             deviceid == RTL_PCI_8174_DID ||
1944             deviceid == RTL_PCI_8173_DID ||
1945             deviceid == RTL_PCI_8172_DID ||
1946             deviceid == RTL_PCI_8171_DID) {
1947                 switch (revisionid) {
1948                 case RTL_PCI_REVISION_ID_8192PCIE:
1949                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1950                                  "8192 PCI-E is found - vid/did=%x/%x\n",
1951                                  venderid, deviceid);
1952                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1953                         return false;
1954                 case RTL_PCI_REVISION_ID_8192SE:
1955                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1956                                  "8192SE is found - vid/did=%x/%x\n",
1957                                  venderid, deviceid);
1958                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1959                         break;
1960                 default:
1961                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1962                                  "Err: Unknown device - vid/did=%x/%x\n",
1963                                  venderid, deviceid);
1964                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1965                         break;
1966
1967                 }
1968         } else if (deviceid == RTL_PCI_8723AE_DID) {
1969                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1970                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1971                          "8723AE PCI-E is found - "
1972                          "vid/did=%x/%x\n", venderid, deviceid);
1973         } else if (deviceid == RTL_PCI_8192CET_DID ||
1974                    deviceid == RTL_PCI_8192CE_DID ||
1975                    deviceid == RTL_PCI_8191CE_DID ||
1976                    deviceid == RTL_PCI_8188CE_DID) {
1977                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1978                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1979                          "8192C PCI-E is found - vid/did=%x/%x\n",
1980                          venderid, deviceid);
1981         } else if (deviceid == RTL_PCI_8192DE_DID ||
1982                    deviceid == RTL_PCI_8192DE_DID2) {
1983                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1984                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1985                          "8192D PCI-E is found - vid/did=%x/%x\n",
1986                          venderid, deviceid);
1987         } else if (deviceid == RTL_PCI_8188EE_DID) {
1988                 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1989                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1990                          "Find adapter, Hardware type is 8188EE\n");
1991         } else if (deviceid == RTL_PCI_8723BE_DID) {
1992                         rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
1993                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1994                                  "Find adapter, Hardware type is 8723BE\n");
1995         } else if (deviceid == RTL_PCI_8192EE_DID) {
1996                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
1997                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1998                                  "Find adapter, Hardware type is 8192EE\n");
1999         } else if (deviceid == RTL_PCI_8821AE_DID) {
2000                         rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
2001                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2002                                  "Find adapter, Hardware type is 8821AE\n");
2003         } else if (deviceid == RTL_PCI_8812AE_DID) {
2004                         rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
2005                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2006                                  "Find adapter, Hardware type is 8812AE\n");
2007         } else {
2008                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
2009                          "Err: Unknown device - vid/did=%x/%x\n",
2010                          venderid, deviceid);
2011
2012                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
2013         }
2014
2015         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
2016                 if (revisionid == 0 || revisionid == 1) {
2017                         if (revisionid == 0) {
2018                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2019                                          "Find 92DE MAC0\n");
2020                                 rtlhal->interfaceindex = 0;
2021                         } else if (revisionid == 1) {
2022                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2023                                          "Find 92DE MAC1\n");
2024                                 rtlhal->interfaceindex = 1;
2025                         }
2026                 } else {
2027                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2028                                  "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
2029                                  venderid, deviceid, revisionid);
2030                         rtlhal->interfaceindex = 0;
2031                 }
2032         }
2033
2034         /* 92ee use new trx flow */
2035         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
2036                 rtlpriv->use_new_trx_flow = true;
2037         else
2038                 rtlpriv->use_new_trx_flow = false;
2039
2040         /*find bus info */
2041         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2042         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2043         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2044
2045         /*find bridge info */
2046         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2047         /* some ARM have no bridge_pdev and will crash here
2048          * so we should check if bridge_pdev is NULL
2049          */
2050         if (bridge_pdev) {
2051                 /*find bridge info if available */
2052                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2053                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2054                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2055                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2056                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2057                                          "Pci Bridge Vendor is found index: %d\n",
2058                                          tmp);
2059                                 break;
2060                         }
2061                 }
2062         }
2063
2064         if (pcipriv->ndis_adapter.pcibridge_vendor !=
2065                 PCI_BRIDGE_VENDOR_UNKNOWN) {
2066                 pcipriv->ndis_adapter.pcibridge_busnum =
2067                     bridge_pdev->bus->number;
2068                 pcipriv->ndis_adapter.pcibridge_devnum =
2069                     PCI_SLOT(bridge_pdev->devfn);
2070                 pcipriv->ndis_adapter.pcibridge_funcnum =
2071                     PCI_FUNC(bridge_pdev->devfn);
2072                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2073                     pci_pcie_cap(bridge_pdev);
2074                 pcipriv->ndis_adapter.num4bytes =
2075                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2076
2077                 rtl_pci_get_linkcontrol_field(hw);
2078
2079                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2080                     PCI_BRIDGE_VENDOR_AMD) {
2081                         pcipriv->ndis_adapter.amd_l1_patch =
2082                             rtl_pci_get_amd_l1_patch(hw);
2083                 }
2084         }
2085
2086         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2087                  "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2088                  pcipriv->ndis_adapter.busnumber,
2089                  pcipriv->ndis_adapter.devnumber,
2090                  pcipriv->ndis_adapter.funcnumber,
2091                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2092
2093         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2094                  "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2095                  pcipriv->ndis_adapter.pcibridge_busnum,
2096                  pcipriv->ndis_adapter.pcibridge_devnum,
2097                  pcipriv->ndis_adapter.pcibridge_funcnum,
2098                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2099                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2100                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2101                  pcipriv->ndis_adapter.amd_l1_patch);
2102
2103         rtl_pci_parse_configuration(pdev, hw);
2104         list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2105
2106         return true;
2107 }
2108
2109 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2110 {
2111         struct rtl_priv *rtlpriv = rtl_priv(hw);
2112         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2113         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2114         int ret;
2115
2116         ret = pci_enable_msi(rtlpci->pdev);
2117         if (ret < 0)
2118                 return ret;
2119
2120         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2121                           IRQF_SHARED, KBUILD_MODNAME, hw);
2122         if (ret < 0) {
2123                 pci_disable_msi(rtlpci->pdev);
2124                 return ret;
2125         }
2126
2127         rtlpci->using_msi = true;
2128
2129         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2130                  "MSI Interrupt Mode!\n");
2131         return 0;
2132 }
2133
2134 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2135 {
2136         struct rtl_priv *rtlpriv = rtl_priv(hw);
2137         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2138         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2139         int ret;
2140
2141         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2142                           IRQF_SHARED, KBUILD_MODNAME, hw);
2143         if (ret < 0)
2144                 return ret;
2145
2146         rtlpci->using_msi = false;
2147         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2148                  "Pin-based Interrupt Mode!\n");
2149         return 0;
2150 }
2151
2152 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2153 {
2154         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2155         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2156         int ret;
2157
2158         if (rtlpci->msi_support) {
2159                 ret = rtl_pci_intr_mode_msi(hw);
2160                 if (ret < 0)
2161                         ret = rtl_pci_intr_mode_legacy(hw);
2162         } else {
2163                 ret = rtl_pci_intr_mode_legacy(hw);
2164         }
2165         return ret;
2166 }
2167
2168 int rtl_pci_probe(struct pci_dev *pdev,
2169                             const struct pci_device_id *id)
2170 {
2171         struct ieee80211_hw *hw = NULL;
2172
2173         struct rtl_priv *rtlpriv = NULL;
2174         struct rtl_pci_priv *pcipriv = NULL;
2175         struct rtl_pci *rtlpci;
2176         unsigned long pmem_start, pmem_len, pmem_flags;
2177         int err;
2178
2179         err = pci_enable_device(pdev);
2180         if (err) {
2181                 RT_ASSERT(false, "%s : Cannot enable new PCI device\n",
2182                           pci_name(pdev));
2183                 return err;
2184         }
2185
2186         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2187                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2188                         RT_ASSERT(false,
2189                                   "Unable to obtain 32bit DMA for consistent allocations\n");
2190                         err = -ENOMEM;
2191                         goto fail1;
2192                 }
2193         }
2194
2195         pci_set_master(pdev);
2196
2197         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2198                                 sizeof(struct rtl_priv), &rtl_ops);
2199         if (!hw) {
2200                 RT_ASSERT(false,
2201                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
2202                 err = -ENOMEM;
2203                 goto fail1;
2204         }
2205
2206         SET_IEEE80211_DEV(hw, &pdev->dev);
2207         pci_set_drvdata(pdev, hw);
2208
2209         rtlpriv = hw->priv;
2210         rtlpriv->hw = hw;
2211         pcipriv = (void *)rtlpriv->priv;
2212         pcipriv->dev.pdev = pdev;
2213         init_completion(&rtlpriv->firmware_loading_complete);
2214         /*proximity init here*/
2215         rtlpriv->proximity.proxim_on = false;
2216
2217         pcipriv = (void *)rtlpriv->priv;
2218         pcipriv->dev.pdev = pdev;
2219
2220         /* init cfg & intf_ops */
2221         rtlpriv->rtlhal.interface = INTF_PCI;
2222         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2223         rtlpriv->intf_ops = &rtl_pci_ops;
2224         rtlpriv->glb_var = &rtl_global_var;
2225
2226         /*
2227          *init dbgp flags before all
2228          *other functions, because we will
2229          *use it in other funtions like
2230          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
2231          *you can not use these macro
2232          *before this
2233          */
2234         rtl_dbgp_flag_init(hw);
2235
2236         /* MEM map */
2237         err = pci_request_regions(pdev, KBUILD_MODNAME);
2238         if (err) {
2239                 RT_ASSERT(false, "Can't obtain PCI resources\n");
2240                 goto fail1;
2241         }
2242
2243         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2244         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2245         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2246
2247         /*shared mem start */
2248         rtlpriv->io.pci_mem_start =
2249                         (unsigned long)pci_iomap(pdev,
2250                         rtlpriv->cfg->bar_id, pmem_len);
2251         if (rtlpriv->io.pci_mem_start == 0) {
2252                 RT_ASSERT(false, "Can't map PCI mem\n");
2253                 err = -ENOMEM;
2254                 goto fail2;
2255         }
2256
2257         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2258                  "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2259                  pmem_start, pmem_len, pmem_flags,
2260                  rtlpriv->io.pci_mem_start);
2261
2262         /* Disable Clk Request */
2263         pci_write_config_byte(pdev, 0x81, 0);
2264         /* leave D3 mode */
2265         pci_write_config_byte(pdev, 0x44, 0);
2266         pci_write_config_byte(pdev, 0x04, 0x06);
2267         pci_write_config_byte(pdev, 0x04, 0x07);
2268
2269         /* find adapter */
2270         if (!_rtl_pci_find_adapter(pdev, hw)) {
2271                 err = -ENODEV;
2272                 goto fail3;
2273         }
2274
2275         /* Init IO handler */
2276         _rtl_pci_io_handler_init(&pdev->dev, hw);
2277
2278         /*like read eeprom and so on */
2279         rtlpriv->cfg->ops->read_eeprom_info(hw);
2280
2281         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2282                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");
2283                 err = -ENODEV;
2284                 goto fail3;
2285         }
2286         rtlpriv->cfg->ops->init_sw_leds(hw);
2287
2288         /*aspm */
2289         rtl_pci_init_aspm(hw);
2290
2291         /* Init mac80211 sw */
2292         err = rtl_init_core(hw);
2293         if (err) {
2294                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2295                          "Can't allocate sw for mac80211\n");
2296                 goto fail3;
2297         }
2298
2299         /* Init PCI sw */
2300         err = rtl_pci_init(hw, pdev);
2301         if (err) {
2302                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Failed to init PCI\n");
2303                 goto fail3;
2304         }
2305
2306         err = ieee80211_register_hw(hw);
2307         if (err) {
2308                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2309                          "Can't register mac80211 hw.\n");
2310                 err = -ENODEV;
2311                 goto fail3;
2312         }
2313         rtlpriv->mac80211.mac80211_registered = 1;
2314
2315         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
2316         if (err) {
2317                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2318                          "failed to create sysfs device attributes\n");
2319                 goto fail3;
2320         }
2321
2322         /*init rfkill */
2323         rtl_init_rfkill(hw);    /* Init PCI sw */
2324
2325         rtlpci = rtl_pcidev(pcipriv);
2326         err = rtl_pci_intr_mode_decide(hw);
2327         if (err) {
2328                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2329                          "%s: failed to register IRQ handler\n",
2330                          wiphy_name(hw->wiphy));
2331                 goto fail3;
2332         }
2333         rtlpci->irq_alloc = 1;
2334
2335         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2336         return 0;
2337
2338 fail3:
2339         pci_set_drvdata(pdev, NULL);
2340         rtl_deinit_core(hw);
2341
2342         if (rtlpriv->io.pci_mem_start != 0)
2343                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2344
2345 fail2:
2346         pci_release_regions(pdev);
2347         complete(&rtlpriv->firmware_loading_complete);
2348
2349 fail1:
2350         if (hw)
2351                 ieee80211_free_hw(hw);
2352         pci_disable_device(pdev);
2353
2354         return err;
2355
2356 }
2357 EXPORT_SYMBOL(rtl_pci_probe);
2358
2359 void rtl_pci_disconnect(struct pci_dev *pdev)
2360 {
2361         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2362         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2363         struct rtl_priv *rtlpriv = rtl_priv(hw);
2364         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2365         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2366
2367         /* just in case driver is removed before firmware callback */
2368         wait_for_completion(&rtlpriv->firmware_loading_complete);
2369         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2370
2371         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
2372
2373         /*ieee80211_unregister_hw will call ops_stop */
2374         if (rtlmac->mac80211_registered == 1) {
2375                 ieee80211_unregister_hw(hw);
2376                 rtlmac->mac80211_registered = 0;
2377         } else {
2378                 rtl_deinit_deferred_work(hw);
2379                 rtlpriv->intf_ops->adapter_stop(hw);
2380         }
2381         rtlpriv->cfg->ops->disable_interrupt(hw);
2382
2383         /*deinit rfkill */
2384         rtl_deinit_rfkill(hw);
2385
2386         rtl_pci_deinit(hw);
2387         rtl_deinit_core(hw);
2388         rtlpriv->cfg->ops->deinit_sw_vars(hw);
2389
2390         if (rtlpci->irq_alloc) {
2391                 synchronize_irq(rtlpci->pdev->irq);
2392                 free_irq(rtlpci->pdev->irq, hw);
2393                 rtlpci->irq_alloc = 0;
2394         }
2395
2396         if (rtlpci->using_msi)
2397                 pci_disable_msi(rtlpci->pdev);
2398
2399         list_del(&rtlpriv->list);
2400         if (rtlpriv->io.pci_mem_start != 0) {
2401                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2402                 pci_release_regions(pdev);
2403         }
2404
2405         pci_disable_device(pdev);
2406
2407         rtl_pci_disable_aspm(hw);
2408
2409         pci_set_drvdata(pdev, NULL);
2410
2411         ieee80211_free_hw(hw);
2412 }
2413 EXPORT_SYMBOL(rtl_pci_disconnect);
2414
2415 #ifdef CONFIG_PM_SLEEP
2416 /***************************************
2417 kernel pci power state define:
2418 PCI_D0         ((pci_power_t __force) 0)
2419 PCI_D1         ((pci_power_t __force) 1)
2420 PCI_D2         ((pci_power_t __force) 2)
2421 PCI_D3hot      ((pci_power_t __force) 3)
2422 PCI_D3cold     ((pci_power_t __force) 4)
2423 PCI_UNKNOWN    ((pci_power_t __force) 5)
2424
2425 This function is called when system
2426 goes into suspend state mac80211 will
2427 call rtl_mac_stop() from the mac80211
2428 suspend function first, So there is
2429 no need to call hw_disable here.
2430 ****************************************/
2431 int rtl_pci_suspend(struct device *dev)
2432 {
2433         struct pci_dev *pdev = to_pci_dev(dev);
2434         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2435         struct rtl_priv *rtlpriv = rtl_priv(hw);
2436
2437         rtlpriv->cfg->ops->hw_suspend(hw);
2438         rtl_deinit_rfkill(hw);
2439
2440         return 0;
2441 }
2442 EXPORT_SYMBOL(rtl_pci_suspend);
2443
2444 int rtl_pci_resume(struct device *dev)
2445 {
2446         struct pci_dev *pdev = to_pci_dev(dev);
2447         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2448         struct rtl_priv *rtlpriv = rtl_priv(hw);
2449
2450         rtlpriv->cfg->ops->hw_resume(hw);
2451         rtl_init_rfkill(hw);
2452         return 0;
2453 }
2454 EXPORT_SYMBOL(rtl_pci_resume);
2455 #endif /* CONFIG_PM_SLEEP */
2456
2457 struct rtl_intf_ops rtl_pci_ops = {
2458         .read_efuse_byte = read_efuse_byte,
2459         .adapter_start = rtl_pci_start,
2460         .adapter_stop = rtl_pci_stop,
2461         .check_buddy_priv = rtl_pci_check_buddy_priv,
2462         .adapter_tx = rtl_pci_tx,
2463         .flush = rtl_pci_flush,
2464         .reset_trx_ring = rtl_pci_reset_trx_ring,
2465         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2466
2467         .disable_aspm = rtl_pci_disable_aspm,
2468         .enable_aspm = rtl_pci_enable_aspm,
2469 };