kernel/drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  58                                      bool sw_pending)
  59 {
  60         bool pending = false;
  61
  62         spin_lock_bh(&txq->axq_lock);
  63
  64         if (txq->axq_depth) {
  65                 pending = true;
  66                 goto out;
  67         }
  68
  69         if (!sw_pending)
  70                 goto out;
  71
  72         if (txq->mac80211_qnum >= 0) {
  73                 struct list_head *list;
  74
  75                 list = &sc->cur_chan->acq[txq->mac80211_qnum];
  76                 if (!list_empty(list))
  77                         pending = true;
  78         }
  79 out:
  80         spin_unlock_bh(&txq->axq_lock);
  81         return pending;
  82 }
  83
  84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  85 {
  86         unsigned long flags;
  87         bool ret;
  88
  89         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  90         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  91         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  92
  93         return ret;
  94 }
  95
  96 void ath_ps_full_sleep(unsigned long data)
  97 {
  98         struct ath_softc *sc = (struct ath_softc *) data;
  99         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100         bool reset;
 101
 102         spin_lock(&common->cc_lock);
 103         ath_hw_cycle_counters_update(common);
 104         spin_unlock(&common->cc_lock);
 105
 106         ath9k_hw_setrxabort(sc->sc_ah, 1);
 107         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 108
 109         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 110 }
 111
 112 void ath9k_ps_wakeup(struct ath_softc *sc)
 113 {
 114         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 115         unsigned long flags;
 116         enum ath9k_power_mode power_mode;
 117
 118         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119         if (++sc->ps_usecount != 1)
 120                 goto unlock;
 121
 122         del_timer_sync(&sc->sleep_timer);
 123         power_mode = sc->sc_ah->power_mode;
 124         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 125
 126         /*
 127          * While the hardware is asleep, the cycle counters contain no
 128          * useful data. Better clear them now so that they don't mess up
 129          * survey data results.
 130          */
 131         if (power_mode != ATH9K_PM_AWAKE) {
 132                 spin_lock(&common->cc_lock);
 133                 ath_hw_cycle_counters_update(common);
 134                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 135                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 136                 spin_unlock(&common->cc_lock);
 137         }
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 void ath9k_ps_restore(struct ath_softc *sc)
 144 {
 145         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 146         enum ath9k_power_mode mode;
 147         unsigned long flags;
 148
 149         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 150         if (--sc->ps_usecount != 0)
 151                 goto unlock;
 152
 153         if (sc->ps_idle) {
 154                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 155                 goto unlock;
 156         }
 157
 158         if (sc->ps_enabled &&
 159                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 160                                      PS_WAIT_FOR_CAB |
 161                                      PS_WAIT_FOR_PSPOLL_DATA |
 162                                      PS_WAIT_FOR_TX_ACK |
 163                                      PS_WAIT_FOR_ANI))) {
 164                 mode = ATH9K_PM_NETWORK_SLEEP;
 165                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 166                         ath9k_btcoex_stop_gen_timer(sc);
 167         } else {
 168                 goto unlock;
 169         }
 170
 171         spin_lock(&common->cc_lock);
 172         ath_hw_cycle_counters_update(common);
 173         spin_unlock(&common->cc_lock);
 174
 175         ath9k_hw_setpower(sc->sc_ah, mode);
 176
 177  unlock:
 178         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 179 }
 180
 181 static void __ath_cancel_work(struct ath_softc *sc)
 182 {
 183         cancel_work_sync(&sc->paprd_work);
 184         cancel_delayed_work_sync(&sc->tx_complete_work);
 185         cancel_delayed_work_sync(&sc->hw_pll_work);
 186
 187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 188         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 189                 cancel_work_sync(&sc->mci_work);
 190 #endif
 191 }
 192
 193 void ath_cancel_work(struct ath_softc *sc)
 194 {
 195         __ath_cancel_work(sc);
 196         cancel_work_sync(&sc->hw_reset_work);
 197 }
 198
 199 void ath_restart_work(struct ath_softc *sc)
 200 {
 201         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 202
 203         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 204                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 205                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 206
 207         ath_start_ani(sc);
 208 }
 209
 210 static bool ath_prepare_reset(struct ath_softc *sc)
 211 {
 212         struct ath_hw *ah = sc->sc_ah;
 213         bool ret = true;
 214
 215         ieee80211_stop_queues(sc->hw);
 216         ath_stop_ani(sc);
 217         ath9k_hw_disable_interrupts(ah);
 218
 219         if (!ath_drain_all_txq(sc))
 220                 ret = false;
 221
 222         if (!ath_stoprecv(sc))
 223                 ret = false;
 224
 225         return ret;
 226 }
 227
 228 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 229 {
 230         struct ath_hw *ah = sc->sc_ah;
 231         struct ath_common *common = ath9k_hw_common(ah);
 232         unsigned long flags;
 233
 234         ath9k_calculate_summary_state(sc, sc->cur_chan);
 235         ath_startrecv(sc);
 236         ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
 237                                sc->cur_chan->txpower,
 238                                &sc->cur_chan->cur_txpower);
 239         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 240
 241         if (!sc->cur_chan->offchannel && start) {
 242                 /* restore per chanctx TSF timer */
 243                 if (sc->cur_chan->tsf_val) {
 244                         u32 offset;
 245
 246                         offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 247                                                          NULL);
 248                         ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 249                 }
 250
 251
 252                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 253                         goto work;
 254
 255                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 256                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 257                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 258                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 259                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 260                 } else {
 261                         ath9k_set_beacon(sc);
 262                 }
 263         work:
 264                 ath_restart_work(sc);
 265                 ath_txq_schedule_all(sc);
 266         }
 267
 268         sc->gtt_cnt = 0;
 269
 270         ath9k_hw_set_interrupts(ah);
 271         ath9k_hw_enable_interrupts(ah);
 272         ieee80211_wake_queues(sc->hw);
 273         ath9k_p2p_ps_timer(sc);
 274
 275         return true;
 276 }
 277
 278 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 279 {
 280         struct ath_hw *ah = sc->sc_ah;
 281         struct ath_common *common = ath9k_hw_common(ah);
 282         struct ath9k_hw_cal_data *caldata = NULL;
 283         bool fastcc = true;
 284         int r;
 285
 286         __ath_cancel_work(sc);
 287
 288         disable_irq(sc->irq);
 289         tasklet_disable(&sc->intr_tq);
 290         tasklet_disable(&sc->bcon_tasklet);
 291         spin_lock_bh(&sc->sc_pcu_lock);
 292
 293         if (!sc->cur_chan->offchannel) {
 294                 fastcc = false;
 295                 caldata = &sc->cur_chan->caldata;
 296         }
 297
 298         if (!hchan) {
 299                 fastcc = false;
 300                 hchan = ah->curchan;
 301         }
 302
 303         if (!ath_prepare_reset(sc))
 304                 fastcc = false;
 305
 306         if (ath9k_is_chanctx_enabled())
 307                 fastcc = false;
 308
 309         spin_lock_bh(&sc->chan_lock);
 310         sc->cur_chandef = sc->cur_chan->chandef;
 311         spin_unlock_bh(&sc->chan_lock);
 312
 313         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 314                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 315
 316         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 317         if (r) {
 318                 ath_err(common,
 319                         "Unable to reset channel, reset status %d\n", r);
 320
 321                 ath9k_hw_enable_interrupts(ah);
 322                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 323
 324                 goto out;
 325         }
 326
 327         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 328             sc->cur_chan->offchannel)
 329                 ath9k_mci_set_txpower(sc, true, false);
 330
 331         if (!ath_complete_reset(sc, true))
 332                 r = -EIO;
 333
 334 out:
 335         enable_irq(sc->irq);
 336         spin_unlock_bh(&sc->sc_pcu_lock);
 337         tasklet_enable(&sc->bcon_tasklet);
 338         tasklet_enable(&sc->intr_tq);
 339
 340         return r;
 341 }
 342
 343 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 344                             struct ieee80211_vif *vif)
 345 {
 346         struct ath_node *an;
 347         an = (struct ath_node *)sta->drv_priv;
 348
 349         an->sc = sc;
 350         an->sta = sta;
 351         an->vif = vif;
 352         memset(&an->key_idx, 0, sizeof(an->key_idx));
 353
 354         ath_tx_node_init(sc, an);
 355
 356         ath_dynack_node_init(sc->sc_ah, an);
 357 }
 358
 359 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 360 {
 361         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 362         ath_tx_node_cleanup(sc, an);
 363
 364         ath_dynack_node_deinit(sc->sc_ah, an);
 365 }
 366
 367 void ath9k_tasklet(unsigned long data)
 368 {
 369         struct ath_softc *sc = (struct ath_softc *)data;
 370         struct ath_hw *ah = sc->sc_ah;
 371         struct ath_common *common = ath9k_hw_common(ah);
 372         enum ath_reset_type type;
 373         unsigned long flags;
 374         u32 status = sc->intrstatus;
 375         u32 rxmask;
 376
 377         ath9k_ps_wakeup(sc);
 378         spin_lock(&sc->sc_pcu_lock);
 379
 380         if (status & ATH9K_INT_FATAL) {
 381                 type = RESET_TYPE_FATAL_INT;
 382                 ath9k_queue_reset(sc, type);
 383
 384                 /*
 385                  * Increment the ref. counter here so that
 386                  * interrupts are enabled in the reset routine.
 387                  */
 388                 atomic_inc(&ah->intr_ref_cnt);
 389                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 390                 goto out;
 391         }
 392
 393         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 394             (status & ATH9K_INT_BB_WATCHDOG)) {
 395                 spin_lock(&common->cc_lock);
 396                 ath_hw_cycle_counters_update(common);
 397                 ar9003_hw_bb_watchdog_dbg_info(ah);
 398                 spin_unlock(&common->cc_lock);
 399
 400                 if (ar9003_hw_bb_watchdog_check(ah)) {
 401                         type = RESET_TYPE_BB_WATCHDOG;
 402                         ath9k_queue_reset(sc, type);
 403
 404                         /*
 405                          * Increment the ref. counter here so that
 406                          * interrupts are enabled in the reset routine.
 407                          */
 408                         atomic_inc(&ah->intr_ref_cnt);
 409                         ath_dbg(common, RESET,
 410                                 "BB_WATCHDOG: Skipping interrupts\n");
 411                         goto out;
 412                 }
 413         }
 414
 415         if (status & ATH9K_INT_GTT) {
 416                 sc->gtt_cnt++;
 417
 418                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 419                         type = RESET_TYPE_TX_GTT;
 420                         ath9k_queue_reset(sc, type);
 421                         atomic_inc(&ah->intr_ref_cnt);
 422                         ath_dbg(common, RESET,
 423                                 "GTT: Skipping interrupts\n");
 424                         goto out;
 425                 }
 426         }
 427
 428         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 429         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 430                 /*
 431                  * TSF sync does not look correct; remain awake to sync with
 432                  * the next Beacon.
 433                  */
 434                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 435                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 436         }
 437         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 438
 439         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 440                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 441                           ATH9K_INT_RXORN);
 442         else
 443                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 444
 445         if (status & rxmask) {
 446                 /* Check for high priority Rx first */
 447                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 448                     (status & ATH9K_INT_RXHP))
 449                         ath_rx_tasklet(sc, 0, true);
 450
 451                 ath_rx_tasklet(sc, 0, false);
 452         }
 453
 454         if (status & ATH9K_INT_TX) {
 455                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 456                         /*
 457                          * For EDMA chips, TX completion is enabled for the
 458                          * beacon queue, so if a beacon has been transmitted
 459                          * successfully after a GTT interrupt, the GTT counter
 460                          * gets reset to zero here.
 461                          */
 462                         sc->gtt_cnt = 0;
 463
 464                         ath_tx_edma_tasklet(sc);
 465                 } else {
 466                         ath_tx_tasklet(sc);
 467                 }
 468
 469                 wake_up(&sc->tx_wait);
 470         }
 471
 472         if (status & ATH9K_INT_GENTIMER)
 473                 ath_gen_timer_isr(sc->sc_ah);
 474
 475         ath9k_btcoex_handle_interrupt(sc, status);
 476
 477         /* re-enable hardware interrupt */
 478         ath9k_hw_enable_interrupts(ah);
 479 out:
 480         spin_unlock(&sc->sc_pcu_lock);
 481         ath9k_ps_restore(sc);
 482 }
 483
 484 irqreturn_t ath_isr(int irq, void *dev)
 485 {
 486 #define SCHED_INTR (                            \
 487                 ATH9K_INT_FATAL |               \
 488                 ATH9K_INT_BB_WATCHDOG |         \
 489                 ATH9K_INT_RXORN |               \
 490                 ATH9K_INT_RXEOL |               \
 491                 ATH9K_INT_RX |                  \
 492                 ATH9K_INT_RXLP |                \
 493                 ATH9K_INT_RXHP |                \
 494                 ATH9K_INT_TX |                  \
 495                 ATH9K_INT_BMISS |               \
 496                 ATH9K_INT_CST |                 \
 497                 ATH9K_INT_GTT |                 \
 498                 ATH9K_INT_TSFOOR |              \
 499                 ATH9K_INT_GENTIMER |            \
 500                 ATH9K_INT_MCI)
 501
 502         struct ath_softc *sc = dev;
 503         struct ath_hw *ah = sc->sc_ah;
 504         struct ath_common *common = ath9k_hw_common(ah);
 505         enum ath9k_int status;
 506         u32 sync_cause = 0;
 507         bool sched = false;
 508
 509         /*
 510          * The hardware is not ready/present, don't
 511          * touch anything. Note this can happen early
 512          * on if the IRQ is shared.
 513          */
 514         if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 515                 return IRQ_NONE;
 516
 517         /* shared irq, not for us */
 518         if (!ath9k_hw_intrpend(ah))
 519                 return IRQ_NONE;
 520
 521         /*
 522          * Figure out the reason(s) for the interrupt.  Note
 523          * that the hal returns a pseudo-ISR that may include
 524          * bits we haven't explicitly enabled so we mask the
 525          * value to insure we only process bits we requested.
 526          */
 527         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 528         ath9k_debug_sync_cause(sc, sync_cause);
 529         status &= ah->imask;    /* discard unasked-for bits */
 530
 531         if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
 532                 return IRQ_HANDLED;
 533
 534         /*
 535          * If there are no status bits set, then this interrupt was not
 536          * for me (should have been caught above).
 537          */
 538         if (!status)
 539                 return IRQ_NONE;
 540
 541         /* Cache the status */
 542         sc->intrstatus = status;
 543
 544         if (status & SCHED_INTR)
 545                 sched = true;
 546
 547         /*
 548          * If a FATAL interrupt is received, we have to reset the chip
 549          * immediately.
 550          */
 551         if (status & ATH9K_INT_FATAL)
 552                 goto chip_reset;
 553
 554         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 555             (status & ATH9K_INT_BB_WATCHDOG))
 556                 goto chip_reset;
 557
 558         if (status & ATH9K_INT_SWBA)
 559                 tasklet_schedule(&sc->bcon_tasklet);
 560
 561         if (status & ATH9K_INT_TXURN)
 562                 ath9k_hw_updatetxtriglevel(ah, true);
 563
 564         if (status & ATH9K_INT_RXEOL) {
 565                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 566                 ath9k_hw_set_interrupts(ah);
 567         }
 568
 569         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 570                 if (status & ATH9K_INT_TIM_TIMER) {
 571                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 572                                 goto chip_reset;
 573                         /* Clear RxAbort bit so that we can
 574                          * receive frames */
 575                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 576                         spin_lock(&sc->sc_pm_lock);
 577                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 578                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 579                         spin_unlock(&sc->sc_pm_lock);
 580                 }
 581
 582 chip_reset:
 583
 584         ath_debug_stat_interrupt(sc, status);
 585
 586         if (sched) {
 587                 /* turn off every interrupt */
 588                 ath9k_hw_disable_interrupts(ah);
 589                 tasklet_schedule(&sc->intr_tq);
 590         }
 591
 592         return IRQ_HANDLED;
 593
 594 #undef SCHED_INTR
 595 }
 596
 597 /*
 598  * This function is called when a HW reset cannot be deferred
 599  * and has to be immediate.
 600  */
 601 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 602 {
 603         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 604         int r;
 605
 606         ath9k_hw_kill_interrupts(sc->sc_ah);
 607         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 608
 609         ath9k_ps_wakeup(sc);
 610         r = ath_reset_internal(sc, hchan);
 611         ath9k_ps_restore(sc);
 612
 613         return r;
 614 }
 615
 616 /*
 617  * When a HW reset can be deferred, it is added to the
 618  * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 619  * queueing.
 620  */
 621 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 622 {
 623         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 624 #ifdef CONFIG_ATH9K_DEBUGFS
 625         RESET_STAT_INC(sc, type);
 626 #endif
 627         ath9k_hw_kill_interrupts(sc->sc_ah);
 628         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 629         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 630 }
 631
 632 void ath_reset_work(struct work_struct *work)
 633 {
 634         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 635
 636         ath9k_ps_wakeup(sc);
 637         ath_reset_internal(sc, NULL);
 638         ath9k_ps_restore(sc);
 639 }
 640
 641 /**********************/
 642 /* mac80211 callbacks */
 643 /**********************/
 644
 645 static int ath9k_start(struct ieee80211_hw *hw)
 646 {
 647         struct ath_softc *sc = hw->priv;
 648         struct ath_hw *ah = sc->sc_ah;
 649         struct ath_common *common = ath9k_hw_common(ah);
 650         struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 651         struct ath_chanctx *ctx = sc->cur_chan;
 652         struct ath9k_channel *init_channel;
 653         int r;
 654
 655         ath_dbg(common, CONFIG,
 656                 "Starting driver with initial channel: %d MHz\n",
 657                 curchan->center_freq);
 658
 659         ath9k_ps_wakeup(sc);
 660         mutex_lock(&sc->mutex);
 661
 662         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 663         sc->cur_chandef = hw->conf.chandef;
 664
 665         /* Reset SERDES registers */
 666         ath9k_hw_configpcipowersave(ah, false);
 667
 668         /*
 669          * The basic interface to setting the hardware in a good
 670          * state is ``reset''.  On return the hardware is known to
 671          * be powered up and with interrupts disabled.  This must
 672          * be followed by initialization of the appropriate bits
 673          * and then setup of the interrupt mask.
 674          */
 675         spin_lock_bh(&sc->sc_pcu_lock);
 676
 677         atomic_set(&ah->intr_ref_cnt, -1);
 678
 679         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 680         if (r) {
 681                 ath_err(common,
 682                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 683                         r, curchan->center_freq);
 684                 ah->reset_power_on = false;
 685         }
 686
 687         /* Setup our intr mask. */
 688         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 689                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 690                     ATH9K_INT_GLOBAL;
 691
 692         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 693                 ah->imask |= ATH9K_INT_RXHP |
 694                              ATH9K_INT_RXLP;
 695         else
 696                 ah->imask |= ATH9K_INT_RX;
 697
 698         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 699                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 700
 701         /*
 702          * Enable GTT interrupts only for AR9003/AR9004 chips
 703          * for now.
 704          */
 705         if (AR_SREV_9300_20_OR_LATER(ah))
 706                 ah->imask |= ATH9K_INT_GTT;
 707
 708         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 709                 ah->imask |= ATH9K_INT_CST;
 710
 711         ath_mci_enable(sc);
 712
 713         clear_bit(ATH_OP_INVALID, &common->op_flags);
 714         sc->sc_ah->is_monitoring = false;
 715
 716         if (!ath_complete_reset(sc, false))
 717                 ah->reset_power_on = false;
 718
 719         if (ah->led_pin >= 0) {
 720                 ath9k_hw_cfg_output(ah, ah->led_pin,
 721                                     AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 722                 ath9k_hw_set_gpio(ah, ah->led_pin,
 723                                   (ah->config.led_active_high) ? 1 : 0);
 724         }
 725
 726         /*
 727          * Reset key cache to sane defaults (all entries cleared) instead of
 728          * semi-random values after suspend/resume.
 729          */
 730         ath9k_cmn_init_crypto(sc->sc_ah);
 731
 732         ath9k_hw_reset_tsf(ah);
 733
 734         spin_unlock_bh(&sc->sc_pcu_lock);
 735
 736         mutex_unlock(&sc->mutex);
 737
 738         ath9k_ps_restore(sc);
 739
 740         return 0;
 741 }
 742
 743 static void ath9k_tx(struct ieee80211_hw *hw,
 744                      struct ieee80211_tx_control *control,
 745                      struct sk_buff *skb)
 746 {
 747         struct ath_softc *sc = hw->priv;
 748         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 749         struct ath_tx_control txctl;
 750         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 751         unsigned long flags;
 752
 753         if (sc->ps_enabled) {
 754                 /*
 755                  * mac80211 does not set PM field for normal data frames, so we
 756                  * need to update that based on the current PS mode.
 757                  */
 758                 if (ieee80211_is_data(hdr->frame_control) &&
 759                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 760                     !ieee80211_has_pm(hdr->frame_control)) {
 761                         ath_dbg(common, PS,
 762                                 "Add PM=1 for a TX frame while in PS mode\n");
 763                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 764                 }
 765         }
 766
 767         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 768                 /*
 769                  * We are using PS-Poll and mac80211 can request TX while in
 770                  * power save mode. Need to wake up hardware for the TX to be
 771                  * completed and if needed, also for RX of buffered frames.
 772                  */
 773                 ath9k_ps_wakeup(sc);
 774                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 775                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 776                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 777                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 778                         ath_dbg(common, PS,
 779                                 "Sending PS-Poll to pick a buffered frame\n");
 780                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 781                 } else {
 782                         ath_dbg(common, PS, "Wake up to complete TX\n");
 783                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 784                 }
 785                 /*
 786                  * The actual restore operation will happen only after
 787                  * the ps_flags bit is cleared. We are just dropping
 788                  * the ps_usecount here.
 789                  */
 790                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 791                 ath9k_ps_restore(sc);
 792         }
 793
 794         /*
 795          * Cannot tx while the hardware is in full sleep, it first needs a full
 796          * chip reset to recover from that
 797          */
 798         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 799                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 800                 goto exit;
 801         }
 802
 803         memset(&txctl, 0, sizeof(struct ath_tx_control));
 804         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 805         txctl.sta = control->sta;
 806
 807         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 808
 809         if (ath_tx_start(hw, skb, &txctl) != 0) {
 810                 ath_dbg(common, XMIT, "TX failed\n");
 811                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 812                 goto exit;
 813         }
 814
 815         return;
 816 exit:
 817         ieee80211_free_txskb(hw, skb);
 818 }
 819
 820 static void ath9k_stop(struct ieee80211_hw *hw)
 821 {
 822         struct ath_softc *sc = hw->priv;
 823         struct ath_hw *ah = sc->sc_ah;
 824         struct ath_common *common = ath9k_hw_common(ah);
 825         bool prev_idle;
 826
 827         ath9k_deinit_channel_context(sc);
 828
 829         mutex_lock(&sc->mutex);
 830
 831         ath_cancel_work(sc);
 832
 833         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 834                 ath_dbg(common, ANY, "Device not present\n");
 835                 mutex_unlock(&sc->mutex);
 836                 return;
 837         }
 838
 839         /* Ensure HW is awake when we try to shut it down. */
 840         ath9k_ps_wakeup(sc);
 841
 842         spin_lock_bh(&sc->sc_pcu_lock);
 843
 844         /* prevent tasklets to enable interrupts once we disable them */
 845         ah->imask &= ~ATH9K_INT_GLOBAL;
 846
 847         /* make sure h/w will not generate any interrupt
 848          * before setting the invalid flag. */
 849         ath9k_hw_disable_interrupts(ah);
 850
 851         spin_unlock_bh(&sc->sc_pcu_lock);
 852
 853         /* we can now sync irq and kill any running tasklets, since we already
 854          * disabled interrupts and not holding a spin lock */
 855         synchronize_irq(sc->irq);
 856         tasklet_kill(&sc->intr_tq);
 857         tasklet_kill(&sc->bcon_tasklet);
 858
 859         prev_idle = sc->ps_idle;
 860         sc->ps_idle = true;
 861
 862         spin_lock_bh(&sc->sc_pcu_lock);
 863
 864         if (ah->led_pin >= 0) {
 865                 ath9k_hw_set_gpio(ah, ah->led_pin,
 866                                   (ah->config.led_active_high) ? 0 : 1);
 867                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 868         }
 869
 870         ath_prepare_reset(sc);
 871
 872         if (sc->rx.frag) {
 873                 dev_kfree_skb_any(sc->rx.frag);
 874                 sc->rx.frag = NULL;
 875         }
 876
 877         if (!ah->curchan)
 878                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 879                                                     &sc->cur_chan->chandef);
 880
 881         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 882
 883         set_bit(ATH_OP_INVALID, &common->op_flags);
 884
 885         ath9k_hw_phy_disable(ah);
 886
 887         ath9k_hw_configpcipowersave(ah, true);
 888
 889         spin_unlock_bh(&sc->sc_pcu_lock);
 890
 891         ath9k_ps_restore(sc);
 892
 893         sc->ps_idle = prev_idle;
 894
 895         mutex_unlock(&sc->mutex);
 896
 897         ath_dbg(common, CONFIG, "Driver halt\n");
 898 }
 899
 900 static bool ath9k_uses_beacons(int type)
 901 {
 902         switch (type) {
 903         case NL80211_IFTYPE_AP:
 904         case NL80211_IFTYPE_ADHOC:
 905         case NL80211_IFTYPE_MESH_POINT:
 906                 return true;
 907         default:
 908                 return false;
 909         }
 910 }
 911
 912 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
 913                            u8 *mac, struct ieee80211_vif *vif)
 914 {
 915         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
 916         int i;
 917
 918         if (iter_data->has_hw_macaddr) {
 919                 for (i = 0; i < ETH_ALEN; i++)
 920                         iter_data->mask[i] &=
 921                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
 922         } else {
 923                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
 924                 iter_data->has_hw_macaddr = true;
 925         }
 926
 927         if (!vif->bss_conf.use_short_slot)
 928                 iter_data->slottime = ATH9K_SLOT_TIME_20;
 929
 930         switch (vif->type) {
 931         case NL80211_IFTYPE_AP:
 932                 iter_data->naps++;
 933                 break;
 934         case NL80211_IFTYPE_STATION:
 935                 iter_data->nstations++;
 936                 if (avp->assoc && !iter_data->primary_sta)
 937                         iter_data->primary_sta = vif;
 938                 break;
 939         case NL80211_IFTYPE_ADHOC:
 940                 iter_data->nadhocs++;
 941                 if (vif->bss_conf.enable_beacon)
 942                         iter_data->beacons = true;
 943                 break;
 944         case NL80211_IFTYPE_MESH_POINT:
 945                 iter_data->nmeshes++;
 946                 if (vif->bss_conf.enable_beacon)
 947                         iter_data->beacons = true;
 948                 break;
 949         case NL80211_IFTYPE_WDS:
 950                 iter_data->nwds++;
 951                 break;
 952         default:
 953                 break;
 954         }
 955 }
 956
 957 static void ath9k_update_bssid_mask(struct ath_softc *sc,
 958                                     struct ath_chanctx *ctx,
 959                                     struct ath9k_vif_iter_data *iter_data)
 960 {
 961         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 962         struct ath_vif *avp;
 963         int i;
 964
 965         if (!ath9k_is_chanctx_enabled())
 966                 return;
 967
 968         list_for_each_entry(avp, &ctx->vifs, list) {
 969                 if (ctx->nvifs_assigned != 1)
 970                         continue;
 971
 972                 if (!avp->vif->p2p || !iter_data->has_hw_macaddr)
 973                         continue;
 974
 975                 ether_addr_copy(common->curbssid, avp->bssid);
 976
 977                 /* perm_addr will be used as the p2p device address. */
 978                 for (i = 0; i < ETH_ALEN; i++)
 979                         iter_data->mask[i] &=
 980                                 ~(iter_data->hw_macaddr[i] ^
 981                                   sc->hw->wiphy->perm_addr[i]);
 982         }
 983 }
 984
 985 /* Called with sc->mutex held. */
 986 void ath9k_calculate_iter_data(struct ath_softc *sc,
 987                                struct ath_chanctx *ctx,
 988                                struct ath9k_vif_iter_data *iter_data)
 989 {
 990         struct ath_vif *avp;
 991
 992         /*
 993          * The hardware will use primary station addr together with the
 994          * BSSID mask when matching addresses.
 995          */
 996         memset(iter_data, 0, sizeof(*iter_data));
 997         eth_broadcast_addr(iter_data->mask);
 998         iter_data->slottime = ATH9K_SLOT_TIME_9;
 999
1000         list_for_each_entry(avp, &ctx->vifs, list)
1001                 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1002
1003         ath9k_update_bssid_mask(sc, ctx, iter_data);
1004 }
1005
1006 static void ath9k_set_assoc_state(struct ath_softc *sc,
1007                                   struct ieee80211_vif *vif, bool changed)
1008 {
1009         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1010         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1011         unsigned long flags;
1012
1013         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1014
1015         ether_addr_copy(common->curbssid, avp->bssid);
1016         common->curaid = avp->aid;
1017         ath9k_hw_write_associd(sc->sc_ah);
1018
1019         if (changed) {
1020                 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1021                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1022
1023                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1024                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1025                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1026         }
1027
1028         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1029                 ath9k_mci_update_wlan_channels(sc, false);
1030
1031         ath_dbg(common, CONFIG,
1032                 "Primary Station interface: %pM, BSSID: %pM\n",
1033                 vif->addr, common->curbssid);
1034 }
1035
1036 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1037 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1038 {
1039         struct ath_hw *ah = sc->sc_ah;
1040         struct ath_common *common = ath9k_hw_common(ah);
1041         struct ieee80211_vif *vif = NULL;
1042
1043         ath9k_ps_wakeup(sc);
1044
1045         if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1046                 vif = sc->offchannel.scan_vif;
1047         else
1048                 vif = sc->offchannel.roc_vif;
1049
1050         if (WARN_ON(!vif))
1051                 goto exit;
1052
1053         eth_zero_addr(common->curbssid);
1054         eth_broadcast_addr(common->bssidmask);
1055         memcpy(common->macaddr, vif->addr, ETH_ALEN);
1056         common->curaid = 0;
1057         ah->opmode = vif->type;
1058         ah->imask &= ~ATH9K_INT_SWBA;
1059         ah->imask &= ~ATH9K_INT_TSFOOR;
1060         ah->slottime = ATH9K_SLOT_TIME_9;
1061
1062         ath_hw_setbssidmask(common);
1063         ath9k_hw_setopmode(ah);
1064         ath9k_hw_write_associd(sc->sc_ah);
1065         ath9k_hw_set_interrupts(ah);
1066         ath9k_hw_init_global_settings(ah);
1067
1068 exit:
1069         ath9k_ps_restore(sc);
1070 }
1071 #endif
1072
1073 /* Called with sc->mutex held. */
1074 void ath9k_calculate_summary_state(struct ath_softc *sc,
1075                                    struct ath_chanctx *ctx)
1076 {
1077         struct ath_hw *ah = sc->sc_ah;
1078         struct ath_common *common = ath9k_hw_common(ah);
1079         struct ath9k_vif_iter_data iter_data;
1080         struct ath_beacon_config *cur_conf;
1081
1082         ath_chanctx_check_active(sc, ctx);
1083
1084         if (ctx != sc->cur_chan)
1085                 return;
1086
1087 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1088         if (ctx == &sc->offchannel.chan)
1089                 return ath9k_set_offchannel_state(sc);
1090 #endif
1091
1092         ath9k_ps_wakeup(sc);
1093         ath9k_calculate_iter_data(sc, ctx, &iter_data);
1094
1095         if (iter_data.has_hw_macaddr)
1096                 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1097
1098         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1099         ath_hw_setbssidmask(common);
1100
1101         if (iter_data.naps > 0) {
1102                 cur_conf = &ctx->beacon;
1103                 ath9k_hw_set_tsfadjust(ah, true);
1104                 ah->opmode = NL80211_IFTYPE_AP;
1105                 if (cur_conf->enable_beacon)
1106                         iter_data.beacons = true;
1107         } else {
1108                 ath9k_hw_set_tsfadjust(ah, false);
1109
1110                 if (iter_data.nmeshes)
1111                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1112                 else if (iter_data.nwds)
1113                         ah->opmode = NL80211_IFTYPE_AP;
1114                 else if (iter_data.nadhocs)
1115                         ah->opmode = NL80211_IFTYPE_ADHOC;
1116                 else
1117                         ah->opmode = NL80211_IFTYPE_STATION;
1118         }
1119
1120         ath9k_hw_setopmode(ah);
1121
1122         ctx->switch_after_beacon = false;
1123         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1124                 ah->imask |= ATH9K_INT_TSFOOR;
1125         else {
1126                 ah->imask &= ~ATH9K_INT_TSFOOR;
1127                 if (iter_data.naps == 1 && iter_data.beacons)
1128                         ctx->switch_after_beacon = true;
1129         }
1130
1131         ah->imask &= ~ATH9K_INT_SWBA;
1132         if (ah->opmode == NL80211_IFTYPE_STATION) {
1133                 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1134
1135                 if (iter_data.primary_sta) {
1136                         iter_data.beacons = true;
1137                         ath9k_set_assoc_state(sc, iter_data.primary_sta,
1138                                               changed);
1139                         ctx->primary_sta = iter_data.primary_sta;
1140                 } else {
1141                         ctx->primary_sta = NULL;
1142                         eth_zero_addr(common->curbssid);
1143                         common->curaid = 0;
1144                         ath9k_hw_write_associd(sc->sc_ah);
1145                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1146                                 ath9k_mci_update_wlan_channels(sc, true);
1147                 }
1148         } else if (iter_data.beacons) {
1149                 ah->imask |= ATH9K_INT_SWBA;
1150         }
1151         ath9k_hw_set_interrupts(ah);
1152
1153         if (iter_data.beacons)
1154                 set_bit(ATH_OP_BEACONS, &common->op_flags);
1155         else
1156                 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1157
1158         if (ah->slottime != iter_data.slottime) {
1159                 ah->slottime = iter_data.slottime;
1160                 ath9k_hw_init_global_settings(ah);
1161         }
1162
1163         if (iter_data.primary_sta)
1164                 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1165         else
1166                 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1167
1168         ath_dbg(common, CONFIG,
1169                 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1170                 common->macaddr, common->curbssid, common->bssidmask);
1171
1172         ath9k_ps_restore(sc);
1173 }
1174
1175 static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1176 {
1177         int *power = (int *)data;
1178
1179         if (*power < vif->bss_conf.txpower)
1180                 *power = vif->bss_conf.txpower;
1181 }
1182
1183 /* Called with sc->mutex held. */
1184 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1185 {
1186         int power;
1187         struct ath_hw *ah = sc->sc_ah;
1188         struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1189
1190         ath9k_ps_wakeup(sc);
1191         if (ah->tpc_enabled) {
1192                 power = (vif) ? vif->bss_conf.txpower : -1;
1193                 ieee80211_iterate_active_interfaces_atomic(
1194                                 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1195                                 ath9k_tpc_vif_iter, &power);
1196                 if (power == -1)
1197                         power = sc->hw->conf.power_level;
1198         } else {
1199                 power = sc->hw->conf.power_level;
1200         }
1201         sc->cur_chan->txpower = 2 * power;
1202         ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1203         sc->cur_chan->cur_txpower = reg->max_power_level;
1204         ath9k_ps_restore(sc);
1205 }
1206
1207 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1208                                    struct ieee80211_vif *vif)
1209 {
1210         int i;
1211
1212         if (!ath9k_is_chanctx_enabled())
1213                 return;
1214
1215         for (i = 0; i < IEEE80211_NUM_ACS; i++)
1216                 vif->hw_queue[i] = i;
1217
1218         if (vif->type == NL80211_IFTYPE_AP ||
1219             vif->type == NL80211_IFTYPE_MESH_POINT)
1220                 vif->cab_queue = hw->queues - 2;
1221         else
1222                 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1223 }
1224
1225 static int ath9k_add_interface(struct ieee80211_hw *hw,
1226                                struct ieee80211_vif *vif)
1227 {
1228         struct ath_softc *sc = hw->priv;
1229         struct ath_hw *ah = sc->sc_ah;
1230         struct ath_common *common = ath9k_hw_common(ah);
1231         struct ath_vif *avp = (void *)vif->drv_priv;
1232         struct ath_node *an = &avp->mcast_node;
1233
1234         mutex_lock(&sc->mutex);
1235
1236         if (config_enabled(CONFIG_ATH9K_TX99)) {
1237                 if (sc->cur_chan->nvifs >= 1) {
1238                         mutex_unlock(&sc->mutex);
1239                         return -EOPNOTSUPP;
1240                 }
1241                 sc->tx99_vif = vif;
1242         }
1243
1244         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1245         sc->cur_chan->nvifs++;
1246
1247         if (ath9k_uses_beacons(vif->type))
1248                 ath9k_beacon_assign_slot(sc, vif);
1249
1250         avp->vif = vif;
1251         if (!ath9k_is_chanctx_enabled()) {
1252                 avp->chanctx = sc->cur_chan;
1253                 list_add_tail(&avp->list, &avp->chanctx->vifs);
1254         }
1255
1256         ath9k_calculate_summary_state(sc, avp->chanctx);
1257
1258         ath9k_assign_hw_queues(hw, vif);
1259
1260         ath9k_set_txpower(sc, vif);
1261
1262         an->sc = sc;
1263         an->sta = NULL;
1264         an->vif = vif;
1265         an->no_ps_filter = true;
1266         ath_tx_node_init(sc, an);
1267
1268         mutex_unlock(&sc->mutex);
1269         return 0;
1270 }
1271
1272 static int ath9k_change_interface(struct ieee80211_hw *hw,
1273                                   struct ieee80211_vif *vif,
1274                                   enum nl80211_iftype new_type,
1275                                   bool p2p)
1276 {
1277         struct ath_softc *sc = hw->priv;
1278         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1279         struct ath_vif *avp = (void *)vif->drv_priv;
1280
1281         mutex_lock(&sc->mutex);
1282
1283         if (config_enabled(CONFIG_ATH9K_TX99)) {
1284                 mutex_unlock(&sc->mutex);
1285                 return -EOPNOTSUPP;
1286         }
1287
1288         ath_dbg(common, CONFIG, "Change Interface\n");
1289
1290         if (ath9k_uses_beacons(vif->type))
1291                 ath9k_beacon_remove_slot(sc, vif);
1292
1293         vif->type = new_type;
1294         vif->p2p = p2p;
1295
1296         if (ath9k_uses_beacons(vif->type))
1297                 ath9k_beacon_assign_slot(sc, vif);
1298
1299         ath9k_assign_hw_queues(hw, vif);
1300         ath9k_calculate_summary_state(sc, avp->chanctx);
1301
1302         ath9k_set_txpower(sc, vif);
1303
1304         mutex_unlock(&sc->mutex);
1305         return 0;
1306 }
1307
1308 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1309                                    struct ieee80211_vif *vif)
1310 {
1311         struct ath_softc *sc = hw->priv;
1312         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1313         struct ath_vif *avp = (void *)vif->drv_priv;
1314
1315         ath_dbg(common, CONFIG, "Detach Interface\n");
1316
1317         mutex_lock(&sc->mutex);
1318
1319         ath9k_p2p_remove_vif(sc, vif);
1320
1321         sc->cur_chan->nvifs--;
1322         sc->tx99_vif = NULL;
1323         if (!ath9k_is_chanctx_enabled())
1324                 list_del(&avp->list);
1325
1326         if (ath9k_uses_beacons(vif->type))
1327                 ath9k_beacon_remove_slot(sc, vif);
1328
1329         ath_tx_node_cleanup(sc, &avp->mcast_node);
1330
1331         ath9k_calculate_summary_state(sc, avp->chanctx);
1332
1333         ath9k_set_txpower(sc, NULL);
1334
1335         mutex_unlock(&sc->mutex);
1336 }
1337
1338 static void ath9k_enable_ps(struct ath_softc *sc)
1339 {
1340         struct ath_hw *ah = sc->sc_ah;
1341         struct ath_common *common = ath9k_hw_common(ah);
1342
1343         if (config_enabled(CONFIG_ATH9K_TX99))
1344                 return;
1345
1346         sc->ps_enabled = true;
1347         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1348                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1349                         ah->imask |= ATH9K_INT_TIM_TIMER;
1350                         ath9k_hw_set_interrupts(ah);
1351                 }
1352                 ath9k_hw_setrxabort(ah, 1);
1353         }
1354         ath_dbg(common, PS, "PowerSave enabled\n");
1355 }
1356
1357 static void ath9k_disable_ps(struct ath_softc *sc)
1358 {
1359         struct ath_hw *ah = sc->sc_ah;
1360         struct ath_common *common = ath9k_hw_common(ah);
1361
1362         if (config_enabled(CONFIG_ATH9K_TX99))
1363                 return;
1364
1365         sc->ps_enabled = false;
1366         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1367         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1368                 ath9k_hw_setrxabort(ah, 0);
1369                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1370                                   PS_WAIT_FOR_CAB |
1371                                   PS_WAIT_FOR_PSPOLL_DATA |
1372                                   PS_WAIT_FOR_TX_ACK);
1373                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1374                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1375                         ath9k_hw_set_interrupts(ah);
1376                 }
1377         }
1378         ath_dbg(common, PS, "PowerSave disabled\n");
1379 }
1380
1381 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1382 {
1383         struct ath_softc *sc = hw->priv;
1384         struct ath_hw *ah = sc->sc_ah;
1385         struct ath_common *common = ath9k_hw_common(ah);
1386         struct ieee80211_conf *conf = &hw->conf;
1387         struct ath_chanctx *ctx = sc->cur_chan;
1388
1389         ath9k_ps_wakeup(sc);
1390         mutex_lock(&sc->mutex);
1391
1392         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1393                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1394                 if (sc->ps_idle) {
1395                         ath_cancel_work(sc);
1396                         ath9k_stop_btcoex(sc);
1397                 } else {
1398                         ath9k_start_btcoex(sc);
1399                         /*
1400                          * The chip needs a reset to properly wake up from
1401                          * full sleep
1402                          */
1403                         ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1404                 }
1405         }
1406
1407         /*
1408          * We just prepare to enable PS. We have to wait until our AP has
1409          * ACK'd our null data frame to disable RX otherwise we'll ignore
1410          * those ACKs and end up retransmitting the same null data frames.
1411          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1412          */
1413         if (changed & IEEE80211_CONF_CHANGE_PS) {
1414                 unsigned long flags;
1415                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1416                 if (conf->flags & IEEE80211_CONF_PS)
1417                         ath9k_enable_ps(sc);
1418                 else
1419                         ath9k_disable_ps(sc);
1420                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1421         }
1422
1423         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1424                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1425                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1426                         sc->sc_ah->is_monitoring = true;
1427                 } else {
1428                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1429                         sc->sc_ah->is_monitoring = false;
1430                 }
1431         }
1432
1433         if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1434                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1435                 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1436         }
1437
1438         mutex_unlock(&sc->mutex);
1439         ath9k_ps_restore(sc);
1440
1441         return 0;
1442 }
1443
1444 #define SUPPORTED_FILTERS                       \
1445         (FIF_PROMISC_IN_BSS |                   \
1446         FIF_ALLMULTI |                          \
1447         FIF_CONTROL |                           \
1448         FIF_PSPOLL |                            \
1449         FIF_OTHER_BSS |                         \
1450         FIF_BCN_PRBRESP_PROMISC |               \
1451         FIF_PROBE_REQ |                         \
1452         FIF_FCSFAIL)
1453
1454 /* FIXME: sc->sc_full_reset ? */
1455 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1456                                    unsigned int changed_flags,
1457                                    unsigned int *total_flags,
1458                                    u64 multicast)
1459 {
1460         struct ath_softc *sc = hw->priv;
1461         u32 rfilt;
1462
1463         changed_flags &= SUPPORTED_FILTERS;
1464         *total_flags &= SUPPORTED_FILTERS;
1465
1466         spin_lock_bh(&sc->chan_lock);
1467         sc->cur_chan->rxfilter = *total_flags;
1468         spin_unlock_bh(&sc->chan_lock);
1469
1470         ath9k_ps_wakeup(sc);
1471         rfilt = ath_calcrxfilter(sc);
1472         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1473         ath9k_ps_restore(sc);
1474
1475         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1476                 rfilt);
1477 }
1478
1479 static int ath9k_sta_add(struct ieee80211_hw *hw,
1480                          struct ieee80211_vif *vif,
1481                          struct ieee80211_sta *sta)
1482 {
1483         struct ath_softc *sc = hw->priv;
1484         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1485         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1486         struct ieee80211_key_conf ps_key = { };
1487         int key;
1488
1489         ath_node_attach(sc, sta, vif);
1490
1491         if (vif->type != NL80211_IFTYPE_AP &&
1492             vif->type != NL80211_IFTYPE_AP_VLAN)
1493                 return 0;
1494
1495         key = ath_key_config(common, vif, sta, &ps_key);
1496         if (key > 0) {
1497                 an->ps_key = key;
1498                 an->key_idx[0] = key;
1499         }
1500
1501         return 0;
1502 }
1503
1504 static void ath9k_del_ps_key(struct ath_softc *sc,
1505                              struct ieee80211_vif *vif,
1506                              struct ieee80211_sta *sta)
1507 {
1508         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1509         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1510         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1511
1512         if (!an->ps_key)
1513             return;
1514
1515         ath_key_delete(common, &ps_key);
1516         an->ps_key = 0;
1517         an->key_idx[0] = 0;
1518 }
1519
1520 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1521                             struct ieee80211_vif *vif,
1522                             struct ieee80211_sta *sta)
1523 {
1524         struct ath_softc *sc = hw->priv;
1525
1526         ath9k_del_ps_key(sc, vif, sta);
1527         ath_node_detach(sc, sta);
1528
1529         return 0;
1530 }
1531
1532 static int ath9k_sta_state(struct ieee80211_hw *hw,
1533                            struct ieee80211_vif *vif,
1534                            struct ieee80211_sta *sta,
1535                            enum ieee80211_sta_state old_state,
1536                            enum ieee80211_sta_state new_state)
1537 {
1538         struct ath_softc *sc = hw->priv;
1539         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1540         int ret = 0;
1541
1542         if (old_state == IEEE80211_STA_AUTH &&
1543             new_state == IEEE80211_STA_ASSOC) {
1544                 ret = ath9k_sta_add(hw, vif, sta);
1545                 ath_dbg(common, CONFIG,
1546                         "Add station: %pM\n", sta->addr);
1547         } else if (old_state == IEEE80211_STA_ASSOC &&
1548                    new_state == IEEE80211_STA_AUTH) {
1549                 ret = ath9k_sta_remove(hw, vif, sta);
1550                 ath_dbg(common, CONFIG,
1551                         "Remove station: %pM\n", sta->addr);
1552         }
1553
1554         if (ath9k_is_chanctx_enabled()) {
1555                 if (vif->type == NL80211_IFTYPE_STATION) {
1556                         if (old_state == IEEE80211_STA_ASSOC &&
1557                             new_state == IEEE80211_STA_AUTHORIZED)
1558                                 ath_chanctx_event(sc, vif,
1559                                                   ATH_CHANCTX_EVENT_AUTHORIZED);
1560                 }
1561         }
1562
1563         return ret;
1564 }
1565
1566 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1567                                     struct ath_node *an,
1568                                     bool set)
1569 {
1570         int i;
1571
1572         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1573                 if (!an->key_idx[i])
1574                         continue;
1575                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1576         }
1577 }
1578
1579 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1580                          struct ieee80211_vif *vif,
1581                          enum sta_notify_cmd cmd,
1582                          struct ieee80211_sta *sta)
1583 {
1584         struct ath_softc *sc = hw->priv;
1585         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1586
1587         switch (cmd) {
1588         case STA_NOTIFY_SLEEP:
1589                 an->sleeping = true;
1590                 ath_tx_aggr_sleep(sta, sc, an);
1591                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1592                 break;
1593         case STA_NOTIFY_AWAKE:
1594                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1595                 an->sleeping = false;
1596                 ath_tx_aggr_wakeup(sc, an);
1597                 break;
1598         }
1599 }
1600
1601 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1602                          struct ieee80211_vif *vif, u16 queue,
1603                          const struct ieee80211_tx_queue_params *params)
1604 {
1605         struct ath_softc *sc = hw->priv;
1606         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1607         struct ath_txq *txq;
1608         struct ath9k_tx_queue_info qi;
1609         int ret = 0;
1610
1611         if (queue >= IEEE80211_NUM_ACS)
1612                 return 0;
1613
1614         txq = sc->tx.txq_map[queue];
1615
1616         ath9k_ps_wakeup(sc);
1617         mutex_lock(&sc->mutex);
1618
1619         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1620
1621         qi.tqi_aifs = params->aifs;
1622         qi.tqi_cwmin = params->cw_min;
1623         qi.tqi_cwmax = params->cw_max;
1624         qi.tqi_burstTime = params->txop * 32;
1625
1626         ath_dbg(common, CONFIG,
1627                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1628                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1629                 params->cw_max, params->txop);
1630
1631         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1632         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1633         if (ret)
1634                 ath_err(common, "TXQ Update failed\n");
1635
1636         mutex_unlock(&sc->mutex);
1637         ath9k_ps_restore(sc);
1638
1639         return ret;
1640 }
1641
1642 static int ath9k_set_key(struct ieee80211_hw *hw,
1643                          enum set_key_cmd cmd,
1644                          struct ieee80211_vif *vif,
1645                          struct ieee80211_sta *sta,
1646                          struct ieee80211_key_conf *key)
1647 {
1648         struct ath_softc *sc = hw->priv;
1649         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1650         struct ath_node *an = NULL;
1651         int ret = 0, i;
1652
1653         if (ath9k_modparam_nohwcrypt)
1654                 return -ENOSPC;
1655
1656         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1657              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1658             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1659              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1660             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1661                 /*
1662                  * For now, disable hw crypto for the RSN IBSS group keys. This
1663                  * could be optimized in the future to use a modified key cache
1664                  * design to support per-STA RX GTK, but until that gets
1665                  * implemented, use of software crypto for group addressed
1666                  * frames is a acceptable to allow RSN IBSS to be used.
1667                  */
1668                 return -EOPNOTSUPP;
1669         }
1670
1671         mutex_lock(&sc->mutex);
1672         ath9k_ps_wakeup(sc);
1673         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1674         if (sta)
1675                 an = (struct ath_node *)sta->drv_priv;
1676
1677         switch (cmd) {
1678         case SET_KEY:
1679                 if (sta)
1680                         ath9k_del_ps_key(sc, vif, sta);
1681
1682                 key->hw_key_idx = 0;
1683                 ret = ath_key_config(common, vif, sta, key);
1684                 if (ret >= 0) {
1685                         key->hw_key_idx = ret;
1686                         /* push IV and Michael MIC generation to stack */
1687                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1688                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1689                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1690                         if (sc->sc_ah->sw_mgmt_crypto_tx &&
1691                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1692                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1693                         ret = 0;
1694                 }
1695                 if (an && key->hw_key_idx) {
1696                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1697                                 if (an->key_idx[i])
1698                                         continue;
1699                                 an->key_idx[i] = key->hw_key_idx;
1700                                 break;
1701                         }
1702                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1703                 }
1704                 break;
1705         case DISABLE_KEY:
1706                 ath_key_delete(common, key);
1707                 if (an) {
1708                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1709                                 if (an->key_idx[i] != key->hw_key_idx)
1710                                         continue;
1711                                 an->key_idx[i] = 0;
1712                                 break;
1713                         }
1714                 }
1715                 key->hw_key_idx = 0;
1716                 break;
1717         default:
1718                 ret = -EINVAL;
1719         }
1720
1721         ath9k_ps_restore(sc);
1722         mutex_unlock(&sc->mutex);
1723
1724         return ret;
1725 }
1726
1727 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1728                                    struct ieee80211_vif *vif,
1729                                    struct ieee80211_bss_conf *bss_conf,
1730                                    u32 changed)
1731 {
1732 #define CHECK_ANI                               \
1733         (BSS_CHANGED_ASSOC |                    \
1734          BSS_CHANGED_IBSS |                     \
1735          BSS_CHANGED_BEACON_ENABLED)
1736
1737         struct ath_softc *sc = hw->priv;
1738         struct ath_hw *ah = sc->sc_ah;
1739         struct ath_common *common = ath9k_hw_common(ah);
1740         struct ath_vif *avp = (void *)vif->drv_priv;
1741         int slottime;
1742
1743         ath9k_ps_wakeup(sc);
1744         mutex_lock(&sc->mutex);
1745
1746         if (changed & BSS_CHANGED_ASSOC) {
1747                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1748                         bss_conf->bssid, bss_conf->assoc);
1749
1750                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1751                 avp->aid = bss_conf->aid;
1752                 avp->assoc = bss_conf->assoc;
1753
1754                 ath9k_calculate_summary_state(sc, avp->chanctx);
1755         }
1756
1757         if (changed & BSS_CHANGED_IBSS) {
1758                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1759                 common->curaid = bss_conf->aid;
1760                 ath9k_hw_write_associd(sc->sc_ah);
1761         }
1762
1763         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1764             (changed & BSS_CHANGED_BEACON_INT) ||
1765             (changed & BSS_CHANGED_BEACON_INFO)) {
1766                 ath9k_beacon_config(sc, vif, changed);
1767                 if (changed & BSS_CHANGED_BEACON_ENABLED)
1768                         ath9k_calculate_summary_state(sc, avp->chanctx);
1769         }
1770
1771         if ((avp->chanctx == sc->cur_chan) &&
1772             (changed & BSS_CHANGED_ERP_SLOT)) {
1773                 if (bss_conf->use_short_slot)
1774                         slottime = 9;
1775                 else
1776                         slottime = 20;
1777                 if (vif->type == NL80211_IFTYPE_AP) {
1778                         /*
1779                          * Defer update, so that connected stations can adjust
1780                          * their settings at the same time.
1781                          * See beacon.c for more details
1782                          */
1783                         sc->beacon.slottime = slottime;
1784                         sc->beacon.updateslot = UPDATE;
1785                 } else {
1786                         ah->slottime = slottime;
1787                         ath9k_hw_init_global_settings(ah);
1788                 }
1789         }
1790
1791         if (changed & BSS_CHANGED_P2P_PS)
1792                 ath9k_p2p_bss_info_changed(sc, vif);
1793
1794         if (changed & CHECK_ANI)
1795                 ath_check_ani(sc);
1796
1797         if (changed & BSS_CHANGED_TXPOWER) {
1798                 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1799                         vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1800                 ath9k_set_txpower(sc, vif);
1801         }
1802
1803         mutex_unlock(&sc->mutex);
1804         ath9k_ps_restore(sc);
1805
1806 #undef CHECK_ANI
1807 }
1808
1809 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1810 {
1811         struct ath_softc *sc = hw->priv;
1812         u64 tsf;
1813
1814         mutex_lock(&sc->mutex);
1815         ath9k_ps_wakeup(sc);
1816         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1817         ath9k_ps_restore(sc);
1818         mutex_unlock(&sc->mutex);
1819
1820         return tsf;
1821 }
1822
1823 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1824                           struct ieee80211_vif *vif,
1825                           u64 tsf)
1826 {
1827         struct ath_softc *sc = hw->priv;
1828
1829         mutex_lock(&sc->mutex);
1830         ath9k_ps_wakeup(sc);
1831         ath9k_hw_settsf64(sc->sc_ah, tsf);
1832         ath9k_ps_restore(sc);
1833         mutex_unlock(&sc->mutex);
1834 }
1835
1836 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1837 {
1838         struct ath_softc *sc = hw->priv;
1839
1840         mutex_lock(&sc->mutex);
1841
1842         ath9k_ps_wakeup(sc);
1843         ath9k_hw_reset_tsf(sc->sc_ah);
1844         ath9k_ps_restore(sc);
1845
1846         mutex_unlock(&sc->mutex);
1847 }
1848
1849 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1850                               struct ieee80211_vif *vif,
1851                               enum ieee80211_ampdu_mlme_action action,
1852                               struct ieee80211_sta *sta,
1853                               u16 tid, u16 *ssn, u8 buf_size)
1854 {
1855         struct ath_softc *sc = hw->priv;
1856         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1857         bool flush = false;
1858         int ret = 0;
1859
1860         mutex_lock(&sc->mutex);
1861
1862         switch (action) {
1863         case IEEE80211_AMPDU_RX_START:
1864                 break;
1865         case IEEE80211_AMPDU_RX_STOP:
1866                 break;
1867         case IEEE80211_AMPDU_TX_START:
1868                 if (ath9k_is_chanctx_enabled()) {
1869                         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
1870                                 ret = -EBUSY;
1871                                 break;
1872                         }
1873                 }
1874                 ath9k_ps_wakeup(sc);
1875                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1876                 if (!ret)
1877                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1878                 ath9k_ps_restore(sc);
1879                 break;
1880         case IEEE80211_AMPDU_TX_STOP_FLUSH:
1881         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1882                 flush = true;
1883         case IEEE80211_AMPDU_TX_STOP_CONT:
1884                 ath9k_ps_wakeup(sc);
1885                 ath_tx_aggr_stop(sc, sta, tid);
1886                 if (!flush)
1887                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1888                 ath9k_ps_restore(sc);
1889                 break;
1890         case IEEE80211_AMPDU_TX_OPERATIONAL:
1891                 ath9k_ps_wakeup(sc);
1892                 ath_tx_aggr_resume(sc, sta, tid);
1893                 ath9k_ps_restore(sc);
1894                 break;
1895         default:
1896                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1897         }
1898
1899         mutex_unlock(&sc->mutex);
1900
1901         return ret;
1902 }
1903
1904 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1905                              struct survey_info *survey)
1906 {
1907         struct ath_softc *sc = hw->priv;
1908         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1909         struct ieee80211_supported_band *sband;
1910         struct ieee80211_channel *chan;
1911         int pos;
1912
1913         if (config_enabled(CONFIG_ATH9K_TX99))
1914                 return -EOPNOTSUPP;
1915
1916         spin_lock_bh(&common->cc_lock);
1917         if (idx == 0)
1918                 ath_update_survey_stats(sc);
1919
1920         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1921         if (sband && idx >= sband->n_channels) {
1922                 idx -= sband->n_channels;
1923                 sband = NULL;
1924         }
1925
1926         if (!sband)
1927                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1928
1929         if (!sband || idx >= sband->n_channels) {
1930                 spin_unlock_bh(&common->cc_lock);
1931                 return -ENOENT;
1932         }
1933
1934         chan = &sband->channels[idx];
1935         pos = chan->hw_value;
1936         memcpy(survey, &sc->survey[pos], sizeof(*survey));
1937         survey->channel = chan;
1938         spin_unlock_bh(&common->cc_lock);
1939
1940         return 0;
1941 }
1942
1943 static void ath9k_enable_dynack(struct ath_softc *sc)
1944 {
1945 #ifdef CONFIG_ATH9K_DYNACK
1946         u32 rfilt;
1947         struct ath_hw *ah = sc->sc_ah;
1948
1949         ath_dynack_reset(ah);
1950
1951         ah->dynack.enabled = true;
1952         rfilt = ath_calcrxfilter(sc);
1953         ath9k_hw_setrxfilter(ah, rfilt);
1954 #endif
1955 }
1956
1957 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
1958                                      s16 coverage_class)
1959 {
1960         struct ath_softc *sc = hw->priv;
1961         struct ath_hw *ah = sc->sc_ah;
1962
1963         if (config_enabled(CONFIG_ATH9K_TX99))
1964                 return;
1965
1966         mutex_lock(&sc->mutex);
1967
1968         if (coverage_class >= 0) {
1969                 ah->coverage_class = coverage_class;
1970                 if (ah->dynack.enabled) {
1971                         u32 rfilt;
1972
1973                         ah->dynack.enabled = false;
1974                         rfilt = ath_calcrxfilter(sc);
1975                         ath9k_hw_setrxfilter(ah, rfilt);
1976                 }
1977                 ath9k_ps_wakeup(sc);
1978                 ath9k_hw_init_global_settings(ah);
1979                 ath9k_ps_restore(sc);
1980         } else if (!ah->dynack.enabled) {
1981                 ath9k_enable_dynack(sc);
1982         }
1983
1984         mutex_unlock(&sc->mutex);
1985 }
1986
1987 static bool ath9k_has_tx_pending(struct ath_softc *sc,
1988                                  bool sw_pending)
1989 {
1990         int i, npend = 0;
1991
1992         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1993                 if (!ATH_TXQ_SETUP(sc, i))
1994                         continue;
1995
1996                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
1997                                                  sw_pending);
1998                 if (npend)
1999                         break;
2000         }
2001
2002         return !!npend;
2003 }
2004
2005 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2006                         u32 queues, bool drop)
2007 {
2008         struct ath_softc *sc = hw->priv;
2009         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2010
2011         if (ath9k_is_chanctx_enabled()) {
2012                 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2013                         goto flush;
2014
2015                 /*
2016                  * If MCC is active, extend the flush timeout
2017                  * and wait for the HW/SW queues to become
2018                  * empty. This needs to be done outside the
2019                  * sc->mutex lock to allow the channel scheduler
2020                  * to switch channel contexts.
2021                  *
2022                  * The vif queues have been stopped in mac80211,
2023                  * so there won't be any incoming frames.
2024                  */
2025                 __ath9k_flush(hw, queues, drop, true, true);
2026                 return;
2027         }
2028 flush:
2029         mutex_lock(&sc->mutex);
2030         __ath9k_flush(hw, queues, drop, true, false);
2031         mutex_unlock(&sc->mutex);
2032 }
2033
2034 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2035                    bool sw_pending, bool timeout_override)
2036 {
2037         struct ath_softc *sc = hw->priv;
2038         struct ath_hw *ah = sc->sc_ah;
2039         struct ath_common *common = ath9k_hw_common(ah);
2040         int timeout;
2041         bool drain_txq;
2042
2043         cancel_delayed_work_sync(&sc->tx_complete_work);
2044
2045         if (ah->ah_flags & AH_UNPLUGGED) {
2046                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2047                 return;
2048         }
2049
2050         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2051                 ath_dbg(common, ANY, "Device not present\n");
2052                 return;
2053         }
2054
2055         spin_lock_bh(&sc->chan_lock);
2056         if (timeout_override)
2057                 timeout = HZ / 5;
2058         else
2059                 timeout = sc->cur_chan->flush_timeout;
2060         spin_unlock_bh(&sc->chan_lock);
2061
2062         ath_dbg(common, CHAN_CTX,
2063                 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2064
2065         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2066                                timeout) > 0)
2067                 drop = false;
2068
2069         if (drop) {
2070                 ath9k_ps_wakeup(sc);
2071                 spin_lock_bh(&sc->sc_pcu_lock);
2072                 drain_txq = ath_drain_all_txq(sc);
2073                 spin_unlock_bh(&sc->sc_pcu_lock);
2074
2075                 if (!drain_txq)
2076                         ath_reset(sc, NULL);
2077
2078                 ath9k_ps_restore(sc);
2079         }
2080
2081         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2082 }
2083
2084 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2085 {
2086         struct ath_softc *sc = hw->priv;
2087
2088         return ath9k_has_tx_pending(sc, true);
2089 }
2090
2091 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2092 {
2093         struct ath_softc *sc = hw->priv;
2094         struct ath_hw *ah = sc->sc_ah;
2095         struct ieee80211_vif *vif;
2096         struct ath_vif *avp;
2097         struct ath_buf *bf;
2098         struct ath_tx_status ts;
2099         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2100         int status;
2101
2102         vif = sc->beacon.bslot[0];
2103         if (!vif)
2104                 return 0;
2105
2106         if (!vif->bss_conf.enable_beacon)
2107                 return 0;
2108
2109         avp = (void *)vif->drv_priv;
2110
2111         if (!sc->beacon.tx_processed && !edma) {
2112                 tasklet_disable(&sc->bcon_tasklet);
2113
2114                 bf = avp->av_bcbuf;
2115                 if (!bf || !bf->bf_mpdu)
2116                         goto skip;
2117
2118                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2119                 if (status == -EINPROGRESS)
2120                         goto skip;
2121
2122                 sc->beacon.tx_processed = true;
2123                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2124
2125 skip:
2126                 tasklet_enable(&sc->bcon_tasklet);
2127         }
2128
2129         return sc->beacon.tx_last;
2130 }
2131
2132 static int ath9k_get_stats(struct ieee80211_hw *hw,
2133                            struct ieee80211_low_level_stats *stats)
2134 {
2135         struct ath_softc *sc = hw->priv;
2136         struct ath_hw *ah = sc->sc_ah;
2137         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2138
2139         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2140         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2141         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2142         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2143         return 0;
2144 }
2145
2146 static u32 fill_chainmask(u32 cap, u32 new)
2147 {
2148         u32 filled = 0;
2149         int i;
2150
2151         for (i = 0; cap && new; i++, cap >>= 1) {
2152                 if (!(cap & BIT(0)))
2153                         continue;
2154
2155                 if (new & BIT(0))
2156                         filled |= BIT(i);
2157
2158                 new >>= 1;
2159         }
2160
2161         return filled;
2162 }
2163
2164 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2165 {
2166         if (AR_SREV_9300_20_OR_LATER(ah))
2167                 return true;
2168
2169         switch (val & 0x7) {
2170         case 0x1:
2171         case 0x3:
2172         case 0x7:
2173                 return true;
2174         case 0x2:
2175                 return (ah->caps.rx_chainmask == 1);
2176         default:
2177                 return false;
2178         }
2179 }
2180
2181 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2182 {
2183         struct ath_softc *sc = hw->priv;
2184         struct ath_hw *ah = sc->sc_ah;
2185
2186         if (ah->caps.rx_chainmask != 1)
2187                 rx_ant |= tx_ant;
2188
2189         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2190                 return -EINVAL;
2191
2192         sc->ant_rx = rx_ant;
2193         sc->ant_tx = tx_ant;
2194
2195         if (ah->caps.rx_chainmask == 1)
2196                 return 0;
2197
2198         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2199         if (AR_SREV_9100(ah))
2200                 ah->rxchainmask = 0x7;
2201         else
2202                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2203
2204         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2205         ath9k_cmn_reload_chainmask(ah);
2206
2207         return 0;
2208 }
2209
2210 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2211 {
2212         struct ath_softc *sc = hw->priv;
2213
2214         *tx_ant = sc->ant_tx;
2215         *rx_ant = sc->ant_rx;
2216         return 0;
2217 }
2218
2219 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2220                                 struct ieee80211_vif *vif,
2221                                 const u8 *mac_addr)
2222 {
2223         struct ath_softc *sc = hw->priv;
2224         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2225         set_bit(ATH_OP_SCANNING, &common->op_flags);
2226 }
2227
2228 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2229                                    struct ieee80211_vif *vif)
2230 {
2231         struct ath_softc *sc = hw->priv;
2232         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2233         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2234 }
2235
2236 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2237
2238 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2239 {
2240         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2241
2242         if (sc->offchannel.roc_vif) {
2243                 ath_dbg(common, CHAN_CTX,
2244                         "%s: Aborting RoC\n", __func__);
2245
2246                 del_timer_sync(&sc->offchannel.timer);
2247                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2248                         ath_roc_complete(sc, true);
2249         }
2250
2251         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2252                 ath_dbg(common, CHAN_CTX,
2253                         "%s: Aborting HW scan\n", __func__);
2254
2255                 del_timer_sync(&sc->offchannel.timer);
2256                 ath_scan_complete(sc, true);
2257         }
2258 }
2259
2260 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2261                          struct ieee80211_scan_request *hw_req)
2262 {
2263         struct cfg80211_scan_request *req = &hw_req->req;
2264         struct ath_softc *sc = hw->priv;
2265         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2266         int ret = 0;
2267
2268         mutex_lock(&sc->mutex);
2269
2270         if (WARN_ON(sc->offchannel.scan_req)) {
2271                 ret = -EBUSY;
2272                 goto out;
2273         }
2274
2275         ath9k_ps_wakeup(sc);
2276         set_bit(ATH_OP_SCANNING, &common->op_flags);
2277         sc->offchannel.scan_vif = vif;
2278         sc->offchannel.scan_req = req;
2279         sc->offchannel.scan_idx = 0;
2280
2281         ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2282                 vif->addr);
2283
2284         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2285                 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2286                 ath_offchannel_next(sc);
2287         }
2288
2289 out:
2290         mutex_unlock(&sc->mutex);
2291
2292         return ret;
2293 }
2294
2295 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2296                                  struct ieee80211_vif *vif)
2297 {
2298         struct ath_softc *sc = hw->priv;
2299         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2300
2301         ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2302
2303         mutex_lock(&sc->mutex);
2304         del_timer_sync(&sc->offchannel.timer);
2305         ath_scan_complete(sc, true);
2306         mutex_unlock(&sc->mutex);
2307 }
2308
2309 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2310                                    struct ieee80211_vif *vif,
2311                                    struct ieee80211_channel *chan, int duration,
2312                                    enum ieee80211_roc_type type)
2313 {
2314         struct ath_softc *sc = hw->priv;
2315         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2316         int ret = 0;
2317
2318         mutex_lock(&sc->mutex);
2319
2320         if (WARN_ON(sc->offchannel.roc_vif)) {
2321                 ret = -EBUSY;
2322                 goto out;
2323         }
2324
2325         ath9k_ps_wakeup(sc);
2326         sc->offchannel.roc_vif = vif;
2327         sc->offchannel.roc_chan = chan;
2328         sc->offchannel.roc_duration = duration;
2329
2330         ath_dbg(common, CHAN_CTX,
2331                 "RoC request on vif: %pM, type: %d duration: %d\n",
2332                 vif->addr, type, duration);
2333
2334         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2335                 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2336                 ath_offchannel_next(sc);
2337         }
2338
2339 out:
2340         mutex_unlock(&sc->mutex);
2341
2342         return ret;
2343 }
2344
2345 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2346 {
2347         struct ath_softc *sc = hw->priv;
2348         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2349
2350         mutex_lock(&sc->mutex);
2351
2352         ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2353         del_timer_sync(&sc->offchannel.timer);
2354
2355         if (sc->offchannel.roc_vif) {
2356                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2357                         ath_roc_complete(sc, true);
2358         }
2359
2360         mutex_unlock(&sc->mutex);
2361
2362         return 0;
2363 }
2364
2365 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2366                              struct ieee80211_chanctx_conf *conf)
2367 {
2368         struct ath_softc *sc = hw->priv;
2369         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2370         struct ath_chanctx *ctx, **ptr;
2371         int pos;
2372
2373         mutex_lock(&sc->mutex);
2374
2375         ath_for_each_chanctx(sc, ctx) {
2376                 if (ctx->assigned)
2377                         continue;
2378
2379                 ptr = (void *) conf->drv_priv;
2380                 *ptr = ctx;
2381                 ctx->assigned = true;
2382                 pos = ctx - &sc->chanctx[0];
2383                 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2384
2385                 ath_dbg(common, CHAN_CTX,
2386                         "Add channel context: %d MHz\n",
2387                         conf->def.chan->center_freq);
2388
2389                 ath_chanctx_set_channel(sc, ctx, &conf->def);
2390
2391                 mutex_unlock(&sc->mutex);
2392                 return 0;
2393         }
2394
2395         mutex_unlock(&sc->mutex);
2396         return -ENOSPC;
2397 }
2398
2399
2400 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2401                                  struct ieee80211_chanctx_conf *conf)
2402 {
2403         struct ath_softc *sc = hw->priv;
2404         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2405         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2406
2407         mutex_lock(&sc->mutex);
2408
2409         ath_dbg(common, CHAN_CTX,
2410                 "Remove channel context: %d MHz\n",
2411                 conf->def.chan->center_freq);
2412
2413         ctx->assigned = false;
2414         ctx->hw_queue_base = 0;
2415         ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2416
2417         mutex_unlock(&sc->mutex);
2418 }
2419
2420 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2421                                  struct ieee80211_chanctx_conf *conf,
2422                                  u32 changed)
2423 {
2424         struct ath_softc *sc = hw->priv;
2425         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2426         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2427
2428         mutex_lock(&sc->mutex);
2429         ath_dbg(common, CHAN_CTX,
2430                 "Change channel context: %d MHz\n",
2431                 conf->def.chan->center_freq);
2432         ath_chanctx_set_channel(sc, ctx, &conf->def);
2433         mutex_unlock(&sc->mutex);
2434 }
2435
2436 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2437                                     struct ieee80211_vif *vif,
2438                                     struct ieee80211_chanctx_conf *conf)
2439 {
2440         struct ath_softc *sc = hw->priv;
2441         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2442         struct ath_vif *avp = (void *)vif->drv_priv;
2443         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2444         int i;
2445
2446         ath9k_cancel_pending_offchannel(sc);
2447
2448         mutex_lock(&sc->mutex);
2449
2450         ath_dbg(common, CHAN_CTX,
2451                 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2452                 vif->addr, vif->type, vif->p2p,
2453                 conf->def.chan->center_freq);
2454
2455         avp->chanctx = ctx;
2456         ctx->nvifs_assigned++;
2457         list_add_tail(&avp->list, &ctx->vifs);
2458         ath9k_calculate_summary_state(sc, ctx);
2459         for (i = 0; i < IEEE80211_NUM_ACS; i++)
2460                 vif->hw_queue[i] = ctx->hw_queue_base + i;
2461
2462         mutex_unlock(&sc->mutex);
2463
2464         return 0;
2465 }
2466
2467 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2468                                        struct ieee80211_vif *vif,
2469                                        struct ieee80211_chanctx_conf *conf)
2470 {
2471         struct ath_softc *sc = hw->priv;
2472         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2473         struct ath_vif *avp = (void *)vif->drv_priv;
2474         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2475         int ac;
2476
2477         ath9k_cancel_pending_offchannel(sc);
2478
2479         mutex_lock(&sc->mutex);
2480
2481         ath_dbg(common, CHAN_CTX,
2482                 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2483                 vif->addr, vif->type, vif->p2p,
2484                 conf->def.chan->center_freq);
2485
2486         avp->chanctx = NULL;
2487         ctx->nvifs_assigned--;
2488         list_del(&avp->list);
2489         ath9k_calculate_summary_state(sc, ctx);
2490         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2491                 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2492
2493         mutex_unlock(&sc->mutex);
2494 }
2495
2496 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2497                                  struct ieee80211_vif *vif)
2498 {
2499         struct ath_softc *sc = hw->priv;
2500         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2501         struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2502         struct ath_beacon_config *cur_conf;
2503         struct ath_chanctx *go_ctx;
2504         unsigned long timeout;
2505         bool changed = false;
2506         u32 beacon_int;
2507
2508         if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2509                 return;
2510
2511         if (!avp->chanctx)
2512                 return;
2513
2514         mutex_lock(&sc->mutex);
2515
2516         spin_lock_bh(&sc->chan_lock);
2517         if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2518                 changed = true;
2519         spin_unlock_bh(&sc->chan_lock);
2520
2521         if (!changed)
2522                 goto out;
2523
2524         ath9k_cancel_pending_offchannel(sc);
2525
2526         go_ctx = ath_is_go_chanctx_present(sc);
2527
2528         if (go_ctx) {
2529                 /*
2530                  * Wait till the GO interface gets a chance
2531                  * to send out an NoA.
2532                  */
2533                 spin_lock_bh(&sc->chan_lock);
2534                 sc->sched.mgd_prepare_tx = true;
2535                 cur_conf = &go_ctx->beacon;
2536                 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2537                 spin_unlock_bh(&sc->chan_lock);
2538
2539                 timeout = usecs_to_jiffies(beacon_int * 2);
2540                 init_completion(&sc->go_beacon);
2541
2542                 mutex_unlock(&sc->mutex);
2543
2544                 if (wait_for_completion_timeout(&sc->go_beacon,
2545                                                 timeout) == 0) {
2546                         ath_dbg(common, CHAN_CTX,
2547                                 "Failed to send new NoA\n");
2548
2549                         spin_lock_bh(&sc->chan_lock);
2550                         sc->sched.mgd_prepare_tx = false;
2551                         spin_unlock_bh(&sc->chan_lock);
2552                 }
2553
2554                 mutex_lock(&sc->mutex);
2555         }
2556
2557         ath_dbg(common, CHAN_CTX,
2558                 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2559                 __func__, vif->addr);
2560
2561         spin_lock_bh(&sc->chan_lock);
2562         sc->next_chan = avp->chanctx;
2563         sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2564         spin_unlock_bh(&sc->chan_lock);
2565
2566         ath_chanctx_set_next(sc, true);
2567 out:
2568         mutex_unlock(&sc->mutex);
2569 }
2570
2571 void ath9k_fill_chanctx_ops(void)
2572 {
2573         if (!ath9k_is_chanctx_enabled())
2574                 return;
2575
2576         ath9k_ops.hw_scan                  = ath9k_hw_scan;
2577         ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2578         ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2579         ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2580         ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2581         ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2582         ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2583         ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2584         ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2585         ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2586 }
2587
2588 #endif
2589
2590 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2591                              int *dbm)
2592 {
2593         struct ath_softc *sc = hw->priv;
2594         struct ath_vif *avp = (void *)vif->drv_priv;
2595
2596         mutex_lock(&sc->mutex);
2597         if (avp->chanctx)
2598                 *dbm = avp->chanctx->cur_txpower;
2599         else
2600                 *dbm = sc->cur_chan->cur_txpower;
2601         mutex_unlock(&sc->mutex);
2602
2603         *dbm /= 2;
2604
2605         return 0;
2606 }
2607
2608 struct ieee80211_ops ath9k_ops = {
2609         .tx                 = ath9k_tx,
2610         .start              = ath9k_start,
2611         .stop               = ath9k_stop,
2612         .add_interface      = ath9k_add_interface,
2613         .change_interface   = ath9k_change_interface,
2614         .remove_interface   = ath9k_remove_interface,
2615         .config             = ath9k_config,
2616         .configure_filter   = ath9k_configure_filter,
2617         .sta_state          = ath9k_sta_state,
2618         .sta_notify         = ath9k_sta_notify,
2619         .conf_tx            = ath9k_conf_tx,
2620         .bss_info_changed   = ath9k_bss_info_changed,
2621         .set_key            = ath9k_set_key,
2622         .get_tsf            = ath9k_get_tsf,
2623         .set_tsf            = ath9k_set_tsf,
2624         .reset_tsf          = ath9k_reset_tsf,
2625         .ampdu_action       = ath9k_ampdu_action,
2626         .get_survey         = ath9k_get_survey,
2627         .rfkill_poll        = ath9k_rfkill_poll_state,
2628         .set_coverage_class = ath9k_set_coverage_class,
2629         .flush              = ath9k_flush,
2630         .tx_frames_pending  = ath9k_tx_frames_pending,
2631         .tx_last_beacon     = ath9k_tx_last_beacon,
2632         .release_buffered_frames = ath9k_release_buffered_frames,
2633         .get_stats          = ath9k_get_stats,
2634         .set_antenna        = ath9k_set_antenna,
2635         .get_antenna        = ath9k_get_antenna,
2636
2637 #ifdef CONFIG_ATH9K_WOW
2638         .suspend            = ath9k_suspend,
2639         .resume             = ath9k_resume,
2640         .set_wakeup         = ath9k_set_wakeup,
2641 #endif
2642
2643 #ifdef CONFIG_ATH9K_DEBUGFS
2644         .get_et_sset_count  = ath9k_get_et_sset_count,
2645         .get_et_stats       = ath9k_get_et_stats,
2646         .get_et_strings     = ath9k_get_et_strings,
2647 #endif
2648
2649 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2650         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2651 #endif
2652         .sw_scan_start      = ath9k_sw_scan_start,
2653         .sw_scan_complete   = ath9k_sw_scan_complete,
2654         .get_txpower        = ath9k_get_txpower,
2655 };