2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
62 spin_lock_bh(&txq->axq_lock);
72 if (txq->mac80211_qnum >= 0) {
73 struct list_head *list;
75 list = &sc->cur_chan->acq[txq->mac80211_qnum];
76 if (!list_empty(list))
80 spin_unlock_bh(&txq->axq_lock);
84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
89 spin_lock_irqsave(&sc->sc_pm_lock, flags);
90 ret = ath9k_hw_setpower(sc->sc_ah, mode);
91 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
96 void ath_ps_full_sleep(unsigned long data)
98 struct ath_softc *sc = (struct ath_softc *) data;
99 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
102 spin_lock(&common->cc_lock);
103 ath_hw_cycle_counters_update(common);
104 spin_unlock(&common->cc_lock);
106 ath9k_hw_setrxabort(sc->sc_ah, 1);
107 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
109 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
112 void ath9k_ps_wakeup(struct ath_softc *sc)
114 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
116 enum ath9k_power_mode power_mode;
118 spin_lock_irqsave(&sc->sc_pm_lock, flags);
119 if (++sc->ps_usecount != 1)
122 del_timer_sync(&sc->sleep_timer);
123 power_mode = sc->sc_ah->power_mode;
124 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
127 * While the hardware is asleep, the cycle counters contain no
128 * useful data. Better clear them now so that they don't mess up
129 * survey data results.
131 if (power_mode != ATH9K_PM_AWAKE) {
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
135 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
136 spin_unlock(&common->cc_lock);
140 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
143 void ath9k_ps_restore(struct ath_softc *sc)
145 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
146 enum ath9k_power_mode mode;
149 spin_lock_irqsave(&sc->sc_pm_lock, flags);
150 if (--sc->ps_usecount != 0)
154 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
158 if (sc->ps_enabled &&
159 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
161 PS_WAIT_FOR_PSPOLL_DATA |
164 mode = ATH9K_PM_NETWORK_SLEEP;
165 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
166 ath9k_btcoex_stop_gen_timer(sc);
171 spin_lock(&common->cc_lock);
172 ath_hw_cycle_counters_update(common);
173 spin_unlock(&common->cc_lock);
175 ath9k_hw_setpower(sc->sc_ah, mode);
178 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
181 static void __ath_cancel_work(struct ath_softc *sc)
183 cancel_work_sync(&sc->paprd_work);
184 cancel_delayed_work_sync(&sc->tx_complete_work);
185 cancel_delayed_work_sync(&sc->hw_pll_work);
187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
188 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
189 cancel_work_sync(&sc->mci_work);
193 void ath_cancel_work(struct ath_softc *sc)
195 __ath_cancel_work(sc);
196 cancel_work_sync(&sc->hw_reset_work);
199 void ath_restart_work(struct ath_softc *sc)
201 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
203 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
204 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
205 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
210 static bool ath_prepare_reset(struct ath_softc *sc)
212 struct ath_hw *ah = sc->sc_ah;
215 ieee80211_stop_queues(sc->hw);
217 ath9k_hw_disable_interrupts(ah);
219 if (!ath_drain_all_txq(sc))
222 if (!ath_stoprecv(sc))
228 static bool ath_complete_reset(struct ath_softc *sc, bool start)
230 struct ath_hw *ah = sc->sc_ah;
231 struct ath_common *common = ath9k_hw_common(ah);
234 ath9k_calculate_summary_state(sc, sc->cur_chan);
236 ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
237 sc->cur_chan->txpower,
238 &sc->cur_chan->cur_txpower);
239 clear_bit(ATH_OP_HW_RESET, &common->op_flags);
241 if (!sc->cur_chan->offchannel && start) {
242 /* restore per chanctx TSF timer */
243 if (sc->cur_chan->tsf_val) {
246 offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
248 ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
252 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
255 if (ah->opmode == NL80211_IFTYPE_STATION &&
256 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
257 spin_lock_irqsave(&sc->sc_pm_lock, flags);
258 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
259 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
261 ath9k_set_beacon(sc);
264 ath_restart_work(sc);
265 ath_txq_schedule_all(sc);
270 ath9k_hw_set_interrupts(ah);
271 ath9k_hw_enable_interrupts(ah);
272 ieee80211_wake_queues(sc->hw);
273 ath9k_p2p_ps_timer(sc);
278 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
280 struct ath_hw *ah = sc->sc_ah;
281 struct ath_common *common = ath9k_hw_common(ah);
282 struct ath9k_hw_cal_data *caldata = NULL;
286 __ath_cancel_work(sc);
288 disable_irq(sc->irq);
289 tasklet_disable(&sc->intr_tq);
290 tasklet_disable(&sc->bcon_tasklet);
291 spin_lock_bh(&sc->sc_pcu_lock);
293 if (!sc->cur_chan->offchannel) {
295 caldata = &sc->cur_chan->caldata;
303 if (!ath_prepare_reset(sc))
306 if (ath9k_is_chanctx_enabled())
309 spin_lock_bh(&sc->chan_lock);
310 sc->cur_chandef = sc->cur_chan->chandef;
311 spin_unlock_bh(&sc->chan_lock);
313 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
314 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
316 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
319 "Unable to reset channel, reset status %d\n", r);
321 ath9k_hw_enable_interrupts(ah);
322 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
327 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
328 sc->cur_chan->offchannel)
329 ath9k_mci_set_txpower(sc, true, false);
331 if (!ath_complete_reset(sc, true))
336 spin_unlock_bh(&sc->sc_pcu_lock);
337 tasklet_enable(&sc->bcon_tasklet);
338 tasklet_enable(&sc->intr_tq);
343 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
344 struct ieee80211_vif *vif)
347 an = (struct ath_node *)sta->drv_priv;
352 memset(&an->key_idx, 0, sizeof(an->key_idx));
354 ath_tx_node_init(sc, an);
356 ath_dynack_node_init(sc->sc_ah, an);
359 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
361 struct ath_node *an = (struct ath_node *)sta->drv_priv;
362 ath_tx_node_cleanup(sc, an);
364 ath_dynack_node_deinit(sc->sc_ah, an);
367 void ath9k_tasklet(unsigned long data)
369 struct ath_softc *sc = (struct ath_softc *)data;
370 struct ath_hw *ah = sc->sc_ah;
371 struct ath_common *common = ath9k_hw_common(ah);
372 enum ath_reset_type type;
374 u32 status = sc->intrstatus;
378 spin_lock(&sc->sc_pcu_lock);
380 if (status & ATH9K_INT_FATAL) {
381 type = RESET_TYPE_FATAL_INT;
382 ath9k_queue_reset(sc, type);
385 * Increment the ref. counter here so that
386 * interrupts are enabled in the reset routine.
388 atomic_inc(&ah->intr_ref_cnt);
389 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
393 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
394 (status & ATH9K_INT_BB_WATCHDOG)) {
395 spin_lock(&common->cc_lock);
396 ath_hw_cycle_counters_update(common);
397 ar9003_hw_bb_watchdog_dbg_info(ah);
398 spin_unlock(&common->cc_lock);
400 if (ar9003_hw_bb_watchdog_check(ah)) {
401 type = RESET_TYPE_BB_WATCHDOG;
402 ath9k_queue_reset(sc, type);
405 * Increment the ref. counter here so that
406 * interrupts are enabled in the reset routine.
408 atomic_inc(&ah->intr_ref_cnt);
409 ath_dbg(common, RESET,
410 "BB_WATCHDOG: Skipping interrupts\n");
415 if (status & ATH9K_INT_GTT) {
418 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
419 type = RESET_TYPE_TX_GTT;
420 ath9k_queue_reset(sc, type);
421 atomic_inc(&ah->intr_ref_cnt);
422 ath_dbg(common, RESET,
423 "GTT: Skipping interrupts\n");
428 spin_lock_irqsave(&sc->sc_pm_lock, flags);
429 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
431 * TSF sync does not look correct; remain awake to sync with
434 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
435 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
437 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
439 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
440 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
443 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
445 if (status & rxmask) {
446 /* Check for high priority Rx first */
447 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
448 (status & ATH9K_INT_RXHP))
449 ath_rx_tasklet(sc, 0, true);
451 ath_rx_tasklet(sc, 0, false);
454 if (status & ATH9K_INT_TX) {
455 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
457 * For EDMA chips, TX completion is enabled for the
458 * beacon queue, so if a beacon has been transmitted
459 * successfully after a GTT interrupt, the GTT counter
460 * gets reset to zero here.
464 ath_tx_edma_tasklet(sc);
469 wake_up(&sc->tx_wait);
472 if (status & ATH9K_INT_GENTIMER)
473 ath_gen_timer_isr(sc->sc_ah);
475 ath9k_btcoex_handle_interrupt(sc, status);
477 /* re-enable hardware interrupt */
478 ath9k_hw_enable_interrupts(ah);
480 spin_unlock(&sc->sc_pcu_lock);
481 ath9k_ps_restore(sc);
484 irqreturn_t ath_isr(int irq, void *dev)
486 #define SCHED_INTR ( \
488 ATH9K_INT_BB_WATCHDOG | \
499 ATH9K_INT_GENTIMER | \
502 struct ath_softc *sc = dev;
503 struct ath_hw *ah = sc->sc_ah;
504 struct ath_common *common = ath9k_hw_common(ah);
505 enum ath9k_int status;
510 * The hardware is not ready/present, don't
511 * touch anything. Note this can happen early
512 * on if the IRQ is shared.
514 if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
517 /* shared irq, not for us */
518 if (!ath9k_hw_intrpend(ah))
522 * Figure out the reason(s) for the interrupt. Note
523 * that the hal returns a pseudo-ISR that may include
524 * bits we haven't explicitly enabled so we mask the
525 * value to insure we only process bits we requested.
527 ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
528 ath9k_debug_sync_cause(sc, sync_cause);
529 status &= ah->imask; /* discard unasked-for bits */
531 if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
535 * If there are no status bits set, then this interrupt was not
536 * for me (should have been caught above).
541 /* Cache the status */
542 sc->intrstatus = status;
544 if (status & SCHED_INTR)
548 * If a FATAL interrupt is received, we have to reset the chip
551 if (status & ATH9K_INT_FATAL)
554 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
555 (status & ATH9K_INT_BB_WATCHDOG))
558 if (status & ATH9K_INT_SWBA)
559 tasklet_schedule(&sc->bcon_tasklet);
561 if (status & ATH9K_INT_TXURN)
562 ath9k_hw_updatetxtriglevel(ah, true);
564 if (status & ATH9K_INT_RXEOL) {
565 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
566 ath9k_hw_set_interrupts(ah);
569 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
570 if (status & ATH9K_INT_TIM_TIMER) {
571 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
573 /* Clear RxAbort bit so that we can
575 ath9k_setpower(sc, ATH9K_PM_AWAKE);
576 spin_lock(&sc->sc_pm_lock);
577 ath9k_hw_setrxabort(sc->sc_ah, 0);
578 sc->ps_flags |= PS_WAIT_FOR_BEACON;
579 spin_unlock(&sc->sc_pm_lock);
584 ath_debug_stat_interrupt(sc, status);
587 /* turn off every interrupt */
588 ath9k_hw_disable_interrupts(ah);
589 tasklet_schedule(&sc->intr_tq);
598 * This function is called when a HW reset cannot be deferred
599 * and has to be immediate.
601 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
603 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
606 ath9k_hw_kill_interrupts(sc->sc_ah);
607 set_bit(ATH_OP_HW_RESET, &common->op_flags);
610 r = ath_reset_internal(sc, hchan);
611 ath9k_ps_restore(sc);
617 * When a HW reset can be deferred, it is added to the
618 * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
621 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
623 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
624 #ifdef CONFIG_ATH9K_DEBUGFS
625 RESET_STAT_INC(sc, type);
627 ath9k_hw_kill_interrupts(sc->sc_ah);
628 set_bit(ATH_OP_HW_RESET, &common->op_flags);
629 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
632 void ath_reset_work(struct work_struct *work)
634 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
637 ath_reset_internal(sc, NULL);
638 ath9k_ps_restore(sc);
641 /**********************/
642 /* mac80211 callbacks */
643 /**********************/
645 static int ath9k_start(struct ieee80211_hw *hw)
647 struct ath_softc *sc = hw->priv;
648 struct ath_hw *ah = sc->sc_ah;
649 struct ath_common *common = ath9k_hw_common(ah);
650 struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
651 struct ath_chanctx *ctx = sc->cur_chan;
652 struct ath9k_channel *init_channel;
655 ath_dbg(common, CONFIG,
656 "Starting driver with initial channel: %d MHz\n",
657 curchan->center_freq);
660 mutex_lock(&sc->mutex);
662 init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
663 sc->cur_chandef = hw->conf.chandef;
665 /* Reset SERDES registers */
666 ath9k_hw_configpcipowersave(ah, false);
669 * The basic interface to setting the hardware in a good
670 * state is ``reset''. On return the hardware is known to
671 * be powered up and with interrupts disabled. This must
672 * be followed by initialization of the appropriate bits
673 * and then setup of the interrupt mask.
675 spin_lock_bh(&sc->sc_pcu_lock);
677 atomic_set(&ah->intr_ref_cnt, -1);
679 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
682 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
683 r, curchan->center_freq);
684 ah->reset_power_on = false;
687 /* Setup our intr mask. */
688 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
689 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
692 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
693 ah->imask |= ATH9K_INT_RXHP |
696 ah->imask |= ATH9K_INT_RX;
698 if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
699 ah->imask |= ATH9K_INT_BB_WATCHDOG;
702 * Enable GTT interrupts only for AR9003/AR9004 chips
705 if (AR_SREV_9300_20_OR_LATER(ah))
706 ah->imask |= ATH9K_INT_GTT;
708 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
709 ah->imask |= ATH9K_INT_CST;
713 clear_bit(ATH_OP_INVALID, &common->op_flags);
714 sc->sc_ah->is_monitoring = false;
716 if (!ath_complete_reset(sc, false))
717 ah->reset_power_on = false;
719 if (ah->led_pin >= 0) {
720 ath9k_hw_cfg_output(ah, ah->led_pin,
721 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
722 ath9k_hw_set_gpio(ah, ah->led_pin,
723 (ah->config.led_active_high) ? 1 : 0);
727 * Reset key cache to sane defaults (all entries cleared) instead of
728 * semi-random values after suspend/resume.
730 ath9k_cmn_init_crypto(sc->sc_ah);
732 ath9k_hw_reset_tsf(ah);
734 spin_unlock_bh(&sc->sc_pcu_lock);
736 mutex_unlock(&sc->mutex);
738 ath9k_ps_restore(sc);
743 static void ath9k_tx(struct ieee80211_hw *hw,
744 struct ieee80211_tx_control *control,
747 struct ath_softc *sc = hw->priv;
748 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
749 struct ath_tx_control txctl;
750 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
753 if (sc->ps_enabled) {
755 * mac80211 does not set PM field for normal data frames, so we
756 * need to update that based on the current PS mode.
758 if (ieee80211_is_data(hdr->frame_control) &&
759 !ieee80211_is_nullfunc(hdr->frame_control) &&
760 !ieee80211_has_pm(hdr->frame_control)) {
762 "Add PM=1 for a TX frame while in PS mode\n");
763 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
767 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
769 * We are using PS-Poll and mac80211 can request TX while in
770 * power save mode. Need to wake up hardware for the TX to be
771 * completed and if needed, also for RX of buffered frames.
774 spin_lock_irqsave(&sc->sc_pm_lock, flags);
775 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
776 ath9k_hw_setrxabort(sc->sc_ah, 0);
777 if (ieee80211_is_pspoll(hdr->frame_control)) {
779 "Sending PS-Poll to pick a buffered frame\n");
780 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
782 ath_dbg(common, PS, "Wake up to complete TX\n");
783 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
786 * The actual restore operation will happen only after
787 * the ps_flags bit is cleared. We are just dropping
788 * the ps_usecount here.
790 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
791 ath9k_ps_restore(sc);
795 * Cannot tx while the hardware is in full sleep, it first needs a full
796 * chip reset to recover from that
798 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
799 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
803 memset(&txctl, 0, sizeof(struct ath_tx_control));
804 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
805 txctl.sta = control->sta;
807 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
809 if (ath_tx_start(hw, skb, &txctl) != 0) {
810 ath_dbg(common, XMIT, "TX failed\n");
811 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
817 ieee80211_free_txskb(hw, skb);
820 static void ath9k_stop(struct ieee80211_hw *hw)
822 struct ath_softc *sc = hw->priv;
823 struct ath_hw *ah = sc->sc_ah;
824 struct ath_common *common = ath9k_hw_common(ah);
827 ath9k_deinit_channel_context(sc);
829 mutex_lock(&sc->mutex);
833 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
834 ath_dbg(common, ANY, "Device not present\n");
835 mutex_unlock(&sc->mutex);
839 /* Ensure HW is awake when we try to shut it down. */
842 spin_lock_bh(&sc->sc_pcu_lock);
844 /* prevent tasklets to enable interrupts once we disable them */
845 ah->imask &= ~ATH9K_INT_GLOBAL;
847 /* make sure h/w will not generate any interrupt
848 * before setting the invalid flag. */
849 ath9k_hw_disable_interrupts(ah);
851 spin_unlock_bh(&sc->sc_pcu_lock);
853 /* we can now sync irq and kill any running tasklets, since we already
854 * disabled interrupts and not holding a spin lock */
855 synchronize_irq(sc->irq);
856 tasklet_kill(&sc->intr_tq);
857 tasklet_kill(&sc->bcon_tasklet);
859 prev_idle = sc->ps_idle;
862 spin_lock_bh(&sc->sc_pcu_lock);
864 if (ah->led_pin >= 0) {
865 ath9k_hw_set_gpio(ah, ah->led_pin,
866 (ah->config.led_active_high) ? 0 : 1);
867 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
870 ath_prepare_reset(sc);
873 dev_kfree_skb_any(sc->rx.frag);
878 ah->curchan = ath9k_cmn_get_channel(hw, ah,
879 &sc->cur_chan->chandef);
881 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
883 set_bit(ATH_OP_INVALID, &common->op_flags);
885 ath9k_hw_phy_disable(ah);
887 ath9k_hw_configpcipowersave(ah, true);
889 spin_unlock_bh(&sc->sc_pcu_lock);
891 ath9k_ps_restore(sc);
893 sc->ps_idle = prev_idle;
895 mutex_unlock(&sc->mutex);
897 ath_dbg(common, CONFIG, "Driver halt\n");
900 static bool ath9k_uses_beacons(int type)
903 case NL80211_IFTYPE_AP:
904 case NL80211_IFTYPE_ADHOC:
905 case NL80211_IFTYPE_MESH_POINT:
912 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
913 u8 *mac, struct ieee80211_vif *vif)
915 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
918 if (iter_data->has_hw_macaddr) {
919 for (i = 0; i < ETH_ALEN; i++)
920 iter_data->mask[i] &=
921 ~(iter_data->hw_macaddr[i] ^ mac[i]);
923 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
924 iter_data->has_hw_macaddr = true;
927 if (!vif->bss_conf.use_short_slot)
928 iter_data->slottime = ATH9K_SLOT_TIME_20;
931 case NL80211_IFTYPE_AP:
934 case NL80211_IFTYPE_STATION:
935 iter_data->nstations++;
936 if (avp->assoc && !iter_data->primary_sta)
937 iter_data->primary_sta = vif;
939 case NL80211_IFTYPE_ADHOC:
940 iter_data->nadhocs++;
941 if (vif->bss_conf.enable_beacon)
942 iter_data->beacons = true;
944 case NL80211_IFTYPE_MESH_POINT:
945 iter_data->nmeshes++;
946 if (vif->bss_conf.enable_beacon)
947 iter_data->beacons = true;
949 case NL80211_IFTYPE_WDS:
957 static void ath9k_update_bssid_mask(struct ath_softc *sc,
958 struct ath_chanctx *ctx,
959 struct ath9k_vif_iter_data *iter_data)
961 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
965 if (!ath9k_is_chanctx_enabled())
968 list_for_each_entry(avp, &ctx->vifs, list) {
969 if (ctx->nvifs_assigned != 1)
972 if (!avp->vif->p2p || !iter_data->has_hw_macaddr)
975 ether_addr_copy(common->curbssid, avp->bssid);
977 /* perm_addr will be used as the p2p device address. */
978 for (i = 0; i < ETH_ALEN; i++)
979 iter_data->mask[i] &=
980 ~(iter_data->hw_macaddr[i] ^
981 sc->hw->wiphy->perm_addr[i]);
985 /* Called with sc->mutex held. */
986 void ath9k_calculate_iter_data(struct ath_softc *sc,
987 struct ath_chanctx *ctx,
988 struct ath9k_vif_iter_data *iter_data)
993 * The hardware will use primary station addr together with the
994 * BSSID mask when matching addresses.
996 memset(iter_data, 0, sizeof(*iter_data));
997 eth_broadcast_addr(iter_data->mask);
998 iter_data->slottime = ATH9K_SLOT_TIME_9;
1000 list_for_each_entry(avp, &ctx->vifs, list)
1001 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1003 ath9k_update_bssid_mask(sc, ctx, iter_data);
1006 static void ath9k_set_assoc_state(struct ath_softc *sc,
1007 struct ieee80211_vif *vif, bool changed)
1009 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1010 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1011 unsigned long flags;
1013 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1015 ether_addr_copy(common->curbssid, avp->bssid);
1016 common->curaid = avp->aid;
1017 ath9k_hw_write_associd(sc->sc_ah);
1020 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1021 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1023 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1024 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1025 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1028 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1029 ath9k_mci_update_wlan_channels(sc, false);
1031 ath_dbg(common, CONFIG,
1032 "Primary Station interface: %pM, BSSID: %pM\n",
1033 vif->addr, common->curbssid);
1036 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1037 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1039 struct ath_hw *ah = sc->sc_ah;
1040 struct ath_common *common = ath9k_hw_common(ah);
1041 struct ieee80211_vif *vif = NULL;
1043 ath9k_ps_wakeup(sc);
1045 if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1046 vif = sc->offchannel.scan_vif;
1048 vif = sc->offchannel.roc_vif;
1053 eth_zero_addr(common->curbssid);
1054 eth_broadcast_addr(common->bssidmask);
1055 memcpy(common->macaddr, vif->addr, ETH_ALEN);
1057 ah->opmode = vif->type;
1058 ah->imask &= ~ATH9K_INT_SWBA;
1059 ah->imask &= ~ATH9K_INT_TSFOOR;
1060 ah->slottime = ATH9K_SLOT_TIME_9;
1062 ath_hw_setbssidmask(common);
1063 ath9k_hw_setopmode(ah);
1064 ath9k_hw_write_associd(sc->sc_ah);
1065 ath9k_hw_set_interrupts(ah);
1066 ath9k_hw_init_global_settings(ah);
1069 ath9k_ps_restore(sc);
1073 /* Called with sc->mutex held. */
1074 void ath9k_calculate_summary_state(struct ath_softc *sc,
1075 struct ath_chanctx *ctx)
1077 struct ath_hw *ah = sc->sc_ah;
1078 struct ath_common *common = ath9k_hw_common(ah);
1079 struct ath9k_vif_iter_data iter_data;
1080 struct ath_beacon_config *cur_conf;
1082 ath_chanctx_check_active(sc, ctx);
1084 if (ctx != sc->cur_chan)
1087 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1088 if (ctx == &sc->offchannel.chan)
1089 return ath9k_set_offchannel_state(sc);
1092 ath9k_ps_wakeup(sc);
1093 ath9k_calculate_iter_data(sc, ctx, &iter_data);
1095 if (iter_data.has_hw_macaddr)
1096 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1098 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1099 ath_hw_setbssidmask(common);
1101 if (iter_data.naps > 0) {
1102 cur_conf = &ctx->beacon;
1103 ath9k_hw_set_tsfadjust(ah, true);
1104 ah->opmode = NL80211_IFTYPE_AP;
1105 if (cur_conf->enable_beacon)
1106 iter_data.beacons = true;
1108 ath9k_hw_set_tsfadjust(ah, false);
1110 if (iter_data.nmeshes)
1111 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1112 else if (iter_data.nwds)
1113 ah->opmode = NL80211_IFTYPE_AP;
1114 else if (iter_data.nadhocs)
1115 ah->opmode = NL80211_IFTYPE_ADHOC;
1117 ah->opmode = NL80211_IFTYPE_STATION;
1120 ath9k_hw_setopmode(ah);
1122 ctx->switch_after_beacon = false;
1123 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1124 ah->imask |= ATH9K_INT_TSFOOR;
1126 ah->imask &= ~ATH9K_INT_TSFOOR;
1127 if (iter_data.naps == 1 && iter_data.beacons)
1128 ctx->switch_after_beacon = true;
1131 ah->imask &= ~ATH9K_INT_SWBA;
1132 if (ah->opmode == NL80211_IFTYPE_STATION) {
1133 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1135 if (iter_data.primary_sta) {
1136 iter_data.beacons = true;
1137 ath9k_set_assoc_state(sc, iter_data.primary_sta,
1139 ctx->primary_sta = iter_data.primary_sta;
1141 ctx->primary_sta = NULL;
1142 eth_zero_addr(common->curbssid);
1144 ath9k_hw_write_associd(sc->sc_ah);
1145 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1146 ath9k_mci_update_wlan_channels(sc, true);
1148 } else if (iter_data.beacons) {
1149 ah->imask |= ATH9K_INT_SWBA;
1151 ath9k_hw_set_interrupts(ah);
1153 if (iter_data.beacons)
1154 set_bit(ATH_OP_BEACONS, &common->op_flags);
1156 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1158 if (ah->slottime != iter_data.slottime) {
1159 ah->slottime = iter_data.slottime;
1160 ath9k_hw_init_global_settings(ah);
1163 if (iter_data.primary_sta)
1164 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1166 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1168 ath_dbg(common, CONFIG,
1169 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1170 common->macaddr, common->curbssid, common->bssidmask);
1172 ath9k_ps_restore(sc);
1175 static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1177 int *power = (int *)data;
1179 if (*power < vif->bss_conf.txpower)
1180 *power = vif->bss_conf.txpower;
1183 /* Called with sc->mutex held. */
1184 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1187 struct ath_hw *ah = sc->sc_ah;
1188 struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1190 ath9k_ps_wakeup(sc);
1191 if (ah->tpc_enabled) {
1192 power = (vif) ? vif->bss_conf.txpower : -1;
1193 ieee80211_iterate_active_interfaces_atomic(
1194 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1195 ath9k_tpc_vif_iter, &power);
1197 power = sc->hw->conf.power_level;
1199 power = sc->hw->conf.power_level;
1201 sc->cur_chan->txpower = 2 * power;
1202 ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1203 sc->cur_chan->cur_txpower = reg->max_power_level;
1204 ath9k_ps_restore(sc);
1207 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1208 struct ieee80211_vif *vif)
1212 if (!ath9k_is_chanctx_enabled())
1215 for (i = 0; i < IEEE80211_NUM_ACS; i++)
1216 vif->hw_queue[i] = i;
1218 if (vif->type == NL80211_IFTYPE_AP ||
1219 vif->type == NL80211_IFTYPE_MESH_POINT)
1220 vif->cab_queue = hw->queues - 2;
1222 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1225 static int ath9k_add_interface(struct ieee80211_hw *hw,
1226 struct ieee80211_vif *vif)
1228 struct ath_softc *sc = hw->priv;
1229 struct ath_hw *ah = sc->sc_ah;
1230 struct ath_common *common = ath9k_hw_common(ah);
1231 struct ath_vif *avp = (void *)vif->drv_priv;
1232 struct ath_node *an = &avp->mcast_node;
1234 mutex_lock(&sc->mutex);
1236 if (config_enabled(CONFIG_ATH9K_TX99)) {
1237 if (sc->cur_chan->nvifs >= 1) {
1238 mutex_unlock(&sc->mutex);
1244 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1245 sc->cur_chan->nvifs++;
1247 if (ath9k_uses_beacons(vif->type))
1248 ath9k_beacon_assign_slot(sc, vif);
1251 if (!ath9k_is_chanctx_enabled()) {
1252 avp->chanctx = sc->cur_chan;
1253 list_add_tail(&avp->list, &avp->chanctx->vifs);
1256 ath9k_calculate_summary_state(sc, avp->chanctx);
1258 ath9k_assign_hw_queues(hw, vif);
1260 ath9k_set_txpower(sc, vif);
1265 an->no_ps_filter = true;
1266 ath_tx_node_init(sc, an);
1268 mutex_unlock(&sc->mutex);
1272 static int ath9k_change_interface(struct ieee80211_hw *hw,
1273 struct ieee80211_vif *vif,
1274 enum nl80211_iftype new_type,
1277 struct ath_softc *sc = hw->priv;
1278 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1279 struct ath_vif *avp = (void *)vif->drv_priv;
1281 mutex_lock(&sc->mutex);
1283 if (config_enabled(CONFIG_ATH9K_TX99)) {
1284 mutex_unlock(&sc->mutex);
1288 ath_dbg(common, CONFIG, "Change Interface\n");
1290 if (ath9k_uses_beacons(vif->type))
1291 ath9k_beacon_remove_slot(sc, vif);
1293 vif->type = new_type;
1296 if (ath9k_uses_beacons(vif->type))
1297 ath9k_beacon_assign_slot(sc, vif);
1299 ath9k_assign_hw_queues(hw, vif);
1300 ath9k_calculate_summary_state(sc, avp->chanctx);
1302 ath9k_set_txpower(sc, vif);
1304 mutex_unlock(&sc->mutex);
1308 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1309 struct ieee80211_vif *vif)
1311 struct ath_softc *sc = hw->priv;
1312 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1313 struct ath_vif *avp = (void *)vif->drv_priv;
1315 ath_dbg(common, CONFIG, "Detach Interface\n");
1317 mutex_lock(&sc->mutex);
1319 ath9k_p2p_remove_vif(sc, vif);
1321 sc->cur_chan->nvifs--;
1322 sc->tx99_vif = NULL;
1323 if (!ath9k_is_chanctx_enabled())
1324 list_del(&avp->list);
1326 if (ath9k_uses_beacons(vif->type))
1327 ath9k_beacon_remove_slot(sc, vif);
1329 ath_tx_node_cleanup(sc, &avp->mcast_node);
1331 ath9k_calculate_summary_state(sc, avp->chanctx);
1333 ath9k_set_txpower(sc, NULL);
1335 mutex_unlock(&sc->mutex);
1338 static void ath9k_enable_ps(struct ath_softc *sc)
1340 struct ath_hw *ah = sc->sc_ah;
1341 struct ath_common *common = ath9k_hw_common(ah);
1343 if (config_enabled(CONFIG_ATH9K_TX99))
1346 sc->ps_enabled = true;
1347 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1348 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1349 ah->imask |= ATH9K_INT_TIM_TIMER;
1350 ath9k_hw_set_interrupts(ah);
1352 ath9k_hw_setrxabort(ah, 1);
1354 ath_dbg(common, PS, "PowerSave enabled\n");
1357 static void ath9k_disable_ps(struct ath_softc *sc)
1359 struct ath_hw *ah = sc->sc_ah;
1360 struct ath_common *common = ath9k_hw_common(ah);
1362 if (config_enabled(CONFIG_ATH9K_TX99))
1365 sc->ps_enabled = false;
1366 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1367 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1368 ath9k_hw_setrxabort(ah, 0);
1369 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1371 PS_WAIT_FOR_PSPOLL_DATA |
1372 PS_WAIT_FOR_TX_ACK);
1373 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1374 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1375 ath9k_hw_set_interrupts(ah);
1378 ath_dbg(common, PS, "PowerSave disabled\n");
1381 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1383 struct ath_softc *sc = hw->priv;
1384 struct ath_hw *ah = sc->sc_ah;
1385 struct ath_common *common = ath9k_hw_common(ah);
1386 struct ieee80211_conf *conf = &hw->conf;
1387 struct ath_chanctx *ctx = sc->cur_chan;
1389 ath9k_ps_wakeup(sc);
1390 mutex_lock(&sc->mutex);
1392 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1393 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1395 ath_cancel_work(sc);
1396 ath9k_stop_btcoex(sc);
1398 ath9k_start_btcoex(sc);
1400 * The chip needs a reset to properly wake up from
1403 ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1408 * We just prepare to enable PS. We have to wait until our AP has
1409 * ACK'd our null data frame to disable RX otherwise we'll ignore
1410 * those ACKs and end up retransmitting the same null data frames.
1411 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1413 if (changed & IEEE80211_CONF_CHANGE_PS) {
1414 unsigned long flags;
1415 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1416 if (conf->flags & IEEE80211_CONF_PS)
1417 ath9k_enable_ps(sc);
1419 ath9k_disable_ps(sc);
1420 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1423 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1424 if (conf->flags & IEEE80211_CONF_MONITOR) {
1425 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1426 sc->sc_ah->is_monitoring = true;
1428 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1429 sc->sc_ah->is_monitoring = false;
1433 if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1434 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1435 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1438 mutex_unlock(&sc->mutex);
1439 ath9k_ps_restore(sc);
1444 #define SUPPORTED_FILTERS \
1445 (FIF_PROMISC_IN_BSS | \
1450 FIF_BCN_PRBRESP_PROMISC | \
1454 /* FIXME: sc->sc_full_reset ? */
1455 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1456 unsigned int changed_flags,
1457 unsigned int *total_flags,
1460 struct ath_softc *sc = hw->priv;
1463 changed_flags &= SUPPORTED_FILTERS;
1464 *total_flags &= SUPPORTED_FILTERS;
1466 spin_lock_bh(&sc->chan_lock);
1467 sc->cur_chan->rxfilter = *total_flags;
1468 spin_unlock_bh(&sc->chan_lock);
1470 ath9k_ps_wakeup(sc);
1471 rfilt = ath_calcrxfilter(sc);
1472 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1473 ath9k_ps_restore(sc);
1475 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1479 static int ath9k_sta_add(struct ieee80211_hw *hw,
1480 struct ieee80211_vif *vif,
1481 struct ieee80211_sta *sta)
1483 struct ath_softc *sc = hw->priv;
1484 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1485 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1486 struct ieee80211_key_conf ps_key = { };
1489 ath_node_attach(sc, sta, vif);
1491 if (vif->type != NL80211_IFTYPE_AP &&
1492 vif->type != NL80211_IFTYPE_AP_VLAN)
1495 key = ath_key_config(common, vif, sta, &ps_key);
1498 an->key_idx[0] = key;
1504 static void ath9k_del_ps_key(struct ath_softc *sc,
1505 struct ieee80211_vif *vif,
1506 struct ieee80211_sta *sta)
1508 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1509 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1510 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1515 ath_key_delete(common, &ps_key);
1520 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1521 struct ieee80211_vif *vif,
1522 struct ieee80211_sta *sta)
1524 struct ath_softc *sc = hw->priv;
1526 ath9k_del_ps_key(sc, vif, sta);
1527 ath_node_detach(sc, sta);
1532 static int ath9k_sta_state(struct ieee80211_hw *hw,
1533 struct ieee80211_vif *vif,
1534 struct ieee80211_sta *sta,
1535 enum ieee80211_sta_state old_state,
1536 enum ieee80211_sta_state new_state)
1538 struct ath_softc *sc = hw->priv;
1539 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1542 if (old_state == IEEE80211_STA_AUTH &&
1543 new_state == IEEE80211_STA_ASSOC) {
1544 ret = ath9k_sta_add(hw, vif, sta);
1545 ath_dbg(common, CONFIG,
1546 "Add station: %pM\n", sta->addr);
1547 } else if (old_state == IEEE80211_STA_ASSOC &&
1548 new_state == IEEE80211_STA_AUTH) {
1549 ret = ath9k_sta_remove(hw, vif, sta);
1550 ath_dbg(common, CONFIG,
1551 "Remove station: %pM\n", sta->addr);
1554 if (ath9k_is_chanctx_enabled()) {
1555 if (vif->type == NL80211_IFTYPE_STATION) {
1556 if (old_state == IEEE80211_STA_ASSOC &&
1557 new_state == IEEE80211_STA_AUTHORIZED)
1558 ath_chanctx_event(sc, vif,
1559 ATH_CHANCTX_EVENT_AUTHORIZED);
1566 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1567 struct ath_node *an,
1572 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1573 if (!an->key_idx[i])
1575 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1579 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1580 struct ieee80211_vif *vif,
1581 enum sta_notify_cmd cmd,
1582 struct ieee80211_sta *sta)
1584 struct ath_softc *sc = hw->priv;
1585 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1588 case STA_NOTIFY_SLEEP:
1589 an->sleeping = true;
1590 ath_tx_aggr_sleep(sta, sc, an);
1591 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1593 case STA_NOTIFY_AWAKE:
1594 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1595 an->sleeping = false;
1596 ath_tx_aggr_wakeup(sc, an);
1601 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1602 struct ieee80211_vif *vif, u16 queue,
1603 const struct ieee80211_tx_queue_params *params)
1605 struct ath_softc *sc = hw->priv;
1606 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1607 struct ath_txq *txq;
1608 struct ath9k_tx_queue_info qi;
1611 if (queue >= IEEE80211_NUM_ACS)
1614 txq = sc->tx.txq_map[queue];
1616 ath9k_ps_wakeup(sc);
1617 mutex_lock(&sc->mutex);
1619 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1621 qi.tqi_aifs = params->aifs;
1622 qi.tqi_cwmin = params->cw_min;
1623 qi.tqi_cwmax = params->cw_max;
1624 qi.tqi_burstTime = params->txop * 32;
1626 ath_dbg(common, CONFIG,
1627 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1628 queue, txq->axq_qnum, params->aifs, params->cw_min,
1629 params->cw_max, params->txop);
1631 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1632 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1634 ath_err(common, "TXQ Update failed\n");
1636 mutex_unlock(&sc->mutex);
1637 ath9k_ps_restore(sc);
1642 static int ath9k_set_key(struct ieee80211_hw *hw,
1643 enum set_key_cmd cmd,
1644 struct ieee80211_vif *vif,
1645 struct ieee80211_sta *sta,
1646 struct ieee80211_key_conf *key)
1648 struct ath_softc *sc = hw->priv;
1649 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1650 struct ath_node *an = NULL;
1653 if (ath9k_modparam_nohwcrypt)
1656 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1657 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1658 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1659 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1660 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1662 * For now, disable hw crypto for the RSN IBSS group keys. This
1663 * could be optimized in the future to use a modified key cache
1664 * design to support per-STA RX GTK, but until that gets
1665 * implemented, use of software crypto for group addressed
1666 * frames is a acceptable to allow RSN IBSS to be used.
1671 mutex_lock(&sc->mutex);
1672 ath9k_ps_wakeup(sc);
1673 ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1675 an = (struct ath_node *)sta->drv_priv;
1680 ath9k_del_ps_key(sc, vif, sta);
1682 key->hw_key_idx = 0;
1683 ret = ath_key_config(common, vif, sta, key);
1685 key->hw_key_idx = ret;
1686 /* push IV and Michael MIC generation to stack */
1687 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1688 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1689 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1690 if (sc->sc_ah->sw_mgmt_crypto_tx &&
1691 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1692 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1695 if (an && key->hw_key_idx) {
1696 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1699 an->key_idx[i] = key->hw_key_idx;
1702 WARN_ON(i == ARRAY_SIZE(an->key_idx));
1706 ath_key_delete(common, key);
1708 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1709 if (an->key_idx[i] != key->hw_key_idx)
1715 key->hw_key_idx = 0;
1721 ath9k_ps_restore(sc);
1722 mutex_unlock(&sc->mutex);
1727 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1728 struct ieee80211_vif *vif,
1729 struct ieee80211_bss_conf *bss_conf,
1733 (BSS_CHANGED_ASSOC | \
1734 BSS_CHANGED_IBSS | \
1735 BSS_CHANGED_BEACON_ENABLED)
1737 struct ath_softc *sc = hw->priv;
1738 struct ath_hw *ah = sc->sc_ah;
1739 struct ath_common *common = ath9k_hw_common(ah);
1740 struct ath_vif *avp = (void *)vif->drv_priv;
1743 ath9k_ps_wakeup(sc);
1744 mutex_lock(&sc->mutex);
1746 if (changed & BSS_CHANGED_ASSOC) {
1747 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1748 bss_conf->bssid, bss_conf->assoc);
1750 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1751 avp->aid = bss_conf->aid;
1752 avp->assoc = bss_conf->assoc;
1754 ath9k_calculate_summary_state(sc, avp->chanctx);
1757 if (changed & BSS_CHANGED_IBSS) {
1758 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1759 common->curaid = bss_conf->aid;
1760 ath9k_hw_write_associd(sc->sc_ah);
1763 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1764 (changed & BSS_CHANGED_BEACON_INT) ||
1765 (changed & BSS_CHANGED_BEACON_INFO)) {
1766 ath9k_beacon_config(sc, vif, changed);
1767 if (changed & BSS_CHANGED_BEACON_ENABLED)
1768 ath9k_calculate_summary_state(sc, avp->chanctx);
1771 if ((avp->chanctx == sc->cur_chan) &&
1772 (changed & BSS_CHANGED_ERP_SLOT)) {
1773 if (bss_conf->use_short_slot)
1777 if (vif->type == NL80211_IFTYPE_AP) {
1779 * Defer update, so that connected stations can adjust
1780 * their settings at the same time.
1781 * See beacon.c for more details
1783 sc->beacon.slottime = slottime;
1784 sc->beacon.updateslot = UPDATE;
1786 ah->slottime = slottime;
1787 ath9k_hw_init_global_settings(ah);
1791 if (changed & BSS_CHANGED_P2P_PS)
1792 ath9k_p2p_bss_info_changed(sc, vif);
1794 if (changed & CHECK_ANI)
1797 if (changed & BSS_CHANGED_TXPOWER) {
1798 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1799 vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1800 ath9k_set_txpower(sc, vif);
1803 mutex_unlock(&sc->mutex);
1804 ath9k_ps_restore(sc);
1809 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1811 struct ath_softc *sc = hw->priv;
1814 mutex_lock(&sc->mutex);
1815 ath9k_ps_wakeup(sc);
1816 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1817 ath9k_ps_restore(sc);
1818 mutex_unlock(&sc->mutex);
1823 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1824 struct ieee80211_vif *vif,
1827 struct ath_softc *sc = hw->priv;
1829 mutex_lock(&sc->mutex);
1830 ath9k_ps_wakeup(sc);
1831 ath9k_hw_settsf64(sc->sc_ah, tsf);
1832 ath9k_ps_restore(sc);
1833 mutex_unlock(&sc->mutex);
1836 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1838 struct ath_softc *sc = hw->priv;
1840 mutex_lock(&sc->mutex);
1842 ath9k_ps_wakeup(sc);
1843 ath9k_hw_reset_tsf(sc->sc_ah);
1844 ath9k_ps_restore(sc);
1846 mutex_unlock(&sc->mutex);
1849 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1850 struct ieee80211_vif *vif,
1851 enum ieee80211_ampdu_mlme_action action,
1852 struct ieee80211_sta *sta,
1853 u16 tid, u16 *ssn, u8 buf_size)
1855 struct ath_softc *sc = hw->priv;
1856 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1860 mutex_lock(&sc->mutex);
1863 case IEEE80211_AMPDU_RX_START:
1865 case IEEE80211_AMPDU_RX_STOP:
1867 case IEEE80211_AMPDU_TX_START:
1868 if (ath9k_is_chanctx_enabled()) {
1869 if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
1874 ath9k_ps_wakeup(sc);
1875 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1877 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1878 ath9k_ps_restore(sc);
1880 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1881 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1883 case IEEE80211_AMPDU_TX_STOP_CONT:
1884 ath9k_ps_wakeup(sc);
1885 ath_tx_aggr_stop(sc, sta, tid);
1887 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1888 ath9k_ps_restore(sc);
1890 case IEEE80211_AMPDU_TX_OPERATIONAL:
1891 ath9k_ps_wakeup(sc);
1892 ath_tx_aggr_resume(sc, sta, tid);
1893 ath9k_ps_restore(sc);
1896 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1899 mutex_unlock(&sc->mutex);
1904 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1905 struct survey_info *survey)
1907 struct ath_softc *sc = hw->priv;
1908 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1909 struct ieee80211_supported_band *sband;
1910 struct ieee80211_channel *chan;
1913 if (config_enabled(CONFIG_ATH9K_TX99))
1916 spin_lock_bh(&common->cc_lock);
1918 ath_update_survey_stats(sc);
1920 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1921 if (sband && idx >= sband->n_channels) {
1922 idx -= sband->n_channels;
1927 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1929 if (!sband || idx >= sband->n_channels) {
1930 spin_unlock_bh(&common->cc_lock);
1934 chan = &sband->channels[idx];
1935 pos = chan->hw_value;
1936 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1937 survey->channel = chan;
1938 spin_unlock_bh(&common->cc_lock);
1943 static void ath9k_enable_dynack(struct ath_softc *sc)
1945 #ifdef CONFIG_ATH9K_DYNACK
1947 struct ath_hw *ah = sc->sc_ah;
1949 ath_dynack_reset(ah);
1951 ah->dynack.enabled = true;
1952 rfilt = ath_calcrxfilter(sc);
1953 ath9k_hw_setrxfilter(ah, rfilt);
1957 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
1960 struct ath_softc *sc = hw->priv;
1961 struct ath_hw *ah = sc->sc_ah;
1963 if (config_enabled(CONFIG_ATH9K_TX99))
1966 mutex_lock(&sc->mutex);
1968 if (coverage_class >= 0) {
1969 ah->coverage_class = coverage_class;
1970 if (ah->dynack.enabled) {
1973 ah->dynack.enabled = false;
1974 rfilt = ath_calcrxfilter(sc);
1975 ath9k_hw_setrxfilter(ah, rfilt);
1977 ath9k_ps_wakeup(sc);
1978 ath9k_hw_init_global_settings(ah);
1979 ath9k_ps_restore(sc);
1980 } else if (!ah->dynack.enabled) {
1981 ath9k_enable_dynack(sc);
1984 mutex_unlock(&sc->mutex);
1987 static bool ath9k_has_tx_pending(struct ath_softc *sc,
1992 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1993 if (!ATH_TXQ_SETUP(sc, i))
1996 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2005 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2006 u32 queues, bool drop)
2008 struct ath_softc *sc = hw->priv;
2009 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2011 if (ath9k_is_chanctx_enabled()) {
2012 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2016 * If MCC is active, extend the flush timeout
2017 * and wait for the HW/SW queues to become
2018 * empty. This needs to be done outside the
2019 * sc->mutex lock to allow the channel scheduler
2020 * to switch channel contexts.
2022 * The vif queues have been stopped in mac80211,
2023 * so there won't be any incoming frames.
2025 __ath9k_flush(hw, queues, drop, true, true);
2029 mutex_lock(&sc->mutex);
2030 __ath9k_flush(hw, queues, drop, true, false);
2031 mutex_unlock(&sc->mutex);
2034 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2035 bool sw_pending, bool timeout_override)
2037 struct ath_softc *sc = hw->priv;
2038 struct ath_hw *ah = sc->sc_ah;
2039 struct ath_common *common = ath9k_hw_common(ah);
2043 cancel_delayed_work_sync(&sc->tx_complete_work);
2045 if (ah->ah_flags & AH_UNPLUGGED) {
2046 ath_dbg(common, ANY, "Device has been unplugged!\n");
2050 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2051 ath_dbg(common, ANY, "Device not present\n");
2055 spin_lock_bh(&sc->chan_lock);
2056 if (timeout_override)
2059 timeout = sc->cur_chan->flush_timeout;
2060 spin_unlock_bh(&sc->chan_lock);
2062 ath_dbg(common, CHAN_CTX,
2063 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2065 if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2070 ath9k_ps_wakeup(sc);
2071 spin_lock_bh(&sc->sc_pcu_lock);
2072 drain_txq = ath_drain_all_txq(sc);
2073 spin_unlock_bh(&sc->sc_pcu_lock);
2076 ath_reset(sc, NULL);
2078 ath9k_ps_restore(sc);
2081 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2084 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2086 struct ath_softc *sc = hw->priv;
2088 return ath9k_has_tx_pending(sc, true);
2091 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2093 struct ath_softc *sc = hw->priv;
2094 struct ath_hw *ah = sc->sc_ah;
2095 struct ieee80211_vif *vif;
2096 struct ath_vif *avp;
2098 struct ath_tx_status ts;
2099 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2102 vif = sc->beacon.bslot[0];
2106 if (!vif->bss_conf.enable_beacon)
2109 avp = (void *)vif->drv_priv;
2111 if (!sc->beacon.tx_processed && !edma) {
2112 tasklet_disable(&sc->bcon_tasklet);
2115 if (!bf || !bf->bf_mpdu)
2118 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2119 if (status == -EINPROGRESS)
2122 sc->beacon.tx_processed = true;
2123 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2126 tasklet_enable(&sc->bcon_tasklet);
2129 return sc->beacon.tx_last;
2132 static int ath9k_get_stats(struct ieee80211_hw *hw,
2133 struct ieee80211_low_level_stats *stats)
2135 struct ath_softc *sc = hw->priv;
2136 struct ath_hw *ah = sc->sc_ah;
2137 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2139 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2140 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2141 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2142 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2146 static u32 fill_chainmask(u32 cap, u32 new)
2151 for (i = 0; cap && new; i++, cap >>= 1) {
2152 if (!(cap & BIT(0)))
2164 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2166 if (AR_SREV_9300_20_OR_LATER(ah))
2169 switch (val & 0x7) {
2175 return (ah->caps.rx_chainmask == 1);
2181 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2183 struct ath_softc *sc = hw->priv;
2184 struct ath_hw *ah = sc->sc_ah;
2186 if (ah->caps.rx_chainmask != 1)
2189 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2192 sc->ant_rx = rx_ant;
2193 sc->ant_tx = tx_ant;
2195 if (ah->caps.rx_chainmask == 1)
2198 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2199 if (AR_SREV_9100(ah))
2200 ah->rxchainmask = 0x7;
2202 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2204 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2205 ath9k_cmn_reload_chainmask(ah);
2210 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2212 struct ath_softc *sc = hw->priv;
2214 *tx_ant = sc->ant_tx;
2215 *rx_ant = sc->ant_rx;
2219 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2220 struct ieee80211_vif *vif,
2223 struct ath_softc *sc = hw->priv;
2224 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2225 set_bit(ATH_OP_SCANNING, &common->op_flags);
2228 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2229 struct ieee80211_vif *vif)
2231 struct ath_softc *sc = hw->priv;
2232 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2233 clear_bit(ATH_OP_SCANNING, &common->op_flags);
2236 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2238 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2240 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2242 if (sc->offchannel.roc_vif) {
2243 ath_dbg(common, CHAN_CTX,
2244 "%s: Aborting RoC\n", __func__);
2246 del_timer_sync(&sc->offchannel.timer);
2247 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2248 ath_roc_complete(sc, true);
2251 if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2252 ath_dbg(common, CHAN_CTX,
2253 "%s: Aborting HW scan\n", __func__);
2255 del_timer_sync(&sc->offchannel.timer);
2256 ath_scan_complete(sc, true);
2260 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2261 struct ieee80211_scan_request *hw_req)
2263 struct cfg80211_scan_request *req = &hw_req->req;
2264 struct ath_softc *sc = hw->priv;
2265 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2268 mutex_lock(&sc->mutex);
2270 if (WARN_ON(sc->offchannel.scan_req)) {
2275 ath9k_ps_wakeup(sc);
2276 set_bit(ATH_OP_SCANNING, &common->op_flags);
2277 sc->offchannel.scan_vif = vif;
2278 sc->offchannel.scan_req = req;
2279 sc->offchannel.scan_idx = 0;
2281 ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2284 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2285 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2286 ath_offchannel_next(sc);
2290 mutex_unlock(&sc->mutex);
2295 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2296 struct ieee80211_vif *vif)
2298 struct ath_softc *sc = hw->priv;
2299 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2301 ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2303 mutex_lock(&sc->mutex);
2304 del_timer_sync(&sc->offchannel.timer);
2305 ath_scan_complete(sc, true);
2306 mutex_unlock(&sc->mutex);
2309 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2310 struct ieee80211_vif *vif,
2311 struct ieee80211_channel *chan, int duration,
2312 enum ieee80211_roc_type type)
2314 struct ath_softc *sc = hw->priv;
2315 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2318 mutex_lock(&sc->mutex);
2320 if (WARN_ON(sc->offchannel.roc_vif)) {
2325 ath9k_ps_wakeup(sc);
2326 sc->offchannel.roc_vif = vif;
2327 sc->offchannel.roc_chan = chan;
2328 sc->offchannel.roc_duration = duration;
2330 ath_dbg(common, CHAN_CTX,
2331 "RoC request on vif: %pM, type: %d duration: %d\n",
2332 vif->addr, type, duration);
2334 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2335 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2336 ath_offchannel_next(sc);
2340 mutex_unlock(&sc->mutex);
2345 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2347 struct ath_softc *sc = hw->priv;
2348 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2350 mutex_lock(&sc->mutex);
2352 ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2353 del_timer_sync(&sc->offchannel.timer);
2355 if (sc->offchannel.roc_vif) {
2356 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2357 ath_roc_complete(sc, true);
2360 mutex_unlock(&sc->mutex);
2365 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2366 struct ieee80211_chanctx_conf *conf)
2368 struct ath_softc *sc = hw->priv;
2369 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2370 struct ath_chanctx *ctx, **ptr;
2373 mutex_lock(&sc->mutex);
2375 ath_for_each_chanctx(sc, ctx) {
2379 ptr = (void *) conf->drv_priv;
2381 ctx->assigned = true;
2382 pos = ctx - &sc->chanctx[0];
2383 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2385 ath_dbg(common, CHAN_CTX,
2386 "Add channel context: %d MHz\n",
2387 conf->def.chan->center_freq);
2389 ath_chanctx_set_channel(sc, ctx, &conf->def);
2391 mutex_unlock(&sc->mutex);
2395 mutex_unlock(&sc->mutex);
2400 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2401 struct ieee80211_chanctx_conf *conf)
2403 struct ath_softc *sc = hw->priv;
2404 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2405 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2407 mutex_lock(&sc->mutex);
2409 ath_dbg(common, CHAN_CTX,
2410 "Remove channel context: %d MHz\n",
2411 conf->def.chan->center_freq);
2413 ctx->assigned = false;
2414 ctx->hw_queue_base = 0;
2415 ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2417 mutex_unlock(&sc->mutex);
2420 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2421 struct ieee80211_chanctx_conf *conf,
2424 struct ath_softc *sc = hw->priv;
2425 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2426 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2428 mutex_lock(&sc->mutex);
2429 ath_dbg(common, CHAN_CTX,
2430 "Change channel context: %d MHz\n",
2431 conf->def.chan->center_freq);
2432 ath_chanctx_set_channel(sc, ctx, &conf->def);
2433 mutex_unlock(&sc->mutex);
2436 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2437 struct ieee80211_vif *vif,
2438 struct ieee80211_chanctx_conf *conf)
2440 struct ath_softc *sc = hw->priv;
2441 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2442 struct ath_vif *avp = (void *)vif->drv_priv;
2443 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2446 ath9k_cancel_pending_offchannel(sc);
2448 mutex_lock(&sc->mutex);
2450 ath_dbg(common, CHAN_CTX,
2451 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2452 vif->addr, vif->type, vif->p2p,
2453 conf->def.chan->center_freq);
2456 ctx->nvifs_assigned++;
2457 list_add_tail(&avp->list, &ctx->vifs);
2458 ath9k_calculate_summary_state(sc, ctx);
2459 for (i = 0; i < IEEE80211_NUM_ACS; i++)
2460 vif->hw_queue[i] = ctx->hw_queue_base + i;
2462 mutex_unlock(&sc->mutex);
2467 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2468 struct ieee80211_vif *vif,
2469 struct ieee80211_chanctx_conf *conf)
2471 struct ath_softc *sc = hw->priv;
2472 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2473 struct ath_vif *avp = (void *)vif->drv_priv;
2474 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2477 ath9k_cancel_pending_offchannel(sc);
2479 mutex_lock(&sc->mutex);
2481 ath_dbg(common, CHAN_CTX,
2482 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2483 vif->addr, vif->type, vif->p2p,
2484 conf->def.chan->center_freq);
2486 avp->chanctx = NULL;
2487 ctx->nvifs_assigned--;
2488 list_del(&avp->list);
2489 ath9k_calculate_summary_state(sc, ctx);
2490 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2491 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2493 mutex_unlock(&sc->mutex);
2496 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2497 struct ieee80211_vif *vif)
2499 struct ath_softc *sc = hw->priv;
2500 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2501 struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2502 struct ath_beacon_config *cur_conf;
2503 struct ath_chanctx *go_ctx;
2504 unsigned long timeout;
2505 bool changed = false;
2508 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2514 mutex_lock(&sc->mutex);
2516 spin_lock_bh(&sc->chan_lock);
2517 if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2519 spin_unlock_bh(&sc->chan_lock);
2524 ath9k_cancel_pending_offchannel(sc);
2526 go_ctx = ath_is_go_chanctx_present(sc);
2530 * Wait till the GO interface gets a chance
2531 * to send out an NoA.
2533 spin_lock_bh(&sc->chan_lock);
2534 sc->sched.mgd_prepare_tx = true;
2535 cur_conf = &go_ctx->beacon;
2536 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2537 spin_unlock_bh(&sc->chan_lock);
2539 timeout = usecs_to_jiffies(beacon_int * 2);
2540 init_completion(&sc->go_beacon);
2542 mutex_unlock(&sc->mutex);
2544 if (wait_for_completion_timeout(&sc->go_beacon,
2546 ath_dbg(common, CHAN_CTX,
2547 "Failed to send new NoA\n");
2549 spin_lock_bh(&sc->chan_lock);
2550 sc->sched.mgd_prepare_tx = false;
2551 spin_unlock_bh(&sc->chan_lock);
2554 mutex_lock(&sc->mutex);
2557 ath_dbg(common, CHAN_CTX,
2558 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2559 __func__, vif->addr);
2561 spin_lock_bh(&sc->chan_lock);
2562 sc->next_chan = avp->chanctx;
2563 sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2564 spin_unlock_bh(&sc->chan_lock);
2566 ath_chanctx_set_next(sc, true);
2568 mutex_unlock(&sc->mutex);
2571 void ath9k_fill_chanctx_ops(void)
2573 if (!ath9k_is_chanctx_enabled())
2576 ath9k_ops.hw_scan = ath9k_hw_scan;
2577 ath9k_ops.cancel_hw_scan = ath9k_cancel_hw_scan;
2578 ath9k_ops.remain_on_channel = ath9k_remain_on_channel;
2579 ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2580 ath9k_ops.add_chanctx = ath9k_add_chanctx;
2581 ath9k_ops.remove_chanctx = ath9k_remove_chanctx;
2582 ath9k_ops.change_chanctx = ath9k_change_chanctx;
2583 ath9k_ops.assign_vif_chanctx = ath9k_assign_vif_chanctx;
2584 ath9k_ops.unassign_vif_chanctx = ath9k_unassign_vif_chanctx;
2585 ath9k_ops.mgd_prepare_tx = ath9k_mgd_prepare_tx;
2590 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2593 struct ath_softc *sc = hw->priv;
2594 struct ath_vif *avp = (void *)vif->drv_priv;
2596 mutex_lock(&sc->mutex);
2598 *dbm = avp->chanctx->cur_txpower;
2600 *dbm = sc->cur_chan->cur_txpower;
2601 mutex_unlock(&sc->mutex);
2608 struct ieee80211_ops ath9k_ops = {
2610 .start = ath9k_start,
2612 .add_interface = ath9k_add_interface,
2613 .change_interface = ath9k_change_interface,
2614 .remove_interface = ath9k_remove_interface,
2615 .config = ath9k_config,
2616 .configure_filter = ath9k_configure_filter,
2617 .sta_state = ath9k_sta_state,
2618 .sta_notify = ath9k_sta_notify,
2619 .conf_tx = ath9k_conf_tx,
2620 .bss_info_changed = ath9k_bss_info_changed,
2621 .set_key = ath9k_set_key,
2622 .get_tsf = ath9k_get_tsf,
2623 .set_tsf = ath9k_set_tsf,
2624 .reset_tsf = ath9k_reset_tsf,
2625 .ampdu_action = ath9k_ampdu_action,
2626 .get_survey = ath9k_get_survey,
2627 .rfkill_poll = ath9k_rfkill_poll_state,
2628 .set_coverage_class = ath9k_set_coverage_class,
2629 .flush = ath9k_flush,
2630 .tx_frames_pending = ath9k_tx_frames_pending,
2631 .tx_last_beacon = ath9k_tx_last_beacon,
2632 .release_buffered_frames = ath9k_release_buffered_frames,
2633 .get_stats = ath9k_get_stats,
2634 .set_antenna = ath9k_set_antenna,
2635 .get_antenna = ath9k_get_antenna,
2637 #ifdef CONFIG_ATH9K_WOW
2638 .suspend = ath9k_suspend,
2639 .resume = ath9k_resume,
2640 .set_wakeup = ath9k_set_wakeup,
2643 #ifdef CONFIG_ATH9K_DEBUGFS
2644 .get_et_sset_count = ath9k_get_et_sset_count,
2645 .get_et_stats = ath9k_get_et_stats,
2646 .get_et_strings = ath9k_get_et_strings,
2649 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2650 .sta_add_debugfs = ath9k_sta_add_debugfs,
2652 .sw_scan_start = ath9k_sw_scan_start,
2653 .sw_scan_complete = ath9k_sw_scan_complete,
2654 .get_txpower = ath9k_get_txpower,