kernel/drivers/net/wireless/ath/ath10k/hw.c

   1 /*
   2  * Copyright (c) 2014-2015 Qualcomm Atheros, Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include "hw.h"
  19
  20 const struct ath10k_hw_regs qca988x_regs = {
  21         .rtc_state_cold_reset_mask      = 0x00000400,
  22         .rtc_soc_base_address           = 0x00004000,
  23         .rtc_wmac_base_address          = 0x00005000,
  24         .soc_core_base_address          = 0x00009000,
  25         .ce_wrapper_base_address        = 0x00057000,
  26         .ce0_base_address               = 0x00057400,
  27         .ce1_base_address               = 0x00057800,
  28         .ce2_base_address               = 0x00057c00,
  29         .ce3_base_address               = 0x00058000,
  30         .ce4_base_address               = 0x00058400,
  31         .ce5_base_address               = 0x00058800,
  32         .ce6_base_address               = 0x00058c00,
  33         .ce7_base_address               = 0x00059000,
  34         .soc_reset_control_si0_rst_mask = 0x00000001,
  35         .soc_reset_control_ce_rst_mask  = 0x00040000,
  36         .soc_chip_id_address            = 0x00ec,
  37         .scratch_3_address              = 0x0030,
  38 };
  39
  40 const struct ath10k_hw_regs qca6174_regs = {
  41         .rtc_state_cold_reset_mask              = 0x00002000,
  42         .rtc_soc_base_address                   = 0x00000800,
  43         .rtc_wmac_base_address                  = 0x00001000,
  44         .soc_core_base_address                  = 0x0003a000,
  45         .ce_wrapper_base_address                = 0x00034000,
  46         .ce0_base_address                       = 0x00034400,
  47         .ce1_base_address                       = 0x00034800,
  48         .ce2_base_address                       = 0x00034c00,
  49         .ce3_base_address                       = 0x00035000,
  50         .ce4_base_address                       = 0x00035400,
  51         .ce5_base_address                       = 0x00035800,
  52         .ce6_base_address                       = 0x00035c00,
  53         .ce7_base_address                       = 0x00036000,
  54         .soc_reset_control_si0_rst_mask         = 0x00000000,
  55         .soc_reset_control_ce_rst_mask          = 0x00000001,
  56         .soc_chip_id_address                    = 0x000f0,
  57         .scratch_3_address                      = 0x0028,
  58 };