kernel/drivers/net/ieee802154/at86rf230.c

   1 /*
   2  * AT86RF230/RF231 driver
   3  *
   4  * Copyright (C) 2009-2012 Siemens AG
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2
   8  * as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * Written by:
  16  * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
  17  * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
  18  * Alexander Aring <aar@pengutronix.de>
  19  */
  20 #include <linux/kernel.h>
  21 #include <linux/module.h>
  22 #include <linux/hrtimer.h>
  23 #include <linux/jiffies.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/irq.h>
  26 #include <linux/gpio.h>
  27 #include <linux/delay.h>
  28 #include <linux/spi/spi.h>
  29 #include <linux/spi/at86rf230.h>
  30 #include <linux/regmap.h>
  31 #include <linux/skbuff.h>
  32 #include <linux/of_gpio.h>
  33 #include <linux/ieee802154.h>
  34
  35 #include <net/mac802154.h>
  36 #include <net/cfg802154.h>
  37
  38 struct at86rf230_local;
  39 /* at86rf2xx chip depend data.
  40  * All timings are in us.
  41  */
  42 struct at86rf2xx_chip_data {
  43         u16 t_sleep_cycle;
  44         u16 t_channel_switch;
  45         u16 t_reset_to_off;
  46         u16 t_off_to_aack;
  47         u16 t_off_to_tx_on;
  48         u16 t_frame;
  49         u16 t_p_ack;
  50         int rssi_base_val;
  51
  52         int (*set_channel)(struct at86rf230_local *, u8, u8);
  53         int (*get_desense_steps)(struct at86rf230_local *, s32);
  54 };
  55
  56 #define AT86RF2XX_MAX_BUF               (127 + 3)
  57 /* tx retries to access the TX_ON state
  58  * if it's above then force change will be started.
  59  *
  60  * We assume the max_frame_retries (7) value of 802.15.4 here.
  61  */
  62 #define AT86RF2XX_MAX_TX_RETRIES        7
  63 /* We use the recommended 5 minutes timeout to recalibrate */
  64 #define AT86RF2XX_CAL_LOOP_TIMEOUT      (5 * 60 * HZ)
  65
  66 struct at86rf230_state_change {
  67         struct at86rf230_local *lp;
  68         int irq;
  69
  70         struct hrtimer timer;
  71         struct spi_message msg;
  72         struct spi_transfer trx;
  73         u8 buf[AT86RF2XX_MAX_BUF];
  74
  75         void (*complete)(void *context);
  76         u8 from_state;
  77         u8 to_state;
  78
  79         bool irq_enable;
  80 };
  81
  82 struct at86rf230_local {
  83         struct spi_device *spi;
  84
  85         struct ieee802154_hw *hw;
  86         struct at86rf2xx_chip_data *data;
  87         struct regmap *regmap;
  88         int slp_tr;
  89
  90         struct completion state_complete;
  91         struct at86rf230_state_change state;
  92
  93         struct at86rf230_state_change irq;
  94
  95         bool tx_aret;
  96         unsigned long cal_timeout;
  97         s8 max_frame_retries;
  98         bool is_tx;
  99         bool is_tx_from_off;
 100         u8 tx_retry;
 101         struct sk_buff *tx_skb;
 102         struct at86rf230_state_change tx;
 103 };
 104
 105 #define RG_TRX_STATUS   (0x01)
 106 #define SR_TRX_STATUS           0x01, 0x1f, 0
 107 #define SR_RESERVED_01_3        0x01, 0x20, 5
 108 #define SR_CCA_STATUS           0x01, 0x40, 6
 109 #define SR_CCA_DONE             0x01, 0x80, 7
 110 #define RG_TRX_STATE    (0x02)
 111 #define SR_TRX_CMD              0x02, 0x1f, 0
 112 #define SR_TRAC_STATUS          0x02, 0xe0, 5
 113 #define RG_TRX_CTRL_0   (0x03)
 114 #define SR_CLKM_CTRL            0x03, 0x07, 0
 115 #define SR_CLKM_SHA_SEL         0x03, 0x08, 3
 116 #define SR_PAD_IO_CLKM          0x03, 0x30, 4
 117 #define SR_PAD_IO               0x03, 0xc0, 6
 118 #define RG_TRX_CTRL_1   (0x04)
 119 #define SR_IRQ_POLARITY         0x04, 0x01, 0
 120 #define SR_IRQ_MASK_MODE        0x04, 0x02, 1
 121 #define SR_SPI_CMD_MODE         0x04, 0x0c, 2
 122 #define SR_RX_BL_CTRL           0x04, 0x10, 4
 123 #define SR_TX_AUTO_CRC_ON       0x04, 0x20, 5
 124 #define SR_IRQ_2_EXT_EN         0x04, 0x40, 6
 125 #define SR_PA_EXT_EN            0x04, 0x80, 7
 126 #define RG_PHY_TX_PWR   (0x05)
 127 #define SR_TX_PWR               0x05, 0x0f, 0
 128 #define SR_PA_LT                0x05, 0x30, 4
 129 #define SR_PA_BUF_LT            0x05, 0xc0, 6
 130 #define RG_PHY_RSSI     (0x06)
 131 #define SR_RSSI                 0x06, 0x1f, 0
 132 #define SR_RND_VALUE            0x06, 0x60, 5
 133 #define SR_RX_CRC_VALID         0x06, 0x80, 7
 134 #define RG_PHY_ED_LEVEL (0x07)
 135 #define SR_ED_LEVEL             0x07, 0xff, 0
 136 #define RG_PHY_CC_CCA   (0x08)
 137 #define SR_CHANNEL              0x08, 0x1f, 0
 138 #define SR_CCA_MODE             0x08, 0x60, 5
 139 #define SR_CCA_REQUEST          0x08, 0x80, 7
 140 #define RG_CCA_THRES    (0x09)
 141 #define SR_CCA_ED_THRES         0x09, 0x0f, 0
 142 #define SR_RESERVED_09_1        0x09, 0xf0, 4
 143 #define RG_RX_CTRL      (0x0a)
 144 #define SR_PDT_THRES            0x0a, 0x0f, 0
 145 #define SR_RESERVED_0a_1        0x0a, 0xf0, 4
 146 #define RG_SFD_VALUE    (0x0b)
 147 #define SR_SFD_VALUE            0x0b, 0xff, 0
 148 #define RG_TRX_CTRL_2   (0x0c)
 149 #define SR_OQPSK_DATA_RATE      0x0c, 0x03, 0
 150 #define SR_SUB_MODE             0x0c, 0x04, 2
 151 #define SR_BPSK_QPSK            0x0c, 0x08, 3
 152 #define SR_OQPSK_SUB1_RC_EN     0x0c, 0x10, 4
 153 #define SR_RESERVED_0c_5        0x0c, 0x60, 5
 154 #define SR_RX_SAFE_MODE         0x0c, 0x80, 7
 155 #define RG_ANT_DIV      (0x0d)
 156 #define SR_ANT_CTRL             0x0d, 0x03, 0
 157 #define SR_ANT_EXT_SW_EN        0x0d, 0x04, 2
 158 #define SR_ANT_DIV_EN           0x0d, 0x08, 3
 159 #define SR_RESERVED_0d_2        0x0d, 0x70, 4
 160 #define SR_ANT_SEL              0x0d, 0x80, 7
 161 #define RG_IRQ_MASK     (0x0e)
 162 #define SR_IRQ_MASK             0x0e, 0xff, 0
 163 #define RG_IRQ_STATUS   (0x0f)
 164 #define SR_IRQ_0_PLL_LOCK       0x0f, 0x01, 0
 165 #define SR_IRQ_1_PLL_UNLOCK     0x0f, 0x02, 1
 166 #define SR_IRQ_2_RX_START       0x0f, 0x04, 2
 167 #define SR_IRQ_3_TRX_END        0x0f, 0x08, 3
 168 #define SR_IRQ_4_CCA_ED_DONE    0x0f, 0x10, 4
 169 #define SR_IRQ_5_AMI            0x0f, 0x20, 5
 170 #define SR_IRQ_6_TRX_UR         0x0f, 0x40, 6
 171 #define SR_IRQ_7_BAT_LOW        0x0f, 0x80, 7
 172 #define RG_VREG_CTRL    (0x10)
 173 #define SR_RESERVED_10_6        0x10, 0x03, 0
 174 #define SR_DVDD_OK              0x10, 0x04, 2
 175 #define SR_DVREG_EXT            0x10, 0x08, 3
 176 #define SR_RESERVED_10_3        0x10, 0x30, 4
 177 #define SR_AVDD_OK              0x10, 0x40, 6
 178 #define SR_AVREG_EXT            0x10, 0x80, 7
 179 #define RG_BATMON       (0x11)
 180 #define SR_BATMON_VTH           0x11, 0x0f, 0
 181 #define SR_BATMON_HR            0x11, 0x10, 4
 182 #define SR_BATMON_OK            0x11, 0x20, 5
 183 #define SR_RESERVED_11_1        0x11, 0xc0, 6
 184 #define RG_XOSC_CTRL    (0x12)
 185 #define SR_XTAL_TRIM            0x12, 0x0f, 0
 186 #define SR_XTAL_MODE            0x12, 0xf0, 4
 187 #define RG_RX_SYN       (0x15)
 188 #define SR_RX_PDT_LEVEL         0x15, 0x0f, 0
 189 #define SR_RESERVED_15_2        0x15, 0x70, 4
 190 #define SR_RX_PDT_DIS           0x15, 0x80, 7
 191 #define RG_XAH_CTRL_1   (0x17)
 192 #define SR_RESERVED_17_8        0x17, 0x01, 0
 193 #define SR_AACK_PROM_MODE       0x17, 0x02, 1
 194 #define SR_AACK_ACK_TIME        0x17, 0x04, 2
 195 #define SR_RESERVED_17_5        0x17, 0x08, 3
 196 #define SR_AACK_UPLD_RES_FT     0x17, 0x10, 4
 197 #define SR_AACK_FLTR_RES_FT     0x17, 0x20, 5
 198 #define SR_CSMA_LBT_MODE        0x17, 0x40, 6
 199 #define SR_RESERVED_17_1        0x17, 0x80, 7
 200 #define RG_FTN_CTRL     (0x18)
 201 #define SR_RESERVED_18_2        0x18, 0x7f, 0
 202 #define SR_FTN_START            0x18, 0x80, 7
 203 #define RG_PLL_CF       (0x1a)
 204 #define SR_RESERVED_1a_2        0x1a, 0x7f, 0
 205 #define SR_PLL_CF_START         0x1a, 0x80, 7
 206 #define RG_PLL_DCU      (0x1b)
 207 #define SR_RESERVED_1b_3        0x1b, 0x3f, 0
 208 #define SR_RESERVED_1b_2        0x1b, 0x40, 6
 209 #define SR_PLL_DCU_START        0x1b, 0x80, 7
 210 #define RG_PART_NUM     (0x1c)
 211 #define SR_PART_NUM             0x1c, 0xff, 0
 212 #define RG_VERSION_NUM  (0x1d)
 213 #define SR_VERSION_NUM          0x1d, 0xff, 0
 214 #define RG_MAN_ID_0     (0x1e)
 215 #define SR_MAN_ID_0             0x1e, 0xff, 0
 216 #define RG_MAN_ID_1     (0x1f)
 217 #define SR_MAN_ID_1             0x1f, 0xff, 0
 218 #define RG_SHORT_ADDR_0 (0x20)
 219 #define SR_SHORT_ADDR_0         0x20, 0xff, 0
 220 #define RG_SHORT_ADDR_1 (0x21)
 221 #define SR_SHORT_ADDR_1         0x21, 0xff, 0
 222 #define RG_PAN_ID_0     (0x22)
 223 #define SR_PAN_ID_0             0x22, 0xff, 0
 224 #define RG_PAN_ID_1     (0x23)
 225 #define SR_PAN_ID_1             0x23, 0xff, 0
 226 #define RG_IEEE_ADDR_0  (0x24)
 227 #define SR_IEEE_ADDR_0          0x24, 0xff, 0
 228 #define RG_IEEE_ADDR_1  (0x25)
 229 #define SR_IEEE_ADDR_1          0x25, 0xff, 0
 230 #define RG_IEEE_ADDR_2  (0x26)
 231 #define SR_IEEE_ADDR_2          0x26, 0xff, 0
 232 #define RG_IEEE_ADDR_3  (0x27)
 233 #define SR_IEEE_ADDR_3          0x27, 0xff, 0
 234 #define RG_IEEE_ADDR_4  (0x28)
 235 #define SR_IEEE_ADDR_4          0x28, 0xff, 0
 236 #define RG_IEEE_ADDR_5  (0x29)
 237 #define SR_IEEE_ADDR_5          0x29, 0xff, 0
 238 #define RG_IEEE_ADDR_6  (0x2a)
 239 #define SR_IEEE_ADDR_6          0x2a, 0xff, 0
 240 #define RG_IEEE_ADDR_7  (0x2b)
 241 #define SR_IEEE_ADDR_7          0x2b, 0xff, 0
 242 #define RG_XAH_CTRL_0   (0x2c)
 243 #define SR_SLOTTED_OPERATION    0x2c, 0x01, 0
 244 #define SR_MAX_CSMA_RETRIES     0x2c, 0x0e, 1
 245 #define SR_MAX_FRAME_RETRIES    0x2c, 0xf0, 4
 246 #define RG_CSMA_SEED_0  (0x2d)
 247 #define SR_CSMA_SEED_0          0x2d, 0xff, 0
 248 #define RG_CSMA_SEED_1  (0x2e)
 249 #define SR_CSMA_SEED_1          0x2e, 0x07, 0
 250 #define SR_AACK_I_AM_COORD      0x2e, 0x08, 3
 251 #define SR_AACK_DIS_ACK         0x2e, 0x10, 4
 252 #define SR_AACK_SET_PD          0x2e, 0x20, 5
 253 #define SR_AACK_FVN_MODE        0x2e, 0xc0, 6
 254 #define RG_CSMA_BE      (0x2f)
 255 #define SR_MIN_BE               0x2f, 0x0f, 0
 256 #define SR_MAX_BE               0x2f, 0xf0, 4
 257
 258 #define CMD_REG         0x80
 259 #define CMD_REG_MASK    0x3f
 260 #define CMD_WRITE       0x40
 261 #define CMD_FB          0x20
 262
 263 #define IRQ_BAT_LOW     (1 << 7)
 264 #define IRQ_TRX_UR      (1 << 6)
 265 #define IRQ_AMI         (1 << 5)
 266 #define IRQ_CCA_ED      (1 << 4)
 267 #define IRQ_TRX_END     (1 << 3)
 268 #define IRQ_RX_START    (1 << 2)
 269 #define IRQ_PLL_UNL     (1 << 1)
 270 #define IRQ_PLL_LOCK    (1 << 0)
 271
 272 #define IRQ_ACTIVE_HIGH 0
 273 #define IRQ_ACTIVE_LOW  1
 274
 275 #define STATE_P_ON              0x00    /* BUSY */
 276 #define STATE_BUSY_RX           0x01
 277 #define STATE_BUSY_TX           0x02
 278 #define STATE_FORCE_TRX_OFF     0x03
 279 #define STATE_FORCE_TX_ON       0x04    /* IDLE */
 280 /* 0x05 */                              /* INVALID_PARAMETER */
 281 #define STATE_RX_ON             0x06
 282 /* 0x07 */                              /* SUCCESS */
 283 #define STATE_TRX_OFF           0x08
 284 #define STATE_TX_ON             0x09
 285 /* 0x0a - 0x0e */                       /* 0x0a - UNSUPPORTED_ATTRIBUTE */
 286 #define STATE_SLEEP             0x0F
 287 #define STATE_PREP_DEEP_SLEEP   0x10
 288 #define STATE_BUSY_RX_AACK      0x11
 289 #define STATE_BUSY_TX_ARET      0x12
 290 #define STATE_RX_AACK_ON        0x16
 291 #define STATE_TX_ARET_ON        0x19
 292 #define STATE_RX_ON_NOCLK       0x1C
 293 #define STATE_RX_AACK_ON_NOCLK  0x1D
 294 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
 295 #define STATE_TRANSITION_IN_PROGRESS 0x1F
 296
 297 #define TRX_STATE_MASK          (0x1F)
 298
 299 #define AT86RF2XX_NUMREGS 0x3F
 300
 301 static void
 302 at86rf230_async_state_change(struct at86rf230_local *lp,
 303                              struct at86rf230_state_change *ctx,
 304                              const u8 state, void (*complete)(void *context),
 305                              const bool irq_enable);
 306
 307 static inline int
 308 __at86rf230_write(struct at86rf230_local *lp,
 309                   unsigned int addr, unsigned int data)
 310 {
 311         return regmap_write(lp->regmap, addr, data);
 312 }
 313
 314 static inline int
 315 __at86rf230_read(struct at86rf230_local *lp,
 316                  unsigned int addr, unsigned int *data)
 317 {
 318         return regmap_read(lp->regmap, addr, data);
 319 }
 320
 321 static inline int
 322 at86rf230_read_subreg(struct at86rf230_local *lp,
 323                       unsigned int addr, unsigned int mask,
 324                       unsigned int shift, unsigned int *data)
 325 {
 326         int rc;
 327
 328         rc = __at86rf230_read(lp, addr, data);
 329         if (!rc)
 330                 *data = (*data & mask) >> shift;
 331
 332         return rc;
 333 }
 334
 335 static inline int
 336 at86rf230_write_subreg(struct at86rf230_local *lp,
 337                        unsigned int addr, unsigned int mask,
 338                        unsigned int shift, unsigned int data)
 339 {
 340         return regmap_update_bits(lp->regmap, addr, mask, data << shift);
 341 }
 342
 343 static inline void
 344 at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
 345 {
 346         gpio_set_value(lp->slp_tr, 1);
 347         udelay(1);
 348         gpio_set_value(lp->slp_tr, 0);
 349 }
 350
 351 static bool
 352 at86rf230_reg_writeable(struct device *dev, unsigned int reg)
 353 {
 354         switch (reg) {
 355         case RG_TRX_STATE:
 356         case RG_TRX_CTRL_0:
 357         case RG_TRX_CTRL_1:
 358         case RG_PHY_TX_PWR:
 359         case RG_PHY_ED_LEVEL:
 360         case RG_PHY_CC_CCA:
 361         case RG_CCA_THRES:
 362         case RG_RX_CTRL:
 363         case RG_SFD_VALUE:
 364         case RG_TRX_CTRL_2:
 365         case RG_ANT_DIV:
 366         case RG_IRQ_MASK:
 367         case RG_VREG_CTRL:
 368         case RG_BATMON:
 369         case RG_XOSC_CTRL:
 370         case RG_RX_SYN:
 371         case RG_XAH_CTRL_1:
 372         case RG_FTN_CTRL:
 373         case RG_PLL_CF:
 374         case RG_PLL_DCU:
 375         case RG_SHORT_ADDR_0:
 376         case RG_SHORT_ADDR_1:
 377         case RG_PAN_ID_0:
 378         case RG_PAN_ID_1:
 379         case RG_IEEE_ADDR_0:
 380         case RG_IEEE_ADDR_1:
 381         case RG_IEEE_ADDR_2:
 382         case RG_IEEE_ADDR_3:
 383         case RG_IEEE_ADDR_4:
 384         case RG_IEEE_ADDR_5:
 385         case RG_IEEE_ADDR_6:
 386         case RG_IEEE_ADDR_7:
 387         case RG_XAH_CTRL_0:
 388         case RG_CSMA_SEED_0:
 389         case RG_CSMA_SEED_1:
 390         case RG_CSMA_BE:
 391                 return true;
 392         default:
 393                 return false;
 394         }
 395 }
 396
 397 static bool
 398 at86rf230_reg_readable(struct device *dev, unsigned int reg)
 399 {
 400         bool rc;
 401
 402         /* all writeable are also readable */
 403         rc = at86rf230_reg_writeable(dev, reg);
 404         if (rc)
 405                 return rc;
 406
 407         /* readonly regs */
 408         switch (reg) {
 409         case RG_TRX_STATUS:
 410         case RG_PHY_RSSI:
 411         case RG_IRQ_STATUS:
 412         case RG_PART_NUM:
 413         case RG_VERSION_NUM:
 414         case RG_MAN_ID_1:
 415         case RG_MAN_ID_0:
 416                 return true;
 417         default:
 418                 return false;
 419         }
 420 }
 421
 422 static bool
 423 at86rf230_reg_volatile(struct device *dev, unsigned int reg)
 424 {
 425         /* can be changed during runtime */
 426         switch (reg) {
 427         case RG_TRX_STATUS:
 428         case RG_TRX_STATE:
 429         case RG_PHY_RSSI:
 430         case RG_PHY_ED_LEVEL:
 431         case RG_IRQ_STATUS:
 432         case RG_VREG_CTRL:
 433         case RG_PLL_CF:
 434         case RG_PLL_DCU:
 435                 return true;
 436         default:
 437                 return false;
 438         }
 439 }
 440
 441 static bool
 442 at86rf230_reg_precious(struct device *dev, unsigned int reg)
 443 {
 444         /* don't clear irq line on read */
 445         switch (reg) {
 446         case RG_IRQ_STATUS:
 447                 return true;
 448         default:
 449                 return false;
 450         }
 451 }
 452
 453 static const struct regmap_config at86rf230_regmap_spi_config = {
 454         .reg_bits = 8,
 455         .val_bits = 8,
 456         .write_flag_mask = CMD_REG | CMD_WRITE,
 457         .read_flag_mask = CMD_REG,
 458         .cache_type = REGCACHE_RBTREE,
 459         .max_register = AT86RF2XX_NUMREGS,
 460         .writeable_reg = at86rf230_reg_writeable,
 461         .readable_reg = at86rf230_reg_readable,
 462         .volatile_reg = at86rf230_reg_volatile,
 463         .precious_reg = at86rf230_reg_precious,
 464 };
 465
 466 static void
 467 at86rf230_async_error_recover(void *context)
 468 {
 469         struct at86rf230_state_change *ctx = context;
 470         struct at86rf230_local *lp = ctx->lp;
 471
 472         lp->is_tx = 0;
 473         at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL, false);
 474         ieee802154_wake_queue(lp->hw);
 475 }
 476
 477 static inline void
 478 at86rf230_async_error(struct at86rf230_local *lp,
 479                       struct at86rf230_state_change *ctx, int rc)
 480 {
 481         dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
 482
 483         at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
 484                                      at86rf230_async_error_recover, false);
 485 }
 486
 487 /* Generic function to get some register value in async mode */
 488 static void
 489 at86rf230_async_read_reg(struct at86rf230_local *lp, const u8 reg,
 490                          struct at86rf230_state_change *ctx,
 491                          void (*complete)(void *context),
 492                          const bool irq_enable)
 493 {
 494         int rc;
 495
 496         u8 *tx_buf = ctx->buf;
 497
 498         tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
 499         ctx->msg.complete = complete;
 500         ctx->irq_enable = irq_enable;
 501         rc = spi_async(lp->spi, &ctx->msg);
 502         if (rc) {
 503                 if (irq_enable)
 504                         enable_irq(ctx->irq);
 505
 506                 at86rf230_async_error(lp, ctx, rc);
 507         }
 508 }
 509
 510 static inline u8 at86rf230_state_to_force(u8 state)
 511 {
 512         if (state == STATE_TX_ON)
 513                 return STATE_FORCE_TX_ON;
 514         else
 515                 return STATE_FORCE_TRX_OFF;
 516 }
 517
 518 static void
 519 at86rf230_async_state_assert(void *context)
 520 {
 521         struct at86rf230_state_change *ctx = context;
 522         struct at86rf230_local *lp = ctx->lp;
 523         const u8 *buf = ctx->buf;
 524         const u8 trx_state = buf[1] & TRX_STATE_MASK;
 525
 526         /* Assert state change */
 527         if (trx_state != ctx->to_state) {
 528                 /* Special handling if transceiver state is in
 529                  * STATE_BUSY_RX_AACK and a SHR was detected.
 530                  */
 531                 if  (trx_state == STATE_BUSY_RX_AACK) {
 532                         /* Undocumented race condition. If we send a state
 533                          * change to STATE_RX_AACK_ON the transceiver could
 534                          * change his state automatically to STATE_BUSY_RX_AACK
 535                          * if a SHR was detected. This is not an error, but we
 536                          * can't assert this.
 537                          */
 538                         if (ctx->to_state == STATE_RX_AACK_ON)
 539                                 goto done;
 540
 541                         /* If we change to STATE_TX_ON without forcing and
 542                          * transceiver state is STATE_BUSY_RX_AACK, we wait
 543                          * 'tFrame + tPAck' receiving time. In this time the
 544                          * PDU should be received. If the transceiver is still
 545                          * in STATE_BUSY_RX_AACK, we run a force state change
 546                          * to STATE_TX_ON. This is a timeout handling, if the
 547                          * transceiver stucks in STATE_BUSY_RX_AACK.
 548                          *
 549                          * Additional we do several retries to try to get into
 550                          * TX_ON state without forcing. If the retries are
 551                          * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
 552                          * will do a force change.
 553                          */
 554                         if (ctx->to_state == STATE_TX_ON ||
 555                             ctx->to_state == STATE_TRX_OFF) {
 556                                 u8 state = ctx->to_state;
 557
 558                                 if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
 559                                         state = at86rf230_state_to_force(state);
 560                                 lp->tx_retry++;
 561
 562                                 at86rf230_async_state_change(lp, ctx, state,
 563                                                              ctx->complete,
 564                                                              ctx->irq_enable);
 565                                 return;
 566                         }
 567                 }
 568
 569                 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
 570                          ctx->from_state, ctx->to_state, trx_state);
 571         }
 572
 573 done:
 574         if (ctx->complete)
 575                 ctx->complete(context);
 576 }
 577
 578 static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
 579 {
 580         struct at86rf230_state_change *ctx =
 581                 container_of(timer, struct at86rf230_state_change, timer);
 582         struct at86rf230_local *lp = ctx->lp;
 583
 584         at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
 585                                  at86rf230_async_state_assert,
 586                                  ctx->irq_enable);
 587
 588         return HRTIMER_NORESTART;
 589 }
 590
 591 /* Do state change timing delay. */
 592 static void
 593 at86rf230_async_state_delay(void *context)
 594 {
 595         struct at86rf230_state_change *ctx = context;
 596         struct at86rf230_local *lp = ctx->lp;
 597         struct at86rf2xx_chip_data *c = lp->data;
 598         bool force = false;
 599         ktime_t tim;
 600
 601         /* The force state changes are will show as normal states in the
 602          * state status subregister. We change the to_state to the
 603          * corresponding one and remember if it was a force change, this
 604          * differs if we do a state change from STATE_BUSY_RX_AACK.
 605          */
 606         switch (ctx->to_state) {
 607         case STATE_FORCE_TX_ON:
 608                 ctx->to_state = STATE_TX_ON;
 609                 force = true;
 610                 break;
 611         case STATE_FORCE_TRX_OFF:
 612                 ctx->to_state = STATE_TRX_OFF;
 613                 force = true;
 614                 break;
 615         default:
 616                 break;
 617         }
 618
 619         switch (ctx->from_state) {
 620         case STATE_TRX_OFF:
 621                 switch (ctx->to_state) {
 622                 case STATE_RX_AACK_ON:
 623                         tim = ktime_set(0, c->t_off_to_aack * NSEC_PER_USEC);
 624                         /* state change from TRX_OFF to RX_AACK_ON to do a
 625                          * calibration, we need to reset the timeout for the
 626                          * next one.
 627                          */
 628                         lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
 629                         goto change;
 630                 case STATE_TX_ARET_ON:
 631                 case STATE_TX_ON:
 632                         tim = ktime_set(0, c->t_off_to_tx_on * NSEC_PER_USEC);
 633                         /* state change from TRX_OFF to TX_ON or ARET_ON to do
 634                          * a calibration, we need to reset the timeout for the
 635                          * next one.
 636                          */
 637                         lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
 638                         goto change;
 639                 default:
 640                         break;
 641                 }
 642                 break;
 643         case STATE_BUSY_RX_AACK:
 644                 switch (ctx->to_state) {
 645                 case STATE_TRX_OFF:
 646                 case STATE_TX_ON:
 647                         /* Wait for worst case receiving time if we
 648                          * didn't make a force change from BUSY_RX_AACK
 649                          * to TX_ON or TRX_OFF.
 650                          */
 651                         if (!force) {
 652                                 tim = ktime_set(0, (c->t_frame + c->t_p_ack) *
 653                                                    NSEC_PER_USEC);
 654                                 goto change;
 655                         }
 656                         break;
 657                 default:
 658                         break;
 659                 }
 660                 break;
 661         /* Default value, means RESET state */
 662         case STATE_P_ON:
 663                 switch (ctx->to_state) {
 664                 case STATE_TRX_OFF:
 665                         tim = ktime_set(0, c->t_reset_to_off * NSEC_PER_USEC);
 666                         goto change;
 667                 default:
 668                         break;
 669                 }
 670                 break;
 671         default:
 672                 break;
 673         }
 674
 675         /* Default delay is 1us in the most cases */
 676         tim = ktime_set(0, NSEC_PER_USEC);
 677
 678 change:
 679         hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
 680 }
 681
 682 static void
 683 at86rf230_async_state_change_start(void *context)
 684 {
 685         struct at86rf230_state_change *ctx = context;
 686         struct at86rf230_local *lp = ctx->lp;
 687         u8 *buf = ctx->buf;
 688         const u8 trx_state = buf[1] & TRX_STATE_MASK;
 689         int rc;
 690
 691         /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
 692         if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
 693                 udelay(1);
 694                 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
 695                                          at86rf230_async_state_change_start,
 696                                          ctx->irq_enable);
 697                 return;
 698         }
 699
 700         /* Check if we already are in the state which we change in */
 701         if (trx_state == ctx->to_state) {
 702                 if (ctx->complete)
 703                         ctx->complete(context);
 704                 return;
 705         }
 706
 707         /* Set current state to the context of state change */
 708         ctx->from_state = trx_state;
 709
 710         /* Going into the next step for a state change which do a timing
 711          * relevant delay.
 712          */
 713         buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
 714         buf[1] = ctx->to_state;
 715         ctx->msg.complete = at86rf230_async_state_delay;
 716         rc = spi_async(lp->spi, &ctx->msg);
 717         if (rc) {
 718                 if (ctx->irq_enable)
 719                         enable_irq(ctx->irq);
 720
 721                 at86rf230_async_error(lp, ctx, rc);
 722         }
 723 }
 724
 725 static void
 726 at86rf230_async_state_change(struct at86rf230_local *lp,
 727                              struct at86rf230_state_change *ctx,
 728                              const u8 state, void (*complete)(void *context),
 729                              const bool irq_enable)
 730 {
 731         /* Initialization for the state change context */
 732         ctx->to_state = state;
 733         ctx->complete = complete;
 734         ctx->irq_enable = irq_enable;
 735         at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
 736                                  at86rf230_async_state_change_start,
 737                                  irq_enable);
 738 }
 739
 740 static void
 741 at86rf230_sync_state_change_complete(void *context)
 742 {
 743         struct at86rf230_state_change *ctx = context;
 744         struct at86rf230_local *lp = ctx->lp;
 745
 746         complete(&lp->state_complete);
 747 }
 748
 749 /* This function do a sync framework above the async state change.
 750  * Some callbacks of the IEEE 802.15.4 driver interface need to be
 751  * handled synchronously.
 752  */
 753 static int
 754 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
 755 {
 756         unsigned long rc;
 757
 758         at86rf230_async_state_change(lp, &lp->state, state,
 759                                      at86rf230_sync_state_change_complete,
 760                                      false);
 761
 762         rc = wait_for_completion_timeout(&lp->state_complete,
 763                                          msecs_to_jiffies(100));
 764         if (!rc) {
 765                 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
 766                 return -ETIMEDOUT;
 767         }
 768
 769         return 0;
 770 }
 771
 772 static void
 773 at86rf230_tx_complete(void *context)
 774 {
 775         struct at86rf230_state_change *ctx = context;
 776         struct at86rf230_local *lp = ctx->lp;
 777
 778         enable_irq(ctx->irq);
 779
 780         ieee802154_xmit_complete(lp->hw, lp->tx_skb, !lp->tx_aret);
 781 }
 782
 783 static void
 784 at86rf230_tx_on(void *context)
 785 {
 786         struct at86rf230_state_change *ctx = context;
 787         struct at86rf230_local *lp = ctx->lp;
 788
 789         at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
 790                                      at86rf230_tx_complete, true);
 791 }
 792
 793 static void
 794 at86rf230_tx_trac_check(void *context)
 795 {
 796         struct at86rf230_state_change *ctx = context;
 797         struct at86rf230_local *lp = ctx->lp;
 798         const u8 *buf = ctx->buf;
 799         const u8 trac = (buf[1] & 0xe0) >> 5;
 800
 801         /* If trac status is different than zero we need to do a state change
 802          * to STATE_FORCE_TRX_OFF then STATE_RX_AACK_ON to recover the
 803          * transceiver.
 804          */
 805         if (trac)
 806                 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
 807                                              at86rf230_tx_on, true);
 808         else
 809                 at86rf230_tx_on(context);
 810 }
 811
 812 static void
 813 at86rf230_tx_trac_status(void *context)
 814 {
 815         struct at86rf230_state_change *ctx = context;
 816         struct at86rf230_local *lp = ctx->lp;
 817
 818         at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
 819                                  at86rf230_tx_trac_check, true);
 820 }
 821
 822 static void
 823 at86rf230_rx_read_frame_complete(void *context)
 824 {
 825         struct at86rf230_state_change *ctx = context;
 826         struct at86rf230_local *lp = ctx->lp;
 827         u8 rx_local_buf[AT86RF2XX_MAX_BUF];
 828         const u8 *buf = ctx->buf;
 829         struct sk_buff *skb;
 830         u8 len, lqi;
 831
 832         len = buf[1];
 833         if (!ieee802154_is_valid_psdu_len(len)) {
 834                 dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
 835                 len = IEEE802154_MTU;
 836         }
 837         lqi = buf[2 + len];
 838
 839         memcpy(rx_local_buf, buf + 2, len);
 840         ctx->trx.len = 2;
 841         enable_irq(ctx->irq);
 842
 843         skb = dev_alloc_skb(IEEE802154_MTU);
 844         if (!skb) {
 845                 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
 846                 return;
 847         }
 848
 849         memcpy(skb_put(skb, len), rx_local_buf, len);
 850         ieee802154_rx_irqsafe(lp->hw, skb, lqi);
 851 }
 852
 853 static void
 854 at86rf230_rx_read_frame(void *context)
 855 {
 856         struct at86rf230_state_change *ctx = context;
 857         struct at86rf230_local *lp = ctx->lp;
 858         u8 *buf = ctx->buf;
 859         int rc;
 860
 861         buf[0] = CMD_FB;
 862         ctx->trx.len = AT86RF2XX_MAX_BUF;
 863         ctx->msg.complete = at86rf230_rx_read_frame_complete;
 864         rc = spi_async(lp->spi, &ctx->msg);
 865         if (rc) {
 866                 ctx->trx.len = 2;
 867                 enable_irq(ctx->irq);
 868                 at86rf230_async_error(lp, ctx, rc);
 869         }
 870 }
 871
 872 static void
 873 at86rf230_rx_trac_check(void *context)
 874 {
 875         /* Possible check on trac status here. This could be useful to make
 876          * some stats why receive is failed. Not used at the moment, but it's
 877          * maybe timing relevant. Datasheet doesn't say anything about this.
 878          * The programming guide say do it so.
 879          */
 880
 881         at86rf230_rx_read_frame(context);
 882 }
 883
 884 static void
 885 at86rf230_irq_trx_end(struct at86rf230_local *lp)
 886 {
 887         if (lp->is_tx) {
 888                 lp->is_tx = 0;
 889
 890                 if (lp->tx_aret)
 891                         at86rf230_async_state_change(lp, &lp->irq,
 892                                                      STATE_FORCE_TX_ON,
 893                                                      at86rf230_tx_trac_status,
 894                                                      true);
 895                 else
 896                         at86rf230_async_state_change(lp, &lp->irq,
 897                                                      STATE_RX_AACK_ON,
 898                                                      at86rf230_tx_complete,
 899                                                      true);
 900         } else {
 901                 at86rf230_async_read_reg(lp, RG_TRX_STATE, &lp->irq,
 902                                          at86rf230_rx_trac_check, true);
 903         }
 904 }
 905
 906 static void
 907 at86rf230_irq_status(void *context)
 908 {
 909         struct at86rf230_state_change *ctx = context;
 910         struct at86rf230_local *lp = ctx->lp;
 911         const u8 *buf = ctx->buf;
 912         const u8 irq = buf[1];
 913
 914         if (irq & IRQ_TRX_END) {
 915                 at86rf230_irq_trx_end(lp);
 916         } else {
 917                 enable_irq(ctx->irq);
 918                 dev_err(&lp->spi->dev, "not supported irq %02x received\n",
 919                         irq);
 920         }
 921 }
 922
 923 static irqreturn_t at86rf230_isr(int irq, void *data)
 924 {
 925         struct at86rf230_local *lp = data;
 926         struct at86rf230_state_change *ctx = &lp->irq;
 927         u8 *buf = ctx->buf;
 928         int rc;
 929
 930         disable_irq_nosync(irq);
 931
 932         buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
 933         ctx->msg.complete = at86rf230_irq_status;
 934         rc = spi_async(lp->spi, &ctx->msg);
 935         if (rc) {
 936                 enable_irq(irq);
 937                 at86rf230_async_error(lp, ctx, rc);
 938                 return IRQ_NONE;
 939         }
 940
 941         return IRQ_HANDLED;
 942 }
 943
 944 static void
 945 at86rf230_write_frame_complete(void *context)
 946 {
 947         struct at86rf230_state_change *ctx = context;
 948         struct at86rf230_local *lp = ctx->lp;
 949         u8 *buf = ctx->buf;
 950         int rc;
 951
 952         ctx->trx.len = 2;
 953
 954         if (gpio_is_valid(lp->slp_tr)) {
 955                 at86rf230_slp_tr_rising_edge(lp);
 956         } else {
 957                 buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
 958                 buf[1] = STATE_BUSY_TX;
 959                 ctx->msg.complete = NULL;
 960                 rc = spi_async(lp->spi, &ctx->msg);
 961                 if (rc)
 962                         at86rf230_async_error(lp, ctx, rc);
 963         }
 964 }
 965
 966 static void
 967 at86rf230_write_frame(void *context)
 968 {
 969         struct at86rf230_state_change *ctx = context;
 970         struct at86rf230_local *lp = ctx->lp;
 971         struct sk_buff *skb = lp->tx_skb;
 972         u8 *buf = ctx->buf;
 973         int rc;
 974
 975         lp->is_tx = 1;
 976
 977         buf[0] = CMD_FB | CMD_WRITE;
 978         buf[1] = skb->len + 2;
 979         memcpy(buf + 2, skb->data, skb->len);
 980         ctx->trx.len = skb->len + 2;
 981         ctx->msg.complete = at86rf230_write_frame_complete;
 982         rc = spi_async(lp->spi, &ctx->msg);
 983         if (rc) {
 984                 ctx->trx.len = 2;
 985                 at86rf230_async_error(lp, ctx, rc);
 986         }
 987 }
 988
 989 static void
 990 at86rf230_xmit_tx_on(void *context)
 991 {
 992         struct at86rf230_state_change *ctx = context;
 993         struct at86rf230_local *lp = ctx->lp;
 994
 995         at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
 996                                      at86rf230_write_frame, false);
 997 }
 998
 999 static void
1000 at86rf230_xmit_start(void *context)
1001 {
1002         struct at86rf230_state_change *ctx = context;
1003         struct at86rf230_local *lp = ctx->lp;
1004
1005         /* In ARET mode we need to go into STATE_TX_ARET_ON after we
1006          * are in STATE_TX_ON. The pfad differs here, so we change
1007          * the complete handler.
1008          */
1009         if (lp->tx_aret) {
1010                 if (lp->is_tx_from_off) {
1011                         lp->is_tx_from_off = false;
1012                         at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
1013                                                      at86rf230_xmit_tx_on,
1014                                                      false);
1015                 } else {
1016                         at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
1017                                                      at86rf230_xmit_tx_on,
1018                                                      false);
1019                 }
1020         } else {
1021                 at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
1022                                              at86rf230_write_frame, false);
1023         }
1024 }
1025
1026 static int
1027 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
1028 {
1029         struct at86rf230_local *lp = hw->priv;
1030         struct at86rf230_state_change *ctx = &lp->tx;
1031
1032         lp->tx_skb = skb;
1033         lp->tx_retry = 0;
1034
1035         /* After 5 minutes in PLL and the same frequency we run again the
1036          * calibration loops which is recommended by at86rf2xx datasheets.
1037          *
1038          * The calibration is initiate by a state change from TRX_OFF
1039          * to TX_ON, the lp->cal_timeout should be reinit by state_delay
1040          * function then to start in the next 5 minutes.
1041          */
1042         if (time_is_before_jiffies(lp->cal_timeout)) {
1043                 lp->is_tx_from_off = true;
1044                 at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
1045                                              at86rf230_xmit_start, false);
1046         } else {
1047                 at86rf230_xmit_start(ctx);
1048         }
1049
1050         return 0;
1051 }
1052
1053 static int
1054 at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
1055 {
1056         BUG_ON(!level);
1057         *level = 0xbe;
1058         return 0;
1059 }
1060
1061 static int
1062 at86rf230_start(struct ieee802154_hw *hw)
1063 {
1064         return at86rf230_sync_state_change(hw->priv, STATE_RX_AACK_ON);
1065 }
1066
1067 static void
1068 at86rf230_stop(struct ieee802154_hw *hw)
1069 {
1070         at86rf230_sync_state_change(hw->priv, STATE_FORCE_TRX_OFF);
1071 }
1072
1073 static int
1074 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1075 {
1076         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1077 }
1078
1079 static int
1080 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1081 {
1082         int rc;
1083
1084         if (channel == 0)
1085                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1086         else
1087                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1088         if (rc < 0)
1089                 return rc;
1090
1091         if (page == 0) {
1092                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1093                 lp->data->rssi_base_val = -100;
1094         } else {
1095                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1096                 lp->data->rssi_base_val = -98;
1097         }
1098         if (rc < 0)
1099                 return rc;
1100
1101         /* This sets the symbol_duration according frequency on the 212.
1102          * TODO move this handling while set channel and page in cfg802154.
1103          * We can do that, this timings are according 802.15.4 standard.
1104          * If we do that in cfg802154, this is a more generic calculation.
1105          *
1106          * This should also protected from ifs_timer. Means cancel timer and
1107          * init with a new value. For now, this is okay.
1108          */
1109         if (channel == 0) {
1110                 if (page == 0) {
1111                         /* SUB:0 and BPSK:0 -> BPSK-20 */
1112                         lp->hw->phy->symbol_duration = 50;
1113                 } else {
1114                         /* SUB:1 and BPSK:0 -> BPSK-40 */
1115                         lp->hw->phy->symbol_duration = 25;
1116                 }
1117         } else {
1118                 if (page == 0)
1119                         /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
1120                         lp->hw->phy->symbol_duration = 40;
1121                 else
1122                         /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1123                         lp->hw->phy->symbol_duration = 16;
1124         }
1125
1126         lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
1127                                    lp->hw->phy->symbol_duration;
1128         lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
1129                                    lp->hw->phy->symbol_duration;
1130
1131         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1132 }
1133
1134 static int
1135 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1136 {
1137         struct at86rf230_local *lp = hw->priv;
1138         int rc;
1139
1140         rc = lp->data->set_channel(lp, page, channel);
1141         /* Wait for PLL */
1142         usleep_range(lp->data->t_channel_switch,
1143                      lp->data->t_channel_switch + 10);
1144
1145         lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
1146         return rc;
1147 }
1148
1149 static int
1150 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1151                            struct ieee802154_hw_addr_filt *filt,
1152                            unsigned long changed)
1153 {
1154         struct at86rf230_local *lp = hw->priv;
1155
1156         if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1157                 u16 addr = le16_to_cpu(filt->short_addr);
1158
1159                 dev_vdbg(&lp->spi->dev,
1160                          "at86rf230_set_hw_addr_filt called for saddr\n");
1161                 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1162                 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1163         }
1164
1165         if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1166                 u16 pan = le16_to_cpu(filt->pan_id);
1167
1168                 dev_vdbg(&lp->spi->dev,
1169                          "at86rf230_set_hw_addr_filt called for pan id\n");
1170                 __at86rf230_write(lp, RG_PAN_ID_0, pan);
1171                 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1172         }
1173
1174         if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1175                 u8 i, addr[8];
1176
1177                 memcpy(addr, &filt->ieee_addr, 8);
1178                 dev_vdbg(&lp->spi->dev,
1179                          "at86rf230_set_hw_addr_filt called for IEEE addr\n");
1180                 for (i = 0; i < 8; i++)
1181                         __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1182         }
1183
1184         if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1185                 dev_vdbg(&lp->spi->dev,
1186                          "at86rf230_set_hw_addr_filt called for panc change\n");
1187                 if (filt->pan_coord)
1188                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1189                 else
1190                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1191         }
1192
1193         return 0;
1194 }
1195
1196 static int
1197 at86rf230_set_txpower(struct ieee802154_hw *hw, s8 db)
1198 {
1199         struct at86rf230_local *lp = hw->priv;
1200
1201         /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
1202          * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
1203          * 0dB.
1204          * thus, supported values for db range from -26 to 5, for 31dB of
1205          * reduction to 0dB of reduction.
1206          */
1207         if (db > 5 || db < -26)
1208                 return -EINVAL;
1209
1210         db = -(db - 5);
1211
1212         return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
1213 }
1214
1215 static int
1216 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1217 {
1218         struct at86rf230_local *lp = hw->priv;
1219
1220         return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1221 }
1222
1223 static int
1224 at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1225                        const struct wpan_phy_cca *cca)
1226 {
1227         struct at86rf230_local *lp = hw->priv;
1228         u8 val;
1229
1230         /* mapping 802.15.4 to driver spec */
1231         switch (cca->mode) {
1232         case NL802154_CCA_ENERGY:
1233                 val = 1;
1234                 break;
1235         case NL802154_CCA_CARRIER:
1236                 val = 2;
1237                 break;
1238         case NL802154_CCA_ENERGY_CARRIER:
1239                 switch (cca->opt) {
1240                 case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1241                         val = 3;
1242                         break;
1243                 case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1244                         val = 0;
1245                         break;
1246                 default:
1247                         return -EINVAL;
1248                 }
1249                 break;
1250         default:
1251                 return -EINVAL;
1252         }
1253
1254         return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1255 }
1256
1257 static int
1258 at86rf212_get_desens_steps(struct at86rf230_local *lp, s32 level)
1259 {
1260         return (level - lp->data->rssi_base_val) * 100 / 207;
1261 }
1262
1263 static int
1264 at86rf23x_get_desens_steps(struct at86rf230_local *lp, s32 level)
1265 {
1266         return (level - lp->data->rssi_base_val) / 2;
1267 }
1268
1269 static int
1270 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 level)
1271 {
1272         struct at86rf230_local *lp = hw->priv;
1273
1274         if (level < lp->data->rssi_base_val || level > 30)
1275                 return -EINVAL;
1276
1277         return at86rf230_write_subreg(lp, SR_CCA_ED_THRES,
1278                                       lp->data->get_desense_steps(lp, level));
1279 }
1280
1281 static int
1282 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1283                           u8 retries)
1284 {
1285         struct at86rf230_local *lp = hw->priv;
1286         int rc;
1287
1288         rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1289         if (rc)
1290                 return rc;
1291
1292         rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1293         if (rc)
1294                 return rc;
1295
1296         return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1297 }
1298
1299 static int
1300 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1301 {
1302         struct at86rf230_local *lp = hw->priv;
1303         int rc = 0;
1304
1305         lp->tx_aret = retries >= 0;
1306         lp->max_frame_retries = retries;
1307
1308         if (retries >= 0)
1309                 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1310
1311         return rc;
1312 }
1313
1314 static int
1315 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1316 {
1317         struct at86rf230_local *lp = hw->priv;
1318         int rc;
1319
1320         if (on) {
1321                 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1322                 if (rc < 0)
1323                         return rc;
1324
1325                 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1326                 if (rc < 0)
1327                         return rc;
1328         } else {
1329                 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1330                 if (rc < 0)
1331                         return rc;
1332
1333                 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1334                 if (rc < 0)
1335                         return rc;
1336         }
1337
1338         return 0;
1339 }
1340
1341 static const struct ieee802154_ops at86rf230_ops = {
1342         .owner = THIS_MODULE,
1343         .xmit_async = at86rf230_xmit,
1344         .ed = at86rf230_ed,
1345         .set_channel = at86rf230_channel,
1346         .start = at86rf230_start,
1347         .stop = at86rf230_stop,
1348         .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1349         .set_txpower = at86rf230_set_txpower,
1350         .set_lbt = at86rf230_set_lbt,
1351         .set_cca_mode = at86rf230_set_cca_mode,
1352         .set_cca_ed_level = at86rf230_set_cca_ed_level,
1353         .set_csma_params = at86rf230_set_csma_params,
1354         .set_frame_retries = at86rf230_set_frame_retries,
1355         .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1356 };
1357
1358 static struct at86rf2xx_chip_data at86rf233_data = {
1359         .t_sleep_cycle = 330,
1360         .t_channel_switch = 11,
1361         .t_reset_to_off = 26,
1362         .t_off_to_aack = 80,
1363         .t_off_to_tx_on = 80,
1364         .t_frame = 4096,
1365         .t_p_ack = 545,
1366         .rssi_base_val = -91,
1367         .set_channel = at86rf23x_set_channel,
1368         .get_desense_steps = at86rf23x_get_desens_steps
1369 };
1370
1371 static struct at86rf2xx_chip_data at86rf231_data = {
1372         .t_sleep_cycle = 330,
1373         .t_channel_switch = 24,
1374         .t_reset_to_off = 37,
1375         .t_off_to_aack = 110,
1376         .t_off_to_tx_on = 110,
1377         .t_frame = 4096,
1378         .t_p_ack = 545,
1379         .rssi_base_val = -91,
1380         .set_channel = at86rf23x_set_channel,
1381         .get_desense_steps = at86rf23x_get_desens_steps
1382 };
1383
1384 static struct at86rf2xx_chip_data at86rf212_data = {
1385         .t_sleep_cycle = 330,
1386         .t_channel_switch = 11,
1387         .t_reset_to_off = 26,
1388         .t_off_to_aack = 200,
1389         .t_off_to_tx_on = 200,
1390         .t_frame = 4096,
1391         .t_p_ack = 545,
1392         .rssi_base_val = -100,
1393         .set_channel = at86rf212_set_channel,
1394         .get_desense_steps = at86rf212_get_desens_steps
1395 };
1396
1397 static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
1398 {
1399         int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1400         unsigned int dvdd;
1401         u8 csma_seed[2];
1402
1403         rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1404         if (rc)
1405                 return rc;
1406
1407         irq_type = irq_get_trigger_type(lp->spi->irq);
1408         if (irq_type == IRQ_TYPE_EDGE_RISING ||
1409             irq_type == IRQ_TYPE_EDGE_FALLING)
1410                 dev_warn(&lp->spi->dev,
1411                          "Using edge triggered irq's are not recommended!\n");
1412         if (irq_type == IRQ_TYPE_EDGE_FALLING ||
1413             irq_type == IRQ_TYPE_LEVEL_LOW)
1414                 irq_pol = IRQ_ACTIVE_LOW;
1415
1416         rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1417         if (rc)
1418                 return rc;
1419
1420         rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1421         if (rc)
1422                 return rc;
1423
1424         rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1425         if (rc)
1426                 return rc;
1427
1428         /* reset values differs in at86rf231 and at86rf233 */
1429         rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
1430         if (rc)
1431                 return rc;
1432
1433         get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1434         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1435         if (rc)
1436                 return rc;
1437         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1438         if (rc)
1439                 return rc;
1440
1441         /* CLKM changes are applied immediately */
1442         rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1443         if (rc)
1444                 return rc;
1445
1446         /* Turn CLKM Off */
1447         rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1448         if (rc)
1449                 return rc;
1450         /* Wait the next SLEEP cycle */
1451         usleep_range(lp->data->t_sleep_cycle,
1452                      lp->data->t_sleep_cycle + 100);
1453
1454         /* xtal_trim value is calculated by:
1455          * CL = 0.5 * (CX + CTRIM + CPAR)
1456          *
1457          * whereas:
1458          * CL = capacitor of used crystal
1459          * CX = connected capacitors at xtal pins
1460          * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1461          *        but this is different on each board setup. You need to fine
1462          *        tuning this value via CTRIM.
1463          * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1464          *         0 pF upto 4.5 pF.
1465          *
1466          * Examples:
1467          * atben transceiver:
1468          *
1469          * CL = 8 pF
1470          * CX = 12 pF
1471          * CPAR = 3 pF (We assume the magic constant from datasheet)
1472          * CTRIM = 0.9 pF
1473          *
1474          * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1475          *
1476          * xtal_trim = 0x3
1477          *
1478          * openlabs transceiver:
1479          *
1480          * CL = 16 pF
1481          * CX = 22 pF
1482          * CPAR = 3 pF (We assume the magic constant from datasheet)
1483          * CTRIM = 4.5 pF
1484          *
1485          * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1486          *
1487          * xtal_trim = 0xf
1488          */
1489         rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
1490         if (rc)
1491                 return rc;
1492
1493         rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1494         if (rc)
1495                 return rc;
1496         if (!dvdd) {
1497                 dev_err(&lp->spi->dev, "DVDD error\n");
1498                 return -EINVAL;
1499         }
1500
1501         /* Force setting slotted operation bit to 0. Sometimes the atben
1502          * sets this bit and I don't know why. We set this always force
1503          * to zero while probing.
1504          */
1505         return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1506 }
1507
1508 static int
1509 at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
1510                     u8 *xtal_trim)
1511 {
1512         struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1513         int ret;
1514
1515         if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
1516                 if (!pdata)
1517                         return -ENOENT;
1518
1519                 *rstn = pdata->rstn;
1520                 *slp_tr = pdata->slp_tr;
1521                 *xtal_trim = pdata->xtal_trim;
1522                 return 0;
1523         }
1524
1525         *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1526         *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1527         ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
1528         if (ret < 0 && ret != -EINVAL)
1529                 return ret;
1530
1531         return 0;
1532 }
1533
1534 static int
1535 at86rf230_detect_device(struct at86rf230_local *lp)
1536 {
1537         unsigned int part, version, val;
1538         u16 man_id = 0;
1539         const char *chip;
1540         int rc;
1541
1542         rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1543         if (rc)
1544                 return rc;
1545         man_id |= val;
1546
1547         rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1548         if (rc)
1549                 return rc;
1550         man_id |= (val << 8);
1551
1552         rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1553         if (rc)
1554                 return rc;
1555
1556         rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1557         if (rc)
1558                 return rc;
1559
1560         if (man_id != 0x001f) {
1561                 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1562                         man_id >> 8, man_id & 0xFF);
1563                 return -EINVAL;
1564         }
1565
1566         lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM | IEEE802154_HW_AACK |
1567                         IEEE802154_HW_TXPOWER | IEEE802154_HW_ARET |
1568                         IEEE802154_HW_AFILT | IEEE802154_HW_PROMISCUOUS;
1569
1570         lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1571
1572         switch (part) {
1573         case 2:
1574                 chip = "at86rf230";
1575                 rc = -ENOTSUPP;
1576                 break;
1577         case 3:
1578                 chip = "at86rf231";
1579                 lp->data = &at86rf231_data;
1580                 lp->hw->phy->channels_supported[0] = 0x7FFF800;
1581                 lp->hw->phy->current_channel = 11;
1582                 lp->hw->phy->symbol_duration = 16;
1583                 break;
1584         case 7:
1585                 chip = "at86rf212";
1586                 lp->data = &at86rf212_data;
1587                 lp->hw->flags |= IEEE802154_HW_LBT;
1588                 lp->hw->phy->channels_supported[0] = 0x00007FF;
1589                 lp->hw->phy->channels_supported[2] = 0x00007FF;
1590                 lp->hw->phy->current_channel = 5;
1591                 lp->hw->phy->symbol_duration = 25;
1592                 break;
1593         case 11:
1594                 chip = "at86rf233";
1595                 lp->data = &at86rf233_data;
1596                 lp->hw->phy->channels_supported[0] = 0x7FFF800;
1597                 lp->hw->phy->current_channel = 13;
1598                 lp->hw->phy->symbol_duration = 16;
1599                 break;
1600         default:
1601                 chip = "unknown";
1602                 rc = -ENOTSUPP;
1603                 break;
1604         }
1605
1606         dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1607
1608         return rc;
1609 }
1610
1611 static void
1612 at86rf230_setup_spi_messages(struct at86rf230_local *lp)
1613 {
1614         lp->state.lp = lp;
1615         lp->state.irq = lp->spi->irq;
1616         spi_message_init(&lp->state.msg);
1617         lp->state.msg.context = &lp->state;
1618         lp->state.trx.len = 2;
1619         lp->state.trx.tx_buf = lp->state.buf;
1620         lp->state.trx.rx_buf = lp->state.buf;
1621         spi_message_add_tail(&lp->state.trx, &lp->state.msg);
1622         hrtimer_init(&lp->state.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1623         lp->state.timer.function = at86rf230_async_state_timer;
1624
1625         lp->irq.lp = lp;
1626         lp->irq.irq = lp->spi->irq;
1627         spi_message_init(&lp->irq.msg);
1628         lp->irq.msg.context = &lp->irq;
1629         lp->irq.trx.len = 2;
1630         lp->irq.trx.tx_buf = lp->irq.buf;
1631         lp->irq.trx.rx_buf = lp->irq.buf;
1632         spi_message_add_tail(&lp->irq.trx, &lp->irq.msg);
1633         hrtimer_init(&lp->irq.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1634         lp->irq.timer.function = at86rf230_async_state_timer;
1635
1636         lp->tx.lp = lp;
1637         lp->tx.irq = lp->spi->irq;
1638         spi_message_init(&lp->tx.msg);
1639         lp->tx.msg.context = &lp->tx;
1640         lp->tx.trx.len = 2;
1641         lp->tx.trx.tx_buf = lp->tx.buf;
1642         lp->tx.trx.rx_buf = lp->tx.buf;
1643         spi_message_add_tail(&lp->tx.trx, &lp->tx.msg);
1644         hrtimer_init(&lp->tx.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1645         lp->tx.timer.function = at86rf230_async_state_timer;
1646 }
1647
1648 static int at86rf230_probe(struct spi_device *spi)
1649 {
1650         struct ieee802154_hw *hw;
1651         struct at86rf230_local *lp;
1652         unsigned int status;
1653         int rc, irq_type, rstn, slp_tr;
1654         u8 xtal_trim = 0;
1655
1656         if (!spi->irq) {
1657                 dev_err(&spi->dev, "no IRQ specified\n");
1658                 return -EINVAL;
1659         }
1660
1661         rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
1662         if (rc < 0) {
1663                 dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
1664                 return rc;
1665         }
1666
1667         if (gpio_is_valid(rstn)) {
1668                 rc = devm_gpio_request_one(&spi->dev, rstn,
1669                                            GPIOF_OUT_INIT_HIGH, "rstn");
1670                 if (rc)
1671                         return rc;
1672         }
1673
1674         if (gpio_is_valid(slp_tr)) {
1675                 rc = devm_gpio_request_one(&spi->dev, slp_tr,
1676                                            GPIOF_OUT_INIT_LOW, "slp_tr");
1677                 if (rc)
1678                         return rc;
1679         }
1680
1681         /* Reset */
1682         if (gpio_is_valid(rstn)) {
1683                 udelay(1);
1684                 gpio_set_value(rstn, 0);
1685                 udelay(1);
1686                 gpio_set_value(rstn, 1);
1687                 usleep_range(120, 240);
1688         }
1689
1690         hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1691         if (!hw)
1692                 return -ENOMEM;
1693
1694         lp = hw->priv;
1695         lp->hw = hw;
1696         lp->spi = spi;
1697         lp->slp_tr = slp_tr;
1698         hw->parent = &spi->dev;
1699         hw->vif_data_size = sizeof(*lp);
1700         ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1701
1702         lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1703         if (IS_ERR(lp->regmap)) {
1704                 rc = PTR_ERR(lp->regmap);
1705                 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1706                         rc);
1707                 goto free_dev;
1708         }
1709
1710         at86rf230_setup_spi_messages(lp);
1711
1712         rc = at86rf230_detect_device(lp);
1713         if (rc < 0)
1714                 goto free_dev;
1715
1716         init_completion(&lp->state_complete);
1717
1718         spi_set_drvdata(spi, lp);
1719
1720         rc = at86rf230_hw_init(lp, xtal_trim);
1721         if (rc)
1722                 goto free_dev;
1723
1724         /* Read irq status register to reset irq line */
1725         rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1726         if (rc)
1727                 goto free_dev;
1728
1729         irq_type = irq_get_trigger_type(spi->irq);
1730         if (!irq_type)
1731                 irq_type = IRQF_TRIGGER_RISING;
1732
1733         rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1734                               IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1735         if (rc)
1736                 goto free_dev;
1737
1738         rc = ieee802154_register_hw(lp->hw);
1739         if (rc)
1740                 goto free_dev;
1741
1742         return rc;
1743
1744 free_dev:
1745         ieee802154_free_hw(lp->hw);
1746
1747         return rc;
1748 }
1749
1750 static int at86rf230_remove(struct spi_device *spi)
1751 {
1752         struct at86rf230_local *lp = spi_get_drvdata(spi);
1753
1754         /* mask all at86rf230 irq's */
1755         at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1756         ieee802154_unregister_hw(lp->hw);
1757         ieee802154_free_hw(lp->hw);
1758         dev_dbg(&spi->dev, "unregistered at86rf230\n");
1759
1760         return 0;
1761 }
1762
1763 static const struct of_device_id at86rf230_of_match[] = {
1764         { .compatible = "atmel,at86rf230", },
1765         { .compatible = "atmel,at86rf231", },
1766         { .compatible = "atmel,at86rf233", },
1767         { .compatible = "atmel,at86rf212", },
1768         { },
1769 };
1770 MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1771
1772 static const struct spi_device_id at86rf230_device_id[] = {
1773         { .name = "at86rf230", },
1774         { .name = "at86rf231", },
1775         { .name = "at86rf233", },
1776         { .name = "at86rf212", },
1777         { },
1778 };
1779 MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1780
1781 static struct spi_driver at86rf230_driver = {
1782         .id_table = at86rf230_device_id,
1783         .driver = {
1784                 .of_match_table = of_match_ptr(at86rf230_of_match),
1785                 .name   = "at86rf230",
1786                 .owner  = THIS_MODULE,
1787         },
1788         .probe      = at86rf230_probe,
1789         .remove     = at86rf230_remove,
1790 };
1791
1792 module_spi_driver(at86rf230_driver);
1793
1794 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1795 MODULE_LICENSE("GPL v2");