kernel/drivers/net/ethernet/mellanox/mlxsw/spectrum.c

   1 /*
   2  * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
   3  * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
   4  * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
   5  * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
   6  * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. Neither the names of the copyright holders nor the names of its
  17  *    contributors may be used to endorse or promote products derived from
  18  *    this software without specific prior written permission.
  19  *
  20  * Alternatively, this software may be distributed under the terms of the
  21  * GNU General Public License ("GPL") version 2 as published by the Free
  22  * Software Foundation.
  23  *
  24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  27  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  28  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  34  * POSSIBILITY OF SUCH DAMAGE.
  35  */
  36
  37 #include <linux/kernel.h>
  38 #include <linux/module.h>
  39 #include <linux/types.h>
  40 #include <linux/netdevice.h>
  41 #include <linux/etherdevice.h>
  42 #include <linux/ethtool.h>
  43 #include <linux/slab.h>
  44 #include <linux/device.h>
  45 #include <linux/skbuff.h>
  46 #include <linux/if_vlan.h>
  47 #include <linux/if_bridge.h>
  48 #include <linux/workqueue.h>
  49 #include <linux/jiffies.h>
  50 #include <linux/bitops.h>
  51 #include <net/switchdev.h>
  52 #include <generated/utsrelease.h>
  53
  54 #include "spectrum.h"
  55 #include "core.h"
  56 #include "reg.h"
  57 #include "port.h"
  58 #include "trap.h"
  59 #include "txheader.h"
  60
  61 static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
  62 static const char mlxsw_sp_driver_version[] = "1.0";
  63
  64 /* tx_hdr_version
  65  * Tx header version.
  66  * Must be set to 1.
  67  */
  68 MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
  69
  70 /* tx_hdr_ctl
  71  * Packet control type.
  72  * 0 - Ethernet control (e.g. EMADs, LACP)
  73  * 1 - Ethernet data
  74  */
  75 MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
  76
  77 /* tx_hdr_proto
  78  * Packet protocol type. Must be set to 1 (Ethernet).
  79  */
  80 MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
  81
  82 /* tx_hdr_rx_is_router
  83  * Packet is sent from the router. Valid for data packets only.
  84  */
  85 MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
  86
  87 /* tx_hdr_fid_valid
  88  * Indicates if the 'fid' field is valid and should be used for
  89  * forwarding lookup. Valid for data packets only.
  90  */
  91 MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
  92
  93 /* tx_hdr_swid
  94  * Switch partition ID. Must be set to 0.
  95  */
  96 MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
  97
  98 /* tx_hdr_control_tclass
  99  * Indicates if the packet should use the control TClass and not one
 100  * of the data TClasses.
 101  */
 102 MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
 103
 104 /* tx_hdr_etclass
 105  * Egress TClass to be used on the egress device on the egress port.
 106  */
 107 MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
 108
 109 /* tx_hdr_port_mid
 110  * Destination local port for unicast packets.
 111  * Destination multicast ID for multicast packets.
 112  *
 113  * Control packets are directed to a specific egress port, while data
 114  * packets are transmitted through the CPU port (0) into the switch partition,
 115  * where forwarding rules are applied.
 116  */
 117 MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
 118
 119 /* tx_hdr_fid
 120  * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
 121  * set, otherwise calculated based on the packet's VID using VID to FID mapping.
 122  * Valid for data packets only.
 123  */
 124 MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
 125
 126 /* tx_hdr_type
 127  * 0 - Data packets
 128  * 6 - Control packets
 129  */
 130 MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
 131
 132 static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
 133                                      const struct mlxsw_tx_info *tx_info)
 134 {
 135         char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
 136
 137         memset(txhdr, 0, MLXSW_TXHDR_LEN);
 138
 139         mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
 140         mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
 141         mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
 142         mlxsw_tx_hdr_swid_set(txhdr, 0);
 143         mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
 144         mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
 145         mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
 146 }
 147
 148 static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
 149 {
 150         char spad_pl[MLXSW_REG_SPAD_LEN];
 151         int err;
 152
 153         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
 154         if (err)
 155                 return err;
 156         mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
 157         return 0;
 158 }
 159
 160 static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
 161                                           bool is_up)
 162 {
 163         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 164         char paos_pl[MLXSW_REG_PAOS_LEN];
 165
 166         mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
 167                             is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
 168                             MLXSW_PORT_ADMIN_STATUS_DOWN);
 169         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
 170 }
 171
 172 static int mlxsw_sp_port_oper_status_get(struct mlxsw_sp_port *mlxsw_sp_port,
 173                                          bool *p_is_up)
 174 {
 175         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 176         char paos_pl[MLXSW_REG_PAOS_LEN];
 177         u8 oper_status;
 178         int err;
 179
 180         mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port, 0);
 181         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
 182         if (err)
 183                 return err;
 184         oper_status = mlxsw_reg_paos_oper_status_get(paos_pl);
 185         *p_is_up = oper_status == MLXSW_PORT_ADMIN_STATUS_UP ? true : false;
 186         return 0;
 187 }
 188
 189 static int mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp, u16 vfid)
 190 {
 191         char sfmr_pl[MLXSW_REG_SFMR_LEN];
 192         int err;
 193
 194         mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_CREATE_FID,
 195                             MLXSW_SP_VFID_BASE + vfid, 0);
 196         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
 197
 198         if (err)
 199                 return err;
 200
 201         set_bit(vfid, mlxsw_sp->active_vfids);
 202         return 0;
 203 }
 204
 205 static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp, u16 vfid)
 206 {
 207         char sfmr_pl[MLXSW_REG_SFMR_LEN];
 208
 209         clear_bit(vfid, mlxsw_sp->active_vfids);
 210
 211         mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_DESTROY_FID,
 212                             MLXSW_SP_VFID_BASE + vfid, 0);
 213         mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
 214 }
 215
 216 static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
 217                                       unsigned char *addr)
 218 {
 219         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 220         char ppad_pl[MLXSW_REG_PPAD_LEN];
 221
 222         mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
 223         mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
 224         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
 225 }
 226
 227 static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
 228 {
 229         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 230         unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
 231
 232         ether_addr_copy(addr, mlxsw_sp->base_mac);
 233         addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
 234         return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
 235 }
 236
 237 static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
 238                                        u16 vid, enum mlxsw_reg_spms_state state)
 239 {
 240         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 241         char *spms_pl;
 242         int err;
 243
 244         spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
 245         if (!spms_pl)
 246                 return -ENOMEM;
 247         mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
 248         mlxsw_reg_spms_vid_pack(spms_pl, vid, state);
 249         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
 250         kfree(spms_pl);
 251         return err;
 252 }
 253
 254 static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
 255 {
 256         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 257         char pmtu_pl[MLXSW_REG_PMTU_LEN];
 258         int max_mtu;
 259         int err;
 260
 261         mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
 262         mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
 263         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
 264         if (err)
 265                 return err;
 266         max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
 267
 268         if (mtu > max_mtu)
 269                 return -EINVAL;
 270
 271         mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
 272         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
 273 }
 274
 275 static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
 276 {
 277         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 278         char pspa_pl[MLXSW_REG_PSPA_LEN];
 279
 280         mlxsw_reg_pspa_pack(pspa_pl, swid, mlxsw_sp_port->local_port);
 281         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
 282 }
 283
 284 static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
 285                                      bool enable)
 286 {
 287         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 288         char svpe_pl[MLXSW_REG_SVPE_LEN];
 289
 290         mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
 291         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
 292 }
 293
 294 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
 295                                  enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
 296                                  u16 vid)
 297 {
 298         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 299         char svfa_pl[MLXSW_REG_SVFA_LEN];
 300
 301         mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
 302                             fid, vid);
 303         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
 304 }
 305
 306 static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
 307                                           u16 vid, bool learn_enable)
 308 {
 309         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 310         char *spvmlr_pl;
 311         int err;
 312
 313         spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
 314         if (!spvmlr_pl)
 315                 return -ENOMEM;
 316         mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
 317                               learn_enable);
 318         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
 319         kfree(spvmlr_pl);
 320         return err;
 321 }
 322
 323 static int
 324 mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
 325 {
 326         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 327         char sspr_pl[MLXSW_REG_SSPR_LEN];
 328
 329         mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
 330         return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
 331 }
 332
 333 static int mlxsw_sp_port_module_check(struct mlxsw_sp_port *mlxsw_sp_port,
 334                                       bool *p_usable)
 335 {
 336         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 337         char pmlp_pl[MLXSW_REG_PMLP_LEN];
 338         int err;
 339
 340         mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port);
 341         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
 342         if (err)
 343                 return err;
 344         *p_usable = mlxsw_reg_pmlp_width_get(pmlp_pl) ? true : false;
 345         return 0;
 346 }
 347
 348 static int mlxsw_sp_port_open(struct net_device *dev)
 349 {
 350         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 351         int err;
 352
 353         err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
 354         if (err)
 355                 return err;
 356         netif_start_queue(dev);
 357         return 0;
 358 }
 359
 360 static int mlxsw_sp_port_stop(struct net_device *dev)
 361 {
 362         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 363
 364         netif_stop_queue(dev);
 365         return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
 366 }
 367
 368 static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
 369                                       struct net_device *dev)
 370 {
 371         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 372         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 373         struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
 374         const struct mlxsw_tx_info tx_info = {
 375                 .local_port = mlxsw_sp_port->local_port,
 376                 .is_emad = false,
 377         };
 378         u64 len;
 379         int err;
 380
 381         if (mlxsw_core_skb_transmit_busy(mlxsw_sp, &tx_info))
 382                 return NETDEV_TX_BUSY;
 383
 384         if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
 385                 struct sk_buff *skb_orig = skb;
 386
 387                 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
 388                 if (!skb) {
 389                         this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
 390                         dev_kfree_skb_any(skb_orig);
 391                         return NETDEV_TX_OK;
 392                 }
 393                 dev_consume_skb_any(skb_orig);
 394         }
 395
 396         if (eth_skb_pad(skb)) {
 397                 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
 398                 return NETDEV_TX_OK;
 399         }
 400
 401         mlxsw_sp_txhdr_construct(skb, &tx_info);
 402         len = skb->len;
 403         /* Due to a race we might fail here because of a full queue. In that
 404          * unlikely case we simply drop the packet.
 405          */
 406         err = mlxsw_core_skb_transmit(mlxsw_sp, skb, &tx_info);
 407
 408         if (!err) {
 409                 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
 410                 u64_stats_update_begin(&pcpu_stats->syncp);
 411                 pcpu_stats->tx_packets++;
 412                 pcpu_stats->tx_bytes += len;
 413                 u64_stats_update_end(&pcpu_stats->syncp);
 414         } else {
 415                 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
 416                 dev_kfree_skb_any(skb);
 417         }
 418         return NETDEV_TX_OK;
 419 }
 420
 421 static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
 422 {
 423         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 424         struct sockaddr *addr = p;
 425         int err;
 426
 427         if (!is_valid_ether_addr(addr->sa_data))
 428                 return -EADDRNOTAVAIL;
 429
 430         err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
 431         if (err)
 432                 return err;
 433         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
 434         return 0;
 435 }
 436
 437 static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
 438 {
 439         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 440         int err;
 441
 442         err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
 443         if (err)
 444                 return err;
 445         dev->mtu = mtu;
 446         return 0;
 447 }
 448
 449 static struct rtnl_link_stats64 *
 450 mlxsw_sp_port_get_stats64(struct net_device *dev,
 451                           struct rtnl_link_stats64 *stats)
 452 {
 453         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 454         struct mlxsw_sp_port_pcpu_stats *p;
 455         u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
 456         u32 tx_dropped = 0;
 457         unsigned int start;
 458         int i;
 459
 460         for_each_possible_cpu(i) {
 461                 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
 462                 do {
 463                         start = u64_stats_fetch_begin_irq(&p->syncp);
 464                         rx_packets      = p->rx_packets;
 465                         rx_bytes        = p->rx_bytes;
 466                         tx_packets      = p->tx_packets;
 467                         tx_bytes        = p->tx_bytes;
 468                 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 469
 470                 stats->rx_packets       += rx_packets;
 471                 stats->rx_bytes         += rx_bytes;
 472                 stats->tx_packets       += tx_packets;
 473                 stats->tx_bytes         += tx_bytes;
 474                 /* tx_dropped is u32, updated without syncp protection. */
 475                 tx_dropped      += p->tx_dropped;
 476         }
 477         stats->tx_dropped       = tx_dropped;
 478         return stats;
 479 }
 480
 481 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
 482                            u16 vid_end, bool is_member, bool untagged)
 483 {
 484         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 485         char *spvm_pl;
 486         int err;
 487
 488         spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
 489         if (!spvm_pl)
 490                 return -ENOMEM;
 491
 492         mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
 493                             vid_end, is_member, untagged);
 494         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
 495         kfree(spvm_pl);
 496         return err;
 497 }
 498
 499 static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
 500 {
 501         enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
 502         u16 vid, last_visited_vid;
 503         int err;
 504
 505         for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
 506                 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
 507                                                    vid);
 508                 if (err) {
 509                         last_visited_vid = vid;
 510                         goto err_port_vid_to_fid_set;
 511                 }
 512         }
 513
 514         err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
 515         if (err) {
 516                 last_visited_vid = VLAN_N_VID;
 517                 goto err_port_vid_to_fid_set;
 518         }
 519
 520         return 0;
 521
 522 err_port_vid_to_fid_set:
 523         for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
 524                 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
 525                                              vid);
 526         return err;
 527 }
 528
 529 static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
 530 {
 531         enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
 532         u16 vid;
 533         int err;
 534
 535         err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
 536         if (err)
 537                 return err;
 538
 539         for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
 540                 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
 541                                                    vid, vid);
 542                 if (err)
 543                         return err;
 544         }
 545
 546         return 0;
 547 }
 548
 549 int mlxsw_sp_port_add_vid(struct net_device *dev, __be16 __always_unused proto,
 550                           u16 vid)
 551 {
 552         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 553         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 554         char *sftr_pl;
 555         int err;
 556
 557         /* VLAN 0 is added to HW filter when device goes up, but it is
 558          * reserved in our case, so simply return.
 559          */
 560         if (!vid)
 561                 return 0;
 562
 563         if (test_bit(vid, mlxsw_sp_port->active_vfids)) {
 564                 netdev_warn(dev, "VID=%d already configured\n", vid);
 565                 return 0;
 566         }
 567
 568         if (!test_bit(vid, mlxsw_sp->active_vfids)) {
 569                 err = mlxsw_sp_vfid_create(mlxsw_sp, vid);
 570                 if (err) {
 571                         netdev_err(dev, "Failed to create vFID=%d\n",
 572                                    MLXSW_SP_VFID_BASE + vid);
 573                         return err;
 574                 }
 575
 576                 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
 577                 if (!sftr_pl) {
 578                         err = -ENOMEM;
 579                         goto err_flood_table_alloc;
 580                 }
 581                 mlxsw_reg_sftr_pack(sftr_pl, 0, vid,
 582                                     MLXSW_REG_SFGC_TABLE_TYPE_FID, 0,
 583                                     MLXSW_PORT_CPU_PORT, true);
 584                 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
 585                 kfree(sftr_pl);
 586                 if (err) {
 587                         netdev_err(dev, "Failed to configure flood table\n");
 588                         goto err_flood_table_config;
 589                 }
 590         }
 591
 592         /* In case we fail in the following steps, we intentionally do not
 593          * destroy the associated vFID.
 594          */
 595
 596         /* When adding the first VLAN interface on a bridged port we need to
 597          * transition all the active 802.1Q bridge VLANs to use explicit
 598          * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
 599          */
 600         if (!mlxsw_sp_port->nr_vfids) {
 601                 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
 602                 if (err) {
 603                         netdev_err(dev, "Failed to set to Virtual mode\n");
 604                         return err;
 605                 }
 606         }
 607
 608         err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port,
 609                                            MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
 610                                            true, MLXSW_SP_VFID_BASE + vid, vid);
 611         if (err) {
 612                 netdev_err(dev, "Failed to map {Port, VID=%d} to vFID=%d\n",
 613                            vid, MLXSW_SP_VFID_BASE + vid);
 614                 goto err_port_vid_to_fid_set;
 615         }
 616
 617         err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, false);
 618         if (err) {
 619                 netdev_err(dev, "Failed to disable learning for VID=%d\n", vid);
 620                 goto err_port_vid_learning_set;
 621         }
 622
 623         err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, true, false);
 624         if (err) {
 625                 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
 626                            vid);
 627                 goto err_port_add_vid;
 628         }
 629
 630         err = mlxsw_sp_port_stp_state_set(mlxsw_sp_port, vid,
 631                                           MLXSW_REG_SPMS_STATE_FORWARDING);
 632         if (err) {
 633                 netdev_err(dev, "Failed to set STP state for VID=%d\n", vid);
 634                 goto err_port_stp_state_set;
 635         }
 636
 637         mlxsw_sp_port->nr_vfids++;
 638         set_bit(vid, mlxsw_sp_port->active_vfids);
 639
 640         return 0;
 641
 642 err_flood_table_config:
 643 err_flood_table_alloc:
 644         mlxsw_sp_vfid_destroy(mlxsw_sp, vid);
 645         return err;
 646
 647 err_port_stp_state_set:
 648         mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, false, false);
 649 err_port_add_vid:
 650         mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, true);
 651 err_port_vid_learning_set:
 652         mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port,
 653                                      MLXSW_REG_SVFA_MT_PORT_VID_TO_FID, false,
 654                                      MLXSW_SP_VFID_BASE + vid, vid);
 655 err_port_vid_to_fid_set:
 656         mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
 657         return err;
 658 }
 659
 660 int mlxsw_sp_port_kill_vid(struct net_device *dev,
 661                            __be16 __always_unused proto, u16 vid)
 662 {
 663         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 664         int err;
 665
 666         /* VLAN 0 is removed from HW filter when device goes down, but
 667          * it is reserved in our case, so simply return.
 668          */
 669         if (!vid)
 670                 return 0;
 671
 672         if (!test_bit(vid, mlxsw_sp_port->active_vfids)) {
 673                 netdev_warn(dev, "VID=%d does not exist\n", vid);
 674                 return 0;
 675         }
 676
 677         err = mlxsw_sp_port_stp_state_set(mlxsw_sp_port, vid,
 678                                           MLXSW_REG_SPMS_STATE_DISCARDING);
 679         if (err) {
 680                 netdev_err(dev, "Failed to set STP state for VID=%d\n", vid);
 681                 return err;
 682         }
 683
 684         err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, false, false);
 685         if (err) {
 686                 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
 687                            vid);
 688                 return err;
 689         }
 690
 691         err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, true);
 692         if (err) {
 693                 netdev_err(dev, "Failed to enable learning for VID=%d\n", vid);
 694                 return err;
 695         }
 696
 697         err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port,
 698                                            MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
 699                                            false, MLXSW_SP_VFID_BASE + vid,
 700                                            vid);
 701         if (err) {
 702                 netdev_err(dev, "Failed to invalidate {Port, VID=%d} to vFID=%d mapping\n",
 703                            vid, MLXSW_SP_VFID_BASE + vid);
 704                 return err;
 705         }
 706
 707         /* When removing the last VLAN interface on a bridged port we need to
 708          * transition all active 802.1Q bridge VLANs to use VID to FID
 709          * mappings and set port's mode to VLAN mode.
 710          */
 711         if (mlxsw_sp_port->nr_vfids == 1) {
 712                 err = mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
 713                 if (err) {
 714                         netdev_err(dev, "Failed to set to VLAN mode\n");
 715                         return err;
 716                 }
 717         }
 718
 719         mlxsw_sp_port->nr_vfids--;
 720         clear_bit(vid, mlxsw_sp_port->active_vfids);
 721
 722         return 0;
 723 }
 724
 725 static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
 726         .ndo_open               = mlxsw_sp_port_open,
 727         .ndo_stop               = mlxsw_sp_port_stop,
 728         .ndo_start_xmit         = mlxsw_sp_port_xmit,
 729         .ndo_set_mac_address    = mlxsw_sp_port_set_mac_address,
 730         .ndo_change_mtu         = mlxsw_sp_port_change_mtu,
 731         .ndo_get_stats64        = mlxsw_sp_port_get_stats64,
 732         .ndo_vlan_rx_add_vid    = mlxsw_sp_port_add_vid,
 733         .ndo_vlan_rx_kill_vid   = mlxsw_sp_port_kill_vid,
 734         .ndo_fdb_add            = switchdev_port_fdb_add,
 735         .ndo_fdb_del            = switchdev_port_fdb_del,
 736         .ndo_fdb_dump           = switchdev_port_fdb_dump,
 737         .ndo_bridge_setlink     = switchdev_port_bridge_setlink,
 738         .ndo_bridge_getlink     = switchdev_port_bridge_getlink,
 739         .ndo_bridge_dellink     = switchdev_port_bridge_dellink,
 740 };
 741
 742 static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
 743                                       struct ethtool_drvinfo *drvinfo)
 744 {
 745         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 746         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 747
 748         strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
 749         strlcpy(drvinfo->version, mlxsw_sp_driver_version,
 750                 sizeof(drvinfo->version));
 751         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
 752                  "%d.%d.%d",
 753                  mlxsw_sp->bus_info->fw_rev.major,
 754                  mlxsw_sp->bus_info->fw_rev.minor,
 755                  mlxsw_sp->bus_info->fw_rev.subminor);
 756         strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
 757                 sizeof(drvinfo->bus_info));
 758 }
 759
 760 struct mlxsw_sp_port_hw_stats {
 761         char str[ETH_GSTRING_LEN];
 762         u64 (*getter)(char *payload);
 763 };
 764
 765 static const struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
 766         {
 767                 .str = "a_frames_transmitted_ok",
 768                 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
 769         },
 770         {
 771                 .str = "a_frames_received_ok",
 772                 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
 773         },
 774         {
 775                 .str = "a_frame_check_sequence_errors",
 776                 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
 777         },
 778         {
 779                 .str = "a_alignment_errors",
 780                 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
 781         },
 782         {
 783                 .str = "a_octets_transmitted_ok",
 784                 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
 785         },
 786         {
 787                 .str = "a_octets_received_ok",
 788                 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
 789         },
 790         {
 791                 .str = "a_multicast_frames_xmitted_ok",
 792                 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
 793         },
 794         {
 795                 .str = "a_broadcast_frames_xmitted_ok",
 796                 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
 797         },
 798         {
 799                 .str = "a_multicast_frames_received_ok",
 800                 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
 801         },
 802         {
 803                 .str = "a_broadcast_frames_received_ok",
 804                 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
 805         },
 806         {
 807                 .str = "a_in_range_length_errors",
 808                 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
 809         },
 810         {
 811                 .str = "a_out_of_range_length_field",
 812                 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
 813         },
 814         {
 815                 .str = "a_frame_too_long_errors",
 816                 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
 817         },
 818         {
 819                 .str = "a_symbol_error_during_carrier",
 820                 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
 821         },
 822         {
 823                 .str = "a_mac_control_frames_transmitted",
 824                 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
 825         },
 826         {
 827                 .str = "a_mac_control_frames_received",
 828                 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
 829         },
 830         {
 831                 .str = "a_unsupported_opcodes_received",
 832                 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
 833         },
 834         {
 835                 .str = "a_pause_mac_ctrl_frames_received",
 836                 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
 837         },
 838         {
 839                 .str = "a_pause_mac_ctrl_frames_xmitted",
 840                 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
 841         },
 842 };
 843
 844 #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
 845
 846 static void mlxsw_sp_port_get_strings(struct net_device *dev,
 847                                       u32 stringset, u8 *data)
 848 {
 849         u8 *p = data;
 850         int i;
 851
 852         switch (stringset) {
 853         case ETH_SS_STATS:
 854                 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
 855                         memcpy(p, mlxsw_sp_port_hw_stats[i].str,
 856                                ETH_GSTRING_LEN);
 857                         p += ETH_GSTRING_LEN;
 858                 }
 859                 break;
 860         }
 861 }
 862
 863 static void mlxsw_sp_port_get_stats(struct net_device *dev,
 864                                     struct ethtool_stats *stats, u64 *data)
 865 {
 866         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
 867         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 868         char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
 869         int i;
 870         int err;
 871
 872         mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port);
 873         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
 874         for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++)
 875                 data[i] = !err ? mlxsw_sp_port_hw_stats[i].getter(ppcnt_pl) : 0;
 876 }
 877
 878 static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
 879 {
 880         switch (sset) {
 881         case ETH_SS_STATS:
 882                 return MLXSW_SP_PORT_HW_STATS_LEN;
 883         default:
 884                 return -EOPNOTSUPP;
 885         }
 886 }
 887
 888 struct mlxsw_sp_port_link_mode {
 889         u32 mask;
 890         u32 supported;
 891         u32 advertised;
 892         u32 speed;
 893 };
 894
 895 static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
 896         {
 897                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
 898                 .supported      = SUPPORTED_100baseT_Full,
 899                 .advertised     = ADVERTISED_100baseT_Full,
 900                 .speed          = 100,
 901         },
 902         {
 903                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
 904                 .speed          = 100,
 905         },
 906         {
 907                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
 908                                   MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
 909                 .supported      = SUPPORTED_1000baseKX_Full,
 910                 .advertised     = ADVERTISED_1000baseKX_Full,
 911                 .speed          = 1000,
 912         },
 913         {
 914                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
 915                 .supported      = SUPPORTED_10000baseT_Full,
 916                 .advertised     = ADVERTISED_10000baseT_Full,
 917                 .speed          = 10000,
 918         },
 919         {
 920                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
 921                                   MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
 922                 .supported      = SUPPORTED_10000baseKX4_Full,
 923                 .advertised     = ADVERTISED_10000baseKX4_Full,
 924                 .speed          = 10000,
 925         },
 926         {
 927                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
 928                                   MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
 929                                   MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
 930                                   MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
 931                 .supported      = SUPPORTED_10000baseKR_Full,
 932                 .advertised     = ADVERTISED_10000baseKR_Full,
 933                 .speed          = 10000,
 934         },
 935         {
 936                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
 937                 .supported      = SUPPORTED_20000baseKR2_Full,
 938                 .advertised     = ADVERTISED_20000baseKR2_Full,
 939                 .speed          = 20000,
 940         },
 941         {
 942                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
 943                 .supported      = SUPPORTED_40000baseCR4_Full,
 944                 .advertised     = ADVERTISED_40000baseCR4_Full,
 945                 .speed          = 40000,
 946         },
 947         {
 948                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
 949                 .supported      = SUPPORTED_40000baseKR4_Full,
 950                 .advertised     = ADVERTISED_40000baseKR4_Full,
 951                 .speed          = 40000,
 952         },
 953         {
 954                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
 955                 .supported      = SUPPORTED_40000baseSR4_Full,
 956                 .advertised     = ADVERTISED_40000baseSR4_Full,
 957                 .speed          = 40000,
 958         },
 959         {
 960                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
 961                 .supported      = SUPPORTED_40000baseLR4_Full,
 962                 .advertised     = ADVERTISED_40000baseLR4_Full,
 963                 .speed          = 40000,
 964         },
 965         {
 966                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
 967                                   MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
 968                                   MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
 969                 .speed          = 25000,
 970         },
 971         {
 972                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
 973                                   MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
 974                                   MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
 975                 .speed          = 50000,
 976         },
 977         {
 978                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
 979                 .supported      = SUPPORTED_56000baseKR4_Full,
 980                 .advertised     = ADVERTISED_56000baseKR4_Full,
 981                 .speed          = 56000,
 982         },
 983         {
 984                 .mask           = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
 985                                   MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
 986                                   MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
 987                                   MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
 988                 .speed          = 100000,
 989         },
 990 };
 991
 992 #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
 993
 994 static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
 995 {
 996         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
 997                               MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
 998                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
 999                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1000                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1001                               MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1002                 return SUPPORTED_FIBRE;
1003
1004         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1005                               MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1006                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1007                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1008                               MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1009                 return SUPPORTED_Backplane;
1010         return 0;
1011 }
1012
1013 static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1014 {
1015         u32 modes = 0;
1016         int i;
1017
1018         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1019                 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1020                         modes |= mlxsw_sp_port_link_mode[i].supported;
1021         }
1022         return modes;
1023 }
1024
1025 static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1026 {
1027         u32 modes = 0;
1028         int i;
1029
1030         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1031                 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1032                         modes |= mlxsw_sp_port_link_mode[i].advertised;
1033         }
1034         return modes;
1035 }
1036
1037 static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1038                                             struct ethtool_cmd *cmd)
1039 {
1040         u32 speed = SPEED_UNKNOWN;
1041         u8 duplex = DUPLEX_UNKNOWN;
1042         int i;
1043
1044         if (!carrier_ok)
1045                 goto out;
1046
1047         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1048                 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1049                         speed = mlxsw_sp_port_link_mode[i].speed;
1050                         duplex = DUPLEX_FULL;
1051                         break;
1052                 }
1053         }
1054 out:
1055         ethtool_cmd_speed_set(cmd, speed);
1056         cmd->duplex = duplex;
1057 }
1058
1059 static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1060 {
1061         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1062                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1063                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1064                               MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1065                 return PORT_FIBRE;
1066
1067         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1068                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1069                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1070                 return PORT_DA;
1071
1072         if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1073                               MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1074                               MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1075                               MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1076                 return PORT_NONE;
1077
1078         return PORT_OTHER;
1079 }
1080
1081 static int mlxsw_sp_port_get_settings(struct net_device *dev,
1082                                       struct ethtool_cmd *cmd)
1083 {
1084         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1085         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1086         char ptys_pl[MLXSW_REG_PTYS_LEN];
1087         u32 eth_proto_cap;
1088         u32 eth_proto_admin;
1089         u32 eth_proto_oper;
1090         int err;
1091
1092         mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1093         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1094         if (err) {
1095                 netdev_err(dev, "Failed to get proto");
1096                 return err;
1097         }
1098         mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1099                               &eth_proto_admin, &eth_proto_oper);
1100
1101         cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1102                          mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
1103                          SUPPORTED_Pause | SUPPORTED_Asym_Pause;
1104         cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1105         mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1106                                         eth_proto_oper, cmd);
1107
1108         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1109         cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1110         cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1111
1112         cmd->transceiver = XCVR_INTERNAL;
1113         return 0;
1114 }
1115
1116 static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1117 {
1118         u32 ptys_proto = 0;
1119         int i;
1120
1121         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1122                 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1123                         ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1124         }
1125         return ptys_proto;
1126 }
1127
1128 static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1129 {
1130         u32 ptys_proto = 0;
1131         int i;
1132
1133         for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1134                 if (speed == mlxsw_sp_port_link_mode[i].speed)
1135                         ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1136         }
1137         return ptys_proto;
1138 }
1139
1140 static int mlxsw_sp_port_set_settings(struct net_device *dev,
1141                                       struct ethtool_cmd *cmd)
1142 {
1143         struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1144         struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1145         char ptys_pl[MLXSW_REG_PTYS_LEN];
1146         u32 speed;
1147         u32 eth_proto_new;
1148         u32 eth_proto_cap;
1149         u32 eth_proto_admin;
1150         bool is_up;
1151         int err;
1152
1153         speed = ethtool_cmd_speed(cmd);
1154
1155         eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1156                 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1157                 mlxsw_sp_to_ptys_speed(speed);
1158
1159         mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1160         err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1161         if (err) {
1162                 netdev_err(dev, "Failed to get proto");
1163                 return err;
1164         }
1165         mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1166
1167         eth_proto_new = eth_proto_new & eth_proto_cap;
1168         if (!eth_proto_new) {
1169                 netdev_err(dev, "Not supported proto admin requested");
1170                 return -EINVAL;
1171         }
1172         if (eth_proto_new == eth_proto_admin)
1173                 return 0;
1174
1175         mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1176         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1177         if (err) {
1178                 netdev_err(dev, "Failed to set proto admin");
1179                 return err;
1180         }
1181
1182         err = mlxsw_sp_port_oper_status_get(mlxsw_sp_port, &is_up);
1183         if (err) {
1184                 netdev_err(dev, "Failed to get oper status");
1185                 return err;
1186         }
1187         if (!is_up)
1188                 return 0;
1189
1190         err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1191         if (err) {
1192                 netdev_err(dev, "Failed to set admin status");
1193                 return err;
1194         }
1195
1196         err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1197         if (err) {
1198                 netdev_err(dev, "Failed to set admin status");
1199                 return err;
1200         }
1201
1202         return 0;
1203 }
1204
1205 static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1206         .get_drvinfo            = mlxsw_sp_port_get_drvinfo,
1207         .get_link               = ethtool_op_get_link,
1208         .get_strings            = mlxsw_sp_port_get_strings,
1209         .get_ethtool_stats      = mlxsw_sp_port_get_stats,
1210         .get_sset_count         = mlxsw_sp_port_get_sset_count,
1211         .get_settings           = mlxsw_sp_port_get_settings,
1212         .set_settings           = mlxsw_sp_port_set_settings,
1213 };
1214
1215 static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1216 {
1217         struct mlxsw_sp_port *mlxsw_sp_port;
1218         struct net_device *dev;
1219         bool usable;
1220         int err;
1221
1222         dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
1223         if (!dev)
1224                 return -ENOMEM;
1225         mlxsw_sp_port = netdev_priv(dev);
1226         mlxsw_sp_port->dev = dev;
1227         mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
1228         mlxsw_sp_port->local_port = local_port;
1229         mlxsw_sp_port->learning = 1;
1230         mlxsw_sp_port->learning_sync = 1;
1231         mlxsw_sp_port->uc_flood = 1;
1232         mlxsw_sp_port->pvid = 1;
1233
1234         mlxsw_sp_port->pcpu_stats =
1235                 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
1236         if (!mlxsw_sp_port->pcpu_stats) {
1237                 err = -ENOMEM;
1238                 goto err_alloc_stats;
1239         }
1240
1241         dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
1242         dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
1243
1244         err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
1245         if (err) {
1246                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
1247                         mlxsw_sp_port->local_port);
1248                 goto err_dev_addr_init;
1249         }
1250
1251         netif_carrier_off(dev);
1252
1253         dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
1254                          NETIF_F_HW_VLAN_CTAG_FILTER;
1255
1256         /* Each packet needs to have a Tx header (metadata) on top all other
1257          * headers.
1258          */
1259         dev->hard_header_len += MLXSW_TXHDR_LEN;
1260
1261         err = mlxsw_sp_port_module_check(mlxsw_sp_port, &usable);
1262         if (err) {
1263                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to check module\n",
1264                         mlxsw_sp_port->local_port);
1265                 goto err_port_module_check;
1266         }
1267
1268         if (!usable) {
1269                 dev_dbg(mlxsw_sp->bus_info->dev, "Port %d: Not usable, skipping initialization\n",
1270                         mlxsw_sp_port->local_port);
1271                 goto port_not_usable;
1272         }
1273
1274         err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
1275         if (err) {
1276                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
1277                         mlxsw_sp_port->local_port);
1278                 goto err_port_system_port_mapping_set;
1279         }
1280
1281         err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
1282         if (err) {
1283                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
1284                         mlxsw_sp_port->local_port);
1285                 goto err_port_swid_set;
1286         }
1287
1288         err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
1289         if (err) {
1290                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
1291                         mlxsw_sp_port->local_port);
1292                 goto err_port_mtu_set;
1293         }
1294
1295         err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1296         if (err)
1297                 goto err_port_admin_status_set;
1298
1299         err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
1300         if (err) {
1301                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
1302                         mlxsw_sp_port->local_port);
1303                 goto err_port_buffers_init;
1304         }
1305
1306         mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
1307         err = register_netdev(dev);
1308         if (err) {
1309                 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
1310                         mlxsw_sp_port->local_port);
1311                 goto err_register_netdev;
1312         }
1313
1314         err = mlxsw_sp_port_vlan_init(mlxsw_sp_port);
1315         if (err)
1316                 goto err_port_vlan_init;
1317
1318         mlxsw_sp->ports[local_port] = mlxsw_sp_port;
1319         return 0;
1320
1321 err_port_vlan_init:
1322         unregister_netdev(dev);
1323 err_register_netdev:
1324 err_port_buffers_init:
1325 err_port_admin_status_set:
1326 err_port_mtu_set:
1327 err_port_swid_set:
1328 err_port_system_port_mapping_set:
1329 port_not_usable:
1330 err_port_module_check:
1331 err_dev_addr_init:
1332         free_percpu(mlxsw_sp_port->pcpu_stats);
1333 err_alloc_stats:
1334         free_netdev(dev);
1335         return err;
1336 }
1337
1338 static void mlxsw_sp_vfids_fini(struct mlxsw_sp *mlxsw_sp)
1339 {
1340         u16 vfid;
1341
1342         for_each_set_bit(vfid, mlxsw_sp->active_vfids, VLAN_N_VID)
1343                 mlxsw_sp_vfid_destroy(mlxsw_sp, vfid);
1344 }
1345
1346 static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1347 {
1348         struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
1349
1350         if (!mlxsw_sp_port)
1351                 return;
1352         mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
1353         unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
1354         mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
1355         free_percpu(mlxsw_sp_port->pcpu_stats);
1356         free_netdev(mlxsw_sp_port->dev);
1357 }
1358
1359 static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
1360 {
1361         int i;
1362
1363         for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
1364                 mlxsw_sp_port_remove(mlxsw_sp, i);
1365         kfree(mlxsw_sp->ports);
1366 }
1367
1368 static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
1369 {
1370         size_t alloc_size;
1371         int i;
1372         int err;
1373
1374         alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
1375         mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
1376         if (!mlxsw_sp->ports)
1377                 return -ENOMEM;
1378
1379         for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
1380                 err = mlxsw_sp_port_create(mlxsw_sp, i);
1381                 if (err)
1382                         goto err_port_create;
1383         }
1384         return 0;
1385
1386 err_port_create:
1387         for (i--; i >= 1; i--)
1388                 mlxsw_sp_port_remove(mlxsw_sp, i);
1389         kfree(mlxsw_sp->ports);
1390         return err;
1391 }
1392
1393 static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
1394                                      char *pude_pl, void *priv)
1395 {
1396         struct mlxsw_sp *mlxsw_sp = priv;
1397         struct mlxsw_sp_port *mlxsw_sp_port;
1398         enum mlxsw_reg_pude_oper_status status;
1399         u8 local_port;
1400
1401         local_port = mlxsw_reg_pude_local_port_get(pude_pl);
1402         mlxsw_sp_port = mlxsw_sp->ports[local_port];
1403         if (!mlxsw_sp_port) {
1404                 dev_warn(mlxsw_sp->bus_info->dev, "Port %d: Link event received for non-existent port\n",
1405                          local_port);
1406                 return;
1407         }
1408
1409         status = mlxsw_reg_pude_oper_status_get(pude_pl);
1410         if (status == MLXSW_PORT_OPER_STATUS_UP) {
1411                 netdev_info(mlxsw_sp_port->dev, "link up\n");
1412                 netif_carrier_on(mlxsw_sp_port->dev);
1413         } else {
1414                 netdev_info(mlxsw_sp_port->dev, "link down\n");
1415                 netif_carrier_off(mlxsw_sp_port->dev);
1416         }
1417 }
1418
1419 static struct mlxsw_event_listener mlxsw_sp_pude_event = {
1420         .func = mlxsw_sp_pude_event_func,
1421         .trap_id = MLXSW_TRAP_ID_PUDE,
1422 };
1423
1424 static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
1425                                    enum mlxsw_event_trap_id trap_id)
1426 {
1427         struct mlxsw_event_listener *el;
1428         char hpkt_pl[MLXSW_REG_HPKT_LEN];
1429         int err;
1430
1431         switch (trap_id) {
1432         case MLXSW_TRAP_ID_PUDE:
1433                 el = &mlxsw_sp_pude_event;
1434                 break;
1435         }
1436         err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
1437         if (err)
1438                 return err;
1439
1440         mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
1441         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1442         if (err)
1443                 goto err_event_trap_set;
1444
1445         return 0;
1446
1447 err_event_trap_set:
1448         mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
1449         return err;
1450 }
1451
1452 static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
1453                                       enum mlxsw_event_trap_id trap_id)
1454 {
1455         struct mlxsw_event_listener *el;
1456
1457         switch (trap_id) {
1458         case MLXSW_TRAP_ID_PUDE:
1459                 el = &mlxsw_sp_pude_event;
1460                 break;
1461         }
1462         mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
1463 }
1464
1465 static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
1466                                       void *priv)
1467 {
1468         struct mlxsw_sp *mlxsw_sp = priv;
1469         struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
1470         struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
1471
1472         if (unlikely(!mlxsw_sp_port)) {
1473                 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
1474                                      local_port);
1475                 return;
1476         }
1477
1478         skb->dev = mlxsw_sp_port->dev;
1479
1480         pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
1481         u64_stats_update_begin(&pcpu_stats->syncp);
1482         pcpu_stats->rx_packets++;
1483         pcpu_stats->rx_bytes += skb->len;
1484         u64_stats_update_end(&pcpu_stats->syncp);
1485
1486         skb->protocol = eth_type_trans(skb, skb->dev);
1487         netif_receive_skb(skb);
1488 }
1489
1490 static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
1491         {
1492                 .func = mlxsw_sp_rx_listener_func,
1493                 .local_port = MLXSW_PORT_DONT_CARE,
1494                 .trap_id = MLXSW_TRAP_ID_FDB_MC,
1495         },
1496         /* Traps for specific L2 packet types, not trapped as FDB MC */
1497         {
1498                 .func = mlxsw_sp_rx_listener_func,
1499                 .local_port = MLXSW_PORT_DONT_CARE,
1500                 .trap_id = MLXSW_TRAP_ID_STP,
1501         },
1502         {
1503                 .func = mlxsw_sp_rx_listener_func,
1504                 .local_port = MLXSW_PORT_DONT_CARE,
1505                 .trap_id = MLXSW_TRAP_ID_LACP,
1506         },
1507         {
1508                 .func = mlxsw_sp_rx_listener_func,
1509                 .local_port = MLXSW_PORT_DONT_CARE,
1510                 .trap_id = MLXSW_TRAP_ID_EAPOL,
1511         },
1512         {
1513                 .func = mlxsw_sp_rx_listener_func,
1514                 .local_port = MLXSW_PORT_DONT_CARE,
1515                 .trap_id = MLXSW_TRAP_ID_LLDP,
1516         },
1517         {
1518                 .func = mlxsw_sp_rx_listener_func,
1519                 .local_port = MLXSW_PORT_DONT_CARE,
1520                 .trap_id = MLXSW_TRAP_ID_MMRP,
1521         },
1522         {
1523                 .func = mlxsw_sp_rx_listener_func,
1524                 .local_port = MLXSW_PORT_DONT_CARE,
1525                 .trap_id = MLXSW_TRAP_ID_MVRP,
1526         },
1527         {
1528                 .func = mlxsw_sp_rx_listener_func,
1529                 .local_port = MLXSW_PORT_DONT_CARE,
1530                 .trap_id = MLXSW_TRAP_ID_RPVST,
1531         },
1532         {
1533                 .func = mlxsw_sp_rx_listener_func,
1534                 .local_port = MLXSW_PORT_DONT_CARE,
1535                 .trap_id = MLXSW_TRAP_ID_DHCP,
1536         },
1537         {
1538                 .func = mlxsw_sp_rx_listener_func,
1539                 .local_port = MLXSW_PORT_DONT_CARE,
1540                 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
1541         },
1542         {
1543                 .func = mlxsw_sp_rx_listener_func,
1544                 .local_port = MLXSW_PORT_DONT_CARE,
1545                 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
1546         },
1547         {
1548                 .func = mlxsw_sp_rx_listener_func,
1549                 .local_port = MLXSW_PORT_DONT_CARE,
1550                 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
1551         },
1552         {
1553                 .func = mlxsw_sp_rx_listener_func,
1554                 .local_port = MLXSW_PORT_DONT_CARE,
1555                 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
1556         },
1557         {
1558                 .func = mlxsw_sp_rx_listener_func,
1559                 .local_port = MLXSW_PORT_DONT_CARE,
1560                 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
1561         },
1562 };
1563
1564 static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
1565 {
1566         char htgt_pl[MLXSW_REG_HTGT_LEN];
1567         char hpkt_pl[MLXSW_REG_HPKT_LEN];
1568         int i;
1569         int err;
1570
1571         mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
1572         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
1573         if (err)
1574                 return err;
1575
1576         mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
1577         err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
1578         if (err)
1579                 return err;
1580
1581         for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
1582                 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
1583                                                       &mlxsw_sp_rx_listener[i],
1584                                                       mlxsw_sp);
1585                 if (err)
1586                         goto err_rx_listener_register;
1587
1588                 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
1589                                     mlxsw_sp_rx_listener[i].trap_id);
1590                 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1591                 if (err)
1592                         goto err_rx_trap_set;
1593         }
1594         return 0;
1595
1596 err_rx_trap_set:
1597         mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
1598                                           &mlxsw_sp_rx_listener[i],
1599                                           mlxsw_sp);
1600 err_rx_listener_register:
1601         for (i--; i >= 0; i--) {
1602                 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD,
1603                                     mlxsw_sp_rx_listener[i].trap_id);
1604                 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1605
1606                 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
1607                                                   &mlxsw_sp_rx_listener[i],
1608                                                   mlxsw_sp);
1609         }
1610         return err;
1611 }
1612
1613 static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
1614 {
1615         char hpkt_pl[MLXSW_REG_HPKT_LEN];
1616         int i;
1617
1618         for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
1619                 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD,
1620                                     mlxsw_sp_rx_listener[i].trap_id);
1621                 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1622
1623                 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
1624                                                   &mlxsw_sp_rx_listener[i],
1625                                                   mlxsw_sp);
1626         }
1627 }
1628
1629 static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
1630                                  enum mlxsw_reg_sfgc_type type,
1631                                  enum mlxsw_reg_sfgc_bridge_type bridge_type)
1632 {
1633         enum mlxsw_flood_table_type table_type;
1634         enum mlxsw_sp_flood_table flood_table;
1635         char sfgc_pl[MLXSW_REG_SFGC_LEN];
1636
1637         if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID) {
1638                 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
1639                 flood_table = 0;
1640         } else {
1641                 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
1642                 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
1643                         flood_table = MLXSW_SP_FLOOD_TABLE_UC;
1644                 else
1645                         flood_table = MLXSW_SP_FLOOD_TABLE_BM;
1646         }
1647
1648         mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
1649                             flood_table);
1650         return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
1651 }
1652
1653 static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
1654 {
1655         int type, err;
1656
1657         /* For non-offloaded netdevs, flood all traffic types to CPU
1658          * port.
1659          */
1660         for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
1661                 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
1662                         continue;
1663
1664                 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
1665                                             MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
1666                 if (err)
1667                         return err;
1668         }
1669
1670         /* For bridged ports, use one flooding table for unknown unicast
1671          * traffic and a second table for unregistered multicast and
1672          * broadcast.
1673          */
1674         for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
1675                 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
1676                         continue;
1677
1678                 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
1679                                             MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
1680                 if (err)
1681                         return err;
1682         }
1683
1684         return 0;
1685 }
1686
1687 static int mlxsw_sp_init(void *priv, struct mlxsw_core *mlxsw_core,
1688                          const struct mlxsw_bus_info *mlxsw_bus_info)
1689 {
1690         struct mlxsw_sp *mlxsw_sp = priv;
1691         int err;
1692
1693         mlxsw_sp->core = mlxsw_core;
1694         mlxsw_sp->bus_info = mlxsw_bus_info;
1695
1696         err = mlxsw_sp_base_mac_get(mlxsw_sp);
1697         if (err) {
1698                 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
1699                 return err;
1700         }
1701
1702         err = mlxsw_sp_ports_create(mlxsw_sp);
1703         if (err) {
1704                 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
1705                 goto err_ports_create;
1706         }
1707
1708         err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
1709         if (err) {
1710                 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
1711                 goto err_event_register;
1712         }
1713
1714         err = mlxsw_sp_traps_init(mlxsw_sp);
1715         if (err) {
1716                 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
1717                 goto err_rx_listener_register;
1718         }
1719
1720         err = mlxsw_sp_flood_init(mlxsw_sp);
1721         if (err) {
1722                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
1723                 goto err_flood_init;
1724         }
1725
1726         err = mlxsw_sp_buffers_init(mlxsw_sp);
1727         if (err) {
1728                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
1729                 goto err_buffers_init;
1730         }
1731
1732         err = mlxsw_sp_switchdev_init(mlxsw_sp);
1733         if (err) {
1734                 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
1735                 goto err_switchdev_init;
1736         }
1737
1738         return 0;
1739
1740 err_switchdev_init:
1741 err_buffers_init:
1742 err_flood_init:
1743         mlxsw_sp_traps_fini(mlxsw_sp);
1744 err_rx_listener_register:
1745         mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
1746 err_event_register:
1747         mlxsw_sp_ports_remove(mlxsw_sp);
1748 err_ports_create:
1749         mlxsw_sp_vfids_fini(mlxsw_sp);
1750         return err;
1751 }
1752
1753 static void mlxsw_sp_fini(void *priv)
1754 {
1755         struct mlxsw_sp *mlxsw_sp = priv;
1756
1757         mlxsw_sp_switchdev_fini(mlxsw_sp);
1758         mlxsw_sp_traps_fini(mlxsw_sp);
1759         mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
1760         mlxsw_sp_ports_remove(mlxsw_sp);
1761         mlxsw_sp_vfids_fini(mlxsw_sp);
1762 }
1763
1764 static struct mlxsw_config_profile mlxsw_sp_config_profile = {
1765         .used_max_vepa_channels         = 1,
1766         .max_vepa_channels              = 0,
1767         .used_max_lag                   = 1,
1768         .max_lag                        = 64,
1769         .used_max_port_per_lag          = 1,
1770         .max_port_per_lag               = 16,
1771         .used_max_mid                   = 1,
1772         .max_mid                        = 7000,
1773         .used_max_pgt                   = 1,
1774         .max_pgt                        = 0,
1775         .used_max_system_port           = 1,
1776         .max_system_port                = 64,
1777         .used_max_vlan_groups           = 1,
1778         .max_vlan_groups                = 127,
1779         .used_max_regions               = 1,
1780         .max_regions                    = 400,
1781         .used_flood_tables              = 1,
1782         .used_flood_mode                = 1,
1783         .flood_mode                     = 3,
1784         .max_fid_offset_flood_tables    = 2,
1785         .fid_offset_flood_table_size    = VLAN_N_VID - 1,
1786         .max_fid_flood_tables           = 1,
1787         .fid_flood_table_size           = VLAN_N_VID,
1788         .used_max_ib_mc                 = 1,
1789         .max_ib_mc                      = 0,
1790         .used_max_pkey                  = 1,
1791         .max_pkey                       = 0,
1792         .swid_config                    = {
1793                 {
1794                         .used_type      = 1,
1795                         .type           = MLXSW_PORT_SWID_TYPE_ETH,
1796                 }
1797         },
1798 };
1799
1800 static struct mlxsw_driver mlxsw_sp_driver = {
1801         .kind                   = MLXSW_DEVICE_KIND_SPECTRUM,
1802         .owner                  = THIS_MODULE,
1803         .priv_size              = sizeof(struct mlxsw_sp),
1804         .init                   = mlxsw_sp_init,
1805         .fini                   = mlxsw_sp_fini,
1806         .txhdr_construct        = mlxsw_sp_txhdr_construct,
1807         .txhdr_len              = MLXSW_TXHDR_LEN,
1808         .profile                = &mlxsw_sp_config_profile,
1809 };
1810
1811 static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
1812 {
1813         return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
1814 }
1815
1816 static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port)
1817 {
1818         struct net_device *dev = mlxsw_sp_port->dev;
1819         int err;
1820
1821         /* When port is not bridged untagged packets are tagged with
1822          * PVID=VID=1, thereby creating an implicit VLAN interface in
1823          * the device. Remove it and let bridge code take care of its
1824          * own VLANs.
1825          */
1826         err = mlxsw_sp_port_kill_vid(dev, 0, 1);
1827         if (err)
1828                 netdev_err(dev, "Failed to remove VID 1\n");
1829
1830         return err;
1831 }
1832
1833 static int mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
1834 {
1835         struct net_device *dev = mlxsw_sp_port->dev;
1836         int err;
1837
1838         /* Add implicit VLAN interface in the device, so that untagged
1839          * packets will be classified to the default vFID.
1840          */
1841         err = mlxsw_sp_port_add_vid(dev, 0, 1);
1842         if (err)
1843                 netdev_err(dev, "Failed to add VID 1\n");
1844
1845         return err;
1846 }
1847
1848 static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
1849                                          struct net_device *br_dev)
1850 {
1851         return !mlxsw_sp->master_bridge.dev ||
1852                mlxsw_sp->master_bridge.dev == br_dev;
1853 }
1854
1855 static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
1856                                        struct net_device *br_dev)
1857 {
1858         mlxsw_sp->master_bridge.dev = br_dev;
1859         mlxsw_sp->master_bridge.ref_count++;
1860 }
1861
1862 static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp,
1863                                        struct net_device *br_dev)
1864 {
1865         if (--mlxsw_sp->master_bridge.ref_count == 0)
1866                 mlxsw_sp->master_bridge.dev = NULL;
1867 }
1868
1869 static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
1870                                     unsigned long event, void *ptr)
1871 {
1872         struct net_device *dev = netdev_notifier_info_to_dev(ptr);
1873         struct netdev_notifier_changeupper_info *info;
1874         struct mlxsw_sp_port *mlxsw_sp_port;
1875         struct net_device *upper_dev;
1876         struct mlxsw_sp *mlxsw_sp;
1877         int err;
1878
1879         if (!mlxsw_sp_port_dev_check(dev))
1880                 return NOTIFY_DONE;
1881
1882         mlxsw_sp_port = netdev_priv(dev);
1883         mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1884         info = ptr;
1885
1886         switch (event) {
1887         case NETDEV_PRECHANGEUPPER:
1888                 upper_dev = info->upper_dev;
1889                 /* HW limitation forbids to put ports to multiple bridges. */
1890                 if (info->master && info->linking &&
1891                     netif_is_bridge_master(upper_dev) &&
1892                     !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
1893                         return NOTIFY_BAD;
1894                 break;
1895         case NETDEV_CHANGEUPPER:
1896                 upper_dev = info->upper_dev;
1897                 if (info->master &&
1898                     netif_is_bridge_master(upper_dev)) {
1899                         if (info->linking) {
1900                                 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port);
1901                                 if (err)
1902                                         netdev_err(dev, "Failed to join bridge\n");
1903                                 mlxsw_sp_master_bridge_inc(mlxsw_sp, upper_dev);
1904                                 mlxsw_sp_port->bridged = 1;
1905                         } else {
1906                                 err = mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
1907                                 if (err)
1908                                         netdev_err(dev, "Failed to leave bridge\n");
1909                                 mlxsw_sp_port->bridged = 0;
1910                                 mlxsw_sp_master_bridge_dec(mlxsw_sp, upper_dev);
1911                         }
1912                 }
1913                 break;
1914         }
1915
1916         return NOTIFY_DONE;
1917 }
1918
1919 static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
1920         .notifier_call = mlxsw_sp_netdevice_event,
1921 };
1922
1923 static int __init mlxsw_sp_module_init(void)
1924 {
1925         int err;
1926
1927         register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
1928         err = mlxsw_core_driver_register(&mlxsw_sp_driver);
1929         if (err)
1930                 goto err_core_driver_register;
1931         return 0;
1932
1933 err_core_driver_register:
1934         unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
1935         return err;
1936 }
1937
1938 static void __exit mlxsw_sp_module_exit(void)
1939 {
1940         mlxsw_core_driver_unregister(&mlxsw_sp_driver);
1941         unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
1942 }
1943
1944 module_init(mlxsw_sp_module_init);
1945 module_exit(mlxsw_sp_module_exit);
1946
1947 MODULE_LICENSE("Dual BSD/GPL");
1948 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
1949 MODULE_DESCRIPTION("Mellanox Spectrum driver");
1950 MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);