2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 static void mlx5e_get_drvinfo(struct net_device *dev,
36 struct ethtool_drvinfo *drvinfo)
38 struct mlx5e_priv *priv = netdev_priv(dev);
39 struct mlx5_core_dev *mdev = priv->mdev;
41 strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
42 strlcpy(drvinfo->version, DRIVER_VERSION " (" DRIVER_RELDATE ")",
43 sizeof(drvinfo->version));
44 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
46 fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev));
47 strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
48 sizeof(drvinfo->bus_info));
55 } ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER] = {
56 [MLX5E_1000BASE_CX_SGMII] = {
57 .supported = SUPPORTED_1000baseKX_Full,
58 .advertised = ADVERTISED_1000baseKX_Full,
61 [MLX5E_1000BASE_KX] = {
62 .supported = SUPPORTED_1000baseKX_Full,
63 .advertised = ADVERTISED_1000baseKX_Full,
66 [MLX5E_10GBASE_CX4] = {
67 .supported = SUPPORTED_10000baseKX4_Full,
68 .advertised = ADVERTISED_10000baseKX4_Full,
71 [MLX5E_10GBASE_KX4] = {
72 .supported = SUPPORTED_10000baseKX4_Full,
73 .advertised = ADVERTISED_10000baseKX4_Full,
76 [MLX5E_10GBASE_KR] = {
77 .supported = SUPPORTED_10000baseKR_Full,
78 .advertised = ADVERTISED_10000baseKR_Full,
81 [MLX5E_20GBASE_KR2] = {
82 .supported = SUPPORTED_20000baseKR2_Full,
83 .advertised = ADVERTISED_20000baseKR2_Full,
86 [MLX5E_40GBASE_CR4] = {
87 .supported = SUPPORTED_40000baseCR4_Full,
88 .advertised = ADVERTISED_40000baseCR4_Full,
91 [MLX5E_40GBASE_KR4] = {
92 .supported = SUPPORTED_40000baseKR4_Full,
93 .advertised = ADVERTISED_40000baseKR4_Full,
96 [MLX5E_56GBASE_R4] = {
97 .supported = SUPPORTED_56000baseKR4_Full,
98 .advertised = ADVERTISED_56000baseKR4_Full,
101 [MLX5E_10GBASE_CR] = {
102 .supported = SUPPORTED_10000baseKR_Full,
103 .advertised = ADVERTISED_10000baseKR_Full,
106 [MLX5E_10GBASE_SR] = {
107 .supported = SUPPORTED_10000baseKR_Full,
108 .advertised = ADVERTISED_10000baseKR_Full,
111 [MLX5E_10GBASE_ER] = {
112 .supported = SUPPORTED_10000baseKR_Full,
113 .advertised = ADVERTISED_10000baseKR_Full,
116 [MLX5E_40GBASE_SR4] = {
117 .supported = SUPPORTED_40000baseSR4_Full,
118 .advertised = ADVERTISED_40000baseSR4_Full,
121 [MLX5E_40GBASE_LR4] = {
122 .supported = SUPPORTED_40000baseLR4_Full,
123 .advertised = ADVERTISED_40000baseLR4_Full,
126 [MLX5E_100GBASE_CR4] = {
129 [MLX5E_100GBASE_SR4] = {
132 [MLX5E_100GBASE_KR4] = {
135 [MLX5E_100GBASE_LR4] = {
138 [MLX5E_100BASE_TX] = {
141 [MLX5E_100BASE_T] = {
142 .supported = SUPPORTED_100baseT_Full,
143 .advertised = ADVERTISED_100baseT_Full,
146 [MLX5E_10GBASE_T] = {
147 .supported = SUPPORTED_10000baseT_Full,
148 .advertised = ADVERTISED_10000baseT_Full,
151 [MLX5E_25GBASE_CR] = {
154 [MLX5E_25GBASE_KR] = {
157 [MLX5E_25GBASE_SR] = {
160 [MLX5E_50GBASE_CR2] = {
163 [MLX5E_50GBASE_KR2] = {
168 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
170 struct mlx5e_priv *priv = netdev_priv(dev);
174 return NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS +
175 priv->params.num_channels * NUM_RQ_STATS +
176 priv->params.num_channels * priv->params.num_tc *
184 static void mlx5e_get_strings(struct net_device *dev,
185 uint32_t stringset, uint8_t *data)
187 int i, j, tc, idx = 0;
188 struct mlx5e_priv *priv = netdev_priv(dev);
191 case ETH_SS_PRIV_FLAGS:
199 for (i = 0; i < NUM_VPORT_COUNTERS; i++)
200 strcpy(data + (idx++) * ETH_GSTRING_LEN,
204 for (i = 0; i < NUM_PPORT_COUNTERS; i++)
205 strcpy(data + (idx++) * ETH_GSTRING_LEN,
208 /* per channel counters */
209 for (i = 0; i < priv->params.num_channels; i++)
210 for (j = 0; j < NUM_RQ_STATS; j++)
211 sprintf(data + (idx++) * ETH_GSTRING_LEN,
212 "rx%d_%s", i, rq_stats_strings[j]);
214 for (i = 0; i < priv->params.num_channels; i++)
215 for (tc = 0; tc < priv->params.num_tc; tc++)
216 for (j = 0; j < NUM_SQ_STATS; j++)
218 (idx++) * ETH_GSTRING_LEN,
220 sq_stats_strings[j]);
225 static void mlx5e_get_ethtool_stats(struct net_device *dev,
226 struct ethtool_stats *stats, u64 *data)
228 struct mlx5e_priv *priv = netdev_priv(dev);
229 int i, j, tc, idx = 0;
234 mutex_lock(&priv->state_lock);
235 if (test_bit(MLX5E_STATE_OPENED, &priv->state))
236 mlx5e_update_stats(priv);
237 mutex_unlock(&priv->state_lock);
239 for (i = 0; i < NUM_VPORT_COUNTERS; i++)
240 data[idx++] = ((u64 *)&priv->stats.vport)[i];
242 for (i = 0; i < NUM_PPORT_COUNTERS; i++)
243 data[idx++] = be64_to_cpu(((__be64 *)&priv->stats.pport)[i]);
245 /* per channel counters */
246 for (i = 0; i < priv->params.num_channels; i++)
247 for (j = 0; j < NUM_RQ_STATS; j++)
248 data[idx++] = !test_bit(MLX5E_STATE_OPENED,
250 ((u64 *)&priv->channel[i]->rq.stats)[j];
252 for (i = 0; i < priv->params.num_channels; i++)
253 for (tc = 0; tc < priv->params.num_tc; tc++)
254 for (j = 0; j < NUM_SQ_STATS; j++)
255 data[idx++] = !test_bit(MLX5E_STATE_OPENED,
257 ((u64 *)&priv->channel[i]->sq[tc].stats)[j];
260 static void mlx5e_get_ringparam(struct net_device *dev,
261 struct ethtool_ringparam *param)
263 struct mlx5e_priv *priv = netdev_priv(dev);
265 param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
266 param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
267 param->rx_pending = 1 << priv->params.log_rq_size;
268 param->tx_pending = 1 << priv->params.log_sq_size;
271 static int mlx5e_set_ringparam(struct net_device *dev,
272 struct ethtool_ringparam *param)
274 struct mlx5e_priv *priv = netdev_priv(dev);
281 if (param->rx_jumbo_pending) {
282 netdev_info(dev, "%s: rx_jumbo_pending not supported\n",
286 if (param->rx_mini_pending) {
287 netdev_info(dev, "%s: rx_mini_pending not supported\n",
291 if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
292 netdev_info(dev, "%s: rx_pending (%d) < min (%d)\n",
293 __func__, param->rx_pending,
294 1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
297 if (param->rx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE)) {
298 netdev_info(dev, "%s: rx_pending (%d) > max (%d)\n",
299 __func__, param->rx_pending,
300 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE);
303 if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
304 netdev_info(dev, "%s: tx_pending (%d) < min (%d)\n",
305 __func__, param->tx_pending,
306 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
309 if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
310 netdev_info(dev, "%s: tx_pending (%d) > max (%d)\n",
311 __func__, param->tx_pending,
312 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
316 log_rq_size = order_base_2(param->rx_pending);
317 log_sq_size = order_base_2(param->tx_pending);
318 min_rx_wqes = min_t(u16, param->rx_pending - 1,
319 MLX5E_PARAMS_DEFAULT_MIN_RX_WQES);
321 if (log_rq_size == priv->params.log_rq_size &&
322 log_sq_size == priv->params.log_sq_size &&
323 min_rx_wqes == priv->params.min_rx_wqes)
326 mutex_lock(&priv->state_lock);
328 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
330 mlx5e_close_locked(dev);
332 priv->params.log_rq_size = log_rq_size;
333 priv->params.log_sq_size = log_sq_size;
334 priv->params.min_rx_wqes = min_rx_wqes;
337 err = mlx5e_open_locked(dev);
339 mutex_unlock(&priv->state_lock);
344 static void mlx5e_get_channels(struct net_device *dev,
345 struct ethtool_channels *ch)
347 struct mlx5e_priv *priv = netdev_priv(dev);
349 ch->max_combined = mlx5e_get_max_num_channels(priv->mdev);
350 ch->combined_count = priv->params.num_channels;
353 static int mlx5e_set_channels(struct net_device *dev,
354 struct ethtool_channels *ch)
356 struct mlx5e_priv *priv = netdev_priv(dev);
357 int ncv = mlx5e_get_max_num_channels(priv->mdev);
358 unsigned int count = ch->combined_count;
363 netdev_info(dev, "%s: combined_count=0 not supported\n",
367 if (ch->rx_count || ch->tx_count) {
368 netdev_info(dev, "%s: separate rx/tx count not supported\n",
373 netdev_info(dev, "%s: count (%d) > max (%d)\n",
374 __func__, count, ncv);
378 if (priv->params.num_channels == count)
381 mutex_lock(&priv->state_lock);
383 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
385 mlx5e_close_locked(dev);
387 priv->params.num_channels = count;
390 err = mlx5e_open_locked(dev);
392 mutex_unlock(&priv->state_lock);
397 static int mlx5e_get_coalesce(struct net_device *netdev,
398 struct ethtool_coalesce *coal)
400 struct mlx5e_priv *priv = netdev_priv(netdev);
402 if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
405 coal->rx_coalesce_usecs = priv->params.rx_cq_moderation_usec;
406 coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation_pkts;
407 coal->tx_coalesce_usecs = priv->params.tx_cq_moderation_usec;
408 coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation_pkts;
413 static int mlx5e_set_coalesce(struct net_device *netdev,
414 struct ethtool_coalesce *coal)
416 struct mlx5e_priv *priv = netdev_priv(netdev);
417 struct mlx5_core_dev *mdev = priv->mdev;
418 struct mlx5e_channel *c;
422 if (!MLX5_CAP_GEN(mdev, cq_moderation))
425 mutex_lock(&priv->state_lock);
426 priv->params.tx_cq_moderation_usec = coal->tx_coalesce_usecs;
427 priv->params.tx_cq_moderation_pkts = coal->tx_max_coalesced_frames;
428 priv->params.rx_cq_moderation_usec = coal->rx_coalesce_usecs;
429 priv->params.rx_cq_moderation_pkts = coal->rx_max_coalesced_frames;
431 if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
434 for (i = 0; i < priv->params.num_channels; ++i) {
435 c = priv->channel[i];
437 for (tc = 0; tc < c->num_tc; tc++) {
438 mlx5_core_modify_cq_moderation(mdev,
440 coal->tx_coalesce_usecs,
441 coal->tx_max_coalesced_frames);
444 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
445 coal->rx_coalesce_usecs,
446 coal->rx_max_coalesced_frames);
450 mutex_unlock(&priv->state_lock);
454 static u32 ptys2ethtool_supported_link(u32 eth_proto_cap)
457 u32 supported_modes = 0;
459 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
460 if (eth_proto_cap & MLX5E_PROT_MASK(i))
461 supported_modes |= ptys2ethtool_table[i].supported;
463 return supported_modes;
466 static u32 ptys2ethtool_adver_link(u32 eth_proto_cap)
469 u32 advertising_modes = 0;
471 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
472 if (eth_proto_cap & MLX5E_PROT_MASK(i))
473 advertising_modes |= ptys2ethtool_table[i].advertised;
475 return advertising_modes;
478 static u32 ptys2ethtool_supported_port(u32 eth_proto_cap)
480 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
481 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
482 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
483 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
484 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
485 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
486 return SUPPORTED_FIBRE;
489 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
490 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
491 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
492 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
493 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
494 return SUPPORTED_Backplane;
499 static void get_speed_duplex(struct net_device *netdev,
501 struct ethtool_cmd *cmd)
504 u32 speed = SPEED_UNKNOWN;
505 u8 duplex = DUPLEX_UNKNOWN;
507 if (!netif_carrier_ok(netdev))
510 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
511 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
512 speed = ptys2ethtool_table[i].speed;
513 duplex = DUPLEX_FULL;
518 ethtool_cmd_speed_set(cmd, speed);
519 cmd->duplex = duplex;
522 static void get_supported(u32 eth_proto_cap, u32 *supported)
524 *supported |= ptys2ethtool_supported_port(eth_proto_cap);
525 *supported |= ptys2ethtool_supported_link(eth_proto_cap);
526 *supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
529 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
530 u8 rx_pause, u32 *advertising)
532 *advertising |= ptys2ethtool_adver_link(eth_proto_cap);
533 *advertising |= tx_pause ? ADVERTISED_Pause : 0;
534 *advertising |= (tx_pause ^ rx_pause) ? ADVERTISED_Asym_Pause : 0;
537 static u8 get_connector_port(u32 eth_proto)
539 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
540 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
541 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
542 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
546 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
547 | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
548 | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
552 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
553 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
554 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
555 | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
562 static void get_lp_advertising(u32 eth_proto_lp, u32 *lp_advertising)
564 *lp_advertising = ptys2ethtool_adver_link(eth_proto_lp);
567 static int mlx5e_get_settings(struct net_device *netdev,
568 struct ethtool_cmd *cmd)
570 struct mlx5e_priv *priv = netdev_priv(netdev);
571 struct mlx5_core_dev *mdev = priv->mdev;
572 u32 out[MLX5_ST_SZ_DW(ptys_reg)];
579 err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
582 netdev_err(netdev, "%s: query port ptys failed: %d\n",
587 eth_proto_cap = MLX5_GET(ptys_reg, out, eth_proto_capability);
588 eth_proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);
589 eth_proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper);
590 eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
593 cmd->advertising = 0;
595 get_supported(eth_proto_cap, &cmd->supported);
596 get_advertising(eth_proto_admin, 0, 0, &cmd->advertising);
597 get_speed_duplex(netdev, eth_proto_oper, cmd);
599 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
601 cmd->port = get_connector_port(eth_proto_oper);
602 get_lp_advertising(eth_proto_lp, &cmd->lp_advertising);
604 cmd->transceiver = XCVR_INTERNAL;
610 static u32 mlx5e_ethtool2ptys_adver_link(u32 link_modes)
612 u32 i, ptys_modes = 0;
614 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
615 if (ptys2ethtool_table[i].advertised & link_modes)
616 ptys_modes |= MLX5E_PROT_MASK(i);
622 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
624 u32 i, speed_links = 0;
626 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
627 if (ptys2ethtool_table[i].speed == speed)
628 speed_links |= MLX5E_PROT_MASK(i);
634 static int mlx5e_set_settings(struct net_device *netdev,
635 struct ethtool_cmd *cmd)
637 struct mlx5e_priv *priv = netdev_priv(netdev);
638 struct mlx5_core_dev *mdev = priv->mdev;
641 u32 eth_proto_cap, eth_proto_admin;
642 enum mlx5_port_status ps;
645 speed = ethtool_cmd_speed(cmd);
647 link_modes = cmd->autoneg == AUTONEG_ENABLE ?
648 mlx5e_ethtool2ptys_adver_link(cmd->advertising) :
649 mlx5e_ethtool2ptys_speed_link(speed);
651 err = mlx5_query_port_proto_cap(mdev, ð_proto_cap, MLX5_PTYS_EN);
653 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
658 link_modes = link_modes & eth_proto_cap;
660 netdev_err(netdev, "%s: Not supported link mode(s) requested",
666 err = mlx5_query_port_proto_admin(mdev, ð_proto_admin, MLX5_PTYS_EN);
668 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
673 if (link_modes == eth_proto_admin)
676 mlx5_query_port_admin_status(mdev, &ps);
677 if (ps == MLX5_PORT_UP)
678 mlx5_set_port_admin_status(mdev, MLX5_PORT_DOWN);
679 mlx5_set_port_proto(mdev, link_modes, MLX5_PTYS_EN);
680 if (ps == MLX5_PORT_UP)
681 mlx5_set_port_admin_status(mdev, MLX5_PORT_UP);
687 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
689 struct mlx5e_priv *priv = netdev_priv(netdev);
691 return sizeof(priv->params.toeplitz_hash_key);
694 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
696 return MLX5E_INDIR_RQT_SIZE;
699 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
702 struct mlx5e_priv *priv = netdev_priv(netdev);
705 memcpy(indir, priv->params.indirection_rqt,
706 sizeof(priv->params.indirection_rqt));
709 memcpy(key, priv->params.toeplitz_hash_key,
710 sizeof(priv->params.toeplitz_hash_key));
713 *hfunc = priv->params.rss_hfunc;
718 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
719 const u8 *key, const u8 hfunc)
721 struct mlx5e_priv *priv = netdev_priv(dev);
725 if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
726 (hfunc != ETH_RSS_HASH_XOR) &&
727 (hfunc != ETH_RSS_HASH_TOP))
730 mutex_lock(&priv->state_lock);
733 memcpy(priv->params.indirection_rqt, indir,
734 sizeof(priv->params.indirection_rqt));
735 mlx5e_redirect_rqt(priv, MLX5E_INDIRECTION_RQT);
738 close_open = (key || (hfunc != ETH_RSS_HASH_NO_CHANGE)) &&
739 test_bit(MLX5E_STATE_OPENED, &priv->state);
741 mlx5e_close_locked(dev);
744 memcpy(priv->params.toeplitz_hash_key, key,
745 sizeof(priv->params.toeplitz_hash_key));
747 if (hfunc != ETH_RSS_HASH_NO_CHANGE)
748 priv->params.rss_hfunc = hfunc;
751 err = mlx5e_open_locked(priv->netdev);
753 mutex_unlock(&priv->state_lock);
758 static int mlx5e_get_rxnfc(struct net_device *netdev,
759 struct ethtool_rxnfc *info, u32 *rule_locs)
761 struct mlx5e_priv *priv = netdev_priv(netdev);
765 case ETHTOOL_GRXRINGS:
766 info->data = priv->params.num_channels;
776 static int mlx5e_get_tunable(struct net_device *dev,
777 const struct ethtool_tunable *tuna,
780 const struct mlx5e_priv *priv = netdev_priv(dev);
784 case ETHTOOL_TX_COPYBREAK:
785 *(u32 *)data = priv->params.tx_max_inline;
795 static int mlx5e_set_tunable(struct net_device *dev,
796 const struct ethtool_tunable *tuna,
799 struct mlx5e_priv *priv = netdev_priv(dev);
800 struct mlx5_core_dev *mdev = priv->mdev;
806 case ETHTOOL_TX_COPYBREAK:
808 if (val > mlx5e_get_max_inline_cap(mdev)) {
813 mutex_lock(&priv->state_lock);
815 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
817 mlx5e_close_locked(dev);
819 priv->params.tx_max_inline = val;
822 err = mlx5e_open_locked(dev);
824 mutex_unlock(&priv->state_lock);
834 static void mlx5e_get_pauseparam(struct net_device *netdev,
835 struct ethtool_pauseparam *pauseparam)
837 struct mlx5e_priv *priv = netdev_priv(netdev);
838 struct mlx5_core_dev *mdev = priv->mdev;
841 err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
842 &pauseparam->tx_pause);
844 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
849 static int mlx5e_set_pauseparam(struct net_device *netdev,
850 struct ethtool_pauseparam *pauseparam)
852 struct mlx5e_priv *priv = netdev_priv(netdev);
853 struct mlx5_core_dev *mdev = priv->mdev;
856 if (pauseparam->autoneg)
859 err = mlx5_set_port_pause(mdev,
860 pauseparam->rx_pause ? 1 : 0,
861 pauseparam->tx_pause ? 1 : 0);
863 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
870 const struct ethtool_ops mlx5e_ethtool_ops = {
871 .get_drvinfo = mlx5e_get_drvinfo,
872 .get_link = ethtool_op_get_link,
873 .get_strings = mlx5e_get_strings,
874 .get_sset_count = mlx5e_get_sset_count,
875 .get_ethtool_stats = mlx5e_get_ethtool_stats,
876 .get_ringparam = mlx5e_get_ringparam,
877 .set_ringparam = mlx5e_set_ringparam,
878 .get_channels = mlx5e_get_channels,
879 .set_channels = mlx5e_set_channels,
880 .get_coalesce = mlx5e_get_coalesce,
881 .set_coalesce = mlx5e_set_coalesce,
882 .get_settings = mlx5e_get_settings,
883 .set_settings = mlx5e_set_settings,
884 .get_rxfh_key_size = mlx5e_get_rxfh_key_size,
885 .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
886 .get_rxfh = mlx5e_get_rxfh,
887 .set_rxfh = mlx5e_set_rxfh,
888 .get_rxnfc = mlx5e_get_rxnfc,
889 .get_tunable = mlx5e_get_tunable,
890 .set_tunable = mlx5e_set_tunable,
891 .get_pauseparam = mlx5e_get_pauseparam,
892 .set_pauseparam = mlx5e_set_pauseparam,