kernel/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2015 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <scsi/fc/fc_fcoe.h>
  53 #include <net/vxlan.h>
  54
  55 #ifdef CONFIG_OF
  56 #include <linux/of_net.h>
  57 #endif
  58
  59 #ifdef CONFIG_SPARC
  60 #include <asm/idprom.h>
  61 #include <asm/prom.h>
  62 #endif
  63
  64 #include "ixgbe.h"
  65 #include "ixgbe_common.h"
  66 #include "ixgbe_dcb_82599.h"
  67 #include "ixgbe_sriov.h"
  68 #ifdef CONFIG_IXGBE_VXLAN
  69 #include <net/vxlan.h>
  70 #endif
  71
  72 char ixgbe_driver_name[] = "ixgbe";
  73 static const char ixgbe_driver_string[] =
  74                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  75 #ifdef IXGBE_FCOE
  76 char ixgbe_default_device_descr[] =
  77                               "Intel(R) 10 Gigabit Network Connection";
  78 #else
  79 static char ixgbe_default_device_descr[] =
  80                               "Intel(R) 10 Gigabit Network Connection";
  81 #endif
  82 #define DRV_VERSION "4.2.1-k"
  83 const char ixgbe_driver_version[] = DRV_VERSION;
  84 static const char ixgbe_copyright[] =
  85                                 "Copyright (c) 1999-2015 Intel Corporation.";
  86
  87 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  88
  89 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  90         [board_82598]           = &ixgbe_82598_info,
  91         [board_82599]           = &ixgbe_82599_info,
  92         [board_X540]            = &ixgbe_X540_info,
  93         [board_X550]            = &ixgbe_X550_info,
  94         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  95 };
  96
  97 /* ixgbe_pci_tbl - PCI Device ID Table
  98  *
  99  * Wildcard entries (PCI_ANY_ID) should come last
 100  * Last entry must be all 0s
 101  *
 102  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 103  *   Class, Class Mask, private data (not used) }
 104  */
 105 static const struct pci_device_id ixgbe_pci_tbl[] = {
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 141         /* required last entry */
 142         {0, }
 143 };
 144 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 145
 146 #ifdef CONFIG_IXGBE_DCA
 147 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 148                             void *p);
 149 static struct notifier_block dca_notifier = {
 150         .notifier_call = ixgbe_notify_dca,
 151         .next          = NULL,
 152         .priority      = 0
 153 };
 154 #endif
 155
 156 #ifdef CONFIG_PCI_IOV
 157 static unsigned int max_vfs;
 158 module_param(max_vfs, uint, 0);
 159 MODULE_PARM_DESC(max_vfs,
 160                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 161 #endif /* CONFIG_PCI_IOV */
 162
 163 static unsigned int allow_unsupported_sfp;
 164 module_param(allow_unsupported_sfp, uint, 0);
 165 MODULE_PARM_DESC(allow_unsupported_sfp,
 166                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 167
 168 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 169 static int debug = -1;
 170 module_param(debug, int, 0);
 171 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 172
 173 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 174 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 175 MODULE_LICENSE("GPL");
 176 MODULE_VERSION(DRV_VERSION);
 177
 178 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 179
 180 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 181                                           u32 reg, u16 *value)
 182 {
 183         struct pci_dev *parent_dev;
 184         struct pci_bus *parent_bus;
 185
 186         parent_bus = adapter->pdev->bus->parent;
 187         if (!parent_bus)
 188                 return -1;
 189
 190         parent_dev = parent_bus->self;
 191         if (!parent_dev)
 192                 return -1;
 193
 194         if (!pci_is_pcie(parent_dev))
 195                 return -1;
 196
 197         pcie_capability_read_word(parent_dev, reg, value);
 198         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 199             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 200                 return -1;
 201         return 0;
 202 }
 203
 204 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 205 {
 206         struct ixgbe_hw *hw = &adapter->hw;
 207         u16 link_status = 0;
 208         int err;
 209
 210         hw->bus.type = ixgbe_bus_type_pci_express;
 211
 212         /* Get the negotiated link width and speed from PCI config space of the
 213          * parent, as this device is behind a switch
 214          */
 215         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 216
 217         /* assume caller will handle error case */
 218         if (err)
 219                 return err;
 220
 221         hw->bus.width = ixgbe_convert_bus_width(link_status);
 222         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 223
 224         return 0;
 225 }
 226
 227 /**
 228  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 229  * @hw: hw specific details
 230  *
 231  * This function is used by probe to determine whether a device's PCI-Express
 232  * bandwidth details should be gathered from the parent bus instead of from the
 233  * device. Used to ensure that various locations all have the correct device ID
 234  * checks.
 235  */
 236 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 237 {
 238         switch (hw->device_id) {
 239         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 240         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 241                 return true;
 242         default:
 243                 return false;
 244         }
 245 }
 246
 247 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 248                                      int expected_gts)
 249 {
 250         struct ixgbe_hw *hw = &adapter->hw;
 251         int max_gts = 0;
 252         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 253         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 254         struct pci_dev *pdev;
 255
 256         /* Some devices are not connected over PCIe and thus do not negotiate
 257          * speed. These devices do not have valid bus info, and thus any report
 258          * we generate may not be correct.
 259          */
 260         if (hw->bus.type == ixgbe_bus_type_internal)
 261                 return;
 262
 263         /* determine whether to use the parent device */
 264         if (ixgbe_pcie_from_parent(&adapter->hw))
 265                 pdev = adapter->pdev->bus->parent->self;
 266         else
 267                 pdev = adapter->pdev;
 268
 269         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 270             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 271                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 272                 return;
 273         }
 274
 275         switch (speed) {
 276         case PCIE_SPEED_2_5GT:
 277                 /* 8b/10b encoding reduces max throughput by 20% */
 278                 max_gts = 2 * width;
 279                 break;
 280         case PCIE_SPEED_5_0GT:
 281                 /* 8b/10b encoding reduces max throughput by 20% */
 282                 max_gts = 4 * width;
 283                 break;
 284         case PCIE_SPEED_8_0GT:
 285                 /* 128b/130b encoding reduces throughput by less than 2% */
 286                 max_gts = 8 * width;
 287                 break;
 288         default:
 289                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 290                 return;
 291         }
 292
 293         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 294                    max_gts);
 295         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 296                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 297                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 298                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 299                     "Unknown"),
 300                    width,
 301                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 302                     speed == PCIE_SPEED_5_0GT ? "20%" :
 303                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 304                     "Unknown"));
 305
 306         if (max_gts < expected_gts) {
 307                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 308                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 309                         expected_gts);
 310                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 311         }
 312 }
 313
 314 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 315 {
 316         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 317             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 318             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 319                 schedule_work(&adapter->service_task);
 320 }
 321
 322 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 323 {
 324         struct ixgbe_adapter *adapter = hw->back;
 325
 326         if (!hw->hw_addr)
 327                 return;
 328         hw->hw_addr = NULL;
 329         e_dev_err("Adapter removed\n");
 330         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 331                 ixgbe_service_event_schedule(adapter);
 332 }
 333
 334 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 335 {
 336         u32 value;
 337
 338         /* The following check not only optimizes a bit by not
 339          * performing a read on the status register when the
 340          * register just read was a status register read that
 341          * returned IXGBE_FAILED_READ_REG. It also blocks any
 342          * potential recursion.
 343          */
 344         if (reg == IXGBE_STATUS) {
 345                 ixgbe_remove_adapter(hw);
 346                 return;
 347         }
 348         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 349         if (value == IXGBE_FAILED_READ_REG)
 350                 ixgbe_remove_adapter(hw);
 351 }
 352
 353 /**
 354  * ixgbe_read_reg - Read from device register
 355  * @hw: hw specific details
 356  * @reg: offset of register to read
 357  *
 358  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 359  *
 360  * This function is used to read device registers. It checks for device
 361  * removal by confirming any read that returns all ones by checking the
 362  * status register value for all ones. This function avoids reading from
 363  * the hardware if a removal was previously detected in which case it
 364  * returns IXGBE_FAILED_READ_REG (all ones).
 365  */
 366 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 367 {
 368         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 369         u32 value;
 370
 371         if (ixgbe_removed(reg_addr))
 372                 return IXGBE_FAILED_READ_REG;
 373         value = readl(reg_addr + reg);
 374         if (unlikely(value == IXGBE_FAILED_READ_REG))
 375                 ixgbe_check_remove(hw, reg);
 376         return value;
 377 }
 378
 379 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 380 {
 381         u16 value;
 382
 383         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 384         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 385                 ixgbe_remove_adapter(hw);
 386                 return true;
 387         }
 388         return false;
 389 }
 390
 391 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 392 {
 393         struct ixgbe_adapter *adapter = hw->back;
 394         u16 value;
 395
 396         if (ixgbe_removed(hw->hw_addr))
 397                 return IXGBE_FAILED_READ_CFG_WORD;
 398         pci_read_config_word(adapter->pdev, reg, &value);
 399         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 400             ixgbe_check_cfg_remove(hw, adapter->pdev))
 401                 return IXGBE_FAILED_READ_CFG_WORD;
 402         return value;
 403 }
 404
 405 #ifdef CONFIG_PCI_IOV
 406 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 407 {
 408         struct ixgbe_adapter *adapter = hw->back;
 409         u32 value;
 410
 411         if (ixgbe_removed(hw->hw_addr))
 412                 return IXGBE_FAILED_READ_CFG_DWORD;
 413         pci_read_config_dword(adapter->pdev, reg, &value);
 414         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 415             ixgbe_check_cfg_remove(hw, adapter->pdev))
 416                 return IXGBE_FAILED_READ_CFG_DWORD;
 417         return value;
 418 }
 419 #endif /* CONFIG_PCI_IOV */
 420
 421 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 422 {
 423         struct ixgbe_adapter *adapter = hw->back;
 424
 425         if (ixgbe_removed(hw->hw_addr))
 426                 return;
 427         pci_write_config_word(adapter->pdev, reg, value);
 428 }
 429
 430 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 431 {
 432         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 433
 434         /* flush memory to make sure state is correct before next watchdog */
 435         smp_mb__before_atomic();
 436         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 437 }
 438
 439 struct ixgbe_reg_info {
 440         u32 ofs;
 441         char *name;
 442 };
 443
 444 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 445
 446         /* General Registers */
 447         {IXGBE_CTRL, "CTRL"},
 448         {IXGBE_STATUS, "STATUS"},
 449         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 450
 451         /* Interrupt Registers */
 452         {IXGBE_EICR, "EICR"},
 453
 454         /* RX Registers */
 455         {IXGBE_SRRCTL(0), "SRRCTL"},
 456         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 457         {IXGBE_RDLEN(0), "RDLEN"},
 458         {IXGBE_RDH(0), "RDH"},
 459         {IXGBE_RDT(0), "RDT"},
 460         {IXGBE_RXDCTL(0), "RXDCTL"},
 461         {IXGBE_RDBAL(0), "RDBAL"},
 462         {IXGBE_RDBAH(0), "RDBAH"},
 463
 464         /* TX Registers */
 465         {IXGBE_TDBAL(0), "TDBAL"},
 466         {IXGBE_TDBAH(0), "TDBAH"},
 467         {IXGBE_TDLEN(0), "TDLEN"},
 468         {IXGBE_TDH(0), "TDH"},
 469         {IXGBE_TDT(0), "TDT"},
 470         {IXGBE_TXDCTL(0), "TXDCTL"},
 471
 472         /* List Terminator */
 473         { .name = NULL }
 474 };
 475
 476
 477 /*
 478  * ixgbe_regdump - register printout routine
 479  */
 480 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 481 {
 482         int i = 0, j = 0;
 483         char rname[16];
 484         u32 regs[64];
 485
 486         switch (reginfo->ofs) {
 487         case IXGBE_SRRCTL(0):
 488                 for (i = 0; i < 64; i++)
 489                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 490                 break;
 491         case IXGBE_DCA_RXCTRL(0):
 492                 for (i = 0; i < 64; i++)
 493                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 494                 break;
 495         case IXGBE_RDLEN(0):
 496                 for (i = 0; i < 64; i++)
 497                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 498                 break;
 499         case IXGBE_RDH(0):
 500                 for (i = 0; i < 64; i++)
 501                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 502                 break;
 503         case IXGBE_RDT(0):
 504                 for (i = 0; i < 64; i++)
 505                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 506                 break;
 507         case IXGBE_RXDCTL(0):
 508                 for (i = 0; i < 64; i++)
 509                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 510                 break;
 511         case IXGBE_RDBAL(0):
 512                 for (i = 0; i < 64; i++)
 513                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 514                 break;
 515         case IXGBE_RDBAH(0):
 516                 for (i = 0; i < 64; i++)
 517                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 518                 break;
 519         case IXGBE_TDBAL(0):
 520                 for (i = 0; i < 64; i++)
 521                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 522                 break;
 523         case IXGBE_TDBAH(0):
 524                 for (i = 0; i < 64; i++)
 525                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 526                 break;
 527         case IXGBE_TDLEN(0):
 528                 for (i = 0; i < 64; i++)
 529                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 530                 break;
 531         case IXGBE_TDH(0):
 532                 for (i = 0; i < 64; i++)
 533                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 534                 break;
 535         case IXGBE_TDT(0):
 536                 for (i = 0; i < 64; i++)
 537                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 538                 break;
 539         case IXGBE_TXDCTL(0):
 540                 for (i = 0; i < 64; i++)
 541                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 542                 break;
 543         default:
 544                 pr_info("%-15s %08x\n", reginfo->name,
 545                         IXGBE_READ_REG(hw, reginfo->ofs));
 546                 return;
 547         }
 548
 549         for (i = 0; i < 8; i++) {
 550                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
 551                 pr_err("%-15s", rname);
 552                 for (j = 0; j < 8; j++)
 553                         pr_cont(" %08x", regs[i*8+j]);
 554                 pr_cont("\n");
 555         }
 556
 557 }
 558
 559 /*
 560  * ixgbe_dump - Print registers, tx-rings and rx-rings
 561  */
 562 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 563 {
 564         struct net_device *netdev = adapter->netdev;
 565         struct ixgbe_hw *hw = &adapter->hw;
 566         struct ixgbe_reg_info *reginfo;
 567         int n = 0;
 568         struct ixgbe_ring *tx_ring;
 569         struct ixgbe_tx_buffer *tx_buffer;
 570         union ixgbe_adv_tx_desc *tx_desc;
 571         struct my_u0 { u64 a; u64 b; } *u0;
 572         struct ixgbe_ring *rx_ring;
 573         union ixgbe_adv_rx_desc *rx_desc;
 574         struct ixgbe_rx_buffer *rx_buffer_info;
 575         u32 staterr;
 576         int i = 0;
 577
 578         if (!netif_msg_hw(adapter))
 579                 return;
 580
 581         /* Print netdevice Info */
 582         if (netdev) {
 583                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 584                 pr_info("Device Name     state            "
 585                         "trans_start      last_rx\n");
 586                 pr_info("%-15s %016lX %016lX %016lX\n",
 587                         netdev->name,
 588                         netdev->state,
 589                         netdev->trans_start,
 590                         netdev->last_rx);
 591         }
 592
 593         /* Print Registers */
 594         dev_info(&adapter->pdev->dev, "Register Dump\n");
 595         pr_info(" Register Name   Value\n");
 596         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 597              reginfo->name; reginfo++) {
 598                 ixgbe_regdump(hw, reginfo);
 599         }
 600
 601         /* Print TX Ring Summary */
 602         if (!netdev || !netif_running(netdev))
 603                 return;
 604
 605         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 606         pr_info(" %s     %s              %s        %s\n",
 607                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 608                 "leng", "ntw", "timestamp");
 609         for (n = 0; n < adapter->num_tx_queues; n++) {
 610                 tx_ring = adapter->tx_ring[n];
 611                 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 612                 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 613                            n, tx_ring->next_to_use, tx_ring->next_to_clean,
 614                            (u64)dma_unmap_addr(tx_buffer, dma),
 615                            dma_unmap_len(tx_buffer, len),
 616                            tx_buffer->next_to_watch,
 617                            (u64)tx_buffer->time_stamp);
 618         }
 619
 620         /* Print TX Rings */
 621         if (!netif_msg_tx_done(adapter))
 622                 goto rx_ring_summary;
 623
 624         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 625
 626         /* Transmit Descriptor Formats
 627          *
 628          * 82598 Advanced Transmit Descriptor
 629          *   +--------------------------------------------------------------+
 630          * 0 |         Buffer Address [63:0]                                |
 631          *   +--------------------------------------------------------------+
 632          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 633          *   +--------------------------------------------------------------+
 634          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 635          *
 636          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 637          *   +--------------------------------------------------------------+
 638          * 0 |                          RSV [63:0]                          |
 639          *   +--------------------------------------------------------------+
 640          * 8 |            RSV           |  STA  |          NXTSEQ           |
 641          *   +--------------------------------------------------------------+
 642          *   63                       36 35   32 31                         0
 643          *
 644          * 82599+ Advanced Transmit Descriptor
 645          *   +--------------------------------------------------------------+
 646          * 0 |         Buffer Address [63:0]                                |
 647          *   +--------------------------------------------------------------+
 648          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 649          *   +--------------------------------------------------------------+
 650          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 651          *
 652          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 653          *   +--------------------------------------------------------------+
 654          * 0 |                          RSV [63:0]                          |
 655          *   +--------------------------------------------------------------+
 656          * 8 |            RSV           |  STA  |           RSV             |
 657          *   +--------------------------------------------------------------+
 658          *   63                       36 35   32 31                         0
 659          */
 660
 661         for (n = 0; n < adapter->num_tx_queues; n++) {
 662                 tx_ring = adapter->tx_ring[n];
 663                 pr_info("------------------------------------\n");
 664                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 665                 pr_info("------------------------------------\n");
 666                 pr_info("%s%s    %s              %s        %s          %s\n",
 667                         "T [desc]     [address 63:0  ] ",
 668                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 669                         "leng", "ntw", "timestamp", "bi->skb");
 670
 671                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 672                         tx_desc = IXGBE_TX_DESC(tx_ring, i);
 673                         tx_buffer = &tx_ring->tx_buffer_info[i];
 674                         u0 = (struct my_u0 *)tx_desc;
 675                         if (dma_unmap_len(tx_buffer, len) > 0) {
 676                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p",
 677                                         i,
 678                                         le64_to_cpu(u0->a),
 679                                         le64_to_cpu(u0->b),
 680                                         (u64)dma_unmap_addr(tx_buffer, dma),
 681                                         dma_unmap_len(tx_buffer, len),
 682                                         tx_buffer->next_to_watch,
 683                                         (u64)tx_buffer->time_stamp,
 684                                         tx_buffer->skb);
 685                                 if (i == tx_ring->next_to_use &&
 686                                         i == tx_ring->next_to_clean)
 687                                         pr_cont(" NTC/U\n");
 688                                 else if (i == tx_ring->next_to_use)
 689                                         pr_cont(" NTU\n");
 690                                 else if (i == tx_ring->next_to_clean)
 691                                         pr_cont(" NTC\n");
 692                                 else
 693                                         pr_cont("\n");
 694
 695                                 if (netif_msg_pktdata(adapter) &&
 696                                     tx_buffer->skb)
 697                                         print_hex_dump(KERN_INFO, "",
 698                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 699                                                 tx_buffer->skb->data,
 700                                                 dma_unmap_len(tx_buffer, len),
 701                                                 true);
 702                         }
 703                 }
 704         }
 705
 706         /* Print RX Rings Summary */
 707 rx_ring_summary:
 708         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 709         pr_info("Queue [NTU] [NTC]\n");
 710         for (n = 0; n < adapter->num_rx_queues; n++) {
 711                 rx_ring = adapter->rx_ring[n];
 712                 pr_info("%5d %5X %5X\n",
 713                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 714         }
 715
 716         /* Print RX Rings */
 717         if (!netif_msg_rx_status(adapter))
 718                 return;
 719
 720         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 721
 722         /* Receive Descriptor Formats
 723          *
 724          * 82598 Advanced Receive Descriptor (Read) Format
 725          *    63                                           1        0
 726          *    +-----------------------------------------------------+
 727          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 728          *    +----------------------------------------------+------+
 729          *  8 |       Header Buffer Address [63:1]           |  DD  |
 730          *    +-----------------------------------------------------+
 731          *
 732          *
 733          * 82598 Advanced Receive Descriptor (Write-Back) Format
 734          *
 735          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 736          *   +------------------------------------------------------+
 737          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 738          *   | Packet   | IP     |   |          |     | Type | Type |
 739          *   | Checksum | Ident  |   |          |     |      |      |
 740          *   +------------------------------------------------------+
 741          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 742          *   +------------------------------------------------------+
 743          *   63       48 47    32 31            20 19               0
 744          *
 745          * 82599+ Advanced Receive Descriptor (Read) Format
 746          *    63                                           1        0
 747          *    +-----------------------------------------------------+
 748          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 749          *    +----------------------------------------------+------+
 750          *  8 |       Header Buffer Address [63:1]           |  DD  |
 751          *    +-----------------------------------------------------+
 752          *
 753          *
 754          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 755          *
 756          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 757          *   +------------------------------------------------------+
 758          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 759          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 760          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 761          *   +------------------------------------------------------+
 762          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 763          *   +------------------------------------------------------+
 764          *   63       48 47    32 31          20 19                 0
 765          */
 766
 767         for (n = 0; n < adapter->num_rx_queues; n++) {
 768                 rx_ring = adapter->rx_ring[n];
 769                 pr_info("------------------------------------\n");
 770                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 771                 pr_info("------------------------------------\n");
 772                 pr_info("%s%s%s",
 773                         "R  [desc]      [ PktBuf     A0] ",
 774                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 775                         "<-- Adv Rx Read format\n");
 776                 pr_info("%s%s%s",
 777                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 778                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 779                         "<-- Adv Rx Write-Back format\n");
 780
 781                 for (i = 0; i < rx_ring->count; i++) {
 782                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 783                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 784                         u0 = (struct my_u0 *)rx_desc;
 785                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 786                         if (staterr & IXGBE_RXD_STAT_DD) {
 787                                 /* Descriptor Done */
 788                                 pr_info("RWB[0x%03X]     %016llX "
 789                                         "%016llX ---------------- %p", i,
 790                                         le64_to_cpu(u0->a),
 791                                         le64_to_cpu(u0->b),
 792                                         rx_buffer_info->skb);
 793                         } else {
 794                                 pr_info("R  [0x%03X]     %016llX "
 795                                         "%016llX %016llX %p", i,
 796                                         le64_to_cpu(u0->a),
 797                                         le64_to_cpu(u0->b),
 798                                         (u64)rx_buffer_info->dma,
 799                                         rx_buffer_info->skb);
 800
 801                                 if (netif_msg_pktdata(adapter) &&
 802                                     rx_buffer_info->dma) {
 803                                         print_hex_dump(KERN_INFO, "",
 804                                            DUMP_PREFIX_ADDRESS, 16, 1,
 805                                            page_address(rx_buffer_info->page) +
 806                                                     rx_buffer_info->page_offset,
 807                                            ixgbe_rx_bufsz(rx_ring), true);
 808                                 }
 809                         }
 810
 811                         if (i == rx_ring->next_to_use)
 812                                 pr_cont(" NTU\n");
 813                         else if (i == rx_ring->next_to_clean)
 814                                 pr_cont(" NTC\n");
 815                         else
 816                                 pr_cont("\n");
 817
 818                 }
 819         }
 820 }
 821
 822 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 823 {
 824         u32 ctrl_ext;
 825
 826         /* Let firmware take over control of h/w */
 827         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 828         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 829                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 830 }
 831
 832 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 833 {
 834         u32 ctrl_ext;
 835
 836         /* Let firmware know the driver has taken over */
 837         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 838         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 839                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 840 }
 841
 842 /**
 843  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 844  * @adapter: pointer to adapter struct
 845  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 846  * @queue: queue to map the corresponding interrupt to
 847  * @msix_vector: the vector to map to the corresponding queue
 848  *
 849  */
 850 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 851                            u8 queue, u8 msix_vector)
 852 {
 853         u32 ivar, index;
 854         struct ixgbe_hw *hw = &adapter->hw;
 855         switch (hw->mac.type) {
 856         case ixgbe_mac_82598EB:
 857                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 858                 if (direction == -1)
 859                         direction = 0;
 860                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 861                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 862                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 863                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 864                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 865                 break;
 866         case ixgbe_mac_82599EB:
 867         case ixgbe_mac_X540:
 868         case ixgbe_mac_X550:
 869         case ixgbe_mac_X550EM_x:
 870                 if (direction == -1) {
 871                         /* other causes */
 872                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 873                         index = ((queue & 1) * 8);
 874                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 875                         ivar &= ~(0xFF << index);
 876                         ivar |= (msix_vector << index);
 877                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 878                         break;
 879                 } else {
 880                         /* tx or rx causes */
 881                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 882                         index = ((16 * (queue & 1)) + (8 * direction));
 883                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 884                         ivar &= ~(0xFF << index);
 885                         ivar |= (msix_vector << index);
 886                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 887                         break;
 888                 }
 889         default:
 890                 break;
 891         }
 892 }
 893
 894 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 895                                           u64 qmask)
 896 {
 897         u32 mask;
 898
 899         switch (adapter->hw.mac.type) {
 900         case ixgbe_mac_82598EB:
 901                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 902                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 903                 break;
 904         case ixgbe_mac_82599EB:
 905         case ixgbe_mac_X540:
 906         case ixgbe_mac_X550:
 907         case ixgbe_mac_X550EM_x:
 908                 mask = (qmask & 0xFFFFFFFF);
 909                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 910                 mask = (qmask >> 32);
 911                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 912                 break;
 913         default:
 914                 break;
 915         }
 916 }
 917
 918 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
 919                                       struct ixgbe_tx_buffer *tx_buffer)
 920 {
 921         if (tx_buffer->skb) {
 922                 dev_kfree_skb_any(tx_buffer->skb);
 923                 if (dma_unmap_len(tx_buffer, len))
 924                         dma_unmap_single(ring->dev,
 925                                          dma_unmap_addr(tx_buffer, dma),
 926                                          dma_unmap_len(tx_buffer, len),
 927                                          DMA_TO_DEVICE);
 928         } else if (dma_unmap_len(tx_buffer, len)) {
 929                 dma_unmap_page(ring->dev,
 930                                dma_unmap_addr(tx_buffer, dma),
 931                                dma_unmap_len(tx_buffer, len),
 932                                DMA_TO_DEVICE);
 933         }
 934         tx_buffer->next_to_watch = NULL;
 935         tx_buffer->skb = NULL;
 936         dma_unmap_len_set(tx_buffer, len, 0);
 937         /* tx_buffer must be completely set up in the transmit path */
 938 }
 939
 940 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 941 {
 942         struct ixgbe_hw *hw = &adapter->hw;
 943         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 944         int i;
 945         u32 data;
 946
 947         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 948             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 949                 return;
 950
 951         switch (hw->mac.type) {
 952         case ixgbe_mac_82598EB:
 953                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 954                 break;
 955         default:
 956                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 957         }
 958         hwstats->lxoffrxc += data;
 959
 960         /* refill credits (no tx hang) if we received xoff */
 961         if (!data)
 962                 return;
 963
 964         for (i = 0; i < adapter->num_tx_queues; i++)
 965                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 966                           &adapter->tx_ring[i]->state);
 967 }
 968
 969 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 970 {
 971         struct ixgbe_hw *hw = &adapter->hw;
 972         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 973         u32 xoff[8] = {0};
 974         u8 tc;
 975         int i;
 976         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 977
 978         if (adapter->ixgbe_ieee_pfc)
 979                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 980
 981         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 982                 ixgbe_update_xoff_rx_lfc(adapter);
 983                 return;
 984         }
 985
 986         /* update stats for each tc, only valid with PFC enabled */
 987         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 988                 u32 pxoffrxc;
 989
 990                 switch (hw->mac.type) {
 991                 case ixgbe_mac_82598EB:
 992                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 993                         break;
 994                 default:
 995                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 996                 }
 997                 hwstats->pxoffrxc[i] += pxoffrxc;
 998                 /* Get the TC for given UP */
 999                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1000                 xoff[tc] += pxoffrxc;
1001         }
1002
1003         /* disarm tx queues that have received xoff frames */
1004         for (i = 0; i < adapter->num_tx_queues; i++) {
1005                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1006
1007                 tc = tx_ring->dcb_tc;
1008                 if (xoff[tc])
1009                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1010         }
1011 }
1012
1013 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1014 {
1015         return ring->stats.packets;
1016 }
1017
1018 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1019 {
1020         struct ixgbe_adapter *adapter;
1021         struct ixgbe_hw *hw;
1022         u32 head, tail;
1023
1024         if (ring->l2_accel_priv)
1025                 adapter = ring->l2_accel_priv->real_adapter;
1026         else
1027                 adapter = netdev_priv(ring->netdev);
1028
1029         hw = &adapter->hw;
1030         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1031         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1032
1033         if (head != tail)
1034                 return (head < tail) ?
1035                         tail - head : (tail + ring->count - head);
1036
1037         return 0;
1038 }
1039
1040 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1041 {
1042         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1043         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1044         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1045
1046         clear_check_for_tx_hang(tx_ring);
1047
1048         /*
1049          * Check for a hung queue, but be thorough. This verifies
1050          * that a transmit has been completed since the previous
1051          * check AND there is at least one packet pending. The
1052          * ARMED bit is set to indicate a potential hang. The
1053          * bit is cleared if a pause frame is received to remove
1054          * false hang detection due to PFC or 802.3x frames. By
1055          * requiring this to fail twice we avoid races with
1056          * pfc clearing the ARMED bit and conditions where we
1057          * run the check_tx_hang logic with a transmit completion
1058          * pending but without time to complete it yet.
1059          */
1060         if (tx_done_old == tx_done && tx_pending)
1061                 /* make sure it is true for two checks in a row */
1062                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1063                                         &tx_ring->state);
1064         /* update completed stats and continue */
1065         tx_ring->tx_stats.tx_done_old = tx_done;
1066         /* reset the countdown */
1067         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1068
1069         return false;
1070 }
1071
1072 /**
1073  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1074  * @adapter: driver private struct
1075  **/
1076 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1077 {
1078
1079         /* Do the reset outside of interrupt context */
1080         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1081                 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1082                 e_warn(drv, "initiating reset due to tx timeout\n");
1083                 ixgbe_service_event_schedule(adapter);
1084         }
1085 }
1086
1087 /**
1088  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1089  * @q_vector: structure containing interrupt and ring information
1090  * @tx_ring: tx ring to clean
1091  **/
1092 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1093                                struct ixgbe_ring *tx_ring)
1094 {
1095         struct ixgbe_adapter *adapter = q_vector->adapter;
1096         struct ixgbe_tx_buffer *tx_buffer;
1097         union ixgbe_adv_tx_desc *tx_desc;
1098         unsigned int total_bytes = 0, total_packets = 0;
1099         unsigned int budget = q_vector->tx.work_limit;
1100         unsigned int i = tx_ring->next_to_clean;
1101
1102         if (test_bit(__IXGBE_DOWN, &adapter->state))
1103                 return true;
1104
1105         tx_buffer = &tx_ring->tx_buffer_info[i];
1106         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1107         i -= tx_ring->count;
1108
1109         do {
1110                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1111
1112                 /* if next_to_watch is not set then there is no work pending */
1113                 if (!eop_desc)
1114                         break;
1115
1116                 /* prevent any other reads prior to eop_desc */
1117                 read_barrier_depends();
1118
1119                 /* if DD is not set pending work has not been completed */
1120                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1121                         break;
1122
1123                 /* clear next_to_watch to prevent false hangs */
1124                 tx_buffer->next_to_watch = NULL;
1125
1126                 /* update the statistics for this packet */
1127                 total_bytes += tx_buffer->bytecount;
1128                 total_packets += tx_buffer->gso_segs;
1129
1130                 /* free the skb */
1131                 dev_consume_skb_any(tx_buffer->skb);
1132
1133                 /* unmap skb header data */
1134                 dma_unmap_single(tx_ring->dev,
1135                                  dma_unmap_addr(tx_buffer, dma),
1136                                  dma_unmap_len(tx_buffer, len),
1137                                  DMA_TO_DEVICE);
1138
1139                 /* clear tx_buffer data */
1140                 tx_buffer->skb = NULL;
1141                 dma_unmap_len_set(tx_buffer, len, 0);
1142
1143                 /* unmap remaining buffers */
1144                 while (tx_desc != eop_desc) {
1145                         tx_buffer++;
1146                         tx_desc++;
1147                         i++;
1148                         if (unlikely(!i)) {
1149                                 i -= tx_ring->count;
1150                                 tx_buffer = tx_ring->tx_buffer_info;
1151                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1152                         }
1153
1154                         /* unmap any remaining paged data */
1155                         if (dma_unmap_len(tx_buffer, len)) {
1156                                 dma_unmap_page(tx_ring->dev,
1157                                                dma_unmap_addr(tx_buffer, dma),
1158                                                dma_unmap_len(tx_buffer, len),
1159                                                DMA_TO_DEVICE);
1160                                 dma_unmap_len_set(tx_buffer, len, 0);
1161                         }
1162                 }
1163
1164                 /* move us one more past the eop_desc for start of next pkt */
1165                 tx_buffer++;
1166                 tx_desc++;
1167                 i++;
1168                 if (unlikely(!i)) {
1169                         i -= tx_ring->count;
1170                         tx_buffer = tx_ring->tx_buffer_info;
1171                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1172                 }
1173
1174                 /* issue prefetch for next Tx descriptor */
1175                 prefetch(tx_desc);
1176
1177                 /* update budget accounting */
1178                 budget--;
1179         } while (likely(budget));
1180
1181         i += tx_ring->count;
1182         tx_ring->next_to_clean = i;
1183         u64_stats_update_begin(&tx_ring->syncp);
1184         tx_ring->stats.bytes += total_bytes;
1185         tx_ring->stats.packets += total_packets;
1186         u64_stats_update_end(&tx_ring->syncp);
1187         q_vector->tx.total_bytes += total_bytes;
1188         q_vector->tx.total_packets += total_packets;
1189
1190         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1191                 /* schedule immediate reset if we believe we hung */
1192                 struct ixgbe_hw *hw = &adapter->hw;
1193                 e_err(drv, "Detected Tx Unit Hang\n"
1194                         "  Tx Queue             <%d>\n"
1195                         "  TDH, TDT             <%x>, <%x>\n"
1196                         "  next_to_use          <%x>\n"
1197                         "  next_to_clean        <%x>\n"
1198                         "tx_buffer_info[next_to_clean]\n"
1199                         "  time_stamp           <%lx>\n"
1200                         "  jiffies              <%lx>\n",
1201                         tx_ring->queue_index,
1202                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1203                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1204                         tx_ring->next_to_use, i,
1205                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1206
1207                 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1208
1209                 e_info(probe,
1210                        "tx hang %d detected on queue %d, resetting adapter\n",
1211                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1212
1213                 /* schedule immediate reset if we believe we hung */
1214                 ixgbe_tx_timeout_reset(adapter);
1215
1216                 /* the adapter is about to reset, no point in enabling stuff */
1217                 return true;
1218         }
1219
1220         netdev_tx_completed_queue(txring_txq(tx_ring),
1221                                   total_packets, total_bytes);
1222
1223 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1224         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1225                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1226                 /* Make sure that anybody stopping the queue after this
1227                  * sees the new next_to_clean.
1228                  */
1229                 smp_mb();
1230                 if (__netif_subqueue_stopped(tx_ring->netdev,
1231                                              tx_ring->queue_index)
1232                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1233                         netif_wake_subqueue(tx_ring->netdev,
1234                                             tx_ring->queue_index);
1235                         ++tx_ring->tx_stats.restart_queue;
1236                 }
1237         }
1238
1239         return !!budget;
1240 }
1241
1242 #ifdef CONFIG_IXGBE_DCA
1243 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1244                                 struct ixgbe_ring *tx_ring,
1245                                 int cpu)
1246 {
1247         struct ixgbe_hw *hw = &adapter->hw;
1248         u32 txctrl = 0;
1249         u16 reg_offset;
1250
1251         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1252                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1253
1254         switch (hw->mac.type) {
1255         case ixgbe_mac_82598EB:
1256                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1257                 break;
1258         case ixgbe_mac_82599EB:
1259         case ixgbe_mac_X540:
1260                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1261                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1262                 break;
1263         default:
1264                 /* for unknown hardware do not write register */
1265                 return;
1266         }
1267
1268         /*
1269          * We can enable relaxed ordering for reads, but not writes when
1270          * DCA is enabled.  This is due to a known issue in some chipsets
1271          * which will cause the DCA tag to be cleared.
1272          */
1273         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1274                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1275                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1276
1277         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1278 }
1279
1280 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1281                                 struct ixgbe_ring *rx_ring,
1282                                 int cpu)
1283 {
1284         struct ixgbe_hw *hw = &adapter->hw;
1285         u32 rxctrl = 0;
1286         u8 reg_idx = rx_ring->reg_idx;
1287
1288         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1289                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1290
1291         switch (hw->mac.type) {
1292         case ixgbe_mac_82599EB:
1293         case ixgbe_mac_X540:
1294                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1295                 break;
1296         default:
1297                 break;
1298         }
1299
1300         /*
1301          * We can enable relaxed ordering for reads, but not writes when
1302          * DCA is enabled.  This is due to a known issue in some chipsets
1303          * which will cause the DCA tag to be cleared.
1304          */
1305         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1306                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1307                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1308
1309         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1310 }
1311
1312 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1313 {
1314         struct ixgbe_adapter *adapter = q_vector->adapter;
1315         struct ixgbe_ring *ring;
1316         int cpu = get_cpu();
1317
1318         if (q_vector->cpu == cpu)
1319                 goto out_no_update;
1320
1321         ixgbe_for_each_ring(ring, q_vector->tx)
1322                 ixgbe_update_tx_dca(adapter, ring, cpu);
1323
1324         ixgbe_for_each_ring(ring, q_vector->rx)
1325                 ixgbe_update_rx_dca(adapter, ring, cpu);
1326
1327         q_vector->cpu = cpu;
1328 out_no_update:
1329         put_cpu();
1330 }
1331
1332 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1333 {
1334         int i;
1335
1336         /* always use CB2 mode, difference is masked in the CB driver */
1337         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1338                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1339                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1340         else
1341                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1342                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1343
1344         for (i = 0; i < adapter->num_q_vectors; i++) {
1345                 adapter->q_vector[i]->cpu = -1;
1346                 ixgbe_update_dca(adapter->q_vector[i]);
1347         }
1348 }
1349
1350 static int __ixgbe_notify_dca(struct device *dev, void *data)
1351 {
1352         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1353         unsigned long event = *(unsigned long *)data;
1354
1355         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1356                 return 0;
1357
1358         switch (event) {
1359         case DCA_PROVIDER_ADD:
1360                 /* if we're already enabled, don't do it again */
1361                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1362                         break;
1363                 if (dca_add_requester(dev) == 0) {
1364                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1365                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1366                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1367                         break;
1368                 }
1369                 /* Fall Through since DCA is disabled. */
1370         case DCA_PROVIDER_REMOVE:
1371                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1372                         dca_remove_requester(dev);
1373                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1374                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1375                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1376                 }
1377                 break;
1378         }
1379
1380         return 0;
1381 }
1382
1383 #endif /* CONFIG_IXGBE_DCA */
1384
1385 #define IXGBE_RSS_L4_TYPES_MASK \
1386         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1387          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1388          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1389          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1390
1391 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1392                                  union ixgbe_adv_rx_desc *rx_desc,
1393                                  struct sk_buff *skb)
1394 {
1395         u16 rss_type;
1396
1397         if (!(ring->netdev->features & NETIF_F_RXHASH))
1398                 return;
1399
1400         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1401                    IXGBE_RXDADV_RSSTYPE_MASK;
1402
1403         if (!rss_type)
1404                 return;
1405
1406         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1407                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1408                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1409 }
1410
1411 #ifdef IXGBE_FCOE
1412 /**
1413  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1414  * @ring: structure containing ring specific data
1415  * @rx_desc: advanced rx descriptor
1416  *
1417  * Returns : true if it is FCoE pkt
1418  */
1419 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1420                                     union ixgbe_adv_rx_desc *rx_desc)
1421 {
1422         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1423
1424         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1425                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1426                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1427                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1428 }
1429
1430 #endif /* IXGBE_FCOE */
1431 /**
1432  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1433  * @ring: structure containing ring specific data
1434  * @rx_desc: current Rx descriptor being processed
1435  * @skb: skb currently being received and modified
1436  **/
1437 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1438                                      union ixgbe_adv_rx_desc *rx_desc,
1439                                      struct sk_buff *skb)
1440 {
1441         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1442         __le16 hdr_info = rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
1443         bool encap_pkt = false;
1444
1445         skb_checksum_none_assert(skb);
1446
1447         /* Rx csum disabled */
1448         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1449                 return;
1450
1451         if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) &&
1452             (hdr_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL >> 16))) {
1453                 encap_pkt = true;
1454                 skb->encapsulation = 1;
1455         }
1456
1457         /* if IP and error */
1458         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1459             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1460                 ring->rx_stats.csum_err++;
1461                 return;
1462         }
1463
1464         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1465                 return;
1466
1467         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1468                 /*
1469                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1470                  * checksum errors.
1471                  */
1472                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1473                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1474                         return;
1475
1476                 ring->rx_stats.csum_err++;
1477                 return;
1478         }
1479
1480         /* It must be a TCP or UDP packet with a valid checksum */
1481         skb->ip_summed = CHECKSUM_UNNECESSARY;
1482         if (encap_pkt) {
1483                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1484                         return;
1485
1486                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1487                         ring->rx_stats.csum_err++;
1488                         return;
1489                 }
1490                 /* If we checked the outer header let the stack know */
1491                 skb->csum_level = 1;
1492         }
1493 }
1494
1495 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1496                                     struct ixgbe_rx_buffer *bi)
1497 {
1498         struct page *page = bi->page;
1499         dma_addr_t dma;
1500
1501         /* since we are recycling buffers we should seldom need to alloc */
1502         if (likely(page))
1503                 return true;
1504
1505         /* alloc new page for storage */
1506         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1507         if (unlikely(!page)) {
1508                 rx_ring->rx_stats.alloc_rx_page_failed++;
1509                 return false;
1510         }
1511
1512         /* map page for use */
1513         dma = dma_map_page(rx_ring->dev, page, 0,
1514                            ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1515
1516         /*
1517          * if mapping failed free memory back to system since
1518          * there isn't much point in holding memory we can't use
1519          */
1520         if (dma_mapping_error(rx_ring->dev, dma)) {
1521                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1522
1523                 rx_ring->rx_stats.alloc_rx_page_failed++;
1524                 return false;
1525         }
1526
1527         bi->dma = dma;
1528         bi->page = page;
1529         bi->page_offset = 0;
1530
1531         return true;
1532 }
1533
1534 /**
1535  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1536  * @rx_ring: ring to place buffers on
1537  * @cleaned_count: number of buffers to replace
1538  **/
1539 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1540 {
1541         union ixgbe_adv_rx_desc *rx_desc;
1542         struct ixgbe_rx_buffer *bi;
1543         u16 i = rx_ring->next_to_use;
1544
1545         /* nothing to do */
1546         if (!cleaned_count)
1547                 return;
1548
1549         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1550         bi = &rx_ring->rx_buffer_info[i];
1551         i -= rx_ring->count;
1552
1553         do {
1554                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1555                         break;
1556
1557                 /*
1558                  * Refresh the desc even if buffer_addrs didn't change
1559                  * because each write-back erases this info.
1560                  */
1561                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1562
1563                 rx_desc++;
1564                 bi++;
1565                 i++;
1566                 if (unlikely(!i)) {
1567                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1568                         bi = rx_ring->rx_buffer_info;
1569                         i -= rx_ring->count;
1570                 }
1571
1572                 /* clear the status bits for the next_to_use descriptor */
1573                 rx_desc->wb.upper.status_error = 0;
1574
1575                 cleaned_count--;
1576         } while (cleaned_count);
1577
1578         i += rx_ring->count;
1579
1580         if (rx_ring->next_to_use != i) {
1581                 rx_ring->next_to_use = i;
1582
1583                 /* update next to alloc since we have filled the ring */
1584                 rx_ring->next_to_alloc = i;
1585
1586                 /* Force memory writes to complete before letting h/w
1587                  * know there are new descriptors to fetch.  (Only
1588                  * applicable for weak-ordered memory model archs,
1589                  * such as IA-64).
1590                  */
1591                 wmb();
1592                 writel(i, rx_ring->tail);
1593         }
1594 }
1595
1596 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1597                                    struct sk_buff *skb)
1598 {
1599         u16 hdr_len = skb_headlen(skb);
1600
1601         /* set gso_size to avoid messing up TCP MSS */
1602         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1603                                                  IXGBE_CB(skb)->append_cnt);
1604         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1605 }
1606
1607 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1608                                    struct sk_buff *skb)
1609 {
1610         /* if append_cnt is 0 then frame is not RSC */
1611         if (!IXGBE_CB(skb)->append_cnt)
1612                 return;
1613
1614         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1615         rx_ring->rx_stats.rsc_flush++;
1616
1617         ixgbe_set_rsc_gso_size(rx_ring, skb);
1618
1619         /* gso_size is computed using append_cnt so always clear it last */
1620         IXGBE_CB(skb)->append_cnt = 0;
1621 }
1622
1623 /**
1624  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1625  * @rx_ring: rx descriptor ring packet is being transacted on
1626  * @rx_desc: pointer to the EOP Rx descriptor
1627  * @skb: pointer to current skb being populated
1628  *
1629  * This function checks the ring, descriptor, and packet information in
1630  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1631  * other fields within the skb.
1632  **/
1633 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1634                                      union ixgbe_adv_rx_desc *rx_desc,
1635                                      struct sk_buff *skb)
1636 {
1637         struct net_device *dev = rx_ring->netdev;
1638
1639         ixgbe_update_rsc_stats(rx_ring, skb);
1640
1641         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1642
1643         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1644
1645         if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1646                 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1647
1648         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1649             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1650                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1651                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1652         }
1653
1654         skb_record_rx_queue(skb, rx_ring->queue_index);
1655
1656         skb->protocol = eth_type_trans(skb, dev);
1657 }
1658
1659 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1660                          struct sk_buff *skb)
1661 {
1662         if (ixgbe_qv_busy_polling(q_vector))
1663                 netif_receive_skb(skb);
1664         else
1665                 napi_gro_receive(&q_vector->napi, skb);
1666 }
1667
1668 /**
1669  * ixgbe_is_non_eop - process handling of non-EOP buffers
1670  * @rx_ring: Rx ring being processed
1671  * @rx_desc: Rx descriptor for current buffer
1672  * @skb: Current socket buffer containing buffer in progress
1673  *
1674  * This function updates next to clean.  If the buffer is an EOP buffer
1675  * this function exits returning false, otherwise it will place the
1676  * sk_buff in the next buffer to be chained and return true indicating
1677  * that this is in fact a non-EOP buffer.
1678  **/
1679 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1680                              union ixgbe_adv_rx_desc *rx_desc,
1681                              struct sk_buff *skb)
1682 {
1683         u32 ntc = rx_ring->next_to_clean + 1;
1684
1685         /* fetch, update, and store next to clean */
1686         ntc = (ntc < rx_ring->count) ? ntc : 0;
1687         rx_ring->next_to_clean = ntc;
1688
1689         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1690
1691         /* update RSC append count if present */
1692         if (ring_is_rsc_enabled(rx_ring)) {
1693                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1694                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1695
1696                 if (unlikely(rsc_enabled)) {
1697                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1698
1699                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1700                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1701
1702                         /* update ntc based on RSC value */
1703                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1704                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1705                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1706                 }
1707         }
1708
1709         /* if we are the last buffer then there is nothing else to do */
1710         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1711                 return false;
1712
1713         /* place skb in next buffer to be received */
1714         rx_ring->rx_buffer_info[ntc].skb = skb;
1715         rx_ring->rx_stats.non_eop_descs++;
1716
1717         return true;
1718 }
1719
1720 /**
1721  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1722  * @rx_ring: rx descriptor ring packet is being transacted on
1723  * @skb: pointer to current skb being adjusted
1724  *
1725  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1726  * main difference between this version and the original function is that
1727  * this function can make several assumptions about the state of things
1728  * that allow for significant optimizations versus the standard function.
1729  * As a result we can do things like drop a frag and maintain an accurate
1730  * truesize for the skb.
1731  */
1732 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1733                             struct sk_buff *skb)
1734 {
1735         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1736         unsigned char *va;
1737         unsigned int pull_len;
1738
1739         /*
1740          * it is valid to use page_address instead of kmap since we are
1741          * working with pages allocated out of the lomem pool per
1742          * alloc_page(GFP_ATOMIC)
1743          */
1744         va = skb_frag_address(frag);
1745
1746         /*
1747          * we need the header to contain the greater of either ETH_HLEN or
1748          * 60 bytes if the skb->len is less than 60 for skb_pad.
1749          */
1750         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1751
1752         /* align pull length to size of long to optimize memcpy performance */
1753         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1754
1755         /* update all of the pointers */
1756         skb_frag_size_sub(frag, pull_len);
1757         frag->page_offset += pull_len;
1758         skb->data_len -= pull_len;
1759         skb->tail += pull_len;
1760 }
1761
1762 /**
1763  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1764  * @rx_ring: rx descriptor ring packet is being transacted on
1765  * @skb: pointer to current skb being updated
1766  *
1767  * This function provides a basic DMA sync up for the first fragment of an
1768  * skb.  The reason for doing this is that the first fragment cannot be
1769  * unmapped until we have reached the end of packet descriptor for a buffer
1770  * chain.
1771  */
1772 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1773                                 struct sk_buff *skb)
1774 {
1775         /* if the page was released unmap it, else just sync our portion */
1776         if (unlikely(IXGBE_CB(skb)->page_released)) {
1777                 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1778                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1779                 IXGBE_CB(skb)->page_released = false;
1780         } else {
1781                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1782
1783                 dma_sync_single_range_for_cpu(rx_ring->dev,
1784                                               IXGBE_CB(skb)->dma,
1785                                               frag->page_offset,
1786                                               ixgbe_rx_bufsz(rx_ring),
1787                                               DMA_FROM_DEVICE);
1788         }
1789         IXGBE_CB(skb)->dma = 0;
1790 }
1791
1792 /**
1793  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1794  * @rx_ring: rx descriptor ring packet is being transacted on
1795  * @rx_desc: pointer to the EOP Rx descriptor
1796  * @skb: pointer to current skb being fixed
1797  *
1798  * Check for corrupted packet headers caused by senders on the local L2
1799  * embedded NIC switch not setting up their Tx Descriptors right.  These
1800  * should be very rare.
1801  *
1802  * Also address the case where we are pulling data in on pages only
1803  * and as such no data is present in the skb header.
1804  *
1805  * In addition if skb is not at least 60 bytes we need to pad it so that
1806  * it is large enough to qualify as a valid Ethernet frame.
1807  *
1808  * Returns true if an error was encountered and skb was freed.
1809  **/
1810 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1811                                   union ixgbe_adv_rx_desc *rx_desc,
1812                                   struct sk_buff *skb)
1813 {
1814         struct net_device *netdev = rx_ring->netdev;
1815
1816         /* verify that the packet does not have any known errors */
1817         if (unlikely(ixgbe_test_staterr(rx_desc,
1818                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1819             !(netdev->features & NETIF_F_RXALL))) {
1820                 dev_kfree_skb_any(skb);
1821                 return true;
1822         }
1823
1824         /* place header in linear portion of buffer */
1825         if (skb_is_nonlinear(skb))
1826                 ixgbe_pull_tail(rx_ring, skb);
1827
1828 #ifdef IXGBE_FCOE
1829         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1830         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1831                 return false;
1832
1833 #endif
1834         /* if eth_skb_pad returns an error the skb was freed */
1835         if (eth_skb_pad(skb))
1836                 return true;
1837
1838         return false;
1839 }
1840
1841 /**
1842  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1843  * @rx_ring: rx descriptor ring to store buffers on
1844  * @old_buff: donor buffer to have page reused
1845  *
1846  * Synchronizes page for reuse by the adapter
1847  **/
1848 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1849                                 struct ixgbe_rx_buffer *old_buff)
1850 {
1851         struct ixgbe_rx_buffer *new_buff;
1852         u16 nta = rx_ring->next_to_alloc;
1853
1854         new_buff = &rx_ring->rx_buffer_info[nta];
1855
1856         /* update, and store next to alloc */
1857         nta++;
1858         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1859
1860         /* transfer page from old buffer to new buffer */
1861         *new_buff = *old_buff;
1862
1863         /* sync the buffer for use by the device */
1864         dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1865                                          new_buff->page_offset,
1866                                          ixgbe_rx_bufsz(rx_ring),
1867                                          DMA_FROM_DEVICE);
1868 }
1869
1870 static inline bool ixgbe_page_is_reserved(struct page *page)
1871 {
1872         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1873 }
1874
1875 /**
1876  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1877  * @rx_ring: rx descriptor ring to transact packets on
1878  * @rx_buffer: buffer containing page to add
1879  * @rx_desc: descriptor containing length of buffer written by hardware
1880  * @skb: sk_buff to place the data into
1881  *
1882  * This function will add the data contained in rx_buffer->page to the skb.
1883  * This is done either through a direct copy if the data in the buffer is
1884  * less than the skb header size, otherwise it will just attach the page as
1885  * a frag to the skb.
1886  *
1887  * The function will then update the page offset if necessary and return
1888  * true if the buffer can be reused by the adapter.
1889  **/
1890 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1891                               struct ixgbe_rx_buffer *rx_buffer,
1892                               union ixgbe_adv_rx_desc *rx_desc,
1893                               struct sk_buff *skb)
1894 {
1895         struct page *page = rx_buffer->page;
1896         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1897 #if (PAGE_SIZE < 8192)
1898         unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1899 #else
1900         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1901         unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1902                                    ixgbe_rx_bufsz(rx_ring);
1903 #endif
1904
1905         if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1906                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1907
1908                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1909
1910                 /* page is not reserved, we can reuse buffer as-is */
1911                 if (likely(!ixgbe_page_is_reserved(page)))
1912                         return true;
1913
1914                 /* this page cannot be reused so discard it */
1915                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1916                 return false;
1917         }
1918
1919         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1920                         rx_buffer->page_offset, size, truesize);
1921
1922         /* avoid re-using remote pages */
1923         if (unlikely(ixgbe_page_is_reserved(page)))
1924                 return false;
1925
1926 #if (PAGE_SIZE < 8192)
1927         /* if we are only owner of page we can reuse it */
1928         if (unlikely(page_count(page) != 1))
1929                 return false;
1930
1931         /* flip page offset to other buffer */
1932         rx_buffer->page_offset ^= truesize;
1933 #else
1934         /* move offset up to the next cache line */
1935         rx_buffer->page_offset += truesize;
1936
1937         if (rx_buffer->page_offset > last_offset)
1938                 return false;
1939 #endif
1940
1941         /* Even if we own the page, we are not allowed to use atomic_set()
1942          * This would break get_page_unless_zero() users.
1943          */
1944         atomic_inc(&page->_count);
1945
1946         return true;
1947 }
1948
1949 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1950                                              union ixgbe_adv_rx_desc *rx_desc)
1951 {
1952         struct ixgbe_rx_buffer *rx_buffer;
1953         struct sk_buff *skb;
1954         struct page *page;
1955
1956         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1957         page = rx_buffer->page;
1958         prefetchw(page);
1959
1960         skb = rx_buffer->skb;
1961
1962         if (likely(!skb)) {
1963                 void *page_addr = page_address(page) +
1964                                   rx_buffer->page_offset;
1965
1966                 /* prefetch first cache line of first page */
1967                 prefetch(page_addr);
1968 #if L1_CACHE_BYTES < 128
1969                 prefetch(page_addr + L1_CACHE_BYTES);
1970 #endif
1971
1972                 /* allocate a skb to store the frags */
1973                 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
1974                                      IXGBE_RX_HDR_SIZE);
1975                 if (unlikely(!skb)) {
1976                         rx_ring->rx_stats.alloc_rx_buff_failed++;
1977                         return NULL;
1978                 }
1979
1980                 /*
1981                  * we will be copying header into skb->data in
1982                  * pskb_may_pull so it is in our interest to prefetch
1983                  * it now to avoid a possible cache miss
1984                  */
1985                 prefetchw(skb->data);
1986
1987                 /*
1988                  * Delay unmapping of the first packet. It carries the
1989                  * header information, HW may still access the header
1990                  * after the writeback.  Only unmap it when EOP is
1991                  * reached
1992                  */
1993                 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1994                         goto dma_sync;
1995
1996                 IXGBE_CB(skb)->dma = rx_buffer->dma;
1997         } else {
1998                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1999                         ixgbe_dma_sync_frag(rx_ring, skb);
2000
2001 dma_sync:
2002                 /* we are reusing so sync this buffer for CPU use */
2003                 dma_sync_single_range_for_cpu(rx_ring->dev,
2004                                               rx_buffer->dma,
2005                                               rx_buffer->page_offset,
2006                                               ixgbe_rx_bufsz(rx_ring),
2007                                               DMA_FROM_DEVICE);
2008
2009                 rx_buffer->skb = NULL;
2010         }
2011
2012         /* pull page into skb */
2013         if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2014                 /* hand second half of page back to the ring */
2015                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2016         } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2017                 /* the page has been released from the ring */
2018                 IXGBE_CB(skb)->page_released = true;
2019         } else {
2020                 /* we are not reusing the buffer so unmap it */
2021                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2022                                ixgbe_rx_pg_size(rx_ring),
2023                                DMA_FROM_DEVICE);
2024         }
2025
2026         /* clear contents of buffer_info */
2027         rx_buffer->page = NULL;
2028
2029         return skb;
2030 }
2031
2032 /**
2033  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2034  * @q_vector: structure containing interrupt and ring information
2035  * @rx_ring: rx descriptor ring to transact packets on
2036  * @budget: Total limit on number of packets to process
2037  *
2038  * This function provides a "bounce buffer" approach to Rx interrupt
2039  * processing.  The advantage to this is that on systems that have
2040  * expensive overhead for IOMMU access this provides a means of avoiding
2041  * it by maintaining the mapping of the page to the syste.
2042  *
2043  * Returns amount of work completed
2044  **/
2045 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2046                                struct ixgbe_ring *rx_ring,
2047                                const int budget)
2048 {
2049         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2050 #ifdef IXGBE_FCOE
2051         struct ixgbe_adapter *adapter = q_vector->adapter;
2052         int ddp_bytes;
2053         unsigned int mss = 0;
2054 #endif /* IXGBE_FCOE */
2055         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2056
2057         while (likely(total_rx_packets < budget)) {
2058                 union ixgbe_adv_rx_desc *rx_desc;
2059                 struct sk_buff *skb;
2060
2061                 /* return some buffers to hardware, one at a time is too slow */
2062                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2063                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2064                         cleaned_count = 0;
2065                 }
2066
2067                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2068
2069                 if (!rx_desc->wb.upper.status_error)
2070                         break;
2071
2072                 /* This memory barrier is needed to keep us from reading
2073                  * any other fields out of the rx_desc until we know the
2074                  * descriptor has been written back
2075                  */
2076                 dma_rmb();
2077
2078                 /* retrieve a buffer from the ring */
2079                 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2080
2081                 /* exit if we failed to retrieve a buffer */
2082                 if (!skb)
2083                         break;
2084
2085                 cleaned_count++;
2086
2087                 /* place incomplete frames back on ring for completion */
2088                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2089                         continue;
2090
2091                 /* verify the packet layout is correct */
2092                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2093                         continue;
2094
2095                 /* probably a little skewed due to removing CRC */
2096                 total_rx_bytes += skb->len;
2097
2098                 /* populate checksum, timestamp, VLAN, and protocol */
2099                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2100
2101 #ifdef IXGBE_FCOE
2102                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2103                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2104                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2105                         /* include DDPed FCoE data */
2106                         if (ddp_bytes > 0) {
2107                                 if (!mss) {
2108                                         mss = rx_ring->netdev->mtu -
2109                                                 sizeof(struct fcoe_hdr) -
2110                                                 sizeof(struct fc_frame_header) -
2111                                                 sizeof(struct fcoe_crc_eof);
2112                                         if (mss > 512)
2113                                                 mss &= ~511;
2114                                 }
2115                                 total_rx_bytes += ddp_bytes;
2116                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2117                                                                  mss);
2118                         }
2119                         if (!ddp_bytes) {
2120                                 dev_kfree_skb_any(skb);
2121                                 continue;
2122                         }
2123                 }
2124
2125 #endif /* IXGBE_FCOE */
2126                 skb_mark_napi_id(skb, &q_vector->napi);
2127                 ixgbe_rx_skb(q_vector, skb);
2128
2129                 /* update budget accounting */
2130                 total_rx_packets++;
2131         }
2132
2133         u64_stats_update_begin(&rx_ring->syncp);
2134         rx_ring->stats.packets += total_rx_packets;
2135         rx_ring->stats.bytes += total_rx_bytes;
2136         u64_stats_update_end(&rx_ring->syncp);
2137         q_vector->rx.total_packets += total_rx_packets;
2138         q_vector->rx.total_bytes += total_rx_bytes;
2139
2140         return total_rx_packets;
2141 }
2142
2143 #ifdef CONFIG_NET_RX_BUSY_POLL
2144 /* must be called with local_bh_disable()d */
2145 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2146 {
2147         struct ixgbe_q_vector *q_vector =
2148                         container_of(napi, struct ixgbe_q_vector, napi);
2149         struct ixgbe_adapter *adapter = q_vector->adapter;
2150         struct ixgbe_ring  *ring;
2151         int found = 0;
2152
2153         if (test_bit(__IXGBE_DOWN, &adapter->state))
2154                 return LL_FLUSH_FAILED;
2155
2156         if (!ixgbe_qv_lock_poll(q_vector))
2157                 return LL_FLUSH_BUSY;
2158
2159         ixgbe_for_each_ring(ring, q_vector->rx) {
2160                 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2161 #ifdef BP_EXTENDED_STATS
2162                 if (found)
2163                         ring->stats.cleaned += found;
2164                 else
2165                         ring->stats.misses++;
2166 #endif
2167                 if (found)
2168                         break;
2169         }
2170
2171         ixgbe_qv_unlock_poll(q_vector);
2172
2173         return found;
2174 }
2175 #endif  /* CONFIG_NET_RX_BUSY_POLL */
2176
2177 /**
2178  * ixgbe_configure_msix - Configure MSI-X hardware
2179  * @adapter: board private structure
2180  *
2181  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2182  * interrupts.
2183  **/
2184 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2185 {
2186         struct ixgbe_q_vector *q_vector;
2187         int v_idx;
2188         u32 mask;
2189
2190         /* Populate MSIX to EITR Select */
2191         if (adapter->num_vfs > 32) {
2192                 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2193                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2194         }
2195
2196         /*
2197          * Populate the IVAR table and set the ITR values to the
2198          * corresponding register.
2199          */
2200         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2201                 struct ixgbe_ring *ring;
2202                 q_vector = adapter->q_vector[v_idx];
2203
2204                 ixgbe_for_each_ring(ring, q_vector->rx)
2205                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2206
2207                 ixgbe_for_each_ring(ring, q_vector->tx)
2208                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2209
2210                 ixgbe_write_eitr(q_vector);
2211         }
2212
2213         switch (adapter->hw.mac.type) {
2214         case ixgbe_mac_82598EB:
2215                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2216                                v_idx);
2217                 break;
2218         case ixgbe_mac_82599EB:
2219         case ixgbe_mac_X540:
2220         case ixgbe_mac_X550:
2221         case ixgbe_mac_X550EM_x:
2222                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2223                 break;
2224         default:
2225                 break;
2226         }
2227         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2228
2229         /* set up to autoclear timer, and the vectors */
2230         mask = IXGBE_EIMS_ENABLE_MASK;
2231         mask &= ~(IXGBE_EIMS_OTHER |
2232                   IXGBE_EIMS_MAILBOX |
2233                   IXGBE_EIMS_LSC);
2234
2235         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2236 }
2237
2238 enum latency_range {
2239         lowest_latency = 0,
2240         low_latency = 1,
2241         bulk_latency = 2,
2242         latency_invalid = 255
2243 };
2244
2245 /**
2246  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2247  * @q_vector: structure containing interrupt and ring information
2248  * @ring_container: structure containing ring performance data
2249  *
2250  *      Stores a new ITR value based on packets and byte
2251  *      counts during the last interrupt.  The advantage of per interrupt
2252  *      computation is faster updates and more accurate ITR for the current
2253  *      traffic pattern.  Constants in this function were computed
2254  *      based on theoretical maximum wire speed and thresholds were set based
2255  *      on testing data as well as attempting to minimize response time
2256  *      while increasing bulk throughput.
2257  *      this functionality is controlled by the InterruptThrottleRate module
2258  *      parameter (see ixgbe_param.c)
2259  **/
2260 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2261                              struct ixgbe_ring_container *ring_container)
2262 {
2263         int bytes = ring_container->total_bytes;
2264         int packets = ring_container->total_packets;
2265         u32 timepassed_us;
2266         u64 bytes_perint;
2267         u8 itr_setting = ring_container->itr;
2268
2269         if (packets == 0)
2270                 return;
2271
2272         /* simple throttlerate management
2273          *   0-10MB/s   lowest (100000 ints/s)
2274          *  10-20MB/s   low    (20000 ints/s)
2275          *  20-1249MB/s bulk   (12000 ints/s)
2276          */
2277         /* what was last interrupt timeslice? */
2278         timepassed_us = q_vector->itr >> 2;
2279         if (timepassed_us == 0)
2280                 return;
2281
2282         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2283
2284         switch (itr_setting) {
2285         case lowest_latency:
2286                 if (bytes_perint > 10)
2287                         itr_setting = low_latency;
2288                 break;
2289         case low_latency:
2290                 if (bytes_perint > 20)
2291                         itr_setting = bulk_latency;
2292                 else if (bytes_perint <= 10)
2293                         itr_setting = lowest_latency;
2294                 break;
2295         case bulk_latency:
2296                 if (bytes_perint <= 20)
2297                         itr_setting = low_latency;
2298                 break;
2299         }
2300
2301         /* clear work counters since we have the values we need */
2302         ring_container->total_bytes = 0;
2303         ring_container->total_packets = 0;
2304
2305         /* write updated itr to ring container */
2306         ring_container->itr = itr_setting;
2307 }
2308
2309 /**
2310  * ixgbe_write_eitr - write EITR register in hardware specific way
2311  * @q_vector: structure containing interrupt and ring information
2312  *
2313  * This function is made to be called by ethtool and by the driver
2314  * when it needs to update EITR registers at runtime.  Hardware
2315  * specific quirks/differences are taken care of here.
2316  */
2317 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2318 {
2319         struct ixgbe_adapter *adapter = q_vector->adapter;
2320         struct ixgbe_hw *hw = &adapter->hw;
2321         int v_idx = q_vector->v_idx;
2322         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2323
2324         switch (adapter->hw.mac.type) {
2325         case ixgbe_mac_82598EB:
2326                 /* must write high and low 16 bits to reset counter */
2327                 itr_reg |= (itr_reg << 16);
2328                 break;
2329         case ixgbe_mac_82599EB:
2330         case ixgbe_mac_X540:
2331         case ixgbe_mac_X550:
2332         case ixgbe_mac_X550EM_x:
2333                 /*
2334                  * set the WDIS bit to not clear the timer bits and cause an
2335                  * immediate assertion of the interrupt
2336                  */
2337                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2338                 break;
2339         default:
2340                 break;
2341         }
2342         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2343 }
2344
2345 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2346 {
2347         u32 new_itr = q_vector->itr;
2348         u8 current_itr;
2349
2350         ixgbe_update_itr(q_vector, &q_vector->tx);
2351         ixgbe_update_itr(q_vector, &q_vector->rx);
2352
2353         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2354
2355         switch (current_itr) {
2356         /* counts and packets in update_itr are dependent on these numbers */
2357         case lowest_latency:
2358                 new_itr = IXGBE_100K_ITR;
2359                 break;
2360         case low_latency:
2361                 new_itr = IXGBE_20K_ITR;
2362                 break;
2363         case bulk_latency:
2364                 new_itr = IXGBE_12K_ITR;
2365                 break;
2366         default:
2367                 break;
2368         }
2369
2370         if (new_itr != q_vector->itr) {
2371                 /* do an exponential smoothing */
2372                 new_itr = (10 * new_itr * q_vector->itr) /
2373                           ((9 * new_itr) + q_vector->itr);
2374
2375                 /* save the algorithm value here */
2376                 q_vector->itr = new_itr;
2377
2378                 ixgbe_write_eitr(q_vector);
2379         }
2380 }
2381
2382 /**
2383  * ixgbe_check_overtemp_subtask - check for over temperature
2384  * @adapter: pointer to adapter
2385  **/
2386 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2387 {
2388         struct ixgbe_hw *hw = &adapter->hw;
2389         u32 eicr = adapter->interrupt_event;
2390
2391         if (test_bit(__IXGBE_DOWN, &adapter->state))
2392                 return;
2393
2394         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2395             !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2396                 return;
2397
2398         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2399
2400         switch (hw->device_id) {
2401         case IXGBE_DEV_ID_82599_T3_LOM:
2402                 /*
2403                  * Since the warning interrupt is for both ports
2404                  * we don't have to check if:
2405                  *  - This interrupt wasn't for our port.
2406                  *  - We may have missed the interrupt so always have to
2407                  *    check if we  got a LSC
2408                  */
2409                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2410                     !(eicr & IXGBE_EICR_LSC))
2411                         return;
2412
2413                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2414                         u32 speed;
2415                         bool link_up = false;
2416
2417                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2418
2419                         if (link_up)
2420                                 return;
2421                 }
2422
2423                 /* Check if this is not due to overtemp */
2424                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2425                         return;
2426
2427                 break;
2428         default:
2429                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2430                         return;
2431                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2432                         return;
2433                 break;
2434         }
2435         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2436
2437         adapter->interrupt_event = 0;
2438 }
2439
2440 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2441 {
2442         struct ixgbe_hw *hw = &adapter->hw;
2443
2444         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2445             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2446                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2447                 /* write to clear the interrupt */
2448                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2449         }
2450 }
2451
2452 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2453 {
2454         struct ixgbe_hw *hw = &adapter->hw;
2455
2456         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2457                 return;
2458
2459         switch (adapter->hw.mac.type) {
2460         case ixgbe_mac_82599EB:
2461                 /*
2462                  * Need to check link state so complete overtemp check
2463                  * on service task
2464                  */
2465                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2466                      (eicr & IXGBE_EICR_LSC)) &&
2467                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2468                         adapter->interrupt_event = eicr;
2469                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2470                         ixgbe_service_event_schedule(adapter);
2471                         return;
2472                 }
2473                 return;
2474         case ixgbe_mac_X540:
2475                 if (!(eicr & IXGBE_EICR_TS))
2476                         return;
2477                 break;
2478         default:
2479                 return;
2480         }
2481
2482         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2483 }
2484
2485 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2486 {
2487         switch (hw->mac.type) {
2488         case ixgbe_mac_82598EB:
2489                 if (hw->phy.type == ixgbe_phy_nl)
2490                         return true;
2491                 return false;
2492         case ixgbe_mac_82599EB:
2493         case ixgbe_mac_X550EM_x:
2494                 switch (hw->mac.ops.get_media_type(hw)) {
2495                 case ixgbe_media_type_fiber:
2496                 case ixgbe_media_type_fiber_qsfp:
2497                         return true;
2498                 default:
2499                         return false;
2500                 }
2501         default:
2502                 return false;
2503         }
2504 }
2505
2506 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2507 {
2508         struct ixgbe_hw *hw = &adapter->hw;
2509         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2510
2511         if (!ixgbe_is_sfp(hw))
2512                 return;
2513
2514         /* Later MAC's use different SDP */
2515         if (hw->mac.type >= ixgbe_mac_X540)
2516                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2517
2518         if (eicr & eicr_mask) {
2519                 /* Clear the interrupt */
2520                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2521                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2522                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2523                         adapter->sfp_poll_time = 0;
2524                         ixgbe_service_event_schedule(adapter);
2525                 }
2526         }
2527
2528         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2529             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2530                 /* Clear the interrupt */
2531                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2532                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2533                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2534                         ixgbe_service_event_schedule(adapter);
2535                 }
2536         }
2537 }
2538
2539 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2540 {
2541         struct ixgbe_hw *hw = &adapter->hw;
2542
2543         adapter->lsc_int++;
2544         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2545         adapter->link_check_timeout = jiffies;
2546         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2547                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2548                 IXGBE_WRITE_FLUSH(hw);
2549                 ixgbe_service_event_schedule(adapter);
2550         }
2551 }
2552
2553 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2554                                            u64 qmask)
2555 {
2556         u32 mask;
2557         struct ixgbe_hw *hw = &adapter->hw;
2558
2559         switch (hw->mac.type) {
2560         case ixgbe_mac_82598EB:
2561                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2562                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2563                 break;
2564         case ixgbe_mac_82599EB:
2565         case ixgbe_mac_X540:
2566         case ixgbe_mac_X550:
2567         case ixgbe_mac_X550EM_x:
2568                 mask = (qmask & 0xFFFFFFFF);
2569                 if (mask)
2570                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2571                 mask = (qmask >> 32);
2572                 if (mask)
2573                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2574                 break;
2575         default:
2576                 break;
2577         }
2578         /* skip the flush */
2579 }
2580
2581 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2582                                             u64 qmask)
2583 {
2584         u32 mask;
2585         struct ixgbe_hw *hw = &adapter->hw;
2586
2587         switch (hw->mac.type) {
2588         case ixgbe_mac_82598EB:
2589                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2590                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2591                 break;
2592         case ixgbe_mac_82599EB:
2593         case ixgbe_mac_X540:
2594         case ixgbe_mac_X550:
2595         case ixgbe_mac_X550EM_x:
2596                 mask = (qmask & 0xFFFFFFFF);
2597                 if (mask)
2598                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2599                 mask = (qmask >> 32);
2600                 if (mask)
2601                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2602                 break;
2603         default:
2604                 break;
2605         }
2606         /* skip the flush */
2607 }
2608
2609 /**
2610  * ixgbe_irq_enable - Enable default interrupt generation settings
2611  * @adapter: board private structure
2612  **/
2613 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2614                                     bool flush)
2615 {
2616         struct ixgbe_hw *hw = &adapter->hw;
2617         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2618
2619         /* don't reenable LSC while waiting for link */
2620         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2621                 mask &= ~IXGBE_EIMS_LSC;
2622
2623         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2624                 switch (adapter->hw.mac.type) {
2625                 case ixgbe_mac_82599EB:
2626                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2627                         break;
2628                 case ixgbe_mac_X540:
2629                 case ixgbe_mac_X550:
2630                 case ixgbe_mac_X550EM_x:
2631                         mask |= IXGBE_EIMS_TS;
2632                         break;
2633                 default:
2634                         break;
2635                 }
2636         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2637                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2638         switch (adapter->hw.mac.type) {
2639         case ixgbe_mac_82599EB:
2640                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2641                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2642                 /* fall through */
2643         case ixgbe_mac_X540:
2644         case ixgbe_mac_X550:
2645         case ixgbe_mac_X550EM_x:
2646                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP)
2647                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2648                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2649                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2650                 mask |= IXGBE_EIMS_ECC;
2651                 mask |= IXGBE_EIMS_MAILBOX;
2652                 break;
2653         default:
2654                 break;
2655         }
2656
2657         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2658             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2659                 mask |= IXGBE_EIMS_FLOW_DIR;
2660
2661         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2662         if (queues)
2663                 ixgbe_irq_enable_queues(adapter, ~0);
2664         if (flush)
2665                 IXGBE_WRITE_FLUSH(&adapter->hw);
2666 }
2667
2668 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2669 {
2670         struct ixgbe_adapter *adapter = data;
2671         struct ixgbe_hw *hw = &adapter->hw;
2672         u32 eicr;
2673
2674         /*
2675          * Workaround for Silicon errata.  Use clear-by-write instead
2676          * of clear-by-read.  Reading with EICS will return the
2677          * interrupt causes without clearing, which later be done
2678          * with the write to EICR.
2679          */
2680         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2681
2682         /* The lower 16bits of the EICR register are for the queue interrupts
2683          * which should be masked here in order to not accidentally clear them if
2684          * the bits are high when ixgbe_msix_other is called. There is a race
2685          * condition otherwise which results in possible performance loss
2686          * especially if the ixgbe_msix_other interrupt is triggering
2687          * consistently (as it would when PPS is turned on for the X540 device)
2688          */
2689         eicr &= 0xFFFF0000;
2690
2691         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2692
2693         if (eicr & IXGBE_EICR_LSC)
2694                 ixgbe_check_lsc(adapter);
2695
2696         if (eicr & IXGBE_EICR_MAILBOX)
2697                 ixgbe_msg_task(adapter);
2698
2699         switch (hw->mac.type) {
2700         case ixgbe_mac_82599EB:
2701         case ixgbe_mac_X540:
2702         case ixgbe_mac_X550:
2703         case ixgbe_mac_X550EM_x:
2704                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2705                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2706                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2707                         ixgbe_service_event_schedule(adapter);
2708                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
2709                                         IXGBE_EICR_GPI_SDP0_X540);
2710                 }
2711                 if (eicr & IXGBE_EICR_ECC) {
2712                         e_info(link, "Received ECC Err, initiating reset\n");
2713                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2714                         ixgbe_service_event_schedule(adapter);
2715                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2716                 }
2717                 /* Handle Flow Director Full threshold interrupt */
2718                 if (eicr & IXGBE_EICR_FLOW_DIR) {
2719                         int reinit_count = 0;
2720                         int i;
2721                         for (i = 0; i < adapter->num_tx_queues; i++) {
2722                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
2723                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2724                                                        &ring->state))
2725                                         reinit_count++;
2726                         }
2727                         if (reinit_count) {
2728                                 /* no more flow director interrupts until after init */
2729                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2730                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2731                                 ixgbe_service_event_schedule(adapter);
2732                         }
2733                 }
2734                 ixgbe_check_sfp_event(adapter, eicr);
2735                 ixgbe_check_overtemp_event(adapter, eicr);
2736                 break;
2737         default:
2738                 break;
2739         }
2740
2741         ixgbe_check_fan_failure(adapter, eicr);
2742
2743         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2744                 ixgbe_ptp_check_pps_event(adapter, eicr);
2745
2746         /* re-enable the original interrupt state, no lsc, no queues */
2747         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2748                 ixgbe_irq_enable(adapter, false, false);
2749
2750         return IRQ_HANDLED;
2751 }
2752
2753 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2754 {
2755         struct ixgbe_q_vector *q_vector = data;
2756
2757         /* EIAM disabled interrupts (on this vector) for us */
2758
2759         if (q_vector->rx.ring || q_vector->tx.ring)
2760                 napi_schedule(&q_vector->napi);
2761
2762         return IRQ_HANDLED;
2763 }
2764
2765 /**
2766  * ixgbe_poll - NAPI Rx polling callback
2767  * @napi: structure for representing this polling device
2768  * @budget: how many packets driver is allowed to clean
2769  *
2770  * This function is used for legacy and MSI, NAPI mode
2771  **/
2772 int ixgbe_poll(struct napi_struct *napi, int budget)
2773 {
2774         struct ixgbe_q_vector *q_vector =
2775                                 container_of(napi, struct ixgbe_q_vector, napi);
2776         struct ixgbe_adapter *adapter = q_vector->adapter;
2777         struct ixgbe_ring *ring;
2778         int per_ring_budget, work_done = 0;
2779         bool clean_complete = true;
2780
2781 #ifdef CONFIG_IXGBE_DCA
2782         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2783                 ixgbe_update_dca(q_vector);
2784 #endif
2785
2786         ixgbe_for_each_ring(ring, q_vector->tx)
2787                 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2788
2789         /* Exit if we are called by netpoll or busy polling is active */
2790         if ((budget <= 0) || !ixgbe_qv_lock_napi(q_vector))
2791                 return budget;
2792
2793         /* attempt to distribute budget to each queue fairly, but don't allow
2794          * the budget to go below 1 because we'll exit polling */
2795         if (q_vector->rx.count > 1)
2796                 per_ring_budget = max(budget/q_vector->rx.count, 1);
2797         else
2798                 per_ring_budget = budget;
2799
2800         ixgbe_for_each_ring(ring, q_vector->rx) {
2801                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
2802                                                  per_ring_budget);
2803
2804                 work_done += cleaned;
2805                 clean_complete &= (cleaned < per_ring_budget);
2806         }
2807
2808         ixgbe_qv_unlock_napi(q_vector);
2809         /* If all work not completed, return budget and keep polling */
2810         if (!clean_complete)
2811                 return budget;
2812
2813         /* all work done, exit the polling mode */
2814         napi_complete_done(napi, work_done);
2815         if (adapter->rx_itr_setting & 1)
2816                 ixgbe_set_itr(q_vector);
2817         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2818                 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2819
2820         return 0;
2821 }
2822
2823 /**
2824  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2825  * @adapter: board private structure
2826  *
2827  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2828  * interrupts from the kernel.
2829  **/
2830 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2831 {
2832         struct net_device *netdev = adapter->netdev;
2833         int vector, err;
2834         int ri = 0, ti = 0;
2835
2836         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2837                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2838                 struct msix_entry *entry = &adapter->msix_entries[vector];
2839
2840                 if (q_vector->tx.ring && q_vector->rx.ring) {
2841                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2842                                  "%s-%s-%d", netdev->name, "TxRx", ri++);
2843                         ti++;
2844                 } else if (q_vector->rx.ring) {
2845                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2846                                  "%s-%s-%d", netdev->name, "rx", ri++);
2847                 } else if (q_vector->tx.ring) {
2848                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2849                                  "%s-%s-%d", netdev->name, "tx", ti++);
2850                 } else {
2851                         /* skip this unused q_vector */
2852                         continue;
2853                 }
2854                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2855                                   q_vector->name, q_vector);
2856                 if (err) {
2857                         e_err(probe, "request_irq failed for MSIX interrupt "
2858                               "Error: %d\n", err);
2859                         goto free_queue_irqs;
2860                 }
2861                 /* If Flow Director is enabled, set interrupt affinity */
2862                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2863                         /* assign the mask for this irq */
2864                         irq_set_affinity_hint(entry->vector,
2865                                               &q_vector->affinity_mask);
2866                 }
2867         }
2868
2869         err = request_irq(adapter->msix_entries[vector].vector,
2870                           ixgbe_msix_other, 0, netdev->name, adapter);
2871         if (err) {
2872                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2873                 goto free_queue_irqs;
2874         }
2875
2876         return 0;
2877
2878 free_queue_irqs:
2879         while (vector) {
2880                 vector--;
2881                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2882                                       NULL);
2883                 free_irq(adapter->msix_entries[vector].vector,
2884                          adapter->q_vector[vector]);
2885         }
2886         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2887         pci_disable_msix(adapter->pdev);
2888         kfree(adapter->msix_entries);
2889         adapter->msix_entries = NULL;
2890         return err;
2891 }
2892
2893 /**
2894  * ixgbe_intr - legacy mode Interrupt Handler
2895  * @irq: interrupt number
2896  * @data: pointer to a network interface device structure
2897  **/
2898 static irqreturn_t ixgbe_intr(int irq, void *data)
2899 {
2900         struct ixgbe_adapter *adapter = data;
2901         struct ixgbe_hw *hw = &adapter->hw;
2902         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2903         u32 eicr;
2904
2905         /*
2906          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
2907          * before the read of EICR.
2908          */
2909         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2910
2911         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2912          * therefore no explicit interrupt disable is necessary */
2913         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2914         if (!eicr) {
2915                 /*
2916                  * shared interrupt alert!
2917                  * make sure interrupts are enabled because the read will
2918                  * have disabled interrupts due to EIAM
2919                  * finish the workaround of silicon errata on 82598.  Unmask
2920                  * the interrupt that we masked before the EICR read.
2921                  */
2922                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2923                         ixgbe_irq_enable(adapter, true, true);
2924                 return IRQ_NONE;        /* Not our interrupt */
2925         }
2926
2927         if (eicr & IXGBE_EICR_LSC)
2928                 ixgbe_check_lsc(adapter);
2929
2930         switch (hw->mac.type) {
2931         case ixgbe_mac_82599EB:
2932                 ixgbe_check_sfp_event(adapter, eicr);
2933                 /* Fall through */
2934         case ixgbe_mac_X540:
2935         case ixgbe_mac_X550:
2936         case ixgbe_mac_X550EM_x:
2937                 if (eicr & IXGBE_EICR_ECC) {
2938                         e_info(link, "Received ECC Err, initiating reset\n");
2939                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2940                         ixgbe_service_event_schedule(adapter);
2941                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2942                 }
2943                 ixgbe_check_overtemp_event(adapter, eicr);
2944                 break;
2945         default:
2946                 break;
2947         }
2948
2949         ixgbe_check_fan_failure(adapter, eicr);
2950         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2951                 ixgbe_ptp_check_pps_event(adapter, eicr);
2952
2953         /* would disable interrupts here but EIAM disabled it */
2954         napi_schedule(&q_vector->napi);
2955
2956         /*
2957          * re-enable link(maybe) and non-queue interrupts, no flush.
2958          * ixgbe_poll will re-enable the queue interrupts
2959          */
2960         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2961                 ixgbe_irq_enable(adapter, false, false);
2962
2963         return IRQ_HANDLED;
2964 }
2965
2966 /**
2967  * ixgbe_request_irq - initialize interrupts
2968  * @adapter: board private structure
2969  *
2970  * Attempts to configure interrupts using the best available
2971  * capabilities of the hardware and kernel.
2972  **/
2973 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2974 {
2975         struct net_device *netdev = adapter->netdev;
2976         int err;
2977
2978         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2979                 err = ixgbe_request_msix_irqs(adapter);
2980         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2981                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2982                                   netdev->name, adapter);
2983         else
2984                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2985                                   netdev->name, adapter);
2986
2987         if (err)
2988                 e_err(probe, "request_irq failed, Error %d\n", err);
2989
2990         return err;
2991 }
2992
2993 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2994 {
2995         int vector;
2996
2997         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2998                 free_irq(adapter->pdev->irq, adapter);
2999                 return;
3000         }
3001
3002         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3003                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3004                 struct msix_entry *entry = &adapter->msix_entries[vector];
3005
3006                 /* free only the irqs that were actually requested */
3007                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3008                         continue;
3009
3010                 /* clear the affinity_mask in the IRQ descriptor */
3011                 irq_set_affinity_hint(entry->vector, NULL);
3012
3013                 free_irq(entry->vector, q_vector);
3014         }
3015
3016         free_irq(adapter->msix_entries[vector++].vector, adapter);
3017 }
3018
3019 /**
3020  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3021  * @adapter: board private structure
3022  **/
3023 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3024 {
3025         switch (adapter->hw.mac.type) {
3026         case ixgbe_mac_82598EB:
3027                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3028                 break;
3029         case ixgbe_mac_82599EB:
3030         case ixgbe_mac_X540:
3031         case ixgbe_mac_X550:
3032         case ixgbe_mac_X550EM_x:
3033                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3034                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3035                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3036                 break;
3037         default:
3038                 break;
3039         }
3040         IXGBE_WRITE_FLUSH(&adapter->hw);
3041         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3042                 int vector;
3043
3044                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3045                         synchronize_irq(adapter->msix_entries[vector].vector);
3046
3047                 synchronize_irq(adapter->msix_entries[vector++].vector);
3048         } else {
3049                 synchronize_irq(adapter->pdev->irq);
3050         }
3051 }
3052
3053 /**
3054  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3055  *
3056  **/
3057 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3058 {
3059         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3060
3061         ixgbe_write_eitr(q_vector);
3062
3063         ixgbe_set_ivar(adapter, 0, 0, 0);
3064         ixgbe_set_ivar(adapter, 1, 0, 0);
3065
3066         e_info(hw, "Legacy interrupt IVAR setup done\n");
3067 }
3068
3069 /**
3070  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3071  * @adapter: board private structure
3072  * @ring: structure containing ring specific data
3073  *
3074  * Configure the Tx descriptor ring after a reset.
3075  **/
3076 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3077                              struct ixgbe_ring *ring)
3078 {
3079         struct ixgbe_hw *hw = &adapter->hw;
3080         u64 tdba = ring->dma;
3081         int wait_loop = 10;
3082         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3083         u8 reg_idx = ring->reg_idx;
3084
3085         /* disable queue to avoid issues while updating state */
3086         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3087         IXGBE_WRITE_FLUSH(hw);
3088
3089         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3090                         (tdba & DMA_BIT_MASK(32)));
3091         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3092         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3093                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3094         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3095         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3096         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3097
3098         /*
3099          * set WTHRESH to encourage burst writeback, it should not be set
3100          * higher than 1 when:
3101          * - ITR is 0 as it could cause false TX hangs
3102          * - ITR is set to > 100k int/sec and BQL is enabled
3103          *
3104          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3105          * to or less than the number of on chip descriptors, which is
3106          * currently 40.
3107          */
3108         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3109                 txdctl |= (1 << 16);    /* WTHRESH = 1 */
3110         else
3111                 txdctl |= (8 << 16);    /* WTHRESH = 8 */
3112
3113         /*
3114          * Setting PTHRESH to 32 both improves performance
3115          * and avoids a TX hang with DFP enabled
3116          */
3117         txdctl |= (1 << 8) |    /* HTHRESH = 1 */
3118                    32;          /* PTHRESH = 32 */
3119
3120         /* reinitialize flowdirector state */
3121         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3122                 ring->atr_sample_rate = adapter->atr_sample_rate;
3123                 ring->atr_count = 0;
3124                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3125         } else {
3126                 ring->atr_sample_rate = 0;
3127         }
3128
3129         /* initialize XPS */
3130         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3131                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3132
3133                 if (q_vector)
3134                         netif_set_xps_queue(ring->netdev,
3135                                             &q_vector->affinity_mask,
3136                                             ring->queue_index);
3137         }
3138
3139         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3140
3141         /* enable queue */
3142         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3143
3144         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3145         if (hw->mac.type == ixgbe_mac_82598EB &&
3146             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3147                 return;
3148
3149         /* poll to verify queue is enabled */
3150         do {
3151                 usleep_range(1000, 2000);
3152                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3153         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3154         if (!wait_loop)
3155                 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3156 }
3157
3158 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3159 {
3160         struct ixgbe_hw *hw = &adapter->hw;
3161         u32 rttdcs, mtqc;
3162         u8 tcs = netdev_get_num_tc(adapter->netdev);
3163
3164         if (hw->mac.type == ixgbe_mac_82598EB)
3165                 return;
3166
3167         /* disable the arbiter while setting MTQC */
3168         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3169         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3170         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3171
3172         /* set transmit pool layout */
3173         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3174                 mtqc = IXGBE_MTQC_VT_ENA;
3175                 if (tcs > 4)
3176                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3177                 else if (tcs > 1)
3178                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3179                 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3180                         mtqc |= IXGBE_MTQC_32VF;
3181                 else
3182                         mtqc |= IXGBE_MTQC_64VF;
3183         } else {
3184                 if (tcs > 4)
3185                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3186                 else if (tcs > 1)
3187                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3188                 else
3189                         mtqc = IXGBE_MTQC_64Q_1PB;
3190         }
3191
3192         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3193
3194         /* Enable Security TX Buffer IFG for multiple pb */
3195         if (tcs) {
3196                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3197                 sectx |= IXGBE_SECTX_DCB;
3198                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3199         }
3200
3201         /* re-enable the arbiter */
3202         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3203         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3204 }
3205
3206 /**
3207  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3208  * @adapter: board private structure
3209  *
3210  * Configure the Tx unit of the MAC after a reset.
3211  **/
3212 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3213 {
3214         struct ixgbe_hw *hw = &adapter->hw;
3215         u32 dmatxctl;
3216         u32 i;
3217
3218         ixgbe_setup_mtqc(adapter);
3219
3220         if (hw->mac.type != ixgbe_mac_82598EB) {
3221                 /* DMATXCTL.EN must be before Tx queues are enabled */
3222                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3223                 dmatxctl |= IXGBE_DMATXCTL_TE;
3224                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3225         }
3226
3227         /* Setup the HW Tx Head and Tail descriptor pointers */
3228         for (i = 0; i < adapter->num_tx_queues; i++)
3229                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3230 }
3231
3232 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3233                                  struct ixgbe_ring *ring)
3234 {
3235         struct ixgbe_hw *hw = &adapter->hw;
3236         u8 reg_idx = ring->reg_idx;
3237         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3238
3239         srrctl |= IXGBE_SRRCTL_DROP_EN;
3240
3241         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3242 }
3243
3244 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3245                                   struct ixgbe_ring *ring)
3246 {
3247         struct ixgbe_hw *hw = &adapter->hw;
3248         u8 reg_idx = ring->reg_idx;
3249         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3250
3251         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3252
3253         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3254 }
3255
3256 #ifdef CONFIG_IXGBE_DCB
3257 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3258 #else
3259 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3260 #endif
3261 {
3262         int i;
3263         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3264
3265         if (adapter->ixgbe_ieee_pfc)
3266                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3267
3268         /*
3269          * We should set the drop enable bit if:
3270          *  SR-IOV is enabled
3271          *   or
3272          *  Number of Rx queues > 1 and flow control is disabled
3273          *
3274          *  This allows us to avoid head of line blocking for security
3275          *  and performance reasons.
3276          */
3277         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3278             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3279                 for (i = 0; i < adapter->num_rx_queues; i++)
3280                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3281         } else {
3282                 for (i = 0; i < adapter->num_rx_queues; i++)
3283                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3284         }
3285 }
3286
3287 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3288
3289 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3290                                    struct ixgbe_ring *rx_ring)
3291 {
3292         struct ixgbe_hw *hw = &adapter->hw;
3293         u32 srrctl;
3294         u8 reg_idx = rx_ring->reg_idx;
3295
3296         if (hw->mac.type == ixgbe_mac_82598EB) {
3297                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3298
3299                 /*
3300                  * if VMDq is not active we must program one srrctl register
3301                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3302                  */
3303                 reg_idx &= mask;
3304         }
3305
3306         /* configure header buffer length, needed for RSC */
3307         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3308
3309         /* configure the packet buffer length */
3310         srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3311
3312         /* configure descriptor type */
3313         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3314
3315         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3316 }
3317
3318 /**
3319  * Return a number of entries in the RSS indirection table
3320  *
3321  * @adapter: device handle
3322  *
3323  *  - 82598/82599/X540:     128
3324  *  - X550(non-SRIOV mode): 512
3325  *  - X550(SRIOV mode):     64
3326  */
3327 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3328 {
3329         if (adapter->hw.mac.type < ixgbe_mac_X550)
3330                 return 128;
3331         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3332                 return 64;
3333         else
3334                 return 512;
3335 }
3336
3337 /**
3338  * Write the RETA table to HW
3339  *
3340  * @adapter: device handle
3341  *
3342  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3343  */
3344 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3345 {
3346         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3347         struct ixgbe_hw *hw = &adapter->hw;
3348         u32 reta = 0;
3349         u32 indices_multi;
3350         u8 *indir_tbl = adapter->rss_indir_tbl;
3351
3352         /* Fill out the redirection table as follows:
3353          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3354          *    indices.
3355          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3356          *  - X550:       8 bit wide entries containing 6 bit RSS index
3357          */
3358         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3359                 indices_multi = 0x11;
3360         else
3361                 indices_multi = 0x1;
3362
3363         /* Write redirection table to HW */
3364         for (i = 0; i < reta_entries; i++) {
3365                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3366                 if ((i & 3) == 3) {
3367                         if (i < 128)
3368                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3369                         else
3370                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3371                                                 reta);
3372                         reta = 0;
3373                 }
3374         }
3375 }
3376
3377 /**
3378  * Write the RETA table to HW (for x550 devices in SRIOV mode)
3379  *
3380  * @adapter: device handle
3381  *
3382  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3383  */
3384 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3385 {
3386         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3387         struct ixgbe_hw *hw = &adapter->hw;
3388         u32 vfreta = 0;
3389         unsigned int pf_pool = adapter->num_vfs;
3390
3391         /* Write redirection table to HW */
3392         for (i = 0; i < reta_entries; i++) {
3393                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3394                 if ((i & 3) == 3) {
3395                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3396                                         vfreta);
3397                         vfreta = 0;
3398                 }
3399         }
3400 }
3401
3402 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3403 {
3404         struct ixgbe_hw *hw = &adapter->hw;
3405         u32 i, j;
3406         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3407         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3408
3409         /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3410          * make full use of any rings they may have.  We will use the
3411          * PSRTYPE register to control how many rings we use within the PF.
3412          */
3413         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3414                 rss_i = 2;
3415
3416         /* Fill out hash function seeds */
3417         for (i = 0; i < 10; i++)
3418                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3419
3420         /* Fill out redirection table */
3421         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3422
3423         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3424                 if (j == rss_i)
3425                         j = 0;
3426
3427                 adapter->rss_indir_tbl[i] = j;
3428         }
3429
3430         ixgbe_store_reta(adapter);
3431 }
3432
3433 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3434 {
3435         struct ixgbe_hw *hw = &adapter->hw;
3436         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3437         unsigned int pf_pool = adapter->num_vfs;
3438         int i, j;
3439
3440         /* Fill out hash function seeds */
3441         for (i = 0; i < 10; i++)
3442                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3443                                 adapter->rss_key[i]);
3444
3445         /* Fill out the redirection table */
3446         for (i = 0, j = 0; i < 64; i++, j++) {
3447                 if (j == rss_i)
3448                         j = 0;
3449
3450                 adapter->rss_indir_tbl[i] = j;
3451         }
3452
3453         ixgbe_store_vfreta(adapter);
3454 }
3455
3456 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3457 {
3458         struct ixgbe_hw *hw = &adapter->hw;
3459         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3460         u32 rxcsum;
3461
3462         /* Disable indicating checksum in descriptor, enables RSS hash */
3463         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3464         rxcsum |= IXGBE_RXCSUM_PCSD;
3465         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3466
3467         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3468                 if (adapter->ring_feature[RING_F_RSS].mask)
3469                         mrqc = IXGBE_MRQC_RSSEN;
3470         } else {
3471                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3472
3473                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3474                         if (tcs > 4)
3475                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3476                         else if (tcs > 1)
3477                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3478                         else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3479                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3480                         else
3481                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3482                 } else {
3483                         if (tcs > 4)
3484                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3485                         else if (tcs > 1)
3486                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3487                         else
3488                                 mrqc = IXGBE_MRQC_RSSEN;
3489                 }
3490         }
3491
3492         /* Perform hash on these packet types */
3493         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3494                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3495                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3496                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3497
3498         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3499                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3500         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3501                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3502
3503         netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3504         if ((hw->mac.type >= ixgbe_mac_X550) &&
3505             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3506                 unsigned int pf_pool = adapter->num_vfs;
3507
3508                 /* Enable VF RSS mode */
3509                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3510                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3511
3512                 /* Setup RSS through the VF registers */
3513                 ixgbe_setup_vfreta(adapter);
3514                 vfmrqc = IXGBE_MRQC_RSSEN;
3515                 vfmrqc |= rss_field;
3516                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3517         } else {
3518                 ixgbe_setup_reta(adapter);
3519                 mrqc |= rss_field;
3520                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3521         }
3522 }
3523
3524 /**
3525  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3526  * @adapter:    address of board private structure
3527  * @index:      index of ring to set
3528  **/
3529 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3530                                    struct ixgbe_ring *ring)
3531 {
3532         struct ixgbe_hw *hw = &adapter->hw;
3533         u32 rscctrl;
3534         u8 reg_idx = ring->reg_idx;
3535
3536         if (!ring_is_rsc_enabled(ring))
3537                 return;
3538
3539         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3540         rscctrl |= IXGBE_RSCCTL_RSCEN;
3541         /*
3542          * we must limit the number of descriptors so that the
3543          * total size of max desc * buf_len is not greater
3544          * than 65536
3545          */
3546         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3547         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3548 }
3549
3550 #define IXGBE_MAX_RX_DESC_POLL 10
3551 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3552                                        struct ixgbe_ring *ring)
3553 {
3554         struct ixgbe_hw *hw = &adapter->hw;
3555         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3556         u32 rxdctl;
3557         u8 reg_idx = ring->reg_idx;
3558
3559         if (ixgbe_removed(hw->hw_addr))
3560                 return;
3561         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3562         if (hw->mac.type == ixgbe_mac_82598EB &&
3563             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3564                 return;
3565
3566         do {
3567                 usleep_range(1000, 2000);
3568                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3569         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3570
3571         if (!wait_loop) {
3572                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3573                       "the polling period\n", reg_idx);
3574         }
3575 }
3576
3577 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3578                             struct ixgbe_ring *ring)
3579 {
3580         struct ixgbe_hw *hw = &adapter->hw;
3581         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3582         u32 rxdctl;
3583         u8 reg_idx = ring->reg_idx;
3584
3585         if (ixgbe_removed(hw->hw_addr))
3586                 return;
3587         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3588         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3589
3590         /* write value back with RXDCTL.ENABLE bit cleared */
3591         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3592
3593         if (hw->mac.type == ixgbe_mac_82598EB &&
3594             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3595                 return;
3596
3597         /* the hardware may take up to 100us to really disable the rx queue */
3598         do {
3599                 udelay(10);
3600                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3601         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3602
3603         if (!wait_loop) {
3604                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3605                       "the polling period\n", reg_idx);
3606         }
3607 }
3608
3609 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3610                              struct ixgbe_ring *ring)
3611 {
3612         struct ixgbe_hw *hw = &adapter->hw;
3613         u64 rdba = ring->dma;
3614         u32 rxdctl;
3615         u8 reg_idx = ring->reg_idx;
3616
3617         /* disable queue to avoid issues while updating state */
3618         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3619         ixgbe_disable_rx_queue(adapter, ring);
3620
3621         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3622         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3623         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3624                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3625         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3626         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3627         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3628
3629         ixgbe_configure_srrctl(adapter, ring);
3630         ixgbe_configure_rscctl(adapter, ring);
3631
3632         if (hw->mac.type == ixgbe_mac_82598EB) {
3633                 /*
3634                  * enable cache line friendly hardware writes:
3635                  * PTHRESH=32 descriptors (half the internal cache),
3636                  * this also removes ugly rx_no_buffer_count increment
3637                  * HTHRESH=4 descriptors (to minimize latency on fetch)
3638                  * WTHRESH=8 burst writeback up to two cache lines
3639                  */
3640                 rxdctl &= ~0x3FFFFF;
3641                 rxdctl |=  0x080420;
3642         }
3643
3644         /* enable receive descriptor ring */
3645         rxdctl |= IXGBE_RXDCTL_ENABLE;
3646         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3647
3648         ixgbe_rx_desc_queue_enable(adapter, ring);
3649         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3650 }
3651
3652 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3653 {
3654         struct ixgbe_hw *hw = &adapter->hw;
3655         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3656         u16 pool;
3657
3658         /* PSRTYPE must be initialized in non 82598 adapters */
3659         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3660                       IXGBE_PSRTYPE_UDPHDR |
3661                       IXGBE_PSRTYPE_IPV4HDR |
3662                       IXGBE_PSRTYPE_L2HDR |
3663                       IXGBE_PSRTYPE_IPV6HDR;
3664
3665         if (hw->mac.type == ixgbe_mac_82598EB)
3666                 return;
3667
3668         if (rss_i > 3)
3669                 psrtype |= 2 << 29;
3670         else if (rss_i > 1)
3671                 psrtype |= 1 << 29;
3672
3673         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3674                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3675 }
3676
3677 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3678 {
3679         struct ixgbe_hw *hw = &adapter->hw;
3680         u32 reg_offset, vf_shift;
3681         u32 gcr_ext, vmdctl;
3682         int i;
3683
3684         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3685                 return;
3686
3687         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3688         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3689         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3690         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3691         vmdctl |= IXGBE_VT_CTL_REPLEN;
3692         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3693
3694         vf_shift = VMDQ_P(0) % 32;
3695         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3696
3697         /* Enable only the PF's pool for Tx/Rx */
3698         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3699         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3700         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3701         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3702         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3703                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3704
3705         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3706         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3707
3708         /*
3709          * Set up VF register offsets for selected VT Mode,
3710          * i.e. 32 or 64 VFs for SR-IOV
3711          */
3712         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3713         case IXGBE_82599_VMDQ_8Q_MASK:
3714                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3715                 break;
3716         case IXGBE_82599_VMDQ_4Q_MASK:
3717                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3718                 break;
3719         default:
3720                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3721                 break;
3722         }
3723
3724         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3725
3726
3727         /* Enable MAC Anti-Spoofing */
3728         hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3729                                           adapter->num_vfs);
3730
3731         /* Ensure LLDP and FC is set for Ethertype Antispoofing if we will be
3732          * calling set_ethertype_anti_spoofing for each VF in loop below
3733          */
3734         if (hw->mac.ops.set_ethertype_anti_spoofing) {
3735                 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_LLDP),
3736                                 (IXGBE_ETQF_FILTER_EN    |
3737                                  IXGBE_ETQF_TX_ANTISPOOF |
3738                                  IXGBE_ETH_P_LLDP));
3739
3740                 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FC),
3741                                 (IXGBE_ETQF_FILTER_EN |
3742                                  IXGBE_ETQF_TX_ANTISPOOF |
3743                                  ETH_P_PAUSE));
3744         }
3745
3746         /* For VFs that have spoof checking turned off */
3747         for (i = 0; i < adapter->num_vfs; i++) {
3748                 if (!adapter->vfinfo[i].spoofchk_enabled)
3749                         ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3750
3751                 /* enable ethertype anti spoofing if hw supports it */
3752                 if (hw->mac.ops.set_ethertype_anti_spoofing)
3753                         hw->mac.ops.set_ethertype_anti_spoofing(hw, true, i);
3754
3755                 /* Enable/Disable RSS query feature  */
3756                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3757                                           adapter->vfinfo[i].rss_query_enabled);
3758         }
3759 }
3760
3761 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3762 {
3763         struct ixgbe_hw *hw = &adapter->hw;
3764         struct net_device *netdev = adapter->netdev;
3765         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3766         struct ixgbe_ring *rx_ring;
3767         int i;
3768         u32 mhadd, hlreg0;
3769
3770 #ifdef IXGBE_FCOE
3771         /* adjust max frame to be able to do baby jumbo for FCoE */
3772         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3773             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3774                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3775
3776 #endif /* IXGBE_FCOE */
3777
3778         /* adjust max frame to be at least the size of a standard frame */
3779         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3780                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3781
3782         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3783         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3784                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3785                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3786
3787                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3788         }
3789
3790         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3791         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3792         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3793         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3794
3795         /*
3796          * Setup the HW Rx Head and Tail Descriptor Pointers and
3797          * the Base and Length of the Rx Descriptor Ring
3798          */
3799         for (i = 0; i < adapter->num_rx_queues; i++) {
3800                 rx_ring = adapter->rx_ring[i];
3801                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3802                         set_ring_rsc_enabled(rx_ring);
3803                 else
3804                         clear_ring_rsc_enabled(rx_ring);
3805         }
3806 }
3807
3808 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3809 {
3810         struct ixgbe_hw *hw = &adapter->hw;
3811         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3812
3813         switch (hw->mac.type) {
3814         case ixgbe_mac_82598EB:
3815                 /*
3816                  * For VMDq support of different descriptor types or
3817                  * buffer sizes through the use of multiple SRRCTL
3818                  * registers, RDRXCTL.MVMEN must be set to 1
3819                  *
3820                  * also, the manual doesn't mention it clearly but DCA hints
3821                  * will only use queue 0's tags unless this bit is set.  Side
3822                  * effects of setting this bit are only that SRRCTL must be
3823                  * fully programmed [0..15]
3824                  */
3825                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3826                 break;
3827         case ixgbe_mac_X550:
3828         case ixgbe_mac_X550EM_x:
3829                 if (adapter->num_vfs)
3830                         rdrxctl |= IXGBE_RDRXCTL_PSP;
3831                 /* fall through for older HW */
3832         case ixgbe_mac_82599EB:
3833         case ixgbe_mac_X540:
3834                 /* Disable RSC for ACK packets */
3835                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3836                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3837                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3838                 /* hardware requires some bits to be set by default */
3839                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3840                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3841                 break;
3842         default:
3843                 /* We should do nothing since we don't know this hardware */
3844                 return;
3845         }
3846
3847         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3848 }
3849
3850 /**
3851  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3852  * @adapter: board private structure
3853  *
3854  * Configure the Rx unit of the MAC after a reset.
3855  **/
3856 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3857 {
3858         struct ixgbe_hw *hw = &adapter->hw;
3859         int i;
3860         u32 rxctrl, rfctl;
3861
3862         /* disable receives while setting up the descriptors */
3863         hw->mac.ops.disable_rx(hw);
3864
3865         ixgbe_setup_psrtype(adapter);
3866         ixgbe_setup_rdrxctl(adapter);
3867
3868         /* RSC Setup */
3869         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3870         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3871         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3872                 rfctl |= IXGBE_RFCTL_RSC_DIS;
3873         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3874
3875         /* Program registers for the distribution of queues */
3876         ixgbe_setup_mrqc(adapter);
3877
3878         /* set_rx_buffer_len must be called before ring initialization */
3879         ixgbe_set_rx_buffer_len(adapter);
3880
3881         /*
3882          * Setup the HW Rx Head and Tail Descriptor Pointers and
3883          * the Base and Length of the Rx Descriptor Ring
3884          */
3885         for (i = 0; i < adapter->num_rx_queues; i++)
3886                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3887
3888         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3889         /* disable drop enable for 82598 parts */
3890         if (hw->mac.type == ixgbe_mac_82598EB)
3891                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3892
3893         /* enable all receives */
3894         rxctrl |= IXGBE_RXCTRL_RXEN;
3895         hw->mac.ops.enable_rx_dma(hw, rxctrl);
3896 }
3897
3898 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3899                                  __be16 proto, u16 vid)
3900 {
3901         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3902         struct ixgbe_hw *hw = &adapter->hw;
3903
3904         /* add VID to filter table */
3905         hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3906         set_bit(vid, adapter->active_vlans);
3907
3908         return 0;
3909 }
3910
3911 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3912                                   __be16 proto, u16 vid)
3913 {
3914         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3915         struct ixgbe_hw *hw = &adapter->hw;
3916
3917         /* remove VID from filter table */
3918         hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3919         clear_bit(vid, adapter->active_vlans);
3920
3921         return 0;
3922 }
3923
3924 /**
3925  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3926  * @adapter: driver data
3927  */
3928 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3929 {
3930         struct ixgbe_hw *hw = &adapter->hw;
3931         u32 vlnctrl;
3932         int i, j;
3933
3934         switch (hw->mac.type) {
3935         case ixgbe_mac_82598EB:
3936                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3937                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3938                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3939                 break;
3940         case ixgbe_mac_82599EB:
3941         case ixgbe_mac_X540:
3942         case ixgbe_mac_X550:
3943         case ixgbe_mac_X550EM_x:
3944                 for (i = 0; i < adapter->num_rx_queues; i++) {
3945                         struct ixgbe_ring *ring = adapter->rx_ring[i];
3946
3947                         if (ring->l2_accel_priv)
3948                                 continue;
3949                         j = ring->reg_idx;
3950                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3951                         vlnctrl &= ~IXGBE_RXDCTL_VME;
3952                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3953                 }
3954                 break;
3955         default:
3956                 break;
3957         }
3958 }
3959
3960 /**
3961  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3962  * @adapter: driver data
3963  */
3964 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3965 {
3966         struct ixgbe_hw *hw = &adapter->hw;
3967         u32 vlnctrl;
3968         int i, j;
3969
3970         switch (hw->mac.type) {
3971         case ixgbe_mac_82598EB:
3972                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3973                 vlnctrl |= IXGBE_VLNCTRL_VME;
3974                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3975                 break;
3976         case ixgbe_mac_82599EB:
3977         case ixgbe_mac_X540:
3978         case ixgbe_mac_X550:
3979         case ixgbe_mac_X550EM_x:
3980                 for (i = 0; i < adapter->num_rx_queues; i++) {
3981                         struct ixgbe_ring *ring = adapter->rx_ring[i];
3982
3983                         if (ring->l2_accel_priv)
3984                                 continue;
3985                         j = ring->reg_idx;
3986                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3987                         vlnctrl |= IXGBE_RXDCTL_VME;
3988                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3989                 }
3990                 break;
3991         default:
3992                 break;
3993         }
3994 }
3995
3996 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3997 {
3998         u16 vid;
3999
4000         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4001
4002         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4003                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4004 }
4005
4006 /**
4007  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4008  * @netdev: network interface device structure
4009  *
4010  * Writes multicast address list to the MTA hash table.
4011  * Returns: -ENOMEM on failure
4012  *                0 on no addresses written
4013  *                X on writing X addresses to MTA
4014  **/
4015 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4016 {
4017         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4018         struct ixgbe_hw *hw = &adapter->hw;
4019
4020         if (!netif_running(netdev))
4021                 return 0;
4022
4023         if (hw->mac.ops.update_mc_addr_list)
4024                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4025         else
4026                 return -ENOMEM;
4027
4028 #ifdef CONFIG_PCI_IOV
4029         ixgbe_restore_vf_multicasts(adapter);
4030 #endif
4031
4032         return netdev_mc_count(netdev);
4033 }
4034
4035 #ifdef CONFIG_PCI_IOV
4036 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4037 {
4038         struct ixgbe_hw *hw = &adapter->hw;
4039         int i;
4040         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4041                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4042                         hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
4043                                             adapter->mac_table[i].queue,
4044                                             IXGBE_RAH_AV);
4045                 else
4046                         hw->mac.ops.clear_rar(hw, i);
4047
4048                 adapter->mac_table[i].state &= ~(IXGBE_MAC_STATE_MODIFIED);
4049         }
4050 }
4051 #endif
4052
4053 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4054 {
4055         struct ixgbe_hw *hw = &adapter->hw;
4056         int i;
4057         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4058                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
4059                         if (adapter->mac_table[i].state &
4060                             IXGBE_MAC_STATE_IN_USE)
4061                                 hw->mac.ops.set_rar(hw, i,
4062                                                 adapter->mac_table[i].addr,
4063                                                 adapter->mac_table[i].queue,
4064                                                 IXGBE_RAH_AV);
4065                         else
4066                                 hw->mac.ops.clear_rar(hw, i);
4067
4068                         adapter->mac_table[i].state &=
4069                                                 ~(IXGBE_MAC_STATE_MODIFIED);
4070                 }
4071         }
4072 }
4073
4074 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4075 {
4076         int i;
4077         struct ixgbe_hw *hw = &adapter->hw;
4078
4079         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4080                 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4081                 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4082                 eth_zero_addr(adapter->mac_table[i].addr);
4083                 adapter->mac_table[i].queue = 0;
4084         }
4085         ixgbe_sync_mac_table(adapter);
4086 }
4087
4088 static int ixgbe_available_rars(struct ixgbe_adapter *adapter)
4089 {
4090         struct ixgbe_hw *hw = &adapter->hw;
4091         int i, count = 0;
4092
4093         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4094                 if (adapter->mac_table[i].state == 0)
4095                         count++;
4096         }
4097         return count;
4098 }
4099
4100 /* this function destroys the first RAR entry */
4101 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter,
4102                                          u8 *addr)
4103 {
4104         struct ixgbe_hw *hw = &adapter->hw;
4105
4106         memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
4107         adapter->mac_table[0].queue = VMDQ_P(0);
4108         adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
4109                                        IXGBE_MAC_STATE_IN_USE);
4110         hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
4111                             adapter->mac_table[0].queue,
4112                             IXGBE_RAH_AV);
4113 }
4114
4115 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4116 {
4117         struct ixgbe_hw *hw = &adapter->hw;
4118         int i;
4119
4120         if (is_zero_ether_addr(addr))
4121                 return -EINVAL;
4122
4123         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4124                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4125                         continue;
4126                 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
4127                                                 IXGBE_MAC_STATE_IN_USE);
4128                 ether_addr_copy(adapter->mac_table[i].addr, addr);
4129                 adapter->mac_table[i].queue = queue;
4130                 ixgbe_sync_mac_table(adapter);
4131                 return i;
4132         }
4133         return -ENOMEM;
4134 }
4135
4136 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4137 {
4138         /* search table for addr, if found, set to 0 and sync */
4139         int i;
4140         struct ixgbe_hw *hw = &adapter->hw;
4141
4142         if (is_zero_ether_addr(addr))
4143                 return -EINVAL;
4144
4145         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4146                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
4147                     adapter->mac_table[i].queue == queue) {
4148                         adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4149                         adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4150                         eth_zero_addr(adapter->mac_table[i].addr);
4151                         adapter->mac_table[i].queue = 0;
4152                         ixgbe_sync_mac_table(adapter);
4153                         return 0;
4154                 }
4155         }
4156         return -ENOMEM;
4157 }
4158 /**
4159  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4160  * @netdev: network interface device structure
4161  *
4162  * Writes unicast address list to the RAR table.
4163  * Returns: -ENOMEM on failure/insufficient address space
4164  *                0 on no addresses written
4165  *                X on writing X addresses to the RAR table
4166  **/
4167 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4168 {
4169         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4170         int count = 0;
4171
4172         /* return ENOMEM indicating insufficient memory for addresses */
4173         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
4174                 return -ENOMEM;
4175
4176         if (!netdev_uc_empty(netdev)) {
4177                 struct netdev_hw_addr *ha;
4178                 netdev_for_each_uc_addr(ha, netdev) {
4179                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4180                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4181                         count++;
4182                 }
4183         }
4184         return count;
4185 }
4186
4187 /**
4188  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4189  * @netdev: network interface device structure
4190  *
4191  * The set_rx_method entry point is called whenever the unicast/multicast
4192  * address list or the network interface flags are updated.  This routine is
4193  * responsible for configuring the hardware for proper unicast, multicast and
4194  * promiscuous mode.
4195  **/
4196 void ixgbe_set_rx_mode(struct net_device *netdev)
4197 {
4198         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4199         struct ixgbe_hw *hw = &adapter->hw;
4200         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4201         u32 vlnctrl;
4202         int count;
4203
4204         /* Check for Promiscuous and All Multicast modes */
4205         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4206         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4207
4208         /* set all bits that we expect to always be set */
4209         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4210         fctrl |= IXGBE_FCTRL_BAM;
4211         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4212         fctrl |= IXGBE_FCTRL_PMCF;
4213
4214         /* clear the bits we are changing the status of */
4215         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4216         vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4217         if (netdev->flags & IFF_PROMISC) {
4218                 hw->addr_ctrl.user_set_promisc = true;
4219                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4220                 vmolr |= IXGBE_VMOLR_MPE;
4221                 /* Only disable hardware filter vlans in promiscuous mode
4222                  * if SR-IOV and VMDQ are disabled - otherwise ensure
4223                  * that hardware VLAN filters remain enabled.
4224                  */
4225                 if (adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
4226                                       IXGBE_FLAG_SRIOV_ENABLED))
4227                         vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4228         } else {
4229                 if (netdev->flags & IFF_ALLMULTI) {
4230                         fctrl |= IXGBE_FCTRL_MPE;
4231                         vmolr |= IXGBE_VMOLR_MPE;
4232                 }
4233                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4234                 hw->addr_ctrl.user_set_promisc = false;
4235         }
4236
4237         /*
4238          * Write addresses to available RAR registers, if there is not
4239          * sufficient space to store all the addresses then enable
4240          * unicast promiscuous mode
4241          */
4242         count = ixgbe_write_uc_addr_list(netdev, VMDQ_P(0));
4243         if (count < 0) {
4244                 fctrl |= IXGBE_FCTRL_UPE;
4245                 vmolr |= IXGBE_VMOLR_ROPE;
4246         }
4247
4248         /* Write addresses to the MTA, if the attempt fails
4249          * then we should just turn on promiscuous mode so
4250          * that we can at least receive multicast traffic
4251          */
4252         count = ixgbe_write_mc_addr_list(netdev);
4253         if (count < 0) {
4254                 fctrl |= IXGBE_FCTRL_MPE;
4255                 vmolr |= IXGBE_VMOLR_MPE;
4256         } else if (count) {
4257                 vmolr |= IXGBE_VMOLR_ROMPE;
4258         }
4259
4260         if (hw->mac.type != ixgbe_mac_82598EB) {
4261                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4262                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4263                            IXGBE_VMOLR_ROPE);
4264                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4265         }
4266
4267         /* This is useful for sniffing bad packets. */
4268         if (adapter->netdev->features & NETIF_F_RXALL) {
4269                 /* UPE and MPE will be handled by normal PROMISC logic
4270                  * in e1000e_set_rx_mode */
4271                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4272                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4273                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4274
4275                 fctrl &= ~(IXGBE_FCTRL_DPF);
4276                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4277         }
4278
4279         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4280         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4281
4282         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4283                 ixgbe_vlan_strip_enable(adapter);
4284         else
4285                 ixgbe_vlan_strip_disable(adapter);
4286 }
4287
4288 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4289 {
4290         int q_idx;
4291
4292         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4293                 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4294                 napi_enable(&adapter->q_vector[q_idx]->napi);
4295         }
4296 }
4297
4298 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4299 {
4300         int q_idx;
4301
4302         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4303                 napi_disable(&adapter->q_vector[q_idx]->napi);
4304                 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4305                         pr_info("QV %d locked\n", q_idx);
4306                         usleep_range(1000, 20000);
4307                 }
4308         }
4309 }
4310
4311 static void ixgbe_clear_vxlan_port(struct ixgbe_adapter *adapter)
4312 {
4313         switch (adapter->hw.mac.type) {
4314         case ixgbe_mac_X550:
4315         case ixgbe_mac_X550EM_x:
4316                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VXLANCTRL, 0);
4317 #ifdef CONFIG_IXGBE_VXLAN
4318                 adapter->vxlan_port = 0;
4319 #endif
4320                 break;
4321         default:
4322                 break;
4323         }
4324 }
4325
4326 #ifdef CONFIG_IXGBE_DCB
4327 /**
4328  * ixgbe_configure_dcb - Configure DCB hardware
4329  * @adapter: ixgbe adapter struct
4330  *
4331  * This is called by the driver on open to configure the DCB hardware.
4332  * This is also called by the gennetlink interface when reconfiguring
4333  * the DCB state.
4334  */
4335 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4336 {
4337         struct ixgbe_hw *hw = &adapter->hw;
4338         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4339
4340         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4341                 if (hw->mac.type == ixgbe_mac_82598EB)
4342                         netif_set_gso_max_size(adapter->netdev, 65536);
4343                 return;
4344         }
4345
4346         if (hw->mac.type == ixgbe_mac_82598EB)
4347                 netif_set_gso_max_size(adapter->netdev, 32768);
4348
4349 #ifdef IXGBE_FCOE
4350         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4351                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4352 #endif
4353
4354         /* reconfigure the hardware */
4355         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4356                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4357                                                 DCB_TX_CONFIG);
4358                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4359                                                 DCB_RX_CONFIG);
4360                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4361         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4362                 ixgbe_dcb_hw_ets(&adapter->hw,
4363                                  adapter->ixgbe_ieee_ets,
4364                                  max_frame);
4365                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4366                                         adapter->ixgbe_ieee_pfc->pfc_en,
4367                                         adapter->ixgbe_ieee_ets->prio_tc);
4368         }
4369
4370         /* Enable RSS Hash per TC */
4371         if (hw->mac.type != ixgbe_mac_82598EB) {
4372                 u32 msb = 0;
4373                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4374
4375                 while (rss_i) {
4376                         msb++;
4377                         rss_i >>= 1;
4378                 }
4379
4380                 /* write msb to all 8 TCs in one write */
4381                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4382         }
4383 }
4384 #endif
4385
4386 /* Additional bittime to account for IXGBE framing */
4387 #define IXGBE_ETH_FRAMING 20
4388
4389 /**
4390  * ixgbe_hpbthresh - calculate high water mark for flow control
4391  *
4392  * @adapter: board private structure to calculate for
4393  * @pb: packet buffer to calculate
4394  */
4395 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4396 {
4397         struct ixgbe_hw *hw = &adapter->hw;
4398         struct net_device *dev = adapter->netdev;
4399         int link, tc, kb, marker;
4400         u32 dv_id, rx_pba;
4401
4402         /* Calculate max LAN frame size */
4403         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4404
4405 #ifdef IXGBE_FCOE
4406         /* FCoE traffic class uses FCOE jumbo frames */
4407         if ((dev->features & NETIF_F_FCOE_MTU) &&
4408             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4409             (pb == ixgbe_fcoe_get_tc(adapter)))
4410                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4411 #endif
4412
4413         /* Calculate delay value for device */
4414         switch (hw->mac.type) {
4415         case ixgbe_mac_X540:
4416         case ixgbe_mac_X550:
4417         case ixgbe_mac_X550EM_x:
4418                 dv_id = IXGBE_DV_X540(link, tc);
4419                 break;
4420         default:
4421                 dv_id = IXGBE_DV(link, tc);
4422                 break;
4423         }
4424
4425         /* Loopback switch introduces additional latency */
4426         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4427                 dv_id += IXGBE_B2BT(tc);
4428
4429         /* Delay value is calculated in bit times convert to KB */
4430         kb = IXGBE_BT2KB(dv_id);
4431         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4432
4433         marker = rx_pba - kb;
4434
4435         /* It is possible that the packet buffer is not large enough
4436          * to provide required headroom. In this case throw an error
4437          * to user and a do the best we can.
4438          */
4439         if (marker < 0) {
4440                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4441                             "headroom to support flow control."
4442                             "Decrease MTU or number of traffic classes\n", pb);
4443                 marker = tc + 1;
4444         }
4445
4446         return marker;
4447 }
4448
4449 /**
4450  * ixgbe_lpbthresh - calculate low water mark for for flow control
4451  *
4452  * @adapter: board private structure to calculate for
4453  * @pb: packet buffer to calculate
4454  */
4455 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4456 {
4457         struct ixgbe_hw *hw = &adapter->hw;
4458         struct net_device *dev = adapter->netdev;
4459         int tc;
4460         u32 dv_id;
4461
4462         /* Calculate max LAN frame size */
4463         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4464
4465 #ifdef IXGBE_FCOE
4466         /* FCoE traffic class uses FCOE jumbo frames */
4467         if ((dev->features & NETIF_F_FCOE_MTU) &&
4468             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4469             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4470                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4471 #endif
4472
4473         /* Calculate delay value for device */
4474         switch (hw->mac.type) {
4475         case ixgbe_mac_X540:
4476         case ixgbe_mac_X550:
4477         case ixgbe_mac_X550EM_x:
4478                 dv_id = IXGBE_LOW_DV_X540(tc);
4479                 break;
4480         default:
4481                 dv_id = IXGBE_LOW_DV(tc);
4482                 break;
4483         }
4484
4485         /* Delay value is calculated in bit times convert to KB */
4486         return IXGBE_BT2KB(dv_id);
4487 }
4488
4489 /*
4490  * ixgbe_pbthresh_setup - calculate and setup high low water marks
4491  */
4492 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4493 {
4494         struct ixgbe_hw *hw = &adapter->hw;
4495         int num_tc = netdev_get_num_tc(adapter->netdev);
4496         int i;
4497
4498         if (!num_tc)
4499                 num_tc = 1;
4500
4501         for (i = 0; i < num_tc; i++) {
4502                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4503                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4504
4505                 /* Low water marks must not be larger than high water marks */
4506                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4507                         hw->fc.low_water[i] = 0;
4508         }
4509
4510         for (; i < MAX_TRAFFIC_CLASS; i++)
4511                 hw->fc.high_water[i] = 0;
4512 }
4513
4514 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4515 {
4516         struct ixgbe_hw *hw = &adapter->hw;
4517         int hdrm;
4518         u8 tc = netdev_get_num_tc(adapter->netdev);
4519
4520         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4521             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4522                 hdrm = 32 << adapter->fdir_pballoc;
4523         else
4524                 hdrm = 0;
4525
4526         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4527         ixgbe_pbthresh_setup(adapter);
4528 }
4529
4530 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4531 {
4532         struct ixgbe_hw *hw = &adapter->hw;
4533         struct hlist_node *node2;
4534         struct ixgbe_fdir_filter *filter;
4535
4536         spin_lock(&adapter->fdir_perfect_lock);
4537
4538         if (!hlist_empty(&adapter->fdir_filter_list))
4539                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4540
4541         hlist_for_each_entry_safe(filter, node2,
4542                                   &adapter->fdir_filter_list, fdir_node) {
4543                 ixgbe_fdir_write_perfect_filter_82599(hw,
4544                                 &filter->filter,
4545                                 filter->sw_idx,
4546                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4547                                 IXGBE_FDIR_DROP_QUEUE :
4548                                 adapter->rx_ring[filter->action]->reg_idx);
4549         }
4550
4551         spin_unlock(&adapter->fdir_perfect_lock);
4552 }
4553
4554 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4555                                       struct ixgbe_adapter *adapter)
4556 {
4557         struct ixgbe_hw *hw = &adapter->hw;
4558         u32 vmolr;
4559
4560         /* No unicast promiscuous support for VMDQ devices. */
4561         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4562         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4563
4564         /* clear the affected bit */
4565         vmolr &= ~IXGBE_VMOLR_MPE;
4566
4567         if (dev->flags & IFF_ALLMULTI) {
4568                 vmolr |= IXGBE_VMOLR_MPE;
4569         } else {
4570                 vmolr |= IXGBE_VMOLR_ROMPE;
4571                 hw->mac.ops.update_mc_addr_list(hw, dev);
4572         }
4573         ixgbe_write_uc_addr_list(adapter->netdev, pool);
4574         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4575 }
4576
4577 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4578 {
4579         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4580         int rss_i = adapter->num_rx_queues_per_pool;
4581         struct ixgbe_hw *hw = &adapter->hw;
4582         u16 pool = vadapter->pool;
4583         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4584                       IXGBE_PSRTYPE_UDPHDR |
4585                       IXGBE_PSRTYPE_IPV4HDR |
4586                       IXGBE_PSRTYPE_L2HDR |
4587                       IXGBE_PSRTYPE_IPV6HDR;
4588
4589         if (hw->mac.type == ixgbe_mac_82598EB)
4590                 return;
4591
4592         if (rss_i > 3)
4593                 psrtype |= 2 << 29;
4594         else if (rss_i > 1)
4595                 psrtype |= 1 << 29;
4596
4597         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4598 }
4599
4600 /**
4601  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4602  * @rx_ring: ring to free buffers from
4603  **/
4604 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4605 {
4606         struct device *dev = rx_ring->dev;
4607         unsigned long size;
4608         u16 i;
4609
4610         /* ring already cleared, nothing to do */
4611         if (!rx_ring->rx_buffer_info)
4612                 return;
4613
4614         /* Free all the Rx ring sk_buffs */
4615         for (i = 0; i < rx_ring->count; i++) {
4616                 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4617
4618                 if (rx_buffer->skb) {
4619                         struct sk_buff *skb = rx_buffer->skb;
4620                         if (IXGBE_CB(skb)->page_released)
4621                                 dma_unmap_page(dev,
4622                                                IXGBE_CB(skb)->dma,
4623                                                ixgbe_rx_bufsz(rx_ring),
4624                                                DMA_FROM_DEVICE);
4625                         dev_kfree_skb(skb);
4626                         rx_buffer->skb = NULL;
4627                 }
4628
4629                 if (!rx_buffer->page)
4630                         continue;
4631
4632                 dma_unmap_page(dev, rx_buffer->dma,
4633                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4634                 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4635
4636                 rx_buffer->page = NULL;
4637         }
4638
4639         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4640         memset(rx_ring->rx_buffer_info, 0, size);
4641
4642         /* Zero out the descriptor ring */
4643         memset(rx_ring->desc, 0, rx_ring->size);
4644
4645         rx_ring->next_to_alloc = 0;
4646         rx_ring->next_to_clean = 0;
4647         rx_ring->next_to_use = 0;
4648 }
4649
4650 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4651                                    struct ixgbe_ring *rx_ring)
4652 {
4653         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4654         int index = rx_ring->queue_index + vadapter->rx_base_queue;
4655
4656         /* shutdown specific queue receive and wait for dma to settle */
4657         ixgbe_disable_rx_queue(adapter, rx_ring);
4658         usleep_range(10000, 20000);
4659         ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4660         ixgbe_clean_rx_ring(rx_ring);
4661         rx_ring->l2_accel_priv = NULL;
4662 }
4663
4664 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4665                                struct ixgbe_fwd_adapter *accel)
4666 {
4667         struct ixgbe_adapter *adapter = accel->real_adapter;
4668         unsigned int rxbase = accel->rx_base_queue;
4669         unsigned int txbase = accel->tx_base_queue;
4670         int i;
4671
4672         netif_tx_stop_all_queues(vdev);
4673
4674         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4675                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4676                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4677         }
4678
4679         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4680                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4681                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4682         }
4683
4684
4685         return 0;
4686 }
4687
4688 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4689                              struct ixgbe_fwd_adapter *accel)
4690 {
4691         struct ixgbe_adapter *adapter = accel->real_adapter;
4692         unsigned int rxbase, txbase, queues;
4693         int i, baseq, err = 0;
4694
4695         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4696                 return 0;
4697
4698         baseq = accel->pool * adapter->num_rx_queues_per_pool;
4699         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4700                    accel->pool, adapter->num_rx_pools,
4701                    baseq, baseq + adapter->num_rx_queues_per_pool,
4702                    adapter->fwd_bitmask);
4703
4704         accel->netdev = vdev;
4705         accel->rx_base_queue = rxbase = baseq;
4706         accel->tx_base_queue = txbase = baseq;
4707
4708         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4709                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4710
4711         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4712                 adapter->rx_ring[rxbase + i]->netdev = vdev;
4713                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4714                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4715         }
4716
4717         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4718                 adapter->tx_ring[txbase + i]->netdev = vdev;
4719                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4720         }
4721
4722         queues = min_t(unsigned int,
4723                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4724         err = netif_set_real_num_tx_queues(vdev, queues);
4725         if (err)
4726                 goto fwd_queue_err;
4727
4728         err = netif_set_real_num_rx_queues(vdev, queues);
4729         if (err)
4730                 goto fwd_queue_err;
4731
4732         if (is_valid_ether_addr(vdev->dev_addr))
4733                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4734
4735         ixgbe_fwd_psrtype(accel);
4736         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4737         return err;
4738 fwd_queue_err:
4739         ixgbe_fwd_ring_down(vdev, accel);
4740         return err;
4741 }
4742
4743 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4744 {
4745         struct net_device *upper;
4746         struct list_head *iter;
4747         int err;
4748
4749         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4750                 if (netif_is_macvlan(upper)) {
4751                         struct macvlan_dev *dfwd = netdev_priv(upper);
4752                         struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4753
4754                         if (dfwd->fwd_priv) {
4755                                 err = ixgbe_fwd_ring_up(upper, vadapter);
4756                                 if (err)
4757                                         continue;
4758                         }
4759                 }
4760         }
4761 }
4762
4763 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4764 {
4765         struct ixgbe_hw *hw = &adapter->hw;
4766
4767         ixgbe_configure_pb(adapter);
4768 #ifdef CONFIG_IXGBE_DCB
4769         ixgbe_configure_dcb(adapter);
4770 #endif
4771         /*
4772          * We must restore virtualization before VLANs or else
4773          * the VLVF registers will not be populated
4774          */
4775         ixgbe_configure_virtualization(adapter);
4776
4777         ixgbe_set_rx_mode(adapter->netdev);
4778         ixgbe_restore_vlan(adapter);
4779
4780         switch (hw->mac.type) {
4781         case ixgbe_mac_82599EB:
4782         case ixgbe_mac_X540:
4783                 hw->mac.ops.disable_rx_buff(hw);
4784                 break;
4785         default:
4786                 break;
4787         }
4788
4789         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4790                 ixgbe_init_fdir_signature_82599(&adapter->hw,
4791                                                 adapter->fdir_pballoc);
4792         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4793                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4794                                               adapter->fdir_pballoc);
4795                 ixgbe_fdir_filter_restore(adapter);
4796         }
4797
4798         switch (hw->mac.type) {
4799         case ixgbe_mac_82599EB:
4800         case ixgbe_mac_X540:
4801                 hw->mac.ops.enable_rx_buff(hw);
4802                 break;
4803         default:
4804                 break;
4805         }
4806
4807 #ifdef CONFIG_IXGBE_DCA
4808         /* configure DCA */
4809         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
4810                 ixgbe_setup_dca(adapter);
4811 #endif /* CONFIG_IXGBE_DCA */
4812
4813 #ifdef IXGBE_FCOE
4814         /* configure FCoE L2 filters, redirection table, and Rx control */
4815         ixgbe_configure_fcoe(adapter);
4816
4817 #endif /* IXGBE_FCOE */
4818         ixgbe_configure_tx(adapter);
4819         ixgbe_configure_rx(adapter);
4820         ixgbe_configure_dfwd(adapter);
4821 }
4822
4823 /**
4824  * ixgbe_sfp_link_config - set up SFP+ link
4825  * @adapter: pointer to private adapter struct
4826  **/
4827 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4828 {
4829         /*
4830          * We are assuming the worst case scenario here, and that
4831          * is that an SFP was inserted/removed after the reset
4832          * but before SFP detection was enabled.  As such the best
4833          * solution is to just start searching as soon as we start
4834          */
4835         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4836                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4837
4838         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4839         adapter->sfp_poll_time = 0;
4840 }
4841
4842 /**
4843  * ixgbe_non_sfp_link_config - set up non-SFP+ link
4844  * @hw: pointer to private hardware struct
4845  *
4846  * Returns 0 on success, negative on failure
4847  **/
4848 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4849 {
4850         u32 speed;
4851         bool autoneg, link_up = false;
4852         int ret = IXGBE_ERR_LINK_SETUP;
4853
4854         if (hw->mac.ops.check_link)
4855                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4856
4857         if (ret)
4858                 return ret;
4859
4860         speed = hw->phy.autoneg_advertised;
4861         if ((!speed) && (hw->mac.ops.get_link_capabilities))
4862                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4863                                                         &autoneg);
4864         if (ret)
4865                 return ret;
4866
4867         if (hw->mac.ops.setup_link)
4868                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4869
4870         return ret;
4871 }
4872
4873 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4874 {
4875         struct ixgbe_hw *hw = &adapter->hw;
4876         u32 gpie = 0;
4877
4878         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4879                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4880                        IXGBE_GPIE_OCD;
4881                 gpie |= IXGBE_GPIE_EIAME;
4882                 /*
4883                  * use EIAM to auto-mask when MSI-X interrupt is asserted
4884                  * this saves a register write for every interrupt
4885                  */
4886                 switch (hw->mac.type) {
4887                 case ixgbe_mac_82598EB:
4888                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4889                         break;
4890                 case ixgbe_mac_82599EB:
4891                 case ixgbe_mac_X540:
4892                 case ixgbe_mac_X550:
4893                 case ixgbe_mac_X550EM_x:
4894                 default:
4895                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4896                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4897                         break;
4898                 }
4899         } else {
4900                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4901                  * specifically only auto mask tx and rx interrupts */
4902                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4903         }
4904
4905         /* XXX: to interrupt immediately for EICS writes, enable this */
4906         /* gpie |= IXGBE_GPIE_EIMEN; */
4907
4908         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4909                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4910
4911                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4912                 case IXGBE_82599_VMDQ_8Q_MASK:
4913                         gpie |= IXGBE_GPIE_VTMODE_16;
4914                         break;
4915                 case IXGBE_82599_VMDQ_4Q_MASK:
4916                         gpie |= IXGBE_GPIE_VTMODE_32;
4917                         break;
4918                 default:
4919                         gpie |= IXGBE_GPIE_VTMODE_64;
4920                         break;
4921                 }
4922         }
4923
4924         /* Enable Thermal over heat sensor interrupt */
4925         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4926                 switch (adapter->hw.mac.type) {
4927                 case ixgbe_mac_82599EB:
4928                         gpie |= IXGBE_SDP0_GPIEN_8259X;
4929                         break;
4930                 default:
4931                         break;
4932                 }
4933         }
4934
4935         /* Enable fan failure interrupt */
4936         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4937                 gpie |= IXGBE_SDP1_GPIEN(hw);
4938
4939         switch (hw->mac.type) {
4940         case ixgbe_mac_82599EB:
4941                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
4942                 break;
4943         case ixgbe_mac_X550EM_x:
4944                 gpie |= IXGBE_SDP0_GPIEN_X540;
4945                 break;
4946         default:
4947                 break;
4948         }
4949
4950         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4951 }
4952
4953 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4954 {
4955         struct ixgbe_hw *hw = &adapter->hw;
4956         int err;
4957         u32 ctrl_ext;
4958
4959         ixgbe_get_hw_control(adapter);
4960         ixgbe_setup_gpie(adapter);
4961
4962         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4963                 ixgbe_configure_msix(adapter);
4964         else
4965                 ixgbe_configure_msi_and_legacy(adapter);
4966
4967         /* enable the optics for 82599 SFP+ fiber */
4968         if (hw->mac.ops.enable_tx_laser)
4969                 hw->mac.ops.enable_tx_laser(hw);
4970
4971         if (hw->phy.ops.set_phy_power)
4972                 hw->phy.ops.set_phy_power(hw, true);
4973
4974         smp_mb__before_atomic();
4975         clear_bit(__IXGBE_DOWN, &adapter->state);
4976         ixgbe_napi_enable_all(adapter);
4977
4978         if (ixgbe_is_sfp(hw)) {
4979                 ixgbe_sfp_link_config(adapter);
4980         } else {
4981                 err = ixgbe_non_sfp_link_config(hw);
4982                 if (err)
4983                         e_err(probe, "link_config FAILED %d\n", err);
4984         }
4985
4986         /* clear any pending interrupts, may auto mask */
4987         IXGBE_READ_REG(hw, IXGBE_EICR);
4988         ixgbe_irq_enable(adapter, true, true);
4989
4990         /*
4991          * If this adapter has a fan, check to see if we had a failure
4992          * before we enabled the interrupt.
4993          */
4994         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4995                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4996                 if (esdp & IXGBE_ESDP_SDP1)
4997                         e_crit(drv, "Fan has stopped, replace the adapter\n");
4998         }
4999
5000         /* bring the link up in the watchdog, this could race with our first
5001          * link up interrupt but shouldn't be a problem */
5002         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5003         adapter->link_check_timeout = jiffies;
5004         mod_timer(&adapter->service_timer, jiffies);
5005
5006         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5007         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5008         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5009         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5010 }
5011
5012 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5013 {
5014         WARN_ON(in_interrupt());
5015         /* put off any impending NetWatchDogTimeout */
5016         adapter->netdev->trans_start = jiffies;
5017
5018         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5019                 usleep_range(1000, 2000);
5020         ixgbe_down(adapter);
5021         /*
5022          * If SR-IOV enabled then wait a bit before bringing the adapter
5023          * back up to give the VFs time to respond to the reset.  The
5024          * two second wait is based upon the watchdog timer cycle in
5025          * the VF driver.
5026          */
5027         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5028                 msleep(2000);
5029         ixgbe_up(adapter);
5030         clear_bit(__IXGBE_RESETTING, &adapter->state);
5031 }
5032
5033 void ixgbe_up(struct ixgbe_adapter *adapter)
5034 {
5035         /* hardware has been reset, we need to reload some things */
5036         ixgbe_configure(adapter);
5037
5038         ixgbe_up_complete(adapter);
5039 }
5040
5041 void ixgbe_reset(struct ixgbe_adapter *adapter)
5042 {
5043         struct ixgbe_hw *hw = &adapter->hw;
5044         struct net_device *netdev = adapter->netdev;
5045         int err;
5046         u8 old_addr[ETH_ALEN];
5047
5048         if (ixgbe_removed(hw->hw_addr))
5049                 return;
5050         /* lock SFP init bit to prevent race conditions with the watchdog */
5051         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5052                 usleep_range(1000, 2000);
5053
5054         /* clear all SFP and link config related flags while holding SFP_INIT */
5055         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5056                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5057         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5058
5059         err = hw->mac.ops.init_hw(hw);
5060         switch (err) {
5061         case 0:
5062         case IXGBE_ERR_SFP_NOT_PRESENT:
5063         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5064                 break;
5065         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5066                 e_dev_err("master disable timed out\n");
5067                 break;
5068         case IXGBE_ERR_EEPROM_VERSION:
5069                 /* We are running on a pre-production device, log a warning */
5070                 e_dev_warn("This device is a pre-production adapter/LOM. "
5071                            "Please be aware there may be issues associated with "
5072                            "your hardware.  If you are experiencing problems "
5073                            "please contact your Intel or hardware "
5074                            "representative who provided you with this "
5075                            "hardware.\n");
5076                 break;
5077         default:
5078                 e_dev_err("Hardware Error: %d\n", err);
5079         }
5080
5081         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5082         /* do not flush user set addresses */
5083         memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len);
5084         ixgbe_flush_sw_mac_table(adapter);
5085         ixgbe_mac_set_default_filter(adapter, old_addr);
5086
5087         /* update SAN MAC vmdq pool selection */
5088         if (hw->mac.san_mac_rar_index)
5089                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5090
5091         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5092                 ixgbe_ptp_reset(adapter);
5093
5094         if (hw->phy.ops.set_phy_power) {
5095                 if (!netif_running(adapter->netdev) && !adapter->wol)
5096                         hw->phy.ops.set_phy_power(hw, false);
5097                 else
5098                         hw->phy.ops.set_phy_power(hw, true);
5099         }
5100 }
5101
5102 /**
5103  * ixgbe_clean_tx_ring - Free Tx Buffers
5104  * @tx_ring: ring to be cleaned
5105  **/
5106 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5107 {
5108         struct ixgbe_tx_buffer *tx_buffer_info;
5109         unsigned long size;
5110         u16 i;
5111
5112         /* ring already cleared, nothing to do */
5113         if (!tx_ring->tx_buffer_info)
5114                 return;
5115
5116         /* Free all the Tx ring sk_buffs */
5117         for (i = 0; i < tx_ring->count; i++) {
5118                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5119                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5120         }
5121
5122         netdev_tx_reset_queue(txring_txq(tx_ring));
5123
5124         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5125         memset(tx_ring->tx_buffer_info, 0, size);
5126
5127         /* Zero out the descriptor ring */
5128         memset(tx_ring->desc, 0, tx_ring->size);
5129
5130         tx_ring->next_to_use = 0;
5131         tx_ring->next_to_clean = 0;
5132 }
5133
5134 /**
5135  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5136  * @adapter: board private structure
5137  **/
5138 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5139 {
5140         int i;
5141
5142         for (i = 0; i < adapter->num_rx_queues; i++)
5143                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5144 }
5145
5146 /**
5147  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5148  * @adapter: board private structure
5149  **/
5150 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5151 {
5152         int i;
5153
5154         for (i = 0; i < adapter->num_tx_queues; i++)
5155                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5156 }
5157
5158 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5159 {
5160         struct hlist_node *node2;
5161         struct ixgbe_fdir_filter *filter;
5162
5163         spin_lock(&adapter->fdir_perfect_lock);
5164
5165         hlist_for_each_entry_safe(filter, node2,
5166                                   &adapter->fdir_filter_list, fdir_node) {
5167                 hlist_del(&filter->fdir_node);
5168                 kfree(filter);
5169         }
5170         adapter->fdir_filter_count = 0;
5171
5172         spin_unlock(&adapter->fdir_perfect_lock);
5173 }
5174
5175 void ixgbe_down(struct ixgbe_adapter *adapter)
5176 {
5177         struct net_device *netdev = adapter->netdev;
5178         struct ixgbe_hw *hw = &adapter->hw;
5179         struct net_device *upper;
5180         struct list_head *iter;
5181         int i;
5182
5183         /* signal that we are down to the interrupt handler */
5184         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5185                 return; /* do nothing if already down */
5186
5187         /* disable receives */
5188         hw->mac.ops.disable_rx(hw);
5189
5190         /* disable all enabled rx queues */
5191         for (i = 0; i < adapter->num_rx_queues; i++)
5192                 /* this call also flushes the previous write */
5193                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5194
5195         usleep_range(10000, 20000);
5196
5197         netif_tx_stop_all_queues(netdev);
5198
5199         /* call carrier off first to avoid false dev_watchdog timeouts */
5200         netif_carrier_off(netdev);
5201         netif_tx_disable(netdev);
5202
5203         /* disable any upper devices */
5204         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5205                 if (netif_is_macvlan(upper)) {
5206                         struct macvlan_dev *vlan = netdev_priv(upper);
5207
5208                         if (vlan->fwd_priv) {
5209                                 netif_tx_stop_all_queues(upper);
5210                                 netif_carrier_off(upper);
5211                                 netif_tx_disable(upper);
5212                         }
5213                 }
5214         }
5215
5216         ixgbe_irq_disable(adapter);
5217
5218         ixgbe_napi_disable_all(adapter);
5219
5220         adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5221                              IXGBE_FLAG2_RESET_REQUESTED);
5222         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5223
5224         del_timer_sync(&adapter->service_timer);
5225
5226         if (adapter->num_vfs) {
5227                 /* Clear EITR Select mapping */
5228                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5229
5230                 /* Mark all the VFs as inactive */
5231                 for (i = 0 ; i < adapter->num_vfs; i++)
5232                         adapter->vfinfo[i].clear_to_send = false;
5233
5234                 /* ping all the active vfs to let them know we are going down */
5235                 ixgbe_ping_all_vfs(adapter);
5236
5237                 /* Disable all VFTE/VFRE TX/RX */
5238                 ixgbe_disable_tx_rx(adapter);
5239         }
5240
5241         /* disable transmits in the hardware now that interrupts are off */
5242         for (i = 0; i < adapter->num_tx_queues; i++) {
5243                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5244                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5245         }
5246
5247         /* Disable the Tx DMA engine on 82599 and later MAC */
5248         switch (hw->mac.type) {
5249         case ixgbe_mac_82599EB:
5250         case ixgbe_mac_X540:
5251         case ixgbe_mac_X550:
5252         case ixgbe_mac_X550EM_x:
5253                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5254                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5255                                  ~IXGBE_DMATXCTL_TE));
5256                 break;
5257         default:
5258                 break;
5259         }
5260
5261         if (!pci_channel_offline(adapter->pdev))
5262                 ixgbe_reset(adapter);
5263
5264         /* power down the optics for 82599 SFP+ fiber */
5265         if (hw->mac.ops.disable_tx_laser)
5266                 hw->mac.ops.disable_tx_laser(hw);
5267
5268         ixgbe_clean_all_tx_rings(adapter);
5269         ixgbe_clean_all_rx_rings(adapter);
5270 }
5271
5272 /**
5273  * ixgbe_tx_timeout - Respond to a Tx Hang
5274  * @netdev: network interface device structure
5275  **/
5276 static void ixgbe_tx_timeout(struct net_device *netdev)
5277 {
5278         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5279
5280         /* Do the reset outside of interrupt context */
5281         ixgbe_tx_timeout_reset(adapter);
5282 }
5283
5284 /**
5285  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5286  * @adapter: board private structure to initialize
5287  *
5288  * ixgbe_sw_init initializes the Adapter private data structure.
5289  * Fields are initialized based on PCI device information and
5290  * OS network device settings (MTU size).
5291  **/
5292 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5293 {
5294         struct ixgbe_hw *hw = &adapter->hw;
5295         struct pci_dev *pdev = adapter->pdev;
5296         unsigned int rss, fdir;
5297         u32 fwsm;
5298 #ifdef CONFIG_IXGBE_DCB
5299         int j;
5300         struct tc_configuration *tc;
5301 #endif
5302
5303         /* PCI config space info */
5304
5305         hw->vendor_id = pdev->vendor;
5306         hw->device_id = pdev->device;
5307         hw->revision_id = pdev->revision;
5308         hw->subsystem_vendor_id = pdev->subsystem_vendor;
5309         hw->subsystem_device_id = pdev->subsystem_device;
5310
5311         /* Set common capability flags and settings */
5312         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5313         adapter->ring_feature[RING_F_RSS].limit = rss;
5314         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5315         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5316         adapter->atr_sample_rate = 20;
5317         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5318         adapter->ring_feature[RING_F_FDIR].limit = fdir;
5319         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5320 #ifdef CONFIG_IXGBE_DCA
5321         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5322 #endif
5323 #ifdef IXGBE_FCOE
5324         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5325         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5326 #ifdef CONFIG_IXGBE_DCB
5327         /* Default traffic class to use for FCoE */
5328         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5329 #endif /* CONFIG_IXGBE_DCB */
5330 #endif /* IXGBE_FCOE */
5331
5332         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5333                                      hw->mac.num_rar_entries,
5334                                      GFP_ATOMIC);
5335
5336         /* Set MAC specific capability flags and exceptions */
5337         switch (hw->mac.type) {
5338         case ixgbe_mac_82598EB:
5339                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5340
5341                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5342                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5343
5344                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5345                 adapter->ring_feature[RING_F_FDIR].limit = 0;
5346                 adapter->atr_sample_rate = 0;
5347                 adapter->fdir_pballoc = 0;
5348 #ifdef IXGBE_FCOE
5349                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5350                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5351 #ifdef CONFIG_IXGBE_DCB
5352                 adapter->fcoe.up = 0;
5353 #endif /* IXGBE_DCB */
5354 #endif /* IXGBE_FCOE */
5355                 break;
5356         case ixgbe_mac_82599EB:
5357                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5358                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5359                 break;
5360         case ixgbe_mac_X540:
5361                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5362                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5363                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5364                 break;
5365         case ixgbe_mac_X550EM_x:
5366         case ixgbe_mac_X550:
5367 #ifdef CONFIG_IXGBE_DCA
5368                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5369 #endif
5370 #ifdef CONFIG_IXGBE_VXLAN
5371                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5372 #endif
5373                 break;
5374         default:
5375                 break;
5376         }
5377
5378 #ifdef IXGBE_FCOE
5379         /* FCoE support exists, always init the FCoE lock */
5380         spin_lock_init(&adapter->fcoe.lock);
5381
5382 #endif
5383         /* n-tuple support exists, always init our spinlock */
5384         spin_lock_init(&adapter->fdir_perfect_lock);
5385
5386 #ifdef CONFIG_IXGBE_DCB
5387         switch (hw->mac.type) {
5388         case ixgbe_mac_X540:
5389         case ixgbe_mac_X550:
5390         case ixgbe_mac_X550EM_x:
5391                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5392                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5393                 break;
5394         default:
5395                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5396                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5397                 break;
5398         }
5399
5400         /* Configure DCB traffic classes */
5401         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5402                 tc = &adapter->dcb_cfg.tc_config[j];
5403                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5404                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5405                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5406                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5407                 tc->dcb_pfc = pfc_disabled;
5408         }
5409
5410         /* Initialize default user to priority mapping, UPx->TC0 */
5411         tc = &adapter->dcb_cfg.tc_config[0];
5412         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5413         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5414
5415         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5416         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5417         adapter->dcb_cfg.pfc_mode_enable = false;
5418         adapter->dcb_set_bitmap = 0x00;
5419         adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5420         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5421                sizeof(adapter->temp_dcb_cfg));
5422
5423 #endif
5424
5425         /* default flow control settings */
5426         hw->fc.requested_mode = ixgbe_fc_full;
5427         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
5428         ixgbe_pbthresh_setup(adapter);
5429         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5430         hw->fc.send_xon = true;
5431         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5432
5433 #ifdef CONFIG_PCI_IOV
5434         if (max_vfs > 0)
5435                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5436
5437         /* assign number of SR-IOV VFs */
5438         if (hw->mac.type != ixgbe_mac_82598EB) {
5439                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5440                         adapter->num_vfs = 0;
5441                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5442                 } else {
5443                         adapter->num_vfs = max_vfs;
5444                 }
5445         }
5446 #endif /* CONFIG_PCI_IOV */
5447
5448         /* enable itr by default in dynamic mode */
5449         adapter->rx_itr_setting = 1;
5450         adapter->tx_itr_setting = 1;
5451
5452         /* set default ring sizes */
5453         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5454         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5455
5456         /* set default work limits */
5457         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5458
5459         /* initialize eeprom parameters */
5460         if (ixgbe_init_eeprom_params_generic(hw)) {
5461                 e_dev_err("EEPROM initialization failed\n");
5462                 return -EIO;
5463         }
5464
5465         /* PF holds first pool slot */
5466         set_bit(0, &adapter->fwd_bitmask);
5467         set_bit(__IXGBE_DOWN, &adapter->state);
5468
5469         return 0;
5470 }
5471
5472 /**
5473  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5474  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
5475  *
5476  * Return 0 on success, negative on failure
5477  **/
5478 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5479 {
5480         struct device *dev = tx_ring->dev;
5481         int orig_node = dev_to_node(dev);
5482         int ring_node = -1;
5483         int size;
5484
5485         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5486
5487         if (tx_ring->q_vector)
5488                 ring_node = tx_ring->q_vector->numa_node;
5489
5490         tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5491         if (!tx_ring->tx_buffer_info)
5492                 tx_ring->tx_buffer_info = vzalloc(size);
5493         if (!tx_ring->tx_buffer_info)
5494                 goto err;
5495
5496         u64_stats_init(&tx_ring->syncp);
5497
5498         /* round up to nearest 4K */
5499         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5500         tx_ring->size = ALIGN(tx_ring->size, 4096);
5501
5502         set_dev_node(dev, ring_node);
5503         tx_ring->desc = dma_alloc_coherent(dev,
5504                                            tx_ring->size,
5505                                            &tx_ring->dma,
5506                                            GFP_KERNEL);
5507         set_dev_node(dev, orig_node);
5508         if (!tx_ring->desc)
5509                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5510                                                    &tx_ring->dma, GFP_KERNEL);
5511         if (!tx_ring->desc)
5512                 goto err;
5513
5514         tx_ring->next_to_use = 0;
5515         tx_ring->next_to_clean = 0;
5516         return 0;
5517
5518 err:
5519         vfree(tx_ring->tx_buffer_info);
5520         tx_ring->tx_buffer_info = NULL;
5521         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5522         return -ENOMEM;
5523 }
5524
5525 /**
5526  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5527  * @adapter: board private structure
5528  *
5529  * If this function returns with an error, then it's possible one or
5530  * more of the rings is populated (while the rest are not).  It is the
5531  * callers duty to clean those orphaned rings.
5532  *
5533  * Return 0 on success, negative on failure
5534  **/
5535 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5536 {
5537         int i, err = 0;
5538
5539         for (i = 0; i < adapter->num_tx_queues; i++) {
5540                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5541                 if (!err)
5542                         continue;
5543
5544                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5545                 goto err_setup_tx;
5546         }
5547
5548         return 0;
5549 err_setup_tx:
5550         /* rewind the index freeing the rings as we go */
5551         while (i--)
5552                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5553         return err;
5554 }
5555
5556 /**
5557  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5558  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
5559  *
5560  * Returns 0 on success, negative on failure
5561  **/
5562 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5563 {
5564         struct device *dev = rx_ring->dev;
5565         int orig_node = dev_to_node(dev);
5566         int ring_node = -1;
5567         int size;
5568
5569         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5570
5571         if (rx_ring->q_vector)
5572                 ring_node = rx_ring->q_vector->numa_node;
5573
5574         rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5575         if (!rx_ring->rx_buffer_info)
5576                 rx_ring->rx_buffer_info = vzalloc(size);
5577         if (!rx_ring->rx_buffer_info)
5578                 goto err;
5579
5580         u64_stats_init(&rx_ring->syncp);
5581
5582         /* Round up to nearest 4K */
5583         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5584         rx_ring->size = ALIGN(rx_ring->size, 4096);
5585
5586         set_dev_node(dev, ring_node);
5587         rx_ring->desc = dma_alloc_coherent(dev,
5588                                            rx_ring->size,
5589                                            &rx_ring->dma,
5590                                            GFP_KERNEL);
5591         set_dev_node(dev, orig_node);
5592         if (!rx_ring->desc)
5593                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5594                                                    &rx_ring->dma, GFP_KERNEL);
5595         if (!rx_ring->desc)
5596                 goto err;
5597
5598         rx_ring->next_to_clean = 0;
5599         rx_ring->next_to_use = 0;
5600
5601         return 0;
5602 err:
5603         vfree(rx_ring->rx_buffer_info);
5604         rx_ring->rx_buffer_info = NULL;
5605         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5606         return -ENOMEM;
5607 }
5608
5609 /**
5610  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5611  * @adapter: board private structure
5612  *
5613  * If this function returns with an error, then it's possible one or
5614  * more of the rings is populated (while the rest are not).  It is the
5615  * callers duty to clean those orphaned rings.
5616  *
5617  * Return 0 on success, negative on failure
5618  **/
5619 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5620 {
5621         int i, err = 0;
5622
5623         for (i = 0; i < adapter->num_rx_queues; i++) {
5624                 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5625                 if (!err)
5626                         continue;
5627
5628                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5629                 goto err_setup_rx;
5630         }
5631
5632 #ifdef IXGBE_FCOE
5633         err = ixgbe_setup_fcoe_ddp_resources(adapter);
5634         if (!err)
5635 #endif
5636                 return 0;
5637 err_setup_rx:
5638         /* rewind the index freeing the rings as we go */
5639         while (i--)
5640                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5641         return err;
5642 }
5643
5644 /**
5645  * ixgbe_free_tx_resources - Free Tx Resources per Queue
5646  * @tx_ring: Tx descriptor ring for a specific queue
5647  *
5648  * Free all transmit software resources
5649  **/
5650 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5651 {
5652         ixgbe_clean_tx_ring(tx_ring);
5653
5654         vfree(tx_ring->tx_buffer_info);
5655         tx_ring->tx_buffer_info = NULL;
5656
5657         /* if not set, then don't free */
5658         if (!tx_ring->desc)
5659                 return;
5660
5661         dma_free_coherent(tx_ring->dev, tx_ring->size,
5662                           tx_ring->desc, tx_ring->dma);
5663
5664         tx_ring->desc = NULL;
5665 }
5666
5667 /**
5668  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5669  * @adapter: board private structure
5670  *
5671  * Free all transmit software resources
5672  **/
5673 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5674 {
5675         int i;
5676
5677         for (i = 0; i < adapter->num_tx_queues; i++)
5678                 if (adapter->tx_ring[i]->desc)
5679                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
5680 }
5681
5682 /**
5683  * ixgbe_free_rx_resources - Free Rx Resources
5684  * @rx_ring: ring to clean the resources from
5685  *
5686  * Free all receive software resources
5687  **/
5688 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5689 {
5690         ixgbe_clean_rx_ring(rx_ring);
5691
5692         vfree(rx_ring->rx_buffer_info);
5693         rx_ring->rx_buffer_info = NULL;
5694
5695         /* if not set, then don't free */
5696         if (!rx_ring->desc)
5697                 return;
5698
5699         dma_free_coherent(rx_ring->dev, rx_ring->size,
5700                           rx_ring->desc, rx_ring->dma);
5701
5702         rx_ring->desc = NULL;
5703 }
5704
5705 /**
5706  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5707  * @adapter: board private structure
5708  *
5709  * Free all receive software resources
5710  **/
5711 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5712 {
5713         int i;
5714
5715 #ifdef IXGBE_FCOE
5716         ixgbe_free_fcoe_ddp_resources(adapter);
5717
5718 #endif
5719         for (i = 0; i < adapter->num_rx_queues; i++)
5720                 if (adapter->rx_ring[i]->desc)
5721                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
5722 }
5723
5724 /**
5725  * ixgbe_change_mtu - Change the Maximum Transfer Unit
5726  * @netdev: network interface device structure
5727  * @new_mtu: new value for maximum frame size
5728  *
5729  * Returns 0 on success, negative on failure
5730  **/
5731 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5732 {
5733         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5734         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5735
5736         /* MTU < 68 is an error and causes problems on some kernels */
5737         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5738                 return -EINVAL;
5739
5740         /*
5741          * For 82599EB we cannot allow legacy VFs to enable their receive
5742          * paths when MTU greater than 1500 is configured.  So display a
5743          * warning that legacy VFs will be disabled.
5744          */
5745         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5746             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5747             (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5748                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5749
5750         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5751
5752         /* must set new MTU before calling down or up */
5753         netdev->mtu = new_mtu;
5754
5755         if (netif_running(netdev))
5756                 ixgbe_reinit_locked(adapter);
5757
5758         return 0;
5759 }
5760
5761 /**
5762  * ixgbe_open - Called when a network interface is made active
5763  * @netdev: network interface device structure
5764  *
5765  * Returns 0 on success, negative value on failure
5766  *
5767  * The open entry point is called when a network interface is made
5768  * active by the system (IFF_UP).  At this point all resources needed
5769  * for transmit and receive operations are allocated, the interrupt
5770  * handler is registered with the OS, the watchdog timer is started,
5771  * and the stack is notified that the interface is ready.
5772  **/
5773 static int ixgbe_open(struct net_device *netdev)
5774 {
5775         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5776         struct ixgbe_hw *hw = &adapter->hw;
5777         int err, queues;
5778
5779         /* disallow open during test */
5780         if (test_bit(__IXGBE_TESTING, &adapter->state))
5781                 return -EBUSY;
5782
5783         netif_carrier_off(netdev);
5784
5785         /* allocate transmit descriptors */
5786         err = ixgbe_setup_all_tx_resources(adapter);
5787         if (err)
5788                 goto err_setup_tx;
5789
5790         /* allocate receive descriptors */
5791         err = ixgbe_setup_all_rx_resources(adapter);
5792         if (err)
5793                 goto err_setup_rx;
5794
5795         ixgbe_configure(adapter);
5796
5797         err = ixgbe_request_irq(adapter);
5798         if (err)
5799                 goto err_req_irq;
5800
5801         /* Notify the stack of the actual queue counts. */
5802         if (adapter->num_rx_pools > 1)
5803                 queues = adapter->num_rx_queues_per_pool;
5804         else
5805                 queues = adapter->num_tx_queues;
5806
5807         err = netif_set_real_num_tx_queues(netdev, queues);
5808         if (err)
5809                 goto err_set_queues;
5810
5811         if (adapter->num_rx_pools > 1 &&
5812             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5813                 queues = IXGBE_MAX_L2A_QUEUES;
5814         else
5815                 queues = adapter->num_rx_queues;
5816         err = netif_set_real_num_rx_queues(netdev, queues);
5817         if (err)
5818                 goto err_set_queues;
5819
5820         ixgbe_ptp_init(adapter);
5821
5822         ixgbe_up_complete(adapter);
5823
5824         ixgbe_clear_vxlan_port(adapter);
5825 #ifdef CONFIG_IXGBE_VXLAN
5826         vxlan_get_rx_port(netdev);
5827 #endif
5828
5829         return 0;
5830
5831 err_set_queues:
5832         ixgbe_free_irq(adapter);
5833 err_req_irq:
5834         ixgbe_free_all_rx_resources(adapter);
5835         if (hw->phy.ops.set_phy_power && !adapter->wol)
5836                 hw->phy.ops.set_phy_power(&adapter->hw, false);
5837 err_setup_rx:
5838         ixgbe_free_all_tx_resources(adapter);
5839 err_setup_tx:
5840         ixgbe_reset(adapter);
5841
5842         return err;
5843 }
5844
5845 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
5846 {
5847         ixgbe_ptp_suspend(adapter);
5848
5849         if (adapter->hw.phy.ops.enter_lplu) {
5850                 adapter->hw.phy.reset_disable = true;
5851                 ixgbe_down(adapter);
5852                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
5853                 adapter->hw.phy.reset_disable = false;
5854         } else {
5855                 ixgbe_down(adapter);
5856         }
5857
5858         ixgbe_free_irq(adapter);
5859
5860         ixgbe_free_all_tx_resources(adapter);
5861         ixgbe_free_all_rx_resources(adapter);
5862 }
5863
5864 /**
5865  * ixgbe_close - Disables a network interface
5866  * @netdev: network interface device structure
5867  *
5868  * Returns 0, this is not allowed to fail
5869  *
5870  * The close entry point is called when an interface is de-activated
5871  * by the OS.  The hardware is still under the drivers control, but
5872  * needs to be disabled.  A global MAC reset is issued to stop the
5873  * hardware, and all transmit and receive resources are freed.
5874  **/
5875 static int ixgbe_close(struct net_device *netdev)
5876 {
5877         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5878
5879         ixgbe_ptp_stop(adapter);
5880
5881         ixgbe_close_suspend(adapter);
5882
5883         ixgbe_fdir_filter_exit(adapter);
5884
5885         ixgbe_release_hw_control(adapter);
5886
5887         return 0;
5888 }
5889
5890 #ifdef CONFIG_PM
5891 static int ixgbe_resume(struct pci_dev *pdev)
5892 {
5893         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5894         struct net_device *netdev = adapter->netdev;
5895         u32 err;
5896
5897         adapter->hw.hw_addr = adapter->io_addr;
5898         pci_set_power_state(pdev, PCI_D0);
5899         pci_restore_state(pdev);
5900         /*
5901          * pci_restore_state clears dev->state_saved so call
5902          * pci_save_state to restore it.
5903          */
5904         pci_save_state(pdev);
5905
5906         err = pci_enable_device_mem(pdev);
5907         if (err) {
5908                 e_dev_err("Cannot enable PCI device from suspend\n");
5909                 return err;
5910         }
5911         smp_mb__before_atomic();
5912         clear_bit(__IXGBE_DISABLED, &adapter->state);
5913         pci_set_master(pdev);
5914
5915         pci_wake_from_d3(pdev, false);
5916
5917         ixgbe_reset(adapter);
5918
5919         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5920
5921         rtnl_lock();
5922         err = ixgbe_init_interrupt_scheme(adapter);
5923         if (!err && netif_running(netdev))
5924                 err = ixgbe_open(netdev);
5925
5926         rtnl_unlock();
5927
5928         if (err)
5929                 return err;
5930
5931         netif_device_attach(netdev);
5932
5933         return 0;
5934 }
5935 #endif /* CONFIG_PM */
5936
5937 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5938 {
5939         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5940         struct net_device *netdev = adapter->netdev;
5941         struct ixgbe_hw *hw = &adapter->hw;
5942         u32 ctrl, fctrl;
5943         u32 wufc = adapter->wol;
5944 #ifdef CONFIG_PM
5945         int retval = 0;
5946 #endif
5947
5948         netif_device_detach(netdev);
5949
5950         rtnl_lock();
5951         if (netif_running(netdev))
5952                 ixgbe_close_suspend(adapter);
5953         rtnl_unlock();
5954
5955         ixgbe_clear_interrupt_scheme(adapter);
5956
5957 #ifdef CONFIG_PM
5958         retval = pci_save_state(pdev);
5959         if (retval)
5960                 return retval;
5961
5962 #endif
5963         if (hw->mac.ops.stop_link_on_d3)
5964                 hw->mac.ops.stop_link_on_d3(hw);
5965
5966         if (wufc) {
5967                 ixgbe_set_rx_mode(netdev);
5968
5969                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5970                 if (hw->mac.ops.enable_tx_laser)
5971                         hw->mac.ops.enable_tx_laser(hw);
5972
5973                 /* turn on all-multi mode if wake on multicast is enabled */
5974                 if (wufc & IXGBE_WUFC_MC) {
5975                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5976                         fctrl |= IXGBE_FCTRL_MPE;
5977                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5978                 }
5979
5980                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5981                 ctrl |= IXGBE_CTRL_GIO_DIS;
5982                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5983
5984                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5985         } else {
5986                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5987                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5988         }
5989
5990         switch (hw->mac.type) {
5991         case ixgbe_mac_82598EB:
5992                 pci_wake_from_d3(pdev, false);
5993                 break;
5994         case ixgbe_mac_82599EB:
5995         case ixgbe_mac_X540:
5996         case ixgbe_mac_X550:
5997         case ixgbe_mac_X550EM_x:
5998                 pci_wake_from_d3(pdev, !!wufc);
5999                 break;
6000         default:
6001                 break;
6002         }
6003
6004         *enable_wake = !!wufc;
6005         if (hw->phy.ops.set_phy_power && !*enable_wake)
6006                 hw->phy.ops.set_phy_power(hw, false);
6007
6008         ixgbe_release_hw_control(adapter);
6009
6010         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6011                 pci_disable_device(pdev);
6012
6013         return 0;
6014 }
6015
6016 #ifdef CONFIG_PM
6017 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6018 {
6019         int retval;
6020         bool wake;
6021
6022         retval = __ixgbe_shutdown(pdev, &wake);
6023         if (retval)
6024                 return retval;
6025
6026         if (wake) {
6027                 pci_prepare_to_sleep(pdev);
6028         } else {
6029                 pci_wake_from_d3(pdev, false);
6030                 pci_set_power_state(pdev, PCI_D3hot);
6031         }
6032
6033         return 0;
6034 }
6035 #endif /* CONFIG_PM */
6036
6037 static void ixgbe_shutdown(struct pci_dev *pdev)
6038 {
6039         bool wake;
6040
6041         __ixgbe_shutdown(pdev, &wake);
6042
6043         if (system_state == SYSTEM_POWER_OFF) {
6044                 pci_wake_from_d3(pdev, wake);
6045                 pci_set_power_state(pdev, PCI_D3hot);
6046         }
6047 }
6048
6049 /**
6050  * ixgbe_update_stats - Update the board statistics counters.
6051  * @adapter: board private structure
6052  **/
6053 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6054 {
6055         struct net_device *netdev = adapter->netdev;
6056         struct ixgbe_hw *hw = &adapter->hw;
6057         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6058         u64 total_mpc = 0;
6059         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6060         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6061         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6062         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6063
6064         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6065             test_bit(__IXGBE_RESETTING, &adapter->state))
6066                 return;
6067
6068         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6069                 u64 rsc_count = 0;
6070                 u64 rsc_flush = 0;
6071                 for (i = 0; i < adapter->num_rx_queues; i++) {
6072                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6073                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6074                 }
6075                 adapter->rsc_total_count = rsc_count;
6076                 adapter->rsc_total_flush = rsc_flush;
6077         }
6078
6079         for (i = 0; i < adapter->num_rx_queues; i++) {
6080                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6081                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6082                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6083                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6084                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6085                 bytes += rx_ring->stats.bytes;
6086                 packets += rx_ring->stats.packets;
6087         }
6088         adapter->non_eop_descs = non_eop_descs;
6089         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6090         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6091         adapter->hw_csum_rx_error = hw_csum_rx_error;
6092         netdev->stats.rx_bytes = bytes;
6093         netdev->stats.rx_packets = packets;
6094
6095         bytes = 0;
6096         packets = 0;
6097         /* gather some stats to the adapter struct that are per queue */
6098         for (i = 0; i < adapter->num_tx_queues; i++) {
6099                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6100                 restart_queue += tx_ring->tx_stats.restart_queue;
6101                 tx_busy += tx_ring->tx_stats.tx_busy;
6102                 bytes += tx_ring->stats.bytes;
6103                 packets += tx_ring->stats.packets;
6104         }
6105         adapter->restart_queue = restart_queue;
6106         adapter->tx_busy = tx_busy;
6107         netdev->stats.tx_bytes = bytes;
6108         netdev->stats.tx_packets = packets;
6109
6110         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6111
6112         /* 8 register reads */
6113         for (i = 0; i < 8; i++) {
6114                 /* for packet buffers not used, the register should read 0 */
6115                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6116                 missed_rx += mpc;
6117                 hwstats->mpc[i] += mpc;
6118                 total_mpc += hwstats->mpc[i];
6119                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6120                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6121                 switch (hw->mac.type) {
6122                 case ixgbe_mac_82598EB:
6123                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6124                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6125                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6126                         hwstats->pxonrxc[i] +=
6127                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6128                         break;
6129                 case ixgbe_mac_82599EB:
6130                 case ixgbe_mac_X540:
6131                 case ixgbe_mac_X550:
6132                 case ixgbe_mac_X550EM_x:
6133                         hwstats->pxonrxc[i] +=
6134                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6135                         break;
6136                 default:
6137                         break;
6138                 }
6139         }
6140
6141         /*16 register reads */
6142         for (i = 0; i < 16; i++) {
6143                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6144                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6145                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6146                     (hw->mac.type == ixgbe_mac_X540) ||
6147                     (hw->mac.type == ixgbe_mac_X550) ||
6148                     (hw->mac.type == ixgbe_mac_X550EM_x)) {
6149                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6150                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6151                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6152                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6153                 }
6154         }
6155
6156         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6157         /* work around hardware counting issue */
6158         hwstats->gprc -= missed_rx;
6159
6160         ixgbe_update_xoff_received(adapter);
6161
6162         /* 82598 hardware only has a 32 bit counter in the high register */
6163         switch (hw->mac.type) {
6164         case ixgbe_mac_82598EB:
6165                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6166                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6167                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6168                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6169                 break;
6170         case ixgbe_mac_X540:
6171         case ixgbe_mac_X550:
6172         case ixgbe_mac_X550EM_x:
6173                 /* OS2BMC stats are X540 and later */
6174                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6175                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6176                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6177                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6178         case ixgbe_mac_82599EB:
6179                 for (i = 0; i < 16; i++)
6180                         adapter->hw_rx_no_dma_resources +=
6181                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6182                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6183                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6184                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6185                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6186                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6187                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6188                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6189                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6190                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6191 #ifdef IXGBE_FCOE
6192                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6193                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6194                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6195                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6196                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6197                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6198                 /* Add up per cpu counters for total ddp aloc fail */
6199                 if (adapter->fcoe.ddp_pool) {
6200                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6201                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6202                         unsigned int cpu;
6203                         u64 noddp = 0, noddp_ext_buff = 0;
6204                         for_each_possible_cpu(cpu) {
6205                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6206                                 noddp += ddp_pool->noddp;
6207                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6208                         }
6209                         hwstats->fcoe_noddp = noddp;
6210                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6211                 }
6212 #endif /* IXGBE_FCOE */
6213                 break;
6214         default:
6215                 break;
6216         }
6217         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6218         hwstats->bprc += bprc;
6219         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6220         if (hw->mac.type == ixgbe_mac_82598EB)
6221                 hwstats->mprc -= bprc;
6222         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6223         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6224         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6225         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6226         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6227         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6228         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6229         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6230         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6231         hwstats->lxontxc += lxon;
6232         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6233         hwstats->lxofftxc += lxoff;
6234         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6235         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6236         /*
6237          * 82598 errata - tx of flow control packets is included in tx counters
6238          */
6239         xon_off_tot = lxon + lxoff;
6240         hwstats->gptc -= xon_off_tot;
6241         hwstats->mptc -= xon_off_tot;
6242         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6243         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6244         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6245         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6246         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6247         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6248         hwstats->ptc64 -= xon_off_tot;
6249         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6250         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6251         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6252         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6253         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6254         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6255
6256         /* Fill out the OS statistics structure */
6257         netdev->stats.multicast = hwstats->mprc;
6258
6259         /* Rx Errors */
6260         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6261         netdev->stats.rx_dropped = 0;
6262         netdev->stats.rx_length_errors = hwstats->rlec;
6263         netdev->stats.rx_crc_errors = hwstats->crcerrs;
6264         netdev->stats.rx_missed_errors = total_mpc;
6265 }
6266
6267 /**
6268  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6269  * @adapter: pointer to the device adapter structure
6270  **/
6271 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6272 {
6273         struct ixgbe_hw *hw = &adapter->hw;
6274         int i;
6275
6276         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6277                 return;
6278
6279         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6280
6281         /* if interface is down do nothing */
6282         if (test_bit(__IXGBE_DOWN, &adapter->state))
6283                 return;
6284
6285         /* do nothing if we are not using signature filters */
6286         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6287                 return;
6288
6289         adapter->fdir_overflow++;
6290
6291         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6292                 for (i = 0; i < adapter->num_tx_queues; i++)
6293                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6294                                 &(adapter->tx_ring[i]->state));
6295                 /* re-enable flow director interrupts */
6296                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6297         } else {
6298                 e_err(probe, "failed to finish FDIR re-initialization, "
6299                       "ignored adding FDIR ATR filters\n");
6300         }
6301 }
6302
6303 /**
6304  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6305  * @adapter: pointer to the device adapter structure
6306  *
6307  * This function serves two purposes.  First it strobes the interrupt lines
6308  * in order to make certain interrupts are occurring.  Secondly it sets the
6309  * bits needed to check for TX hangs.  As a result we should immediately
6310  * determine if a hang has occurred.
6311  */
6312 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6313 {
6314         struct ixgbe_hw *hw = &adapter->hw;
6315         u64 eics = 0;
6316         int i;
6317
6318         /* If we're down, removing or resetting, just bail */
6319         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6320             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6321             test_bit(__IXGBE_RESETTING, &adapter->state))
6322                 return;
6323
6324         /* Force detection of hung controller */
6325         if (netif_carrier_ok(adapter->netdev)) {
6326                 for (i = 0; i < adapter->num_tx_queues; i++)
6327                         set_check_for_tx_hang(adapter->tx_ring[i]);
6328         }
6329
6330         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6331                 /*
6332                  * for legacy and MSI interrupts don't set any bits
6333                  * that are enabled for EIAM, because this operation
6334                  * would set *both* EIMS and EICS for any bit in EIAM
6335                  */
6336                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6337                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6338         } else {
6339                 /* get one bit for every active tx/rx interrupt vector */
6340                 for (i = 0; i < adapter->num_q_vectors; i++) {
6341                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
6342                         if (qv->rx.ring || qv->tx.ring)
6343                                 eics |= ((u64)1 << i);
6344                 }
6345         }
6346
6347         /* Cause software interrupt to ensure rings are cleaned */
6348         ixgbe_irq_rearm_queues(adapter, eics);
6349 }
6350
6351 /**
6352  * ixgbe_watchdog_update_link - update the link status
6353  * @adapter: pointer to the device adapter structure
6354  * @link_speed: pointer to a u32 to store the link_speed
6355  **/
6356 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6357 {
6358         struct ixgbe_hw *hw = &adapter->hw;
6359         u32 link_speed = adapter->link_speed;
6360         bool link_up = adapter->link_up;
6361         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6362
6363         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6364                 return;
6365
6366         if (hw->mac.ops.check_link) {
6367                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6368         } else {
6369                 /* always assume link is up, if no check link function */
6370                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6371                 link_up = true;
6372         }
6373
6374         if (adapter->ixgbe_ieee_pfc)
6375                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6376
6377         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6378                 hw->mac.ops.fc_enable(hw);
6379                 ixgbe_set_rx_drop_en(adapter);
6380         }
6381
6382         if (link_up ||
6383             time_after(jiffies, (adapter->link_check_timeout +
6384                                  IXGBE_TRY_LINK_TIMEOUT))) {
6385                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6386                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6387                 IXGBE_WRITE_FLUSH(hw);
6388         }
6389
6390         adapter->link_up = link_up;
6391         adapter->link_speed = link_speed;
6392 }
6393
6394 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6395 {
6396 #ifdef CONFIG_IXGBE_DCB
6397         struct net_device *netdev = adapter->netdev;
6398         struct dcb_app app = {
6399                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6400                               .protocol = 0,
6401                              };
6402         u8 up = 0;
6403
6404         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6405                 up = dcb_ieee_getapp_mask(netdev, &app);
6406
6407         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6408 #endif
6409 }
6410
6411 /**
6412  * ixgbe_watchdog_link_is_up - update netif_carrier status and
6413  *                             print link up message
6414  * @adapter: pointer to the device adapter structure
6415  **/
6416 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6417 {
6418         struct net_device *netdev = adapter->netdev;
6419         struct ixgbe_hw *hw = &adapter->hw;
6420         struct net_device *upper;
6421         struct list_head *iter;
6422         u32 link_speed = adapter->link_speed;
6423         const char *speed_str;
6424         bool flow_rx, flow_tx;
6425
6426         /* only continue if link was previously down */
6427         if (netif_carrier_ok(netdev))
6428                 return;
6429
6430         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6431
6432         switch (hw->mac.type) {
6433         case ixgbe_mac_82598EB: {
6434                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6435                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6436                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6437                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6438         }
6439                 break;
6440         case ixgbe_mac_X540:
6441         case ixgbe_mac_X550:
6442         case ixgbe_mac_X550EM_x:
6443         case ixgbe_mac_82599EB: {
6444                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6445                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6446                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6447                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6448         }
6449                 break;
6450         default:
6451                 flow_tx = false;
6452                 flow_rx = false;
6453                 break;
6454         }
6455
6456         adapter->last_rx_ptp_check = jiffies;
6457
6458         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6459                 ixgbe_ptp_start_cyclecounter(adapter);
6460
6461         switch (link_speed) {
6462         case IXGBE_LINK_SPEED_10GB_FULL:
6463                 speed_str = "10 Gbps";
6464                 break;
6465         case IXGBE_LINK_SPEED_2_5GB_FULL:
6466                 speed_str = "2.5 Gbps";
6467                 break;
6468         case IXGBE_LINK_SPEED_1GB_FULL:
6469                 speed_str = "1 Gbps";
6470                 break;
6471         case IXGBE_LINK_SPEED_100_FULL:
6472                 speed_str = "100 Mbps";
6473                 break;
6474         default:
6475                 speed_str = "unknown speed";
6476                 break;
6477         }
6478         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6479                ((flow_rx && flow_tx) ? "RX/TX" :
6480                (flow_rx ? "RX" :
6481                (flow_tx ? "TX" : "None"))));
6482
6483         netif_carrier_on(netdev);
6484         ixgbe_check_vf_rate_limit(adapter);
6485
6486         /* enable transmits */
6487         netif_tx_wake_all_queues(adapter->netdev);
6488
6489         /* enable any upper devices */
6490         rtnl_lock();
6491         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6492                 if (netif_is_macvlan(upper)) {
6493                         struct macvlan_dev *vlan = netdev_priv(upper);
6494
6495                         if (vlan->fwd_priv)
6496                                 netif_tx_wake_all_queues(upper);
6497                 }
6498         }
6499         rtnl_unlock();
6500
6501         /* update the default user priority for VFs */
6502         ixgbe_update_default_up(adapter);
6503
6504         /* ping all the active vfs to let them know link has changed */
6505         ixgbe_ping_all_vfs(adapter);
6506 }
6507
6508 /**
6509  * ixgbe_watchdog_link_is_down - update netif_carrier status and
6510  *                               print link down message
6511  * @adapter: pointer to the adapter structure
6512  **/
6513 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6514 {
6515         struct net_device *netdev = adapter->netdev;
6516         struct ixgbe_hw *hw = &adapter->hw;
6517
6518         adapter->link_up = false;
6519         adapter->link_speed = 0;
6520
6521         /* only continue if link was up previously */
6522         if (!netif_carrier_ok(netdev))
6523                 return;
6524
6525         /* poll for SFP+ cable when link is down */
6526         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6527                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6528
6529         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6530                 ixgbe_ptp_start_cyclecounter(adapter);
6531
6532         e_info(drv, "NIC Link is Down\n");
6533         netif_carrier_off(netdev);
6534
6535         /* ping all the active vfs to let them know link has changed */
6536         ixgbe_ping_all_vfs(adapter);
6537 }
6538
6539 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6540 {
6541         int i;
6542
6543         for (i = 0; i < adapter->num_tx_queues; i++) {
6544                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6545
6546                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6547                         return true;
6548         }
6549
6550         return false;
6551 }
6552
6553 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6554 {
6555         struct ixgbe_hw *hw = &adapter->hw;
6556         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6557         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6558
6559         int i, j;
6560
6561         if (!adapter->num_vfs)
6562                 return false;
6563
6564         /* resetting the PF is only needed for MAC before X550 */
6565         if (hw->mac.type >= ixgbe_mac_X550)
6566                 return false;
6567
6568         for (i = 0; i < adapter->num_vfs; i++) {
6569                 for (j = 0; j < q_per_pool; j++) {
6570                         u32 h, t;
6571
6572                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6573                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6574
6575                         if (h != t)
6576                                 return true;
6577                 }
6578         }
6579
6580         return false;
6581 }
6582
6583 /**
6584  * ixgbe_watchdog_flush_tx - flush queues on link down
6585  * @adapter: pointer to the device adapter structure
6586  **/
6587 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6588 {
6589         if (!netif_carrier_ok(adapter->netdev)) {
6590                 if (ixgbe_ring_tx_pending(adapter) ||
6591                     ixgbe_vf_tx_pending(adapter)) {
6592                         /* We've lost link, so the controller stops DMA,
6593                          * but we've got queued Tx work that's never going
6594                          * to get done, so reset controller to flush Tx.
6595                          * (Do the reset outside of interrupt context).
6596                          */
6597                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6598                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6599                 }
6600         }
6601 }
6602
6603 #ifdef CONFIG_PCI_IOV
6604 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6605                                       struct pci_dev *vfdev)
6606 {
6607         if (!pci_wait_for_pending_transaction(vfdev))
6608                 e_dev_warn("Issuing VFLR with pending transactions\n");
6609
6610         e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6611         pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6612
6613         msleep(100);
6614 }
6615
6616 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6617 {
6618         struct ixgbe_hw *hw = &adapter->hw;
6619         struct pci_dev *pdev = adapter->pdev;
6620         struct pci_dev *vfdev;
6621         u32 gpc;
6622         int pos;
6623         unsigned short vf_id;
6624
6625         if (!(netif_carrier_ok(adapter->netdev)))
6626                 return;
6627
6628         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6629         if (gpc) /* If incrementing then no need for the check below */
6630                 return;
6631         /* Check to see if a bad DMA write target from an errant or
6632          * malicious VF has caused a PCIe error.  If so then we can
6633          * issue a VFLR to the offending VF(s) and then resume without
6634          * requesting a full slot reset.
6635          */
6636
6637         if (!pdev)
6638                 return;
6639
6640         pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
6641         if (!pos)
6642                 return;
6643
6644         /* get the device ID for the VF */
6645         pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_id);
6646
6647         /* check status reg for all VFs owned by this PF */
6648         vfdev = pci_get_device(pdev->vendor, vf_id, NULL);
6649         while (vfdev) {
6650                 if (vfdev->is_virtfn && (vfdev->physfn == pdev)) {
6651                         u16 status_reg;
6652
6653                         pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6654                         if (status_reg & PCI_STATUS_REC_MASTER_ABORT)
6655                                 /* issue VFLR */
6656                                 ixgbe_issue_vf_flr(adapter, vfdev);
6657                 }
6658
6659                 vfdev = pci_get_device(pdev->vendor, vf_id, vfdev);
6660         }
6661 }
6662
6663 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6664 {
6665         u32 ssvpc;
6666
6667         /* Do not perform spoof check for 82598 or if not in IOV mode */
6668         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6669             adapter->num_vfs == 0)
6670                 return;
6671
6672         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6673
6674         /*
6675          * ssvpc register is cleared on read, if zero then no
6676          * spoofed packets in the last interval.
6677          */
6678         if (!ssvpc)
6679                 return;
6680
6681         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6682 }
6683 #else
6684 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
6685 {
6686 }
6687
6688 static void
6689 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
6690 {
6691 }
6692 #endif /* CONFIG_PCI_IOV */
6693
6694
6695 /**
6696  * ixgbe_watchdog_subtask - check and bring link up
6697  * @adapter: pointer to the device adapter structure
6698  **/
6699 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6700 {
6701         /* if interface is down, removing or resetting, do nothing */
6702         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6703             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6704             test_bit(__IXGBE_RESETTING, &adapter->state))
6705                 return;
6706
6707         ixgbe_watchdog_update_link(adapter);
6708
6709         if (adapter->link_up)
6710                 ixgbe_watchdog_link_is_up(adapter);
6711         else
6712                 ixgbe_watchdog_link_is_down(adapter);
6713
6714         ixgbe_check_for_bad_vf(adapter);
6715         ixgbe_spoof_check(adapter);
6716         ixgbe_update_stats(adapter);
6717
6718         ixgbe_watchdog_flush_tx(adapter);
6719 }
6720
6721 /**
6722  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6723  * @adapter: the ixgbe adapter structure
6724  **/
6725 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6726 {
6727         struct ixgbe_hw *hw = &adapter->hw;
6728         s32 err;
6729
6730         /* not searching for SFP so there is nothing to do here */
6731         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6732             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6733                 return;
6734
6735         if (adapter->sfp_poll_time &&
6736             time_after(adapter->sfp_poll_time, jiffies))
6737                 return; /* If not yet time to poll for SFP */
6738
6739         /* someone else is in init, wait until next service event */
6740         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6741                 return;
6742
6743         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
6744
6745         err = hw->phy.ops.identify_sfp(hw);
6746         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6747                 goto sfp_out;
6748
6749         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6750                 /* If no cable is present, then we need to reset
6751                  * the next time we find a good cable. */
6752                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6753         }
6754
6755         /* exit on error */
6756         if (err)
6757                 goto sfp_out;
6758
6759         /* exit if reset not needed */
6760         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6761                 goto sfp_out;
6762
6763         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6764
6765         /*
6766          * A module may be identified correctly, but the EEPROM may not have
6767          * support for that module.  setup_sfp() will fail in that case, so
6768          * we should not allow that module to load.
6769          */
6770         if (hw->mac.type == ixgbe_mac_82598EB)
6771                 err = hw->phy.ops.reset(hw);
6772         else
6773                 err = hw->mac.ops.setup_sfp(hw);
6774
6775         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6776                 goto sfp_out;
6777
6778         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6779         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6780
6781 sfp_out:
6782         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6783
6784         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6785             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6786                 e_dev_err("failed to initialize because an unsupported "
6787                           "SFP+ module type was detected.\n");
6788                 e_dev_err("Reload the driver after installing a "
6789                           "supported module.\n");
6790                 unregister_netdev(adapter->netdev);
6791         }
6792 }
6793
6794 /**
6795  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6796  * @adapter: the ixgbe adapter structure
6797  **/
6798 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6799 {
6800         struct ixgbe_hw *hw = &adapter->hw;
6801         u32 speed;
6802         bool autoneg = false;
6803
6804         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6805                 return;
6806
6807         /* someone else is in init, wait until next service event */
6808         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6809                 return;
6810
6811         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6812
6813         speed = hw->phy.autoneg_advertised;
6814         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6815                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6816
6817                 /* setup the highest link when no autoneg */
6818                 if (!autoneg) {
6819                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6820                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
6821                 }
6822         }
6823
6824         if (hw->mac.ops.setup_link)
6825                 hw->mac.ops.setup_link(hw, speed, true);
6826
6827         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6828         adapter->link_check_timeout = jiffies;
6829         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6830 }
6831
6832 /**
6833  * ixgbe_service_timer - Timer Call-back
6834  * @data: pointer to adapter cast into an unsigned long
6835  **/
6836 static void ixgbe_service_timer(unsigned long data)
6837 {
6838         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6839         unsigned long next_event_offset;
6840
6841         /* poll faster when waiting for link */
6842         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6843                 next_event_offset = HZ / 10;
6844         else
6845                 next_event_offset = HZ * 2;
6846
6847         /* Reset the timer */
6848         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6849
6850         ixgbe_service_event_schedule(adapter);
6851 }
6852
6853 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
6854 {
6855         struct ixgbe_hw *hw = &adapter->hw;
6856         u32 status;
6857
6858         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
6859                 return;
6860
6861         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
6862
6863         if (!hw->phy.ops.handle_lasi)
6864                 return;
6865
6866         status = hw->phy.ops.handle_lasi(&adapter->hw);
6867         if (status != IXGBE_ERR_OVERTEMP)
6868                 return;
6869
6870         e_crit(drv, "%s\n", ixgbe_overheat_msg);
6871 }
6872
6873 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6874 {
6875         if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6876                 return;
6877
6878         adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6879
6880         /* If we're already down, removing or resetting, just bail */
6881         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6882             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6883             test_bit(__IXGBE_RESETTING, &adapter->state))
6884                 return;
6885
6886         ixgbe_dump(adapter);
6887         netdev_err(adapter->netdev, "Reset adapter\n");
6888         adapter->tx_timeout_count++;
6889
6890         rtnl_lock();
6891         ixgbe_reinit_locked(adapter);
6892         rtnl_unlock();
6893 }
6894
6895 /**
6896  * ixgbe_service_task - manages and runs subtasks
6897  * @work: pointer to work_struct containing our data
6898  **/
6899 static void ixgbe_service_task(struct work_struct *work)
6900 {
6901         struct ixgbe_adapter *adapter = container_of(work,
6902                                                      struct ixgbe_adapter,
6903                                                      service_task);
6904         if (ixgbe_removed(adapter->hw.hw_addr)) {
6905                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6906                         rtnl_lock();
6907                         ixgbe_down(adapter);
6908                         rtnl_unlock();
6909                 }
6910                 ixgbe_service_event_complete(adapter);
6911                 return;
6912         }
6913 #ifdef CONFIG_IXGBE_VXLAN
6914         if (adapter->flags2 & IXGBE_FLAG2_VXLAN_REREG_NEEDED) {
6915                 adapter->flags2 &= ~IXGBE_FLAG2_VXLAN_REREG_NEEDED;
6916                 vxlan_get_rx_port(adapter->netdev);
6917         }
6918 #endif /* CONFIG_IXGBE_VXLAN */
6919         ixgbe_reset_subtask(adapter);
6920         ixgbe_phy_interrupt_subtask(adapter);
6921         ixgbe_sfp_detection_subtask(adapter);
6922         ixgbe_sfp_link_config_subtask(adapter);
6923         ixgbe_check_overtemp_subtask(adapter);
6924         ixgbe_watchdog_subtask(adapter);
6925         ixgbe_fdir_reinit_subtask(adapter);
6926         ixgbe_check_hang_subtask(adapter);
6927
6928         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6929                 ixgbe_ptp_overflow_check(adapter);
6930                 ixgbe_ptp_rx_hang(adapter);
6931         }
6932
6933         ixgbe_service_event_complete(adapter);
6934 }
6935
6936 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6937                      struct ixgbe_tx_buffer *first,
6938                      u8 *hdr_len)
6939 {
6940         struct sk_buff *skb = first->skb;
6941         u32 vlan_macip_lens, type_tucmd;
6942         u32 mss_l4len_idx, l4len;
6943         int err;
6944
6945         if (skb->ip_summed != CHECKSUM_PARTIAL)
6946                 return 0;
6947
6948         if (!skb_is_gso(skb))
6949                 return 0;
6950
6951         err = skb_cow_head(skb, 0);
6952         if (err < 0)
6953                 return err;
6954
6955         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6956         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6957
6958         if (first->protocol == htons(ETH_P_IP)) {
6959                 struct iphdr *iph = ip_hdr(skb);
6960                 iph->tot_len = 0;
6961                 iph->check = 0;
6962                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6963                                                          iph->daddr, 0,
6964                                                          IPPROTO_TCP,
6965                                                          0);
6966                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6967                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6968                                    IXGBE_TX_FLAGS_CSUM |
6969                                    IXGBE_TX_FLAGS_IPV4;
6970         } else if (skb_is_gso_v6(skb)) {
6971                 ipv6_hdr(skb)->payload_len = 0;
6972                 tcp_hdr(skb)->check =
6973                     ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6974                                      &ipv6_hdr(skb)->daddr,
6975                                      0, IPPROTO_TCP, 0);
6976                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6977                                    IXGBE_TX_FLAGS_CSUM;
6978         }
6979
6980         /* compute header lengths */
6981         l4len = tcp_hdrlen(skb);
6982         *hdr_len = skb_transport_offset(skb) + l4len;
6983
6984         /* update gso size and bytecount with header size */
6985         first->gso_segs = skb_shinfo(skb)->gso_segs;
6986         first->bytecount += (first->gso_segs - 1) * *hdr_len;
6987
6988         /* mss_l4len_id: use 0 as index for TSO */
6989         mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6990         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6991
6992         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6993         vlan_macip_lens = skb_network_header_len(skb);
6994         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6995         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6996
6997         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6998                           mss_l4len_idx);
6999
7000         return 1;
7001 }
7002
7003 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7004                           struct ixgbe_tx_buffer *first)
7005 {
7006         struct sk_buff *skb = first->skb;
7007         u32 vlan_macip_lens = 0;
7008         u32 mss_l4len_idx = 0;
7009         u32 type_tucmd = 0;
7010
7011         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7012                 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
7013                     !(first->tx_flags & IXGBE_TX_FLAGS_CC))
7014                         return;
7015                 vlan_macip_lens = skb_network_offset(skb) <<
7016                                   IXGBE_ADVTXD_MACLEN_SHIFT;
7017         } else {
7018                 u8 l4_hdr = 0;
7019                 union {
7020                         struct iphdr *ipv4;
7021                         struct ipv6hdr *ipv6;
7022                         u8 *raw;
7023                 } network_hdr;
7024                 union {
7025                         struct tcphdr *tcphdr;
7026                         u8 *raw;
7027                 } transport_hdr;
7028
7029                 if (skb->encapsulation) {
7030                         network_hdr.raw = skb_inner_network_header(skb);
7031                         transport_hdr.raw = skb_inner_transport_header(skb);
7032                         vlan_macip_lens = skb_inner_network_offset(skb) <<
7033                                           IXGBE_ADVTXD_MACLEN_SHIFT;
7034                 } else {
7035                         network_hdr.raw = skb_network_header(skb);
7036                         transport_hdr.raw = skb_transport_header(skb);
7037                         vlan_macip_lens = skb_network_offset(skb) <<
7038                                           IXGBE_ADVTXD_MACLEN_SHIFT;
7039                 }
7040
7041                 /* use first 4 bits to determine IP version */
7042                 switch (network_hdr.ipv4->version) {
7043                 case IPVERSION:
7044                         vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7045                         type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7046                         l4_hdr = network_hdr.ipv4->protocol;
7047                         break;
7048                 case 6:
7049                         vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7050                         l4_hdr = network_hdr.ipv6->nexthdr;
7051                         break;
7052                 default:
7053                         if (unlikely(net_ratelimit())) {
7054                                 dev_warn(tx_ring->dev,
7055                                          "partial checksum but version=%d\n",
7056                                          network_hdr.ipv4->version);
7057                         }
7058                 }
7059
7060                 switch (l4_hdr) {
7061                 case IPPROTO_TCP:
7062                         type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
7063                         mss_l4len_idx = (transport_hdr.tcphdr->doff * 4) <<
7064                                         IXGBE_ADVTXD_L4LEN_SHIFT;
7065                         break;
7066                 case IPPROTO_SCTP:
7067                         type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7068                         mss_l4len_idx = sizeof(struct sctphdr) <<
7069                                         IXGBE_ADVTXD_L4LEN_SHIFT;
7070                         break;
7071                 case IPPROTO_UDP:
7072                         mss_l4len_idx = sizeof(struct udphdr) <<
7073                                         IXGBE_ADVTXD_L4LEN_SHIFT;
7074                         break;
7075                 default:
7076                         if (unlikely(net_ratelimit())) {
7077                                 dev_warn(tx_ring->dev,
7078                                  "partial checksum but l4 proto=%x!\n",
7079                                  l4_hdr);
7080                         }
7081                         break;
7082                 }
7083
7084                 /* update TX checksum flag */
7085                 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7086         }
7087
7088         /* vlan_macip_lens: MACLEN, VLAN tag */
7089         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7090
7091         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
7092                           type_tucmd, mss_l4len_idx);
7093 }
7094
7095 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7096         ((_flag <= _result) ? \
7097          ((u32)(_input & _flag) * (_result / _flag)) : \
7098          ((u32)(_input & _flag) / (_flag / _result)))
7099
7100 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7101 {
7102         /* set type for advanced descriptor with frame checksum insertion */
7103         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7104                        IXGBE_ADVTXD_DCMD_DEXT |
7105                        IXGBE_ADVTXD_DCMD_IFCS;
7106
7107         /* set HW vlan bit if vlan is present */
7108         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7109                                    IXGBE_ADVTXD_DCMD_VLE);
7110
7111         /* set segmentation enable bits for TSO/FSO */
7112         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7113                                    IXGBE_ADVTXD_DCMD_TSE);
7114
7115         /* set timestamp bit if present */
7116         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7117                                    IXGBE_ADVTXD_MAC_TSTAMP);
7118
7119         /* insert frame checksum */
7120         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7121
7122         return cmd_type;
7123 }
7124
7125 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7126                                    u32 tx_flags, unsigned int paylen)
7127 {
7128         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7129
7130         /* enable L4 checksum for TSO and TX checksum offload */
7131         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7132                                         IXGBE_TX_FLAGS_CSUM,
7133                                         IXGBE_ADVTXD_POPTS_TXSM);
7134
7135         /* enble IPv4 checksum for TSO */
7136         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7137                                         IXGBE_TX_FLAGS_IPV4,
7138                                         IXGBE_ADVTXD_POPTS_IXSM);
7139
7140         /*
7141          * Check Context must be set if Tx switch is enabled, which it
7142          * always is for case where virtual functions are running
7143          */
7144         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7145                                         IXGBE_TX_FLAGS_CC,
7146                                         IXGBE_ADVTXD_CC);
7147
7148         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7149 }
7150
7151 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7152 {
7153         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7154
7155         /* Herbert's original patch had:
7156          *  smp_mb__after_netif_stop_queue();
7157          * but since that doesn't exist yet, just open code it.
7158          */
7159         smp_mb();
7160
7161         /* We need to check again in a case another CPU has just
7162          * made room available.
7163          */
7164         if (likely(ixgbe_desc_unused(tx_ring) < size))
7165                 return -EBUSY;
7166
7167         /* A reprieve! - use start_queue because it doesn't call schedule */
7168         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7169         ++tx_ring->tx_stats.restart_queue;
7170         return 0;
7171 }
7172
7173 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7174 {
7175         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7176                 return 0;
7177
7178         return __ixgbe_maybe_stop_tx(tx_ring, size);
7179 }
7180
7181 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7182                        IXGBE_TXD_CMD_RS)
7183
7184 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7185                          struct ixgbe_tx_buffer *first,
7186                          const u8 hdr_len)
7187 {
7188         struct sk_buff *skb = first->skb;
7189         struct ixgbe_tx_buffer *tx_buffer;
7190         union ixgbe_adv_tx_desc *tx_desc;
7191         struct skb_frag_struct *frag;
7192         dma_addr_t dma;
7193         unsigned int data_len, size;
7194         u32 tx_flags = first->tx_flags;
7195         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7196         u16 i = tx_ring->next_to_use;
7197
7198         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7199
7200         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7201
7202         size = skb_headlen(skb);
7203         data_len = skb->data_len;
7204
7205 #ifdef IXGBE_FCOE
7206         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7207                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7208                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7209                         data_len = 0;
7210                 } else {
7211                         data_len -= sizeof(struct fcoe_crc_eof);
7212                 }
7213         }
7214
7215 #endif
7216         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7217
7218         tx_buffer = first;
7219
7220         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7221                 if (dma_mapping_error(tx_ring->dev, dma))
7222                         goto dma_error;
7223
7224                 /* record length, and DMA address */
7225                 dma_unmap_len_set(tx_buffer, len, size);
7226                 dma_unmap_addr_set(tx_buffer, dma, dma);
7227
7228                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7229
7230                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7231                         tx_desc->read.cmd_type_len =
7232                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7233
7234                         i++;
7235                         tx_desc++;
7236                         if (i == tx_ring->count) {
7237                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7238                                 i = 0;
7239                         }
7240                         tx_desc->read.olinfo_status = 0;
7241
7242                         dma += IXGBE_MAX_DATA_PER_TXD;
7243                         size -= IXGBE_MAX_DATA_PER_TXD;
7244
7245                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7246                 }
7247
7248                 if (likely(!data_len))
7249                         break;
7250
7251                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7252
7253                 i++;
7254                 tx_desc++;
7255                 if (i == tx_ring->count) {
7256                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7257                         i = 0;
7258                 }
7259                 tx_desc->read.olinfo_status = 0;
7260
7261 #ifdef IXGBE_FCOE
7262                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7263 #else
7264                 size = skb_frag_size(frag);
7265 #endif
7266                 data_len -= size;
7267
7268                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7269                                        DMA_TO_DEVICE);
7270
7271                 tx_buffer = &tx_ring->tx_buffer_info[i];
7272         }
7273
7274         /* write last descriptor with RS and EOP bits */
7275         cmd_type |= size | IXGBE_TXD_CMD;
7276         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7277
7278         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7279
7280         /* set the timestamp */
7281         first->time_stamp = jiffies;
7282
7283         /*
7284          * Force memory writes to complete before letting h/w know there
7285          * are new descriptors to fetch.  (Only applicable for weak-ordered
7286          * memory model archs, such as IA-64).
7287          *
7288          * We also need this memory barrier to make certain all of the
7289          * status bits have been updated before next_to_watch is written.
7290          */
7291         wmb();
7292
7293         /* set next_to_watch value indicating a packet is present */
7294         first->next_to_watch = tx_desc;
7295
7296         i++;
7297         if (i == tx_ring->count)
7298                 i = 0;
7299
7300         tx_ring->next_to_use = i;
7301
7302         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7303
7304         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7305                 writel(i, tx_ring->tail);
7306
7307                 /* we need this if more than one processor can write to our tail
7308                  * at a time, it synchronizes IO on IA64/Altix systems
7309                  */
7310                 mmiowb();
7311         }
7312
7313         return;
7314 dma_error:
7315         dev_err(tx_ring->dev, "TX DMA map failed\n");
7316
7317         /* clear dma mappings for failed tx_buffer_info map */
7318         for (;;) {
7319                 tx_buffer = &tx_ring->tx_buffer_info[i];
7320                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7321                 if (tx_buffer == first)
7322                         break;
7323                 if (i == 0)
7324                         i = tx_ring->count;
7325                 i--;
7326         }
7327
7328         tx_ring->next_to_use = i;
7329 }
7330
7331 static void ixgbe_atr(struct ixgbe_ring *ring,
7332                       struct ixgbe_tx_buffer *first)
7333 {
7334         struct ixgbe_q_vector *q_vector = ring->q_vector;
7335         union ixgbe_atr_hash_dword input = { .dword = 0 };
7336         union ixgbe_atr_hash_dword common = { .dword = 0 };
7337         union {
7338                 unsigned char *network;
7339                 struct iphdr *ipv4;
7340                 struct ipv6hdr *ipv6;
7341         } hdr;
7342         struct tcphdr *th;
7343         struct sk_buff *skb;
7344 #ifdef CONFIG_IXGBE_VXLAN
7345         u8 encap = false;
7346 #endif /* CONFIG_IXGBE_VXLAN */
7347         __be16 vlan_id;
7348
7349         /* if ring doesn't have a interrupt vector, cannot perform ATR */
7350         if (!q_vector)
7351                 return;
7352
7353         /* do nothing if sampling is disabled */
7354         if (!ring->atr_sample_rate)
7355                 return;
7356
7357         ring->atr_count++;
7358
7359         /* snag network header to get L4 type and address */
7360         skb = first->skb;
7361         hdr.network = skb_network_header(skb);
7362         if (skb->encapsulation) {
7363 #ifdef CONFIG_IXGBE_VXLAN
7364                 struct ixgbe_adapter *adapter = q_vector->adapter;
7365
7366                 if (!adapter->vxlan_port)
7367                         return;
7368                 if (first->protocol != htons(ETH_P_IP) ||
7369                     hdr.ipv4->version != IPVERSION ||
7370                     hdr.ipv4->protocol != IPPROTO_UDP) {
7371                         return;
7372                 }
7373                 if (ntohs(udp_hdr(skb)->dest) != adapter->vxlan_port)
7374                         return;
7375                 encap = true;
7376                 hdr.network = skb_inner_network_header(skb);
7377                 th = inner_tcp_hdr(skb);
7378 #else
7379                 return;
7380 #endif /* CONFIG_IXGBE_VXLAN */
7381         } else {
7382                 /* Currently only IPv4/IPv6 with TCP is supported */
7383                 if ((first->protocol != htons(ETH_P_IPV6) ||
7384                      hdr.ipv6->nexthdr != IPPROTO_TCP) &&
7385                     (first->protocol != htons(ETH_P_IP) ||
7386                      hdr.ipv4->protocol != IPPROTO_TCP))
7387                         return;
7388                 th = tcp_hdr(skb);
7389         }
7390
7391         /* skip this packet since it is invalid or the socket is closing */
7392         if (!th || th->fin)
7393                 return;
7394
7395         /* sample on all syn packets or once every atr sample count */
7396         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7397                 return;
7398
7399         /* reset sample count */
7400         ring->atr_count = 0;
7401
7402         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7403
7404         /*
7405          * src and dst are inverted, think how the receiver sees them
7406          *
7407          * The input is broken into two sections, a non-compressed section
7408          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
7409          * is XORed together and stored in the compressed dword.
7410          */
7411         input.formatted.vlan_id = vlan_id;
7412
7413         /*
7414          * since src port and flex bytes occupy the same word XOR them together
7415          * and write the value to source port portion of compressed dword
7416          */
7417         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7418                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7419         else
7420                 common.port.src ^= th->dest ^ first->protocol;
7421         common.port.dst ^= th->source;
7422
7423         if (first->protocol == htons(ETH_P_IP)) {
7424                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7425                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7426         } else {
7427                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7428                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7429                              hdr.ipv6->saddr.s6_addr32[1] ^
7430                              hdr.ipv6->saddr.s6_addr32[2] ^
7431                              hdr.ipv6->saddr.s6_addr32[3] ^
7432                              hdr.ipv6->daddr.s6_addr32[0] ^
7433                              hdr.ipv6->daddr.s6_addr32[1] ^
7434                              hdr.ipv6->daddr.s6_addr32[2] ^
7435                              hdr.ipv6->daddr.s6_addr32[3];
7436         }
7437
7438 #ifdef CONFIG_IXGBE_VXLAN
7439         if (encap)
7440                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7441 #endif /* CONFIG_IXGBE_VXLAN */
7442
7443         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7444         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7445                                               input, common, ring->queue_index);
7446 }
7447
7448 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7449                               void *accel_priv, select_queue_fallback_t fallback)
7450 {
7451         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7452 #ifdef IXGBE_FCOE
7453         struct ixgbe_adapter *adapter;
7454         struct ixgbe_ring_feature *f;
7455         int txq;
7456 #endif
7457
7458         if (fwd_adapter)
7459                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7460
7461 #ifdef IXGBE_FCOE
7462
7463         /*
7464          * only execute the code below if protocol is FCoE
7465          * or FIP and we have FCoE enabled on the adapter
7466          */
7467         switch (vlan_get_protocol(skb)) {
7468         case htons(ETH_P_FCOE):
7469         case htons(ETH_P_FIP):
7470                 adapter = netdev_priv(dev);
7471
7472                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7473                         break;
7474         default:
7475                 return fallback(dev, skb);
7476         }
7477
7478         f = &adapter->ring_feature[RING_F_FCOE];
7479
7480         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7481                                            smp_processor_id();
7482
7483         while (txq >= f->indices)
7484                 txq -= f->indices;
7485
7486         return txq + f->offset;
7487 #else
7488         return fallback(dev, skb);
7489 #endif
7490 }
7491
7492 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7493                           struct ixgbe_adapter *adapter,
7494                           struct ixgbe_ring *tx_ring)
7495 {
7496         struct ixgbe_tx_buffer *first;
7497         int tso;
7498         u32 tx_flags = 0;
7499         unsigned short f;
7500         u16 count = TXD_USE_COUNT(skb_headlen(skb));
7501         __be16 protocol = skb->protocol;
7502         u8 hdr_len = 0;
7503
7504         /*
7505          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7506          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7507          *       + 2 desc gap to keep tail from touching head,
7508          *       + 1 desc for context descriptor,
7509          * otherwise try next time
7510          */
7511         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7512                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7513
7514         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7515                 tx_ring->tx_stats.tx_busy++;
7516                 return NETDEV_TX_BUSY;
7517         }
7518
7519         /* record the location of the first descriptor for this packet */
7520         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7521         first->skb = skb;
7522         first->bytecount = skb->len;
7523         first->gso_segs = 1;
7524
7525         /* if we have a HW VLAN tag being added default to the HW one */
7526         if (skb_vlan_tag_present(skb)) {
7527                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7528                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7529         /* else if it is a SW VLAN check the next protocol and store the tag */
7530         } else if (protocol == htons(ETH_P_8021Q)) {
7531                 struct vlan_hdr *vhdr, _vhdr;
7532                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7533                 if (!vhdr)
7534                         goto out_drop;
7535
7536                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7537                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
7538                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7539         }
7540         protocol = vlan_get_protocol(skb);
7541
7542         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7543             adapter->ptp_clock &&
7544             !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7545                                    &adapter->state)) {
7546                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7547                 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7548
7549                 /* schedule check for Tx timestamp */
7550                 adapter->ptp_tx_skb = skb_get(skb);
7551                 adapter->ptp_tx_start = jiffies;
7552                 schedule_work(&adapter->ptp_tx_work);
7553         }
7554
7555         skb_tx_timestamp(skb);
7556
7557 #ifdef CONFIG_PCI_IOV
7558         /*
7559          * Use the l2switch_enable flag - would be false if the DMA
7560          * Tx switch had been disabled.
7561          */
7562         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7563                 tx_flags |= IXGBE_TX_FLAGS_CC;
7564
7565 #endif
7566         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7567         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7568             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7569              (skb->priority != TC_PRIO_CONTROL))) {
7570                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7571                 tx_flags |= (skb->priority & 0x7) <<
7572                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7573                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7574                         struct vlan_ethhdr *vhdr;
7575
7576                         if (skb_cow_head(skb, 0))
7577                                 goto out_drop;
7578                         vhdr = (struct vlan_ethhdr *)skb->data;
7579                         vhdr->h_vlan_TCI = htons(tx_flags >>
7580                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
7581                 } else {
7582                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7583                 }
7584         }
7585
7586         /* record initial flags and protocol */
7587         first->tx_flags = tx_flags;
7588         first->protocol = protocol;
7589
7590 #ifdef IXGBE_FCOE
7591         /* setup tx offload for FCoE */
7592         if ((protocol == htons(ETH_P_FCOE)) &&
7593             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7594                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7595                 if (tso < 0)
7596                         goto out_drop;
7597
7598                 goto xmit_fcoe;
7599         }
7600
7601 #endif /* IXGBE_FCOE */
7602         tso = ixgbe_tso(tx_ring, first, &hdr_len);
7603         if (tso < 0)
7604                 goto out_drop;
7605         else if (!tso)
7606                 ixgbe_tx_csum(tx_ring, first);
7607
7608         /* add the ATR filter if ATR is on */
7609         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7610                 ixgbe_atr(tx_ring, first);
7611
7612 #ifdef IXGBE_FCOE
7613 xmit_fcoe:
7614 #endif /* IXGBE_FCOE */
7615         ixgbe_tx_map(tx_ring, first, hdr_len);
7616
7617         return NETDEV_TX_OK;
7618
7619 out_drop:
7620         dev_kfree_skb_any(first->skb);
7621         first->skb = NULL;
7622
7623         return NETDEV_TX_OK;
7624 }
7625
7626 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7627                                       struct net_device *netdev,
7628                                       struct ixgbe_ring *ring)
7629 {
7630         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7631         struct ixgbe_ring *tx_ring;
7632
7633         /*
7634          * The minimum packet size for olinfo paylen is 17 so pad the skb
7635          * in order to meet this minimum size requirement.
7636          */
7637         if (skb_put_padto(skb, 17))
7638                 return NETDEV_TX_OK;
7639
7640         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7641
7642         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7643 }
7644
7645 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7646                                     struct net_device *netdev)
7647 {
7648         return __ixgbe_xmit_frame(skb, netdev, NULL);
7649 }
7650
7651 /**
7652  * ixgbe_set_mac - Change the Ethernet Address of the NIC
7653  * @netdev: network interface device structure
7654  * @p: pointer to an address structure
7655  *
7656  * Returns 0 on success, negative on failure
7657  **/
7658 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7659 {
7660         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7661         struct ixgbe_hw *hw = &adapter->hw;
7662         struct sockaddr *addr = p;
7663         int ret;
7664
7665         if (!is_valid_ether_addr(addr->sa_data))
7666                 return -EADDRNOTAVAIL;
7667
7668         ixgbe_del_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7669         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7670         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7671
7672         ret = ixgbe_add_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7673         return ret > 0 ? 0 : ret;
7674 }
7675
7676 static int
7677 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7678 {
7679         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7680         struct ixgbe_hw *hw = &adapter->hw;
7681         u16 value;
7682         int rc;
7683
7684         if (prtad != hw->phy.mdio.prtad)
7685                 return -EINVAL;
7686         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7687         if (!rc)
7688                 rc = value;
7689         return rc;
7690 }
7691
7692 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7693                             u16 addr, u16 value)
7694 {
7695         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7696         struct ixgbe_hw *hw = &adapter->hw;
7697
7698         if (prtad != hw->phy.mdio.prtad)
7699                 return -EINVAL;
7700         return hw->phy.ops.write_reg(hw, addr, devad, value);
7701 }
7702
7703 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7704 {
7705         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7706
7707         switch (cmd) {
7708         case SIOCSHWTSTAMP:
7709                 return ixgbe_ptp_set_ts_config(adapter, req);
7710         case SIOCGHWTSTAMP:
7711                 return ixgbe_ptp_get_ts_config(adapter, req);
7712         default:
7713                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7714         }
7715 }
7716
7717 /**
7718  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7719  * netdev->dev_addrs
7720  * @netdev: network interface device structure
7721  *
7722  * Returns non-zero on failure
7723  **/
7724 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7725 {
7726         int err = 0;
7727         struct ixgbe_adapter *adapter = netdev_priv(dev);
7728         struct ixgbe_hw *hw = &adapter->hw;
7729
7730         if (is_valid_ether_addr(hw->mac.san_addr)) {
7731                 rtnl_lock();
7732                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7733                 rtnl_unlock();
7734
7735                 /* update SAN MAC vmdq pool selection */
7736                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7737         }
7738         return err;
7739 }
7740
7741 /**
7742  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7743  * netdev->dev_addrs
7744  * @netdev: network interface device structure
7745  *
7746  * Returns non-zero on failure
7747  **/
7748 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7749 {
7750         int err = 0;
7751         struct ixgbe_adapter *adapter = netdev_priv(dev);
7752         struct ixgbe_mac_info *mac = &adapter->hw.mac;
7753
7754         if (is_valid_ether_addr(mac->san_addr)) {
7755                 rtnl_lock();
7756                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7757                 rtnl_unlock();
7758         }
7759         return err;
7760 }
7761
7762 #ifdef CONFIG_NET_POLL_CONTROLLER
7763 /*
7764  * Polling 'interrupt' - used by things like netconsole to send skbs
7765  * without having to re-enable interrupts. It's not called while
7766  * the interrupt routine is executing.
7767  */
7768 static void ixgbe_netpoll(struct net_device *netdev)
7769 {
7770         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7771         int i;
7772
7773         /* if interface is down do nothing */
7774         if (test_bit(__IXGBE_DOWN, &adapter->state))
7775                 return;
7776
7777         /* loop through and schedule all active queues */
7778         for (i = 0; i < adapter->num_q_vectors; i++)
7779                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7780 }
7781
7782 #endif
7783 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7784                                                    struct rtnl_link_stats64 *stats)
7785 {
7786         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7787         int i;
7788
7789         rcu_read_lock();
7790         for (i = 0; i < adapter->num_rx_queues; i++) {
7791                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7792                 u64 bytes, packets;
7793                 unsigned int start;
7794
7795                 if (ring) {
7796                         do {
7797                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
7798                                 packets = ring->stats.packets;
7799                                 bytes   = ring->stats.bytes;
7800                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7801                         stats->rx_packets += packets;
7802                         stats->rx_bytes   += bytes;
7803                 }
7804         }
7805
7806         for (i = 0; i < adapter->num_tx_queues; i++) {
7807                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7808                 u64 bytes, packets;
7809                 unsigned int start;
7810
7811                 if (ring) {
7812                         do {
7813                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
7814                                 packets = ring->stats.packets;
7815                                 bytes   = ring->stats.bytes;
7816                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7817                         stats->tx_packets += packets;
7818                         stats->tx_bytes   += bytes;
7819                 }
7820         }
7821         rcu_read_unlock();
7822         /* following stats updated by ixgbe_watchdog_task() */
7823         stats->multicast        = netdev->stats.multicast;
7824         stats->rx_errors        = netdev->stats.rx_errors;
7825         stats->rx_length_errors = netdev->stats.rx_length_errors;
7826         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
7827         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7828         return stats;
7829 }
7830
7831 #ifdef CONFIG_IXGBE_DCB
7832 /**
7833  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7834  * @adapter: pointer to ixgbe_adapter
7835  * @tc: number of traffic classes currently enabled
7836  *
7837  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7838  * 802.1Q priority maps to a packet buffer that exists.
7839  */
7840 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7841 {
7842         struct ixgbe_hw *hw = &adapter->hw;
7843         u32 reg, rsave;
7844         int i;
7845
7846         /* 82598 have a static priority to TC mapping that can not
7847          * be changed so no validation is needed.
7848          */
7849         if (hw->mac.type == ixgbe_mac_82598EB)
7850                 return;
7851
7852         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7853         rsave = reg;
7854
7855         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7856                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7857
7858                 /* If up2tc is out of bounds default to zero */
7859                 if (up2tc > tc)
7860                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7861         }
7862
7863         if (reg != rsave)
7864                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7865
7866         return;
7867 }
7868
7869 /**
7870  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7871  * @adapter: Pointer to adapter struct
7872  *
7873  * Populate the netdev user priority to tc map
7874  */
7875 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7876 {
7877         struct net_device *dev = adapter->netdev;
7878         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7879         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7880         u8 prio;
7881
7882         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7883                 u8 tc = 0;
7884
7885                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7886                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7887                 else if (ets)
7888                         tc = ets->prio_tc[prio];
7889
7890                 netdev_set_prio_tc_map(dev, prio, tc);
7891         }
7892 }
7893
7894 #endif /* CONFIG_IXGBE_DCB */
7895 /**
7896  * ixgbe_setup_tc - configure net_device for multiple traffic classes
7897  *
7898  * @netdev: net device to configure
7899  * @tc: number of traffic classes to enable
7900  */
7901 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7902 {
7903         struct ixgbe_adapter *adapter = netdev_priv(dev);
7904         struct ixgbe_hw *hw = &adapter->hw;
7905         bool pools;
7906
7907         /* Hardware supports up to 8 traffic classes */
7908         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
7909                 return -EINVAL;
7910
7911         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
7912                 return -EINVAL;
7913
7914         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7915         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7916                 return -EBUSY;
7917
7918         /* Hardware has to reinitialize queues and interrupts to
7919          * match packet buffer alignment. Unfortunately, the
7920          * hardware is not flexible enough to do this dynamically.
7921          */
7922         if (netif_running(dev))
7923                 ixgbe_close(dev);
7924         else
7925                 ixgbe_reset(adapter);
7926
7927         ixgbe_clear_interrupt_scheme(adapter);
7928
7929 #ifdef CONFIG_IXGBE_DCB
7930         if (tc) {
7931                 netdev_set_num_tc(dev, tc);
7932                 ixgbe_set_prio_tc_map(adapter);
7933
7934                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7935
7936                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7937                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7938                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
7939                 }
7940         } else {
7941                 netdev_reset_tc(dev);
7942
7943                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7944                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7945
7946                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7947
7948                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7949                 adapter->dcb_cfg.pfc_mode_enable = false;
7950         }
7951
7952         ixgbe_validate_rtr(adapter, tc);
7953
7954 #endif /* CONFIG_IXGBE_DCB */
7955         ixgbe_init_interrupt_scheme(adapter);
7956
7957         if (netif_running(dev))
7958                 return ixgbe_open(dev);
7959
7960         return 0;
7961 }
7962
7963 #ifdef CONFIG_PCI_IOV
7964 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7965 {
7966         struct net_device *netdev = adapter->netdev;
7967
7968         rtnl_lock();
7969         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7970         rtnl_unlock();
7971 }
7972
7973 #endif
7974 void ixgbe_do_reset(struct net_device *netdev)
7975 {
7976         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7977
7978         if (netif_running(netdev))
7979                 ixgbe_reinit_locked(adapter);
7980         else
7981                 ixgbe_reset(adapter);
7982 }
7983
7984 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7985                                             netdev_features_t features)
7986 {
7987         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7988
7989         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7990         if (!(features & NETIF_F_RXCSUM))
7991                 features &= ~NETIF_F_LRO;
7992
7993         /* Turn off LRO if not RSC capable */
7994         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7995                 features &= ~NETIF_F_LRO;
7996
7997         return features;
7998 }
7999
8000 static int ixgbe_set_features(struct net_device *netdev,
8001                               netdev_features_t features)
8002 {
8003         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8004         netdev_features_t changed = netdev->features ^ features;
8005         bool need_reset = false;
8006
8007         /* Make sure RSC matches LRO, reset if change */
8008         if (!(features & NETIF_F_LRO)) {
8009                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8010                         need_reset = true;
8011                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8012         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8013                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8014                 if (adapter->rx_itr_setting == 1 ||
8015                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8016                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8017                         need_reset = true;
8018                 } else if ((changed ^ features) & NETIF_F_LRO) {
8019                         e_info(probe, "rx-usecs set too low, "
8020                                "disabling RSC\n");
8021                 }
8022         }
8023
8024         /*
8025          * Check if Flow Director n-tuple support was enabled or disabled.  If
8026          * the state changed, we need to reset.
8027          */
8028         switch (features & NETIF_F_NTUPLE) {
8029         case NETIF_F_NTUPLE:
8030                 /* turn off ATR, enable perfect filters and reset */
8031                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8032                         need_reset = true;
8033
8034                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8035                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8036                 break;
8037         default:
8038                 /* turn off perfect filters, enable ATR and reset */
8039                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8040                         need_reset = true;
8041
8042                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8043
8044                 /* We cannot enable ATR if SR-IOV is enabled */
8045                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8046                         break;
8047
8048                 /* We cannot enable ATR if we have 2 or more traffic classes */
8049                 if (netdev_get_num_tc(netdev) > 1)
8050                         break;
8051
8052                 /* We cannot enable ATR if RSS is disabled */
8053                 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
8054                         break;
8055
8056                 /* A sample rate of 0 indicates ATR disabled */
8057                 if (!adapter->atr_sample_rate)
8058                         break;
8059
8060                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8061                 break;
8062         }
8063
8064         if (features & NETIF_F_HW_VLAN_CTAG_RX)
8065                 ixgbe_vlan_strip_enable(adapter);
8066         else
8067                 ixgbe_vlan_strip_disable(adapter);
8068
8069         if (changed & NETIF_F_RXALL)
8070                 need_reset = true;
8071
8072         netdev->features = features;
8073
8074 #ifdef CONFIG_IXGBE_VXLAN
8075         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8076                 if (features & NETIF_F_RXCSUM)
8077                         adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8078                 else
8079                         ixgbe_clear_vxlan_port(adapter);
8080         }
8081 #endif /* CONFIG_IXGBE_VXLAN */
8082
8083         if (need_reset)
8084                 ixgbe_do_reset(netdev);
8085
8086         return 0;
8087 }
8088
8089 #ifdef CONFIG_IXGBE_VXLAN
8090 /**
8091  * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
8092  * @dev: The port's netdev
8093  * @sa_family: Socket Family that VXLAN is notifiying us about
8094  * @port: New UDP port number that VXLAN started listening to
8095  **/
8096 static void ixgbe_add_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8097                                  __be16 port)
8098 {
8099         struct ixgbe_adapter *adapter = netdev_priv(dev);
8100         struct ixgbe_hw *hw = &adapter->hw;
8101         u16 new_port = ntohs(port);
8102
8103         if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8104                 return;
8105
8106         if (sa_family == AF_INET6)
8107                 return;
8108
8109         if (adapter->vxlan_port == new_port)
8110                 return;
8111
8112         if (adapter->vxlan_port) {
8113                 netdev_info(dev,
8114                             "Hit Max num of VXLAN ports, not adding port %d\n",
8115                             new_port);
8116                 return;
8117         }
8118
8119         adapter->vxlan_port = new_port;
8120         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, new_port);
8121 }
8122
8123 /**
8124  * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
8125  * @dev: The port's netdev
8126  * @sa_family: Socket Family that VXLAN is notifying us about
8127  * @port: UDP port number that VXLAN stopped listening to
8128  **/
8129 static void ixgbe_del_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8130                                  __be16 port)
8131 {
8132         struct ixgbe_adapter *adapter = netdev_priv(dev);
8133         u16 new_port = ntohs(port);
8134
8135         if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8136                 return;
8137
8138         if (sa_family == AF_INET6)
8139                 return;
8140
8141         if (adapter->vxlan_port != new_port) {
8142                 netdev_info(dev, "Port %d was not found, not deleting\n",
8143                             new_port);
8144                 return;
8145         }
8146
8147         ixgbe_clear_vxlan_port(adapter);
8148         adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8149 }
8150 #endif /* CONFIG_IXGBE_VXLAN */
8151
8152 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8153                              struct net_device *dev,
8154                              const unsigned char *addr, u16 vid,
8155                              u16 flags)
8156 {
8157         /* guarantee we can provide a unique filter for the unicast address */
8158         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
8159                 if (IXGBE_MAX_PF_MACVLANS <= netdev_uc_count(dev))
8160                         return -ENOMEM;
8161         }
8162
8163         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
8164 }
8165
8166 /**
8167  * ixgbe_configure_bridge_mode - set various bridge modes
8168  * @adapter - the private structure
8169  * @mode - requested bridge mode
8170  *
8171  * Configure some settings require for various bridge modes.
8172  **/
8173 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
8174                                        __u16 mode)
8175 {
8176         struct ixgbe_hw *hw = &adapter->hw;
8177         unsigned int p, num_pools;
8178         u32 vmdctl;
8179
8180         switch (mode) {
8181         case BRIDGE_MODE_VEPA:
8182                 /* disable Tx loopback, rely on switch hairpin mode */
8183                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
8184
8185                 /* must enable Rx switching replication to allow multicast
8186                  * packet reception on all VFs, and to enable source address
8187                  * pruning.
8188                  */
8189                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8190                 vmdctl |= IXGBE_VT_CTL_REPLEN;
8191                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8192
8193                 /* enable Rx source address pruning. Note, this requires
8194                  * replication to be enabled or else it does nothing.
8195                  */
8196                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8197                 for (p = 0; p < num_pools; p++) {
8198                         if (hw->mac.ops.set_source_address_pruning)
8199                                 hw->mac.ops.set_source_address_pruning(hw,
8200                                                                        true,
8201                                                                        p);
8202                 }
8203                 break;
8204         case BRIDGE_MODE_VEB:
8205                 /* enable Tx loopback for internal VF/PF communication */
8206                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
8207                                 IXGBE_PFDTXGSWC_VT_LBEN);
8208
8209                 /* disable Rx switching replication unless we have SR-IOV
8210                  * virtual functions
8211                  */
8212                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8213                 if (!adapter->num_vfs)
8214                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
8215                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8216
8217                 /* disable Rx source address pruning, since we don't expect to
8218                  * be receiving external loopback of our transmitted frames.
8219                  */
8220                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8221                 for (p = 0; p < num_pools; p++) {
8222                         if (hw->mac.ops.set_source_address_pruning)
8223                                 hw->mac.ops.set_source_address_pruning(hw,
8224                                                                        false,
8225                                                                        p);
8226                 }
8227                 break;
8228         default:
8229                 return -EINVAL;
8230         }
8231
8232         adapter->bridge_mode = mode;
8233
8234         e_info(drv, "enabling bridge mode: %s\n",
8235                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
8236
8237         return 0;
8238 }
8239
8240 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
8241                                     struct nlmsghdr *nlh, u16 flags)
8242 {
8243         struct ixgbe_adapter *adapter = netdev_priv(dev);
8244         struct nlattr *attr, *br_spec;
8245         int rem;
8246
8247         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8248                 return -EOPNOTSUPP;
8249
8250         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8251         if (!br_spec)
8252                 return -EINVAL;
8253
8254         nla_for_each_nested(attr, br_spec, rem) {
8255                 int status;
8256                 __u16 mode;
8257
8258                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8259                         continue;
8260
8261                 if (nla_len(attr) < sizeof(mode))
8262                         return -EINVAL;
8263
8264                 mode = nla_get_u16(attr);
8265                 status = ixgbe_configure_bridge_mode(adapter, mode);
8266                 if (status)
8267                         return status;
8268
8269                 break;
8270         }
8271
8272         return 0;
8273 }
8274
8275 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8276                                     struct net_device *dev,
8277                                     u32 filter_mask, int nlflags)
8278 {
8279         struct ixgbe_adapter *adapter = netdev_priv(dev);
8280
8281         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8282                 return 0;
8283
8284         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
8285                                        adapter->bridge_mode, 0, 0, nlflags,
8286                                        filter_mask, NULL);
8287 }
8288
8289 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
8290 {
8291         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
8292         struct ixgbe_adapter *adapter = netdev_priv(pdev);
8293         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
8294         unsigned int limit;
8295         int pool, err;
8296
8297         /* Hardware has a limited number of available pools. Each VF, and the
8298          * PF require a pool. Check to ensure we don't attempt to use more
8299          * then the available number of pools.
8300          */
8301         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
8302                 return ERR_PTR(-EINVAL);
8303
8304 #ifdef CONFIG_RPS
8305         if (vdev->num_rx_queues != vdev->num_tx_queues) {
8306                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
8307                             vdev->name);
8308                 return ERR_PTR(-EINVAL);
8309         }
8310 #endif
8311         /* Check for hardware restriction on number of rx/tx queues */
8312         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
8313             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
8314                 netdev_info(pdev,
8315                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
8316                             pdev->name);
8317                 return ERR_PTR(-EINVAL);
8318         }
8319
8320         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8321               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
8322             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
8323                 return ERR_PTR(-EBUSY);
8324
8325         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
8326         if (!fwd_adapter)
8327                 return ERR_PTR(-ENOMEM);
8328
8329         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
8330         adapter->num_rx_pools++;
8331         set_bit(pool, &adapter->fwd_bitmask);
8332         limit = find_last_bit(&adapter->fwd_bitmask, 32);
8333
8334         /* Enable VMDq flag so device will be set in VM mode */
8335         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
8336         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8337         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
8338
8339         /* Force reinit of ring allocation with VMDQ enabled */
8340         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8341         if (err)
8342                 goto fwd_add_err;
8343         fwd_adapter->pool = pool;
8344         fwd_adapter->real_adapter = adapter;
8345         err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
8346         if (err)
8347                 goto fwd_add_err;
8348         netif_tx_start_all_queues(vdev);
8349         return fwd_adapter;
8350 fwd_add_err:
8351         /* unwind counter and free adapter struct */
8352         netdev_info(pdev,
8353                     "%s: dfwd hardware acceleration failed\n", vdev->name);
8354         clear_bit(pool, &adapter->fwd_bitmask);
8355         adapter->num_rx_pools--;
8356         kfree(fwd_adapter);
8357         return ERR_PTR(err);
8358 }
8359
8360 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
8361 {
8362         struct ixgbe_fwd_adapter *fwd_adapter = priv;
8363         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
8364         unsigned int limit;
8365
8366         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
8367         adapter->num_rx_pools--;
8368
8369         limit = find_last_bit(&adapter->fwd_bitmask, 32);
8370         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8371         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
8372         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8373         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
8374                    fwd_adapter->pool, adapter->num_rx_pools,
8375                    fwd_adapter->rx_base_queue,
8376                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
8377                    adapter->fwd_bitmask);
8378         kfree(fwd_adapter);
8379 }
8380
8381 #define IXGBE_MAX_TUNNEL_HDR_LEN 80
8382 static netdev_features_t
8383 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
8384                      netdev_features_t features)
8385 {
8386         if (!skb->encapsulation)
8387                 return features;
8388
8389         if (unlikely(skb_inner_mac_header(skb) - skb_transport_header(skb) >
8390                      IXGBE_MAX_TUNNEL_HDR_LEN))
8391                 return features & ~NETIF_F_ALL_CSUM;
8392
8393         return features;
8394 }
8395
8396 static const struct net_device_ops ixgbe_netdev_ops = {
8397         .ndo_open               = ixgbe_open,
8398         .ndo_stop               = ixgbe_close,
8399         .ndo_start_xmit         = ixgbe_xmit_frame,
8400         .ndo_select_queue       = ixgbe_select_queue,
8401         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
8402         .ndo_validate_addr      = eth_validate_addr,
8403         .ndo_set_mac_address    = ixgbe_set_mac,
8404         .ndo_change_mtu         = ixgbe_change_mtu,
8405         .ndo_tx_timeout         = ixgbe_tx_timeout,
8406         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
8407         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
8408         .ndo_do_ioctl           = ixgbe_ioctl,
8409         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
8410         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
8411         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
8412         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
8413         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
8414         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
8415         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
8416         .ndo_get_stats64        = ixgbe_get_stats64,
8417 #ifdef CONFIG_IXGBE_DCB
8418         .ndo_setup_tc           = ixgbe_setup_tc,
8419 #endif
8420 #ifdef CONFIG_NET_POLL_CONTROLLER
8421         .ndo_poll_controller    = ixgbe_netpoll,
8422 #endif
8423 #ifdef CONFIG_NET_RX_BUSY_POLL
8424         .ndo_busy_poll          = ixgbe_low_latency_recv,
8425 #endif
8426 #ifdef IXGBE_FCOE
8427         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
8428         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
8429         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
8430         .ndo_fcoe_enable = ixgbe_fcoe_enable,
8431         .ndo_fcoe_disable = ixgbe_fcoe_disable,
8432         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
8433         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
8434 #endif /* IXGBE_FCOE */
8435         .ndo_set_features = ixgbe_set_features,
8436         .ndo_fix_features = ixgbe_fix_features,
8437         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
8438         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
8439         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
8440         .ndo_dfwd_add_station   = ixgbe_fwd_add,
8441         .ndo_dfwd_del_station   = ixgbe_fwd_del,
8442 #ifdef CONFIG_IXGBE_VXLAN
8443         .ndo_add_vxlan_port     = ixgbe_add_vxlan_port,
8444         .ndo_del_vxlan_port     = ixgbe_del_vxlan_port,
8445 #endif /* CONFIG_IXGBE_VXLAN */
8446         .ndo_features_check     = ixgbe_features_check,
8447 };
8448
8449 /**
8450  * ixgbe_enumerate_functions - Get the number of ports this device has
8451  * @adapter: adapter structure
8452  *
8453  * This function enumerates the phsyical functions co-located on a single slot,
8454  * in order to determine how many ports a device has. This is most useful in
8455  * determining the required GT/s of PCIe bandwidth necessary for optimal
8456  * performance.
8457  **/
8458 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
8459 {
8460         struct pci_dev *entry, *pdev = adapter->pdev;
8461         int physfns = 0;
8462
8463         /* Some cards can not use the generic count PCIe functions method,
8464          * because they are behind a parent switch, so we hardcode these with
8465          * the correct number of functions.
8466          */
8467         if (ixgbe_pcie_from_parent(&adapter->hw))
8468                 physfns = 4;
8469
8470         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
8471                 /* don't count virtual functions */
8472                 if (entry->is_virtfn)
8473                         continue;
8474
8475                 /* When the devices on the bus don't all match our device ID,
8476                  * we can't reliably determine the correct number of
8477                  * functions. This can occur if a function has been direct
8478                  * attached to a virtual machine using VT-d, for example. In
8479                  * this case, simply return -1 to indicate this.
8480                  */
8481                 if ((entry->vendor != pdev->vendor) ||
8482                     (entry->device != pdev->device))
8483                         return -1;
8484
8485                 physfns++;
8486         }
8487
8488         return physfns;
8489 }
8490
8491 /**
8492  * ixgbe_wol_supported - Check whether device supports WoL
8493  * @hw: hw specific details
8494  * @device_id: the device ID
8495  * @subdev_id: the subsystem device ID
8496  *
8497  * This function is used by probe and ethtool to determine
8498  * which devices have WoL support
8499  *
8500  **/
8501 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
8502                         u16 subdevice_id)
8503 {
8504         struct ixgbe_hw *hw = &adapter->hw;
8505         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
8506         int is_wol_supported = 0;
8507
8508         switch (device_id) {
8509         case IXGBE_DEV_ID_82599_SFP:
8510                 /* Only these subdevices could supports WOL */
8511                 switch (subdevice_id) {
8512                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
8513                 case IXGBE_SUBDEV_ID_82599_560FLR:
8514                         /* only support first port */
8515                         if (hw->bus.func != 0)
8516                                 break;
8517                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
8518                 case IXGBE_SUBDEV_ID_82599_SFP:
8519                 case IXGBE_SUBDEV_ID_82599_RNDC:
8520                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
8521                 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
8522                         is_wol_supported = 1;
8523                         break;
8524                 }
8525                 break;
8526         case IXGBE_DEV_ID_82599EN_SFP:
8527                 /* Only this subdevice supports WOL */
8528                 switch (subdevice_id) {
8529                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8530                         is_wol_supported = 1;
8531                         break;
8532                 }
8533                 break;
8534         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8535                 /* All except this subdevice support WOL */
8536                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8537                         is_wol_supported = 1;
8538                 break;
8539         case IXGBE_DEV_ID_82599_KX4:
8540                 is_wol_supported = 1;
8541                 break;
8542         case IXGBE_DEV_ID_X540T:
8543         case IXGBE_DEV_ID_X540T1:
8544         case IXGBE_DEV_ID_X550T:
8545         case IXGBE_DEV_ID_X550EM_X_KX4:
8546         case IXGBE_DEV_ID_X550EM_X_KR:
8547         case IXGBE_DEV_ID_X550EM_X_10G_T:
8548                 /* check eeprom to see if enabled wol */
8549                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8550                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8551                      (hw->bus.func == 0))) {
8552                         is_wol_supported = 1;
8553                 }
8554                 break;
8555         }
8556
8557         return is_wol_supported;
8558 }
8559
8560 /**
8561  * ixgbe_get_platform_mac_addr - Look up MAC address in Open Firmware / IDPROM
8562  * @adapter: Pointer to adapter struct
8563  */
8564 static void ixgbe_get_platform_mac_addr(struct ixgbe_adapter *adapter)
8565 {
8566 #ifdef CONFIG_OF
8567         struct device_node *dp = pci_device_to_OF_node(adapter->pdev);
8568         struct ixgbe_hw *hw = &adapter->hw;
8569         const unsigned char *addr;
8570
8571         addr = of_get_mac_address(dp);
8572         if (addr) {
8573                 ether_addr_copy(hw->mac.perm_addr, addr);
8574                 return;
8575         }
8576 #endif /* CONFIG_OF */
8577
8578 #ifdef CONFIG_SPARC
8579         ether_addr_copy(hw->mac.perm_addr, idprom->id_ethaddr);
8580 #endif /* CONFIG_SPARC */
8581 }
8582
8583 /**
8584  * ixgbe_probe - Device Initialization Routine
8585  * @pdev: PCI device information struct
8586  * @ent: entry in ixgbe_pci_tbl
8587  *
8588  * Returns 0 on success, negative on failure
8589  *
8590  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8591  * The OS initialization, configuring of the adapter private structure,
8592  * and a hardware reset occur.
8593  **/
8594 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8595 {
8596         struct net_device *netdev;
8597         struct ixgbe_adapter *adapter = NULL;
8598         struct ixgbe_hw *hw;
8599         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8600         int i, err, pci_using_dac, expected_gts;
8601         unsigned int indices = MAX_TX_QUEUES;
8602         u8 part_str[IXGBE_PBANUM_LENGTH];
8603         bool disable_dev = false;
8604 #ifdef IXGBE_FCOE
8605         u16 device_caps;
8606 #endif
8607         u32 eec;
8608
8609         /* Catch broken hardware that put the wrong VF device ID in
8610          * the PCIe SR-IOV capability.
8611          */
8612         if (pdev->is_virtfn) {
8613                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8614                      pci_name(pdev), pdev->vendor, pdev->device);
8615                 return -EINVAL;
8616         }
8617
8618         err = pci_enable_device_mem(pdev);
8619         if (err)
8620                 return err;
8621
8622         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8623                 pci_using_dac = 1;
8624         } else {
8625                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8626                 if (err) {
8627                         dev_err(&pdev->dev,
8628                                 "No usable DMA configuration, aborting\n");
8629                         goto err_dma;
8630                 }
8631                 pci_using_dac = 0;
8632         }
8633
8634         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8635                                            IORESOURCE_MEM), ixgbe_driver_name);
8636         if (err) {
8637                 dev_err(&pdev->dev,
8638                         "pci_request_selected_regions failed 0x%x\n", err);
8639                 goto err_pci_reg;
8640         }
8641
8642         pci_enable_pcie_error_reporting(pdev);
8643
8644         pci_set_master(pdev);
8645         pci_save_state(pdev);
8646
8647         if (ii->mac == ixgbe_mac_82598EB) {
8648 #ifdef CONFIG_IXGBE_DCB
8649                 /* 8 TC w/ 4 queues per TC */
8650                 indices = 4 * MAX_TRAFFIC_CLASS;
8651 #else
8652                 indices = IXGBE_MAX_RSS_INDICES;
8653 #endif
8654         }
8655
8656         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8657         if (!netdev) {
8658                 err = -ENOMEM;
8659                 goto err_alloc_etherdev;
8660         }
8661
8662         SET_NETDEV_DEV(netdev, &pdev->dev);
8663
8664         adapter = netdev_priv(netdev);
8665
8666         adapter->netdev = netdev;
8667         adapter->pdev = pdev;
8668         hw = &adapter->hw;
8669         hw->back = adapter;
8670         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8671
8672         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8673                               pci_resource_len(pdev, 0));
8674         adapter->io_addr = hw->hw_addr;
8675         if (!hw->hw_addr) {
8676                 err = -EIO;
8677                 goto err_ioremap;
8678         }
8679
8680         netdev->netdev_ops = &ixgbe_netdev_ops;
8681         ixgbe_set_ethtool_ops(netdev);
8682         netdev->watchdog_timeo = 5 * HZ;
8683         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
8684
8685         /* Setup hw api */
8686         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8687         hw->mac.type  = ii->mac;
8688         hw->mvals     = ii->mvals;
8689
8690         /* EEPROM */
8691         memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8692         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
8693         if (ixgbe_removed(hw->hw_addr)) {
8694                 err = -EIO;
8695                 goto err_ioremap;
8696         }
8697         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8698         if (!(eec & (1 << 8)))
8699                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8700
8701         /* PHY */
8702         memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8703         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8704         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8705         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8706         hw->phy.mdio.mmds = 0;
8707         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8708         hw->phy.mdio.dev = netdev;
8709         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8710         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8711
8712         ii->get_invariants(hw);
8713
8714         /* setup the private structure */
8715         err = ixgbe_sw_init(adapter);
8716         if (err)
8717                 goto err_sw_init;
8718
8719         /* Make it possible the adapter to be woken up via WOL */
8720         switch (adapter->hw.mac.type) {
8721         case ixgbe_mac_82599EB:
8722         case ixgbe_mac_X540:
8723         case ixgbe_mac_X550:
8724         case ixgbe_mac_X550EM_x:
8725                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8726                 break;
8727         default:
8728                 break;
8729         }
8730
8731         /*
8732          * If there is a fan on this device and it has failed log the
8733          * failure.
8734          */
8735         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8736                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8737                 if (esdp & IXGBE_ESDP_SDP1)
8738                         e_crit(probe, "Fan has stopped, replace the adapter\n");
8739         }
8740
8741         if (allow_unsupported_sfp)
8742                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8743
8744         /* reset_hw fills in the perm_addr as well */
8745         hw->phy.reset_if_overtemp = true;
8746         err = hw->mac.ops.reset_hw(hw);
8747         hw->phy.reset_if_overtemp = false;
8748         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
8749                 err = 0;
8750         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8751                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8752                 e_dev_err("Reload the driver after installing a supported module.\n");
8753                 goto err_sw_init;
8754         } else if (err) {
8755                 e_dev_err("HW Init failed: %d\n", err);
8756                 goto err_sw_init;
8757         }
8758
8759 #ifdef CONFIG_PCI_IOV
8760         /* SR-IOV not supported on the 82598 */
8761         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8762                 goto skip_sriov;
8763         /* Mailbox */
8764         ixgbe_init_mbx_params_pf(hw);
8765         memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8766         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8767         ixgbe_enable_sriov(adapter);
8768 skip_sriov:
8769
8770 #endif
8771         netdev->features = NETIF_F_SG |
8772                            NETIF_F_IP_CSUM |
8773                            NETIF_F_IPV6_CSUM |
8774                            NETIF_F_HW_VLAN_CTAG_TX |
8775                            NETIF_F_HW_VLAN_CTAG_RX |
8776                            NETIF_F_TSO |
8777                            NETIF_F_TSO6 |
8778                            NETIF_F_RXHASH |
8779                            NETIF_F_RXCSUM;
8780
8781         netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8782
8783         switch (adapter->hw.mac.type) {
8784         case ixgbe_mac_82599EB:
8785         case ixgbe_mac_X540:
8786         case ixgbe_mac_X550:
8787         case ixgbe_mac_X550EM_x:
8788                 netdev->features |= NETIF_F_SCTP_CSUM;
8789                 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8790                                        NETIF_F_NTUPLE;
8791                 break;
8792         default:
8793                 break;
8794         }
8795
8796         netdev->hw_features |= NETIF_F_RXALL;
8797         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
8798
8799         netdev->vlan_features |= NETIF_F_TSO;
8800         netdev->vlan_features |= NETIF_F_TSO6;
8801         netdev->vlan_features |= NETIF_F_IP_CSUM;
8802         netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8803         netdev->vlan_features |= NETIF_F_SG;
8804
8805         netdev->hw_enc_features |= NETIF_F_SG | NETIF_F_IP_CSUM |
8806                                    NETIF_F_IPV6_CSUM;
8807
8808         netdev->priv_flags |= IFF_UNICAST_FLT;
8809         netdev->priv_flags |= IFF_SUPP_NOFCS;
8810
8811 #ifdef CONFIG_IXGBE_VXLAN
8812         switch (adapter->hw.mac.type) {
8813         case ixgbe_mac_X550:
8814         case ixgbe_mac_X550EM_x:
8815                 netdev->hw_enc_features |= NETIF_F_RXCSUM |
8816                                            NETIF_F_IP_CSUM |
8817                                            NETIF_F_IPV6_CSUM;
8818                 break;
8819         default:
8820                 break;
8821         }
8822 #endif /* CONFIG_IXGBE_VXLAN */
8823
8824 #ifdef CONFIG_IXGBE_DCB
8825         netdev->dcbnl_ops = &dcbnl_ops;
8826 #endif
8827
8828 #ifdef IXGBE_FCOE
8829         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8830                 unsigned int fcoe_l;
8831
8832                 if (hw->mac.ops.get_device_caps) {
8833                         hw->mac.ops.get_device_caps(hw, &device_caps);
8834                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8835                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8836                 }
8837
8838
8839                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8840                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8841
8842                 netdev->features |= NETIF_F_FSO |
8843                                     NETIF_F_FCOE_CRC;
8844
8845                 netdev->vlan_features |= NETIF_F_FSO |
8846                                          NETIF_F_FCOE_CRC |
8847                                          NETIF_F_FCOE_MTU;
8848         }
8849 #endif /* IXGBE_FCOE */
8850         if (pci_using_dac) {
8851                 netdev->features |= NETIF_F_HIGHDMA;
8852                 netdev->vlan_features |= NETIF_F_HIGHDMA;
8853         }
8854
8855         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8856                 netdev->hw_features |= NETIF_F_LRO;
8857         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8858                 netdev->features |= NETIF_F_LRO;
8859
8860         /* make sure the EEPROM is good */
8861         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8862                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8863                 err = -EIO;
8864                 goto err_sw_init;
8865         }
8866
8867         ixgbe_get_platform_mac_addr(adapter);
8868
8869         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8870
8871         if (!is_valid_ether_addr(netdev->dev_addr)) {
8872                 e_dev_err("invalid MAC address\n");
8873                 err = -EIO;
8874                 goto err_sw_init;
8875         }
8876
8877         ixgbe_mac_set_default_filter(adapter, hw->mac.perm_addr);
8878
8879         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8880                     (unsigned long) adapter);
8881
8882         if (ixgbe_removed(hw->hw_addr)) {
8883                 err = -EIO;
8884                 goto err_sw_init;
8885         }
8886         INIT_WORK(&adapter->service_task, ixgbe_service_task);
8887         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8888         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8889
8890         err = ixgbe_init_interrupt_scheme(adapter);
8891         if (err)
8892                 goto err_sw_init;
8893
8894         /* WOL not supported for all devices */
8895         adapter->wol = 0;
8896         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8897         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8898                                                 pdev->subsystem_device);
8899         if (hw->wol_enabled)
8900                 adapter->wol = IXGBE_WUFC_MAG;
8901
8902         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8903
8904         /* save off EEPROM version number */
8905         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8906         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8907
8908         /* pick up the PCI bus settings for reporting later */
8909         if (ixgbe_pcie_from_parent(hw))
8910                 ixgbe_get_parent_bus_info(adapter);
8911         else
8912                  hw->mac.ops.get_bus_info(hw);
8913
8914         /* calculate the expected PCIe bandwidth required for optimal
8915          * performance. Note that some older parts will never have enough
8916          * bandwidth due to being older generation PCIe parts. We clamp these
8917          * parts to ensure no warning is displayed if it can't be fixed.
8918          */
8919         switch (hw->mac.type) {
8920         case ixgbe_mac_82598EB:
8921                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8922                 break;
8923         default:
8924                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8925                 break;
8926         }
8927
8928         /* don't check link if we failed to enumerate functions */
8929         if (expected_gts > 0)
8930                 ixgbe_check_minimum_link(adapter, expected_gts);
8931
8932         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
8933         if (err)
8934                 strlcpy(part_str, "Unknown", sizeof(part_str));
8935         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8936                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8937                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8938                            part_str);
8939         else
8940                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8941                            hw->mac.type, hw->phy.type, part_str);
8942
8943         e_dev_info("%pM\n", netdev->dev_addr);
8944
8945         /* reset the hardware with the new settings */
8946         err = hw->mac.ops.start_hw(hw);
8947         if (err == IXGBE_ERR_EEPROM_VERSION) {
8948                 /* We are running on a pre-production device, log a warning */
8949                 e_dev_warn("This device is a pre-production adapter/LOM. "
8950                            "Please be aware there may be issues associated "
8951                            "with your hardware.  If you are experiencing "
8952                            "problems please contact your Intel or hardware "
8953                            "representative who provided you with this "
8954                            "hardware.\n");
8955         }
8956         strcpy(netdev->name, "eth%d");
8957         err = register_netdev(netdev);
8958         if (err)
8959                 goto err_register;
8960
8961         pci_set_drvdata(pdev, adapter);
8962
8963         /* power down the optics for 82599 SFP+ fiber */
8964         if (hw->mac.ops.disable_tx_laser)
8965                 hw->mac.ops.disable_tx_laser(hw);
8966
8967         /* carrier off reporting is important to ethtool even BEFORE open */
8968         netif_carrier_off(netdev);
8969
8970 #ifdef CONFIG_IXGBE_DCA
8971         if (dca_add_requester(&pdev->dev) == 0) {
8972                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8973                 ixgbe_setup_dca(adapter);
8974         }
8975 #endif
8976         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8977                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8978                 for (i = 0; i < adapter->num_vfs; i++)
8979                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
8980         }
8981
8982         /* firmware requires driver version to be 0xFFFFFFFF
8983          * since os does not support feature
8984          */
8985         if (hw->mac.ops.set_fw_drv_ver)
8986                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8987                                            0xFF);
8988
8989         /* add san mac addr to netdev */
8990         ixgbe_add_sanmac_netdev(netdev);
8991
8992         e_dev_info("%s\n", ixgbe_default_device_descr);
8993
8994 #ifdef CONFIG_IXGBE_HWMON
8995         if (ixgbe_sysfs_init(adapter))
8996                 e_err(probe, "failed to allocate sysfs resources\n");
8997 #endif /* CONFIG_IXGBE_HWMON */
8998
8999         ixgbe_dbg_adapter_init(adapter);
9000
9001         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9002         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
9003                 hw->mac.ops.setup_link(hw,
9004                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
9005                         true);
9006
9007         return 0;
9008
9009 err_register:
9010         ixgbe_release_hw_control(adapter);
9011         ixgbe_clear_interrupt_scheme(adapter);
9012 err_sw_init:
9013         ixgbe_disable_sriov(adapter);
9014         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
9015         iounmap(adapter->io_addr);
9016         kfree(adapter->mac_table);
9017 err_ioremap:
9018         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9019         free_netdev(netdev);
9020 err_alloc_etherdev:
9021         pci_release_selected_regions(pdev,
9022                                      pci_select_bars(pdev, IORESOURCE_MEM));
9023 err_pci_reg:
9024 err_dma:
9025         if (!adapter || disable_dev)
9026                 pci_disable_device(pdev);
9027         return err;
9028 }
9029
9030 /**
9031  * ixgbe_remove - Device Removal Routine
9032  * @pdev: PCI device information struct
9033  *
9034  * ixgbe_remove is called by the PCI subsystem to alert the driver
9035  * that it should release a PCI device.  The could be caused by a
9036  * Hot-Plug event, or because the driver is going to be removed from
9037  * memory.
9038  **/
9039 static void ixgbe_remove(struct pci_dev *pdev)
9040 {
9041         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9042         struct net_device *netdev;
9043         bool disable_dev;
9044
9045         /* if !adapter then we already cleaned up in probe */
9046         if (!adapter)
9047                 return;
9048
9049         netdev  = adapter->netdev;
9050         ixgbe_dbg_adapter_exit(adapter);
9051
9052         set_bit(__IXGBE_REMOVING, &adapter->state);
9053         cancel_work_sync(&adapter->service_task);
9054
9055
9056 #ifdef CONFIG_IXGBE_DCA
9057         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9058                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9059                 dca_remove_requester(&pdev->dev);
9060                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
9061                                 IXGBE_DCA_CTRL_DCA_DISABLE);
9062         }
9063
9064 #endif
9065 #ifdef CONFIG_IXGBE_HWMON
9066         ixgbe_sysfs_exit(adapter);
9067 #endif /* CONFIG_IXGBE_HWMON */
9068
9069         /* remove the added san mac */
9070         ixgbe_del_sanmac_netdev(netdev);
9071
9072 #ifdef CONFIG_PCI_IOV
9073         ixgbe_disable_sriov(adapter);
9074 #endif
9075         if (netdev->reg_state == NETREG_REGISTERED)
9076                 unregister_netdev(netdev);
9077
9078         ixgbe_clear_interrupt_scheme(adapter);
9079
9080         ixgbe_release_hw_control(adapter);
9081
9082 #ifdef CONFIG_DCB
9083         kfree(adapter->ixgbe_ieee_pfc);
9084         kfree(adapter->ixgbe_ieee_ets);
9085
9086 #endif
9087         iounmap(adapter->io_addr);
9088         pci_release_selected_regions(pdev, pci_select_bars(pdev,
9089                                      IORESOURCE_MEM));
9090
9091         e_dev_info("complete\n");
9092
9093         kfree(adapter->mac_table);
9094         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9095         free_netdev(netdev);
9096
9097         pci_disable_pcie_error_reporting(pdev);
9098
9099         if (disable_dev)
9100                 pci_disable_device(pdev);
9101 }
9102
9103 /**
9104  * ixgbe_io_error_detected - called when PCI error is detected
9105  * @pdev: Pointer to PCI device
9106  * @state: The current pci connection state
9107  *
9108  * This function is called after a PCI bus error affecting
9109  * this device has been detected.
9110  */
9111 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
9112                                                 pci_channel_state_t state)
9113 {
9114         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9115         struct net_device *netdev = adapter->netdev;
9116
9117 #ifdef CONFIG_PCI_IOV
9118         struct ixgbe_hw *hw = &adapter->hw;
9119         struct pci_dev *bdev, *vfdev;
9120         u32 dw0, dw1, dw2, dw3;
9121         int vf, pos;
9122         u16 req_id, pf_func;
9123
9124         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
9125             adapter->num_vfs == 0)
9126                 goto skip_bad_vf_detection;
9127
9128         bdev = pdev->bus->self;
9129         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9130                 bdev = bdev->bus->self;
9131
9132         if (!bdev)
9133                 goto skip_bad_vf_detection;
9134
9135         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9136         if (!pos)
9137                 goto skip_bad_vf_detection;
9138
9139         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
9140         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
9141         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
9142         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
9143         if (ixgbe_removed(hw->hw_addr))
9144                 goto skip_bad_vf_detection;
9145
9146         req_id = dw1 >> 16;
9147         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9148         if (!(req_id & 0x0080))
9149                 goto skip_bad_vf_detection;
9150
9151         pf_func = req_id & 0x01;
9152         if ((pf_func & 1) == (pdev->devfn & 1)) {
9153                 unsigned int device_id;
9154
9155                 vf = (req_id & 0x7F) >> 1;
9156                 e_dev_err("VF %d has caused a PCIe error\n", vf);
9157                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9158                                 "%8.8x\tdw3: %8.8x\n",
9159                 dw0, dw1, dw2, dw3);
9160                 switch (adapter->hw.mac.type) {
9161                 case ixgbe_mac_82599EB:
9162                         device_id = IXGBE_82599_VF_DEVICE_ID;
9163                         break;
9164                 case ixgbe_mac_X540:
9165                         device_id = IXGBE_X540_VF_DEVICE_ID;
9166                         break;
9167                 case ixgbe_mac_X550:
9168                         device_id = IXGBE_DEV_ID_X550_VF;
9169                         break;
9170                 case ixgbe_mac_X550EM_x:
9171                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
9172                         break;
9173                 default:
9174                         device_id = 0;
9175                         break;
9176                 }
9177
9178                 /* Find the pci device of the offending VF */
9179                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
9180                 while (vfdev) {
9181                         if (vfdev->devfn == (req_id & 0xFF))
9182                                 break;
9183                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9184                                                device_id, vfdev);
9185                 }
9186                 /*
9187                  * There's a slim chance the VF could have been hot plugged,
9188                  * so if it is no longer present we don't need to issue the
9189                  * VFLR.  Just clean up the AER in that case.
9190                  */
9191                 if (vfdev) {
9192                         ixgbe_issue_vf_flr(adapter, vfdev);
9193                         /* Free device reference count */
9194                         pci_dev_put(vfdev);
9195                 }
9196
9197                 pci_cleanup_aer_uncorrect_error_status(pdev);
9198         }
9199
9200         /*
9201          * Even though the error may have occurred on the other port
9202          * we still need to increment the vf error reference count for
9203          * both ports because the I/O resume function will be called
9204          * for both of them.
9205          */
9206         adapter->vferr_refcount++;
9207
9208         return PCI_ERS_RESULT_RECOVERED;
9209
9210 skip_bad_vf_detection:
9211 #endif /* CONFIG_PCI_IOV */
9212         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
9213                 return PCI_ERS_RESULT_DISCONNECT;
9214
9215         rtnl_lock();
9216         netif_device_detach(netdev);
9217
9218         if (state == pci_channel_io_perm_failure) {
9219                 rtnl_unlock();
9220                 return PCI_ERS_RESULT_DISCONNECT;
9221         }
9222
9223         if (netif_running(netdev))
9224                 ixgbe_down(adapter);
9225
9226         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
9227                 pci_disable_device(pdev);
9228         rtnl_unlock();
9229
9230         /* Request a slot reset. */
9231         return PCI_ERS_RESULT_NEED_RESET;
9232 }
9233
9234 /**
9235  * ixgbe_io_slot_reset - called after the pci bus has been reset.
9236  * @pdev: Pointer to PCI device
9237  *
9238  * Restart the card from scratch, as if from a cold-boot.
9239  */
9240 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
9241 {
9242         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9243         pci_ers_result_t result;
9244         int err;
9245
9246         if (pci_enable_device_mem(pdev)) {
9247                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
9248                 result = PCI_ERS_RESULT_DISCONNECT;
9249         } else {
9250                 smp_mb__before_atomic();
9251                 clear_bit(__IXGBE_DISABLED, &adapter->state);
9252                 adapter->hw.hw_addr = adapter->io_addr;
9253                 pci_set_master(pdev);
9254                 pci_restore_state(pdev);
9255                 pci_save_state(pdev);
9256
9257                 pci_wake_from_d3(pdev, false);
9258
9259                 ixgbe_reset(adapter);
9260                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9261                 result = PCI_ERS_RESULT_RECOVERED;
9262         }
9263
9264         err = pci_cleanup_aer_uncorrect_error_status(pdev);
9265         if (err) {
9266                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9267                           "failed 0x%0x\n", err);
9268                 /* non-fatal, continue */
9269         }
9270
9271         return result;
9272 }
9273
9274 /**
9275  * ixgbe_io_resume - called when traffic can start flowing again.
9276  * @pdev: Pointer to PCI device
9277  *
9278  * This callback is called when the error recovery driver tells us that
9279  * its OK to resume normal operation.
9280  */
9281 static void ixgbe_io_resume(struct pci_dev *pdev)
9282 {
9283         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9284         struct net_device *netdev = adapter->netdev;
9285
9286 #ifdef CONFIG_PCI_IOV
9287         if (adapter->vferr_refcount) {
9288                 e_info(drv, "Resuming after VF err\n");
9289                 adapter->vferr_refcount--;
9290                 return;
9291         }
9292
9293 #endif
9294         if (netif_running(netdev))
9295                 ixgbe_up(adapter);
9296
9297         netif_device_attach(netdev);
9298 }
9299
9300 static const struct pci_error_handlers ixgbe_err_handler = {
9301         .error_detected = ixgbe_io_error_detected,
9302         .slot_reset = ixgbe_io_slot_reset,
9303         .resume = ixgbe_io_resume,
9304 };
9305
9306 static struct pci_driver ixgbe_driver = {
9307         .name     = ixgbe_driver_name,
9308         .id_table = ixgbe_pci_tbl,
9309         .probe    = ixgbe_probe,
9310         .remove   = ixgbe_remove,
9311 #ifdef CONFIG_PM
9312         .suspend  = ixgbe_suspend,
9313         .resume   = ixgbe_resume,
9314 #endif
9315         .shutdown = ixgbe_shutdown,
9316         .sriov_configure = ixgbe_pci_sriov_configure,
9317         .err_handler = &ixgbe_err_handler
9318 };
9319
9320 /**
9321  * ixgbe_init_module - Driver Registration Routine
9322  *
9323  * ixgbe_init_module is the first routine called when the driver is
9324  * loaded. All it does is register with the PCI subsystem.
9325  **/
9326 static int __init ixgbe_init_module(void)
9327 {
9328         int ret;
9329         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
9330         pr_info("%s\n", ixgbe_copyright);
9331
9332         ixgbe_dbg_init();
9333
9334         ret = pci_register_driver(&ixgbe_driver);
9335         if (ret) {
9336                 ixgbe_dbg_exit();
9337                 return ret;
9338         }
9339
9340 #ifdef CONFIG_IXGBE_DCA
9341         dca_register_notify(&dca_notifier);
9342 #endif
9343
9344         return 0;
9345 }
9346
9347 module_init(ixgbe_init_module);
9348
9349 /**
9350  * ixgbe_exit_module - Driver Exit Cleanup Routine
9351  *
9352  * ixgbe_exit_module is called just before the driver is removed
9353  * from memory.
9354  **/
9355 static void __exit ixgbe_exit_module(void)
9356 {
9357 #ifdef CONFIG_IXGBE_DCA
9358         dca_unregister_notify(&dca_notifier);
9359 #endif
9360         pci_unregister_driver(&ixgbe_driver);
9361
9362         ixgbe_dbg_exit();
9363 }
9364
9365 #ifdef CONFIG_IXGBE_DCA
9366 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
9367                             void *p)
9368 {
9369         int ret_val;
9370
9371         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
9372                                          __ixgbe_notify_dca);
9373
9374         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
9375 }
9376
9377 #endif /* CONFIG_IXGBE_DCA */
9378
9379 module_exit(ixgbe_exit_module);
9380
9381 /* ixgbe_main.c */