1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 46
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
85 /* required last entry */
88 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
90 #define I40E_MAX_VF_COUNT 128
91 static int debug = -1;
92 module_param(debug, int, 0);
93 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
95 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
96 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION);
101 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
102 * @hw: pointer to the HW structure
103 * @mem: ptr to mem struct to fill out
104 * @size: size of memory requested
105 * @alignment: what to align the allocation to
107 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
108 u64 size, u32 alignment)
110 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
112 mem->size = ALIGN(size, alignment);
113 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
114 &mem->pa, GFP_KERNEL);
122 * i40e_free_dma_mem_d - OS specific memory free for shared code
123 * @hw: pointer to the HW structure
124 * @mem: ptr to mem struct to free
126 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
128 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
130 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
139 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
140 * @hw: pointer to the HW structure
141 * @mem: ptr to mem struct to fill out
142 * @size: size of memory requested
144 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
148 mem->va = kzalloc(size, GFP_KERNEL);
157 * i40e_free_virt_mem_d - OS specific memory free for shared code
158 * @hw: pointer to the HW structure
159 * @mem: ptr to mem struct to free
161 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
163 /* it's ok to kfree a NULL pointer */
172 * i40e_get_lump - find a lump of free generic resource
173 * @pf: board private structure
174 * @pile: the pile of resource to search
175 * @needed: the number of items needed
176 * @id: an owner id to stick on the items assigned
178 * Returns the base item index of the lump, or negative for error
180 * The search_hint trick and lack of advanced fit-finding only work
181 * because we're highly likely to have all the same size lump requests.
182 * Linear search time and any fragmentation should be minimal.
184 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
190 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
191 dev_info(&pf->pdev->dev,
192 "param err: pile=%p needed=%d id=0x%04x\n",
197 /* start the linear search with an imperfect hint */
198 i = pile->search_hint;
199 while (i < pile->num_entries) {
200 /* skip already allocated entries */
201 if (pile->list[i] & I40E_PILE_VALID_BIT) {
206 /* do we have enough in this lump? */
207 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
208 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
213 /* there was enough, so assign it to the requestor */
214 for (j = 0; j < needed; j++)
215 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
217 pile->search_hint = i + j;
221 /* not enough, so skip over it and continue looking */
229 * i40e_put_lump - return a lump of generic resource
230 * @pile: the pile of resource to search
231 * @index: the base item index
232 * @id: the owner id of the items assigned
234 * Returns the count of items in the lump
236 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
238 int valid_id = (id | I40E_PILE_VALID_BIT);
242 if (!pile || index >= pile->num_entries)
246 i < pile->num_entries && pile->list[i] == valid_id;
252 if (count && index < pile->search_hint)
253 pile->search_hint = index;
259 * i40e_find_vsi_from_id - searches for the vsi with the given id
260 * @pf - the pf structure to search for the vsi
261 * @id - id of the vsi it is searching for
263 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
267 for (i = 0; i < pf->num_alloc_vsi; i++)
268 if (pf->vsi[i] && (pf->vsi[i]->id == id))
275 * i40e_service_event_schedule - Schedule the service task to wake up
276 * @pf: board private structure
278 * If not already scheduled, this puts the task into the work queue
280 static void i40e_service_event_schedule(struct i40e_pf *pf)
282 if (!test_bit(__I40E_DOWN, &pf->state) &&
283 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
284 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
285 schedule_work(&pf->service_task);
289 * i40e_tx_timeout - Respond to a Tx Hang
290 * @netdev: network interface device structure
292 * If any port has noticed a Tx timeout, it is likely that the whole
293 * device is munged, not just the one netdev port, so go for the full
297 void i40e_tx_timeout(struct net_device *netdev)
299 static void i40e_tx_timeout(struct net_device *netdev)
302 struct i40e_netdev_priv *np = netdev_priv(netdev);
303 struct i40e_vsi *vsi = np->vsi;
304 struct i40e_pf *pf = vsi->back;
305 struct i40e_ring *tx_ring = NULL;
306 unsigned int i, hung_queue = 0;
309 pf->tx_timeout_count++;
311 /* find the stopped queue the same way the stack does */
312 for (i = 0; i < netdev->num_tx_queues; i++) {
313 struct netdev_queue *q;
314 unsigned long trans_start;
316 q = netdev_get_tx_queue(netdev, i);
317 trans_start = q->trans_start ? : netdev->trans_start;
318 if (netif_xmit_stopped(q) &&
320 (trans_start + netdev->watchdog_timeo))) {
326 if (i == netdev->num_tx_queues) {
327 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
329 /* now that we have an index, find the tx_ring struct */
330 for (i = 0; i < vsi->num_queue_pairs; i++) {
331 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
333 vsi->tx_rings[i]->queue_index) {
334 tx_ring = vsi->tx_rings[i];
341 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
342 pf->tx_timeout_recovery_level = 1; /* reset after some time */
343 else if (time_before(jiffies,
344 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
345 return; /* don't do any new action before the next timeout */
348 head = i40e_get_head(tx_ring);
349 /* Read interrupt register */
350 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
352 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
353 tx_ring->vsi->base_vector - 1));
355 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
357 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
358 vsi->seid, hung_queue, tx_ring->next_to_clean,
359 head, tx_ring->next_to_use,
360 readl(tx_ring->tail), val);
363 pf->tx_timeout_last_recovery = jiffies;
364 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
365 pf->tx_timeout_recovery_level, hung_queue);
367 switch (pf->tx_timeout_recovery_level) {
369 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
372 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
375 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
378 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
382 i40e_service_event_schedule(pf);
383 pf->tx_timeout_recovery_level++;
387 * i40e_release_rx_desc - Store the new tail and head values
388 * @rx_ring: ring to bump
389 * @val: new head index
391 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
393 rx_ring->next_to_use = val;
395 /* Force memory writes to complete before letting h/w
396 * know there are new descriptors to fetch. (Only
397 * applicable for weak-ordered memory model archs,
401 writel(val, rx_ring->tail);
405 * i40e_get_vsi_stats_struct - Get System Network Statistics
406 * @vsi: the VSI we care about
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
411 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
413 return &vsi->net_stats;
417 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
418 * @netdev: network interface device structure
420 * Returns the address of the device statistics structure.
421 * The statistics are actually updated from the service task.
424 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
425 struct net_device *netdev,
426 struct rtnl_link_stats64 *stats)
428 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
429 struct net_device *netdev,
430 struct rtnl_link_stats64 *stats)
433 struct i40e_netdev_priv *np = netdev_priv(netdev);
434 struct i40e_ring *tx_ring, *rx_ring;
435 struct i40e_vsi *vsi = np->vsi;
436 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
439 if (test_bit(__I40E_DOWN, &vsi->state))
446 for (i = 0; i < vsi->num_queue_pairs; i++) {
450 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
455 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
456 packets = tx_ring->stats.packets;
457 bytes = tx_ring->stats.bytes;
458 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
460 stats->tx_packets += packets;
461 stats->tx_bytes += bytes;
462 rx_ring = &tx_ring[1];
465 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
466 packets = rx_ring->stats.packets;
467 bytes = rx_ring->stats.bytes;
468 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
470 stats->rx_packets += packets;
471 stats->rx_bytes += bytes;
475 /* following stats updated by i40e_watchdog_subtask() */
476 stats->multicast = vsi_stats->multicast;
477 stats->tx_errors = vsi_stats->tx_errors;
478 stats->tx_dropped = vsi_stats->tx_dropped;
479 stats->rx_errors = vsi_stats->rx_errors;
480 stats->rx_dropped = vsi_stats->rx_dropped;
481 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
482 stats->rx_length_errors = vsi_stats->rx_length_errors;
488 * i40e_vsi_reset_stats - Resets all stats of the given vsi
489 * @vsi: the VSI to have its stats reset
491 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
493 struct rtnl_link_stats64 *ns;
499 ns = i40e_get_vsi_stats_struct(vsi);
500 memset(ns, 0, sizeof(*ns));
501 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
502 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
503 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
504 if (vsi->rx_rings && vsi->rx_rings[0]) {
505 for (i = 0; i < vsi->num_queue_pairs; i++) {
506 memset(&vsi->rx_rings[i]->stats, 0,
507 sizeof(vsi->rx_rings[i]->stats));
508 memset(&vsi->rx_rings[i]->rx_stats, 0,
509 sizeof(vsi->rx_rings[i]->rx_stats));
510 memset(&vsi->tx_rings[i]->stats, 0,
511 sizeof(vsi->tx_rings[i]->stats));
512 memset(&vsi->tx_rings[i]->tx_stats, 0,
513 sizeof(vsi->tx_rings[i]->tx_stats));
516 vsi->stat_offsets_loaded = false;
520 * i40e_pf_reset_stats - Reset all of the stats for the given PF
521 * @pf: the PF to be reset
523 void i40e_pf_reset_stats(struct i40e_pf *pf)
527 memset(&pf->stats, 0, sizeof(pf->stats));
528 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
529 pf->stat_offsets_loaded = false;
531 for (i = 0; i < I40E_MAX_VEB; i++) {
533 memset(&pf->veb[i]->stats, 0,
534 sizeof(pf->veb[i]->stats));
535 memset(&pf->veb[i]->stats_offsets, 0,
536 sizeof(pf->veb[i]->stats_offsets));
537 pf->veb[i]->stat_offsets_loaded = false;
543 * i40e_stat_update48 - read and update a 48 bit stat from the chip
544 * @hw: ptr to the hardware info
545 * @hireg: the high 32 bit reg to read
546 * @loreg: the low 32 bit reg to read
547 * @offset_loaded: has the initial offset been loaded yet
548 * @offset: ptr to current offset value
549 * @stat: ptr to the stat
551 * Since the device stats are not reset at PFReset, they likely will not
552 * be zeroed when the driver starts. We'll save the first values read
553 * and use them as offsets to be subtracted from the raw values in order
554 * to report stats that count from zero. In the process, we also manage
555 * the potential roll-over.
557 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
558 bool offset_loaded, u64 *offset, u64 *stat)
562 if (hw->device_id == I40E_DEV_ID_QEMU) {
563 new_data = rd32(hw, loreg);
564 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
566 new_data = rd64(hw, loreg);
570 if (likely(new_data >= *offset))
571 *stat = new_data - *offset;
573 *stat = (new_data + BIT_ULL(48)) - *offset;
574 *stat &= 0xFFFFFFFFFFFFULL;
578 * i40e_stat_update32 - read and update a 32 bit stat from the chip
579 * @hw: ptr to the hardware info
580 * @reg: the hw reg to read
581 * @offset_loaded: has the initial offset been loaded yet
582 * @offset: ptr to current offset value
583 * @stat: ptr to the stat
585 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
586 bool offset_loaded, u64 *offset, u64 *stat)
590 new_data = rd32(hw, reg);
593 if (likely(new_data >= *offset))
594 *stat = (u32)(new_data - *offset);
596 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
600 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
601 * @vsi: the VSI to be updated
603 void i40e_update_eth_stats(struct i40e_vsi *vsi)
605 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
606 struct i40e_pf *pf = vsi->back;
607 struct i40e_hw *hw = &pf->hw;
608 struct i40e_eth_stats *oes;
609 struct i40e_eth_stats *es; /* device's eth stats */
611 es = &vsi->eth_stats;
612 oes = &vsi->eth_stats_offsets;
614 /* Gather up the stats that the hw collects */
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_discards, &es->rx_discards);
621 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
622 vsi->stat_offsets_loaded,
623 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
624 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->tx_errors, &es->tx_errors);
628 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
629 I40E_GLV_GORCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_bytes, &es->rx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
633 I40E_GLV_UPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_unicast, &es->rx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
637 I40E_GLV_MPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_multicast, &es->rx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
641 I40E_GLV_BPRCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->rx_broadcast, &es->rx_broadcast);
645 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
646 I40E_GLV_GOTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_bytes, &es->tx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
650 I40E_GLV_UPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_unicast, &es->tx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
654 I40E_GLV_MPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_multicast, &es->tx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
658 I40E_GLV_BPTCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->tx_broadcast, &es->tx_broadcast);
661 vsi->stat_offsets_loaded = true;
665 * i40e_update_veb_stats - Update Switch component statistics
666 * @veb: the VEB being updated
668 static void i40e_update_veb_stats(struct i40e_veb *veb)
670 struct i40e_pf *pf = veb->pf;
671 struct i40e_hw *hw = &pf->hw;
672 struct i40e_eth_stats *oes;
673 struct i40e_eth_stats *es; /* device's eth stats */
674 struct i40e_veb_tc_stats *veb_oes;
675 struct i40e_veb_tc_stats *veb_es;
678 idx = veb->stats_idx;
680 oes = &veb->stats_offsets;
681 veb_es = &veb->tc_stats;
682 veb_oes = &veb->tc_stats_offsets;
684 /* Gather up the stats that the hw collects */
685 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
686 veb->stat_offsets_loaded,
687 &oes->tx_discards, &es->tx_discards);
688 if (hw->revision_id > 0)
689 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_unknown_protocol,
692 &es->rx_unknown_protocol);
693 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_bytes, &es->rx_bytes);
696 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
697 veb->stat_offsets_loaded,
698 &oes->rx_unicast, &es->rx_unicast);
699 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
700 veb->stat_offsets_loaded,
701 &oes->rx_multicast, &es->rx_multicast);
702 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_broadcast, &es->rx_broadcast);
706 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_bytes, &es->tx_bytes);
709 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->tx_unicast, &es->tx_unicast);
712 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->tx_multicast, &es->tx_multicast);
715 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->tx_broadcast, &es->tx_broadcast);
718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
719 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
720 I40E_GLVEBTC_RPCL(i, idx),
721 veb->stat_offsets_loaded,
722 &veb_oes->tc_rx_packets[i],
723 &veb_es->tc_rx_packets[i]);
724 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
725 I40E_GLVEBTC_RBCL(i, idx),
726 veb->stat_offsets_loaded,
727 &veb_oes->tc_rx_bytes[i],
728 &veb_es->tc_rx_bytes[i]);
729 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
730 I40E_GLVEBTC_TPCL(i, idx),
731 veb->stat_offsets_loaded,
732 &veb_oes->tc_tx_packets[i],
733 &veb_es->tc_tx_packets[i]);
734 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
735 I40E_GLVEBTC_TBCL(i, idx),
736 veb->stat_offsets_loaded,
737 &veb_oes->tc_tx_bytes[i],
738 &veb_es->tc_tx_bytes[i]);
740 veb->stat_offsets_loaded = true;
745 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
746 * @vsi: the VSI that is capable of doing FCoE
748 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
750 struct i40e_pf *pf = vsi->back;
751 struct i40e_hw *hw = &pf->hw;
752 struct i40e_fcoe_stats *ofs;
753 struct i40e_fcoe_stats *fs; /* device's eth stats */
756 if (vsi->type != I40E_VSI_FCOE)
759 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
760 fs = &vsi->fcoe_stats;
761 ofs = &vsi->fcoe_stats_offsets;
763 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
772 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
775 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
778 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
779 vsi->fcoe_stat_offsets_loaded,
780 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
781 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
782 vsi->fcoe_stat_offsets_loaded,
783 &ofs->fcoe_last_error, &fs->fcoe_last_error);
784 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
785 vsi->fcoe_stat_offsets_loaded,
786 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
788 vsi->fcoe_stat_offsets_loaded = true;
793 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
794 * @pf: the corresponding PF
796 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
798 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
800 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
801 struct i40e_hw_port_stats *nsd = &pf->stats;
802 struct i40e_hw *hw = &pf->hw;
805 if ((hw->fc.current_mode != I40E_FC_FULL) &&
806 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
809 xoff = nsd->link_xoff_rx;
810 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
811 pf->stat_offsets_loaded,
812 &osd->link_xoff_rx, &nsd->link_xoff_rx);
814 /* No new LFC xoff rx */
815 if (!(nsd->link_xoff_rx - xoff))
821 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
822 * @pf: the corresponding PF
824 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
826 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
828 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
829 struct i40e_hw_port_stats *nsd = &pf->stats;
830 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
831 struct i40e_dcbx_config *dcb_cfg;
832 struct i40e_hw *hw = &pf->hw;
836 dcb_cfg = &hw->local_dcbx_config;
838 /* Collect Link XOFF stats when PFC is disabled */
839 if (!dcb_cfg->pfc.pfcenable) {
840 i40e_update_link_xoff_rx(pf);
844 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
845 u64 prio_xoff = nsd->priority_xoff_rx[i];
847 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
848 pf->stat_offsets_loaded,
849 &osd->priority_xoff_rx[i],
850 &nsd->priority_xoff_rx[i]);
852 /* No new PFC xoff rx */
853 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
855 /* Get the TC for given priority */
856 tc = dcb_cfg->etscfg.prioritytable[i];
862 * i40e_update_vsi_stats - Update the vsi statistics counters.
863 * @vsi: the VSI to be updated
865 * There are a few instances where we store the same stat in a
866 * couple of different structs. This is partly because we have
867 * the netdev stats that need to be filled out, which is slightly
868 * different from the "eth_stats" defined by the chip and used in
869 * VF communications. We sort it out here.
871 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
873 struct i40e_pf *pf = vsi->back;
874 struct rtnl_link_stats64 *ons;
875 struct rtnl_link_stats64 *ns; /* netdev stats */
876 struct i40e_eth_stats *oes;
877 struct i40e_eth_stats *es; /* device's eth stats */
878 u32 tx_restart, tx_busy;
888 if (test_bit(__I40E_DOWN, &vsi->state) ||
889 test_bit(__I40E_CONFIG_BUSY, &pf->state))
892 ns = i40e_get_vsi_stats_struct(vsi);
893 ons = &vsi->net_stats_offsets;
894 es = &vsi->eth_stats;
895 oes = &vsi->eth_stats_offsets;
897 /* Gather up the netdev and vsi stats that the driver collects
898 * on the fly during packet processing
902 tx_restart = tx_busy = tx_linearize = 0;
906 for (q = 0; q < vsi->num_queue_pairs; q++) {
908 p = ACCESS_ONCE(vsi->tx_rings[q]);
911 start = u64_stats_fetch_begin_irq(&p->syncp);
912 packets = p->stats.packets;
913 bytes = p->stats.bytes;
914 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
917 tx_restart += p->tx_stats.restart_queue;
918 tx_busy += p->tx_stats.tx_busy;
919 tx_linearize += p->tx_stats.tx_linearize;
921 /* Rx queue is part of the same block as Tx queue */
924 start = u64_stats_fetch_begin_irq(&p->syncp);
925 packets = p->stats.packets;
926 bytes = p->stats.bytes;
927 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
930 rx_buf += p->rx_stats.alloc_buff_failed;
931 rx_page += p->rx_stats.alloc_page_failed;
934 vsi->tx_restart = tx_restart;
935 vsi->tx_busy = tx_busy;
936 vsi->tx_linearize = tx_linearize;
937 vsi->rx_page_failed = rx_page;
938 vsi->rx_buf_failed = rx_buf;
940 ns->rx_packets = rx_p;
942 ns->tx_packets = tx_p;
945 /* update netdev stats from eth stats */
946 i40e_update_eth_stats(vsi);
947 ons->tx_errors = oes->tx_errors;
948 ns->tx_errors = es->tx_errors;
949 ons->multicast = oes->rx_multicast;
950 ns->multicast = es->rx_multicast;
951 ons->rx_dropped = oes->rx_discards;
952 ns->rx_dropped = es->rx_discards;
953 ons->tx_dropped = oes->tx_discards;
954 ns->tx_dropped = es->tx_discards;
956 /* pull in a couple PF stats if this is the main vsi */
957 if (vsi == pf->vsi[pf->lan_vsi]) {
958 ns->rx_crc_errors = pf->stats.crc_errors;
959 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
960 ns->rx_length_errors = pf->stats.rx_length_errors;
965 * i40e_update_pf_stats - Update the PF statistics counters.
966 * @pf: the PF to be updated
968 static void i40e_update_pf_stats(struct i40e_pf *pf)
970 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
971 struct i40e_hw_port_stats *nsd = &pf->stats;
972 struct i40e_hw *hw = &pf->hw;
976 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
977 I40E_GLPRT_GORCL(hw->port),
978 pf->stat_offsets_loaded,
979 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
980 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
981 I40E_GLPRT_GOTCL(hw->port),
982 pf->stat_offsets_loaded,
983 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
984 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
985 pf->stat_offsets_loaded,
986 &osd->eth.rx_discards,
987 &nsd->eth.rx_discards);
988 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
989 I40E_GLPRT_UPRCL(hw->port),
990 pf->stat_offsets_loaded,
991 &osd->eth.rx_unicast,
992 &nsd->eth.rx_unicast);
993 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
994 I40E_GLPRT_MPRCL(hw->port),
995 pf->stat_offsets_loaded,
996 &osd->eth.rx_multicast,
997 &nsd->eth.rx_multicast);
998 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
999 I40E_GLPRT_BPRCL(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->eth.rx_broadcast,
1002 &nsd->eth.rx_broadcast);
1003 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1004 I40E_GLPRT_UPTCL(hw->port),
1005 pf->stat_offsets_loaded,
1006 &osd->eth.tx_unicast,
1007 &nsd->eth.tx_unicast);
1008 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1009 I40E_GLPRT_MPTCL(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->eth.tx_multicast,
1012 &nsd->eth.tx_multicast);
1013 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1014 I40E_GLPRT_BPTCL(hw->port),
1015 pf->stat_offsets_loaded,
1016 &osd->eth.tx_broadcast,
1017 &nsd->eth.tx_broadcast);
1019 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->tx_dropped_link_down,
1022 &nsd->tx_dropped_link_down);
1024 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->crc_errors, &nsd->crc_errors);
1028 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->illegal_bytes, &nsd->illegal_bytes);
1032 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->mac_local_faults,
1035 &nsd->mac_local_faults);
1036 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1037 pf->stat_offsets_loaded,
1038 &osd->mac_remote_faults,
1039 &nsd->mac_remote_faults);
1041 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->rx_length_errors,
1044 &nsd->rx_length_errors);
1046 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->link_xon_rx, &nsd->link_xon_rx);
1049 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->link_xon_tx, &nsd->link_xon_tx);
1052 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1053 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1054 pf->stat_offsets_loaded,
1055 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1057 for (i = 0; i < 8; i++) {
1058 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1059 pf->stat_offsets_loaded,
1060 &osd->priority_xon_rx[i],
1061 &nsd->priority_xon_rx[i]);
1062 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1063 pf->stat_offsets_loaded,
1064 &osd->priority_xon_tx[i],
1065 &nsd->priority_xon_tx[i]);
1066 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1067 pf->stat_offsets_loaded,
1068 &osd->priority_xoff_tx[i],
1069 &nsd->priority_xoff_tx[i]);
1070 i40e_stat_update32(hw,
1071 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1072 pf->stat_offsets_loaded,
1073 &osd->priority_xon_2_xoff[i],
1074 &nsd->priority_xon_2_xoff[i]);
1077 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1078 I40E_GLPRT_PRC64L(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_size_64, &nsd->rx_size_64);
1081 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1082 I40E_GLPRT_PRC127L(hw->port),
1083 pf->stat_offsets_loaded,
1084 &osd->rx_size_127, &nsd->rx_size_127);
1085 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1086 I40E_GLPRT_PRC255L(hw->port),
1087 pf->stat_offsets_loaded,
1088 &osd->rx_size_255, &nsd->rx_size_255);
1089 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1090 I40E_GLPRT_PRC511L(hw->port),
1091 pf->stat_offsets_loaded,
1092 &osd->rx_size_511, &nsd->rx_size_511);
1093 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1094 I40E_GLPRT_PRC1023L(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_size_1023, &nsd->rx_size_1023);
1097 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1098 I40E_GLPRT_PRC1522L(hw->port),
1099 pf->stat_offsets_loaded,
1100 &osd->rx_size_1522, &nsd->rx_size_1522);
1101 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1102 I40E_GLPRT_PRC9522L(hw->port),
1103 pf->stat_offsets_loaded,
1104 &osd->rx_size_big, &nsd->rx_size_big);
1106 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1107 I40E_GLPRT_PTC64L(hw->port),
1108 pf->stat_offsets_loaded,
1109 &osd->tx_size_64, &nsd->tx_size_64);
1110 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1111 I40E_GLPRT_PTC127L(hw->port),
1112 pf->stat_offsets_loaded,
1113 &osd->tx_size_127, &nsd->tx_size_127);
1114 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1115 I40E_GLPRT_PTC255L(hw->port),
1116 pf->stat_offsets_loaded,
1117 &osd->tx_size_255, &nsd->tx_size_255);
1118 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1119 I40E_GLPRT_PTC511L(hw->port),
1120 pf->stat_offsets_loaded,
1121 &osd->tx_size_511, &nsd->tx_size_511);
1122 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1123 I40E_GLPRT_PTC1023L(hw->port),
1124 pf->stat_offsets_loaded,
1125 &osd->tx_size_1023, &nsd->tx_size_1023);
1126 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1127 I40E_GLPRT_PTC1522L(hw->port),
1128 pf->stat_offsets_loaded,
1129 &osd->tx_size_1522, &nsd->tx_size_1522);
1130 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1131 I40E_GLPRT_PTC9522L(hw->port),
1132 pf->stat_offsets_loaded,
1133 &osd->tx_size_big, &nsd->tx_size_big);
1135 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1136 pf->stat_offsets_loaded,
1137 &osd->rx_undersize, &nsd->rx_undersize);
1138 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1139 pf->stat_offsets_loaded,
1140 &osd->rx_fragments, &nsd->rx_fragments);
1141 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1142 pf->stat_offsets_loaded,
1143 &osd->rx_oversize, &nsd->rx_oversize);
1144 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1145 pf->stat_offsets_loaded,
1146 &osd->rx_jabber, &nsd->rx_jabber);
1149 i40e_stat_update32(hw,
1150 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1151 pf->stat_offsets_loaded,
1152 &osd->fd_atr_match, &nsd->fd_atr_match);
1153 i40e_stat_update32(hw,
1154 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1155 pf->stat_offsets_loaded,
1156 &osd->fd_sb_match, &nsd->fd_sb_match);
1157 i40e_stat_update32(hw,
1158 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1159 pf->stat_offsets_loaded,
1160 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1162 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1163 nsd->tx_lpi_status =
1164 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1165 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1166 nsd->rx_lpi_status =
1167 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1168 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1169 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1170 pf->stat_offsets_loaded,
1171 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1172 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1173 pf->stat_offsets_loaded,
1174 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1176 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1177 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1178 nsd->fd_sb_status = true;
1180 nsd->fd_sb_status = false;
1182 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1183 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1184 nsd->fd_atr_status = true;
1186 nsd->fd_atr_status = false;
1188 pf->stat_offsets_loaded = true;
1192 * i40e_update_stats - Update the various statistics counters.
1193 * @vsi: the VSI to be updated
1195 * Update the various stats for this VSI and its related entities.
1197 void i40e_update_stats(struct i40e_vsi *vsi)
1199 struct i40e_pf *pf = vsi->back;
1201 if (vsi == pf->vsi[pf->lan_vsi])
1202 i40e_update_pf_stats(pf);
1204 i40e_update_vsi_stats(vsi);
1206 i40e_update_fcoe_stats(vsi);
1211 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1212 * @vsi: the VSI to be searched
1213 * @macaddr: the MAC address
1215 * @is_vf: make sure its a VF filter, else doesn't matter
1216 * @is_netdev: make sure its a netdev filter, else doesn't matter
1218 * Returns ptr to the filter object or NULL
1220 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1221 u8 *macaddr, s16 vlan,
1222 bool is_vf, bool is_netdev)
1224 struct i40e_mac_filter *f;
1226 if (!vsi || !macaddr)
1229 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1230 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1231 (vlan == f->vlan) &&
1232 (!is_vf || f->is_vf) &&
1233 (!is_netdev || f->is_netdev))
1240 * i40e_find_mac - Find a mac addr in the macvlan filters list
1241 * @vsi: the VSI to be searched
1242 * @macaddr: the MAC address we are searching for
1243 * @is_vf: make sure its a VF filter, else doesn't matter
1244 * @is_netdev: make sure its a netdev filter, else doesn't matter
1246 * Returns the first filter with the provided MAC address or NULL if
1247 * MAC address was not found
1249 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1250 bool is_vf, bool is_netdev)
1252 struct i40e_mac_filter *f;
1254 if (!vsi || !macaddr)
1257 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1258 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1259 (!is_vf || f->is_vf) &&
1260 (!is_netdev || f->is_netdev))
1267 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1268 * @vsi: the VSI to be searched
1270 * Returns true if VSI is in vlan mode or false otherwise
1272 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1274 struct i40e_mac_filter *f;
1276 /* Only -1 for all the filters denotes not in vlan mode
1277 * so we have to go through all the list in order to make sure
1279 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1280 if (f->vlan >= 0 || vsi->info.pvid)
1288 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1289 * @vsi: the VSI to be searched
1290 * @macaddr: the mac address to be filtered
1291 * @is_vf: true if it is a VF
1292 * @is_netdev: true if it is a netdev
1294 * Goes through all the macvlan filters and adds a
1295 * macvlan filter for each unique vlan that already exists
1297 * Returns first filter found on success, else NULL
1299 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1300 bool is_vf, bool is_netdev)
1302 struct i40e_mac_filter *f;
1304 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1306 f->vlan = le16_to_cpu(vsi->info.pvid);
1307 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1308 is_vf, is_netdev)) {
1309 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1315 return list_first_entry_or_null(&vsi->mac_filter_list,
1316 struct i40e_mac_filter, list);
1320 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1321 * @vsi: the VSI to be searched
1322 * @macaddr: the mac address to be removed
1323 * @is_vf: true if it is a VF
1324 * @is_netdev: true if it is a netdev
1326 * Removes a given MAC address from a VSI, regardless of VLAN
1328 * Returns 0 for success, or error
1330 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1331 bool is_vf, bool is_netdev)
1333 struct i40e_mac_filter *f = NULL;
1336 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1337 "Missing mac_filter_list_lock\n");
1338 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1339 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1340 (is_vf == f->is_vf) &&
1341 (is_netdev == f->is_netdev)) {
1348 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1349 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1356 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1357 * @vsi: the PF Main VSI - inappropriate for any other VSI
1358 * @macaddr: the MAC address
1360 * Some older firmware configurations set up a default promiscuous VLAN
1361 * filter that needs to be removed.
1363 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1365 struct i40e_aqc_remove_macvlan_element_data element;
1366 struct i40e_pf *pf = vsi->back;
1369 /* Only appropriate for the PF main VSI */
1370 if (vsi->type != I40E_VSI_MAIN)
1373 memset(&element, 0, sizeof(element));
1374 ether_addr_copy(element.mac_addr, macaddr);
1375 element.vlan_tag = 0;
1376 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1377 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1378 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1386 * i40e_add_filter - Add a mac/vlan filter to the VSI
1387 * @vsi: the VSI to be searched
1388 * @macaddr: the MAC address
1390 * @is_vf: make sure its a VF filter, else doesn't matter
1391 * @is_netdev: make sure its a netdev filter, else doesn't matter
1393 * Returns ptr to the filter object or NULL when no memory available.
1395 * NOTE: This function is expected to be called with mac_filter_list_lock
1398 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1399 u8 *macaddr, s16 vlan,
1400 bool is_vf, bool is_netdev)
1402 struct i40e_mac_filter *f;
1404 if (!vsi || !macaddr)
1407 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1409 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1411 goto add_filter_out;
1413 ether_addr_copy(f->macaddr, macaddr);
1417 INIT_LIST_HEAD(&f->list);
1418 list_add(&f->list, &vsi->mac_filter_list);
1421 /* increment counter and add a new flag if needed */
1427 } else if (is_netdev) {
1428 if (!f->is_netdev) {
1429 f->is_netdev = true;
1436 /* changed tells sync_filters_subtask to
1437 * push the filter down to the firmware
1440 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1441 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1449 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1450 * @vsi: the VSI to be searched
1451 * @macaddr: the MAC address
1453 * @is_vf: make sure it's a VF filter, else doesn't matter
1454 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1456 * NOTE: This function is expected to be called with mac_filter_list_lock
1459 void i40e_del_filter(struct i40e_vsi *vsi,
1460 u8 *macaddr, s16 vlan,
1461 bool is_vf, bool is_netdev)
1463 struct i40e_mac_filter *f;
1465 if (!vsi || !macaddr)
1468 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1469 if (!f || f->counter == 0)
1477 } else if (is_netdev) {
1479 f->is_netdev = false;
1483 /* make sure we don't remove a filter in use by VF or netdev */
1486 min_f += (f->is_vf ? 1 : 0);
1487 min_f += (f->is_netdev ? 1 : 0);
1489 if (f->counter > min_f)
1493 /* counter == 0 tells sync_filters_subtask to
1494 * remove the filter from the firmware's list
1496 if (f->counter == 0) {
1498 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1499 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1504 * i40e_set_mac - NDO callback to set mac address
1505 * @netdev: network interface device structure
1506 * @p: pointer to an address structure
1508 * Returns 0 on success, negative on failure
1511 int i40e_set_mac(struct net_device *netdev, void *p)
1513 static int i40e_set_mac(struct net_device *netdev, void *p)
1516 struct i40e_netdev_priv *np = netdev_priv(netdev);
1517 struct i40e_vsi *vsi = np->vsi;
1518 struct i40e_pf *pf = vsi->back;
1519 struct i40e_hw *hw = &pf->hw;
1520 struct sockaddr *addr = p;
1521 struct i40e_mac_filter *f;
1523 if (!is_valid_ether_addr(addr->sa_data))
1524 return -EADDRNOTAVAIL;
1526 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1527 netdev_info(netdev, "already using mac address %pM\n",
1532 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1533 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1534 return -EADDRNOTAVAIL;
1536 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1537 netdev_info(netdev, "returning to hw mac address %pM\n",
1540 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1542 if (vsi->type == I40E_VSI_MAIN) {
1545 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1546 I40E_AQC_WRITE_TYPE_LAA_WOL,
1547 addr->sa_data, NULL);
1550 "Addr change for Main VSI failed: %d\n",
1552 return -EADDRNOTAVAIL;
1556 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1557 struct i40e_aqc_remove_macvlan_element_data element;
1559 memset(&element, 0, sizeof(element));
1560 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1561 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1562 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1564 spin_lock_bh(&vsi->mac_filter_list_lock);
1565 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1567 spin_unlock_bh(&vsi->mac_filter_list_lock);
1570 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1571 struct i40e_aqc_add_macvlan_element_data element;
1573 memset(&element, 0, sizeof(element));
1574 ether_addr_copy(element.mac_addr, hw->mac.addr);
1575 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1576 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1578 spin_lock_bh(&vsi->mac_filter_list_lock);
1579 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1583 spin_unlock_bh(&vsi->mac_filter_list_lock);
1586 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1587 /* schedule our worker thread which will take care of
1588 * applying the new filter changes
1590 i40e_service_event_schedule(vsi->back);
1595 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1596 * @vsi: the VSI being setup
1597 * @ctxt: VSI context structure
1598 * @enabled_tc: Enabled TCs bitmap
1599 * @is_add: True if called before Add VSI
1601 * Setup VSI queue mapping for enabled traffic classes.
1604 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1605 struct i40e_vsi_context *ctxt,
1609 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1610 struct i40e_vsi_context *ctxt,
1615 struct i40e_pf *pf = vsi->back;
1625 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1628 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1629 /* Find numtc from enabled TC bitmap */
1630 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1631 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1635 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1639 /* At least TC0 is enabled in case of non-DCB case */
1643 vsi->tc_config.numtc = numtc;
1644 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1645 /* Number of queues per enabled TC */
1646 /* In MFP case we can have a much lower count of MSIx
1647 * vectors available and so we need to lower the used
1650 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1651 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1653 qcount = vsi->alloc_queue_pairs;
1654 num_tc_qps = qcount / numtc;
1655 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1657 /* Setup queue offset/count for all TCs for given VSI */
1658 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1659 /* See if the given TC is enabled for the given VSI */
1660 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1664 switch (vsi->type) {
1666 qcount = min_t(int, pf->rss_size, num_tc_qps);
1670 qcount = num_tc_qps;
1674 case I40E_VSI_SRIOV:
1675 case I40E_VSI_VMDQ2:
1677 qcount = num_tc_qps;
1681 vsi->tc_config.tc_info[i].qoffset = offset;
1682 vsi->tc_config.tc_info[i].qcount = qcount;
1684 /* find the next higher power-of-2 of num queue pairs */
1687 while (num_qps && (BIT_ULL(pow) < qcount)) {
1692 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1694 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1695 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1699 /* TC is not enabled so set the offset to
1700 * default queue and allocate one queue
1703 vsi->tc_config.tc_info[i].qoffset = 0;
1704 vsi->tc_config.tc_info[i].qcount = 1;
1705 vsi->tc_config.tc_info[i].netdev_tc = 0;
1709 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1712 /* Set actual Tx/Rx queue pairs */
1713 vsi->num_queue_pairs = offset;
1714 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1715 if (vsi->req_queue_pairs > 0)
1716 vsi->num_queue_pairs = vsi->req_queue_pairs;
1717 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1718 vsi->num_queue_pairs = pf->num_lan_msix;
1721 /* Scheduler section valid can only be set for ADD VSI */
1723 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1725 ctxt->info.up_enable_bits = enabled_tc;
1727 if (vsi->type == I40E_VSI_SRIOV) {
1728 ctxt->info.mapping_flags |=
1729 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1730 for (i = 0; i < vsi->num_queue_pairs; i++)
1731 ctxt->info.queue_mapping[i] =
1732 cpu_to_le16(vsi->base_queue + i);
1734 ctxt->info.mapping_flags |=
1735 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1736 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1738 ctxt->info.valid_sections |= cpu_to_le16(sections);
1742 * i40e_set_rx_mode - NDO callback to set the netdev filters
1743 * @netdev: network interface device structure
1746 void i40e_set_rx_mode(struct net_device *netdev)
1748 static void i40e_set_rx_mode(struct net_device *netdev)
1751 struct i40e_netdev_priv *np = netdev_priv(netdev);
1752 struct i40e_mac_filter *f, *ftmp;
1753 struct i40e_vsi *vsi = np->vsi;
1754 struct netdev_hw_addr *uca;
1755 struct netdev_hw_addr *mca;
1756 struct netdev_hw_addr *ha;
1758 spin_lock_bh(&vsi->mac_filter_list_lock);
1760 /* add addr if not already in the filter list */
1761 netdev_for_each_uc_addr(uca, netdev) {
1762 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1763 if (i40e_is_vsi_in_vlan(vsi))
1764 i40e_put_mac_in_vlan(vsi, uca->addr,
1767 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1772 netdev_for_each_mc_addr(mca, netdev) {
1773 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1774 if (i40e_is_vsi_in_vlan(vsi))
1775 i40e_put_mac_in_vlan(vsi, mca->addr,
1778 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1783 /* remove filter if not in netdev list */
1784 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1789 netdev_for_each_mc_addr(mca, netdev)
1790 if (ether_addr_equal(mca->addr, f->macaddr))
1791 goto bottom_of_search_loop;
1793 netdev_for_each_uc_addr(uca, netdev)
1794 if (ether_addr_equal(uca->addr, f->macaddr))
1795 goto bottom_of_search_loop;
1797 for_each_dev_addr(netdev, ha)
1798 if (ether_addr_equal(ha->addr, f->macaddr))
1799 goto bottom_of_search_loop;
1801 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1802 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1804 bottom_of_search_loop:
1807 spin_unlock_bh(&vsi->mac_filter_list_lock);
1809 /* check for other flag changes */
1810 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1811 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1812 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1817 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1818 * @src: source MAC filter entry to be clones
1820 * Returns the pointer to newly cloned MAC filter entry or NULL
1823 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1824 struct i40e_mac_filter *src)
1826 struct i40e_mac_filter *f;
1828 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1833 INIT_LIST_HEAD(&f->list);
1839 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1840 * @vsi: pointer to vsi struct
1841 * @from: Pointer to list which contains MAC filter entries - changes to
1842 * those entries needs to be undone.
1844 * MAC filter entries from list were slated to be removed from device.
1846 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1847 struct list_head *from)
1849 struct i40e_mac_filter *f, *ftmp;
1851 list_for_each_entry_safe(f, ftmp, from, list) {
1853 /* Move the element back into MAC filter list*/
1854 list_move_tail(&f->list, &vsi->mac_filter_list);
1859 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1860 * @vsi: pointer to vsi struct
1862 * MAC filter entries from list were slated to be added from device.
1864 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1866 struct i40e_mac_filter *f, *ftmp;
1868 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1869 if (!f->changed && f->counter)
1875 * i40e_cleanup_add_list - Deletes the element from add list and release
1877 * @add_list: Pointer to list which contains MAC filter entries
1879 static void i40e_cleanup_add_list(struct list_head *add_list)
1881 struct i40e_mac_filter *f, *ftmp;
1883 list_for_each_entry_safe(f, ftmp, add_list, list) {
1890 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1891 * @vsi: ptr to the VSI
1892 * @grab_rtnl: whether RTNL needs to be grabbed
1894 * Push any outstanding VSI filter changes through the AdminQ.
1896 * Returns 0 or error value
1898 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1900 struct list_head tmp_del_list, tmp_add_list;
1901 struct i40e_mac_filter *f, *ftmp, *fclone;
1902 bool promisc_forced_on = false;
1903 bool add_happened = false;
1904 int filter_list_len = 0;
1905 u32 changed_flags = 0;
1906 bool err_cond = false;
1907 i40e_status ret = 0;
1914 /* empty array typed pointers, kcalloc later */
1915 struct i40e_aqc_add_macvlan_element_data *add_list;
1916 struct i40e_aqc_remove_macvlan_element_data *del_list;
1918 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1919 usleep_range(1000, 2000);
1923 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1924 vsi->current_netdev_flags = vsi->netdev->flags;
1927 INIT_LIST_HEAD(&tmp_del_list);
1928 INIT_LIST_HEAD(&tmp_add_list);
1930 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1931 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1933 spin_lock_bh(&vsi->mac_filter_list_lock);
1934 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1938 if (f->counter != 0)
1942 /* Move the element into temporary del_list */
1943 list_move_tail(&f->list, &tmp_del_list);
1946 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1950 if (f->counter == 0)
1954 /* Clone MAC filter entry and add into temporary list */
1955 fclone = i40e_mac_filter_entry_clone(f);
1960 list_add_tail(&fclone->list, &tmp_add_list);
1963 /* if failed to clone MAC filter entry - undo */
1965 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1966 i40e_undo_add_filter_entries(vsi);
1968 spin_unlock_bh(&vsi->mac_filter_list_lock);
1971 i40e_cleanup_add_list(&tmp_add_list);
1974 /* Now process 'del_list' outside the lock */
1975 if (!list_empty(&tmp_del_list)) {
1978 filter_list_len = pf->hw.aq.asq_buf_size /
1979 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1980 del_list_size = filter_list_len *
1981 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1982 del_list = kzalloc(del_list_size, GFP_KERNEL);
1984 i40e_cleanup_add_list(&tmp_add_list);
1986 /* Undo VSI's MAC filter entry element updates */
1987 spin_lock_bh(&vsi->mac_filter_list_lock);
1988 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1989 i40e_undo_add_filter_entries(vsi);
1990 spin_unlock_bh(&vsi->mac_filter_list_lock);
1994 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1997 /* add to delete list */
1998 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1999 del_list[num_del].vlan_tag =
2000 cpu_to_le16((u16)(f->vlan ==
2001 I40E_VLAN_ANY ? 0 : f->vlan));
2003 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2004 del_list[num_del].flags = cmd_flags;
2007 /* flush a full buffer */
2008 if (num_del == filter_list_len) {
2009 ret = i40e_aq_remove_macvlan(&pf->hw,
2010 vsi->seid, del_list, num_del,
2012 aq_err = pf->hw.aq.asq_last_status;
2014 memset(del_list, 0, del_list_size);
2016 if (ret && aq_err != I40E_AQ_RC_ENOENT)
2017 dev_err(&pf->pdev->dev,
2018 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
2019 i40e_stat_str(&pf->hw, ret),
2020 i40e_aq_str(&pf->hw, aq_err));
2022 /* Release memory for MAC filter entries which were
2023 * synced up with HW.
2030 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
2031 del_list, num_del, NULL);
2032 aq_err = pf->hw.aq.asq_last_status;
2035 if (ret && aq_err != I40E_AQ_RC_ENOENT)
2036 dev_info(&pf->pdev->dev,
2037 "ignoring delete macvlan error, err %s aq_err %s\n",
2038 i40e_stat_str(&pf->hw, ret),
2039 i40e_aq_str(&pf->hw, aq_err));
2046 if (!list_empty(&tmp_add_list)) {
2049 /* do all the adds now */
2050 filter_list_len = pf->hw.aq.asq_buf_size /
2051 sizeof(struct i40e_aqc_add_macvlan_element_data),
2052 add_list_size = filter_list_len *
2053 sizeof(struct i40e_aqc_add_macvlan_element_data);
2054 add_list = kzalloc(add_list_size, GFP_KERNEL);
2056 /* Purge element from temporary lists */
2057 i40e_cleanup_add_list(&tmp_add_list);
2059 /* Undo add filter entries from VSI MAC filter list */
2060 spin_lock_bh(&vsi->mac_filter_list_lock);
2061 i40e_undo_add_filter_entries(vsi);
2062 spin_unlock_bh(&vsi->mac_filter_list_lock);
2066 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2068 add_happened = true;
2071 /* add to add array */
2072 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2073 add_list[num_add].vlan_tag =
2075 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2076 add_list[num_add].queue_number = 0;
2078 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2079 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2082 /* flush a full buffer */
2083 if (num_add == filter_list_len) {
2084 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2087 aq_err = pf->hw.aq.asq_last_status;
2092 memset(add_list, 0, add_list_size);
2094 /* Entries from tmp_add_list were cloned from MAC
2095 * filter list, hence clean those cloned entries
2102 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2103 add_list, num_add, NULL);
2104 aq_err = pf->hw.aq.asq_last_status;
2110 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
2111 dev_info(&pf->pdev->dev,
2112 "add filter failed, err %s aq_err %s\n",
2113 i40e_stat_str(&pf->hw, ret),
2114 i40e_aq_str(&pf->hw, aq_err));
2115 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2116 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2118 promisc_forced_on = true;
2119 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2121 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2126 /* check for changes in promiscuous modes */
2127 if (changed_flags & IFF_ALLMULTI) {
2128 bool cur_multipromisc;
2130 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2131 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2136 dev_info(&pf->pdev->dev,
2137 "set multi promisc failed, err %s aq_err %s\n",
2138 i40e_stat_str(&pf->hw, ret),
2139 i40e_aq_str(&pf->hw,
2140 pf->hw.aq.asq_last_status));
2142 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2145 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2146 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2148 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
2149 /* set defport ON for Main VSI instead of true promisc
2150 * this way we will get all unicast/multicast and VLAN
2151 * promisc behavior but will not get VF or VMDq traffic
2152 * replicated on the Main VSI.
2154 if (pf->cur_promisc != cur_promisc) {
2155 pf->cur_promisc = cur_promisc;
2156 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2159 ret = i40e_aq_set_vsi_unicast_promiscuous(
2164 dev_info(&pf->pdev->dev,
2165 "set unicast promisc failed, err %d, aq_err %d\n",
2166 ret, pf->hw.aq.asq_last_status);
2167 ret = i40e_aq_set_vsi_multicast_promiscuous(
2172 dev_info(&pf->pdev->dev,
2173 "set multicast promisc failed, err %d, aq_err %d\n",
2174 ret, pf->hw.aq.asq_last_status);
2176 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2180 dev_info(&pf->pdev->dev,
2181 "set brdcast promisc failed, err %s, aq_err %s\n",
2182 i40e_stat_str(&pf->hw, ret),
2183 i40e_aq_str(&pf->hw,
2184 pf->hw.aq.asq_last_status));
2187 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2192 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2193 * @pf: board private structure
2195 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2199 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2201 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2203 for (v = 0; v < pf->num_alloc_vsi; v++) {
2205 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2206 i40e_sync_vsi_filters(pf->vsi[v], true);
2211 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2212 * @netdev: network interface device structure
2213 * @new_mtu: new value for maximum frame size
2215 * Returns 0 on success, negative on failure
2217 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2219 struct i40e_netdev_priv *np = netdev_priv(netdev);
2220 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2221 struct i40e_vsi *vsi = np->vsi;
2223 /* MTU < 68 is an error and causes problems on some kernels */
2224 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2227 netdev_info(netdev, "changing MTU from %d to %d\n",
2228 netdev->mtu, new_mtu);
2229 netdev->mtu = new_mtu;
2230 if (netif_running(netdev))
2231 i40e_vsi_reinit_locked(vsi);
2237 * i40e_ioctl - Access the hwtstamp interface
2238 * @netdev: network interface device structure
2239 * @ifr: interface request data
2240 * @cmd: ioctl command
2242 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2244 struct i40e_netdev_priv *np = netdev_priv(netdev);
2245 struct i40e_pf *pf = np->vsi->back;
2249 return i40e_ptp_get_ts_config(pf, ifr);
2251 return i40e_ptp_set_ts_config(pf, ifr);
2258 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2259 * @vsi: the vsi being adjusted
2261 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2263 struct i40e_vsi_context ctxt;
2266 if ((vsi->info.valid_sections &
2267 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2268 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2269 return; /* already enabled */
2271 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2272 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2273 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2275 ctxt.seid = vsi->seid;
2276 ctxt.info = vsi->info;
2277 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2279 dev_info(&vsi->back->pdev->dev,
2280 "update vlan stripping failed, err %s aq_err %s\n",
2281 i40e_stat_str(&vsi->back->hw, ret),
2282 i40e_aq_str(&vsi->back->hw,
2283 vsi->back->hw.aq.asq_last_status));
2288 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2289 * @vsi: the vsi being adjusted
2291 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2293 struct i40e_vsi_context ctxt;
2296 if ((vsi->info.valid_sections &
2297 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2298 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2299 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2300 return; /* already disabled */
2302 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2303 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2304 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2306 ctxt.seid = vsi->seid;
2307 ctxt.info = vsi->info;
2308 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2310 dev_info(&vsi->back->pdev->dev,
2311 "update vlan stripping failed, err %s aq_err %s\n",
2312 i40e_stat_str(&vsi->back->hw, ret),
2313 i40e_aq_str(&vsi->back->hw,
2314 vsi->back->hw.aq.asq_last_status));
2319 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2320 * @netdev: network interface to be adjusted
2321 * @features: netdev features to test if VLAN offload is enabled or not
2323 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2325 struct i40e_netdev_priv *np = netdev_priv(netdev);
2326 struct i40e_vsi *vsi = np->vsi;
2328 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2329 i40e_vlan_stripping_enable(vsi);
2331 i40e_vlan_stripping_disable(vsi);
2335 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2336 * @vsi: the vsi being configured
2337 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2339 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2341 struct i40e_mac_filter *f, *add_f;
2342 bool is_netdev, is_vf;
2344 is_vf = (vsi->type == I40E_VSI_SRIOV);
2345 is_netdev = !!(vsi->netdev);
2347 /* Locked once because all functions invoked below iterates list*/
2348 spin_lock_bh(&vsi->mac_filter_list_lock);
2351 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2354 dev_info(&vsi->back->pdev->dev,
2355 "Could not add vlan filter %d for %pM\n",
2356 vid, vsi->netdev->dev_addr);
2357 spin_unlock_bh(&vsi->mac_filter_list_lock);
2362 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2363 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2365 dev_info(&vsi->back->pdev->dev,
2366 "Could not add vlan filter %d for %pM\n",
2368 spin_unlock_bh(&vsi->mac_filter_list_lock);
2373 /* Now if we add a vlan tag, make sure to check if it is the first
2374 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2375 * with 0, so we now accept untagged and specified tagged traffic
2376 * (and not any taged and untagged)
2379 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2381 is_vf, is_netdev)) {
2382 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2383 I40E_VLAN_ANY, is_vf, is_netdev);
2384 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2387 dev_info(&vsi->back->pdev->dev,
2388 "Could not add filter 0 for %pM\n",
2389 vsi->netdev->dev_addr);
2390 spin_unlock_bh(&vsi->mac_filter_list_lock);
2396 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2397 if (vid > 0 && !vsi->info.pvid) {
2398 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2399 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2402 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2404 add_f = i40e_add_filter(vsi, f->macaddr,
2405 0, is_vf, is_netdev);
2407 dev_info(&vsi->back->pdev->dev,
2408 "Could not add filter 0 for %pM\n",
2410 spin_unlock_bh(&vsi->mac_filter_list_lock);
2416 spin_unlock_bh(&vsi->mac_filter_list_lock);
2418 /* schedule our worker thread which will take care of
2419 * applying the new filter changes
2421 i40e_service_event_schedule(vsi->back);
2426 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2427 * @vsi: the vsi being configured
2428 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2430 * Return: 0 on success or negative otherwise
2432 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2434 struct net_device *netdev = vsi->netdev;
2435 struct i40e_mac_filter *f, *add_f;
2436 bool is_vf, is_netdev;
2437 int filter_count = 0;
2439 is_vf = (vsi->type == I40E_VSI_SRIOV);
2440 is_netdev = !!(netdev);
2442 /* Locked once because all functions invoked below iterates list */
2443 spin_lock_bh(&vsi->mac_filter_list_lock);
2446 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2448 list_for_each_entry(f, &vsi->mac_filter_list, list)
2449 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2451 /* go through all the filters for this VSI and if there is only
2452 * vid == 0 it means there are no other filters, so vid 0 must
2453 * be replaced with -1. This signifies that we should from now
2454 * on accept any traffic (with any tag present, or untagged)
2456 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2459 ether_addr_equal(netdev->dev_addr, f->macaddr))
2467 if (!filter_count && is_netdev) {
2468 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2469 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2472 dev_info(&vsi->back->pdev->dev,
2473 "Could not add filter %d for %pM\n",
2474 I40E_VLAN_ANY, netdev->dev_addr);
2475 spin_unlock_bh(&vsi->mac_filter_list_lock);
2480 if (!filter_count) {
2481 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2482 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2483 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2486 dev_info(&vsi->back->pdev->dev,
2487 "Could not add filter %d for %pM\n",
2488 I40E_VLAN_ANY, f->macaddr);
2489 spin_unlock_bh(&vsi->mac_filter_list_lock);
2495 spin_unlock_bh(&vsi->mac_filter_list_lock);
2497 /* schedule our worker thread which will take care of
2498 * applying the new filter changes
2500 i40e_service_event_schedule(vsi->back);
2505 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2506 * @netdev: network interface to be adjusted
2507 * @vid: vlan id to be added
2509 * net_device_ops implementation for adding vlan ids
2512 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2513 __always_unused __be16 proto, u16 vid)
2515 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2516 __always_unused __be16 proto, u16 vid)
2519 struct i40e_netdev_priv *np = netdev_priv(netdev);
2520 struct i40e_vsi *vsi = np->vsi;
2526 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2528 /* If the network stack called us with vid = 0 then
2529 * it is asking to receive priority tagged packets with
2530 * vlan id 0. Our HW receives them by default when configured
2531 * to receive untagged packets so there is no need to add an
2532 * extra filter for vlan 0 tagged packets.
2535 ret = i40e_vsi_add_vlan(vsi, vid);
2537 if (!ret && (vid < VLAN_N_VID))
2538 set_bit(vid, vsi->active_vlans);
2544 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2545 * @netdev: network interface to be adjusted
2546 * @vid: vlan id to be removed
2548 * net_device_ops implementation for removing vlan ids
2551 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2552 __always_unused __be16 proto, u16 vid)
2554 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2555 __always_unused __be16 proto, u16 vid)
2558 struct i40e_netdev_priv *np = netdev_priv(netdev);
2559 struct i40e_vsi *vsi = np->vsi;
2561 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2563 /* return code is ignored as there is nothing a user
2564 * can do about failure to remove and a log message was
2565 * already printed from the other function
2567 i40e_vsi_kill_vlan(vsi, vid);
2569 clear_bit(vid, vsi->active_vlans);
2575 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2576 * @vsi: the vsi being brought back up
2578 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2585 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2587 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2588 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2593 * i40e_vsi_add_pvid - Add pvid for the VSI
2594 * @vsi: the vsi being adjusted
2595 * @vid: the vlan id to set as a PVID
2597 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2599 struct i40e_vsi_context ctxt;
2602 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2603 vsi->info.pvid = cpu_to_le16(vid);
2604 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2605 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2606 I40E_AQ_VSI_PVLAN_EMOD_STR;
2608 ctxt.seid = vsi->seid;
2609 ctxt.info = vsi->info;
2610 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2612 dev_info(&vsi->back->pdev->dev,
2613 "add pvid failed, err %s aq_err %s\n",
2614 i40e_stat_str(&vsi->back->hw, ret),
2615 i40e_aq_str(&vsi->back->hw,
2616 vsi->back->hw.aq.asq_last_status));
2624 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2625 * @vsi: the vsi being adjusted
2627 * Just use the vlan_rx_register() service to put it back to normal
2629 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2631 i40e_vlan_stripping_disable(vsi);
2637 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2638 * @vsi: ptr to the VSI
2640 * If this function returns with an error, then it's possible one or
2641 * more of the rings is populated (while the rest are not). It is the
2642 * callers duty to clean those orphaned rings.
2644 * Return 0 on success, negative on failure
2646 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2650 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2651 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2657 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2658 * @vsi: ptr to the VSI
2660 * Free VSI's transmit software resources
2662 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2669 for (i = 0; i < vsi->num_queue_pairs; i++)
2670 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2671 i40e_free_tx_resources(vsi->tx_rings[i]);
2675 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2676 * @vsi: ptr to the VSI
2678 * If this function returns with an error, then it's possible one or
2679 * more of the rings is populated (while the rest are not). It is the
2680 * callers duty to clean those orphaned rings.
2682 * Return 0 on success, negative on failure
2684 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2688 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2689 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2691 i40e_fcoe_setup_ddp_resources(vsi);
2697 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2698 * @vsi: ptr to the VSI
2700 * Free all receive software resources
2702 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2709 for (i = 0; i < vsi->num_queue_pairs; i++)
2710 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2711 i40e_free_rx_resources(vsi->rx_rings[i]);
2713 i40e_fcoe_free_ddp_resources(vsi);
2718 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2719 * @ring: The Tx ring to configure
2721 * This enables/disables XPS for a given Tx descriptor ring
2722 * based on the TCs enabled for the VSI that ring belongs to.
2724 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2726 struct i40e_vsi *vsi = ring->vsi;
2729 if (!ring->q_vector || !ring->netdev)
2732 /* Single TC mode enable XPS */
2733 if (vsi->tc_config.numtc <= 1) {
2734 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2735 netif_set_xps_queue(ring->netdev,
2736 &ring->q_vector->affinity_mask,
2738 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2739 /* Disable XPS to allow selection based on TC */
2740 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2741 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2742 free_cpumask_var(mask);
2745 /* schedule our worker thread which will take care of
2746 * applying the new filter changes
2748 i40e_service_event_schedule(vsi->back);
2752 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2753 * @ring: The Tx ring to configure
2755 * Configure the Tx descriptor ring in the HMC context.
2757 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2759 struct i40e_vsi *vsi = ring->vsi;
2760 u16 pf_q = vsi->base_queue + ring->queue_index;
2761 struct i40e_hw *hw = &vsi->back->hw;
2762 struct i40e_hmc_obj_txq tx_ctx;
2763 i40e_status err = 0;
2766 /* some ATR related tx ring init */
2767 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2768 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2769 ring->atr_count = 0;
2771 ring->atr_sample_rate = 0;
2775 i40e_config_xps_tx_ring(ring);
2777 /* clear the context structure first */
2778 memset(&tx_ctx, 0, sizeof(tx_ctx));
2780 tx_ctx.new_context = 1;
2781 tx_ctx.base = (ring->dma / 128);
2782 tx_ctx.qlen = ring->count;
2783 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2784 I40E_FLAG_FD_ATR_ENABLED));
2786 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2788 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2789 /* FDIR VSI tx ring can still use RS bit and writebacks */
2790 if (vsi->type != I40E_VSI_FDIR)
2791 tx_ctx.head_wb_ena = 1;
2792 tx_ctx.head_wb_addr = ring->dma +
2793 (ring->count * sizeof(struct i40e_tx_desc));
2795 /* As part of VSI creation/update, FW allocates certain
2796 * Tx arbitration queue sets for each TC enabled for
2797 * the VSI. The FW returns the handles to these queue
2798 * sets as part of the response buffer to Add VSI,
2799 * Update VSI, etc. AQ commands. It is expected that
2800 * these queue set handles be associated with the Tx
2801 * queues by the driver as part of the TX queue context
2802 * initialization. This has to be done regardless of
2803 * DCB as by default everything is mapped to TC0.
2805 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2806 tx_ctx.rdylist_act = 0;
2808 /* clear the context in the HMC */
2809 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2811 dev_info(&vsi->back->pdev->dev,
2812 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2813 ring->queue_index, pf_q, err);
2817 /* set the context in the HMC */
2818 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2820 dev_info(&vsi->back->pdev->dev,
2821 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2822 ring->queue_index, pf_q, err);
2826 /* Now associate this queue with this PCI function */
2827 if (vsi->type == I40E_VSI_VMDQ2) {
2828 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2829 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2830 I40E_QTX_CTL_VFVM_INDX_MASK;
2832 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2835 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2836 I40E_QTX_CTL_PF_INDX_MASK);
2837 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2840 /* cache tail off for easier writes later */
2841 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2847 * i40e_configure_rx_ring - Configure a receive ring context
2848 * @ring: The Rx ring to configure
2850 * Configure the Rx descriptor ring in the HMC context.
2852 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2854 struct i40e_vsi *vsi = ring->vsi;
2855 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2856 u16 pf_q = vsi->base_queue + ring->queue_index;
2857 struct i40e_hw *hw = &vsi->back->hw;
2858 struct i40e_hmc_obj_rxq rx_ctx;
2859 i40e_status err = 0;
2863 /* clear the context structure first */
2864 memset(&rx_ctx, 0, sizeof(rx_ctx));
2866 ring->rx_buf_len = vsi->rx_buf_len;
2867 ring->rx_hdr_len = vsi->rx_hdr_len;
2869 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2870 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2872 rx_ctx.base = (ring->dma / 128);
2873 rx_ctx.qlen = ring->count;
2875 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2876 set_ring_16byte_desc_enabled(ring);
2882 rx_ctx.dtype = vsi->dtype;
2884 set_ring_ps_enabled(ring);
2885 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2887 I40E_RX_SPLIT_TCP_UDP |
2890 rx_ctx.hsplit_0 = 0;
2893 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2894 (chain_len * ring->rx_buf_len));
2895 if (hw->revision_id == 0)
2896 rx_ctx.lrxqthresh = 0;
2898 rx_ctx.lrxqthresh = 2;
2899 rx_ctx.crcstrip = 1;
2901 /* this controls whether VLAN is stripped from inner headers */
2904 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2906 /* set the prefena field to 1 because the manual says to */
2909 /* clear the context in the HMC */
2910 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2912 dev_info(&vsi->back->pdev->dev,
2913 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2914 ring->queue_index, pf_q, err);
2918 /* set the context in the HMC */
2919 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2921 dev_info(&vsi->back->pdev->dev,
2922 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2923 ring->queue_index, pf_q, err);
2927 /* cache tail for quicker writes, and clear the reg before use */
2928 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2929 writel(0, ring->tail);
2931 if (ring_is_ps_enabled(ring)) {
2932 i40e_alloc_rx_headers(ring);
2933 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2935 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2942 * i40e_vsi_configure_tx - Configure the VSI for Tx
2943 * @vsi: VSI structure describing this set of rings and resources
2945 * Configure the Tx VSI for operation.
2947 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2952 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2953 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2959 * i40e_vsi_configure_rx - Configure the VSI for Rx
2960 * @vsi: the VSI being configured
2962 * Configure the Rx VSI for operation.
2964 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2969 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2970 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2971 + ETH_FCS_LEN + VLAN_HLEN;
2973 vsi->max_frame = I40E_RXBUFFER_2048;
2975 /* figure out correct receive buffer length */
2976 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2977 I40E_FLAG_RX_PS_ENABLED)) {
2978 case I40E_FLAG_RX_1BUF_ENABLED:
2979 vsi->rx_hdr_len = 0;
2980 vsi->rx_buf_len = vsi->max_frame;
2981 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2983 case I40E_FLAG_RX_PS_ENABLED:
2984 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2985 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2986 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2989 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2990 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2991 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2996 /* setup rx buffer for FCoE */
2997 if ((vsi->type == I40E_VSI_FCOE) &&
2998 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2999 vsi->rx_hdr_len = 0;
3000 vsi->rx_buf_len = I40E_RXBUFFER_3072;
3001 vsi->max_frame = I40E_RXBUFFER_3072;
3002 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
3005 #endif /* I40E_FCOE */
3006 /* round up for the chip's needs */
3007 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
3008 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
3009 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
3010 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3012 /* set up individual rings */
3013 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3014 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3020 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3021 * @vsi: ptr to the VSI
3023 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3025 struct i40e_ring *tx_ring, *rx_ring;
3026 u16 qoffset, qcount;
3029 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3030 /* Reset the TC information */
3031 for (i = 0; i < vsi->num_queue_pairs; i++) {
3032 rx_ring = vsi->rx_rings[i];
3033 tx_ring = vsi->tx_rings[i];
3034 rx_ring->dcb_tc = 0;
3035 tx_ring->dcb_tc = 0;
3039 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3040 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3043 qoffset = vsi->tc_config.tc_info[n].qoffset;
3044 qcount = vsi->tc_config.tc_info[n].qcount;
3045 for (i = qoffset; i < (qoffset + qcount); i++) {
3046 rx_ring = vsi->rx_rings[i];
3047 tx_ring = vsi->tx_rings[i];
3048 rx_ring->dcb_tc = n;
3049 tx_ring->dcb_tc = n;
3055 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3056 * @vsi: ptr to the VSI
3058 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3061 i40e_set_rx_mode(vsi->netdev);
3065 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3066 * @vsi: Pointer to the targeted VSI
3068 * This function replays the hlist on the hw where all the SB Flow Director
3069 * filters were saved.
3071 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3073 struct i40e_fdir_filter *filter;
3074 struct i40e_pf *pf = vsi->back;
3075 struct hlist_node *node;
3077 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3080 hlist_for_each_entry_safe(filter, node,
3081 &pf->fdir_filter_list, fdir_node) {
3082 i40e_add_del_fdir(vsi, filter, true);
3087 * i40e_vsi_configure - Set up the VSI for action
3088 * @vsi: the VSI being configured
3090 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3094 i40e_set_vsi_rx_mode(vsi);
3095 i40e_restore_vlan(vsi);
3096 i40e_vsi_config_dcb_rings(vsi);
3097 err = i40e_vsi_configure_tx(vsi);
3099 err = i40e_vsi_configure_rx(vsi);
3105 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3106 * @vsi: the VSI being configured
3108 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3110 struct i40e_pf *pf = vsi->back;
3111 struct i40e_hw *hw = &pf->hw;
3116 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3117 * and PFINT_LNKLSTn registers, e.g.:
3118 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3120 qp = vsi->base_queue;
3121 vector = vsi->base_vector;
3122 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3123 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3125 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3126 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3127 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3128 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3130 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3131 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3132 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3134 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3135 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3137 /* Linked list for the queuepairs assigned to this vector */
3138 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3139 for (q = 0; q < q_vector->num_ringpairs; q++) {
3142 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3143 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3144 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3145 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3147 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3149 wr32(hw, I40E_QINT_RQCTL(qp), val);
3151 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3152 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3153 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3154 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3156 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3158 /* Terminate the linked list */
3159 if (q == (q_vector->num_ringpairs - 1))
3160 val |= (I40E_QUEUE_END_OF_LIST
3161 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3163 wr32(hw, I40E_QINT_TQCTL(qp), val);
3172 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3173 * @hw: ptr to the hardware info
3175 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3177 struct i40e_hw *hw = &pf->hw;
3180 /* clear things first */
3181 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3182 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3184 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3185 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3186 I40E_PFINT_ICR0_ENA_GRST_MASK |
3187 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3188 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3189 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3190 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3191 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3193 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3194 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3196 if (pf->flags & I40E_FLAG_PTP)
3197 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3199 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3201 /* SW_ITR_IDX = 0, but don't change INTENA */
3202 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3203 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3205 /* OTHER_ITR_IDX = 0 */
3206 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3210 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3211 * @vsi: the VSI being configured
3213 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3215 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3216 struct i40e_pf *pf = vsi->back;
3217 struct i40e_hw *hw = &pf->hw;
3220 /* set the ITR configuration */
3221 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3222 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3223 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3224 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3225 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3226 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3227 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3229 i40e_enable_misc_int_causes(pf);
3231 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3232 wr32(hw, I40E_PFINT_LNKLST0, 0);
3234 /* Associate the queue pair to the vector and enable the queue int */
3235 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3236 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3237 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3239 wr32(hw, I40E_QINT_RQCTL(0), val);
3241 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3242 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3243 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3245 wr32(hw, I40E_QINT_TQCTL(0), val);
3250 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3251 * @pf: board private structure
3253 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3255 struct i40e_hw *hw = &pf->hw;
3257 wr32(hw, I40E_PFINT_DYN_CTL0,
3258 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3263 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3264 * @pf: board private structure
3266 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3268 struct i40e_hw *hw = &pf->hw;
3271 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3272 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3273 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3275 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3280 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3281 * @vsi: pointer to a vsi
3282 * @vector: disable a particular Hw Interrupt vector
3284 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3286 struct i40e_pf *pf = vsi->back;
3287 struct i40e_hw *hw = &pf->hw;
3290 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3291 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3296 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3297 * @irq: interrupt number
3298 * @data: pointer to a q_vector
3300 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3302 struct i40e_q_vector *q_vector = data;
3304 if (!q_vector->tx.ring && !q_vector->rx.ring)
3307 napi_schedule_irqoff(&q_vector->napi);
3313 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3314 * @vsi: the VSI being configured
3315 * @basename: name for the vector
3317 * Allocates MSI-X vectors and requests interrupts from the kernel.
3319 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3321 int q_vectors = vsi->num_q_vectors;
3322 struct i40e_pf *pf = vsi->back;
3323 int base = vsi->base_vector;
3328 for (vector = 0; vector < q_vectors; vector++) {
3329 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3331 if (q_vector->tx.ring && q_vector->rx.ring) {
3332 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3333 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3335 } else if (q_vector->rx.ring) {
3336 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3337 "%s-%s-%d", basename, "rx", rx_int_idx++);
3338 } else if (q_vector->tx.ring) {
3339 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3340 "%s-%s-%d", basename, "tx", tx_int_idx++);
3342 /* skip this unused q_vector */
3345 err = request_irq(pf->msix_entries[base + vector].vector,
3351 dev_info(&pf->pdev->dev,
3352 "MSIX request_irq failed, error: %d\n", err);
3353 goto free_queue_irqs;
3355 /* assign the mask for this irq */
3356 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3357 &q_vector->affinity_mask);
3360 vsi->irqs_ready = true;
3366 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3368 free_irq(pf->msix_entries[base + vector].vector,
3369 &(vsi->q_vectors[vector]));
3375 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3376 * @vsi: the VSI being un-configured
3378 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3380 struct i40e_pf *pf = vsi->back;
3381 struct i40e_hw *hw = &pf->hw;
3382 int base = vsi->base_vector;
3385 for (i = 0; i < vsi->num_queue_pairs; i++) {
3386 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3387 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3390 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3391 for (i = vsi->base_vector;
3392 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3393 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3396 for (i = 0; i < vsi->num_q_vectors; i++)
3397 synchronize_irq(pf->msix_entries[i + base].vector);
3399 /* Legacy and MSI mode - this stops all interrupt handling */
3400 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3401 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3403 synchronize_irq(pf->pdev->irq);
3408 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3409 * @vsi: the VSI being configured
3411 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3413 struct i40e_pf *pf = vsi->back;
3416 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3417 for (i = 0; i < vsi->num_q_vectors; i++)
3418 i40e_irq_dynamic_enable(vsi, i);
3420 i40e_irq_dynamic_enable_icr0(pf);
3423 i40e_flush(&pf->hw);
3428 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3429 * @pf: board private structure
3431 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3434 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3435 i40e_flush(&pf->hw);
3439 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3440 * @irq: interrupt number
3441 * @data: pointer to a q_vector
3443 * This is the handler used for all MSI/Legacy interrupts, and deals
3444 * with both queue and non-queue interrupts. This is also used in
3445 * MSIX mode to handle the non-queue interrupts.
3447 static irqreturn_t i40e_intr(int irq, void *data)
3449 struct i40e_pf *pf = (struct i40e_pf *)data;
3450 struct i40e_hw *hw = &pf->hw;
3451 irqreturn_t ret = IRQ_NONE;
3452 u32 icr0, icr0_remaining;
3455 icr0 = rd32(hw, I40E_PFINT_ICR0);
3456 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3458 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3459 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3462 /* if interrupt but no bits showing, must be SWINT */
3463 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3464 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3467 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3468 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3469 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3470 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3471 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3474 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3475 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3476 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3477 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3479 /* temporarily disable queue cause for NAPI processing */
3480 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3482 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3483 wr32(hw, I40E_QINT_RQCTL(0), qval);
3485 qval = rd32(hw, I40E_QINT_TQCTL(0));
3486 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3487 wr32(hw, I40E_QINT_TQCTL(0), qval);
3489 if (!test_bit(__I40E_DOWN, &pf->state))
3490 napi_schedule_irqoff(&q_vector->napi);
3493 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3494 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3495 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3498 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3499 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3500 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3503 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3504 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3505 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3508 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3509 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3510 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3511 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3512 val = rd32(hw, I40E_GLGEN_RSTAT);
3513 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3514 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3515 if (val == I40E_RESET_CORER) {
3517 } else if (val == I40E_RESET_GLOBR) {
3519 } else if (val == I40E_RESET_EMPR) {
3521 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3525 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3526 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3527 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3528 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3529 rd32(hw, I40E_PFHMC_ERRORINFO),
3530 rd32(hw, I40E_PFHMC_ERRORDATA));
3533 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3534 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3536 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3537 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3538 i40e_ptp_tx_hwtstamp(pf);
3542 /* If a critical error is pending we have no choice but to reset the
3544 * Report and mask out any remaining unexpected interrupts.
3546 icr0_remaining = icr0 & ena_mask;
3547 if (icr0_remaining) {
3548 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3550 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3551 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3552 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3553 dev_info(&pf->pdev->dev, "device will be reset\n");
3554 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3555 i40e_service_event_schedule(pf);
3557 ena_mask &= ~icr0_remaining;
3562 /* re-enable interrupt causes */
3563 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3564 if (!test_bit(__I40E_DOWN, &pf->state)) {
3565 i40e_service_event_schedule(pf);
3566 i40e_irq_dynamic_enable_icr0(pf);
3573 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3574 * @tx_ring: tx ring to clean
3575 * @budget: how many cleans we're allowed
3577 * Returns true if there's any budget left (e.g. the clean is finished)
3579 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3581 struct i40e_vsi *vsi = tx_ring->vsi;
3582 u16 i = tx_ring->next_to_clean;
3583 struct i40e_tx_buffer *tx_buf;
3584 struct i40e_tx_desc *tx_desc;
3586 tx_buf = &tx_ring->tx_bi[i];
3587 tx_desc = I40E_TX_DESC(tx_ring, i);
3588 i -= tx_ring->count;
3591 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3593 /* if next_to_watch is not set then there is no work pending */
3597 /* prevent any other reads prior to eop_desc */
3598 read_barrier_depends();
3600 /* if the descriptor isn't done, no work yet to do */
3601 if (!(eop_desc->cmd_type_offset_bsz &
3602 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3605 /* clear next_to_watch to prevent false hangs */
3606 tx_buf->next_to_watch = NULL;
3608 tx_desc->buffer_addr = 0;
3609 tx_desc->cmd_type_offset_bsz = 0;
3610 /* move past filter desc */
3615 i -= tx_ring->count;
3616 tx_buf = tx_ring->tx_bi;
3617 tx_desc = I40E_TX_DESC(tx_ring, 0);
3619 /* unmap skb header data */
3620 dma_unmap_single(tx_ring->dev,
3621 dma_unmap_addr(tx_buf, dma),
3622 dma_unmap_len(tx_buf, len),
3624 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3625 kfree(tx_buf->raw_buf);
3627 tx_buf->raw_buf = NULL;
3628 tx_buf->tx_flags = 0;
3629 tx_buf->next_to_watch = NULL;
3630 dma_unmap_len_set(tx_buf, len, 0);
3631 tx_desc->buffer_addr = 0;
3632 tx_desc->cmd_type_offset_bsz = 0;
3634 /* move us past the eop_desc for start of next FD desc */
3639 i -= tx_ring->count;
3640 tx_buf = tx_ring->tx_bi;
3641 tx_desc = I40E_TX_DESC(tx_ring, 0);
3644 /* update budget accounting */
3646 } while (likely(budget));
3648 i += tx_ring->count;
3649 tx_ring->next_to_clean = i;
3651 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3652 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3658 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3659 * @irq: interrupt number
3660 * @data: pointer to a q_vector
3662 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3664 struct i40e_q_vector *q_vector = data;
3665 struct i40e_vsi *vsi;
3667 if (!q_vector->tx.ring)
3670 vsi = q_vector->tx.ring->vsi;
3671 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3677 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3678 * @vsi: the VSI being configured
3679 * @v_idx: vector index
3680 * @qp_idx: queue pair index
3682 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3684 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3685 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3686 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3688 tx_ring->q_vector = q_vector;
3689 tx_ring->next = q_vector->tx.ring;
3690 q_vector->tx.ring = tx_ring;
3691 q_vector->tx.count++;
3693 rx_ring->q_vector = q_vector;
3694 rx_ring->next = q_vector->rx.ring;
3695 q_vector->rx.ring = rx_ring;
3696 q_vector->rx.count++;
3700 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3701 * @vsi: the VSI being configured
3703 * This function maps descriptor rings to the queue-specific vectors
3704 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3705 * one vector per queue pair, but on a constrained vector budget, we
3706 * group the queue pairs as "efficiently" as possible.
3708 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3710 int qp_remaining = vsi->num_queue_pairs;
3711 int q_vectors = vsi->num_q_vectors;
3716 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3717 * group them so there are multiple queues per vector.
3718 * It is also important to go through all the vectors available to be
3719 * sure that if we don't use all the vectors, that the remaining vectors
3720 * are cleared. This is especially important when decreasing the
3721 * number of queues in use.
3723 for (; v_start < q_vectors; v_start++) {
3724 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3726 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3728 q_vector->num_ringpairs = num_ringpairs;
3730 q_vector->rx.count = 0;
3731 q_vector->tx.count = 0;
3732 q_vector->rx.ring = NULL;
3733 q_vector->tx.ring = NULL;
3735 while (num_ringpairs--) {
3736 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3744 * i40e_vsi_request_irq - Request IRQ from the OS
3745 * @vsi: the VSI being configured
3746 * @basename: name for the vector
3748 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3750 struct i40e_pf *pf = vsi->back;
3753 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3754 err = i40e_vsi_request_irq_msix(vsi, basename);
3755 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3756 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3759 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3763 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3768 #ifdef CONFIG_NET_POLL_CONTROLLER
3770 * i40e_netpoll - A Polling 'interrupt'handler
3771 * @netdev: network interface device structure
3773 * This is used by netconsole to send skbs without having to re-enable
3774 * interrupts. It's not called while the normal interrupt routine is executing.
3777 void i40e_netpoll(struct net_device *netdev)
3779 static void i40e_netpoll(struct net_device *netdev)
3782 struct i40e_netdev_priv *np = netdev_priv(netdev);
3783 struct i40e_vsi *vsi = np->vsi;
3784 struct i40e_pf *pf = vsi->back;
3787 /* if interface is down do nothing */
3788 if (test_bit(__I40E_DOWN, &vsi->state))
3791 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3792 for (i = 0; i < vsi->num_q_vectors; i++)
3793 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3795 i40e_intr(pf->pdev->irq, netdev);
3801 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3802 * @pf: the PF being configured
3803 * @pf_q: the PF queue
3804 * @enable: enable or disable state of the queue
3806 * This routine will wait for the given Tx queue of the PF to reach the
3807 * enabled or disabled state.
3808 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3809 * multiple retries; else will return 0 in case of success.
3811 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3816 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3817 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3818 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3821 usleep_range(10, 20);
3823 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3830 * i40e_vsi_control_tx - Start or stop a VSI's rings
3831 * @vsi: the VSI being configured
3832 * @enable: start or stop the rings
3834 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3836 struct i40e_pf *pf = vsi->back;
3837 struct i40e_hw *hw = &pf->hw;
3838 int i, j, pf_q, ret = 0;
3841 pf_q = vsi->base_queue;
3842 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3844 /* warn the TX unit of coming changes */
3845 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3847 usleep_range(10, 20);
3849 for (j = 0; j < 50; j++) {
3850 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3851 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3852 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3854 usleep_range(1000, 2000);
3856 /* Skip if the queue is already in the requested state */
3857 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3860 /* turn on/off the queue */
3862 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3863 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3865 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3868 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3869 /* No waiting for the Tx queue to disable */
3870 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3873 /* wait for the change to finish */
3874 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3876 dev_info(&pf->pdev->dev,
3877 "VSI seid %d Tx ring %d %sable timeout\n",
3878 vsi->seid, pf_q, (enable ? "en" : "dis"));
3883 if (hw->revision_id == 0)
3889 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3890 * @pf: the PF being configured
3891 * @pf_q: the PF queue
3892 * @enable: enable or disable state of the queue
3894 * This routine will wait for the given Rx queue of the PF to reach the
3895 * enabled or disabled state.
3896 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3897 * multiple retries; else will return 0 in case of success.
3899 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3904 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3905 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3906 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3909 usleep_range(10, 20);
3911 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3918 * i40e_vsi_control_rx - Start or stop a VSI's rings
3919 * @vsi: the VSI being configured
3920 * @enable: start or stop the rings
3922 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3924 struct i40e_pf *pf = vsi->back;
3925 struct i40e_hw *hw = &pf->hw;
3926 int i, j, pf_q, ret = 0;
3929 pf_q = vsi->base_queue;
3930 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3931 for (j = 0; j < 50; j++) {
3932 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3933 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3934 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3936 usleep_range(1000, 2000);
3939 /* Skip if the queue is already in the requested state */
3940 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3943 /* turn on/off the queue */
3945 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3947 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3948 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3950 /* wait for the change to finish */
3951 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3953 dev_info(&pf->pdev->dev,
3954 "VSI seid %d Rx ring %d %sable timeout\n",
3955 vsi->seid, pf_q, (enable ? "en" : "dis"));
3964 * i40e_vsi_control_rings - Start or stop a VSI's rings
3965 * @vsi: the VSI being configured
3966 * @enable: start or stop the rings
3968 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3972 /* do rx first for enable and last for disable */
3974 ret = i40e_vsi_control_rx(vsi, request);
3977 ret = i40e_vsi_control_tx(vsi, request);
3979 /* Ignore return value, we need to shutdown whatever we can */
3980 i40e_vsi_control_tx(vsi, request);
3981 i40e_vsi_control_rx(vsi, request);
3988 * i40e_vsi_free_irq - Free the irq association with the OS
3989 * @vsi: the VSI being configured
3991 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3993 struct i40e_pf *pf = vsi->back;
3994 struct i40e_hw *hw = &pf->hw;
3995 int base = vsi->base_vector;
3999 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4000 if (!vsi->q_vectors)
4003 if (!vsi->irqs_ready)
4006 vsi->irqs_ready = false;
4007 for (i = 0; i < vsi->num_q_vectors; i++) {
4008 u16 vector = i + base;
4010 /* free only the irqs that were actually requested */
4011 if (!vsi->q_vectors[i] ||
4012 !vsi->q_vectors[i]->num_ringpairs)
4015 /* clear the affinity_mask in the IRQ descriptor */
4016 irq_set_affinity_hint(pf->msix_entries[vector].vector,
4018 free_irq(pf->msix_entries[vector].vector,
4021 /* Tear down the interrupt queue link list
4023 * We know that they come in pairs and always
4024 * the Rx first, then the Tx. To clear the
4025 * link list, stick the EOL value into the
4026 * next_q field of the registers.
4028 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4029 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4030 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4031 val |= I40E_QUEUE_END_OF_LIST
4032 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4033 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4035 while (qp != I40E_QUEUE_END_OF_LIST) {
4038 val = rd32(hw, I40E_QINT_RQCTL(qp));
4040 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4041 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4042 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4043 I40E_QINT_RQCTL_INTEVENT_MASK);
4045 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4046 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4048 wr32(hw, I40E_QINT_RQCTL(qp), val);
4050 val = rd32(hw, I40E_QINT_TQCTL(qp));
4052 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4053 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4055 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4056 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4057 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4058 I40E_QINT_TQCTL_INTEVENT_MASK);
4060 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4061 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4063 wr32(hw, I40E_QINT_TQCTL(qp), val);
4068 free_irq(pf->pdev->irq, pf);
4070 val = rd32(hw, I40E_PFINT_LNKLST0);
4071 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4072 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4073 val |= I40E_QUEUE_END_OF_LIST
4074 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4075 wr32(hw, I40E_PFINT_LNKLST0, val);
4077 val = rd32(hw, I40E_QINT_RQCTL(qp));
4078 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4079 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4080 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4081 I40E_QINT_RQCTL_INTEVENT_MASK);
4083 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4084 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4086 wr32(hw, I40E_QINT_RQCTL(qp), val);
4088 val = rd32(hw, I40E_QINT_TQCTL(qp));
4090 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4091 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4092 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4093 I40E_QINT_TQCTL_INTEVENT_MASK);
4095 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4096 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4098 wr32(hw, I40E_QINT_TQCTL(qp), val);
4103 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4104 * @vsi: the VSI being configured
4105 * @v_idx: Index of vector to be freed
4107 * This function frees the memory allocated to the q_vector. In addition if
4108 * NAPI is enabled it will delete any references to the NAPI struct prior
4109 * to freeing the q_vector.
4111 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4113 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4114 struct i40e_ring *ring;
4119 /* disassociate q_vector from rings */
4120 i40e_for_each_ring(ring, q_vector->tx)
4121 ring->q_vector = NULL;
4123 i40e_for_each_ring(ring, q_vector->rx)
4124 ring->q_vector = NULL;
4126 /* only VSI w/ an associated netdev is set up w/ NAPI */
4128 netif_napi_del(&q_vector->napi);
4130 vsi->q_vectors[v_idx] = NULL;
4132 kfree_rcu(q_vector, rcu);
4136 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4137 * @vsi: the VSI being un-configured
4139 * This frees the memory allocated to the q_vectors and
4140 * deletes references to the NAPI struct.
4142 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4146 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4147 i40e_free_q_vector(vsi, v_idx);
4151 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4152 * @pf: board private structure
4154 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4156 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4157 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4158 pci_disable_msix(pf->pdev);
4159 kfree(pf->msix_entries);
4160 pf->msix_entries = NULL;
4161 kfree(pf->irq_pile);
4162 pf->irq_pile = NULL;
4163 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4164 pci_disable_msi(pf->pdev);
4166 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4170 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4171 * @pf: board private structure
4173 * We go through and clear interrupt specific resources and reset the structure
4174 * to pre-load conditions
4176 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4180 i40e_stop_misc_vector(pf);
4181 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4182 synchronize_irq(pf->msix_entries[0].vector);
4183 free_irq(pf->msix_entries[0].vector, pf);
4186 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4187 for (i = 0; i < pf->num_alloc_vsi; i++)
4189 i40e_vsi_free_q_vectors(pf->vsi[i]);
4190 i40e_reset_interrupt_capability(pf);
4194 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4195 * @vsi: the VSI being configured
4197 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4204 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4205 napi_enable(&vsi->q_vectors[q_idx]->napi);
4209 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4210 * @vsi: the VSI being configured
4212 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4219 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4220 napi_disable(&vsi->q_vectors[q_idx]->napi);
4224 * i40e_vsi_close - Shut down a VSI
4225 * @vsi: the vsi to be quelled
4227 static void i40e_vsi_close(struct i40e_vsi *vsi)
4229 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4231 i40e_vsi_free_irq(vsi);
4232 i40e_vsi_free_tx_resources(vsi);
4233 i40e_vsi_free_rx_resources(vsi);
4234 vsi->current_netdev_flags = 0;
4238 * i40e_quiesce_vsi - Pause a given VSI
4239 * @vsi: the VSI being paused
4241 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4243 if (test_bit(__I40E_DOWN, &vsi->state))
4246 /* No need to disable FCoE VSI when Tx suspended */
4247 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4248 vsi->type == I40E_VSI_FCOE) {
4249 dev_dbg(&vsi->back->pdev->dev,
4250 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4254 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4255 if (vsi->netdev && netif_running(vsi->netdev))
4256 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4258 i40e_vsi_close(vsi);
4262 * i40e_unquiesce_vsi - Resume a given VSI
4263 * @vsi: the VSI being resumed
4265 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4267 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4270 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4271 if (vsi->netdev && netif_running(vsi->netdev))
4272 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4274 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4278 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4281 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4285 for (v = 0; v < pf->num_alloc_vsi; v++) {
4287 i40e_quiesce_vsi(pf->vsi[v]);
4292 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4295 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4299 for (v = 0; v < pf->num_alloc_vsi; v++) {
4301 i40e_unquiesce_vsi(pf->vsi[v]);
4305 #ifdef CONFIG_I40E_DCB
4307 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4308 * @vsi: the VSI being configured
4310 * This function waits for the given VSI's Tx queues to be disabled.
4312 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4314 struct i40e_pf *pf = vsi->back;
4317 pf_q = vsi->base_queue;
4318 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4319 /* Check and wait for the disable status of the queue */
4320 ret = i40e_pf_txq_wait(pf, pf_q, false);
4322 dev_info(&pf->pdev->dev,
4323 "VSI seid %d Tx ring %d disable timeout\n",
4333 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4336 * This function waits for the Tx queues to be in disabled state for all the
4337 * VSIs that are managed by this PF.
4339 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4343 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4344 /* No need to wait for FCoE VSI queues */
4345 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4346 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4358 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4359 * @q_idx: TX queue number
4360 * @vsi: Pointer to VSI struct
4362 * This function checks specified queue for given VSI. Detects hung condition.
4363 * Sets hung bit since it is two step process. Before next run of service task
4364 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4365 * hung condition remain unchanged and during subsequent run, this function
4366 * issues SW interrupt to recover from hung condition.
4368 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4370 struct i40e_ring *tx_ring = NULL;
4372 u32 head, val, tx_pending;
4377 /* now that we have an index, find the tx_ring struct */
4378 for (i = 0; i < vsi->num_queue_pairs; i++) {
4379 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4380 if (q_idx == vsi->tx_rings[i]->queue_index) {
4381 tx_ring = vsi->tx_rings[i];
4390 /* Read interrupt register */
4391 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4393 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4394 tx_ring->vsi->base_vector - 1));
4396 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4398 head = i40e_get_head(tx_ring);
4400 tx_pending = i40e_get_tx_pending(tx_ring);
4402 /* Interrupts are disabled and TX pending is non-zero,
4403 * trigger the SW interrupt (don't wait). Worst case
4404 * there will be one extra interrupt which may result
4405 * into not cleaning any queues because queues are cleaned.
4407 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4408 i40e_force_wb(vsi, tx_ring->q_vector);
4412 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4413 * @pf: pointer to PF struct
4415 * LAN VSI has netdev and netdev has TX queues. This function is to check
4416 * each of those TX queues if they are hung, trigger recovery by issuing
4419 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4421 struct net_device *netdev;
4422 struct i40e_vsi *vsi;
4425 /* Only for LAN VSI */
4426 vsi = pf->vsi[pf->lan_vsi];
4431 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4432 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4433 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4436 /* Make sure type is MAIN VSI */
4437 if (vsi->type != I40E_VSI_MAIN)
4440 netdev = vsi->netdev;
4444 /* Bail out if netif_carrier is not OK */
4445 if (!netif_carrier_ok(netdev))
4448 /* Go thru' TX queues for netdev */
4449 for (i = 0; i < netdev->num_tx_queues; i++) {
4450 struct netdev_queue *q;
4452 q = netdev_get_tx_queue(netdev, i);
4454 i40e_detect_recover_hung_queue(i, vsi);
4459 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4460 * @pf: pointer to PF
4462 * Get TC map for ISCSI PF type that will include iSCSI TC
4465 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4467 struct i40e_dcb_app_priority_table app;
4468 struct i40e_hw *hw = &pf->hw;
4469 u8 enabled_tc = 1; /* TC0 is always enabled */
4471 /* Get the iSCSI APP TLV */
4472 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4474 for (i = 0; i < dcbcfg->numapps; i++) {
4475 app = dcbcfg->app[i];
4476 if (app.selector == I40E_APP_SEL_TCPIP &&
4477 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4478 tc = dcbcfg->etscfg.prioritytable[app.priority];
4479 enabled_tc |= BIT_ULL(tc);
4488 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4489 * @dcbcfg: the corresponding DCBx configuration structure
4491 * Return the number of TCs from given DCBx configuration
4493 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4498 /* Scan the ETS Config Priority Table to find
4499 * traffic class enabled for a given priority
4500 * and use the traffic class index to get the
4501 * number of traffic classes enabled
4503 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4504 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4505 num_tc = dcbcfg->etscfg.prioritytable[i];
4508 /* Traffic class index starts from zero so
4509 * increment to return the actual count
4515 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4516 * @dcbcfg: the corresponding DCBx configuration structure
4518 * Query the current DCB configuration and return the number of
4519 * traffic classes enabled from the given DCBX config
4521 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4523 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4527 for (i = 0; i < num_tc; i++)
4528 enabled_tc |= BIT(i);
4534 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4535 * @pf: PF being queried
4537 * Return number of traffic classes enabled for the given PF
4539 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4541 struct i40e_hw *hw = &pf->hw;
4544 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4546 /* If DCB is not enabled then always in single TC */
4547 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4550 /* SFP mode will be enabled for all TCs on port */
4551 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4552 return i40e_dcb_get_num_tc(dcbcfg);
4554 /* MFP mode return count of enabled TCs for this PF */
4555 if (pf->hw.func_caps.iscsi)
4556 enabled_tc = i40e_get_iscsi_tc_map(pf);
4558 return 1; /* Only TC0 */
4560 /* At least have TC0 */
4561 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4562 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4563 if (enabled_tc & BIT_ULL(i))
4570 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4571 * @pf: PF being queried
4573 * Return a bitmap for first enabled traffic class for this PF.
4575 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4577 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4581 return 0x1; /* TC0 */
4583 /* Find the first enabled TC */
4584 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4585 if (enabled_tc & BIT_ULL(i))
4593 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4594 * @pf: PF being queried
4596 * Return a bitmap for enabled traffic classes for this PF.
4598 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4600 /* If DCB is not enabled for this PF then just return default TC */
4601 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4602 return i40e_pf_get_default_tc(pf);
4604 /* SFP mode we want PF to be enabled for all TCs */
4605 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4606 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4608 /* MFP enabled and iSCSI PF type */
4609 if (pf->hw.func_caps.iscsi)
4610 return i40e_get_iscsi_tc_map(pf);
4612 return i40e_pf_get_default_tc(pf);
4616 * i40e_vsi_get_bw_info - Query VSI BW Information
4617 * @vsi: the VSI being queried
4619 * Returns 0 on success, negative value on failure
4621 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4623 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4624 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4625 struct i40e_pf *pf = vsi->back;
4626 struct i40e_hw *hw = &pf->hw;
4631 /* Get the VSI level BW configuration */
4632 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4634 dev_info(&pf->pdev->dev,
4635 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4636 i40e_stat_str(&pf->hw, ret),
4637 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4641 /* Get the VSI level BW configuration per TC */
4642 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4645 dev_info(&pf->pdev->dev,
4646 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4647 i40e_stat_str(&pf->hw, ret),
4648 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4652 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4653 dev_info(&pf->pdev->dev,
4654 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4655 bw_config.tc_valid_bits,
4656 bw_ets_config.tc_valid_bits);
4657 /* Still continuing */
4660 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4661 vsi->bw_max_quanta = bw_config.max_bw;
4662 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4663 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4664 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4665 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4666 vsi->bw_ets_limit_credits[i] =
4667 le16_to_cpu(bw_ets_config.credits[i]);
4668 /* 3 bits out of 4 for each TC */
4669 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4676 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4677 * @vsi: the VSI being configured
4678 * @enabled_tc: TC bitmap
4679 * @bw_credits: BW shared credits per TC
4681 * Returns 0 on success, negative value on failure
4683 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4686 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4690 bw_data.tc_valid_bits = enabled_tc;
4691 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4692 bw_data.tc_bw_credits[i] = bw_share[i];
4694 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4697 dev_info(&vsi->back->pdev->dev,
4698 "AQ command Config VSI BW allocation per TC failed = %d\n",
4699 vsi->back->hw.aq.asq_last_status);
4703 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4704 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4710 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4711 * @vsi: the VSI being configured
4712 * @enabled_tc: TC map to be enabled
4715 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4717 struct net_device *netdev = vsi->netdev;
4718 struct i40e_pf *pf = vsi->back;
4719 struct i40e_hw *hw = &pf->hw;
4722 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4728 netdev_reset_tc(netdev);
4732 /* Set up actual enabled TCs on the VSI */
4733 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4736 /* set per TC queues for the VSI */
4737 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4738 /* Only set TC queues for enabled tcs
4740 * e.g. For a VSI that has TC0 and TC3 enabled the
4741 * enabled_tc bitmap would be 0x00001001; the driver
4742 * will set the numtc for netdev as 2 that will be
4743 * referenced by the netdev layer as TC 0 and 1.
4745 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4746 netdev_set_tc_queue(netdev,
4747 vsi->tc_config.tc_info[i].netdev_tc,
4748 vsi->tc_config.tc_info[i].qcount,
4749 vsi->tc_config.tc_info[i].qoffset);
4752 /* Assign UP2TC map for the VSI */
4753 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4754 /* Get the actual TC# for the UP */
4755 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4756 /* Get the mapped netdev TC# for the UP */
4757 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4758 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4763 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4764 * @vsi: the VSI being configured
4765 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4767 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4768 struct i40e_vsi_context *ctxt)
4770 /* copy just the sections touched not the entire info
4771 * since not all sections are valid as returned by
4774 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4775 memcpy(&vsi->info.queue_mapping,
4776 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4777 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4778 sizeof(vsi->info.tc_mapping));
4782 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4783 * @vsi: VSI to be configured
4784 * @enabled_tc: TC bitmap
4786 * This configures a particular VSI for TCs that are mapped to the
4787 * given TC bitmap. It uses default bandwidth share for TCs across
4788 * VSIs to configure TC for a particular VSI.
4791 * It is expected that the VSI queues have been quisced before calling
4794 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4796 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4797 struct i40e_vsi_context ctxt;
4801 /* Check if enabled_tc is same as existing or new TCs */
4802 if (vsi->tc_config.enabled_tc == enabled_tc)
4805 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4806 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4807 if (enabled_tc & BIT_ULL(i))
4811 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4813 dev_info(&vsi->back->pdev->dev,
4814 "Failed configuring TC map %d for VSI %d\n",
4815 enabled_tc, vsi->seid);
4819 /* Update Queue Pairs Mapping for currently enabled UPs */
4820 ctxt.seid = vsi->seid;
4821 ctxt.pf_num = vsi->back->hw.pf_id;
4823 ctxt.uplink_seid = vsi->uplink_seid;
4824 ctxt.info = vsi->info;
4825 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4827 /* Update the VSI after updating the VSI queue-mapping information */
4828 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4830 dev_info(&vsi->back->pdev->dev,
4831 "Update vsi tc config failed, err %s aq_err %s\n",
4832 i40e_stat_str(&vsi->back->hw, ret),
4833 i40e_aq_str(&vsi->back->hw,
4834 vsi->back->hw.aq.asq_last_status));
4837 /* update the local VSI info with updated queue map */
4838 i40e_vsi_update_queue_map(vsi, &ctxt);
4839 vsi->info.valid_sections = 0;
4841 /* Update current VSI BW information */
4842 ret = i40e_vsi_get_bw_info(vsi);
4844 dev_info(&vsi->back->pdev->dev,
4845 "Failed updating vsi bw info, err %s aq_err %s\n",
4846 i40e_stat_str(&vsi->back->hw, ret),
4847 i40e_aq_str(&vsi->back->hw,
4848 vsi->back->hw.aq.asq_last_status));
4852 /* Update the netdev TC setup */
4853 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4859 * i40e_veb_config_tc - Configure TCs for given VEB
4861 * @enabled_tc: TC bitmap
4863 * Configures given TC bitmap for VEB (switching) element
4865 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4867 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4868 struct i40e_pf *pf = veb->pf;
4872 /* No TCs or already enabled TCs just return */
4873 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4876 bw_data.tc_valid_bits = enabled_tc;
4877 /* bw_data.absolute_credits is not set (relative) */
4879 /* Enable ETS TCs with equal BW Share for now */
4880 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4881 if (enabled_tc & BIT_ULL(i))
4882 bw_data.tc_bw_share_credits[i] = 1;
4885 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4888 dev_info(&pf->pdev->dev,
4889 "VEB bw config failed, err %s aq_err %s\n",
4890 i40e_stat_str(&pf->hw, ret),
4891 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4895 /* Update the BW information */
4896 ret = i40e_veb_get_bw_info(veb);
4898 dev_info(&pf->pdev->dev,
4899 "Failed getting veb bw config, err %s aq_err %s\n",
4900 i40e_stat_str(&pf->hw, ret),
4901 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4908 #ifdef CONFIG_I40E_DCB
4910 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4913 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4914 * the caller would've quiesce all the VSIs before calling
4917 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4923 /* Enable the TCs available on PF to all VEBs */
4924 tc_map = i40e_pf_get_tc_map(pf);
4925 for (v = 0; v < I40E_MAX_VEB; v++) {
4928 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4930 dev_info(&pf->pdev->dev,
4931 "Failed configuring TC for VEB seid=%d\n",
4933 /* Will try to configure as many components */
4937 /* Update each VSI */
4938 for (v = 0; v < pf->num_alloc_vsi; v++) {
4942 /* - Enable all TCs for the LAN VSI
4944 * - For FCoE VSI only enable the TC configured
4945 * as per the APP TLV
4947 * - For all others keep them at TC0 for now
4949 if (v == pf->lan_vsi)
4950 tc_map = i40e_pf_get_tc_map(pf);
4952 tc_map = i40e_pf_get_default_tc(pf);
4954 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4955 tc_map = i40e_get_fcoe_tc_map(pf);
4956 #endif /* #ifdef I40E_FCOE */
4958 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4960 dev_info(&pf->pdev->dev,
4961 "Failed configuring TC for VSI seid=%d\n",
4963 /* Will try to configure as many components */
4965 /* Re-configure VSI vectors based on updated TC map */
4966 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4967 if (pf->vsi[v]->netdev)
4968 i40e_dcbnl_set_all(pf->vsi[v]);
4974 * i40e_resume_port_tx - Resume port Tx
4977 * Resume a port's Tx and issue a PF reset in case of failure to
4980 static int i40e_resume_port_tx(struct i40e_pf *pf)
4982 struct i40e_hw *hw = &pf->hw;
4985 ret = i40e_aq_resume_port_tx(hw, NULL);
4987 dev_info(&pf->pdev->dev,
4988 "Resume Port Tx failed, err %s aq_err %s\n",
4989 i40e_stat_str(&pf->hw, ret),
4990 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4991 /* Schedule PF reset to recover */
4992 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4993 i40e_service_event_schedule(pf);
5000 * i40e_init_pf_dcb - Initialize DCB configuration
5001 * @pf: PF being configured
5003 * Query the current DCB configuration and cache it
5004 * in the hardware structure
5006 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5008 struct i40e_hw *hw = &pf->hw;
5011 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5012 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
5013 (pf->hw.aq.fw_maj_ver < 4))
5016 /* Get the initial DCB configuration */
5017 err = i40e_init_dcb(hw);
5019 /* Device/Function is not DCBX capable */
5020 if ((!hw->func_caps.dcb) ||
5021 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5022 dev_info(&pf->pdev->dev,
5023 "DCBX offload is not supported or is disabled for this PF.\n");
5025 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5029 /* When status is not DISABLED then DCBX in FW */
5030 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5031 DCB_CAP_DCBX_VER_IEEE;
5033 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5034 /* Enable DCB tagging only when more than one TC */
5035 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5036 pf->flags |= I40E_FLAG_DCB_ENABLED;
5037 dev_dbg(&pf->pdev->dev,
5038 "DCBX offload is supported for this PF.\n");
5041 dev_info(&pf->pdev->dev,
5042 "Query for DCB configuration failed, err %s aq_err %s\n",
5043 i40e_stat_str(&pf->hw, err),
5044 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5050 #endif /* CONFIG_I40E_DCB */
5051 #define SPEED_SIZE 14
5054 * i40e_print_link_message - print link up or down
5055 * @vsi: the VSI for which link needs a message
5057 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5059 char *speed = "Unknown";
5060 char *fc = "Unknown";
5062 if (vsi->current_isup == isup)
5064 vsi->current_isup = isup;
5066 netdev_info(vsi->netdev, "NIC Link is Down\n");
5070 /* Warn user if link speed on NPAR enabled partition is not at
5073 if (vsi->back->hw.func_caps.npar_enable &&
5074 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5075 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5076 netdev_warn(vsi->netdev,
5077 "The partition detected link speed that is less than 10Gbps\n");
5079 switch (vsi->back->hw.phy.link_info.link_speed) {
5080 case I40E_LINK_SPEED_40GB:
5083 case I40E_LINK_SPEED_20GB:
5086 case I40E_LINK_SPEED_10GB:
5089 case I40E_LINK_SPEED_1GB:
5092 case I40E_LINK_SPEED_100MB:
5099 switch (vsi->back->hw.fc.current_mode) {
5103 case I40E_FC_TX_PAUSE:
5106 case I40E_FC_RX_PAUSE:
5114 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5119 * i40e_up_complete - Finish the last steps of bringing up a connection
5120 * @vsi: the VSI being configured
5122 static int i40e_up_complete(struct i40e_vsi *vsi)
5124 struct i40e_pf *pf = vsi->back;
5127 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5128 i40e_vsi_configure_msix(vsi);
5130 i40e_configure_msi_and_legacy(vsi);
5133 err = i40e_vsi_control_rings(vsi, true);
5137 clear_bit(__I40E_DOWN, &vsi->state);
5138 i40e_napi_enable_all(vsi);
5139 i40e_vsi_enable_irq(vsi);
5141 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5143 i40e_print_link_message(vsi, true);
5144 netif_tx_start_all_queues(vsi->netdev);
5145 netif_carrier_on(vsi->netdev);
5146 } else if (vsi->netdev) {
5147 i40e_print_link_message(vsi, false);
5148 /* need to check for qualified module here*/
5149 if ((pf->hw.phy.link_info.link_info &
5150 I40E_AQ_MEDIA_AVAILABLE) &&
5151 (!(pf->hw.phy.link_info.an_info &
5152 I40E_AQ_QUALIFIED_MODULE)))
5153 netdev_err(vsi->netdev,
5154 "the driver failed to link because an unqualified module was detected.");
5157 /* replay FDIR SB filters */
5158 if (vsi->type == I40E_VSI_FDIR) {
5159 /* reset fd counters */
5160 pf->fd_add_err = pf->fd_atr_cnt = 0;
5161 if (pf->fd_tcp_rule > 0) {
5162 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5163 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5164 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5165 pf->fd_tcp_rule = 0;
5167 i40e_fdir_filter_restore(vsi);
5169 i40e_service_event_schedule(pf);
5175 * i40e_vsi_reinit_locked - Reset the VSI
5176 * @vsi: the VSI being configured
5178 * Rebuild the ring structs after some configuration
5179 * has changed, e.g. MTU size.
5181 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5183 struct i40e_pf *pf = vsi->back;
5185 WARN_ON(in_interrupt());
5186 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5187 usleep_range(1000, 2000);
5190 /* Give a VF some time to respond to the reset. The
5191 * two second wait is based upon the watchdog cycle in
5194 if (vsi->type == I40E_VSI_SRIOV)
5197 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5201 * i40e_up - Bring the connection back up after being down
5202 * @vsi: the VSI being configured
5204 int i40e_up(struct i40e_vsi *vsi)
5208 err = i40e_vsi_configure(vsi);
5210 err = i40e_up_complete(vsi);
5216 * i40e_down - Shutdown the connection processing
5217 * @vsi: the VSI being stopped
5219 void i40e_down(struct i40e_vsi *vsi)
5223 /* It is assumed that the caller of this function
5224 * sets the vsi->state __I40E_DOWN bit.
5227 netif_carrier_off(vsi->netdev);
5228 netif_tx_disable(vsi->netdev);
5230 i40e_vsi_disable_irq(vsi);
5231 i40e_vsi_control_rings(vsi, false);
5232 i40e_napi_disable_all(vsi);
5234 for (i = 0; i < vsi->num_queue_pairs; i++) {
5235 i40e_clean_tx_ring(vsi->tx_rings[i]);
5236 i40e_clean_rx_ring(vsi->rx_rings[i]);
5241 * i40e_setup_tc - configure multiple traffic classes
5242 * @netdev: net device to configure
5243 * @tc: number of traffic classes to enable
5246 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5248 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5251 struct i40e_netdev_priv *np = netdev_priv(netdev);
5252 struct i40e_vsi *vsi = np->vsi;
5253 struct i40e_pf *pf = vsi->back;
5258 /* Check if DCB enabled to continue */
5259 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5260 netdev_info(netdev, "DCB is not enabled for adapter\n");
5264 /* Check if MFP enabled */
5265 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5266 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5270 /* Check whether tc count is within enabled limit */
5271 if (tc > i40e_pf_get_num_tc(pf)) {
5272 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5276 /* Generate TC map for number of tc requested */
5277 for (i = 0; i < tc; i++)
5278 enabled_tc |= BIT_ULL(i);
5280 /* Requesting same TC configuration as already enabled */
5281 if (enabled_tc == vsi->tc_config.enabled_tc)
5284 /* Quiesce VSI queues */
5285 i40e_quiesce_vsi(vsi);
5287 /* Configure VSI for enabled TCs */
5288 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5290 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5296 i40e_unquiesce_vsi(vsi);
5303 * i40e_open - Called when a network interface is made active
5304 * @netdev: network interface device structure
5306 * The open entry point is called when a network interface is made
5307 * active by the system (IFF_UP). At this point all resources needed
5308 * for transmit and receive operations are allocated, the interrupt
5309 * handler is registered with the OS, the netdev watchdog subtask is
5310 * enabled, and the stack is notified that the interface is ready.
5312 * Returns 0 on success, negative value on failure
5314 int i40e_open(struct net_device *netdev)
5316 struct i40e_netdev_priv *np = netdev_priv(netdev);
5317 struct i40e_vsi *vsi = np->vsi;
5318 struct i40e_pf *pf = vsi->back;
5321 /* disallow open during test or if eeprom is broken */
5322 if (test_bit(__I40E_TESTING, &pf->state) ||
5323 test_bit(__I40E_BAD_EEPROM, &pf->state))
5326 netif_carrier_off(netdev);
5328 err = i40e_vsi_open(vsi);
5332 /* configure global TSO hardware offload settings */
5333 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5334 TCP_FLAG_FIN) >> 16);
5335 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5337 TCP_FLAG_CWR) >> 16);
5338 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5340 #ifdef CONFIG_I40E_VXLAN
5341 vxlan_get_rx_port(netdev);
5349 * @vsi: the VSI to open
5351 * Finish initialization of the VSI.
5353 * Returns 0 on success, negative value on failure
5355 int i40e_vsi_open(struct i40e_vsi *vsi)
5357 struct i40e_pf *pf = vsi->back;
5358 char int_name[I40E_INT_NAME_STR_LEN];
5361 /* allocate descriptors */
5362 err = i40e_vsi_setup_tx_resources(vsi);
5365 err = i40e_vsi_setup_rx_resources(vsi);
5369 err = i40e_vsi_configure(vsi);
5374 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5375 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5376 err = i40e_vsi_request_irq(vsi, int_name);
5380 /* Notify the stack of the actual queue counts. */
5381 err = netif_set_real_num_tx_queues(vsi->netdev,
5382 vsi->num_queue_pairs);
5384 goto err_set_queues;
5386 err = netif_set_real_num_rx_queues(vsi->netdev,
5387 vsi->num_queue_pairs);
5389 goto err_set_queues;
5391 } else if (vsi->type == I40E_VSI_FDIR) {
5392 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5393 dev_driver_string(&pf->pdev->dev),
5394 dev_name(&pf->pdev->dev));
5395 err = i40e_vsi_request_irq(vsi, int_name);
5402 err = i40e_up_complete(vsi);
5404 goto err_up_complete;
5411 i40e_vsi_free_irq(vsi);
5413 i40e_vsi_free_rx_resources(vsi);
5415 i40e_vsi_free_tx_resources(vsi);
5416 if (vsi == pf->vsi[pf->lan_vsi])
5417 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5423 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5424 * @pf: Pointer to PF
5426 * This function destroys the hlist where all the Flow Director
5427 * filters were saved.
5429 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5431 struct i40e_fdir_filter *filter;
5432 struct hlist_node *node2;
5434 hlist_for_each_entry_safe(filter, node2,
5435 &pf->fdir_filter_list, fdir_node) {
5436 hlist_del(&filter->fdir_node);
5439 pf->fdir_pf_active_filters = 0;
5443 * i40e_close - Disables a network interface
5444 * @netdev: network interface device structure
5446 * The close entry point is called when an interface is de-activated
5447 * by the OS. The hardware is still under the driver's control, but
5448 * this netdev interface is disabled.
5450 * Returns 0, this is not allowed to fail
5453 int i40e_close(struct net_device *netdev)
5455 static int i40e_close(struct net_device *netdev)
5458 struct i40e_netdev_priv *np = netdev_priv(netdev);
5459 struct i40e_vsi *vsi = np->vsi;
5461 i40e_vsi_close(vsi);
5467 * i40e_do_reset - Start a PF or Core Reset sequence
5468 * @pf: board private structure
5469 * @reset_flags: which reset is requested
5471 * The essential difference in resets is that the PF Reset
5472 * doesn't clear the packet buffers, doesn't reset the PE
5473 * firmware, and doesn't bother the other PFs on the chip.
5475 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5479 WARN_ON(in_interrupt());
5481 if (i40e_check_asq_alive(&pf->hw))
5482 i40e_vc_notify_reset(pf);
5484 /* do the biggest reset indicated */
5485 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5487 /* Request a Global Reset
5489 * This will start the chip's countdown to the actual full
5490 * chip reset event, and a warning interrupt to be sent
5491 * to all PFs, including the requestor. Our handler
5492 * for the warning interrupt will deal with the shutdown
5493 * and recovery of the switch setup.
5495 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5496 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5497 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5498 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5500 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5502 /* Request a Core Reset
5504 * Same as Global Reset, except does *not* include the MAC/PHY
5506 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5507 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5508 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5509 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5510 i40e_flush(&pf->hw);
5512 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5514 /* Request a PF Reset
5516 * Resets only the PF-specific registers
5518 * This goes directly to the tear-down and rebuild of
5519 * the switch, since we need to do all the recovery as
5520 * for the Core Reset.
5522 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5523 i40e_handle_reset_warning(pf);
5525 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5528 /* Find the VSI(s) that requested a re-init */
5529 dev_info(&pf->pdev->dev,
5530 "VSI reinit requested\n");
5531 for (v = 0; v < pf->num_alloc_vsi; v++) {
5532 struct i40e_vsi *vsi = pf->vsi[v];
5535 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5536 i40e_vsi_reinit_locked(pf->vsi[v]);
5537 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5540 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5543 /* Find the VSI(s) that needs to be brought down */
5544 dev_info(&pf->pdev->dev, "VSI down requested\n");
5545 for (v = 0; v < pf->num_alloc_vsi; v++) {
5546 struct i40e_vsi *vsi = pf->vsi[v];
5549 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5550 set_bit(__I40E_DOWN, &vsi->state);
5552 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5556 dev_info(&pf->pdev->dev,
5557 "bad reset request 0x%08x\n", reset_flags);
5561 #ifdef CONFIG_I40E_DCB
5563 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5564 * @pf: board private structure
5565 * @old_cfg: current DCB config
5566 * @new_cfg: new DCB config
5568 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5569 struct i40e_dcbx_config *old_cfg,
5570 struct i40e_dcbx_config *new_cfg)
5572 bool need_reconfig = false;
5574 /* Check if ETS configuration has changed */
5575 if (memcmp(&new_cfg->etscfg,
5577 sizeof(new_cfg->etscfg))) {
5578 /* If Priority Table has changed reconfig is needed */
5579 if (memcmp(&new_cfg->etscfg.prioritytable,
5580 &old_cfg->etscfg.prioritytable,
5581 sizeof(new_cfg->etscfg.prioritytable))) {
5582 need_reconfig = true;
5583 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5586 if (memcmp(&new_cfg->etscfg.tcbwtable,
5587 &old_cfg->etscfg.tcbwtable,
5588 sizeof(new_cfg->etscfg.tcbwtable)))
5589 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5591 if (memcmp(&new_cfg->etscfg.tsatable,
5592 &old_cfg->etscfg.tsatable,
5593 sizeof(new_cfg->etscfg.tsatable)))
5594 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5597 /* Check if PFC configuration has changed */
5598 if (memcmp(&new_cfg->pfc,
5600 sizeof(new_cfg->pfc))) {
5601 need_reconfig = true;
5602 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5605 /* Check if APP Table has changed */
5606 if (memcmp(&new_cfg->app,
5608 sizeof(new_cfg->app))) {
5609 need_reconfig = true;
5610 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5613 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5614 return need_reconfig;
5618 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5619 * @pf: board private structure
5620 * @e: event info posted on ARQ
5622 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5623 struct i40e_arq_event_info *e)
5625 struct i40e_aqc_lldp_get_mib *mib =
5626 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5627 struct i40e_hw *hw = &pf->hw;
5628 struct i40e_dcbx_config tmp_dcbx_cfg;
5629 bool need_reconfig = false;
5633 /* Not DCB capable or capability disabled */
5634 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5637 /* Ignore if event is not for Nearest Bridge */
5638 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5639 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5640 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5641 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5644 /* Check MIB Type and return if event for Remote MIB update */
5645 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5646 dev_dbg(&pf->pdev->dev,
5647 "LLDP event mib type %s\n", type ? "remote" : "local");
5648 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5649 /* Update the remote cached instance and return */
5650 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5651 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5652 &hw->remote_dcbx_config);
5656 /* Store the old configuration */
5657 tmp_dcbx_cfg = hw->local_dcbx_config;
5659 /* Reset the old DCBx configuration data */
5660 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5661 /* Get updated DCBX data from firmware */
5662 ret = i40e_get_dcb_config(&pf->hw);
5664 dev_info(&pf->pdev->dev,
5665 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5666 i40e_stat_str(&pf->hw, ret),
5667 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5671 /* No change detected in DCBX configs */
5672 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5673 sizeof(tmp_dcbx_cfg))) {
5674 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5678 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5679 &hw->local_dcbx_config);
5681 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5686 /* Enable DCB tagging only when more than one TC */
5687 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5688 pf->flags |= I40E_FLAG_DCB_ENABLED;
5690 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5692 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5693 /* Reconfiguration needed quiesce all VSIs */
5694 i40e_pf_quiesce_all_vsi(pf);
5696 /* Changes in configuration update VEB/VSI */
5697 i40e_dcb_reconfigure(pf);
5699 ret = i40e_resume_port_tx(pf);
5701 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5702 /* In case of error no point in resuming VSIs */
5706 /* Wait for the PF's Tx queues to be disabled */
5707 ret = i40e_pf_wait_txq_disabled(pf);
5709 /* Schedule PF reset to recover */
5710 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5711 i40e_service_event_schedule(pf);
5713 i40e_pf_unquiesce_all_vsi(pf);
5719 #endif /* CONFIG_I40E_DCB */
5722 * i40e_do_reset_safe - Protected reset path for userland calls.
5723 * @pf: board private structure
5724 * @reset_flags: which reset is requested
5727 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5730 i40e_do_reset(pf, reset_flags);
5735 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5736 * @pf: board private structure
5737 * @e: event info posted on ARQ
5739 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5742 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5743 struct i40e_arq_event_info *e)
5745 struct i40e_aqc_lan_overflow *data =
5746 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5747 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5748 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5749 struct i40e_hw *hw = &pf->hw;
5753 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5756 /* Queue belongs to VF, find the VF and issue VF reset */
5757 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5758 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5759 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5760 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5761 vf_id -= hw->func_caps.vf_base_id;
5762 vf = &pf->vf[vf_id];
5763 i40e_vc_notify_vf_reset(vf);
5764 /* Allow VF to process pending reset notification */
5766 i40e_reset_vf(vf, false);
5771 * i40e_service_event_complete - Finish up the service event
5772 * @pf: board private structure
5774 static void i40e_service_event_complete(struct i40e_pf *pf)
5776 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5778 /* flush memory to make sure state is correct before next watchog */
5779 smp_mb__before_atomic();
5780 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5784 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5785 * @pf: board private structure
5787 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5791 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5792 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5797 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5798 * @pf: board private structure
5800 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5804 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5805 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5806 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5807 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5812 * i40e_get_global_fd_count - Get total FD filters programmed on device
5813 * @pf: board private structure
5815 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5819 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5820 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5821 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5822 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5827 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5828 * @pf: board private structure
5830 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5832 struct i40e_fdir_filter *filter;
5833 u32 fcnt_prog, fcnt_avail;
5834 struct hlist_node *node;
5836 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5839 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5842 fcnt_prog = i40e_get_global_fd_count(pf);
5843 fcnt_avail = pf->fdir_pf_filter_count;
5844 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5845 (pf->fd_add_err == 0) ||
5846 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5847 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5848 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5849 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5850 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5851 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5854 /* Wait for some more space to be available to turn on ATR */
5855 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5856 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5857 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5858 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5859 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5860 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5864 /* if hw had a problem adding a filter, delete it */
5865 if (pf->fd_inv > 0) {
5866 hlist_for_each_entry_safe(filter, node,
5867 &pf->fdir_filter_list, fdir_node) {
5868 if (filter->fd_id == pf->fd_inv) {
5869 hlist_del(&filter->fdir_node);
5871 pf->fdir_pf_active_filters--;
5877 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5878 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5880 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5881 * @pf: board private structure
5883 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5885 unsigned long min_flush_time;
5886 int flush_wait_retry = 50;
5887 bool disable_atr = false;
5891 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5894 if (!time_after(jiffies, pf->fd_flush_timestamp +
5895 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5898 /* If the flush is happening too quick and we have mostly SB rules we
5899 * should not re-enable ATR for some time.
5901 min_flush_time = pf->fd_flush_timestamp +
5902 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5903 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5905 if (!(time_after(jiffies, min_flush_time)) &&
5906 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5907 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5908 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5912 pf->fd_flush_timestamp = jiffies;
5913 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5914 /* flush all filters */
5915 wr32(&pf->hw, I40E_PFQF_CTL_1,
5916 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5917 i40e_flush(&pf->hw);
5921 /* Check FD flush status every 5-6msec */
5922 usleep_range(5000, 6000);
5923 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5924 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5926 } while (flush_wait_retry--);
5927 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5928 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5930 /* replay sideband filters */
5931 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5933 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5934 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5935 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5936 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5942 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5943 * @pf: board private structure
5945 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5947 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5950 /* We can see up to 256 filter programming desc in transit if the filters are
5951 * being applied really fast; before we see the first
5952 * filter miss error on Rx queue 0. Accumulating enough error messages before
5953 * reacting will make sure we don't cause flush too often.
5955 #define I40E_MAX_FD_PROGRAM_ERROR 256
5958 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5959 * @pf: board private structure
5961 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5964 /* if interface is down do nothing */
5965 if (test_bit(__I40E_DOWN, &pf->state))
5968 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5971 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5972 i40e_fdir_flush_and_replay(pf);
5974 i40e_fdir_check_and_reenable(pf);
5979 * i40e_vsi_link_event - notify VSI of a link event
5980 * @vsi: vsi to be notified
5981 * @link_up: link up or down
5983 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5985 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5988 switch (vsi->type) {
5993 if (!vsi->netdev || !vsi->netdev_registered)
5997 netif_carrier_on(vsi->netdev);
5998 netif_tx_wake_all_queues(vsi->netdev);
6000 netif_carrier_off(vsi->netdev);
6001 netif_tx_stop_all_queues(vsi->netdev);
6005 case I40E_VSI_SRIOV:
6006 case I40E_VSI_VMDQ2:
6008 case I40E_VSI_MIRROR:
6010 /* there is no notification for other VSIs */
6016 * i40e_veb_link_event - notify elements on the veb of a link event
6017 * @veb: veb to be notified
6018 * @link_up: link up or down
6020 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6025 if (!veb || !veb->pf)
6029 /* depth first... */
6030 for (i = 0; i < I40E_MAX_VEB; i++)
6031 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6032 i40e_veb_link_event(pf->veb[i], link_up);
6034 /* ... now the local VSIs */
6035 for (i = 0; i < pf->num_alloc_vsi; i++)
6036 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6037 i40e_vsi_link_event(pf->vsi[i], link_up);
6041 * i40e_link_event - Update netif_carrier status
6042 * @pf: board private structure
6044 static void i40e_link_event(struct i40e_pf *pf)
6046 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6047 u8 new_link_speed, old_link_speed;
6049 bool new_link, old_link;
6051 /* set this to force the get_link_status call to refresh state */
6052 pf->hw.phy.get_link_info = true;
6054 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6056 status = i40e_get_link_status(&pf->hw, &new_link);
6058 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6063 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6064 new_link_speed = pf->hw.phy.link_info.link_speed;
6066 if (new_link == old_link &&
6067 new_link_speed == old_link_speed &&
6068 (test_bit(__I40E_DOWN, &vsi->state) ||
6069 new_link == netif_carrier_ok(vsi->netdev)))
6072 if (!test_bit(__I40E_DOWN, &vsi->state))
6073 i40e_print_link_message(vsi, new_link);
6075 /* Notify the base of the switch tree connected to
6076 * the link. Floating VEBs are not notified.
6078 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6079 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6081 i40e_vsi_link_event(vsi, new_link);
6084 i40e_vc_notify_link_state(pf);
6086 if (pf->flags & I40E_FLAG_PTP)
6087 i40e_ptp_set_increment(pf);
6091 * i40e_watchdog_subtask - periodic checks not using event driven response
6092 * @pf: board private structure
6094 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6098 /* if interface is down do nothing */
6099 if (test_bit(__I40E_DOWN, &pf->state) ||
6100 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6103 /* make sure we don't do these things too often */
6104 if (time_before(jiffies, (pf->service_timer_previous +
6105 pf->service_timer_period)))
6107 pf->service_timer_previous = jiffies;
6109 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6110 i40e_link_event(pf);
6112 /* Update the stats for active netdevs so the network stack
6113 * can look at updated numbers whenever it cares to
6115 for (i = 0; i < pf->num_alloc_vsi; i++)
6116 if (pf->vsi[i] && pf->vsi[i]->netdev)
6117 i40e_update_stats(pf->vsi[i]);
6119 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6120 /* Update the stats for the active switching components */
6121 for (i = 0; i < I40E_MAX_VEB; i++)
6123 i40e_update_veb_stats(pf->veb[i]);
6126 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6130 * i40e_reset_subtask - Set up for resetting the device and driver
6131 * @pf: board private structure
6133 static void i40e_reset_subtask(struct i40e_pf *pf)
6135 u32 reset_flags = 0;
6138 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6139 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
6140 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6142 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6143 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
6144 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6146 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6147 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
6148 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6150 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6151 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
6152 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6154 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6155 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
6156 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6159 /* If there's a recovery already waiting, it takes
6160 * precedence before starting a new reset sequence.
6162 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6163 i40e_handle_reset_warning(pf);
6167 /* If we're already down or resetting, just bail */
6169 !test_bit(__I40E_DOWN, &pf->state) &&
6170 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6171 i40e_do_reset(pf, reset_flags);
6178 * i40e_handle_link_event - Handle link event
6179 * @pf: board private structure
6180 * @e: event info posted on ARQ
6182 static void i40e_handle_link_event(struct i40e_pf *pf,
6183 struct i40e_arq_event_info *e)
6185 struct i40e_hw *hw = &pf->hw;
6186 struct i40e_aqc_get_link_status *status =
6187 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6189 /* save off old link status information */
6190 hw->phy.link_info_old = hw->phy.link_info;
6192 /* Do a new status request to re-enable LSE reporting
6193 * and load new status information into the hw struct
6194 * This completely ignores any state information
6195 * in the ARQ event info, instead choosing to always
6196 * issue the AQ update link status command.
6198 i40e_link_event(pf);
6200 /* check for unqualified module, if link is down */
6201 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6202 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6203 (!(status->link_info & I40E_AQ_LINK_UP)))
6204 dev_err(&pf->pdev->dev,
6205 "The driver failed to link because an unqualified module was detected.\n");
6209 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6210 * @pf: board private structure
6212 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6214 struct i40e_arq_event_info event;
6215 struct i40e_hw *hw = &pf->hw;
6222 /* Do not run clean AQ when PF reset fails */
6223 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6226 /* check for error indications */
6227 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6229 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6230 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6231 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6233 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6234 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6235 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6237 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6238 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6239 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6242 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6244 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6246 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6247 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6248 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6250 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6251 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6252 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6254 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6255 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6256 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6259 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6261 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6262 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6267 ret = i40e_clean_arq_element(hw, &event, &pending);
6268 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6271 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6275 opcode = le16_to_cpu(event.desc.opcode);
6278 case i40e_aqc_opc_get_link_status:
6279 i40e_handle_link_event(pf, &event);
6281 case i40e_aqc_opc_send_msg_to_pf:
6282 ret = i40e_vc_process_vf_msg(pf,
6283 le16_to_cpu(event.desc.retval),
6284 le32_to_cpu(event.desc.cookie_high),
6285 le32_to_cpu(event.desc.cookie_low),
6289 case i40e_aqc_opc_lldp_update_mib:
6290 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6291 #ifdef CONFIG_I40E_DCB
6293 ret = i40e_handle_lldp_event(pf, &event);
6295 #endif /* CONFIG_I40E_DCB */
6297 case i40e_aqc_opc_event_lan_overflow:
6298 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6299 i40e_handle_lan_overflow_event(pf, &event);
6301 case i40e_aqc_opc_send_msg_to_peer:
6302 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6304 case i40e_aqc_opc_nvm_erase:
6305 case i40e_aqc_opc_nvm_update:
6306 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6309 dev_info(&pf->pdev->dev,
6310 "ARQ Error: Unknown event 0x%04x received\n",
6314 } while (pending && (i++ < pf->adminq_work_limit));
6316 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6317 /* re-enable Admin queue interrupt cause */
6318 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6319 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6320 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6323 kfree(event.msg_buf);
6327 * i40e_verify_eeprom - make sure eeprom is good to use
6328 * @pf: board private structure
6330 static void i40e_verify_eeprom(struct i40e_pf *pf)
6334 err = i40e_diag_eeprom_test(&pf->hw);
6336 /* retry in case of garbage read */
6337 err = i40e_diag_eeprom_test(&pf->hw);
6339 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6341 set_bit(__I40E_BAD_EEPROM, &pf->state);
6345 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6346 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6347 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6352 * i40e_enable_pf_switch_lb
6353 * @pf: pointer to the PF structure
6355 * enable switch loop back or die - no point in a return value
6357 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6359 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6360 struct i40e_vsi_context ctxt;
6363 ctxt.seid = pf->main_vsi_seid;
6364 ctxt.pf_num = pf->hw.pf_id;
6366 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6368 dev_info(&pf->pdev->dev,
6369 "couldn't get PF vsi config, err %s aq_err %s\n",
6370 i40e_stat_str(&pf->hw, ret),
6371 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6374 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6375 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6376 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6378 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6380 dev_info(&pf->pdev->dev,
6381 "update vsi switch failed, err %s aq_err %s\n",
6382 i40e_stat_str(&pf->hw, ret),
6383 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6388 * i40e_disable_pf_switch_lb
6389 * @pf: pointer to the PF structure
6391 * disable switch loop back or die - no point in a return value
6393 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6395 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6396 struct i40e_vsi_context ctxt;
6399 ctxt.seid = pf->main_vsi_seid;
6400 ctxt.pf_num = pf->hw.pf_id;
6402 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6404 dev_info(&pf->pdev->dev,
6405 "couldn't get PF vsi config, err %s aq_err %s\n",
6406 i40e_stat_str(&pf->hw, ret),
6407 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6410 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6411 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6412 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6414 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6416 dev_info(&pf->pdev->dev,
6417 "update vsi switch failed, err %s aq_err %s\n",
6418 i40e_stat_str(&pf->hw, ret),
6419 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6424 * i40e_config_bridge_mode - Configure the HW bridge mode
6425 * @veb: pointer to the bridge instance
6427 * Configure the loop back mode for the LAN VSI that is downlink to the
6428 * specified HW bridge instance. It is expected this function is called
6429 * when a new HW bridge is instantiated.
6431 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6433 struct i40e_pf *pf = veb->pf;
6435 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6436 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6437 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6438 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6439 i40e_disable_pf_switch_lb(pf);
6441 i40e_enable_pf_switch_lb(pf);
6445 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6446 * @veb: pointer to the VEB instance
6448 * This is a recursive function that first builds the attached VSIs then
6449 * recurses in to build the next layer of VEB. We track the connections
6450 * through our own index numbers because the seid's from the HW could
6451 * change across the reset.
6453 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6455 struct i40e_vsi *ctl_vsi = NULL;
6456 struct i40e_pf *pf = veb->pf;
6460 /* build VSI that owns this VEB, temporarily attached to base VEB */
6461 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6463 pf->vsi[v]->veb_idx == veb->idx &&
6464 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6465 ctl_vsi = pf->vsi[v];
6470 dev_info(&pf->pdev->dev,
6471 "missing owner VSI for veb_idx %d\n", veb->idx);
6473 goto end_reconstitute;
6475 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6476 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6477 ret = i40e_add_vsi(ctl_vsi);
6479 dev_info(&pf->pdev->dev,
6480 "rebuild of veb_idx %d owner VSI failed: %d\n",
6482 goto end_reconstitute;
6484 i40e_vsi_reset_stats(ctl_vsi);
6486 /* create the VEB in the switch and move the VSI onto the VEB */
6487 ret = i40e_add_veb(veb, ctl_vsi);
6489 goto end_reconstitute;
6491 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6492 veb->bridge_mode = BRIDGE_MODE_VEB;
6494 veb->bridge_mode = BRIDGE_MODE_VEPA;
6495 i40e_config_bridge_mode(veb);
6497 /* create the remaining VSIs attached to this VEB */
6498 for (v = 0; v < pf->num_alloc_vsi; v++) {
6499 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6502 if (pf->vsi[v]->veb_idx == veb->idx) {
6503 struct i40e_vsi *vsi = pf->vsi[v];
6505 vsi->uplink_seid = veb->seid;
6506 ret = i40e_add_vsi(vsi);
6508 dev_info(&pf->pdev->dev,
6509 "rebuild of vsi_idx %d failed: %d\n",
6511 goto end_reconstitute;
6513 i40e_vsi_reset_stats(vsi);
6517 /* create any VEBs attached to this VEB - RECURSION */
6518 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6519 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6520 pf->veb[veb_idx]->uplink_seid = veb->seid;
6521 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6532 * i40e_get_capabilities - get info about the HW
6533 * @pf: the PF struct
6535 static int i40e_get_capabilities(struct i40e_pf *pf)
6537 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6542 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6544 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6548 /* this loads the data into the hw struct for us */
6549 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6551 i40e_aqc_opc_list_func_capabilities,
6553 /* data loaded, buffer no longer needed */
6556 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6557 /* retry with a larger buffer */
6558 buf_len = data_size;
6559 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6560 dev_info(&pf->pdev->dev,
6561 "capability discovery failed, err %s aq_err %s\n",
6562 i40e_stat_str(&pf->hw, err),
6563 i40e_aq_str(&pf->hw,
6564 pf->hw.aq.asq_last_status));
6569 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6570 dev_info(&pf->pdev->dev,
6571 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6572 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6573 pf->hw.func_caps.num_msix_vectors,
6574 pf->hw.func_caps.num_msix_vectors_vf,
6575 pf->hw.func_caps.fd_filters_guaranteed,
6576 pf->hw.func_caps.fd_filters_best_effort,
6577 pf->hw.func_caps.num_tx_qp,
6578 pf->hw.func_caps.num_vsis);
6580 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6581 + pf->hw.func_caps.num_vfs)
6582 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6583 dev_info(&pf->pdev->dev,
6584 "got num_vsis %d, setting num_vsis to %d\n",
6585 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6586 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6592 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6595 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6596 * @pf: board private structure
6598 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6600 struct i40e_vsi *vsi;
6603 /* quick workaround for an NVM issue that leaves a critical register
6606 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6607 static const u32 hkey[] = {
6608 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6609 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6610 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6613 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6614 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6617 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6620 /* find existing VSI and see if it needs configuring */
6622 for (i = 0; i < pf->num_alloc_vsi; i++) {
6623 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6629 /* create a new VSI if none exists */
6631 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6632 pf->vsi[pf->lan_vsi]->seid, 0);
6634 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6635 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6640 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6644 * i40e_fdir_teardown - release the Flow Director resources
6645 * @pf: board private structure
6647 static void i40e_fdir_teardown(struct i40e_pf *pf)
6651 i40e_fdir_filter_exit(pf);
6652 for (i = 0; i < pf->num_alloc_vsi; i++) {
6653 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6654 i40e_vsi_release(pf->vsi[i]);
6661 * i40e_prep_for_reset - prep for the core to reset
6662 * @pf: board private structure
6664 * Close up the VFs and other things in prep for PF Reset.
6666 static void i40e_prep_for_reset(struct i40e_pf *pf)
6668 struct i40e_hw *hw = &pf->hw;
6669 i40e_status ret = 0;
6672 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6673 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6676 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6678 /* quiesce the VSIs and their queues that are not already DOWN */
6679 i40e_pf_quiesce_all_vsi(pf);
6681 for (v = 0; v < pf->num_alloc_vsi; v++) {
6683 pf->vsi[v]->seid = 0;
6686 i40e_shutdown_adminq(&pf->hw);
6688 /* call shutdown HMC */
6689 if (hw->hmc.hmc_obj) {
6690 ret = i40e_shutdown_lan_hmc(hw);
6692 dev_warn(&pf->pdev->dev,
6693 "shutdown_lan_hmc failed: %d\n", ret);
6698 * i40e_send_version - update firmware with driver version
6701 static void i40e_send_version(struct i40e_pf *pf)
6703 struct i40e_driver_version dv;
6705 dv.major_version = DRV_VERSION_MAJOR;
6706 dv.minor_version = DRV_VERSION_MINOR;
6707 dv.build_version = DRV_VERSION_BUILD;
6708 dv.subbuild_version = 0;
6709 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6710 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6714 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6715 * @pf: board private structure
6716 * @reinit: if the Main VSI needs to re-initialized.
6718 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6720 struct i40e_hw *hw = &pf->hw;
6721 u8 set_fc_aq_fail = 0;
6726 /* Now we wait for GRST to settle out.
6727 * We don't have to delete the VEBs or VSIs from the hw switch
6728 * because the reset will make them disappear.
6730 ret = i40e_pf_reset(hw);
6732 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6733 set_bit(__I40E_RESET_FAILED, &pf->state);
6734 goto clear_recovery;
6738 if (test_bit(__I40E_DOWN, &pf->state))
6739 goto clear_recovery;
6740 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6742 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6743 ret = i40e_init_adminq(&pf->hw);
6745 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6746 i40e_stat_str(&pf->hw, ret),
6747 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6748 goto clear_recovery;
6751 /* re-verify the eeprom if we just had an EMP reset */
6752 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6753 i40e_verify_eeprom(pf);
6755 i40e_clear_pxe_mode(hw);
6756 ret = i40e_get_capabilities(pf);
6758 goto end_core_reset;
6760 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6761 hw->func_caps.num_rx_qp,
6762 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6764 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6765 goto end_core_reset;
6767 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6769 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6770 goto end_core_reset;
6773 #ifdef CONFIG_I40E_DCB
6774 ret = i40e_init_pf_dcb(pf);
6776 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6777 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6778 /* Continue without DCB enabled */
6780 #endif /* CONFIG_I40E_DCB */
6782 i40e_init_pf_fcoe(pf);
6785 /* do basic switch setup */
6786 ret = i40e_setup_pf_switch(pf, reinit);
6788 goto end_core_reset;
6790 /* driver is only interested in link up/down and module qualification
6791 * reports from firmware
6793 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6794 I40E_AQ_EVENT_LINK_UPDOWN |
6795 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6797 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6798 i40e_stat_str(&pf->hw, ret),
6799 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6801 /* make sure our flow control settings are restored */
6802 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6804 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6805 i40e_stat_str(&pf->hw, ret),
6806 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6808 /* Rebuild the VSIs and VEBs that existed before reset.
6809 * They are still in our local switch element arrays, so only
6810 * need to rebuild the switch model in the HW.
6812 * If there were VEBs but the reconstitution failed, we'll try
6813 * try to recover minimal use by getting the basic PF VSI working.
6815 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6816 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6817 /* find the one VEB connected to the MAC, and find orphans */
6818 for (v = 0; v < I40E_MAX_VEB; v++) {
6822 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6823 pf->veb[v]->uplink_seid == 0) {
6824 ret = i40e_reconstitute_veb(pf->veb[v]);
6829 /* If Main VEB failed, we're in deep doodoo,
6830 * so give up rebuilding the switch and set up
6831 * for minimal rebuild of PF VSI.
6832 * If orphan failed, we'll report the error
6833 * but try to keep going.
6835 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6836 dev_info(&pf->pdev->dev,
6837 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6839 pf->vsi[pf->lan_vsi]->uplink_seid
6842 } else if (pf->veb[v]->uplink_seid == 0) {
6843 dev_info(&pf->pdev->dev,
6844 "rebuild of orphan VEB failed: %d\n",
6851 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6852 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6853 /* no VEB, so rebuild only the Main VSI */
6854 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6856 dev_info(&pf->pdev->dev,
6857 "rebuild of Main VSI failed: %d\n", ret);
6858 goto end_core_reset;
6862 /* Reconfigure hardware for allowing smaller MSS in the case
6863 * of TSO, so that we avoid the MDD being fired and causing
6864 * a reset in the case of small MSS+TSO.
6866 #define I40E_REG_MSS 0x000E64DC
6867 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6868 #define I40E_64BYTE_MSS 0x400000
6869 val = rd32(hw, I40E_REG_MSS);
6870 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6871 val &= ~I40E_REG_MSS_MIN_MASK;
6872 val |= I40E_64BYTE_MSS;
6873 wr32(hw, I40E_REG_MSS, val);
6876 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6877 (pf->hw.aq.fw_maj_ver < 4)) {
6879 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6881 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6882 i40e_stat_str(&pf->hw, ret),
6883 i40e_aq_str(&pf->hw,
6884 pf->hw.aq.asq_last_status));
6886 /* reinit the misc interrupt */
6887 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6888 ret = i40e_setup_misc_vector(pf);
6890 /* Add a filter to drop all Flow control frames from any VSI from being
6891 * transmitted. By doing so we stop a malicious VF from sending out
6892 * PAUSE or PFC frames and potentially controlling traffic for other
6894 * The FW can still send Flow control frames if enabled.
6896 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6899 /* restart the VSIs that were rebuilt and running before the reset */
6900 i40e_pf_unquiesce_all_vsi(pf);
6902 if (pf->num_alloc_vfs) {
6903 for (v = 0; v < pf->num_alloc_vfs; v++)
6904 i40e_reset_vf(&pf->vf[v], true);
6907 /* tell the firmware that we're starting */
6908 i40e_send_version(pf);
6911 clear_bit(__I40E_RESET_FAILED, &pf->state);
6913 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6917 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6918 * @pf: board private structure
6920 * Close up the VFs and other things in prep for a Core Reset,
6921 * then get ready to rebuild the world.
6923 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6925 i40e_prep_for_reset(pf);
6926 i40e_reset_and_rebuild(pf, false);
6930 * i40e_handle_mdd_event
6931 * @pf: pointer to the PF structure
6933 * Called from the MDD irq handler to identify possibly malicious vfs
6935 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6937 struct i40e_hw *hw = &pf->hw;
6938 bool mdd_detected = false;
6939 bool pf_mdd_detected = false;
6944 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6947 /* find what triggered the MDD event */
6948 reg = rd32(hw, I40E_GL_MDET_TX);
6949 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6950 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6951 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6952 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6953 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6954 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6955 I40E_GL_MDET_TX_EVENT_SHIFT;
6956 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6957 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6958 pf->hw.func_caps.base_queue;
6959 if (netif_msg_tx_err(pf))
6960 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6961 event, queue, pf_num, vf_num);
6962 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6963 mdd_detected = true;
6965 reg = rd32(hw, I40E_GL_MDET_RX);
6966 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6967 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6968 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6969 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6970 I40E_GL_MDET_RX_EVENT_SHIFT;
6971 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6972 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6973 pf->hw.func_caps.base_queue;
6974 if (netif_msg_rx_err(pf))
6975 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6976 event, queue, func);
6977 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6978 mdd_detected = true;
6982 reg = rd32(hw, I40E_PF_MDET_TX);
6983 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6984 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6985 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6986 pf_mdd_detected = true;
6988 reg = rd32(hw, I40E_PF_MDET_RX);
6989 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6990 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6991 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6992 pf_mdd_detected = true;
6994 /* Queue belongs to the PF, initiate a reset */
6995 if (pf_mdd_detected) {
6996 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6997 i40e_service_event_schedule(pf);
7001 /* see if one of the VFs needs its hand slapped */
7002 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7004 reg = rd32(hw, I40E_VP_MDET_TX(i));
7005 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7006 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7007 vf->num_mdd_events++;
7008 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7012 reg = rd32(hw, I40E_VP_MDET_RX(i));
7013 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7014 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7015 vf->num_mdd_events++;
7016 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7020 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7021 dev_info(&pf->pdev->dev,
7022 "Too many MDD events on VF %d, disabled\n", i);
7023 dev_info(&pf->pdev->dev,
7024 "Use PF Control I/F to re-enable the VF\n");
7025 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7029 /* re-enable mdd interrupt cause */
7030 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7031 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7032 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7033 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7037 #ifdef CONFIG_I40E_VXLAN
7039 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
7040 * @pf: board private structure
7042 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
7044 struct i40e_hw *hw = &pf->hw;
7049 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
7052 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
7054 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7055 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
7056 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
7057 port = pf->vxlan_ports[i];
7059 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7060 I40E_AQC_TUNNEL_TYPE_VXLAN,
7063 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7066 dev_info(&pf->pdev->dev,
7067 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
7068 port ? "add" : "delete",
7070 i40e_stat_str(&pf->hw, ret),
7071 i40e_aq_str(&pf->hw,
7072 pf->hw.aq.asq_last_status));
7073 pf->vxlan_ports[i] = 0;
7081 * i40e_service_task - Run the driver's async subtasks
7082 * @work: pointer to work_struct containing our data
7084 static void i40e_service_task(struct work_struct *work)
7086 struct i40e_pf *pf = container_of(work,
7089 unsigned long start_time = jiffies;
7091 /* don't bother with service tasks if a reset is in progress */
7092 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7093 i40e_service_event_complete(pf);
7097 i40e_detect_recover_hung(pf);
7098 i40e_reset_subtask(pf);
7099 i40e_handle_mdd_event(pf);
7100 i40e_vc_process_vflr_event(pf);
7101 i40e_watchdog_subtask(pf);
7102 i40e_fdir_reinit_subtask(pf);
7103 i40e_sync_filters_subtask(pf);
7104 #ifdef CONFIG_I40E_VXLAN
7105 i40e_sync_vxlan_filters_subtask(pf);
7107 i40e_clean_adminq_subtask(pf);
7109 i40e_service_event_complete(pf);
7111 /* If the tasks have taken longer than one timer cycle or there
7112 * is more work to be done, reschedule the service task now
7113 * rather than wait for the timer to tick again.
7115 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7116 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7117 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7118 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7119 i40e_service_event_schedule(pf);
7123 * i40e_service_timer - timer callback
7124 * @data: pointer to PF struct
7126 static void i40e_service_timer(unsigned long data)
7128 struct i40e_pf *pf = (struct i40e_pf *)data;
7130 mod_timer(&pf->service_timer,
7131 round_jiffies(jiffies + pf->service_timer_period));
7132 i40e_service_event_schedule(pf);
7136 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7137 * @vsi: the VSI being configured
7139 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7141 struct i40e_pf *pf = vsi->back;
7143 switch (vsi->type) {
7145 vsi->alloc_queue_pairs = pf->num_lan_qps;
7146 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7147 I40E_REQ_DESCRIPTOR_MULTIPLE);
7148 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7149 vsi->num_q_vectors = pf->num_lan_msix;
7151 vsi->num_q_vectors = 1;
7156 vsi->alloc_queue_pairs = 1;
7157 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7158 I40E_REQ_DESCRIPTOR_MULTIPLE);
7159 vsi->num_q_vectors = 1;
7162 case I40E_VSI_VMDQ2:
7163 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7164 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7165 I40E_REQ_DESCRIPTOR_MULTIPLE);
7166 vsi->num_q_vectors = pf->num_vmdq_msix;
7169 case I40E_VSI_SRIOV:
7170 vsi->alloc_queue_pairs = pf->num_vf_qps;
7171 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7172 I40E_REQ_DESCRIPTOR_MULTIPLE);
7177 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7178 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7179 I40E_REQ_DESCRIPTOR_MULTIPLE);
7180 vsi->num_q_vectors = pf->num_fcoe_msix;
7183 #endif /* I40E_FCOE */
7193 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7194 * @type: VSI pointer
7195 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7197 * On error: returns error code (negative)
7198 * On success: returns 0
7200 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7205 /* allocate memory for both Tx and Rx ring pointers */
7206 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7207 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7210 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7212 if (alloc_qvectors) {
7213 /* allocate memory for q_vector pointers */
7214 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7215 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7216 if (!vsi->q_vectors) {
7224 kfree(vsi->tx_rings);
7229 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7230 * @pf: board private structure
7231 * @type: type of VSI
7233 * On error: returns error code (negative)
7234 * On success: returns vsi index in PF (positive)
7236 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7239 struct i40e_vsi *vsi;
7243 /* Need to protect the allocation of the VSIs at the PF level */
7244 mutex_lock(&pf->switch_mutex);
7246 /* VSI list may be fragmented if VSI creation/destruction has
7247 * been happening. We can afford to do a quick scan to look
7248 * for any free VSIs in the list.
7250 * find next empty vsi slot, looping back around if necessary
7253 while (i < pf->num_alloc_vsi && pf->vsi[i])
7255 if (i >= pf->num_alloc_vsi) {
7257 while (i < pf->next_vsi && pf->vsi[i])
7261 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7262 vsi_idx = i; /* Found one! */
7265 goto unlock_pf; /* out of VSI slots! */
7269 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7276 set_bit(__I40E_DOWN, &vsi->state);
7279 vsi->rx_itr_setting = pf->rx_itr_default;
7280 vsi->tx_itr_setting = pf->tx_itr_default;
7281 vsi->int_rate_limit = 0;
7282 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7283 pf->rss_table_size : 64;
7284 vsi->netdev_registered = false;
7285 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7286 INIT_LIST_HEAD(&vsi->mac_filter_list);
7287 vsi->irqs_ready = false;
7289 ret = i40e_set_num_rings_in_vsi(vsi);
7293 ret = i40e_vsi_alloc_arrays(vsi, true);
7297 /* Setup default MSIX irq handler for VSI */
7298 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7300 /* Initialize VSI lock */
7301 spin_lock_init(&vsi->mac_filter_list_lock);
7302 pf->vsi[vsi_idx] = vsi;
7307 pf->next_vsi = i - 1;
7310 mutex_unlock(&pf->switch_mutex);
7315 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7316 * @type: VSI pointer
7317 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7319 * On error: returns error code (negative)
7320 * On success: returns 0
7322 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7324 /* free the ring and vector containers */
7325 if (free_qvectors) {
7326 kfree(vsi->q_vectors);
7327 vsi->q_vectors = NULL;
7329 kfree(vsi->tx_rings);
7330 vsi->tx_rings = NULL;
7331 vsi->rx_rings = NULL;
7335 * i40e_vsi_clear - Deallocate the VSI provided
7336 * @vsi: the VSI being un-configured
7338 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7349 mutex_lock(&pf->switch_mutex);
7350 if (!pf->vsi[vsi->idx]) {
7351 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7352 vsi->idx, vsi->idx, vsi, vsi->type);
7356 if (pf->vsi[vsi->idx] != vsi) {
7357 dev_err(&pf->pdev->dev,
7358 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7359 pf->vsi[vsi->idx]->idx,
7361 pf->vsi[vsi->idx]->type,
7362 vsi->idx, vsi, vsi->type);
7366 /* updates the PF for this cleared vsi */
7367 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7368 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7370 i40e_vsi_free_arrays(vsi, true);
7372 pf->vsi[vsi->idx] = NULL;
7373 if (vsi->idx < pf->next_vsi)
7374 pf->next_vsi = vsi->idx;
7377 mutex_unlock(&pf->switch_mutex);
7385 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7386 * @vsi: the VSI being cleaned
7388 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7392 if (vsi->tx_rings && vsi->tx_rings[0]) {
7393 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7394 kfree_rcu(vsi->tx_rings[i], rcu);
7395 vsi->tx_rings[i] = NULL;
7396 vsi->rx_rings[i] = NULL;
7402 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7403 * @vsi: the VSI being configured
7405 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7407 struct i40e_ring *tx_ring, *rx_ring;
7408 struct i40e_pf *pf = vsi->back;
7411 /* Set basic values in the rings to be used later during open() */
7412 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7413 /* allocate space for both Tx and Rx in one shot */
7414 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7418 tx_ring->queue_index = i;
7419 tx_ring->reg_idx = vsi->base_queue + i;
7420 tx_ring->ring_active = false;
7422 tx_ring->netdev = vsi->netdev;
7423 tx_ring->dev = &pf->pdev->dev;
7424 tx_ring->count = vsi->num_desc;
7426 tx_ring->dcb_tc = 0;
7427 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7428 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7429 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7430 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7431 vsi->tx_rings[i] = tx_ring;
7433 rx_ring = &tx_ring[1];
7434 rx_ring->queue_index = i;
7435 rx_ring->reg_idx = vsi->base_queue + i;
7436 rx_ring->ring_active = false;
7438 rx_ring->netdev = vsi->netdev;
7439 rx_ring->dev = &pf->pdev->dev;
7440 rx_ring->count = vsi->num_desc;
7442 rx_ring->dcb_tc = 0;
7443 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7444 set_ring_16byte_desc_enabled(rx_ring);
7446 clear_ring_16byte_desc_enabled(rx_ring);
7447 vsi->rx_rings[i] = rx_ring;
7453 i40e_vsi_clear_rings(vsi);
7458 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7459 * @pf: board private structure
7460 * @vectors: the number of MSI-X vectors to request
7462 * Returns the number of vectors reserved, or error
7464 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7466 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7467 I40E_MIN_MSIX, vectors);
7469 dev_info(&pf->pdev->dev,
7470 "MSI-X vector reservation failed: %d\n", vectors);
7478 * i40e_init_msix - Setup the MSIX capability
7479 * @pf: board private structure
7481 * Work with the OS to set up the MSIX vectors needed.
7483 * Returns the number of vectors reserved or negative on failure
7485 static int i40e_init_msix(struct i40e_pf *pf)
7487 struct i40e_hw *hw = &pf->hw;
7492 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7495 /* The number of vectors we'll request will be comprised of:
7496 * - Add 1 for "other" cause for Admin Queue events, etc.
7497 * - The number of LAN queue pairs
7498 * - Queues being used for RSS.
7499 * We don't need as many as max_rss_size vectors.
7500 * use rss_size instead in the calculation since that
7501 * is governed by number of cpus in the system.
7502 * - assumes symmetric Tx/Rx pairing
7503 * - The number of VMDq pairs
7505 * - The number of FCOE qps.
7507 * Once we count this up, try the request.
7509 * If we can't get what we want, we'll simplify to nearly nothing
7510 * and try again. If that still fails, we punt.
7512 vectors_left = hw->func_caps.num_msix_vectors;
7515 /* reserve one vector for miscellaneous handler */
7521 /* reserve vectors for the main PF traffic queues */
7522 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7523 vectors_left -= pf->num_lan_msix;
7524 v_budget += pf->num_lan_msix;
7526 /* reserve one vector for sideband flow director */
7527 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7532 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7537 /* can we reserve enough for FCoE? */
7538 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7540 pf->num_fcoe_msix = 0;
7541 else if (vectors_left >= pf->num_fcoe_qps)
7542 pf->num_fcoe_msix = pf->num_fcoe_qps;
7544 pf->num_fcoe_msix = 1;
7545 v_budget += pf->num_fcoe_msix;
7546 vectors_left -= pf->num_fcoe_msix;
7550 /* any vectors left over go for VMDq support */
7551 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7552 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7553 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7555 /* if we're short on vectors for what's desired, we limit
7556 * the queues per vmdq. If this is still more than are
7557 * available, the user will need to change the number of
7558 * queues/vectors used by the PF later with the ethtool
7561 if (vmdq_vecs < vmdq_vecs_wanted)
7562 pf->num_vmdq_qps = 1;
7563 pf->num_vmdq_msix = pf->num_vmdq_qps;
7565 v_budget += vmdq_vecs;
7566 vectors_left -= vmdq_vecs;
7569 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7571 if (!pf->msix_entries)
7574 for (i = 0; i < v_budget; i++)
7575 pf->msix_entries[i].entry = i;
7576 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7578 if (v_actual != v_budget) {
7579 /* If we have limited resources, we will start with no vectors
7580 * for the special features and then allocate vectors to some
7581 * of these features based on the policy and at the end disable
7582 * the features that did not get any vectors.
7585 pf->num_fcoe_qps = 0;
7586 pf->num_fcoe_msix = 0;
7588 pf->num_vmdq_msix = 0;
7591 if (v_actual < I40E_MIN_MSIX) {
7592 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7593 kfree(pf->msix_entries);
7594 pf->msix_entries = NULL;
7597 } else if (v_actual == I40E_MIN_MSIX) {
7598 /* Adjust for minimal MSIX use */
7599 pf->num_vmdq_vsis = 0;
7600 pf->num_vmdq_qps = 0;
7601 pf->num_lan_qps = 1;
7602 pf->num_lan_msix = 1;
7604 } else if (v_actual != v_budget) {
7607 /* reserve the misc vector */
7610 /* Scale vector usage down */
7611 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7612 pf->num_vmdq_vsis = 1;
7613 pf->num_vmdq_qps = 1;
7614 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7616 /* partition out the remaining vectors */
7619 pf->num_lan_msix = 1;
7623 /* give one vector to FCoE */
7624 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7625 pf->num_lan_msix = 1;
7626 pf->num_fcoe_msix = 1;
7629 pf->num_lan_msix = 2;
7634 /* give one vector to FCoE */
7635 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7636 pf->num_fcoe_msix = 1;
7640 /* give the rest to the PF */
7641 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7646 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7647 (pf->num_vmdq_msix == 0)) {
7648 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7649 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7653 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7654 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7655 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7662 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7663 * @vsi: the VSI being configured
7664 * @v_idx: index of the vector in the vsi struct
7666 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7668 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7670 struct i40e_q_vector *q_vector;
7672 /* allocate q_vector */
7673 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7677 q_vector->vsi = vsi;
7678 q_vector->v_idx = v_idx;
7679 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7681 netif_napi_add(vsi->netdev, &q_vector->napi,
7682 i40e_napi_poll, NAPI_POLL_WEIGHT);
7684 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7685 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7687 /* tie q_vector and vsi together */
7688 vsi->q_vectors[v_idx] = q_vector;
7694 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7695 * @vsi: the VSI being configured
7697 * We allocate one q_vector per queue interrupt. If allocation fails we
7700 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7702 struct i40e_pf *pf = vsi->back;
7703 int v_idx, num_q_vectors;
7706 /* if not MSIX, give the one vector only to the LAN VSI */
7707 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7708 num_q_vectors = vsi->num_q_vectors;
7709 else if (vsi == pf->vsi[pf->lan_vsi])
7714 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7715 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7724 i40e_free_q_vector(vsi, v_idx);
7730 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7731 * @pf: board private structure to initialize
7733 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7738 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7739 vectors = i40e_init_msix(pf);
7741 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7743 I40E_FLAG_FCOE_ENABLED |
7745 I40E_FLAG_RSS_ENABLED |
7746 I40E_FLAG_DCB_CAPABLE |
7747 I40E_FLAG_SRIOV_ENABLED |
7748 I40E_FLAG_FD_SB_ENABLED |
7749 I40E_FLAG_FD_ATR_ENABLED |
7750 I40E_FLAG_VMDQ_ENABLED);
7752 /* rework the queue expectations without MSIX */
7753 i40e_determine_queue_usage(pf);
7757 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7758 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7759 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7760 vectors = pci_enable_msi(pf->pdev);
7762 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7764 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7766 vectors = 1; /* one MSI or Legacy vector */
7769 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7770 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7772 /* set up vector assignment tracking */
7773 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7774 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7775 if (!pf->irq_pile) {
7776 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7779 pf->irq_pile->num_entries = vectors;
7780 pf->irq_pile->search_hint = 0;
7782 /* track first vector for misc interrupts, ignore return */
7783 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7789 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7790 * @pf: board private structure
7792 * This sets up the handler for MSIX 0, which is used to manage the
7793 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7794 * when in MSI or Legacy interrupt mode.
7796 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7798 struct i40e_hw *hw = &pf->hw;
7801 /* Only request the irq if this is the first time through, and
7802 * not when we're rebuilding after a Reset
7804 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7805 err = request_irq(pf->msix_entries[0].vector,
7806 i40e_intr, 0, pf->int_name, pf);
7808 dev_info(&pf->pdev->dev,
7809 "request_irq for %s failed: %d\n",
7815 i40e_enable_misc_int_causes(pf);
7817 /* associate no queues to the misc vector */
7818 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7819 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7823 i40e_irq_dynamic_enable_icr0(pf);
7829 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7830 * @vsi: vsi structure
7831 * @seed: RSS hash seed
7833 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7835 struct i40e_aqc_get_set_rss_key_data rss_key;
7836 struct i40e_pf *pf = vsi->back;
7837 struct i40e_hw *hw = &pf->hw;
7838 bool pf_lut = false;
7842 memset(&rss_key, 0, sizeof(rss_key));
7843 memcpy(&rss_key, seed, sizeof(rss_key));
7845 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7849 /* Populate the LUT with max no. of queues in round robin fashion */
7850 for (i = 0; i < vsi->rss_table_size; i++)
7851 rss_lut[i] = i % vsi->rss_size;
7853 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7855 dev_info(&pf->pdev->dev,
7856 "Cannot set RSS key, err %s aq_err %s\n",
7857 i40e_stat_str(&pf->hw, ret),
7858 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7859 goto config_rss_aq_out;
7862 if (vsi->type == I40E_VSI_MAIN)
7865 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7866 vsi->rss_table_size);
7868 dev_info(&pf->pdev->dev,
7869 "Cannot set RSS lut, err %s aq_err %s\n",
7870 i40e_stat_str(&pf->hw, ret),
7871 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7879 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7880 * @vsi: VSI structure
7882 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7884 u8 seed[I40E_HKEY_ARRAY_SIZE];
7885 struct i40e_pf *pf = vsi->back;
7887 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7888 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7890 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7891 return i40e_config_rss_aq(vsi, seed);
7897 * i40e_config_rss_reg - Prepare for RSS if used
7898 * @pf: board private structure
7899 * @seed: RSS hash seed
7901 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7903 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7904 struct i40e_hw *hw = &pf->hw;
7905 u32 *seed_dw = (u32 *)seed;
7906 u32 current_queue = 0;
7910 /* Fill out hash function seed */
7911 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7912 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7914 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7916 for (j = 0; j < 4; j++) {
7917 if (current_queue == vsi->rss_size)
7919 lut |= ((current_queue) << (8 * j));
7922 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7930 * i40e_config_rss - Prepare for RSS if used
7931 * @pf: board private structure
7933 static int i40e_config_rss(struct i40e_pf *pf)
7935 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7936 u8 seed[I40E_HKEY_ARRAY_SIZE];
7937 struct i40e_hw *hw = &pf->hw;
7941 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7943 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7944 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7945 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7946 hena |= i40e_pf_get_default_rss_hena(pf);
7948 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7949 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7951 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7953 /* Determine the RSS table size based on the hardware capabilities */
7954 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7955 reg_val = (pf->rss_table_size == 512) ?
7956 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7957 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7958 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7960 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7961 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7963 return i40e_config_rss_reg(pf, seed);
7967 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7968 * @pf: board private structure
7969 * @queue_count: the requested queue count for rss.
7971 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7972 * count which may be different from the requested queue count.
7974 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7976 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7979 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7982 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7984 if (queue_count != vsi->num_queue_pairs) {
7985 vsi->req_queue_pairs = queue_count;
7986 i40e_prep_for_reset(pf);
7988 pf->rss_size = new_rss_size;
7990 i40e_reset_and_rebuild(pf, true);
7991 i40e_config_rss(pf);
7993 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7994 return pf->rss_size;
7998 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7999 * @pf: board private structure
8001 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8004 bool min_valid, max_valid;
8007 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8008 &min_valid, &max_valid);
8012 pf->npar_min_bw = min_bw;
8014 pf->npar_max_bw = max_bw;
8021 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8022 * @pf: board private structure
8024 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8026 struct i40e_aqc_configure_partition_bw_data bw_data;
8029 /* Set the valid bit for this PF */
8030 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8031 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8032 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8034 /* Set the new bandwidths */
8035 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8041 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8042 * @pf: board private structure
8044 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8046 /* Commit temporary BW setting to permanent NVM image */
8047 enum i40e_admin_queue_err last_aq_status;
8051 if (pf->hw.partition_id != 1) {
8052 dev_info(&pf->pdev->dev,
8053 "Commit BW only works on partition 1! This is partition %d",
8054 pf->hw.partition_id);
8055 ret = I40E_NOT_SUPPORTED;
8059 /* Acquire NVM for read access */
8060 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8061 last_aq_status = pf->hw.aq.asq_last_status;
8063 dev_info(&pf->pdev->dev,
8064 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8065 i40e_stat_str(&pf->hw, ret),
8066 i40e_aq_str(&pf->hw, last_aq_status));
8070 /* Read word 0x10 of NVM - SW compatibility word 1 */
8071 ret = i40e_aq_read_nvm(&pf->hw,
8072 I40E_SR_NVM_CONTROL_WORD,
8073 0x10, sizeof(nvm_word), &nvm_word,
8075 /* Save off last admin queue command status before releasing
8078 last_aq_status = pf->hw.aq.asq_last_status;
8079 i40e_release_nvm(&pf->hw);
8081 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8082 i40e_stat_str(&pf->hw, ret),
8083 i40e_aq_str(&pf->hw, last_aq_status));
8087 /* Wait a bit for NVM release to complete */
8090 /* Acquire NVM for write access */
8091 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8092 last_aq_status = pf->hw.aq.asq_last_status;
8094 dev_info(&pf->pdev->dev,
8095 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8096 i40e_stat_str(&pf->hw, ret),
8097 i40e_aq_str(&pf->hw, last_aq_status));
8100 /* Write it back out unchanged to initiate update NVM,
8101 * which will force a write of the shadow (alt) RAM to
8102 * the NVM - thus storing the bandwidth values permanently.
8104 ret = i40e_aq_update_nvm(&pf->hw,
8105 I40E_SR_NVM_CONTROL_WORD,
8106 0x10, sizeof(nvm_word),
8107 &nvm_word, true, NULL);
8108 /* Save off last admin queue command status before releasing
8111 last_aq_status = pf->hw.aq.asq_last_status;
8112 i40e_release_nvm(&pf->hw);
8114 dev_info(&pf->pdev->dev,
8115 "BW settings NOT SAVED, err %s aq_err %s\n",
8116 i40e_stat_str(&pf->hw, ret),
8117 i40e_aq_str(&pf->hw, last_aq_status));
8124 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8125 * @pf: board private structure to initialize
8127 * i40e_sw_init initializes the Adapter private data structure.
8128 * Fields are initialized based on PCI device information and
8129 * OS network device settings (MTU size).
8131 static int i40e_sw_init(struct i40e_pf *pf)
8136 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8137 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8138 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
8139 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8140 if (I40E_DEBUG_USER & debug)
8141 pf->hw.debug_mask = debug;
8142 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8143 I40E_DEFAULT_MSG_ENABLE);
8146 /* Set default capability flags */
8147 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8148 I40E_FLAG_MSI_ENABLED |
8149 I40E_FLAG_LINK_POLLING_ENABLED |
8150 I40E_FLAG_MSIX_ENABLED;
8152 if (iommu_present(&pci_bus_type))
8153 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8155 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8157 /* Set default ITR */
8158 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8159 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8161 /* Depending on PF configurations, it is possible that the RSS
8162 * maximum might end up larger than the available queues
8164 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8166 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8167 pf->rss_size_max = min_t(int, pf->rss_size_max,
8168 pf->hw.func_caps.num_tx_qp);
8169 if (pf->hw.func_caps.rss) {
8170 pf->flags |= I40E_FLAG_RSS_ENABLED;
8171 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
8174 /* MFP mode enabled */
8175 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8176 pf->flags |= I40E_FLAG_MFP_ENABLED;
8177 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8178 if (i40e_get_npar_bw_setting(pf))
8179 dev_warn(&pf->pdev->dev,
8180 "Could not get NPAR bw settings\n");
8182 dev_info(&pf->pdev->dev,
8183 "Min BW = %8.8x, Max BW = %8.8x\n",
8184 pf->npar_min_bw, pf->npar_max_bw);
8187 /* FW/NVM is not yet fixed in this regard */
8188 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8189 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8190 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8191 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8192 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8193 pf->hw.num_partitions > 1)
8194 dev_info(&pf->pdev->dev,
8195 "Flow Director Sideband mode Disabled in MFP mode\n");
8197 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8198 pf->fdir_pf_filter_count =
8199 pf->hw.func_caps.fd_filters_guaranteed;
8200 pf->hw.fdir_shared_filter_count =
8201 pf->hw.func_caps.fd_filters_best_effort;
8204 if (pf->hw.func_caps.vmdq) {
8205 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8206 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8207 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8211 i40e_init_pf_fcoe(pf);
8213 #endif /* I40E_FCOE */
8214 #ifdef CONFIG_PCI_IOV
8215 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8216 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8217 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8218 pf->num_req_vfs = min_t(int,
8219 pf->hw.func_caps.num_vfs,
8222 #endif /* CONFIG_PCI_IOV */
8223 if (pf->hw.mac.type == I40E_MAC_X722) {
8224 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8225 I40E_FLAG_128_QP_RSS_CAPABLE |
8226 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8227 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8228 I40E_FLAG_WB_ON_ITR_CAPABLE |
8229 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
8231 pf->eeprom_version = 0xDEAD;
8232 pf->lan_veb = I40E_NO_VEB;
8233 pf->lan_vsi = I40E_NO_VSI;
8235 /* By default FW has this off for performance reasons */
8236 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8238 /* set up queue assignment tracking */
8239 size = sizeof(struct i40e_lump_tracking)
8240 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8241 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8246 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8247 pf->qp_pile->search_hint = 0;
8249 pf->tx_timeout_recovery_level = 1;
8251 mutex_init(&pf->switch_mutex);
8253 /* If NPAR is enabled nudge the Tx scheduler */
8254 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8255 i40e_set_npar_bw_setting(pf);
8262 * i40e_set_ntuple - set the ntuple feature flag and take action
8263 * @pf: board private structure to initialize
8264 * @features: the feature set that the stack is suggesting
8266 * returns a bool to indicate if reset needs to happen
8268 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8270 bool need_reset = false;
8272 /* Check if Flow Director n-tuple support was enabled or disabled. If
8273 * the state changed, we need to reset.
8275 if (features & NETIF_F_NTUPLE) {
8276 /* Enable filters and mark for reset */
8277 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8279 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8281 /* turn off filters, mark for reset and clear SW filter list */
8282 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8284 i40e_fdir_filter_exit(pf);
8286 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8287 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8288 /* reset fd counters */
8289 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8290 pf->fdir_pf_active_filters = 0;
8291 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8292 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8293 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8294 /* if ATR was auto disabled it can be re-enabled. */
8295 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8296 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8297 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8303 * i40e_set_features - set the netdev feature flags
8304 * @netdev: ptr to the netdev being adjusted
8305 * @features: the feature set that the stack is suggesting
8307 static int i40e_set_features(struct net_device *netdev,
8308 netdev_features_t features)
8310 struct i40e_netdev_priv *np = netdev_priv(netdev);
8311 struct i40e_vsi *vsi = np->vsi;
8312 struct i40e_pf *pf = vsi->back;
8315 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8316 i40e_vlan_stripping_enable(vsi);
8318 i40e_vlan_stripping_disable(vsi);
8320 need_reset = i40e_set_ntuple(pf, features);
8323 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8328 #ifdef CONFIG_I40E_VXLAN
8330 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8331 * @pf: board private structure
8332 * @port: The UDP port to look up
8334 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8336 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8340 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8341 if (pf->vxlan_ports[i] == port)
8349 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8350 * @netdev: This physical port's netdev
8351 * @sa_family: Socket Family that VXLAN is notifying us about
8352 * @port: New UDP port number that VXLAN started listening to
8354 static void i40e_add_vxlan_port(struct net_device *netdev,
8355 sa_family_t sa_family, __be16 port)
8357 struct i40e_netdev_priv *np = netdev_priv(netdev);
8358 struct i40e_vsi *vsi = np->vsi;
8359 struct i40e_pf *pf = vsi->back;
8363 if (sa_family == AF_INET6)
8366 idx = i40e_get_vxlan_port_idx(pf, port);
8368 /* Check if port already exists */
8369 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8370 netdev_info(netdev, "vxlan port %d already offloaded\n",
8375 /* Now check if there is space to add the new port */
8376 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8378 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8379 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8384 /* New port: add it and mark its index in the bitmap */
8385 pf->vxlan_ports[next_idx] = port;
8386 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8387 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8391 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8392 * @netdev: This physical port's netdev
8393 * @sa_family: Socket Family that VXLAN is notifying us about
8394 * @port: UDP port number that VXLAN stopped listening to
8396 static void i40e_del_vxlan_port(struct net_device *netdev,
8397 sa_family_t sa_family, __be16 port)
8399 struct i40e_netdev_priv *np = netdev_priv(netdev);
8400 struct i40e_vsi *vsi = np->vsi;
8401 struct i40e_pf *pf = vsi->back;
8404 if (sa_family == AF_INET6)
8407 idx = i40e_get_vxlan_port_idx(pf, port);
8409 /* Check if port already exists */
8410 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8411 /* if port exists, set it to 0 (mark for deletion)
8412 * and make it pending
8414 pf->vxlan_ports[idx] = 0;
8415 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8416 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8418 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8424 static int i40e_get_phys_port_id(struct net_device *netdev,
8425 struct netdev_phys_item_id *ppid)
8427 struct i40e_netdev_priv *np = netdev_priv(netdev);
8428 struct i40e_pf *pf = np->vsi->back;
8429 struct i40e_hw *hw = &pf->hw;
8431 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8434 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8435 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8441 * i40e_ndo_fdb_add - add an entry to the hardware database
8442 * @ndm: the input from the stack
8443 * @tb: pointer to array of nladdr (unused)
8444 * @dev: the net device pointer
8445 * @addr: the MAC address entry being added
8446 * @flags: instructions from stack about fdb operation
8448 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8449 struct net_device *dev,
8450 const unsigned char *addr, u16 vid,
8453 struct i40e_netdev_priv *np = netdev_priv(dev);
8454 struct i40e_pf *pf = np->vsi->back;
8457 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8461 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8465 /* Hardware does not support aging addresses so if a
8466 * ndm_state is given only allow permanent addresses
8468 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8469 netdev_info(dev, "FDB only supports static addresses\n");
8473 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8474 err = dev_uc_add_excl(dev, addr);
8475 else if (is_multicast_ether_addr(addr))
8476 err = dev_mc_add_excl(dev, addr);
8480 /* Only return duplicate errors if NLM_F_EXCL is set */
8481 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8488 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8489 * @dev: the netdev being configured
8490 * @nlh: RTNL message
8492 * Inserts a new hardware bridge if not already created and
8493 * enables the bridging mode requested (VEB or VEPA). If the
8494 * hardware bridge has already been inserted and the request
8495 * is to change the mode then that requires a PF reset to
8496 * allow rebuild of the components with required hardware
8497 * bridge mode enabled.
8499 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8500 struct nlmsghdr *nlh,
8503 struct i40e_netdev_priv *np = netdev_priv(dev);
8504 struct i40e_vsi *vsi = np->vsi;
8505 struct i40e_pf *pf = vsi->back;
8506 struct i40e_veb *veb = NULL;
8507 struct nlattr *attr, *br_spec;
8510 /* Only for PF VSI for now */
8511 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8514 /* Find the HW bridge for PF VSI */
8515 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8516 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8520 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8522 nla_for_each_nested(attr, br_spec, rem) {
8525 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8528 mode = nla_get_u16(attr);
8529 if ((mode != BRIDGE_MODE_VEPA) &&
8530 (mode != BRIDGE_MODE_VEB))
8533 /* Insert a new HW bridge */
8535 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8536 vsi->tc_config.enabled_tc);
8538 veb->bridge_mode = mode;
8539 i40e_config_bridge_mode(veb);
8541 /* No Bridge HW offload available */
8545 } else if (mode != veb->bridge_mode) {
8546 /* Existing HW bridge but different mode needs reset */
8547 veb->bridge_mode = mode;
8548 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8549 if (mode == BRIDGE_MODE_VEB)
8550 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8552 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8553 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8562 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8565 * @seq: RTNL message seq #
8566 * @dev: the netdev being configured
8567 * @filter_mask: unused
8568 * @nlflags: netlink flags passed in
8570 * Return the mode in which the hardware bridge is operating in
8573 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8574 struct net_device *dev,
8575 u32 __always_unused filter_mask,
8578 struct i40e_netdev_priv *np = netdev_priv(dev);
8579 struct i40e_vsi *vsi = np->vsi;
8580 struct i40e_pf *pf = vsi->back;
8581 struct i40e_veb *veb = NULL;
8584 /* Only for PF VSI for now */
8585 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8588 /* Find the HW bridge for the PF VSI */
8589 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8590 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8597 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8598 0, 0, nlflags, filter_mask, NULL);
8601 #define I40E_MAX_TUNNEL_HDR_LEN 80
8603 * i40e_features_check - Validate encapsulated packet conforms to limits
8605 * @dev: This physical port's netdev
8606 * @features: Offload features that the stack believes apply
8608 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8609 struct net_device *dev,
8610 netdev_features_t features)
8612 if (skb->encapsulation &&
8613 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8614 I40E_MAX_TUNNEL_HDR_LEN))
8615 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8620 static const struct net_device_ops i40e_netdev_ops = {
8621 .ndo_open = i40e_open,
8622 .ndo_stop = i40e_close,
8623 .ndo_start_xmit = i40e_lan_xmit_frame,
8624 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8625 .ndo_set_rx_mode = i40e_set_rx_mode,
8626 .ndo_validate_addr = eth_validate_addr,
8627 .ndo_set_mac_address = i40e_set_mac,
8628 .ndo_change_mtu = i40e_change_mtu,
8629 .ndo_do_ioctl = i40e_ioctl,
8630 .ndo_tx_timeout = i40e_tx_timeout,
8631 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8632 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8633 #ifdef CONFIG_NET_POLL_CONTROLLER
8634 .ndo_poll_controller = i40e_netpoll,
8636 .ndo_setup_tc = i40e_setup_tc,
8638 .ndo_fcoe_enable = i40e_fcoe_enable,
8639 .ndo_fcoe_disable = i40e_fcoe_disable,
8641 .ndo_set_features = i40e_set_features,
8642 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8643 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8644 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8645 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8646 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8647 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8648 #ifdef CONFIG_I40E_VXLAN
8649 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8650 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8652 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8653 .ndo_fdb_add = i40e_ndo_fdb_add,
8654 .ndo_features_check = i40e_features_check,
8655 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8656 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8660 * i40e_config_netdev - Setup the netdev flags
8661 * @vsi: the VSI being configured
8663 * Returns 0 on success, negative value on failure
8665 static int i40e_config_netdev(struct i40e_vsi *vsi)
8667 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8668 struct i40e_pf *pf = vsi->back;
8669 struct i40e_hw *hw = &pf->hw;
8670 struct i40e_netdev_priv *np;
8671 struct net_device *netdev;
8672 u8 mac_addr[ETH_ALEN];
8675 etherdev_size = sizeof(struct i40e_netdev_priv);
8676 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8680 vsi->netdev = netdev;
8681 np = netdev_priv(netdev);
8684 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8685 NETIF_F_GSO_UDP_TUNNEL |
8689 netdev->features = NETIF_F_SG |
8693 NETIF_F_GSO_UDP_TUNNEL |
8695 NETIF_F_HW_VLAN_CTAG_TX |
8696 NETIF_F_HW_VLAN_CTAG_RX |
8697 NETIF_F_HW_VLAN_CTAG_FILTER |
8706 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8707 netdev->features |= NETIF_F_NTUPLE;
8709 /* copy netdev features into list of user selectable features */
8710 netdev->hw_features |= netdev->features;
8712 if (vsi->type == I40E_VSI_MAIN) {
8713 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8714 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8715 /* The following steps are necessary to prevent reception
8716 * of tagged packets - some older NVM configurations load a
8717 * default a MAC-VLAN filter that accepts any tagged packet
8718 * which must be replaced by a normal filter.
8720 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
8721 spin_lock_bh(&vsi->mac_filter_list_lock);
8722 i40e_add_filter(vsi, mac_addr,
8723 I40E_VLAN_ANY, false, true);
8724 spin_unlock_bh(&vsi->mac_filter_list_lock);
8727 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8728 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8729 pf->vsi[pf->lan_vsi]->netdev->name);
8730 random_ether_addr(mac_addr);
8732 spin_lock_bh(&vsi->mac_filter_list_lock);
8733 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8734 spin_unlock_bh(&vsi->mac_filter_list_lock);
8737 spin_lock_bh(&vsi->mac_filter_list_lock);
8738 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8739 spin_unlock_bh(&vsi->mac_filter_list_lock);
8741 ether_addr_copy(netdev->dev_addr, mac_addr);
8742 ether_addr_copy(netdev->perm_addr, mac_addr);
8743 /* vlan gets same features (except vlan offload)
8744 * after any tweaks for specific VSI types
8746 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8747 NETIF_F_HW_VLAN_CTAG_RX |
8748 NETIF_F_HW_VLAN_CTAG_FILTER);
8749 netdev->priv_flags |= IFF_UNICAST_FLT;
8750 netdev->priv_flags |= IFF_SUPP_NOFCS;
8751 /* Setup netdev TC information */
8752 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8754 netdev->netdev_ops = &i40e_netdev_ops;
8755 netdev->watchdog_timeo = 5 * HZ;
8756 i40e_set_ethtool_ops(netdev);
8758 i40e_fcoe_config_netdev(netdev, vsi);
8765 * i40e_vsi_delete - Delete a VSI from the switch
8766 * @vsi: the VSI being removed
8768 * Returns 0 on success, negative value on failure
8770 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8772 /* remove default VSI is not allowed */
8773 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8776 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8780 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8781 * @vsi: the VSI being queried
8783 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8785 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8787 struct i40e_veb *veb;
8788 struct i40e_pf *pf = vsi->back;
8790 /* Uplink is not a bridge so default to VEB */
8791 if (vsi->veb_idx == I40E_NO_VEB)
8794 veb = pf->veb[vsi->veb_idx];
8796 dev_info(&pf->pdev->dev,
8797 "There is no veb associated with the bridge\n");
8801 /* Uplink is a bridge in VEPA mode */
8802 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
8805 /* Uplink is a bridge in VEB mode */
8809 /* VEPA is now default bridge, so return 0 */
8814 * i40e_add_vsi - Add a VSI to the switch
8815 * @vsi: the VSI being configured
8817 * This initializes a VSI context depending on the VSI type to be added and
8818 * passes it down to the add_vsi aq command.
8820 static int i40e_add_vsi(struct i40e_vsi *vsi)
8823 u8 laa_macaddr[ETH_ALEN];
8824 bool found_laa_mac_filter = false;
8825 struct i40e_pf *pf = vsi->back;
8826 struct i40e_hw *hw = &pf->hw;
8827 struct i40e_vsi_context ctxt;
8828 struct i40e_mac_filter *f, *ftmp;
8830 u8 enabled_tc = 0x1; /* TC0 enabled */
8833 memset(&ctxt, 0, sizeof(ctxt));
8834 switch (vsi->type) {
8836 /* The PF's main VSI is already setup as part of the
8837 * device initialization, so we'll not bother with
8838 * the add_vsi call, but we will retrieve the current
8841 ctxt.seid = pf->main_vsi_seid;
8842 ctxt.pf_num = pf->hw.pf_id;
8844 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8845 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8847 dev_info(&pf->pdev->dev,
8848 "couldn't get PF vsi config, err %s aq_err %s\n",
8849 i40e_stat_str(&pf->hw, ret),
8850 i40e_aq_str(&pf->hw,
8851 pf->hw.aq.asq_last_status));
8854 vsi->info = ctxt.info;
8855 vsi->info.valid_sections = 0;
8857 vsi->seid = ctxt.seid;
8858 vsi->id = ctxt.vsi_number;
8860 enabled_tc = i40e_pf_get_tc_map(pf);
8862 /* MFP mode setup queue map and update VSI */
8863 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8864 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8865 memset(&ctxt, 0, sizeof(ctxt));
8866 ctxt.seid = pf->main_vsi_seid;
8867 ctxt.pf_num = pf->hw.pf_id;
8869 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8870 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8872 dev_info(&pf->pdev->dev,
8873 "update vsi failed, err %s aq_err %s\n",
8874 i40e_stat_str(&pf->hw, ret),
8875 i40e_aq_str(&pf->hw,
8876 pf->hw.aq.asq_last_status));
8880 /* update the local VSI info queue map */
8881 i40e_vsi_update_queue_map(vsi, &ctxt);
8882 vsi->info.valid_sections = 0;
8884 /* Default/Main VSI is only enabled for TC0
8885 * reconfigure it to enable all TCs that are
8886 * available on the port in SFP mode.
8887 * For MFP case the iSCSI PF would use this
8888 * flow to enable LAN+iSCSI TC.
8890 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8892 dev_info(&pf->pdev->dev,
8893 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8895 i40e_stat_str(&pf->hw, ret),
8896 i40e_aq_str(&pf->hw,
8897 pf->hw.aq.asq_last_status));
8904 ctxt.pf_num = hw->pf_id;
8906 ctxt.uplink_seid = vsi->uplink_seid;
8907 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8908 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8909 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8910 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8911 ctxt.info.valid_sections |=
8912 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8913 ctxt.info.switch_id =
8914 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8916 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8919 case I40E_VSI_VMDQ2:
8920 ctxt.pf_num = hw->pf_id;
8922 ctxt.uplink_seid = vsi->uplink_seid;
8923 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8924 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8926 /* This VSI is connected to VEB so the switch_id
8927 * should be set to zero by default.
8929 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8930 ctxt.info.valid_sections |=
8931 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8932 ctxt.info.switch_id =
8933 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8936 /* Setup the VSI tx/rx queue map for TC0 only for now */
8937 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8940 case I40E_VSI_SRIOV:
8941 ctxt.pf_num = hw->pf_id;
8942 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8943 ctxt.uplink_seid = vsi->uplink_seid;
8944 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8945 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8947 /* This VSI is connected to VEB so the switch_id
8948 * should be set to zero by default.
8950 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8951 ctxt.info.valid_sections |=
8952 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8953 ctxt.info.switch_id =
8954 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8957 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8958 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8959 if (pf->vf[vsi->vf_id].spoofchk) {
8960 ctxt.info.valid_sections |=
8961 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8962 ctxt.info.sec_flags |=
8963 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8964 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8966 /* Setup the VSI tx/rx queue map for TC0 only for now */
8967 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8972 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8974 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8979 #endif /* I40E_FCOE */
8984 if (vsi->type != I40E_VSI_MAIN) {
8985 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8987 dev_info(&vsi->back->pdev->dev,
8988 "add vsi failed, err %s aq_err %s\n",
8989 i40e_stat_str(&pf->hw, ret),
8990 i40e_aq_str(&pf->hw,
8991 pf->hw.aq.asq_last_status));
8995 vsi->info = ctxt.info;
8996 vsi->info.valid_sections = 0;
8997 vsi->seid = ctxt.seid;
8998 vsi->id = ctxt.vsi_number;
9001 spin_lock_bh(&vsi->mac_filter_list_lock);
9002 /* If macvlan filters already exist, force them to get loaded */
9003 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9007 /* Expected to have only one MAC filter entry for LAA in list */
9008 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9009 ether_addr_copy(laa_macaddr, f->macaddr);
9010 found_laa_mac_filter = true;
9013 spin_unlock_bh(&vsi->mac_filter_list_lock);
9015 if (found_laa_mac_filter) {
9016 struct i40e_aqc_remove_macvlan_element_data element;
9018 memset(&element, 0, sizeof(element));
9019 ether_addr_copy(element.mac_addr, laa_macaddr);
9020 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9021 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9024 /* some older FW has a different default */
9026 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9027 i40e_aq_remove_macvlan(hw, vsi->seid,
9031 i40e_aq_mac_address_write(hw,
9032 I40E_AQC_WRITE_TYPE_LAA_WOL,
9037 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9038 pf->flags |= I40E_FLAG_FILTER_SYNC;
9041 /* Update VSI BW information */
9042 ret = i40e_vsi_get_bw_info(vsi);
9044 dev_info(&pf->pdev->dev,
9045 "couldn't get vsi bw info, err %s aq_err %s\n",
9046 i40e_stat_str(&pf->hw, ret),
9047 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9048 /* VSI is already added so not tearing that up */
9057 * i40e_vsi_release - Delete a VSI and free its resources
9058 * @vsi: the VSI being removed
9060 * Returns 0 on success or < 0 on error
9062 int i40e_vsi_release(struct i40e_vsi *vsi)
9064 struct i40e_mac_filter *f, *ftmp;
9065 struct i40e_veb *veb = NULL;
9072 /* release of a VEB-owner or last VSI is not allowed */
9073 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9074 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9075 vsi->seid, vsi->uplink_seid);
9078 if (vsi == pf->vsi[pf->lan_vsi] &&
9079 !test_bit(__I40E_DOWN, &pf->state)) {
9080 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9084 uplink_seid = vsi->uplink_seid;
9085 if (vsi->type != I40E_VSI_SRIOV) {
9086 if (vsi->netdev_registered) {
9087 vsi->netdev_registered = false;
9089 /* results in a call to i40e_close() */
9090 unregister_netdev(vsi->netdev);
9093 i40e_vsi_close(vsi);
9095 i40e_vsi_disable_irq(vsi);
9098 spin_lock_bh(&vsi->mac_filter_list_lock);
9099 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9100 i40e_del_filter(vsi, f->macaddr, f->vlan,
9101 f->is_vf, f->is_netdev);
9102 spin_unlock_bh(&vsi->mac_filter_list_lock);
9104 i40e_sync_vsi_filters(vsi, false);
9106 i40e_vsi_delete(vsi);
9107 i40e_vsi_free_q_vectors(vsi);
9109 free_netdev(vsi->netdev);
9112 i40e_vsi_clear_rings(vsi);
9113 i40e_vsi_clear(vsi);
9115 /* If this was the last thing on the VEB, except for the
9116 * controlling VSI, remove the VEB, which puts the controlling
9117 * VSI onto the next level down in the switch.
9119 * Well, okay, there's one more exception here: don't remove
9120 * the orphan VEBs yet. We'll wait for an explicit remove request
9121 * from up the network stack.
9123 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9125 pf->vsi[i]->uplink_seid == uplink_seid &&
9126 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9127 n++; /* count the VSIs */
9130 for (i = 0; i < I40E_MAX_VEB; i++) {
9133 if (pf->veb[i]->uplink_seid == uplink_seid)
9134 n++; /* count the VEBs */
9135 if (pf->veb[i]->seid == uplink_seid)
9138 if (n == 0 && veb && veb->uplink_seid != 0)
9139 i40e_veb_release(veb);
9145 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9146 * @vsi: ptr to the VSI
9148 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9149 * corresponding SW VSI structure and initializes num_queue_pairs for the
9150 * newly allocated VSI.
9152 * Returns 0 on success or negative on failure
9154 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9157 struct i40e_pf *pf = vsi->back;
9159 if (vsi->q_vectors[0]) {
9160 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9165 if (vsi->base_vector) {
9166 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9167 vsi->seid, vsi->base_vector);
9171 ret = i40e_vsi_alloc_q_vectors(vsi);
9173 dev_info(&pf->pdev->dev,
9174 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9175 vsi->num_q_vectors, vsi->seid, ret);
9176 vsi->num_q_vectors = 0;
9177 goto vector_setup_out;
9180 /* In Legacy mode, we do not have to get any other vector since we
9181 * piggyback on the misc/ICR0 for queue interrupts.
9183 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9185 if (vsi->num_q_vectors)
9186 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9187 vsi->num_q_vectors, vsi->idx);
9188 if (vsi->base_vector < 0) {
9189 dev_info(&pf->pdev->dev,
9190 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9191 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9192 i40e_vsi_free_q_vectors(vsi);
9194 goto vector_setup_out;
9202 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9203 * @vsi: pointer to the vsi.
9205 * This re-allocates a vsi's queue resources.
9207 * Returns pointer to the successfully allocated and configured VSI sw struct
9208 * on success, otherwise returns NULL on failure.
9210 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9212 struct i40e_pf *pf = vsi->back;
9216 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9217 i40e_vsi_clear_rings(vsi);
9219 i40e_vsi_free_arrays(vsi, false);
9220 i40e_set_num_rings_in_vsi(vsi);
9221 ret = i40e_vsi_alloc_arrays(vsi, false);
9225 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9227 dev_info(&pf->pdev->dev,
9228 "failed to get tracking for %d queues for VSI %d err %d\n",
9229 vsi->alloc_queue_pairs, vsi->seid, ret);
9232 vsi->base_queue = ret;
9234 /* Update the FW view of the VSI. Force a reset of TC and queue
9235 * layout configurations.
9237 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9238 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9239 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9240 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9242 /* assign it some queues */
9243 ret = i40e_alloc_rings(vsi);
9247 /* map all of the rings to the q_vectors */
9248 i40e_vsi_map_rings_to_vectors(vsi);
9252 i40e_vsi_free_q_vectors(vsi);
9253 if (vsi->netdev_registered) {
9254 vsi->netdev_registered = false;
9255 unregister_netdev(vsi->netdev);
9256 free_netdev(vsi->netdev);
9259 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9261 i40e_vsi_clear(vsi);
9266 * i40e_vsi_setup - Set up a VSI by a given type
9267 * @pf: board private structure
9269 * @uplink_seid: the switch element to link to
9270 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9272 * This allocates the sw VSI structure and its queue resources, then add a VSI
9273 * to the identified VEB.
9275 * Returns pointer to the successfully allocated and configure VSI sw struct on
9276 * success, otherwise returns NULL on failure.
9278 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9279 u16 uplink_seid, u32 param1)
9281 struct i40e_vsi *vsi = NULL;
9282 struct i40e_veb *veb = NULL;
9286 /* The requested uplink_seid must be either
9287 * - the PF's port seid
9288 * no VEB is needed because this is the PF
9289 * or this is a Flow Director special case VSI
9290 * - seid of an existing VEB
9291 * - seid of a VSI that owns an existing VEB
9292 * - seid of a VSI that doesn't own a VEB
9293 * a new VEB is created and the VSI becomes the owner
9294 * - seid of the PF VSI, which is what creates the first VEB
9295 * this is a special case of the previous
9297 * Find which uplink_seid we were given and create a new VEB if needed
9299 for (i = 0; i < I40E_MAX_VEB; i++) {
9300 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9306 if (!veb && uplink_seid != pf->mac_seid) {
9308 for (i = 0; i < pf->num_alloc_vsi; i++) {
9309 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9315 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9320 if (vsi->uplink_seid == pf->mac_seid)
9321 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9322 vsi->tc_config.enabled_tc);
9323 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9324 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9325 vsi->tc_config.enabled_tc);
9327 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9328 dev_info(&vsi->back->pdev->dev,
9329 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9332 /* We come up by default in VEPA mode if SRIOV is not
9333 * already enabled, in which case we can't force VEPA
9336 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9337 veb->bridge_mode = BRIDGE_MODE_VEPA;
9338 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9340 i40e_config_bridge_mode(veb);
9342 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9343 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9347 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9351 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9352 uplink_seid = veb->seid;
9355 /* get vsi sw struct */
9356 v_idx = i40e_vsi_mem_alloc(pf, type);
9359 vsi = pf->vsi[v_idx];
9363 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9365 if (type == I40E_VSI_MAIN)
9366 pf->lan_vsi = v_idx;
9367 else if (type == I40E_VSI_SRIOV)
9368 vsi->vf_id = param1;
9369 /* assign it some queues */
9370 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9373 dev_info(&pf->pdev->dev,
9374 "failed to get tracking for %d queues for VSI %d err=%d\n",
9375 vsi->alloc_queue_pairs, vsi->seid, ret);
9378 vsi->base_queue = ret;
9380 /* get a VSI from the hardware */
9381 vsi->uplink_seid = uplink_seid;
9382 ret = i40e_add_vsi(vsi);
9386 switch (vsi->type) {
9387 /* setup the netdev if needed */
9389 case I40E_VSI_VMDQ2:
9391 ret = i40e_config_netdev(vsi);
9394 ret = register_netdev(vsi->netdev);
9397 vsi->netdev_registered = true;
9398 netif_carrier_off(vsi->netdev);
9399 #ifdef CONFIG_I40E_DCB
9400 /* Setup DCB netlink interface */
9401 i40e_dcbnl_setup(vsi);
9402 #endif /* CONFIG_I40E_DCB */
9406 /* set up vectors and rings if needed */
9407 ret = i40e_vsi_setup_vectors(vsi);
9411 ret = i40e_alloc_rings(vsi);
9415 /* map all of the rings to the q_vectors */
9416 i40e_vsi_map_rings_to_vectors(vsi);
9418 i40e_vsi_reset_stats(vsi);
9422 /* no netdev or rings for the other VSI types */
9426 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9427 (vsi->type == I40E_VSI_VMDQ2)) {
9428 ret = i40e_vsi_config_rss(vsi);
9433 i40e_vsi_free_q_vectors(vsi);
9435 if (vsi->netdev_registered) {
9436 vsi->netdev_registered = false;
9437 unregister_netdev(vsi->netdev);
9438 free_netdev(vsi->netdev);
9442 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9444 i40e_vsi_clear(vsi);
9450 * i40e_veb_get_bw_info - Query VEB BW information
9451 * @veb: the veb to query
9453 * Query the Tx scheduler BW configuration data for given VEB
9455 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9457 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9458 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9459 struct i40e_pf *pf = veb->pf;
9460 struct i40e_hw *hw = &pf->hw;
9465 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9468 dev_info(&pf->pdev->dev,
9469 "query veb bw config failed, err %s aq_err %s\n",
9470 i40e_stat_str(&pf->hw, ret),
9471 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9475 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9478 dev_info(&pf->pdev->dev,
9479 "query veb bw ets config failed, err %s aq_err %s\n",
9480 i40e_stat_str(&pf->hw, ret),
9481 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9485 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9486 veb->bw_max_quanta = ets_data.tc_bw_max;
9487 veb->is_abs_credits = bw_data.absolute_credits_enable;
9488 veb->enabled_tc = ets_data.tc_valid_bits;
9489 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9490 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9491 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9492 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9493 veb->bw_tc_limit_credits[i] =
9494 le16_to_cpu(bw_data.tc_bw_limits[i]);
9495 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9503 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9504 * @pf: board private structure
9506 * On error: returns error code (negative)
9507 * On success: returns vsi index in PF (positive)
9509 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9512 struct i40e_veb *veb;
9515 /* Need to protect the allocation of switch elements at the PF level */
9516 mutex_lock(&pf->switch_mutex);
9518 /* VEB list may be fragmented if VEB creation/destruction has
9519 * been happening. We can afford to do a quick scan to look
9520 * for any free slots in the list.
9522 * find next empty veb slot, looping back around if necessary
9525 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9527 if (i >= I40E_MAX_VEB) {
9529 goto err_alloc_veb; /* out of VEB slots! */
9532 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9539 veb->enabled_tc = 1;
9544 mutex_unlock(&pf->switch_mutex);
9549 * i40e_switch_branch_release - Delete a branch of the switch tree
9550 * @branch: where to start deleting
9552 * This uses recursion to find the tips of the branch to be
9553 * removed, deleting until we get back to and can delete this VEB.
9555 static void i40e_switch_branch_release(struct i40e_veb *branch)
9557 struct i40e_pf *pf = branch->pf;
9558 u16 branch_seid = branch->seid;
9559 u16 veb_idx = branch->idx;
9562 /* release any VEBs on this VEB - RECURSION */
9563 for (i = 0; i < I40E_MAX_VEB; i++) {
9566 if (pf->veb[i]->uplink_seid == branch->seid)
9567 i40e_switch_branch_release(pf->veb[i]);
9570 /* Release the VSIs on this VEB, but not the owner VSI.
9572 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9573 * the VEB itself, so don't use (*branch) after this loop.
9575 for (i = 0; i < pf->num_alloc_vsi; i++) {
9578 if (pf->vsi[i]->uplink_seid == branch_seid &&
9579 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9580 i40e_vsi_release(pf->vsi[i]);
9584 /* There's one corner case where the VEB might not have been
9585 * removed, so double check it here and remove it if needed.
9586 * This case happens if the veb was created from the debugfs
9587 * commands and no VSIs were added to it.
9589 if (pf->veb[veb_idx])
9590 i40e_veb_release(pf->veb[veb_idx]);
9594 * i40e_veb_clear - remove veb struct
9595 * @veb: the veb to remove
9597 static void i40e_veb_clear(struct i40e_veb *veb)
9603 struct i40e_pf *pf = veb->pf;
9605 mutex_lock(&pf->switch_mutex);
9606 if (pf->veb[veb->idx] == veb)
9607 pf->veb[veb->idx] = NULL;
9608 mutex_unlock(&pf->switch_mutex);
9615 * i40e_veb_release - Delete a VEB and free its resources
9616 * @veb: the VEB being removed
9618 void i40e_veb_release(struct i40e_veb *veb)
9620 struct i40e_vsi *vsi = NULL;
9626 /* find the remaining VSI and check for extras */
9627 for (i = 0; i < pf->num_alloc_vsi; i++) {
9628 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9634 dev_info(&pf->pdev->dev,
9635 "can't remove VEB %d with %d VSIs left\n",
9640 /* move the remaining VSI to uplink veb */
9641 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9642 if (veb->uplink_seid) {
9643 vsi->uplink_seid = veb->uplink_seid;
9644 if (veb->uplink_seid == pf->mac_seid)
9645 vsi->veb_idx = I40E_NO_VEB;
9647 vsi->veb_idx = veb->veb_idx;
9650 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9651 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9654 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9655 i40e_veb_clear(veb);
9659 * i40e_add_veb - create the VEB in the switch
9660 * @veb: the VEB to be instantiated
9661 * @vsi: the controlling VSI
9663 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9665 struct i40e_pf *pf = veb->pf;
9666 bool is_default = veb->pf->cur_promisc;
9667 bool is_cloud = false;
9670 /* get a VEB from the hardware */
9671 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9672 veb->enabled_tc, is_default,
9673 is_cloud, &veb->seid, NULL);
9675 dev_info(&pf->pdev->dev,
9676 "couldn't add VEB, err %s aq_err %s\n",
9677 i40e_stat_str(&pf->hw, ret),
9678 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9682 /* get statistics counter */
9683 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9684 &veb->stats_idx, NULL, NULL, NULL);
9686 dev_info(&pf->pdev->dev,
9687 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9688 i40e_stat_str(&pf->hw, ret),
9689 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9692 ret = i40e_veb_get_bw_info(veb);
9694 dev_info(&pf->pdev->dev,
9695 "couldn't get VEB bw info, err %s aq_err %s\n",
9696 i40e_stat_str(&pf->hw, ret),
9697 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9698 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9702 vsi->uplink_seid = veb->seid;
9703 vsi->veb_idx = veb->idx;
9704 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9710 * i40e_veb_setup - Set up a VEB
9711 * @pf: board private structure
9712 * @flags: VEB setup flags
9713 * @uplink_seid: the switch element to link to
9714 * @vsi_seid: the initial VSI seid
9715 * @enabled_tc: Enabled TC bit-map
9717 * This allocates the sw VEB structure and links it into the switch
9718 * It is possible and legal for this to be a duplicate of an already
9719 * existing VEB. It is also possible for both uplink and vsi seids
9720 * to be zero, in order to create a floating VEB.
9722 * Returns pointer to the successfully allocated VEB sw struct on
9723 * success, otherwise returns NULL on failure.
9725 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9726 u16 uplink_seid, u16 vsi_seid,
9729 struct i40e_veb *veb, *uplink_veb = NULL;
9730 int vsi_idx, veb_idx;
9733 /* if one seid is 0, the other must be 0 to create a floating relay */
9734 if ((uplink_seid == 0 || vsi_seid == 0) &&
9735 (uplink_seid + vsi_seid != 0)) {
9736 dev_info(&pf->pdev->dev,
9737 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9738 uplink_seid, vsi_seid);
9742 /* make sure there is such a vsi and uplink */
9743 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9744 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9746 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9747 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9752 if (uplink_seid && uplink_seid != pf->mac_seid) {
9753 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9754 if (pf->veb[veb_idx] &&
9755 pf->veb[veb_idx]->seid == uplink_seid) {
9756 uplink_veb = pf->veb[veb_idx];
9761 dev_info(&pf->pdev->dev,
9762 "uplink seid %d not found\n", uplink_seid);
9767 /* get veb sw struct */
9768 veb_idx = i40e_veb_mem_alloc(pf);
9771 veb = pf->veb[veb_idx];
9773 veb->uplink_seid = uplink_seid;
9774 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9775 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9777 /* create the VEB in the switch */
9778 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9781 if (vsi_idx == pf->lan_vsi)
9782 pf->lan_veb = veb->idx;
9787 i40e_veb_clear(veb);
9793 * i40e_setup_pf_switch_element - set PF vars based on switch type
9794 * @pf: board private structure
9795 * @ele: element we are building info from
9796 * @num_reported: total number of elements
9797 * @printconfig: should we print the contents
9799 * helper function to assist in extracting a few useful SEID values.
9801 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9802 struct i40e_aqc_switch_config_element_resp *ele,
9803 u16 num_reported, bool printconfig)
9805 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9806 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9807 u8 element_type = ele->element_type;
9808 u16 seid = le16_to_cpu(ele->seid);
9811 dev_info(&pf->pdev->dev,
9812 "type=%d seid=%d uplink=%d downlink=%d\n",
9813 element_type, seid, uplink_seid, downlink_seid);
9815 switch (element_type) {
9816 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9817 pf->mac_seid = seid;
9819 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9821 if (uplink_seid != pf->mac_seid)
9823 if (pf->lan_veb == I40E_NO_VEB) {
9826 /* find existing or else empty VEB */
9827 for (v = 0; v < I40E_MAX_VEB; v++) {
9828 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9833 if (pf->lan_veb == I40E_NO_VEB) {
9834 v = i40e_veb_mem_alloc(pf);
9841 pf->veb[pf->lan_veb]->seid = seid;
9842 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9843 pf->veb[pf->lan_veb]->pf = pf;
9844 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9846 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9847 if (num_reported != 1)
9849 /* This is immediately after a reset so we can assume this is
9852 pf->mac_seid = uplink_seid;
9853 pf->pf_seid = downlink_seid;
9854 pf->main_vsi_seid = seid;
9856 dev_info(&pf->pdev->dev,
9857 "pf_seid=%d main_vsi_seid=%d\n",
9858 pf->pf_seid, pf->main_vsi_seid);
9860 case I40E_SWITCH_ELEMENT_TYPE_PF:
9861 case I40E_SWITCH_ELEMENT_TYPE_VF:
9862 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9863 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9864 case I40E_SWITCH_ELEMENT_TYPE_PE:
9865 case I40E_SWITCH_ELEMENT_TYPE_PA:
9866 /* ignore these for now */
9869 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9870 element_type, seid);
9876 * i40e_fetch_switch_configuration - Get switch config from firmware
9877 * @pf: board private structure
9878 * @printconfig: should we print the contents
9880 * Get the current switch configuration from the device and
9881 * extract a few useful SEID values.
9883 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9885 struct i40e_aqc_get_switch_config_resp *sw_config;
9891 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9895 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9897 u16 num_reported, num_total;
9899 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9903 dev_info(&pf->pdev->dev,
9904 "get switch config failed err %s aq_err %s\n",
9905 i40e_stat_str(&pf->hw, ret),
9906 i40e_aq_str(&pf->hw,
9907 pf->hw.aq.asq_last_status));
9912 num_reported = le16_to_cpu(sw_config->header.num_reported);
9913 num_total = le16_to_cpu(sw_config->header.num_total);
9916 dev_info(&pf->pdev->dev,
9917 "header: %d reported %d total\n",
9918 num_reported, num_total);
9920 for (i = 0; i < num_reported; i++) {
9921 struct i40e_aqc_switch_config_element_resp *ele =
9922 &sw_config->element[i];
9924 i40e_setup_pf_switch_element(pf, ele, num_reported,
9927 } while (next_seid != 0);
9934 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9935 * @pf: board private structure
9936 * @reinit: if the Main VSI needs to re-initialized.
9938 * Returns 0 on success, negative value on failure
9940 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9944 /* find out what's out there already */
9945 ret = i40e_fetch_switch_configuration(pf, false);
9947 dev_info(&pf->pdev->dev,
9948 "couldn't fetch switch config, err %s aq_err %s\n",
9949 i40e_stat_str(&pf->hw, ret),
9950 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9953 i40e_pf_reset_stats(pf);
9955 /* first time setup */
9956 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9957 struct i40e_vsi *vsi = NULL;
9960 /* Set up the PF VSI associated with the PF's main VSI
9961 * that is already in the HW switch
9963 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9964 uplink_seid = pf->veb[pf->lan_veb]->seid;
9966 uplink_seid = pf->mac_seid;
9967 if (pf->lan_vsi == I40E_NO_VSI)
9968 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9970 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9972 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9973 i40e_fdir_teardown(pf);
9977 /* force a reset of TC and queue layout configurations */
9978 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9980 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9981 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9982 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9984 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9986 i40e_fdir_sb_setup(pf);
9988 /* Setup static PF queue filter control settings */
9989 ret = i40e_setup_pf_filter_control(pf);
9991 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9993 /* Failure here should not stop continuing other steps */
9996 /* enable RSS in the HW, even for only one queue, as the stack can use
9999 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10000 i40e_config_rss(pf);
10002 /* fill in link information and enable LSE reporting */
10003 i40e_update_link_info(&pf->hw);
10004 i40e_link_event(pf);
10006 /* Initialize user-specific link properties */
10007 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10008 I40E_AQ_AN_COMPLETED) ? true : false);
10016 * i40e_determine_queue_usage - Work out queue distribution
10017 * @pf: board private structure
10019 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10023 pf->num_lan_qps = 0;
10025 pf->num_fcoe_qps = 0;
10028 /* Find the max queues to be put into basic use. We'll always be
10029 * using TC0, whether or not DCB is running, and TC0 will get the
10032 queues_left = pf->hw.func_caps.num_tx_qp;
10034 if ((queues_left == 1) ||
10035 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10036 /* one qp for PF, no queues for anything else */
10038 pf->rss_size = pf->num_lan_qps = 1;
10040 /* make sure all the fancies are disabled */
10041 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10043 I40E_FLAG_FCOE_ENABLED |
10045 I40E_FLAG_FD_SB_ENABLED |
10046 I40E_FLAG_FD_ATR_ENABLED |
10047 I40E_FLAG_DCB_CAPABLE |
10048 I40E_FLAG_SRIOV_ENABLED |
10049 I40E_FLAG_VMDQ_ENABLED);
10050 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10051 I40E_FLAG_FD_SB_ENABLED |
10052 I40E_FLAG_FD_ATR_ENABLED |
10053 I40E_FLAG_DCB_CAPABLE))) {
10054 /* one qp for PF */
10055 pf->rss_size = pf->num_lan_qps = 1;
10056 queues_left -= pf->num_lan_qps;
10058 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10060 I40E_FLAG_FCOE_ENABLED |
10062 I40E_FLAG_FD_SB_ENABLED |
10063 I40E_FLAG_FD_ATR_ENABLED |
10064 I40E_FLAG_DCB_ENABLED |
10065 I40E_FLAG_VMDQ_ENABLED);
10067 /* Not enough queues for all TCs */
10068 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10069 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10070 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10071 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10073 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10074 num_online_cpus());
10075 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10076 pf->hw.func_caps.num_tx_qp);
10078 queues_left -= pf->num_lan_qps;
10082 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10083 if (I40E_DEFAULT_FCOE <= queues_left) {
10084 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10085 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10086 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10088 pf->num_fcoe_qps = 0;
10089 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10090 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10093 queues_left -= pf->num_fcoe_qps;
10097 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10098 if (queues_left > 1) {
10099 queues_left -= 1; /* save 1 queue for FD */
10101 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10102 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10106 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10107 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10108 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10109 (queues_left / pf->num_vf_qps));
10110 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10113 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10114 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10115 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10116 (queues_left / pf->num_vmdq_qps));
10117 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10120 pf->queues_left = queues_left;
10121 dev_dbg(&pf->pdev->dev,
10122 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10123 pf->hw.func_caps.num_tx_qp,
10124 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10125 pf->num_lan_qps, pf->rss_size, pf->num_req_vfs, pf->num_vf_qps,
10126 pf->num_vmdq_vsis, pf->num_vmdq_qps, queues_left);
10128 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10133 * i40e_setup_pf_filter_control - Setup PF static filter control
10134 * @pf: PF to be setup
10136 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10137 * settings. If PE/FCoE are enabled then it will also set the per PF
10138 * based filter sizes required for them. It also enables Flow director,
10139 * ethertype and macvlan type filter settings for the pf.
10141 * Returns 0 on success, negative on failure
10143 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10145 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10147 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10149 /* Flow Director is enabled */
10150 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10151 settings->enable_fdir = true;
10153 /* Ethtype and MACVLAN filters enabled for PF */
10154 settings->enable_ethtype = true;
10155 settings->enable_macvlan = true;
10157 if (i40e_set_filter_control(&pf->hw, settings))
10163 #define INFO_STRING_LEN 255
10164 static void i40e_print_features(struct i40e_pf *pf)
10166 struct i40e_hw *hw = &pf->hw;
10167 char *buf, *string;
10169 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
10171 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
10177 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
10178 #ifdef CONFIG_PCI_IOV
10179 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
10181 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
10182 pf->hw.func_caps.num_vsis,
10183 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10184 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10186 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10187 buf += sprintf(buf, "RSS ");
10188 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10189 buf += sprintf(buf, "FD_ATR ");
10190 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10191 buf += sprintf(buf, "FD_SB ");
10192 buf += sprintf(buf, "NTUPLE ");
10194 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10195 buf += sprintf(buf, "DCB ");
10196 #if IS_ENABLED(CONFIG_VXLAN)
10197 buf += sprintf(buf, "VxLAN ");
10199 if (pf->flags & I40E_FLAG_PTP)
10200 buf += sprintf(buf, "PTP ");
10202 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10203 buf += sprintf(buf, "FCOE ");
10205 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10206 buf += sprintf(buf, "VEB ");
10208 buf += sprintf(buf, "VEPA ");
10210 BUG_ON(buf > (string + INFO_STRING_LEN));
10211 dev_info(&pf->pdev->dev, "%s\n", string);
10216 * i40e_probe - Device initialization routine
10217 * @pdev: PCI device information struct
10218 * @ent: entry in i40e_pci_tbl
10220 * i40e_probe initializes a PF identified by a pci_dev structure.
10221 * The OS initialization, configuring of the PF private structure,
10222 * and a hardware reset occur.
10224 * Returns 0 on success, negative on failure
10226 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10228 struct i40e_aq_get_phy_abilities_resp abilities;
10229 struct i40e_pf *pf;
10230 struct i40e_hw *hw;
10231 static u16 pfs_found;
10240 err = pci_enable_device_mem(pdev);
10244 /* set up for high or low dma */
10245 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10247 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10249 dev_err(&pdev->dev,
10250 "DMA configuration failed: 0x%x\n", err);
10255 /* set up pci connections */
10256 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10257 IORESOURCE_MEM), i40e_driver_name);
10259 dev_info(&pdev->dev,
10260 "pci_request_selected_regions failed %d\n", err);
10264 pci_enable_pcie_error_reporting(pdev);
10265 pci_set_master(pdev);
10267 /* Now that we have a PCI connection, we need to do the
10268 * low level device setup. This is primarily setting up
10269 * the Admin Queue structures and then querying for the
10270 * device's current profile information.
10272 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10279 set_bit(__I40E_DOWN, &pf->state);
10284 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10285 I40E_MAX_CSR_SPACE);
10287 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10288 if (!hw->hw_addr) {
10290 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10291 (unsigned int)pci_resource_start(pdev, 0),
10292 pf->ioremap_len, err);
10295 hw->vendor_id = pdev->vendor;
10296 hw->device_id = pdev->device;
10297 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10298 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10299 hw->subsystem_device_id = pdev->subsystem_device;
10300 hw->bus.device = PCI_SLOT(pdev->devfn);
10301 hw->bus.func = PCI_FUNC(pdev->devfn);
10302 pf->instance = pfs_found;
10305 pf->msg_enable = pf->hw.debug_mask;
10306 pf->msg_enable = debug;
10309 /* do a special CORER for clearing PXE mode once at init */
10310 if (hw->revision_id == 0 &&
10311 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10312 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10317 i40e_clear_pxe_mode(hw);
10320 /* Reset here to make sure all is clean and to define PF 'n' */
10322 err = i40e_pf_reset(hw);
10324 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10329 hw->aq.num_arq_entries = I40E_AQ_LEN;
10330 hw->aq.num_asq_entries = I40E_AQ_LEN;
10331 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10332 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10333 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10335 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10337 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10339 err = i40e_init_shared_code(hw);
10341 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10346 /* set up a default setting for link flow control */
10347 pf->hw.fc.requested_mode = I40E_FC_NONE;
10349 /* set up the locks for the AQ, do this only once in probe
10350 * and destroy them only once in remove
10352 mutex_init(&hw->aq.asq_mutex);
10353 mutex_init(&hw->aq.arq_mutex);
10355 err = i40e_init_adminq(hw);
10357 /* provide nvm, fw, api versions */
10358 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10359 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10360 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10361 i40e_nvm_version_str(hw));
10364 dev_info(&pdev->dev,
10365 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10369 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10370 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10371 dev_info(&pdev->dev,
10372 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10373 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10374 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10375 dev_info(&pdev->dev,
10376 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10378 i40e_verify_eeprom(pf);
10380 /* Rev 0 hardware was never productized */
10381 if (hw->revision_id < 1)
10382 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10384 i40e_clear_pxe_mode(hw);
10385 err = i40e_get_capabilities(pf);
10387 goto err_adminq_setup;
10389 err = i40e_sw_init(pf);
10391 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10395 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10396 hw->func_caps.num_rx_qp,
10397 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10399 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10400 goto err_init_lan_hmc;
10403 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10405 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10407 goto err_configure_lan_hmc;
10410 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10411 * Ignore error return codes because if it was already disabled via
10412 * hardware settings this will fail
10414 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10415 (pf->hw.aq.fw_maj_ver < 4)) {
10416 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10417 i40e_aq_stop_lldp(hw, true, NULL);
10420 i40e_get_mac_addr(hw, hw->mac.addr);
10421 if (!is_valid_ether_addr(hw->mac.addr)) {
10422 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10426 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10427 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10428 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10429 if (is_valid_ether_addr(hw->mac.port_addr))
10430 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10432 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10434 dev_info(&pdev->dev,
10435 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10436 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10437 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10439 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10441 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10442 #endif /* I40E_FCOE */
10444 pci_set_drvdata(pdev, pf);
10445 pci_save_state(pdev);
10446 #ifdef CONFIG_I40E_DCB
10447 err = i40e_init_pf_dcb(pf);
10449 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10450 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10451 /* Continue without DCB enabled */
10453 #endif /* CONFIG_I40E_DCB */
10455 /* set up periodic task facility */
10456 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10457 pf->service_timer_period = HZ;
10459 INIT_WORK(&pf->service_task, i40e_service_task);
10460 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10461 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10463 /* NVM bit on means WoL disabled for the port */
10464 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10465 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10466 pf->wol_en = false;
10469 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10471 /* set up the main switch operations */
10472 i40e_determine_queue_usage(pf);
10473 err = i40e_init_interrupt_scheme(pf);
10475 goto err_switch_setup;
10477 /* The number of VSIs reported by the FW is the minimum guaranteed
10478 * to us; HW supports far more and we share the remaining pool with
10479 * the other PFs. We allocate space for more than the guarantee with
10480 * the understanding that we might not get them all later.
10482 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10483 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10485 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10487 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10488 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10489 pf->vsi = kzalloc(len, GFP_KERNEL);
10492 goto err_switch_setup;
10495 #ifdef CONFIG_PCI_IOV
10496 /* prep for VF support */
10497 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10498 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10499 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10500 if (pci_num_vf(pdev))
10501 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10504 err = i40e_setup_pf_switch(pf, false);
10506 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10510 /* Make sure flow control is set according to current settings */
10511 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10512 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10513 dev_dbg(&pf->pdev->dev,
10514 "Set fc with err %s aq_err %s on get_phy_cap\n",
10515 i40e_stat_str(hw, err),
10516 i40e_aq_str(hw, hw->aq.asq_last_status));
10517 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10518 dev_dbg(&pf->pdev->dev,
10519 "Set fc with err %s aq_err %s on set_phy_config\n",
10520 i40e_stat_str(hw, err),
10521 i40e_aq_str(hw, hw->aq.asq_last_status));
10522 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10523 dev_dbg(&pf->pdev->dev,
10524 "Set fc with err %s aq_err %s on get_link_info\n",
10525 i40e_stat_str(hw, err),
10526 i40e_aq_str(hw, hw->aq.asq_last_status));
10528 /* if FDIR VSI was set up, start it now */
10529 for (i = 0; i < pf->num_alloc_vsi; i++) {
10530 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10531 i40e_vsi_open(pf->vsi[i]);
10536 /* driver is only interested in link up/down and module qualification
10537 * reports from firmware
10539 err = i40e_aq_set_phy_int_mask(&pf->hw,
10540 I40E_AQ_EVENT_LINK_UPDOWN |
10541 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10543 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10544 i40e_stat_str(&pf->hw, err),
10545 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10547 /* Reconfigure hardware for allowing smaller MSS in the case
10548 * of TSO, so that we avoid the MDD being fired and causing
10549 * a reset in the case of small MSS+TSO.
10551 val = rd32(hw, I40E_REG_MSS);
10552 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10553 val &= ~I40E_REG_MSS_MIN_MASK;
10554 val |= I40E_64BYTE_MSS;
10555 wr32(hw, I40E_REG_MSS, val);
10558 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10559 (pf->hw.aq.fw_maj_ver < 4)) {
10561 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10563 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10564 i40e_stat_str(&pf->hw, err),
10565 i40e_aq_str(&pf->hw,
10566 pf->hw.aq.asq_last_status));
10568 /* The main driver is (mostly) up and happy. We need to set this state
10569 * before setting up the misc vector or we get a race and the vector
10570 * ends up disabled forever.
10572 clear_bit(__I40E_DOWN, &pf->state);
10574 /* In case of MSIX we are going to setup the misc vector right here
10575 * to handle admin queue events etc. In case of legacy and MSI
10576 * the misc functionality and queue processing is combined in
10577 * the same vector and that gets setup at open.
10579 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10580 err = i40e_setup_misc_vector(pf);
10582 dev_info(&pdev->dev,
10583 "setup of misc vector failed: %d\n", err);
10588 #ifdef CONFIG_PCI_IOV
10589 /* prep for VF support */
10590 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10591 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10592 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10595 /* disable link interrupts for VFs */
10596 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10597 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10598 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10601 if (pci_num_vf(pdev)) {
10602 dev_info(&pdev->dev,
10603 "Active VFs found, allocating resources.\n");
10604 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10606 dev_info(&pdev->dev,
10607 "Error %d allocating resources for existing VFs\n",
10611 #endif /* CONFIG_PCI_IOV */
10615 i40e_dbg_pf_init(pf);
10617 /* tell the firmware that we're starting */
10618 i40e_send_version(pf);
10620 /* since everything's happy, start the service_task timer */
10621 mod_timer(&pf->service_timer,
10622 round_jiffies(jiffies + pf->service_timer_period));
10625 /* create FCoE interface */
10626 i40e_fcoe_vsi_setup(pf);
10629 #define PCI_SPEED_SIZE 8
10630 #define PCI_WIDTH_SIZE 8
10631 /* Devices on the IOSF bus do not have this information
10632 * and will report PCI Gen 1 x 1 by default so don't bother
10635 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
10636 char speed[PCI_SPEED_SIZE] = "Unknown";
10637 char width[PCI_WIDTH_SIZE] = "Unknown";
10639 /* Get the negotiated link width and speed from PCI config
10642 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
10645 i40e_set_pci_config_data(hw, link_status);
10647 switch (hw->bus.speed) {
10648 case i40e_bus_speed_8000:
10649 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
10650 case i40e_bus_speed_5000:
10651 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
10652 case i40e_bus_speed_2500:
10653 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
10657 switch (hw->bus.width) {
10658 case i40e_bus_width_pcie_x8:
10659 strncpy(width, "8", PCI_WIDTH_SIZE); break;
10660 case i40e_bus_width_pcie_x4:
10661 strncpy(width, "4", PCI_WIDTH_SIZE); break;
10662 case i40e_bus_width_pcie_x2:
10663 strncpy(width, "2", PCI_WIDTH_SIZE); break;
10664 case i40e_bus_width_pcie_x1:
10665 strncpy(width, "1", PCI_WIDTH_SIZE); break;
10670 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
10673 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10674 hw->bus.speed < i40e_bus_speed_8000) {
10675 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10676 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10680 /* get the requested speeds from the fw */
10681 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10683 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
10684 i40e_stat_str(&pf->hw, err),
10685 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10686 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10688 /* get the supported phy types from the fw */
10689 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
10691 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
10692 i40e_stat_str(&pf->hw, err),
10693 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10694 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
10696 /* Add a filter to drop all Flow control frames from any VSI from being
10697 * transmitted. By doing so we stop a malicious VF from sending out
10698 * PAUSE or PFC frames and potentially controlling traffic for other
10700 * The FW can still send Flow control frames if enabled.
10702 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10703 pf->main_vsi_seid);
10705 /* print a string summarizing features */
10706 i40e_print_features(pf);
10710 /* Unwind what we've done if something failed in the setup */
10712 set_bit(__I40E_DOWN, &pf->state);
10713 i40e_clear_interrupt_scheme(pf);
10716 i40e_reset_interrupt_capability(pf);
10717 del_timer_sync(&pf->service_timer);
10719 err_configure_lan_hmc:
10720 (void)i40e_shutdown_lan_hmc(hw);
10722 kfree(pf->qp_pile);
10725 (void)i40e_shutdown_adminq(hw);
10727 iounmap(hw->hw_addr);
10731 pci_disable_pcie_error_reporting(pdev);
10732 pci_release_selected_regions(pdev,
10733 pci_select_bars(pdev, IORESOURCE_MEM));
10736 pci_disable_device(pdev);
10741 * i40e_remove - Device removal routine
10742 * @pdev: PCI device information struct
10744 * i40e_remove is called by the PCI subsystem to alert the driver
10745 * that is should release a PCI device. This could be caused by a
10746 * Hot-Plug event, or because the driver is going to be removed from
10749 static void i40e_remove(struct pci_dev *pdev)
10751 struct i40e_pf *pf = pci_get_drvdata(pdev);
10752 struct i40e_hw *hw = &pf->hw;
10753 i40e_status ret_code;
10756 i40e_dbg_pf_exit(pf);
10760 /* Disable RSS in hw */
10761 wr32(hw, I40E_PFQF_HENA(0), 0);
10762 wr32(hw, I40E_PFQF_HENA(1), 0);
10764 /* no more scheduling of any task */
10765 set_bit(__I40E_DOWN, &pf->state);
10766 del_timer_sync(&pf->service_timer);
10767 cancel_work_sync(&pf->service_task);
10769 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10771 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10774 i40e_fdir_teardown(pf);
10776 /* If there is a switch structure or any orphans, remove them.
10777 * This will leave only the PF's VSI remaining.
10779 for (i = 0; i < I40E_MAX_VEB; i++) {
10783 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10784 pf->veb[i]->uplink_seid == 0)
10785 i40e_switch_branch_release(pf->veb[i]);
10788 /* Now we can shutdown the PF's VSI, just before we kill
10791 if (pf->vsi[pf->lan_vsi])
10792 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10794 /* shutdown and destroy the HMC */
10795 if (pf->hw.hmc.hmc_obj) {
10796 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10798 dev_warn(&pdev->dev,
10799 "Failed to destroy the HMC resources: %d\n",
10803 /* shutdown the adminq */
10804 ret_code = i40e_shutdown_adminq(&pf->hw);
10806 dev_warn(&pdev->dev,
10807 "Failed to destroy the Admin Queue resources: %d\n",
10810 /* destroy the locks only once, here */
10811 mutex_destroy(&hw->aq.arq_mutex);
10812 mutex_destroy(&hw->aq.asq_mutex);
10814 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10815 i40e_clear_interrupt_scheme(pf);
10816 for (i = 0; i < pf->num_alloc_vsi; i++) {
10818 i40e_vsi_clear_rings(pf->vsi[i]);
10819 i40e_vsi_clear(pf->vsi[i]);
10824 for (i = 0; i < I40E_MAX_VEB; i++) {
10829 kfree(pf->qp_pile);
10832 iounmap(pf->hw.hw_addr);
10834 pci_release_selected_regions(pdev,
10835 pci_select_bars(pdev, IORESOURCE_MEM));
10837 pci_disable_pcie_error_reporting(pdev);
10838 pci_disable_device(pdev);
10842 * i40e_pci_error_detected - warning that something funky happened in PCI land
10843 * @pdev: PCI device information struct
10845 * Called to warn that something happened and the error handling steps
10846 * are in progress. Allows the driver to quiesce things, be ready for
10849 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10850 enum pci_channel_state error)
10852 struct i40e_pf *pf = pci_get_drvdata(pdev);
10854 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10857 dev_info(&pdev->dev,
10858 "Cannot recover - error happened during device probe\n");
10859 return PCI_ERS_RESULT_DISCONNECT;
10862 /* shutdown all operations */
10863 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10865 i40e_prep_for_reset(pf);
10869 /* Request a slot reset */
10870 return PCI_ERS_RESULT_NEED_RESET;
10874 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10875 * @pdev: PCI device information struct
10877 * Called to find if the driver can work with the device now that
10878 * the pci slot has been reset. If a basic connection seems good
10879 * (registers are readable and have sane content) then return a
10880 * happy little PCI_ERS_RESULT_xxx.
10882 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10884 struct i40e_pf *pf = pci_get_drvdata(pdev);
10885 pci_ers_result_t result;
10889 dev_dbg(&pdev->dev, "%s\n", __func__);
10890 if (pci_enable_device_mem(pdev)) {
10891 dev_info(&pdev->dev,
10892 "Cannot re-enable PCI device after reset.\n");
10893 result = PCI_ERS_RESULT_DISCONNECT;
10895 pci_set_master(pdev);
10896 pci_restore_state(pdev);
10897 pci_save_state(pdev);
10898 pci_wake_from_d3(pdev, false);
10900 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10902 result = PCI_ERS_RESULT_RECOVERED;
10904 result = PCI_ERS_RESULT_DISCONNECT;
10907 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10909 dev_info(&pdev->dev,
10910 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10912 /* non-fatal, continue */
10919 * i40e_pci_error_resume - restart operations after PCI error recovery
10920 * @pdev: PCI device information struct
10922 * Called to allow the driver to bring things back up after PCI error
10923 * and/or reset recovery has finished.
10925 static void i40e_pci_error_resume(struct pci_dev *pdev)
10927 struct i40e_pf *pf = pci_get_drvdata(pdev);
10929 dev_dbg(&pdev->dev, "%s\n", __func__);
10930 if (test_bit(__I40E_SUSPENDED, &pf->state))
10934 i40e_handle_reset_warning(pf);
10939 * i40e_shutdown - PCI callback for shutting down
10940 * @pdev: PCI device information struct
10942 static void i40e_shutdown(struct pci_dev *pdev)
10944 struct i40e_pf *pf = pci_get_drvdata(pdev);
10945 struct i40e_hw *hw = &pf->hw;
10947 set_bit(__I40E_SUSPENDED, &pf->state);
10948 set_bit(__I40E_DOWN, &pf->state);
10950 i40e_prep_for_reset(pf);
10953 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10954 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10956 del_timer_sync(&pf->service_timer);
10957 cancel_work_sync(&pf->service_task);
10958 i40e_fdir_teardown(pf);
10961 i40e_prep_for_reset(pf);
10964 wr32(hw, I40E_PFPM_APM,
10965 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10966 wr32(hw, I40E_PFPM_WUFC,
10967 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10969 i40e_clear_interrupt_scheme(pf);
10971 if (system_state == SYSTEM_POWER_OFF) {
10972 pci_wake_from_d3(pdev, pf->wol_en);
10973 pci_set_power_state(pdev, PCI_D3hot);
10979 * i40e_suspend - PCI callback for moving to D3
10980 * @pdev: PCI device information struct
10982 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10984 struct i40e_pf *pf = pci_get_drvdata(pdev);
10985 struct i40e_hw *hw = &pf->hw;
10987 set_bit(__I40E_SUSPENDED, &pf->state);
10988 set_bit(__I40E_DOWN, &pf->state);
10991 i40e_prep_for_reset(pf);
10994 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10995 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10997 pci_wake_from_d3(pdev, pf->wol_en);
10998 pci_set_power_state(pdev, PCI_D3hot);
11004 * i40e_resume - PCI callback for waking up from D3
11005 * @pdev: PCI device information struct
11007 static int i40e_resume(struct pci_dev *pdev)
11009 struct i40e_pf *pf = pci_get_drvdata(pdev);
11012 pci_set_power_state(pdev, PCI_D0);
11013 pci_restore_state(pdev);
11014 /* pci_restore_state() clears dev->state_saves, so
11015 * call pci_save_state() again to restore it.
11017 pci_save_state(pdev);
11019 err = pci_enable_device_mem(pdev);
11021 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11024 pci_set_master(pdev);
11026 /* no wakeup events while running */
11027 pci_wake_from_d3(pdev, false);
11029 /* handling the reset will rebuild the device state */
11030 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11031 clear_bit(__I40E_DOWN, &pf->state);
11033 i40e_reset_and_rebuild(pf, false);
11041 static const struct pci_error_handlers i40e_err_handler = {
11042 .error_detected = i40e_pci_error_detected,
11043 .slot_reset = i40e_pci_error_slot_reset,
11044 .resume = i40e_pci_error_resume,
11047 static struct pci_driver i40e_driver = {
11048 .name = i40e_driver_name,
11049 .id_table = i40e_pci_tbl,
11050 .probe = i40e_probe,
11051 .remove = i40e_remove,
11053 .suspend = i40e_suspend,
11054 .resume = i40e_resume,
11056 .shutdown = i40e_shutdown,
11057 .err_handler = &i40e_err_handler,
11058 .sriov_configure = i40e_pci_sriov_configure,
11062 * i40e_init_module - Driver registration routine
11064 * i40e_init_module is the first routine called when the driver is
11065 * loaded. All it does is register with the PCI subsystem.
11067 static int __init i40e_init_module(void)
11069 pr_info("%s: %s - version %s\n", i40e_driver_name,
11070 i40e_driver_string, i40e_driver_version_str);
11071 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11074 return pci_register_driver(&i40e_driver);
11076 module_init(i40e_init_module);
11079 * i40e_exit_module - Driver exit cleanup routine
11081 * i40e_exit_module is called just before the driver is removed
11084 static void __exit i40e_exit_module(void)
11086 pci_unregister_driver(&i40e_driver);
11089 module_exit(i40e_exit_module);