kernel/drivers/net/ethernet/intel/e1000e/netdev.c

   1 /* Intel PRO/1000 Linux driver
   2  * Copyright(c) 1999 - 2015 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  *
  16  * Contact Information:
  17  * Linux NICS <linux.nics@intel.com>
  18  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20  */
  21
  22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23
  24 #include <linux/module.h>
  25 #include <linux/types.h>
  26 #include <linux/init.h>
  27 #include <linux/pci.h>
  28 #include <linux/vmalloc.h>
  29 #include <linux/pagemap.h>
  30 #include <linux/delay.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/tcp.h>
  34 #include <linux/ipv6.h>
  35 #include <linux/slab.h>
  36 #include <net/checksum.h>
  37 #include <net/ip6_checksum.h>
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/cpu.h>
  41 #include <linux/smp.h>
  42 #include <linux/pm_qos.h>
  43 #include <linux/pm_runtime.h>
  44 #include <linux/aer.h>
  45 #include <linux/prefetch.h>
  46
  47 #include "e1000.h"
  48
  49 #define DRV_EXTRAVERSION "-k"
  50
  51 #define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
  52 char e1000e_driver_name[] = "e1000e";
  53 const char e1000e_driver_version[] = DRV_VERSION;
  54
  55 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  56 static int debug = -1;
  57 module_param(debug, int, 0);
  58 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  59
  60 static const struct e1000_info *e1000_info_tbl[] = {
  61         [board_82571]           = &e1000_82571_info,
  62         [board_82572]           = &e1000_82572_info,
  63         [board_82573]           = &e1000_82573_info,
  64         [board_82574]           = &e1000_82574_info,
  65         [board_82583]           = &e1000_82583_info,
  66         [board_80003es2lan]     = &e1000_es2_info,
  67         [board_ich8lan]         = &e1000_ich8_info,
  68         [board_ich9lan]         = &e1000_ich9_info,
  69         [board_ich10lan]        = &e1000_ich10_info,
  70         [board_pchlan]          = &e1000_pch_info,
  71         [board_pch2lan]         = &e1000_pch2_info,
  72         [board_pch_lpt]         = &e1000_pch_lpt_info,
  73         [board_pch_spt]         = &e1000_pch_spt_info,
  74 };
  75
  76 struct e1000_reg_info {
  77         u32 ofs;
  78         char *name;
  79 };
  80
  81 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  82         /* General Registers */
  83         {E1000_CTRL, "CTRL"},
  84         {E1000_STATUS, "STATUS"},
  85         {E1000_CTRL_EXT, "CTRL_EXT"},
  86
  87         /* Interrupt Registers */
  88         {E1000_ICR, "ICR"},
  89
  90         /* Rx Registers */
  91         {E1000_RCTL, "RCTL"},
  92         {E1000_RDLEN(0), "RDLEN"},
  93         {E1000_RDH(0), "RDH"},
  94         {E1000_RDT(0), "RDT"},
  95         {E1000_RDTR, "RDTR"},
  96         {E1000_RXDCTL(0), "RXDCTL"},
  97         {E1000_ERT, "ERT"},
  98         {E1000_RDBAL(0), "RDBAL"},
  99         {E1000_RDBAH(0), "RDBAH"},
 100         {E1000_RDFH, "RDFH"},
 101         {E1000_RDFT, "RDFT"},
 102         {E1000_RDFHS, "RDFHS"},
 103         {E1000_RDFTS, "RDFTS"},
 104         {E1000_RDFPC, "RDFPC"},
 105
 106         /* Tx Registers */
 107         {E1000_TCTL, "TCTL"},
 108         {E1000_TDBAL(0), "TDBAL"},
 109         {E1000_TDBAH(0), "TDBAH"},
 110         {E1000_TDLEN(0), "TDLEN"},
 111         {E1000_TDH(0), "TDH"},
 112         {E1000_TDT(0), "TDT"},
 113         {E1000_TIDV, "TIDV"},
 114         {E1000_TXDCTL(0), "TXDCTL"},
 115         {E1000_TADV, "TADV"},
 116         {E1000_TARC(0), "TARC"},
 117         {E1000_TDFH, "TDFH"},
 118         {E1000_TDFT, "TDFT"},
 119         {E1000_TDFHS, "TDFHS"},
 120         {E1000_TDFTS, "TDFTS"},
 121         {E1000_TDFPC, "TDFPC"},
 122
 123         /* List Terminator */
 124         {0, NULL}
 125 };
 126
 127 /**
 128  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
 129  * @hw: pointer to the HW structure
 130  *
 131  * When updating the MAC CSR registers, the Manageability Engine (ME) could
 132  * be accessing the registers at the same time.  Normally, this is handled in
 133  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
 134  * accesses later than it should which could result in the register to have
 135  * an incorrect value.  Workaround this by checking the FWSM register which
 136  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
 137  * and try again a number of times.
 138  **/
 139 s32 __ew32_prepare(struct e1000_hw *hw)
 140 {
 141         s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 142
 143         while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
 144                 udelay(50);
 145
 146         return i;
 147 }
 148
 149 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 150 {
 151         if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 152                 __ew32_prepare(hw);
 153
 154         writel(val, hw->hw_addr + reg);
 155 }
 156
 157 /**
 158  * e1000_regdump - register printout routine
 159  * @hw: pointer to the HW structure
 160  * @reginfo: pointer to the register info table
 161  **/
 162 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 163 {
 164         int n = 0;
 165         char rname[16];
 166         u32 regs[8];
 167
 168         switch (reginfo->ofs) {
 169         case E1000_RXDCTL(0):
 170                 for (n = 0; n < 2; n++)
 171                         regs[n] = __er32(hw, E1000_RXDCTL(n));
 172                 break;
 173         case E1000_TXDCTL(0):
 174                 for (n = 0; n < 2; n++)
 175                         regs[n] = __er32(hw, E1000_TXDCTL(n));
 176                 break;
 177         case E1000_TARC(0):
 178                 for (n = 0; n < 2; n++)
 179                         regs[n] = __er32(hw, E1000_TARC(n));
 180                 break;
 181         default:
 182                 pr_info("%-15s %08x\n",
 183                         reginfo->name, __er32(hw, reginfo->ofs));
 184                 return;
 185         }
 186
 187         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 188         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 189 }
 190
 191 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 192                                  struct e1000_buffer *bi)
 193 {
 194         int i;
 195         struct e1000_ps_page *ps_page;
 196
 197         for (i = 0; i < adapter->rx_ps_pages; i++) {
 198                 ps_page = &bi->ps_pages[i];
 199
 200                 if (ps_page->page) {
 201                         pr_info("packet dump for ps_page %d:\n", i);
 202                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 203                                        16, 1, page_address(ps_page->page),
 204                                        PAGE_SIZE, true);
 205                 }
 206         }
 207 }
 208
 209 /**
 210  * e1000e_dump - Print registers, Tx-ring and Rx-ring
 211  * @adapter: board private structure
 212  **/
 213 static void e1000e_dump(struct e1000_adapter *adapter)
 214 {
 215         struct net_device *netdev = adapter->netdev;
 216         struct e1000_hw *hw = &adapter->hw;
 217         struct e1000_reg_info *reginfo;
 218         struct e1000_ring *tx_ring = adapter->tx_ring;
 219         struct e1000_tx_desc *tx_desc;
 220         struct my_u0 {
 221                 __le64 a;
 222                 __le64 b;
 223         } *u0;
 224         struct e1000_buffer *buffer_info;
 225         struct e1000_ring *rx_ring = adapter->rx_ring;
 226         union e1000_rx_desc_packet_split *rx_desc_ps;
 227         union e1000_rx_desc_extended *rx_desc;
 228         struct my_u1 {
 229                 __le64 a;
 230                 __le64 b;
 231                 __le64 c;
 232                 __le64 d;
 233         } *u1;
 234         u32 staterr;
 235         int i = 0;
 236
 237         if (!netif_msg_hw(adapter))
 238                 return;
 239
 240         /* Print netdevice Info */
 241         if (netdev) {
 242                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 243                 pr_info("Device Name     state            trans_start      last_rx\n");
 244                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 245                         netdev->state, netdev->trans_start, netdev->last_rx);
 246         }
 247
 248         /* Print Registers */
 249         dev_info(&adapter->pdev->dev, "Register Dump\n");
 250         pr_info(" Register Name   Value\n");
 251         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 252              reginfo->name; reginfo++) {
 253                 e1000_regdump(hw, reginfo);
 254         }
 255
 256         /* Print Tx Ring Summary */
 257         if (!netdev || !netif_running(netdev))
 258                 return;
 259
 260         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 261         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 262         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 263         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 264                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
 265                 (unsigned long long)buffer_info->dma,
 266                 buffer_info->length,
 267                 buffer_info->next_to_watch,
 268                 (unsigned long long)buffer_info->time_stamp);
 269
 270         /* Print Tx Ring */
 271         if (!netif_msg_tx_done(adapter))
 272                 goto rx_ring_summary;
 273
 274         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 275
 276         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 277          *
 278          * Legacy Transmit Descriptor
 279          *   +--------------------------------------------------------------+
 280          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 281          *   +--------------------------------------------------------------+
 282          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 283          *   +--------------------------------------------------------------+
 284          *   63       48 47        36 35    32 31     24 23    16 15        0
 285          *
 286          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 287          *   63      48 47    40 39       32 31             16 15    8 7      0
 288          *   +----------------------------------------------------------------+
 289          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 290          *   +----------------------------------------------------------------+
 291          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 292          *   +----------------------------------------------------------------+
 293          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 294          *
 295          * Extended Data Descriptor (DTYP=0x1)
 296          *   +----------------------------------------------------------------+
 297          * 0 |                     Buffer Address [63:0]                      |
 298          *   +----------------------------------------------------------------+
 299          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 300          *   +----------------------------------------------------------------+
 301          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 302          */
 303         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 304         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 305         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 306         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 307                 const char *next_desc;
 308                 tx_desc = E1000_TX_DESC(*tx_ring, i);
 309                 buffer_info = &tx_ring->buffer_info[i];
 310                 u0 = (struct my_u0 *)tx_desc;
 311                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 312                         next_desc = " NTC/U";
 313                 else if (i == tx_ring->next_to_use)
 314                         next_desc = " NTU";
 315                 else if (i == tx_ring->next_to_clean)
 316                         next_desc = " NTC";
 317                 else
 318                         next_desc = "";
 319                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 320                         (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
 321                          ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
 322                         i,
 323                         (unsigned long long)le64_to_cpu(u0->a),
 324                         (unsigned long long)le64_to_cpu(u0->b),
 325                         (unsigned long long)buffer_info->dma,
 326                         buffer_info->length, buffer_info->next_to_watch,
 327                         (unsigned long long)buffer_info->time_stamp,
 328                         buffer_info->skb, next_desc);
 329
 330                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
 331                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 332                                        16, 1, buffer_info->skb->data,
 333                                        buffer_info->skb->len, true);
 334         }
 335
 336         /* Print Rx Ring Summary */
 337 rx_ring_summary:
 338         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 339         pr_info("Queue [NTU] [NTC]\n");
 340         pr_info(" %5d %5X %5X\n",
 341                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
 342
 343         /* Print Rx Ring */
 344         if (!netif_msg_rx_status(adapter))
 345                 return;
 346
 347         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 348         switch (adapter->rx_ps_pages) {
 349         case 1:
 350         case 2:
 351         case 3:
 352                 /* [Extended] Packet Split Receive Descriptor Format
 353                  *
 354                  *    +-----------------------------------------------------+
 355                  *  0 |                Buffer Address 0 [63:0]              |
 356                  *    +-----------------------------------------------------+
 357                  *  8 |                Buffer Address 1 [63:0]              |
 358                  *    +-----------------------------------------------------+
 359                  * 16 |                Buffer Address 2 [63:0]              |
 360                  *    +-----------------------------------------------------+
 361                  * 24 |                Buffer Address 3 [63:0]              |
 362                  *    +-----------------------------------------------------+
 363                  */
 364                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 365                 /* [Extended] Receive Descriptor (Write-Back) Format
 366                  *
 367                  *   63       48 47    32 31     13 12    8 7    4 3        0
 368                  *   +------------------------------------------------------+
 369                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 370                  *   | Checksum | Ident  |         | Queue |      |  Type   |
 371                  *   +------------------------------------------------------+
 372                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 373                  *   +------------------------------------------------------+
 374                  *   63       48 47    32 31            20 19               0
 375                  */
 376                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 377                 for (i = 0; i < rx_ring->count; i++) {
 378                         const char *next_desc;
 379                         buffer_info = &rx_ring->buffer_info[i];
 380                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 381                         u1 = (struct my_u1 *)rx_desc_ps;
 382                         staterr =
 383                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 384
 385                         if (i == rx_ring->next_to_use)
 386                                 next_desc = " NTU";
 387                         else if (i == rx_ring->next_to_clean)
 388                                 next_desc = " NTC";
 389                         else
 390                                 next_desc = "";
 391
 392                         if (staterr & E1000_RXD_STAT_DD) {
 393                                 /* Descriptor Done */
 394                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 395                                         "RWB", i,
 396                                         (unsigned long long)le64_to_cpu(u1->a),
 397                                         (unsigned long long)le64_to_cpu(u1->b),
 398                                         (unsigned long long)le64_to_cpu(u1->c),
 399                                         (unsigned long long)le64_to_cpu(u1->d),
 400                                         buffer_info->skb, next_desc);
 401                         } else {
 402                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 403                                         "R  ", i,
 404                                         (unsigned long long)le64_to_cpu(u1->a),
 405                                         (unsigned long long)le64_to_cpu(u1->b),
 406                                         (unsigned long long)le64_to_cpu(u1->c),
 407                                         (unsigned long long)le64_to_cpu(u1->d),
 408                                         (unsigned long long)buffer_info->dma,
 409                                         buffer_info->skb, next_desc);
 410
 411                                 if (netif_msg_pktdata(adapter))
 412                                         e1000e_dump_ps_pages(adapter,
 413                                                              buffer_info);
 414                         }
 415                 }
 416                 break;
 417         default:
 418         case 0:
 419                 /* Extended Receive Descriptor (Read) Format
 420                  *
 421                  *   +-----------------------------------------------------+
 422                  * 0 |                Buffer Address [63:0]                |
 423                  *   +-----------------------------------------------------+
 424                  * 8 |                      Reserved                       |
 425                  *   +-----------------------------------------------------+
 426                  */
 427                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 428                 /* Extended Receive Descriptor (Write-Back) Format
 429                  *
 430                  *   63       48 47    32 31    24 23            4 3        0
 431                  *   +------------------------------------------------------+
 432                  *   |     RSS Hash      |        |               |         |
 433                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 434                  *   | Packet   | IP     |        |               |  Type   |
 435                  *   | Checksum | Ident  |        |               |         |
 436                  *   +------------------------------------------------------+
 437                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 438                  *   +------------------------------------------------------+
 439                  *   63       48 47    32 31            20 19               0
 440                  */
 441                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 442
 443                 for (i = 0; i < rx_ring->count; i++) {
 444                         const char *next_desc;
 445
 446                         buffer_info = &rx_ring->buffer_info[i];
 447                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 448                         u1 = (struct my_u1 *)rx_desc;
 449                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 450
 451                         if (i == rx_ring->next_to_use)
 452                                 next_desc = " NTU";
 453                         else if (i == rx_ring->next_to_clean)
 454                                 next_desc = " NTC";
 455                         else
 456                                 next_desc = "";
 457
 458                         if (staterr & E1000_RXD_STAT_DD) {
 459                                 /* Descriptor Done */
 460                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 461                                         "RWB", i,
 462                                         (unsigned long long)le64_to_cpu(u1->a),
 463                                         (unsigned long long)le64_to_cpu(u1->b),
 464                                         buffer_info->skb, next_desc);
 465                         } else {
 466                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 467                                         "R  ", i,
 468                                         (unsigned long long)le64_to_cpu(u1->a),
 469                                         (unsigned long long)le64_to_cpu(u1->b),
 470                                         (unsigned long long)buffer_info->dma,
 471                                         buffer_info->skb, next_desc);
 472
 473                                 if (netif_msg_pktdata(adapter) &&
 474                                     buffer_info->skb)
 475                                         print_hex_dump(KERN_INFO, "",
 476                                                        DUMP_PREFIX_ADDRESS, 16,
 477                                                        1,
 478                                                        buffer_info->skb->data,
 479                                                        adapter->rx_buffer_len,
 480                                                        true);
 481                         }
 482                 }
 483         }
 484 }
 485
 486 /**
 487  * e1000_desc_unused - calculate if we have unused descriptors
 488  **/
 489 static int e1000_desc_unused(struct e1000_ring *ring)
 490 {
 491         if (ring->next_to_clean > ring->next_to_use)
 492                 return ring->next_to_clean - ring->next_to_use - 1;
 493
 494         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 495 }
 496
 497 /**
 498  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 499  * @adapter: board private structure
 500  * @hwtstamps: time stamp structure to update
 501  * @systim: unsigned 64bit system time value.
 502  *
 503  * Convert the system time value stored in the RX/TXSTMP registers into a
 504  * hwtstamp which can be used by the upper level time stamping functions.
 505  *
 506  * The 'systim_lock' spinlock is used to protect the consistency of the
 507  * system time value. This is needed because reading the 64 bit time
 508  * value involves reading two 32 bit registers. The first read latches the
 509  * value.
 510  **/
 511 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 512                                       struct skb_shared_hwtstamps *hwtstamps,
 513                                       u64 systim)
 514 {
 515         u64 ns;
 516         unsigned long flags;
 517
 518         spin_lock_irqsave(&adapter->systim_lock, flags);
 519         ns = timecounter_cyc2time(&adapter->tc, systim);
 520         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 521
 522         memset(hwtstamps, 0, sizeof(*hwtstamps));
 523         hwtstamps->hwtstamp = ns_to_ktime(ns);
 524 }
 525
 526 /**
 527  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 528  * @adapter: board private structure
 529  * @status: descriptor extended error and status field
 530  * @skb: particular skb to include time stamp
 531  *
 532  * If the time stamp is valid, convert it into the timecounter ns value
 533  * and store that result into the shhwtstamps structure which is passed
 534  * up the network stack.
 535  **/
 536 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 537                                struct sk_buff *skb)
 538 {
 539         struct e1000_hw *hw = &adapter->hw;
 540         u64 rxstmp;
 541
 542         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 543             !(status & E1000_RXDEXT_STATERR_TST) ||
 544             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 545                 return;
 546
 547         /* The Rx time stamp registers contain the time stamp.  No other
 548          * received packet will be time stamped until the Rx time stamp
 549          * registers are read.  Because only one packet can be time stamped
 550          * at a time, the register values must belong to this packet and
 551          * therefore none of the other additional attributes need to be
 552          * compared.
 553          */
 554         rxstmp = (u64)er32(RXSTMPL);
 555         rxstmp |= (u64)er32(RXSTMPH) << 32;
 556         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 557
 558         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 559 }
 560
 561 /**
 562  * e1000_receive_skb - helper function to handle Rx indications
 563  * @adapter: board private structure
 564  * @staterr: descriptor extended error and status field as written by hardware
 565  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 566  * @skb: pointer to sk_buff to be indicated to stack
 567  **/
 568 static void e1000_receive_skb(struct e1000_adapter *adapter,
 569                               struct net_device *netdev, struct sk_buff *skb,
 570                               u32 staterr, __le16 vlan)
 571 {
 572         u16 tag = le16_to_cpu(vlan);
 573
 574         e1000e_rx_hwtstamp(adapter, staterr, skb);
 575
 576         skb->protocol = eth_type_trans(skb, netdev);
 577
 578         if (staterr & E1000_RXD_STAT_VP)
 579                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 580
 581         napi_gro_receive(&adapter->napi, skb);
 582 }
 583
 584 /**
 585  * e1000_rx_checksum - Receive Checksum Offload
 586  * @adapter: board private structure
 587  * @status_err: receive descriptor status and error fields
 588  * @csum: receive descriptor csum field
 589  * @sk_buff: socket buffer with received data
 590  **/
 591 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 592                               struct sk_buff *skb)
 593 {
 594         u16 status = (u16)status_err;
 595         u8 errors = (u8)(status_err >> 24);
 596
 597         skb_checksum_none_assert(skb);
 598
 599         /* Rx checksum disabled */
 600         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 601                 return;
 602
 603         /* Ignore Checksum bit is set */
 604         if (status & E1000_RXD_STAT_IXSM)
 605                 return;
 606
 607         /* TCP/UDP checksum error bit or IP checksum error bit is set */
 608         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 609                 /* let the stack verify checksum errors */
 610                 adapter->hw_csum_err++;
 611                 return;
 612         }
 613
 614         /* TCP/UDP Checksum has not been calculated */
 615         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 616                 return;
 617
 618         /* It must be a TCP or UDP packet with a valid checksum */
 619         skb->ip_summed = CHECKSUM_UNNECESSARY;
 620         adapter->hw_csum_good++;
 621 }
 622
 623 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 624 {
 625         struct e1000_adapter *adapter = rx_ring->adapter;
 626         struct e1000_hw *hw = &adapter->hw;
 627         s32 ret_val = __ew32_prepare(hw);
 628
 629         writel(i, rx_ring->tail);
 630
 631         if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
 632                 u32 rctl = er32(RCTL);
 633
 634                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
 635                 e_err("ME firmware caused invalid RDT - resetting\n");
 636                 schedule_work(&adapter->reset_task);
 637         }
 638 }
 639
 640 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 641 {
 642         struct e1000_adapter *adapter = tx_ring->adapter;
 643         struct e1000_hw *hw = &adapter->hw;
 644         s32 ret_val = __ew32_prepare(hw);
 645
 646         writel(i, tx_ring->tail);
 647
 648         if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
 649                 u32 tctl = er32(TCTL);
 650
 651                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
 652                 e_err("ME firmware caused invalid TDT - resetting\n");
 653                 schedule_work(&adapter->reset_task);
 654         }
 655 }
 656
 657 /**
 658  * e1000_alloc_rx_buffers - Replace used receive buffers
 659  * @rx_ring: Rx descriptor ring
 660  **/
 661 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 662                                    int cleaned_count, gfp_t gfp)
 663 {
 664         struct e1000_adapter *adapter = rx_ring->adapter;
 665         struct net_device *netdev = adapter->netdev;
 666         struct pci_dev *pdev = adapter->pdev;
 667         union e1000_rx_desc_extended *rx_desc;
 668         struct e1000_buffer *buffer_info;
 669         struct sk_buff *skb;
 670         unsigned int i;
 671         unsigned int bufsz = adapter->rx_buffer_len;
 672
 673         i = rx_ring->next_to_use;
 674         buffer_info = &rx_ring->buffer_info[i];
 675
 676         while (cleaned_count--) {
 677                 skb = buffer_info->skb;
 678                 if (skb) {
 679                         skb_trim(skb, 0);
 680                         goto map_skb;
 681                 }
 682
 683                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 684                 if (!skb) {
 685                         /* Better luck next round */
 686                         adapter->alloc_rx_buff_failed++;
 687                         break;
 688                 }
 689
 690                 buffer_info->skb = skb;
 691 map_skb:
 692                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 693                                                   adapter->rx_buffer_len,
 694                                                   DMA_FROM_DEVICE);
 695                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 696                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 697                         adapter->rx_dma_failed++;
 698                         break;
 699                 }
 700
 701                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 702                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 703
 704                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 705                         /* Force memory writes to complete before letting h/w
 706                          * know there are new descriptors to fetch.  (Only
 707                          * applicable for weak-ordered memory model archs,
 708                          * such as IA-64).
 709                          */
 710                         wmb();
 711                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 712                                 e1000e_update_rdt_wa(rx_ring, i);
 713                         else
 714                                 writel(i, rx_ring->tail);
 715                 }
 716                 i++;
 717                 if (i == rx_ring->count)
 718                         i = 0;
 719                 buffer_info = &rx_ring->buffer_info[i];
 720         }
 721
 722         rx_ring->next_to_use = i;
 723 }
 724
 725 /**
 726  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 727  * @rx_ring: Rx descriptor ring
 728  **/
 729 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 730                                       int cleaned_count, gfp_t gfp)
 731 {
 732         struct e1000_adapter *adapter = rx_ring->adapter;
 733         struct net_device *netdev = adapter->netdev;
 734         struct pci_dev *pdev = adapter->pdev;
 735         union e1000_rx_desc_packet_split *rx_desc;
 736         struct e1000_buffer *buffer_info;
 737         struct e1000_ps_page *ps_page;
 738         struct sk_buff *skb;
 739         unsigned int i, j;
 740
 741         i = rx_ring->next_to_use;
 742         buffer_info = &rx_ring->buffer_info[i];
 743
 744         while (cleaned_count--) {
 745                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 746
 747                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 748                         ps_page = &buffer_info->ps_pages[j];
 749                         if (j >= adapter->rx_ps_pages) {
 750                                 /* all unused desc entries get hw null ptr */
 751                                 rx_desc->read.buffer_addr[j + 1] =
 752                                     ~cpu_to_le64(0);
 753                                 continue;
 754                         }
 755                         if (!ps_page->page) {
 756                                 ps_page->page = alloc_page(gfp);
 757                                 if (!ps_page->page) {
 758                                         adapter->alloc_rx_buff_failed++;
 759                                         goto no_buffers;
 760                                 }
 761                                 ps_page->dma = dma_map_page(&pdev->dev,
 762                                                             ps_page->page,
 763                                                             0, PAGE_SIZE,
 764                                                             DMA_FROM_DEVICE);
 765                                 if (dma_mapping_error(&pdev->dev,
 766                                                       ps_page->dma)) {
 767                                         dev_err(&adapter->pdev->dev,
 768                                                 "Rx DMA page map failed\n");
 769                                         adapter->rx_dma_failed++;
 770                                         goto no_buffers;
 771                                 }
 772                         }
 773                         /* Refresh the desc even if buffer_addrs
 774                          * didn't change because each write-back
 775                          * erases this info.
 776                          */
 777                         rx_desc->read.buffer_addr[j + 1] =
 778                             cpu_to_le64(ps_page->dma);
 779                 }
 780
 781                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 782                                                   gfp);
 783
 784                 if (!skb) {
 785                         adapter->alloc_rx_buff_failed++;
 786                         break;
 787                 }
 788
 789                 buffer_info->skb = skb;
 790                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 791                                                   adapter->rx_ps_bsize0,
 792                                                   DMA_FROM_DEVICE);
 793                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 794                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 795                         adapter->rx_dma_failed++;
 796                         /* cleanup skb */
 797                         dev_kfree_skb_any(skb);
 798                         buffer_info->skb = NULL;
 799                         break;
 800                 }
 801
 802                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 803
 804                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 805                         /* Force memory writes to complete before letting h/w
 806                          * know there are new descriptors to fetch.  (Only
 807                          * applicable for weak-ordered memory model archs,
 808                          * such as IA-64).
 809                          */
 810                         wmb();
 811                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 812                                 e1000e_update_rdt_wa(rx_ring, i << 1);
 813                         else
 814                                 writel(i << 1, rx_ring->tail);
 815                 }
 816
 817                 i++;
 818                 if (i == rx_ring->count)
 819                         i = 0;
 820                 buffer_info = &rx_ring->buffer_info[i];
 821         }
 822
 823 no_buffers:
 824         rx_ring->next_to_use = i;
 825 }
 826
 827 /**
 828  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 829  * @rx_ring: Rx descriptor ring
 830  * @cleaned_count: number of buffers to allocate this pass
 831  **/
 832
 833 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 834                                          int cleaned_count, gfp_t gfp)
 835 {
 836         struct e1000_adapter *adapter = rx_ring->adapter;
 837         struct net_device *netdev = adapter->netdev;
 838         struct pci_dev *pdev = adapter->pdev;
 839         union e1000_rx_desc_extended *rx_desc;
 840         struct e1000_buffer *buffer_info;
 841         struct sk_buff *skb;
 842         unsigned int i;
 843         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 844
 845         i = rx_ring->next_to_use;
 846         buffer_info = &rx_ring->buffer_info[i];
 847
 848         while (cleaned_count--) {
 849                 skb = buffer_info->skb;
 850                 if (skb) {
 851                         skb_trim(skb, 0);
 852                         goto check_page;
 853                 }
 854
 855                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 856                 if (unlikely(!skb)) {
 857                         /* Better luck next round */
 858                         adapter->alloc_rx_buff_failed++;
 859                         break;
 860                 }
 861
 862                 buffer_info->skb = skb;
 863 check_page:
 864                 /* allocate a new page if necessary */
 865                 if (!buffer_info->page) {
 866                         buffer_info->page = alloc_page(gfp);
 867                         if (unlikely(!buffer_info->page)) {
 868                                 adapter->alloc_rx_buff_failed++;
 869                                 break;
 870                         }
 871                 }
 872
 873                 if (!buffer_info->dma) {
 874                         buffer_info->dma = dma_map_page(&pdev->dev,
 875                                                         buffer_info->page, 0,
 876                                                         PAGE_SIZE,
 877                                                         DMA_FROM_DEVICE);
 878                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 879                                 adapter->alloc_rx_buff_failed++;
 880                                 break;
 881                         }
 882                 }
 883
 884                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 885                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 886
 887                 if (unlikely(++i == rx_ring->count))
 888                         i = 0;
 889                 buffer_info = &rx_ring->buffer_info[i];
 890         }
 891
 892         if (likely(rx_ring->next_to_use != i)) {
 893                 rx_ring->next_to_use = i;
 894                 if (unlikely(i-- == 0))
 895                         i = (rx_ring->count - 1);
 896
 897                 /* Force memory writes to complete before letting h/w
 898                  * know there are new descriptors to fetch.  (Only
 899                  * applicable for weak-ordered memory model archs,
 900                  * such as IA-64).
 901                  */
 902                 wmb();
 903                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 904                         e1000e_update_rdt_wa(rx_ring, i);
 905                 else
 906                         writel(i, rx_ring->tail);
 907         }
 908 }
 909
 910 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 911                                  struct sk_buff *skb)
 912 {
 913         if (netdev->features & NETIF_F_RXHASH)
 914                 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
 915 }
 916
 917 /**
 918  * e1000_clean_rx_irq - Send received data up the network stack
 919  * @rx_ring: Rx descriptor ring
 920  *
 921  * the return value indicates whether actual cleaning was done, there
 922  * is no guarantee that everything was cleaned
 923  **/
 924 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 925                                int work_to_do)
 926 {
 927         struct e1000_adapter *adapter = rx_ring->adapter;
 928         struct net_device *netdev = adapter->netdev;
 929         struct pci_dev *pdev = adapter->pdev;
 930         struct e1000_hw *hw = &adapter->hw;
 931         union e1000_rx_desc_extended *rx_desc, *next_rxd;
 932         struct e1000_buffer *buffer_info, *next_buffer;
 933         u32 length, staterr;
 934         unsigned int i;
 935         int cleaned_count = 0;
 936         bool cleaned = false;
 937         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 938
 939         i = rx_ring->next_to_clean;
 940         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 941         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 942         buffer_info = &rx_ring->buffer_info[i];
 943
 944         while (staterr & E1000_RXD_STAT_DD) {
 945                 struct sk_buff *skb;
 946
 947                 if (*work_done >= work_to_do)
 948                         break;
 949                 (*work_done)++;
 950                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
 951
 952                 skb = buffer_info->skb;
 953                 buffer_info->skb = NULL;
 954
 955                 prefetch(skb->data - NET_IP_ALIGN);
 956
 957                 i++;
 958                 if (i == rx_ring->count)
 959                         i = 0;
 960                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 961                 prefetch(next_rxd);
 962
 963                 next_buffer = &rx_ring->buffer_info[i];
 964
 965                 cleaned = true;
 966                 cleaned_count++;
 967                 dma_unmap_single(&pdev->dev, buffer_info->dma,
 968                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
 969                 buffer_info->dma = 0;
 970
 971                 length = le16_to_cpu(rx_desc->wb.upper.length);
 972
 973                 /* !EOP means multiple descriptors were used to store a single
 974                  * packet, if that's the case we need to toss it.  In fact, we
 975                  * need to toss every packet with the EOP bit clear and the
 976                  * next frame that _does_ have the EOP bit set, as it is by
 977                  * definition only a frame fragment
 978                  */
 979                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
 980                         adapter->flags2 |= FLAG2_IS_DISCARDING;
 981
 982                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 983                         /* All receives must fit into a single buffer */
 984                         e_dbg("Receive packet consumed multiple buffers\n");
 985                         /* recycle */
 986                         buffer_info->skb = skb;
 987                         if (staterr & E1000_RXD_STAT_EOP)
 988                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 989                         goto next_desc;
 990                 }
 991
 992                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
 993                              !(netdev->features & NETIF_F_RXALL))) {
 994                         /* recycle */
 995                         buffer_info->skb = skb;
 996                         goto next_desc;
 997                 }
 998
 999                 /* adjust length to remove Ethernet CRC */
1000                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1001                         /* If configured to store CRC, don't subtract FCS,
1002                          * but keep the FCS bytes out of the total_rx_bytes
1003                          * counter
1004                          */
1005                         if (netdev->features & NETIF_F_RXFCS)
1006                                 total_rx_bytes -= 4;
1007                         else
1008                                 length -= 4;
1009                 }
1010
1011                 total_rx_bytes += length;
1012                 total_rx_packets++;
1013
1014                 /* code added for copybreak, this should improve
1015                  * performance for small packets with large amounts
1016                  * of reassembly being done in the stack
1017                  */
1018                 if (length < copybreak) {
1019                         struct sk_buff *new_skb =
1020                                 napi_alloc_skb(&adapter->napi, length);
1021                         if (new_skb) {
1022                                 skb_copy_to_linear_data_offset(new_skb,
1023                                                                -NET_IP_ALIGN,
1024                                                                (skb->data -
1025                                                                 NET_IP_ALIGN),
1026                                                                (length +
1027                                                                 NET_IP_ALIGN));
1028                                 /* save the skb in buffer_info as good */
1029                                 buffer_info->skb = skb;
1030                                 skb = new_skb;
1031                         }
1032                         /* else just continue with the old one */
1033                 }
1034                 /* end copybreak code */
1035                 skb_put(skb, length);
1036
1037                 /* Receive Checksum Offload */
1038                 e1000_rx_checksum(adapter, staterr, skb);
1039
1040                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1041
1042                 e1000_receive_skb(adapter, netdev, skb, staterr,
1043                                   rx_desc->wb.upper.vlan);
1044
1045 next_desc:
1046                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1047
1048                 /* return some buffers to hardware, one at a time is too slow */
1049                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1050                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1051                                               GFP_ATOMIC);
1052                         cleaned_count = 0;
1053                 }
1054
1055                 /* use prefetched values */
1056                 rx_desc = next_rxd;
1057                 buffer_info = next_buffer;
1058
1059                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1060         }
1061         rx_ring->next_to_clean = i;
1062
1063         cleaned_count = e1000_desc_unused(rx_ring);
1064         if (cleaned_count)
1065                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1066
1067         adapter->total_rx_bytes += total_rx_bytes;
1068         adapter->total_rx_packets += total_rx_packets;
1069         return cleaned;
1070 }
1071
1072 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1073                             struct e1000_buffer *buffer_info)
1074 {
1075         struct e1000_adapter *adapter = tx_ring->adapter;
1076
1077         if (buffer_info->dma) {
1078                 if (buffer_info->mapped_as_page)
1079                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1080                                        buffer_info->length, DMA_TO_DEVICE);
1081                 else
1082                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1083                                          buffer_info->length, DMA_TO_DEVICE);
1084                 buffer_info->dma = 0;
1085         }
1086         if (buffer_info->skb) {
1087                 dev_kfree_skb_any(buffer_info->skb);
1088                 buffer_info->skb = NULL;
1089         }
1090         buffer_info->time_stamp = 0;
1091 }
1092
1093 static void e1000_print_hw_hang(struct work_struct *work)
1094 {
1095         struct e1000_adapter *adapter = container_of(work,
1096                                                      struct e1000_adapter,
1097                                                      print_hang_task);
1098         struct net_device *netdev = adapter->netdev;
1099         struct e1000_ring *tx_ring = adapter->tx_ring;
1100         unsigned int i = tx_ring->next_to_clean;
1101         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1102         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1103         struct e1000_hw *hw = &adapter->hw;
1104         u16 phy_status, phy_1000t_status, phy_ext_status;
1105         u16 pci_status;
1106
1107         if (test_bit(__E1000_DOWN, &adapter->state))
1108                 return;
1109
1110         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1111                 /* May be block on write-back, flush and detect again
1112                  * flush pending descriptor writebacks to memory
1113                  */
1114                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1115                 /* execute the writes immediately */
1116                 e1e_flush();
1117                 /* Due to rare timing issues, write to TIDV again to ensure
1118                  * the write is successful
1119                  */
1120                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1121                 /* execute the writes immediately */
1122                 e1e_flush();
1123                 adapter->tx_hang_recheck = true;
1124                 return;
1125         }
1126         adapter->tx_hang_recheck = false;
1127
1128         if (er32(TDH(0)) == er32(TDT(0))) {
1129                 e_dbg("false hang detected, ignoring\n");
1130                 return;
1131         }
1132
1133         /* Real hang detected */
1134         netif_stop_queue(netdev);
1135
1136         e1e_rphy(hw, MII_BMSR, &phy_status);
1137         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1138         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1139
1140         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1141
1142         /* detected Hardware unit hang */
1143         e_err("Detected Hardware Unit Hang:\n"
1144               "  TDH                  <%x>\n"
1145               "  TDT                  <%x>\n"
1146               "  next_to_use          <%x>\n"
1147               "  next_to_clean        <%x>\n"
1148               "buffer_info[next_to_clean]:\n"
1149               "  time_stamp           <%lx>\n"
1150               "  next_to_watch        <%x>\n"
1151               "  jiffies              <%lx>\n"
1152               "  next_to_watch.status <%x>\n"
1153               "MAC Status             <%x>\n"
1154               "PHY Status             <%x>\n"
1155               "PHY 1000BASE-T Status  <%x>\n"
1156               "PHY Extended Status    <%x>\n"
1157               "PCI Status             <%x>\n",
1158               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1159               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1160               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1161               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1162
1163         e1000e_dump(adapter);
1164
1165         /* Suggest workaround for known h/w issue */
1166         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1167                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1168 }
1169
1170 /**
1171  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1172  * @work: pointer to work struct
1173  *
1174  * This work function polls the TSYNCTXCTL valid bit to determine when a
1175  * timestamp has been taken for the current stored skb.  The timestamp must
1176  * be for this skb because only one such packet is allowed in the queue.
1177  */
1178 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1179 {
1180         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1181                                                      tx_hwtstamp_work);
1182         struct e1000_hw *hw = &adapter->hw;
1183
1184         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1185                 struct skb_shared_hwtstamps shhwtstamps;
1186                 u64 txstmp;
1187
1188                 txstmp = er32(TXSTMPL);
1189                 txstmp |= (u64)er32(TXSTMPH) << 32;
1190
1191                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1192
1193                 skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps);
1194                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1195                 adapter->tx_hwtstamp_skb = NULL;
1196         } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1197                               + adapter->tx_timeout_factor * HZ)) {
1198                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1199                 adapter->tx_hwtstamp_skb = NULL;
1200                 adapter->tx_hwtstamp_timeouts++;
1201                 e_warn("clearing Tx timestamp hang\n");
1202         } else {
1203                 /* reschedule to check later */
1204                 schedule_work(&adapter->tx_hwtstamp_work);
1205         }
1206 }
1207
1208 /**
1209  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1210  * @tx_ring: Tx descriptor ring
1211  *
1212  * the return value indicates whether actual cleaning was done, there
1213  * is no guarantee that everything was cleaned
1214  **/
1215 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1216 {
1217         struct e1000_adapter *adapter = tx_ring->adapter;
1218         struct net_device *netdev = adapter->netdev;
1219         struct e1000_hw *hw = &adapter->hw;
1220         struct e1000_tx_desc *tx_desc, *eop_desc;
1221         struct e1000_buffer *buffer_info;
1222         unsigned int i, eop;
1223         unsigned int count = 0;
1224         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1225         unsigned int bytes_compl = 0, pkts_compl = 0;
1226
1227         i = tx_ring->next_to_clean;
1228         eop = tx_ring->buffer_info[i].next_to_watch;
1229         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1230
1231         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1232                (count < tx_ring->count)) {
1233                 bool cleaned = false;
1234
1235                 dma_rmb();              /* read buffer_info after eop_desc */
1236                 for (; !cleaned; count++) {
1237                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1238                         buffer_info = &tx_ring->buffer_info[i];
1239                         cleaned = (i == eop);
1240
1241                         if (cleaned) {
1242                                 total_tx_packets += buffer_info->segs;
1243                                 total_tx_bytes += buffer_info->bytecount;
1244                                 if (buffer_info->skb) {
1245                                         bytes_compl += buffer_info->skb->len;
1246                                         pkts_compl++;
1247                                 }
1248                         }
1249
1250                         e1000_put_txbuf(tx_ring, buffer_info);
1251                         tx_desc->upper.data = 0;
1252
1253                         i++;
1254                         if (i == tx_ring->count)
1255                                 i = 0;
1256                 }
1257
1258                 if (i == tx_ring->next_to_use)
1259                         break;
1260                 eop = tx_ring->buffer_info[i].next_to_watch;
1261                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1262         }
1263
1264         tx_ring->next_to_clean = i;
1265
1266         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1267
1268 #define TX_WAKE_THRESHOLD 32
1269         if (count && netif_carrier_ok(netdev) &&
1270             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1271                 /* Make sure that anybody stopping the queue after this
1272                  * sees the new next_to_clean.
1273                  */
1274                 smp_mb();
1275
1276                 if (netif_queue_stopped(netdev) &&
1277                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1278                         netif_wake_queue(netdev);
1279                         ++adapter->restart_queue;
1280                 }
1281         }
1282
1283         if (adapter->detect_tx_hung) {
1284                 /* Detect a transmit hang in hardware, this serializes the
1285                  * check with the clearing of time_stamp and movement of i
1286                  */
1287                 adapter->detect_tx_hung = false;
1288                 if (tx_ring->buffer_info[i].time_stamp &&
1289                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1290                                + (adapter->tx_timeout_factor * HZ)) &&
1291                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1292                         schedule_work(&adapter->print_hang_task);
1293                 else
1294                         adapter->tx_hang_recheck = false;
1295         }
1296         adapter->total_tx_bytes += total_tx_bytes;
1297         adapter->total_tx_packets += total_tx_packets;
1298         return count < tx_ring->count;
1299 }
1300
1301 /**
1302  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1303  * @rx_ring: Rx descriptor ring
1304  *
1305  * the return value indicates whether actual cleaning was done, there
1306  * is no guarantee that everything was cleaned
1307  **/
1308 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1309                                   int work_to_do)
1310 {
1311         struct e1000_adapter *adapter = rx_ring->adapter;
1312         struct e1000_hw *hw = &adapter->hw;
1313         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1314         struct net_device *netdev = adapter->netdev;
1315         struct pci_dev *pdev = adapter->pdev;
1316         struct e1000_buffer *buffer_info, *next_buffer;
1317         struct e1000_ps_page *ps_page;
1318         struct sk_buff *skb;
1319         unsigned int i, j;
1320         u32 length, staterr;
1321         int cleaned_count = 0;
1322         bool cleaned = false;
1323         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1324
1325         i = rx_ring->next_to_clean;
1326         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1327         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1328         buffer_info = &rx_ring->buffer_info[i];
1329
1330         while (staterr & E1000_RXD_STAT_DD) {
1331                 if (*work_done >= work_to_do)
1332                         break;
1333                 (*work_done)++;
1334                 skb = buffer_info->skb;
1335                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1336
1337                 /* in the packet split case this is header only */
1338                 prefetch(skb->data - NET_IP_ALIGN);
1339
1340                 i++;
1341                 if (i == rx_ring->count)
1342                         i = 0;
1343                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1344                 prefetch(next_rxd);
1345
1346                 next_buffer = &rx_ring->buffer_info[i];
1347
1348                 cleaned = true;
1349                 cleaned_count++;
1350                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1351                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1352                 buffer_info->dma = 0;
1353
1354                 /* see !EOP comment in other Rx routine */
1355                 if (!(staterr & E1000_RXD_STAT_EOP))
1356                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1357
1358                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1359                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1360                         dev_kfree_skb_irq(skb);
1361                         if (staterr & E1000_RXD_STAT_EOP)
1362                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1363                         goto next_desc;
1364                 }
1365
1366                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1367                              !(netdev->features & NETIF_F_RXALL))) {
1368                         dev_kfree_skb_irq(skb);
1369                         goto next_desc;
1370                 }
1371
1372                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1373
1374                 if (!length) {
1375                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1376                         dev_kfree_skb_irq(skb);
1377                         goto next_desc;
1378                 }
1379
1380                 /* Good Receive */
1381                 skb_put(skb, length);
1382
1383                 {
1384                         /* this looks ugly, but it seems compiler issues make
1385                          * it more efficient than reusing j
1386                          */
1387                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1388
1389                         /* page alloc/put takes too long and effects small
1390                          * packet throughput, so unsplit small packets and
1391                          * save the alloc/put only valid in softirq (napi)
1392                          * context to call kmap_*
1393                          */
1394                         if (l1 && (l1 <= copybreak) &&
1395                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1396                                 u8 *vaddr;
1397
1398                                 ps_page = &buffer_info->ps_pages[0];
1399
1400                                 /* there is no documentation about how to call
1401                                  * kmap_atomic, so we can't hold the mapping
1402                                  * very long
1403                                  */
1404                                 dma_sync_single_for_cpu(&pdev->dev,
1405                                                         ps_page->dma,
1406                                                         PAGE_SIZE,
1407                                                         DMA_FROM_DEVICE);
1408                                 vaddr = kmap_atomic(ps_page->page);
1409                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1410                                 kunmap_atomic(vaddr);
1411                                 dma_sync_single_for_device(&pdev->dev,
1412                                                            ps_page->dma,
1413                                                            PAGE_SIZE,
1414                                                            DMA_FROM_DEVICE);
1415
1416                                 /* remove the CRC */
1417                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1418                                         if (!(netdev->features & NETIF_F_RXFCS))
1419                                                 l1 -= 4;
1420                                 }
1421
1422                                 skb_put(skb, l1);
1423                                 goto copydone;
1424                         }       /* if */
1425                 }
1426
1427                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1428                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1429                         if (!length)
1430                                 break;
1431
1432                         ps_page = &buffer_info->ps_pages[j];
1433                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1434                                        DMA_FROM_DEVICE);
1435                         ps_page->dma = 0;
1436                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1437                         ps_page->page = NULL;
1438                         skb->len += length;
1439                         skb->data_len += length;
1440                         skb->truesize += PAGE_SIZE;
1441                 }
1442
1443                 /* strip the ethernet crc, problem is we're using pages now so
1444                  * this whole operation can get a little cpu intensive
1445                  */
1446                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1447                         if (!(netdev->features & NETIF_F_RXFCS))
1448                                 pskb_trim(skb, skb->len - 4);
1449                 }
1450
1451 copydone:
1452                 total_rx_bytes += skb->len;
1453                 total_rx_packets++;
1454
1455                 e1000_rx_checksum(adapter, staterr, skb);
1456
1457                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1458
1459                 if (rx_desc->wb.upper.header_status &
1460                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1461                         adapter->rx_hdr_split++;
1462
1463                 e1000_receive_skb(adapter, netdev, skb, staterr,
1464                                   rx_desc->wb.middle.vlan);
1465
1466 next_desc:
1467                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1468                 buffer_info->skb = NULL;
1469
1470                 /* return some buffers to hardware, one at a time is too slow */
1471                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1472                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1473                                               GFP_ATOMIC);
1474                         cleaned_count = 0;
1475                 }
1476
1477                 /* use prefetched values */
1478                 rx_desc = next_rxd;
1479                 buffer_info = next_buffer;
1480
1481                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1482         }
1483         rx_ring->next_to_clean = i;
1484
1485         cleaned_count = e1000_desc_unused(rx_ring);
1486         if (cleaned_count)
1487                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1488
1489         adapter->total_rx_bytes += total_rx_bytes;
1490         adapter->total_rx_packets += total_rx_packets;
1491         return cleaned;
1492 }
1493
1494 /**
1495  * e1000_consume_page - helper function
1496  **/
1497 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1498                                u16 length)
1499 {
1500         bi->page = NULL;
1501         skb->len += length;
1502         skb->data_len += length;
1503         skb->truesize += PAGE_SIZE;
1504 }
1505
1506 /**
1507  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1508  * @adapter: board private structure
1509  *
1510  * the return value indicates whether actual cleaning was done, there
1511  * is no guarantee that everything was cleaned
1512  **/
1513 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1514                                      int work_to_do)
1515 {
1516         struct e1000_adapter *adapter = rx_ring->adapter;
1517         struct net_device *netdev = adapter->netdev;
1518         struct pci_dev *pdev = adapter->pdev;
1519         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1520         struct e1000_buffer *buffer_info, *next_buffer;
1521         u32 length, staterr;
1522         unsigned int i;
1523         int cleaned_count = 0;
1524         bool cleaned = false;
1525         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1526         struct skb_shared_info *shinfo;
1527
1528         i = rx_ring->next_to_clean;
1529         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1530         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1531         buffer_info = &rx_ring->buffer_info[i];
1532
1533         while (staterr & E1000_RXD_STAT_DD) {
1534                 struct sk_buff *skb;
1535
1536                 if (*work_done >= work_to_do)
1537                         break;
1538                 (*work_done)++;
1539                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1540
1541                 skb = buffer_info->skb;
1542                 buffer_info->skb = NULL;
1543
1544                 ++i;
1545                 if (i == rx_ring->count)
1546                         i = 0;
1547                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1548                 prefetch(next_rxd);
1549
1550                 next_buffer = &rx_ring->buffer_info[i];
1551
1552                 cleaned = true;
1553                 cleaned_count++;
1554                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1555                                DMA_FROM_DEVICE);
1556                 buffer_info->dma = 0;
1557
1558                 length = le16_to_cpu(rx_desc->wb.upper.length);
1559
1560                 /* errors is only valid for DD + EOP descriptors */
1561                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1562                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1563                               !(netdev->features & NETIF_F_RXALL)))) {
1564                         /* recycle both page and skb */
1565                         buffer_info->skb = skb;
1566                         /* an error means any chain goes out the window too */
1567                         if (rx_ring->rx_skb_top)
1568                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1569                         rx_ring->rx_skb_top = NULL;
1570                         goto next_desc;
1571                 }
1572 #define rxtop (rx_ring->rx_skb_top)
1573                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1574                         /* this descriptor is only the beginning (or middle) */
1575                         if (!rxtop) {
1576                                 /* this is the beginning of a chain */
1577                                 rxtop = skb;
1578                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1579                                                    0, length);
1580                         } else {
1581                                 /* this is the middle of a chain */
1582                                 shinfo = skb_shinfo(rxtop);
1583                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1584                                                    buffer_info->page, 0,
1585                                                    length);
1586                                 /* re-use the skb, only consumed the page */
1587                                 buffer_info->skb = skb;
1588                         }
1589                         e1000_consume_page(buffer_info, rxtop, length);
1590                         goto next_desc;
1591                 } else {
1592                         if (rxtop) {
1593                                 /* end of the chain */
1594                                 shinfo = skb_shinfo(rxtop);
1595                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1596                                                    buffer_info->page, 0,
1597                                                    length);
1598                                 /* re-use the current skb, we only consumed the
1599                                  * page
1600                                  */
1601                                 buffer_info->skb = skb;
1602                                 skb = rxtop;
1603                                 rxtop = NULL;
1604                                 e1000_consume_page(buffer_info, skb, length);
1605                         } else {
1606                                 /* no chain, got EOP, this buf is the packet
1607                                  * copybreak to save the put_page/alloc_page
1608                                  */
1609                                 if (length <= copybreak &&
1610                                     skb_tailroom(skb) >= length) {
1611                                         u8 *vaddr;
1612                                         vaddr = kmap_atomic(buffer_info->page);
1613                                         memcpy(skb_tail_pointer(skb), vaddr,
1614                                                length);
1615                                         kunmap_atomic(vaddr);
1616                                         /* re-use the page, so don't erase
1617                                          * buffer_info->page
1618                                          */
1619                                         skb_put(skb, length);
1620                                 } else {
1621                                         skb_fill_page_desc(skb, 0,
1622                                                            buffer_info->page, 0,
1623                                                            length);
1624                                         e1000_consume_page(buffer_info, skb,
1625                                                            length);
1626                                 }
1627                         }
1628                 }
1629
1630                 /* Receive Checksum Offload */
1631                 e1000_rx_checksum(adapter, staterr, skb);
1632
1633                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1634
1635                 /* probably a little skewed due to removing CRC */
1636                 total_rx_bytes += skb->len;
1637                 total_rx_packets++;
1638
1639                 /* eth type trans needs skb->data to point to something */
1640                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1641                         e_err("pskb_may_pull failed.\n");
1642                         dev_kfree_skb_irq(skb);
1643                         goto next_desc;
1644                 }
1645
1646                 e1000_receive_skb(adapter, netdev, skb, staterr,
1647                                   rx_desc->wb.upper.vlan);
1648
1649 next_desc:
1650                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1651
1652                 /* return some buffers to hardware, one at a time is too slow */
1653                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1654                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1655                                               GFP_ATOMIC);
1656                         cleaned_count = 0;
1657                 }
1658
1659                 /* use prefetched values */
1660                 rx_desc = next_rxd;
1661                 buffer_info = next_buffer;
1662
1663                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1664         }
1665         rx_ring->next_to_clean = i;
1666
1667         cleaned_count = e1000_desc_unused(rx_ring);
1668         if (cleaned_count)
1669                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1670
1671         adapter->total_rx_bytes += total_rx_bytes;
1672         adapter->total_rx_packets += total_rx_packets;
1673         return cleaned;
1674 }
1675
1676 /**
1677  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1678  * @rx_ring: Rx descriptor ring
1679  **/
1680 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1681 {
1682         struct e1000_adapter *adapter = rx_ring->adapter;
1683         struct e1000_buffer *buffer_info;
1684         struct e1000_ps_page *ps_page;
1685         struct pci_dev *pdev = adapter->pdev;
1686         unsigned int i, j;
1687
1688         /* Free all the Rx ring sk_buffs */
1689         for (i = 0; i < rx_ring->count; i++) {
1690                 buffer_info = &rx_ring->buffer_info[i];
1691                 if (buffer_info->dma) {
1692                         if (adapter->clean_rx == e1000_clean_rx_irq)
1693                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1694                                                  adapter->rx_buffer_len,
1695                                                  DMA_FROM_DEVICE);
1696                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1697                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1698                                                PAGE_SIZE, DMA_FROM_DEVICE);
1699                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1700                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1701                                                  adapter->rx_ps_bsize0,
1702                                                  DMA_FROM_DEVICE);
1703                         buffer_info->dma = 0;
1704                 }
1705
1706                 if (buffer_info->page) {
1707                         put_page(buffer_info->page);
1708                         buffer_info->page = NULL;
1709                 }
1710
1711                 if (buffer_info->skb) {
1712                         dev_kfree_skb(buffer_info->skb);
1713                         buffer_info->skb = NULL;
1714                 }
1715
1716                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1717                         ps_page = &buffer_info->ps_pages[j];
1718                         if (!ps_page->page)
1719                                 break;
1720                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1721                                        DMA_FROM_DEVICE);
1722                         ps_page->dma = 0;
1723                         put_page(ps_page->page);
1724                         ps_page->page = NULL;
1725                 }
1726         }
1727
1728         /* there also may be some cached data from a chained receive */
1729         if (rx_ring->rx_skb_top) {
1730                 dev_kfree_skb(rx_ring->rx_skb_top);
1731                 rx_ring->rx_skb_top = NULL;
1732         }
1733
1734         /* Zero out the descriptor ring */
1735         memset(rx_ring->desc, 0, rx_ring->size);
1736
1737         rx_ring->next_to_clean = 0;
1738         rx_ring->next_to_use = 0;
1739         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1740 }
1741
1742 static void e1000e_downshift_workaround(struct work_struct *work)
1743 {
1744         struct e1000_adapter *adapter = container_of(work,
1745                                                      struct e1000_adapter,
1746                                                      downshift_task);
1747
1748         if (test_bit(__E1000_DOWN, &adapter->state))
1749                 return;
1750
1751         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1752 }
1753
1754 /**
1755  * e1000_intr_msi - Interrupt Handler
1756  * @irq: interrupt number
1757  * @data: pointer to a network interface device structure
1758  **/
1759 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1760 {
1761         struct net_device *netdev = data;
1762         struct e1000_adapter *adapter = netdev_priv(netdev);
1763         struct e1000_hw *hw = &adapter->hw;
1764         u32 icr = er32(ICR);
1765
1766         /* read ICR disables interrupts using IAM */
1767         if (icr & E1000_ICR_LSC) {
1768                 hw->mac.get_link_status = true;
1769                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1770                  * disconnect (LSC) before accessing any PHY registers
1771                  */
1772                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1773                     (!(er32(STATUS) & E1000_STATUS_LU)))
1774                         schedule_work(&adapter->downshift_task);
1775
1776                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1777                  * link down event; disable receives here in the ISR and reset
1778                  * adapter in watchdog
1779                  */
1780                 if (netif_carrier_ok(netdev) &&
1781                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1782                         /* disable receives */
1783                         u32 rctl = er32(RCTL);
1784
1785                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1786                         adapter->flags |= FLAG_RESTART_NOW;
1787                 }
1788                 /* guard against interrupt when we're going down */
1789                 if (!test_bit(__E1000_DOWN, &adapter->state))
1790                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1791         }
1792
1793         /* Reset on uncorrectable ECC error */
1794         if ((icr & E1000_ICR_ECCER) && ((hw->mac.type == e1000_pch_lpt) ||
1795                                         (hw->mac.type == e1000_pch_spt))) {
1796                 u32 pbeccsts = er32(PBECCSTS);
1797
1798                 adapter->corr_errors +=
1799                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1800                 adapter->uncorr_errors +=
1801                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1802                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1803
1804                 /* Do the reset outside of interrupt context */
1805                 schedule_work(&adapter->reset_task);
1806
1807                 /* return immediately since reset is imminent */
1808                 return IRQ_HANDLED;
1809         }
1810
1811         if (napi_schedule_prep(&adapter->napi)) {
1812                 adapter->total_tx_bytes = 0;
1813                 adapter->total_tx_packets = 0;
1814                 adapter->total_rx_bytes = 0;
1815                 adapter->total_rx_packets = 0;
1816                 __napi_schedule(&adapter->napi);
1817         }
1818
1819         return IRQ_HANDLED;
1820 }
1821
1822 /**
1823  * e1000_intr - Interrupt Handler
1824  * @irq: interrupt number
1825  * @data: pointer to a network interface device structure
1826  **/
1827 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1828 {
1829         struct net_device *netdev = data;
1830         struct e1000_adapter *adapter = netdev_priv(netdev);
1831         struct e1000_hw *hw = &adapter->hw;
1832         u32 rctl, icr = er32(ICR);
1833
1834         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1835                 return IRQ_NONE;        /* Not our interrupt */
1836
1837         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1838          * not set, then the adapter didn't send an interrupt
1839          */
1840         if (!(icr & E1000_ICR_INT_ASSERTED))
1841                 return IRQ_NONE;
1842
1843         /* Interrupt Auto-Mask...upon reading ICR,
1844          * interrupts are masked.  No need for the
1845          * IMC write
1846          */
1847
1848         if (icr & E1000_ICR_LSC) {
1849                 hw->mac.get_link_status = true;
1850                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1851                  * disconnect (LSC) before accessing any PHY registers
1852                  */
1853                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1854                     (!(er32(STATUS) & E1000_STATUS_LU)))
1855                         schedule_work(&adapter->downshift_task);
1856
1857                 /* 80003ES2LAN workaround--
1858                  * For packet buffer work-around on link down event;
1859                  * disable receives here in the ISR and
1860                  * reset adapter in watchdog
1861                  */
1862                 if (netif_carrier_ok(netdev) &&
1863                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1864                         /* disable receives */
1865                         rctl = er32(RCTL);
1866                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1867                         adapter->flags |= FLAG_RESTART_NOW;
1868                 }
1869                 /* guard against interrupt when we're going down */
1870                 if (!test_bit(__E1000_DOWN, &adapter->state))
1871                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1872         }
1873
1874         /* Reset on uncorrectable ECC error */
1875         if ((icr & E1000_ICR_ECCER) && ((hw->mac.type == e1000_pch_lpt) ||
1876                                         (hw->mac.type == e1000_pch_spt))) {
1877                 u32 pbeccsts = er32(PBECCSTS);
1878
1879                 adapter->corr_errors +=
1880                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1881                 adapter->uncorr_errors +=
1882                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1883                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1884
1885                 /* Do the reset outside of interrupt context */
1886                 schedule_work(&adapter->reset_task);
1887
1888                 /* return immediately since reset is imminent */
1889                 return IRQ_HANDLED;
1890         }
1891
1892         if (napi_schedule_prep(&adapter->napi)) {
1893                 adapter->total_tx_bytes = 0;
1894                 adapter->total_tx_packets = 0;
1895                 adapter->total_rx_bytes = 0;
1896                 adapter->total_rx_packets = 0;
1897                 __napi_schedule(&adapter->napi);
1898         }
1899
1900         return IRQ_HANDLED;
1901 }
1902
1903 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1904 {
1905         struct net_device *netdev = data;
1906         struct e1000_adapter *adapter = netdev_priv(netdev);
1907         struct e1000_hw *hw = &adapter->hw;
1908         u32 icr = er32(ICR);
1909
1910         if (!(icr & E1000_ICR_INT_ASSERTED)) {
1911                 if (!test_bit(__E1000_DOWN, &adapter->state))
1912                         ew32(IMS, E1000_IMS_OTHER);
1913                 return IRQ_NONE;
1914         }
1915
1916         if (icr & adapter->eiac_mask)
1917                 ew32(ICS, (icr & adapter->eiac_mask));
1918
1919         if (icr & E1000_ICR_OTHER) {
1920                 if (!(icr & E1000_ICR_LSC))
1921                         goto no_link_interrupt;
1922                 hw->mac.get_link_status = true;
1923                 /* guard against interrupt when we're going down */
1924                 if (!test_bit(__E1000_DOWN, &adapter->state))
1925                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1926         }
1927
1928 no_link_interrupt:
1929         if (!test_bit(__E1000_DOWN, &adapter->state))
1930                 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1931
1932         return IRQ_HANDLED;
1933 }
1934
1935 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1936 {
1937         struct net_device *netdev = data;
1938         struct e1000_adapter *adapter = netdev_priv(netdev);
1939         struct e1000_hw *hw = &adapter->hw;
1940         struct e1000_ring *tx_ring = adapter->tx_ring;
1941
1942         adapter->total_tx_bytes = 0;
1943         adapter->total_tx_packets = 0;
1944
1945         if (!e1000_clean_tx_irq(tx_ring))
1946                 /* Ring was not completely cleaned, so fire another interrupt */
1947                 ew32(ICS, tx_ring->ims_val);
1948
1949         return IRQ_HANDLED;
1950 }
1951
1952 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1953 {
1954         struct net_device *netdev = data;
1955         struct e1000_adapter *adapter = netdev_priv(netdev);
1956         struct e1000_ring *rx_ring = adapter->rx_ring;
1957
1958         /* Write the ITR value calculated at the end of the
1959          * previous interrupt.
1960          */
1961         if (rx_ring->set_itr) {
1962                 u32 itr = rx_ring->itr_val ?
1963                           1000000000 / (rx_ring->itr_val * 256) : 0;
1964
1965                 writel(itr, rx_ring->itr_register);
1966                 rx_ring->set_itr = 0;
1967         }
1968
1969         if (napi_schedule_prep(&adapter->napi)) {
1970                 adapter->total_rx_bytes = 0;
1971                 adapter->total_rx_packets = 0;
1972                 __napi_schedule(&adapter->napi);
1973         }
1974         return IRQ_HANDLED;
1975 }
1976
1977 /**
1978  * e1000_configure_msix - Configure MSI-X hardware
1979  *
1980  * e1000_configure_msix sets up the hardware to properly
1981  * generate MSI-X interrupts.
1982  **/
1983 static void e1000_configure_msix(struct e1000_adapter *adapter)
1984 {
1985         struct e1000_hw *hw = &adapter->hw;
1986         struct e1000_ring *rx_ring = adapter->rx_ring;
1987         struct e1000_ring *tx_ring = adapter->tx_ring;
1988         int vector = 0;
1989         u32 ctrl_ext, ivar = 0;
1990
1991         adapter->eiac_mask = 0;
1992
1993         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1994         if (hw->mac.type == e1000_82574) {
1995                 u32 rfctl = er32(RFCTL);
1996
1997                 rfctl |= E1000_RFCTL_ACK_DIS;
1998                 ew32(RFCTL, rfctl);
1999         }
2000
2001         /* Configure Rx vector */
2002         rx_ring->ims_val = E1000_IMS_RXQ0;
2003         adapter->eiac_mask |= rx_ring->ims_val;
2004         if (rx_ring->itr_val)
2005                 writel(1000000000 / (rx_ring->itr_val * 256),
2006                        rx_ring->itr_register);
2007         else
2008                 writel(1, rx_ring->itr_register);
2009         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
2010
2011         /* Configure Tx vector */
2012         tx_ring->ims_val = E1000_IMS_TXQ0;
2013         vector++;
2014         if (tx_ring->itr_val)
2015                 writel(1000000000 / (tx_ring->itr_val * 256),
2016                        tx_ring->itr_register);
2017         else
2018                 writel(1, tx_ring->itr_register);
2019         adapter->eiac_mask |= tx_ring->ims_val;
2020         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2021
2022         /* set vector for Other Causes, e.g. link changes */
2023         vector++;
2024         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2025         if (rx_ring->itr_val)
2026                 writel(1000000000 / (rx_ring->itr_val * 256),
2027                        hw->hw_addr + E1000_EITR_82574(vector));
2028         else
2029                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2030
2031         /* Cause Tx interrupts on every write back */
2032         ivar |= (1 << 31);
2033
2034         ew32(IVAR, ivar);
2035
2036         /* enable MSI-X PBA support */
2037         ctrl_ext = er32(CTRL_EXT);
2038         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
2039
2040         /* Auto-Mask Other interrupts upon ICR read */
2041         ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
2042         ctrl_ext |= E1000_CTRL_EXT_EIAME;
2043         ew32(CTRL_EXT, ctrl_ext);
2044         e1e_flush();
2045 }
2046
2047 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2048 {
2049         if (adapter->msix_entries) {
2050                 pci_disable_msix(adapter->pdev);
2051                 kfree(adapter->msix_entries);
2052                 adapter->msix_entries = NULL;
2053         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2054                 pci_disable_msi(adapter->pdev);
2055                 adapter->flags &= ~FLAG_MSI_ENABLED;
2056         }
2057 }
2058
2059 /**
2060  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2061  *
2062  * Attempt to configure interrupts using the best available
2063  * capabilities of the hardware and kernel.
2064  **/
2065 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2066 {
2067         int err;
2068         int i;
2069
2070         switch (adapter->int_mode) {
2071         case E1000E_INT_MODE_MSIX:
2072                 if (adapter->flags & FLAG_HAS_MSIX) {
2073                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2074                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2075                                                         sizeof(struct
2076                                                                msix_entry),
2077                                                         GFP_KERNEL);
2078                         if (adapter->msix_entries) {
2079                                 struct e1000_adapter *a = adapter;
2080
2081                                 for (i = 0; i < adapter->num_vectors; i++)
2082                                         adapter->msix_entries[i].entry = i;
2083
2084                                 err = pci_enable_msix_range(a->pdev,
2085                                                             a->msix_entries,
2086                                                             a->num_vectors,
2087                                                             a->num_vectors);
2088                                 if (err > 0)
2089                                         return;
2090                         }
2091                         /* MSI-X failed, so fall through and try MSI */
2092                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2093                         e1000e_reset_interrupt_capability(adapter);
2094                 }
2095                 adapter->int_mode = E1000E_INT_MODE_MSI;
2096                 /* Fall through */
2097         case E1000E_INT_MODE_MSI:
2098                 if (!pci_enable_msi(adapter->pdev)) {
2099                         adapter->flags |= FLAG_MSI_ENABLED;
2100                 } else {
2101                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2102                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2103                 }
2104                 /* Fall through */
2105         case E1000E_INT_MODE_LEGACY:
2106                 /* Don't do anything; this is the system default */
2107                 break;
2108         }
2109
2110         /* store the number of vectors being used */
2111         adapter->num_vectors = 1;
2112 }
2113
2114 /**
2115  * e1000_request_msix - Initialize MSI-X interrupts
2116  *
2117  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2118  * kernel.
2119  **/
2120 static int e1000_request_msix(struct e1000_adapter *adapter)
2121 {
2122         struct net_device *netdev = adapter->netdev;
2123         int err = 0, vector = 0;
2124
2125         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2126                 snprintf(adapter->rx_ring->name,
2127                          sizeof(adapter->rx_ring->name) - 1,
2128                          "%s-rx-0", netdev->name);
2129         else
2130                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2131         err = request_irq(adapter->msix_entries[vector].vector,
2132                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2133                           netdev);
2134         if (err)
2135                 return err;
2136         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2137             E1000_EITR_82574(vector);
2138         adapter->rx_ring->itr_val = adapter->itr;
2139         vector++;
2140
2141         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2142                 snprintf(adapter->tx_ring->name,
2143                          sizeof(adapter->tx_ring->name) - 1,
2144                          "%s-tx-0", netdev->name);
2145         else
2146                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2147         err = request_irq(adapter->msix_entries[vector].vector,
2148                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2149                           netdev);
2150         if (err)
2151                 return err;
2152         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2153             E1000_EITR_82574(vector);
2154         adapter->tx_ring->itr_val = adapter->itr;
2155         vector++;
2156
2157         err = request_irq(adapter->msix_entries[vector].vector,
2158                           e1000_msix_other, 0, netdev->name, netdev);
2159         if (err)
2160                 return err;
2161
2162         e1000_configure_msix(adapter);
2163
2164         return 0;
2165 }
2166
2167 /**
2168  * e1000_request_irq - initialize interrupts
2169  *
2170  * Attempts to configure interrupts using the best available
2171  * capabilities of the hardware and kernel.
2172  **/
2173 static int e1000_request_irq(struct e1000_adapter *adapter)
2174 {
2175         struct net_device *netdev = adapter->netdev;
2176         int err;
2177
2178         if (adapter->msix_entries) {
2179                 err = e1000_request_msix(adapter);
2180                 if (!err)
2181                         return err;
2182                 /* fall back to MSI */
2183                 e1000e_reset_interrupt_capability(adapter);
2184                 adapter->int_mode = E1000E_INT_MODE_MSI;
2185                 e1000e_set_interrupt_capability(adapter);
2186         }
2187         if (adapter->flags & FLAG_MSI_ENABLED) {
2188                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2189                                   netdev->name, netdev);
2190                 if (!err)
2191                         return err;
2192
2193                 /* fall back to legacy interrupt */
2194                 e1000e_reset_interrupt_capability(adapter);
2195                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2196         }
2197
2198         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2199                           netdev->name, netdev);
2200         if (err)
2201                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2202
2203         return err;
2204 }
2205
2206 static void e1000_free_irq(struct e1000_adapter *adapter)
2207 {
2208         struct net_device *netdev = adapter->netdev;
2209
2210         if (adapter->msix_entries) {
2211                 int vector = 0;
2212
2213                 free_irq(adapter->msix_entries[vector].vector, netdev);
2214                 vector++;
2215
2216                 free_irq(adapter->msix_entries[vector].vector, netdev);
2217                 vector++;
2218
2219                 /* Other Causes interrupt vector */
2220                 free_irq(adapter->msix_entries[vector].vector, netdev);
2221                 return;
2222         }
2223
2224         free_irq(adapter->pdev->irq, netdev);
2225 }
2226
2227 /**
2228  * e1000_irq_disable - Mask off interrupt generation on the NIC
2229  **/
2230 static void e1000_irq_disable(struct e1000_adapter *adapter)
2231 {
2232         struct e1000_hw *hw = &adapter->hw;
2233
2234         ew32(IMC, ~0);
2235         if (adapter->msix_entries)
2236                 ew32(EIAC_82574, 0);
2237         e1e_flush();
2238
2239         if (adapter->msix_entries) {
2240                 int i;
2241
2242                 for (i = 0; i < adapter->num_vectors; i++)
2243                         synchronize_irq(adapter->msix_entries[i].vector);
2244         } else {
2245                 synchronize_irq(adapter->pdev->irq);
2246         }
2247 }
2248
2249 /**
2250  * e1000_irq_enable - Enable default interrupt generation settings
2251  **/
2252 static void e1000_irq_enable(struct e1000_adapter *adapter)
2253 {
2254         struct e1000_hw *hw = &adapter->hw;
2255
2256         if (adapter->msix_entries) {
2257                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2258                 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2259         } else if ((hw->mac.type == e1000_pch_lpt) ||
2260                    (hw->mac.type == e1000_pch_spt)) {
2261                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2262         } else {
2263                 ew32(IMS, IMS_ENABLE_MASK);
2264         }
2265         e1e_flush();
2266 }
2267
2268 /**
2269  * e1000e_get_hw_control - get control of the h/w from f/w
2270  * @adapter: address of board private structure
2271  *
2272  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2273  * For ASF and Pass Through versions of f/w this means that
2274  * the driver is loaded. For AMT version (only with 82573)
2275  * of the f/w this means that the network i/f is open.
2276  **/
2277 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2278 {
2279         struct e1000_hw *hw = &adapter->hw;
2280         u32 ctrl_ext;
2281         u32 swsm;
2282
2283         /* Let firmware know the driver has taken over */
2284         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2285                 swsm = er32(SWSM);
2286                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2287         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2288                 ctrl_ext = er32(CTRL_EXT);
2289                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2290         }
2291 }
2292
2293 /**
2294  * e1000e_release_hw_control - release control of the h/w to f/w
2295  * @adapter: address of board private structure
2296  *
2297  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2298  * For ASF and Pass Through versions of f/w this means that the
2299  * driver is no longer loaded. For AMT version (only with 82573) i
2300  * of the f/w this means that the network i/f is closed.
2301  *
2302  **/
2303 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2304 {
2305         struct e1000_hw *hw = &adapter->hw;
2306         u32 ctrl_ext;
2307         u32 swsm;
2308
2309         /* Let firmware taken over control of h/w */
2310         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2311                 swsm = er32(SWSM);
2312                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2313         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2314                 ctrl_ext = er32(CTRL_EXT);
2315                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2316         }
2317 }
2318
2319 /**
2320  * e1000_alloc_ring_dma - allocate memory for a ring structure
2321  **/
2322 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2323                                 struct e1000_ring *ring)
2324 {
2325         struct pci_dev *pdev = adapter->pdev;
2326
2327         ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2328                                         GFP_KERNEL);
2329         if (!ring->desc)
2330                 return -ENOMEM;
2331
2332         return 0;
2333 }
2334
2335 /**
2336  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2337  * @tx_ring: Tx descriptor ring
2338  *
2339  * Return 0 on success, negative on failure
2340  **/
2341 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2342 {
2343         struct e1000_adapter *adapter = tx_ring->adapter;
2344         int err = -ENOMEM, size;
2345
2346         size = sizeof(struct e1000_buffer) * tx_ring->count;
2347         tx_ring->buffer_info = vzalloc(size);
2348         if (!tx_ring->buffer_info)
2349                 goto err;
2350
2351         /* round up to nearest 4K */
2352         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2353         tx_ring->size = ALIGN(tx_ring->size, 4096);
2354
2355         err = e1000_alloc_ring_dma(adapter, tx_ring);
2356         if (err)
2357                 goto err;
2358
2359         tx_ring->next_to_use = 0;
2360         tx_ring->next_to_clean = 0;
2361
2362         return 0;
2363 err:
2364         vfree(tx_ring->buffer_info);
2365         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2366         return err;
2367 }
2368
2369 /**
2370  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2371  * @rx_ring: Rx descriptor ring
2372  *
2373  * Returns 0 on success, negative on failure
2374  **/
2375 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2376 {
2377         struct e1000_adapter *adapter = rx_ring->adapter;
2378         struct e1000_buffer *buffer_info;
2379         int i, size, desc_len, err = -ENOMEM;
2380
2381         size = sizeof(struct e1000_buffer) * rx_ring->count;
2382         rx_ring->buffer_info = vzalloc(size);
2383         if (!rx_ring->buffer_info)
2384                 goto err;
2385
2386         for (i = 0; i < rx_ring->count; i++) {
2387                 buffer_info = &rx_ring->buffer_info[i];
2388                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2389                                                 sizeof(struct e1000_ps_page),
2390                                                 GFP_KERNEL);
2391                 if (!buffer_info->ps_pages)
2392                         goto err_pages;
2393         }
2394
2395         desc_len = sizeof(union e1000_rx_desc_packet_split);
2396
2397         /* Round up to nearest 4K */
2398         rx_ring->size = rx_ring->count * desc_len;
2399         rx_ring->size = ALIGN(rx_ring->size, 4096);
2400
2401         err = e1000_alloc_ring_dma(adapter, rx_ring);
2402         if (err)
2403                 goto err_pages;
2404
2405         rx_ring->next_to_clean = 0;
2406         rx_ring->next_to_use = 0;
2407         rx_ring->rx_skb_top = NULL;
2408
2409         return 0;
2410
2411 err_pages:
2412         for (i = 0; i < rx_ring->count; i++) {
2413                 buffer_info = &rx_ring->buffer_info[i];
2414                 kfree(buffer_info->ps_pages);
2415         }
2416 err:
2417         vfree(rx_ring->buffer_info);
2418         e_err("Unable to allocate memory for the receive descriptor ring\n");
2419         return err;
2420 }
2421
2422 /**
2423  * e1000_clean_tx_ring - Free Tx Buffers
2424  * @tx_ring: Tx descriptor ring
2425  **/
2426 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2427 {
2428         struct e1000_adapter *adapter = tx_ring->adapter;
2429         struct e1000_buffer *buffer_info;
2430         unsigned long size;
2431         unsigned int i;
2432
2433         for (i = 0; i < tx_ring->count; i++) {
2434                 buffer_info = &tx_ring->buffer_info[i];
2435                 e1000_put_txbuf(tx_ring, buffer_info);
2436         }
2437
2438         netdev_reset_queue(adapter->netdev);
2439         size = sizeof(struct e1000_buffer) * tx_ring->count;
2440         memset(tx_ring->buffer_info, 0, size);
2441
2442         memset(tx_ring->desc, 0, tx_ring->size);
2443
2444         tx_ring->next_to_use = 0;
2445         tx_ring->next_to_clean = 0;
2446 }
2447
2448 /**
2449  * e1000e_free_tx_resources - Free Tx Resources per Queue
2450  * @tx_ring: Tx descriptor ring
2451  *
2452  * Free all transmit software resources
2453  **/
2454 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2455 {
2456         struct e1000_adapter *adapter = tx_ring->adapter;
2457         struct pci_dev *pdev = adapter->pdev;
2458
2459         e1000_clean_tx_ring(tx_ring);
2460
2461         vfree(tx_ring->buffer_info);
2462         tx_ring->buffer_info = NULL;
2463
2464         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2465                           tx_ring->dma);
2466         tx_ring->desc = NULL;
2467 }
2468
2469 /**
2470  * e1000e_free_rx_resources - Free Rx Resources
2471  * @rx_ring: Rx descriptor ring
2472  *
2473  * Free all receive software resources
2474  **/
2475 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2476 {
2477         struct e1000_adapter *adapter = rx_ring->adapter;
2478         struct pci_dev *pdev = adapter->pdev;
2479         int i;
2480
2481         e1000_clean_rx_ring(rx_ring);
2482
2483         for (i = 0; i < rx_ring->count; i++)
2484                 kfree(rx_ring->buffer_info[i].ps_pages);
2485
2486         vfree(rx_ring->buffer_info);
2487         rx_ring->buffer_info = NULL;
2488
2489         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2490                           rx_ring->dma);
2491         rx_ring->desc = NULL;
2492 }
2493
2494 /**
2495  * e1000_update_itr - update the dynamic ITR value based on statistics
2496  * @adapter: pointer to adapter
2497  * @itr_setting: current adapter->itr
2498  * @packets: the number of packets during this measurement interval
2499  * @bytes: the number of bytes during this measurement interval
2500  *
2501  *      Stores a new ITR value based on packets and byte
2502  *      counts during the last interrupt.  The advantage of per interrupt
2503  *      computation is faster updates and more accurate ITR for the current
2504  *      traffic pattern.  Constants in this function were computed
2505  *      based on theoretical maximum wire speed and thresholds were set based
2506  *      on testing data as well as attempting to minimize response time
2507  *      while increasing bulk throughput.  This functionality is controlled
2508  *      by the InterruptThrottleRate module parameter.
2509  **/
2510 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2511 {
2512         unsigned int retval = itr_setting;
2513
2514         if (packets == 0)
2515                 return itr_setting;
2516
2517         switch (itr_setting) {
2518         case lowest_latency:
2519                 /* handle TSO and jumbo frames */
2520                 if (bytes / packets > 8000)
2521                         retval = bulk_latency;
2522                 else if ((packets < 5) && (bytes > 512))
2523                         retval = low_latency;
2524                 break;
2525         case low_latency:       /* 50 usec aka 20000 ints/s */
2526                 if (bytes > 10000) {
2527                         /* this if handles the TSO accounting */
2528                         if (bytes / packets > 8000)
2529                                 retval = bulk_latency;
2530                         else if ((packets < 10) || ((bytes / packets) > 1200))
2531                                 retval = bulk_latency;
2532                         else if ((packets > 35))
2533                                 retval = lowest_latency;
2534                 } else if (bytes / packets > 2000) {
2535                         retval = bulk_latency;
2536                 } else if (packets <= 2 && bytes < 512) {
2537                         retval = lowest_latency;
2538                 }
2539                 break;
2540         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2541                 if (bytes > 25000) {
2542                         if (packets > 35)
2543                                 retval = low_latency;
2544                 } else if (bytes < 6000) {
2545                         retval = low_latency;
2546                 }
2547                 break;
2548         }
2549
2550         return retval;
2551 }
2552
2553 static void e1000_set_itr(struct e1000_adapter *adapter)
2554 {
2555         u16 current_itr;
2556         u32 new_itr = adapter->itr;
2557
2558         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2559         if (adapter->link_speed != SPEED_1000) {
2560                 current_itr = 0;
2561                 new_itr = 4000;
2562                 goto set_itr_now;
2563         }
2564
2565         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2566                 new_itr = 0;
2567                 goto set_itr_now;
2568         }
2569
2570         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2571                                            adapter->total_tx_packets,
2572                                            adapter->total_tx_bytes);
2573         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2574         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2575                 adapter->tx_itr = low_latency;
2576
2577         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2578                                            adapter->total_rx_packets,
2579                                            adapter->total_rx_bytes);
2580         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2581         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2582                 adapter->rx_itr = low_latency;
2583
2584         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2585
2586         /* counts and packets in update_itr are dependent on these numbers */
2587         switch (current_itr) {
2588         case lowest_latency:
2589                 new_itr = 70000;
2590                 break;
2591         case low_latency:
2592                 new_itr = 20000;        /* aka hwitr = ~200 */
2593                 break;
2594         case bulk_latency:
2595                 new_itr = 4000;
2596                 break;
2597         default:
2598                 break;
2599         }
2600
2601 set_itr_now:
2602         if (new_itr != adapter->itr) {
2603                 /* this attempts to bias the interrupt rate towards Bulk
2604                  * by adding intermediate steps when interrupt rate is
2605                  * increasing
2606                  */
2607                 new_itr = new_itr > adapter->itr ?
2608                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2609                 adapter->itr = new_itr;
2610                 adapter->rx_ring->itr_val = new_itr;
2611                 if (adapter->msix_entries)
2612                         adapter->rx_ring->set_itr = 1;
2613                 else
2614                         e1000e_write_itr(adapter, new_itr);
2615         }
2616 }
2617
2618 /**
2619  * e1000e_write_itr - write the ITR value to the appropriate registers
2620  * @adapter: address of board private structure
2621  * @itr: new ITR value to program
2622  *
2623  * e1000e_write_itr determines if the adapter is in MSI-X mode
2624  * and, if so, writes the EITR registers with the ITR value.
2625  * Otherwise, it writes the ITR value into the ITR register.
2626  **/
2627 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2628 {
2629         struct e1000_hw *hw = &adapter->hw;
2630         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2631
2632         if (adapter->msix_entries) {
2633                 int vector;
2634
2635                 for (vector = 0; vector < adapter->num_vectors; vector++)
2636                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2637         } else {
2638                 ew32(ITR, new_itr);
2639         }
2640 }
2641
2642 /**
2643  * e1000_alloc_queues - Allocate memory for all rings
2644  * @adapter: board private structure to initialize
2645  **/
2646 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2647 {
2648         int size = sizeof(struct e1000_ring);
2649
2650         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2651         if (!adapter->tx_ring)
2652                 goto err;
2653         adapter->tx_ring->count = adapter->tx_ring_count;
2654         adapter->tx_ring->adapter = adapter;
2655
2656         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2657         if (!adapter->rx_ring)
2658                 goto err;
2659         adapter->rx_ring->count = adapter->rx_ring_count;
2660         adapter->rx_ring->adapter = adapter;
2661
2662         return 0;
2663 err:
2664         e_err("Unable to allocate memory for queues\n");
2665         kfree(adapter->rx_ring);
2666         kfree(adapter->tx_ring);
2667         return -ENOMEM;
2668 }
2669
2670 /**
2671  * e1000e_poll - NAPI Rx polling callback
2672  * @napi: struct associated with this polling callback
2673  * @weight: number of packets driver is allowed to process this poll
2674  **/
2675 static int e1000e_poll(struct napi_struct *napi, int weight)
2676 {
2677         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2678                                                      napi);
2679         struct e1000_hw *hw = &adapter->hw;
2680         struct net_device *poll_dev = adapter->netdev;
2681         int tx_cleaned = 1, work_done = 0;
2682
2683         adapter = netdev_priv(poll_dev);
2684
2685         if (!adapter->msix_entries ||
2686             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2687                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2688
2689         adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2690
2691         if (!tx_cleaned)
2692                 work_done = weight;
2693
2694         /* If weight not fully consumed, exit the polling mode */
2695         if (work_done < weight) {
2696                 if (adapter->itr_setting & 3)
2697                         e1000_set_itr(adapter);
2698                 napi_complete_done(napi, work_done);
2699                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2700                         if (adapter->msix_entries)
2701                                 ew32(IMS, adapter->rx_ring->ims_val);
2702                         else
2703                                 e1000_irq_enable(adapter);
2704                 }
2705         }
2706
2707         return work_done;
2708 }
2709
2710 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2711                                  __always_unused __be16 proto, u16 vid)
2712 {
2713         struct e1000_adapter *adapter = netdev_priv(netdev);
2714         struct e1000_hw *hw = &adapter->hw;
2715         u32 vfta, index;
2716
2717         /* don't update vlan cookie if already programmed */
2718         if ((adapter->hw.mng_cookie.status &
2719              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2720             (vid == adapter->mng_vlan_id))
2721                 return 0;
2722
2723         /* add VID to filter table */
2724         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2725                 index = (vid >> 5) & 0x7F;
2726                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2727                 vfta |= (1 << (vid & 0x1F));
2728                 hw->mac.ops.write_vfta(hw, index, vfta);
2729         }
2730
2731         set_bit(vid, adapter->active_vlans);
2732
2733         return 0;
2734 }
2735
2736 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2737                                   __always_unused __be16 proto, u16 vid)
2738 {
2739         struct e1000_adapter *adapter = netdev_priv(netdev);
2740         struct e1000_hw *hw = &adapter->hw;
2741         u32 vfta, index;
2742
2743         if ((adapter->hw.mng_cookie.status &
2744              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2745             (vid == adapter->mng_vlan_id)) {
2746                 /* release control to f/w */
2747                 e1000e_release_hw_control(adapter);
2748                 return 0;
2749         }
2750
2751         /* remove VID from filter table */
2752         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2753                 index = (vid >> 5) & 0x7F;
2754                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2755                 vfta &= ~(1 << (vid & 0x1F));
2756                 hw->mac.ops.write_vfta(hw, index, vfta);
2757         }
2758
2759         clear_bit(vid, adapter->active_vlans);
2760
2761         return 0;
2762 }
2763
2764 /**
2765  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2766  * @adapter: board private structure to initialize
2767  **/
2768 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2769 {
2770         struct net_device *netdev = adapter->netdev;
2771         struct e1000_hw *hw = &adapter->hw;
2772         u32 rctl;
2773
2774         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2775                 /* disable VLAN receive filtering */
2776                 rctl = er32(RCTL);
2777                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2778                 ew32(RCTL, rctl);
2779
2780                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2781                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2782                                                adapter->mng_vlan_id);
2783                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2784                 }
2785         }
2786 }
2787
2788 /**
2789  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2790  * @adapter: board private structure to initialize
2791  **/
2792 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2793 {
2794         struct e1000_hw *hw = &adapter->hw;
2795         u32 rctl;
2796
2797         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2798                 /* enable VLAN receive filtering */
2799                 rctl = er32(RCTL);
2800                 rctl |= E1000_RCTL_VFE;
2801                 rctl &= ~E1000_RCTL_CFIEN;
2802                 ew32(RCTL, rctl);
2803         }
2804 }
2805
2806 /**
2807  * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2808  * @adapter: board private structure to initialize
2809  **/
2810 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2811 {
2812         struct e1000_hw *hw = &adapter->hw;
2813         u32 ctrl;
2814
2815         /* disable VLAN tag insert/strip */
2816         ctrl = er32(CTRL);
2817         ctrl &= ~E1000_CTRL_VME;
2818         ew32(CTRL, ctrl);
2819 }
2820
2821 /**
2822  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2823  * @adapter: board private structure to initialize
2824  **/
2825 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2826 {
2827         struct e1000_hw *hw = &adapter->hw;
2828         u32 ctrl;
2829
2830         /* enable VLAN tag insert/strip */
2831         ctrl = er32(CTRL);
2832         ctrl |= E1000_CTRL_VME;
2833         ew32(CTRL, ctrl);
2834 }
2835
2836 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2837 {
2838         struct net_device *netdev = adapter->netdev;
2839         u16 vid = adapter->hw.mng_cookie.vlan_id;
2840         u16 old_vid = adapter->mng_vlan_id;
2841
2842         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2843                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2844                 adapter->mng_vlan_id = vid;
2845         }
2846
2847         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2848                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2849 }
2850
2851 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2852 {
2853         u16 vid;
2854
2855         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2856
2857         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2858             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2859 }
2860
2861 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2862 {
2863         struct e1000_hw *hw = &adapter->hw;
2864         u32 manc, manc2h, mdef, i, j;
2865
2866         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2867                 return;
2868
2869         manc = er32(MANC);
2870
2871         /* enable receiving management packets to the host. this will probably
2872          * generate destination unreachable messages from the host OS, but
2873          * the packets will be handled on SMBUS
2874          */
2875         manc |= E1000_MANC_EN_MNG2HOST;
2876         manc2h = er32(MANC2H);
2877
2878         switch (hw->mac.type) {
2879         default:
2880                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2881                 break;
2882         case e1000_82574:
2883         case e1000_82583:
2884                 /* Check if IPMI pass-through decision filter already exists;
2885                  * if so, enable it.
2886                  */
2887                 for (i = 0, j = 0; i < 8; i++) {
2888                         mdef = er32(MDEF(i));
2889
2890                         /* Ignore filters with anything other than IPMI ports */
2891                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2892                                 continue;
2893
2894                         /* Enable this decision filter in MANC2H */
2895                         if (mdef)
2896                                 manc2h |= (1 << i);
2897
2898                         j |= mdef;
2899                 }
2900
2901                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2902                         break;
2903
2904                 /* Create new decision filter in an empty filter */
2905                 for (i = 0, j = 0; i < 8; i++)
2906                         if (er32(MDEF(i)) == 0) {
2907                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2908                                                E1000_MDEF_PORT_664));
2909                                 manc2h |= (1 << 1);
2910                                 j++;
2911                                 break;
2912                         }
2913
2914                 if (!j)
2915                         e_warn("Unable to create IPMI pass-through filter\n");
2916                 break;
2917         }
2918
2919         ew32(MANC2H, manc2h);
2920         ew32(MANC, manc);
2921 }
2922
2923 /**
2924  * e1000_configure_tx - Configure Transmit Unit after Reset
2925  * @adapter: board private structure
2926  *
2927  * Configure the Tx unit of the MAC after a reset.
2928  **/
2929 static void e1000_configure_tx(struct e1000_adapter *adapter)
2930 {
2931         struct e1000_hw *hw = &adapter->hw;
2932         struct e1000_ring *tx_ring = adapter->tx_ring;
2933         u64 tdba;
2934         u32 tdlen, tctl, tarc;
2935
2936         /* Setup the HW Tx Head and Tail descriptor pointers */
2937         tdba = tx_ring->dma;
2938         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2939         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2940         ew32(TDBAH(0), (tdba >> 32));
2941         ew32(TDLEN(0), tdlen);
2942         ew32(TDH(0), 0);
2943         ew32(TDT(0), 0);
2944         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2945         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2946
2947         writel(0, tx_ring->head);
2948         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2949                 e1000e_update_tdt_wa(tx_ring, 0);
2950         else
2951                 writel(0, tx_ring->tail);
2952
2953         /* Set the Tx Interrupt Delay register */
2954         ew32(TIDV, adapter->tx_int_delay);
2955         /* Tx irq moderation */
2956         ew32(TADV, adapter->tx_abs_int_delay);
2957
2958         if (adapter->flags2 & FLAG2_DMA_BURST) {
2959                 u32 txdctl = er32(TXDCTL(0));
2960
2961                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2962                             E1000_TXDCTL_WTHRESH);
2963                 /* set up some performance related parameters to encourage the
2964                  * hardware to use the bus more efficiently in bursts, depends
2965                  * on the tx_int_delay to be enabled,
2966                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2967                  * hthresh = 1 ==> prefetch when one or more available
2968                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2969                  * BEWARE: this seems to work but should be considered first if
2970                  * there are Tx hangs or other Tx related bugs
2971                  */
2972                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2973                 ew32(TXDCTL(0), txdctl);
2974         }
2975         /* erratum work around: set txdctl the same for both queues */
2976         ew32(TXDCTL(1), er32(TXDCTL(0)));
2977
2978         /* Program the Transmit Control Register */
2979         tctl = er32(TCTL);
2980         tctl &= ~E1000_TCTL_CT;
2981         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2982                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2983
2984         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2985                 tarc = er32(TARC(0));
2986                 /* set the speed mode bit, we'll clear it if we're not at
2987                  * gigabit link later
2988                  */
2989 #define SPEED_MODE_BIT (1 << 21)
2990                 tarc |= SPEED_MODE_BIT;
2991                 ew32(TARC(0), tarc);
2992         }
2993
2994         /* errata: program both queues to unweighted RR */
2995         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2996                 tarc = er32(TARC(0));
2997                 tarc |= 1;
2998                 ew32(TARC(0), tarc);
2999                 tarc = er32(TARC(1));
3000                 tarc |= 1;
3001                 ew32(TARC(1), tarc);
3002         }
3003
3004         /* Setup Transmit Descriptor Settings for eop descriptor */
3005         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
3006
3007         /* only set IDE if we are delaying interrupts using the timers */
3008         if (adapter->tx_int_delay)
3009                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3010
3011         /* enable Report Status bit */
3012         adapter->txd_cmd |= E1000_TXD_CMD_RS;
3013
3014         ew32(TCTL, tctl);
3015
3016         hw->mac.ops.config_collision_dist(hw);
3017
3018         /* SPT Si errata workaround to avoid data corruption */
3019         if (hw->mac.type == e1000_pch_spt) {
3020                 u32 reg_val;
3021
3022                 reg_val = er32(IOSFPC);
3023                 reg_val |= E1000_RCTL_RDMTS_HEX;
3024                 ew32(IOSFPC, reg_val);
3025
3026                 reg_val = er32(TARC(0));
3027                 reg_val |= E1000_TARC0_CB_MULTIQ_3_REQ;
3028                 ew32(TARC(0), reg_val);
3029         }
3030 }
3031
3032 /**
3033  * e1000_setup_rctl - configure the receive control registers
3034  * @adapter: Board private structure
3035  **/
3036 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3037                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3038 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3039 {
3040         struct e1000_hw *hw = &adapter->hw;
3041         u32 rctl, rfctl;
3042         u32 pages = 0;
3043
3044         /* Workaround Si errata on PCHx - configure jumbo frame flow.
3045          * If jumbo frames not set, program related MAC/PHY registers
3046          * to h/w defaults
3047          */
3048         if (hw->mac.type >= e1000_pch2lan) {
3049                 s32 ret_val;
3050
3051                 if (adapter->netdev->mtu > ETH_DATA_LEN)
3052                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3053                 else
3054                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3055
3056                 if (ret_val)
3057                         e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3058         }
3059
3060         /* Program MC offset vector base */
3061         rctl = er32(RCTL);
3062         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3063         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3064             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3065             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3066
3067         /* Do not Store bad packets */
3068         rctl &= ~E1000_RCTL_SBP;
3069
3070         /* Enable Long Packet receive */
3071         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3072                 rctl &= ~E1000_RCTL_LPE;
3073         else
3074                 rctl |= E1000_RCTL_LPE;
3075
3076         /* Some systems expect that the CRC is included in SMBUS traffic. The
3077          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3078          * host memory when this is enabled
3079          */
3080         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3081                 rctl |= E1000_RCTL_SECRC;
3082
3083         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3084         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3085                 u16 phy_data;
3086
3087                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3088                 phy_data &= 0xfff8;
3089                 phy_data |= (1 << 2);
3090                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3091
3092                 e1e_rphy(hw, 22, &phy_data);
3093                 phy_data &= 0x0fff;
3094                 phy_data |= (1 << 14);
3095                 e1e_wphy(hw, 0x10, 0x2823);
3096                 e1e_wphy(hw, 0x11, 0x0003);
3097                 e1e_wphy(hw, 22, phy_data);
3098         }
3099
3100         /* Setup buffer sizes */
3101         rctl &= ~E1000_RCTL_SZ_4096;
3102         rctl |= E1000_RCTL_BSEX;
3103         switch (adapter->rx_buffer_len) {
3104         case 2048:
3105         default:
3106                 rctl |= E1000_RCTL_SZ_2048;
3107                 rctl &= ~E1000_RCTL_BSEX;
3108                 break;
3109         case 4096:
3110                 rctl |= E1000_RCTL_SZ_4096;
3111                 break;
3112         case 8192:
3113                 rctl |= E1000_RCTL_SZ_8192;
3114                 break;
3115         case 16384:
3116                 rctl |= E1000_RCTL_SZ_16384;
3117                 break;
3118         }
3119
3120         /* Enable Extended Status in all Receive Descriptors */
3121         rfctl = er32(RFCTL);
3122         rfctl |= E1000_RFCTL_EXTEN;
3123         ew32(RFCTL, rfctl);
3124
3125         /* 82571 and greater support packet-split where the protocol
3126          * header is placed in skb->data and the packet data is
3127          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3128          * In the case of a non-split, skb->data is linearly filled,
3129          * followed by the page buffers.  Therefore, skb->data is
3130          * sized to hold the largest protocol header.
3131          *
3132          * allocations using alloc_page take too long for regular MTU
3133          * so only enable packet split for jumbo frames
3134          *
3135          * Using pages when the page size is greater than 16k wastes
3136          * a lot of memory, since we allocate 3 pages at all times
3137          * per packet.
3138          */
3139         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3140         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3141                 adapter->rx_ps_pages = pages;
3142         else
3143                 adapter->rx_ps_pages = 0;
3144
3145         if (adapter->rx_ps_pages) {
3146                 u32 psrctl = 0;
3147
3148                 /* Enable Packet split descriptors */
3149                 rctl |= E1000_RCTL_DTYP_PS;
3150
3151                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3152
3153                 switch (adapter->rx_ps_pages) {
3154                 case 3:
3155                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3156                         /* fall-through */
3157                 case 2:
3158                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3159                         /* fall-through */
3160                 case 1:
3161                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3162                         break;
3163                 }
3164
3165                 ew32(PSRCTL, psrctl);
3166         }
3167
3168         /* This is useful for sniffing bad packets. */
3169         if (adapter->netdev->features & NETIF_F_RXALL) {
3170                 /* UPE and MPE will be handled by normal PROMISC logic
3171                  * in e1000e_set_rx_mode
3172                  */
3173                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3174                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3175                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3176
3177                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3178                           E1000_RCTL_DPF |      /* Allow filtered pause */
3179                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3180                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3181                  * and that breaks VLANs.
3182                  */
3183         }
3184
3185         ew32(RCTL, rctl);
3186         /* just started the receive unit, no need to restart */
3187         adapter->flags &= ~FLAG_RESTART_NOW;
3188 }
3189
3190 /**
3191  * e1000_configure_rx - Configure Receive Unit after Reset
3192  * @adapter: board private structure
3193  *
3194  * Configure the Rx unit of the MAC after a reset.
3195  **/
3196 static void e1000_configure_rx(struct e1000_adapter *adapter)
3197 {
3198         struct e1000_hw *hw = &adapter->hw;
3199         struct e1000_ring *rx_ring = adapter->rx_ring;
3200         u64 rdba;
3201         u32 rdlen, rctl, rxcsum, ctrl_ext;
3202
3203         if (adapter->rx_ps_pages) {
3204                 /* this is a 32 byte descriptor */
3205                 rdlen = rx_ring->count *
3206                     sizeof(union e1000_rx_desc_packet_split);
3207                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3208                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3209         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3210                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3211                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3212                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3213         } else {
3214                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3215                 adapter->clean_rx = e1000_clean_rx_irq;
3216                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3217         }
3218
3219         /* disable receives while setting up the descriptors */
3220         rctl = er32(RCTL);
3221         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3222                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3223         e1e_flush();
3224         usleep_range(10000, 20000);
3225
3226         if (adapter->flags2 & FLAG2_DMA_BURST) {
3227                 /* set the writeback threshold (only takes effect if the RDTR
3228                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3229                  * enable prefetching of 0x20 Rx descriptors
3230                  * granularity = 01
3231                  * wthresh = 04,
3232                  * hthresh = 04,
3233                  * pthresh = 0x20
3234                  */
3235                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3236                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3237
3238                 /* override the delay timers for enabling bursting, only if
3239                  * the value was not set by the user via module options
3240                  */
3241                 if (adapter->rx_int_delay == DEFAULT_RDTR)
3242                         adapter->rx_int_delay = BURST_RDTR;
3243                 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3244                         adapter->rx_abs_int_delay = BURST_RADV;
3245         }
3246
3247         /* set the Receive Delay Timer Register */
3248         ew32(RDTR, adapter->rx_int_delay);
3249
3250         /* irq moderation */
3251         ew32(RADV, adapter->rx_abs_int_delay);
3252         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3253                 e1000e_write_itr(adapter, adapter->itr);
3254
3255         ctrl_ext = er32(CTRL_EXT);
3256         /* Auto-Mask interrupts upon ICR access */
3257         ctrl_ext |= E1000_CTRL_EXT_IAME;
3258         ew32(IAM, 0xffffffff);
3259         ew32(CTRL_EXT, ctrl_ext);
3260         e1e_flush();
3261
3262         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3263          * the Base and Length of the Rx Descriptor Ring
3264          */
3265         rdba = rx_ring->dma;
3266         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3267         ew32(RDBAH(0), (rdba >> 32));
3268         ew32(RDLEN(0), rdlen);
3269         ew32(RDH(0), 0);
3270         ew32(RDT(0), 0);
3271         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3272         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3273
3274         writel(0, rx_ring->head);
3275         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3276                 e1000e_update_rdt_wa(rx_ring, 0);
3277         else
3278                 writel(0, rx_ring->tail);
3279
3280         /* Enable Receive Checksum Offload for TCP and UDP */
3281         rxcsum = er32(RXCSUM);
3282         if (adapter->netdev->features & NETIF_F_RXCSUM)
3283                 rxcsum |= E1000_RXCSUM_TUOFL;
3284         else
3285                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3286         ew32(RXCSUM, rxcsum);
3287
3288         /* With jumbo frames, excessive C-state transition latencies result
3289          * in dropped transactions.
3290          */
3291         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3292                 u32 lat =
3293                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3294                      adapter->max_frame_size) * 8 / 1000;
3295
3296                 if (adapter->flags & FLAG_IS_ICH) {
3297                         u32 rxdctl = er32(RXDCTL(0));
3298
3299                         ew32(RXDCTL(0), rxdctl | 0x3);
3300                 }
3301
3302                 pm_qos_update_request(&adapter->pm_qos_req, lat);
3303         } else {
3304                 pm_qos_update_request(&adapter->pm_qos_req,
3305                                       PM_QOS_DEFAULT_VALUE);
3306         }
3307
3308         /* Enable Receives */
3309         ew32(RCTL, rctl);
3310 }
3311
3312 /**
3313  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3314  * @netdev: network interface device structure
3315  *
3316  * Writes multicast address list to the MTA hash table.
3317  * Returns: -ENOMEM on failure
3318  *                0 on no addresses written
3319  *                X on writing X addresses to MTA
3320  */
3321 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3322 {
3323         struct e1000_adapter *adapter = netdev_priv(netdev);
3324         struct e1000_hw *hw = &adapter->hw;
3325         struct netdev_hw_addr *ha;
3326         u8 *mta_list;
3327         int i;
3328
3329         if (netdev_mc_empty(netdev)) {
3330                 /* nothing to program, so clear mc list */
3331                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3332                 return 0;
3333         }
3334
3335         mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3336         if (!mta_list)
3337                 return -ENOMEM;
3338
3339         /* update_mc_addr_list expects a packed array of only addresses. */
3340         i = 0;
3341         netdev_for_each_mc_addr(ha, netdev)
3342             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3343
3344         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3345         kfree(mta_list);
3346
3347         return netdev_mc_count(netdev);
3348 }
3349
3350 /**
3351  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3352  * @netdev: network interface device structure
3353  *
3354  * Writes unicast address list to the RAR table.
3355  * Returns: -ENOMEM on failure/insufficient address space
3356  *                0 on no addresses written
3357  *                X on writing X addresses to the RAR table
3358  **/
3359 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3360 {
3361         struct e1000_adapter *adapter = netdev_priv(netdev);
3362         struct e1000_hw *hw = &adapter->hw;
3363         unsigned int rar_entries;
3364         int count = 0;
3365
3366         rar_entries = hw->mac.ops.rar_get_count(hw);
3367
3368         /* save a rar entry for our hardware address */
3369         rar_entries--;
3370
3371         /* save a rar entry for the LAA workaround */
3372         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3373                 rar_entries--;
3374
3375         /* return ENOMEM indicating insufficient memory for addresses */
3376         if (netdev_uc_count(netdev) > rar_entries)
3377                 return -ENOMEM;
3378
3379         if (!netdev_uc_empty(netdev) && rar_entries) {
3380                 struct netdev_hw_addr *ha;
3381
3382                 /* write the addresses in reverse order to avoid write
3383                  * combining
3384                  */
3385                 netdev_for_each_uc_addr(ha, netdev) {
3386                         int rval;
3387
3388                         if (!rar_entries)
3389                                 break;
3390                         rval = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3391                         if (rval < 0)
3392                                 return -ENOMEM;
3393                         count++;
3394                 }
3395         }
3396
3397         /* zero out the remaining RAR entries not used above */
3398         for (; rar_entries > 0; rar_entries--) {
3399                 ew32(RAH(rar_entries), 0);
3400                 ew32(RAL(rar_entries), 0);
3401         }
3402         e1e_flush();
3403
3404         return count;
3405 }
3406
3407 /**
3408  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3409  * @netdev: network interface device structure
3410  *
3411  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3412  * address list or the network interface flags are updated.  This routine is
3413  * responsible for configuring the hardware for proper unicast, multicast,
3414  * promiscuous mode, and all-multi behavior.
3415  **/
3416 static void e1000e_set_rx_mode(struct net_device *netdev)
3417 {
3418         struct e1000_adapter *adapter = netdev_priv(netdev);
3419         struct e1000_hw *hw = &adapter->hw;
3420         u32 rctl;
3421
3422         if (pm_runtime_suspended(netdev->dev.parent))
3423                 return;
3424
3425         /* Check for Promiscuous and All Multicast modes */
3426         rctl = er32(RCTL);
3427
3428         /* clear the affected bits */
3429         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3430
3431         if (netdev->flags & IFF_PROMISC) {
3432                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3433                 /* Do not hardware filter VLANs in promisc mode */
3434                 e1000e_vlan_filter_disable(adapter);
3435         } else {
3436                 int count;
3437
3438                 if (netdev->flags & IFF_ALLMULTI) {
3439                         rctl |= E1000_RCTL_MPE;
3440                 } else {
3441                         /* Write addresses to the MTA, if the attempt fails
3442                          * then we should just turn on promiscuous mode so
3443                          * that we can at least receive multicast traffic
3444                          */
3445                         count = e1000e_write_mc_addr_list(netdev);
3446                         if (count < 0)
3447                                 rctl |= E1000_RCTL_MPE;
3448                 }
3449                 e1000e_vlan_filter_enable(adapter);
3450                 /* Write addresses to available RAR registers, if there is not
3451                  * sufficient space to store all the addresses then enable
3452                  * unicast promiscuous mode
3453                  */
3454                 count = e1000e_write_uc_addr_list(netdev);
3455                 if (count < 0)
3456                         rctl |= E1000_RCTL_UPE;
3457         }
3458
3459         ew32(RCTL, rctl);
3460
3461         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3462                 e1000e_vlan_strip_enable(adapter);
3463         else
3464                 e1000e_vlan_strip_disable(adapter);
3465 }
3466
3467 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3468 {
3469         struct e1000_hw *hw = &adapter->hw;
3470         u32 mrqc, rxcsum;
3471         u32 rss_key[10];
3472         int i;
3473
3474         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3475         for (i = 0; i < 10; i++)
3476                 ew32(RSSRK(i), rss_key[i]);
3477
3478         /* Direct all traffic to queue 0 */
3479         for (i = 0; i < 32; i++)
3480                 ew32(RETA(i), 0);
3481
3482         /* Disable raw packet checksumming so that RSS hash is placed in
3483          * descriptor on writeback.
3484          */
3485         rxcsum = er32(RXCSUM);
3486         rxcsum |= E1000_RXCSUM_PCSD;
3487
3488         ew32(RXCSUM, rxcsum);
3489
3490         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3491                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3492                 E1000_MRQC_RSS_FIELD_IPV6 |
3493                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3494                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3495
3496         ew32(MRQC, mrqc);
3497 }
3498
3499 /**
3500  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3501  * @adapter: board private structure
3502  * @timinca: pointer to returned time increment attributes
3503  *
3504  * Get attributes for incrementing the System Time Register SYSTIML/H at
3505  * the default base frequency, and set the cyclecounter shift value.
3506  **/
3507 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3508 {
3509         struct e1000_hw *hw = &adapter->hw;
3510         u32 incvalue, incperiod, shift;
3511
3512         /* Make sure clock is enabled on I217/I218/I219  before checking
3513          * the frequency
3514          */
3515         if (((hw->mac.type == e1000_pch_lpt) ||
3516              (hw->mac.type == e1000_pch_spt)) &&
3517             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3518             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3519                 u32 fextnvm7 = er32(FEXTNVM7);
3520
3521                 if (!(fextnvm7 & (1 << 0))) {
3522                         ew32(FEXTNVM7, fextnvm7 | (1 << 0));
3523                         e1e_flush();
3524                 }
3525         }
3526
3527         switch (hw->mac.type) {
3528         case e1000_pch2lan:
3529         case e1000_pch_lpt:
3530                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3531                         /* Stable 96MHz frequency */
3532                         incperiod = INCPERIOD_96MHz;
3533                         incvalue = INCVALUE_96MHz;
3534                         shift = INCVALUE_SHIFT_96MHz;
3535                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3536                 } else {
3537                         /* Stable 25MHz frequency */
3538                         incperiod = INCPERIOD_25MHz;
3539                         incvalue = INCVALUE_25MHz;
3540                         shift = INCVALUE_SHIFT_25MHz;
3541                         adapter->cc.shift = shift;
3542                 }
3543                 break;
3544         case e1000_pch_spt:
3545                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3546                         /* Stable 24MHz frequency */
3547                         incperiod = INCPERIOD_24MHz;
3548                         incvalue = INCVALUE_24MHz;
3549                         shift = INCVALUE_SHIFT_24MHz;
3550                         adapter->cc.shift = shift;
3551                         break;
3552                 }
3553                 return -EINVAL;
3554         case e1000_82574:
3555         case e1000_82583:
3556                 /* Stable 25MHz frequency */
3557                 incperiod = INCPERIOD_25MHz;
3558                 incvalue = INCVALUE_25MHz;
3559                 shift = INCVALUE_SHIFT_25MHz;
3560                 adapter->cc.shift = shift;
3561                 break;
3562         default:
3563                 return -EINVAL;
3564         }
3565
3566         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3567                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3568
3569         return 0;
3570 }
3571
3572 /**
3573  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3574  * @adapter: board private structure
3575  *
3576  * Outgoing time stamping can be enabled and disabled. Play nice and
3577  * disable it when requested, although it shouldn't cause any overhead
3578  * when no packet needs it. At most one packet in the queue may be
3579  * marked for time stamping, otherwise it would be impossible to tell
3580  * for sure to which packet the hardware time stamp belongs.
3581  *
3582  * Incoming time stamping has to be configured via the hardware filters.
3583  * Not all combinations are supported, in particular event type has to be
3584  * specified. Matching the kind of event packet is not supported, with the
3585  * exception of "all V2 events regardless of level 2 or 4".
3586  **/
3587 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3588                                   struct hwtstamp_config *config)
3589 {
3590         struct e1000_hw *hw = &adapter->hw;
3591         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3592         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3593         u32 rxmtrl = 0;
3594         u16 rxudp = 0;
3595         bool is_l4 = false;
3596         bool is_l2 = false;
3597         u32 regval;
3598         s32 ret_val;
3599
3600         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3601                 return -EINVAL;
3602
3603         /* flags reserved for future extensions - must be zero */
3604         if (config->flags)
3605                 return -EINVAL;
3606
3607         switch (config->tx_type) {
3608         case HWTSTAMP_TX_OFF:
3609                 tsync_tx_ctl = 0;
3610                 break;
3611         case HWTSTAMP_TX_ON:
3612                 break;
3613         default:
3614                 return -ERANGE;
3615         }
3616
3617         switch (config->rx_filter) {
3618         case HWTSTAMP_FILTER_NONE:
3619                 tsync_rx_ctl = 0;
3620                 break;
3621         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3622                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3623                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3624                 is_l4 = true;
3625                 break;
3626         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3627                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3628                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3629                 is_l4 = true;
3630                 break;
3631         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3632                 /* Also time stamps V2 L2 Path Delay Request/Response */
3633                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3634                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3635                 is_l2 = true;
3636                 break;
3637         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3638                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3639                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3640                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3641                 is_l2 = true;
3642                 break;
3643         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3644                 /* Hardware cannot filter just V2 L4 Sync messages;
3645                  * fall-through to V2 (both L2 and L4) Sync.
3646                  */
3647         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3648                 /* Also time stamps V2 Path Delay Request/Response. */
3649                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3650                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3651                 is_l2 = true;
3652                 is_l4 = true;
3653                 break;
3654         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3655                 /* Hardware cannot filter just V2 L4 Delay Request messages;
3656                  * fall-through to V2 (both L2 and L4) Delay Request.
3657                  */
3658         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3659                 /* Also time stamps V2 Path Delay Request/Response. */
3660                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3661                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3662                 is_l2 = true;
3663                 is_l4 = true;
3664                 break;
3665         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3666         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3667                 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3668                  * fall-through to all V2 (both L2 and L4) Events.
3669                  */
3670         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3671                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3672                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3673                 is_l2 = true;
3674                 is_l4 = true;
3675                 break;
3676         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3677                 /* For V1, the hardware can only filter Sync messages or
3678                  * Delay Request messages but not both so fall-through to
3679                  * time stamp all packets.
3680                  */
3681         case HWTSTAMP_FILTER_ALL:
3682                 is_l2 = true;
3683                 is_l4 = true;
3684                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3685                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3686                 break;
3687         default:
3688                 return -ERANGE;
3689         }
3690
3691         adapter->hwtstamp_config = *config;
3692
3693         /* enable/disable Tx h/w time stamping */
3694         regval = er32(TSYNCTXCTL);
3695         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3696         regval |= tsync_tx_ctl;
3697         ew32(TSYNCTXCTL, regval);
3698         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3699             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3700                 e_err("Timesync Tx Control register not set as expected\n");
3701                 return -EAGAIN;
3702         }
3703
3704         /* enable/disable Rx h/w time stamping */
3705         regval = er32(TSYNCRXCTL);
3706         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3707         regval |= tsync_rx_ctl;
3708         ew32(TSYNCRXCTL, regval);
3709         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3710                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3711             (regval & (E1000_TSYNCRXCTL_ENABLED |
3712                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3713                 e_err("Timesync Rx Control register not set as expected\n");
3714                 return -EAGAIN;
3715         }
3716
3717         /* L2: define ethertype filter for time stamped packets */
3718         if (is_l2)
3719                 rxmtrl |= ETH_P_1588;
3720
3721         /* define which PTP packets get time stamped */
3722         ew32(RXMTRL, rxmtrl);
3723
3724         /* Filter by destination port */
3725         if (is_l4) {
3726                 rxudp = PTP_EV_PORT;
3727                 cpu_to_be16s(&rxudp);
3728         }
3729         ew32(RXUDP, rxudp);
3730
3731         e1e_flush();
3732
3733         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3734         er32(RXSTMPH);
3735         er32(TXSTMPH);
3736
3737         /* Get and set the System Time Register SYSTIM base frequency */
3738         ret_val = e1000e_get_base_timinca(adapter, &regval);
3739         if (ret_val)
3740                 return ret_val;
3741         ew32(TIMINCA, regval);
3742
3743         /* reset the ns time counter */
3744         timecounter_init(&adapter->tc, &adapter->cc,
3745                          ktime_to_ns(ktime_get_real()));
3746
3747         return 0;
3748 }
3749
3750 /**
3751  * e1000_configure - configure the hardware for Rx and Tx
3752  * @adapter: private board structure
3753  **/
3754 static void e1000_configure(struct e1000_adapter *adapter)
3755 {
3756         struct e1000_ring *rx_ring = adapter->rx_ring;
3757
3758         e1000e_set_rx_mode(adapter->netdev);
3759
3760         e1000_restore_vlan(adapter);
3761         e1000_init_manageability_pt(adapter);
3762
3763         e1000_configure_tx(adapter);
3764
3765         if (adapter->netdev->features & NETIF_F_RXHASH)
3766                 e1000e_setup_rss_hash(adapter);
3767         e1000_setup_rctl(adapter);
3768         e1000_configure_rx(adapter);
3769         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3770 }
3771
3772 /**
3773  * e1000e_power_up_phy - restore link in case the phy was powered down
3774  * @adapter: address of board private structure
3775  *
3776  * The phy may be powered down to save power and turn off link when the
3777  * driver is unloaded and wake on lan is not enabled (among others)
3778  * *** this routine MUST be followed by a call to e1000e_reset ***
3779  **/
3780 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3781 {
3782         if (adapter->hw.phy.ops.power_up)
3783                 adapter->hw.phy.ops.power_up(&adapter->hw);
3784
3785         adapter->hw.mac.ops.setup_link(&adapter->hw);
3786 }
3787
3788 /**
3789  * e1000_power_down_phy - Power down the PHY
3790  *
3791  * Power down the PHY so no link is implied when interface is down.
3792  * The PHY cannot be powered down if management or WoL is active.
3793  */
3794 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3795 {
3796         if (adapter->hw.phy.ops.power_down)
3797                 adapter->hw.phy.ops.power_down(&adapter->hw);
3798 }
3799
3800 /**
3801  * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3802  *
3803  * We want to clear all pending descriptors from the TX ring.
3804  * zeroing happens when the HW reads the regs. We  assign the ring itself as
3805  * the data of the next descriptor. We don't care about the data we are about
3806  * to reset the HW.
3807  */
3808 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3809 {
3810         struct e1000_hw *hw = &adapter->hw;
3811         struct e1000_ring *tx_ring = adapter->tx_ring;
3812         struct e1000_tx_desc *tx_desc = NULL;
3813         u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3814         u16 size = 512;
3815
3816         tctl = er32(TCTL);
3817         ew32(TCTL, tctl | E1000_TCTL_EN);
3818         tdt = er32(TDT(0));
3819         BUG_ON(tdt != tx_ring->next_to_use);
3820         tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3821         tx_desc->buffer_addr = tx_ring->dma;
3822
3823         tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3824         tx_desc->upper.data = 0;
3825         /* flush descriptors to memory before notifying the HW */
3826         wmb();
3827         tx_ring->next_to_use++;
3828         if (tx_ring->next_to_use == tx_ring->count)
3829                 tx_ring->next_to_use = 0;
3830         ew32(TDT(0), tx_ring->next_to_use);
3831         mmiowb();
3832         usleep_range(200, 250);
3833 }
3834
3835 /**
3836  * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3837  *
3838  * Mark all descriptors in the RX ring as consumed and disable the rx ring
3839  */
3840 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3841 {
3842         u32 rctl, rxdctl;
3843         struct e1000_hw *hw = &adapter->hw;
3844
3845         rctl = er32(RCTL);
3846         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3847         e1e_flush();
3848         usleep_range(100, 150);
3849
3850         rxdctl = er32(RXDCTL(0));
3851         /* zero the lower 14 bits (prefetch and host thresholds) */
3852         rxdctl &= 0xffffc000;
3853
3854         /* update thresholds: prefetch threshold to 31, host threshold to 1
3855          * and make sure the granularity is "descriptors" and not "cache lines"
3856          */
3857         rxdctl |= (0x1F | (1 << 8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3858
3859         ew32(RXDCTL(0), rxdctl);
3860         /* momentarily enable the RX ring for the changes to take effect */
3861         ew32(RCTL, rctl | E1000_RCTL_EN);
3862         e1e_flush();
3863         usleep_range(100, 150);
3864         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3865 }
3866
3867 /**
3868  * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3869  *
3870  * In i219, the descriptor rings must be emptied before resetting the HW
3871  * or before changing the device state to D3 during runtime (runtime PM).
3872  *
3873  * Failure to do this will cause the HW to enter a unit hang state which can
3874  * only be released by PCI reset on the device
3875  *
3876  */
3877
3878 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3879 {
3880         u16 hang_state;
3881         u32 fext_nvm11, tdlen;
3882         struct e1000_hw *hw = &adapter->hw;
3883
3884         /* First, disable MULR fix in FEXTNVM11 */
3885         fext_nvm11 = er32(FEXTNVM11);
3886         fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3887         ew32(FEXTNVM11, fext_nvm11);
3888         /* do nothing if we're not in faulty state, or if the queue is empty */
3889         tdlen = er32(TDLEN(0));
3890         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3891                              &hang_state);
3892         if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3893                 return;
3894         e1000_flush_tx_ring(adapter);
3895         /* recheck, maybe the fault is caused by the rx ring */
3896         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3897                              &hang_state);
3898         if (hang_state & FLUSH_DESC_REQUIRED)
3899                 e1000_flush_rx_ring(adapter);
3900 }
3901
3902 /**
3903  * e1000e_reset - bring the hardware into a known good state
3904  *
3905  * This function boots the hardware and enables some settings that
3906  * require a configuration cycle of the hardware - those cannot be
3907  * set/changed during runtime. After reset the device needs to be
3908  * properly configured for Rx, Tx etc.
3909  */
3910 void e1000e_reset(struct e1000_adapter *adapter)
3911 {
3912         struct e1000_mac_info *mac = &adapter->hw.mac;
3913         struct e1000_fc_info *fc = &adapter->hw.fc;
3914         struct e1000_hw *hw = &adapter->hw;
3915         u32 tx_space, min_tx_space, min_rx_space;
3916         u32 pba = adapter->pba;
3917         u16 hwm;
3918
3919         /* reset Packet Buffer Allocation to default */
3920         ew32(PBA, pba);
3921
3922         if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3923                 /* To maintain wire speed transmits, the Tx FIFO should be
3924                  * large enough to accommodate two full transmit packets,
3925                  * rounded up to the next 1KB and expressed in KB.  Likewise,
3926                  * the Rx FIFO should be large enough to accommodate at least
3927                  * one full receive packet and is similarly rounded up and
3928                  * expressed in KB.
3929                  */
3930                 pba = er32(PBA);
3931                 /* upper 16 bits has Tx packet buffer allocation size in KB */
3932                 tx_space = pba >> 16;
3933                 /* lower 16 bits has Rx packet buffer allocation size in KB */
3934                 pba &= 0xffff;
3935                 /* the Tx fifo also stores 16 bytes of information about the Tx
3936                  * but don't include ethernet FCS because hardware appends it
3937                  */
3938                 min_tx_space = (adapter->max_frame_size +
3939                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3940                 min_tx_space = ALIGN(min_tx_space, 1024);
3941                 min_tx_space >>= 10;
3942                 /* software strips receive CRC, so leave room for it */
3943                 min_rx_space = adapter->max_frame_size;
3944                 min_rx_space = ALIGN(min_rx_space, 1024);
3945                 min_rx_space >>= 10;
3946
3947                 /* If current Tx allocation is less than the min Tx FIFO size,
3948                  * and the min Tx FIFO size is less than the current Rx FIFO
3949                  * allocation, take space away from current Rx allocation
3950                  */
3951                 if ((tx_space < min_tx_space) &&
3952                     ((min_tx_space - tx_space) < pba)) {
3953                         pba -= min_tx_space - tx_space;
3954
3955                         /* if short on Rx space, Rx wins and must trump Tx
3956                          * adjustment
3957                          */
3958                         if (pba < min_rx_space)
3959                                 pba = min_rx_space;
3960                 }
3961
3962                 ew32(PBA, pba);
3963         }
3964
3965         /* flow control settings
3966          *
3967          * The high water mark must be low enough to fit one full frame
3968          * (or the size used for early receive) above it in the Rx FIFO.
3969          * Set it to the lower of:
3970          * - 90% of the Rx FIFO size, and
3971          * - the full Rx FIFO size minus one full frame
3972          */
3973         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3974                 fc->pause_time = 0xFFFF;
3975         else
3976                 fc->pause_time = E1000_FC_PAUSE_TIME;
3977         fc->send_xon = true;
3978         fc->current_mode = fc->requested_mode;
3979
3980         switch (hw->mac.type) {
3981         case e1000_ich9lan:
3982         case e1000_ich10lan:
3983                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3984                         pba = 14;
3985                         ew32(PBA, pba);
3986                         fc->high_water = 0x2800;
3987                         fc->low_water = fc->high_water - 8;
3988                         break;
3989                 }
3990                 /* fall-through */
3991         default:
3992                 hwm = min(((pba << 10) * 9 / 10),
3993                           ((pba << 10) - adapter->max_frame_size));
3994
3995                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3996                 fc->low_water = fc->high_water - 8;
3997                 break;
3998         case e1000_pchlan:
3999                 /* Workaround PCH LOM adapter hangs with certain network
4000                  * loads.  If hangs persist, try disabling Tx flow control.
4001                  */
4002                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4003                         fc->high_water = 0x3500;
4004                         fc->low_water = 0x1500;
4005                 } else {
4006                         fc->high_water = 0x5000;
4007                         fc->low_water = 0x3000;
4008                 }
4009                 fc->refresh_time = 0x1000;
4010                 break;
4011         case e1000_pch2lan:
4012         case e1000_pch_lpt:
4013         case e1000_pch_spt:
4014                 fc->refresh_time = 0x0400;
4015
4016                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4017                         fc->high_water = 0x05C20;
4018                         fc->low_water = 0x05048;
4019                         fc->pause_time = 0x0650;
4020                         break;
4021                 }
4022
4023                 pba = 14;
4024                 ew32(PBA, pba);
4025                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4026                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4027                 break;
4028         }
4029
4030         /* Alignment of Tx data is on an arbitrary byte boundary with the
4031          * maximum size per Tx descriptor limited only to the transmit
4032          * allocation of the packet buffer minus 96 bytes with an upper
4033          * limit of 24KB due to receive synchronization limitations.
4034          */
4035         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4036                                        24 << 10);
4037
4038         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4039          * fit in receive buffer.
4040          */
4041         if (adapter->itr_setting & 0x3) {
4042                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4043                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4044                                 dev_info(&adapter->pdev->dev,
4045                                          "Interrupt Throttle Rate off\n");
4046                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
4047                                 e1000e_write_itr(adapter, 0);
4048                         }
4049                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4050                         dev_info(&adapter->pdev->dev,
4051                                  "Interrupt Throttle Rate on\n");
4052                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4053                         adapter->itr = 20000;
4054                         e1000e_write_itr(adapter, adapter->itr);
4055                 }
4056         }
4057
4058         if (hw->mac.type == e1000_pch_spt)
4059                 e1000_flush_desc_rings(adapter);
4060         /* Allow time for pending master requests to run */
4061         mac->ops.reset_hw(hw);
4062
4063         /* For parts with AMT enabled, let the firmware know
4064          * that the network interface is in control
4065          */
4066         if (adapter->flags & FLAG_HAS_AMT)
4067                 e1000e_get_hw_control(adapter);
4068
4069         ew32(WUC, 0);
4070
4071         if (mac->ops.init_hw(hw))
4072                 e_err("Hardware Error\n");
4073
4074         e1000_update_mng_vlan(adapter);
4075
4076         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4077         ew32(VET, ETH_P_8021Q);
4078
4079         e1000e_reset_adaptive(hw);
4080
4081         /* initialize systim and reset the ns time counter */
4082         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
4083
4084         /* Set EEE advertisement as appropriate */
4085         if (adapter->flags2 & FLAG2_HAS_EEE) {
4086                 s32 ret_val;
4087                 u16 adv_addr;
4088
4089                 switch (hw->phy.type) {
4090                 case e1000_phy_82579:
4091                         adv_addr = I82579_EEE_ADVERTISEMENT;
4092                         break;
4093                 case e1000_phy_i217:
4094                         adv_addr = I217_EEE_ADVERTISEMENT;
4095                         break;
4096                 default:
4097                         dev_err(&adapter->pdev->dev,
4098                                 "Invalid PHY type setting EEE advertisement\n");
4099                         return;
4100                 }
4101
4102                 ret_val = hw->phy.ops.acquire(hw);
4103                 if (ret_val) {
4104                         dev_err(&adapter->pdev->dev,
4105                                 "EEE advertisement - unable to acquire PHY\n");
4106                         return;
4107                 }
4108
4109                 e1000_write_emi_reg_locked(hw, adv_addr,
4110                                            hw->dev_spec.ich8lan.eee_disable ?
4111                                            0 : adapter->eee_advert);
4112
4113                 hw->phy.ops.release(hw);
4114         }
4115
4116         if (!netif_running(adapter->netdev) &&
4117             !test_bit(__E1000_TESTING, &adapter->state))
4118                 e1000_power_down_phy(adapter);
4119
4120         e1000_get_phy_info(hw);
4121
4122         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4123             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4124                 u16 phy_data = 0;
4125                 /* speed up time to link by disabling smart power down, ignore
4126                  * the return value of this function because there is nothing
4127                  * different we would do if it failed
4128                  */
4129                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4130                 phy_data &= ~IGP02E1000_PM_SPD;
4131                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4132         }
4133         if (hw->mac.type == e1000_pch_spt && adapter->int_mode == 0) {
4134                 u32 reg;
4135
4136                 /* Fextnvm7 @ 0xe4[2] = 1 */
4137                 reg = er32(FEXTNVM7);
4138                 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4139                 ew32(FEXTNVM7, reg);
4140                 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4141                 reg = er32(FEXTNVM9);
4142                 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4143                        E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4144                 ew32(FEXTNVM9, reg);
4145         }
4146
4147 }
4148
4149 int e1000e_up(struct e1000_adapter *adapter)
4150 {
4151         struct e1000_hw *hw = &adapter->hw;
4152
4153         /* hardware has been reset, we need to reload some things */
4154         e1000_configure(adapter);
4155
4156         clear_bit(__E1000_DOWN, &adapter->state);
4157
4158         if (adapter->msix_entries)
4159                 e1000_configure_msix(adapter);
4160         e1000_irq_enable(adapter);
4161
4162         netif_start_queue(adapter->netdev);
4163
4164         /* fire a link change interrupt to start the watchdog */
4165         if (adapter->msix_entries)
4166                 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
4167         else
4168                 ew32(ICS, E1000_ICS_LSC);
4169
4170         return 0;
4171 }
4172
4173 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4174 {
4175         struct e1000_hw *hw = &adapter->hw;
4176
4177         if (!(adapter->flags2 & FLAG2_DMA_BURST))
4178                 return;
4179
4180         /* flush pending descriptor writebacks to memory */
4181         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4182         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4183
4184         /* execute the writes immediately */
4185         e1e_flush();
4186
4187         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4188          * write is successful
4189          */
4190         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4191         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4192
4193         /* execute the writes immediately */
4194         e1e_flush();
4195 }
4196
4197 static void e1000e_update_stats(struct e1000_adapter *adapter);
4198
4199 /**
4200  * e1000e_down - quiesce the device and optionally reset the hardware
4201  * @adapter: board private structure
4202  * @reset: boolean flag to reset the hardware or not
4203  */
4204 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4205 {
4206         struct net_device *netdev = adapter->netdev;
4207         struct e1000_hw *hw = &adapter->hw;
4208         u32 tctl, rctl;
4209
4210         /* signal that we're down so the interrupt handler does not
4211          * reschedule our watchdog timer
4212          */
4213         set_bit(__E1000_DOWN, &adapter->state);
4214
4215         netif_carrier_off(netdev);
4216
4217         /* disable receives in the hardware */
4218         rctl = er32(RCTL);
4219         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4220                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4221         /* flush and sleep below */
4222
4223         netif_stop_queue(netdev);
4224
4225         /* disable transmits in the hardware */
4226         tctl = er32(TCTL);
4227         tctl &= ~E1000_TCTL_EN;
4228         ew32(TCTL, tctl);
4229
4230         /* flush both disables and wait for them to finish */
4231         e1e_flush();
4232         usleep_range(10000, 20000);
4233
4234         e1000_irq_disable(adapter);
4235
4236         napi_synchronize(&adapter->napi);
4237
4238         del_timer_sync(&adapter->watchdog_timer);
4239         del_timer_sync(&adapter->phy_info_timer);
4240
4241         spin_lock(&adapter->stats64_lock);
4242         e1000e_update_stats(adapter);
4243         spin_unlock(&adapter->stats64_lock);
4244
4245         e1000e_flush_descriptors(adapter);
4246
4247         adapter->link_speed = 0;
4248         adapter->link_duplex = 0;
4249
4250         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4251         if ((hw->mac.type >= e1000_pch2lan) &&
4252             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4253             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4254                 e_dbg("failed to disable jumbo frame workaround mode\n");
4255
4256         if (!pci_channel_offline(adapter->pdev)) {
4257                 if (reset)
4258                         e1000e_reset(adapter);
4259                 else if (hw->mac.type == e1000_pch_spt)
4260                         e1000_flush_desc_rings(adapter);
4261         }
4262         e1000_clean_tx_ring(adapter->tx_ring);
4263         e1000_clean_rx_ring(adapter->rx_ring);
4264 }
4265
4266 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4267 {
4268         might_sleep();
4269         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4270                 usleep_range(1000, 2000);
4271         e1000e_down(adapter, true);
4272         e1000e_up(adapter);
4273         clear_bit(__E1000_RESETTING, &adapter->state);
4274 }
4275
4276 /**
4277  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4278  * @cc: cyclecounter structure
4279  **/
4280 static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
4281 {
4282         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4283                                                      cc);
4284         struct e1000_hw *hw = &adapter->hw;
4285         u32 systimel_1, systimel_2, systimeh;
4286         cycle_t systim, systim_next;
4287         /* SYSTIMH latching upon SYSTIML read does not work well.
4288          * This means that if SYSTIML overflows after we read it but before
4289          * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4290          * will experience a huge non linear increment in the systime value
4291          * to fix that we test for overflow and if true, we re-read systime.
4292          */
4293         systimel_1 = er32(SYSTIML);
4294         systimeh = er32(SYSTIMH);
4295         systimel_2 = er32(SYSTIML);
4296         /* Check for overflow. If there was no overflow, use the values */
4297         if (systimel_1 < systimel_2) {
4298                 systim = (cycle_t)systimel_1;
4299                 systim |= (cycle_t)systimeh << 32;
4300         } else {
4301                 /* There was an overflow, read again SYSTIMH, and use
4302                  * systimel_2
4303                  */
4304                 systimeh = er32(SYSTIMH);
4305                 systim = (cycle_t)systimel_2;
4306                 systim |= (cycle_t)systimeh << 32;
4307         }
4308
4309         if ((hw->mac.type == e1000_82574) || (hw->mac.type == e1000_82583)) {
4310                 u64 incvalue, time_delta, rem, temp;
4311                 int i;
4312
4313                 /* errata for 82574/82583 possible bad bits read from SYSTIMH/L
4314                  * check to see that the time is incrementing at a reasonable
4315                  * rate and is a multiple of incvalue
4316                  */
4317                 incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4318                 for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4319                         /* latch SYSTIMH on read of SYSTIML */
4320                         systim_next = (cycle_t)er32(SYSTIML);
4321                         systim_next |= (cycle_t)er32(SYSTIMH) << 32;
4322
4323                         time_delta = systim_next - systim;
4324                         temp = time_delta;
4325                         rem = do_div(temp, incvalue);
4326
4327                         systim = systim_next;
4328
4329                         if ((time_delta < E1000_82574_SYSTIM_EPSILON) &&
4330                             (rem == 0))
4331                                 break;
4332                 }
4333         }
4334         return systim;
4335 }
4336
4337 /**
4338  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4339  * @adapter: board private structure to initialize
4340  *
4341  * e1000_sw_init initializes the Adapter private data structure.
4342  * Fields are initialized based on PCI device information and
4343  * OS network device settings (MTU size).
4344  **/
4345 static int e1000_sw_init(struct e1000_adapter *adapter)
4346 {
4347         struct net_device *netdev = adapter->netdev;
4348
4349         adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4350         adapter->rx_ps_bsize0 = 128;
4351         adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4352         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4353         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4354         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4355
4356         spin_lock_init(&adapter->stats64_lock);
4357
4358         e1000e_set_interrupt_capability(adapter);
4359
4360         if (e1000_alloc_queues(adapter))
4361                 return -ENOMEM;
4362
4363         /* Setup hardware time stamping cyclecounter */
4364         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4365                 adapter->cc.read = e1000e_cyclecounter_read;
4366                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4367                 adapter->cc.mult = 1;
4368                 /* cc.shift set in e1000e_get_base_tininca() */
4369
4370                 spin_lock_init(&adapter->systim_lock);
4371                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4372         }
4373
4374         /* Explicitly disable IRQ since the NIC can be in any state. */
4375         e1000_irq_disable(adapter);
4376
4377         set_bit(__E1000_DOWN, &adapter->state);
4378         return 0;
4379 }
4380
4381 /**
4382  * e1000_intr_msi_test - Interrupt Handler
4383  * @irq: interrupt number
4384  * @data: pointer to a network interface device structure
4385  **/
4386 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4387 {
4388         struct net_device *netdev = data;
4389         struct e1000_adapter *adapter = netdev_priv(netdev);
4390         struct e1000_hw *hw = &adapter->hw;
4391         u32 icr = er32(ICR);
4392
4393         e_dbg("icr is %08X\n", icr);
4394         if (icr & E1000_ICR_RXSEQ) {
4395                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4396                 /* Force memory writes to complete before acknowledging the
4397                  * interrupt is handled.
4398                  */
4399                 wmb();
4400         }
4401
4402         return IRQ_HANDLED;
4403 }
4404
4405 /**
4406  * e1000_test_msi_interrupt - Returns 0 for successful test
4407  * @adapter: board private struct
4408  *
4409  * code flow taken from tg3.c
4410  **/
4411 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4412 {
4413         struct net_device *netdev = adapter->netdev;
4414         struct e1000_hw *hw = &adapter->hw;
4415         int err;
4416
4417         /* poll_enable hasn't been called yet, so don't need disable */
4418         /* clear any pending events */
4419         er32(ICR);
4420
4421         /* free the real vector and request a test handler */
4422         e1000_free_irq(adapter);
4423         e1000e_reset_interrupt_capability(adapter);
4424
4425         /* Assume that the test fails, if it succeeds then the test
4426          * MSI irq handler will unset this flag
4427          */
4428         adapter->flags |= FLAG_MSI_TEST_FAILED;
4429
4430         err = pci_enable_msi(adapter->pdev);
4431         if (err)
4432                 goto msi_test_failed;
4433
4434         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4435                           netdev->name, netdev);
4436         if (err) {
4437                 pci_disable_msi(adapter->pdev);
4438                 goto msi_test_failed;
4439         }
4440
4441         /* Force memory writes to complete before enabling and firing an
4442          * interrupt.
4443          */
4444         wmb();
4445
4446         e1000_irq_enable(adapter);
4447
4448         /* fire an unusual interrupt on the test handler */
4449         ew32(ICS, E1000_ICS_RXSEQ);
4450         e1e_flush();
4451         msleep(100);
4452
4453         e1000_irq_disable(adapter);
4454
4455         rmb();                  /* read flags after interrupt has been fired */
4456
4457         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4458                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4459                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4460         } else {
4461                 e_dbg("MSI interrupt test succeeded!\n");
4462         }
4463
4464         free_irq(adapter->pdev->irq, netdev);
4465         pci_disable_msi(adapter->pdev);
4466
4467 msi_test_failed:
4468         e1000e_set_interrupt_capability(adapter);
4469         return e1000_request_irq(adapter);
4470 }
4471
4472 /**
4473  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4474  * @adapter: board private struct
4475  *
4476  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4477  **/
4478 static int e1000_test_msi(struct e1000_adapter *adapter)
4479 {
4480         int err;
4481         u16 pci_cmd;
4482
4483         if (!(adapter->flags & FLAG_MSI_ENABLED))
4484                 return 0;
4485
4486         /* disable SERR in case the MSI write causes a master abort */
4487         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4488         if (pci_cmd & PCI_COMMAND_SERR)
4489                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4490                                       pci_cmd & ~PCI_COMMAND_SERR);
4491
4492         err = e1000_test_msi_interrupt(adapter);
4493
4494         /* re-enable SERR */
4495         if (pci_cmd & PCI_COMMAND_SERR) {
4496                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4497                 pci_cmd |= PCI_COMMAND_SERR;
4498                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4499         }
4500
4501         return err;
4502 }
4503
4504 /**
4505  * e1000_open - Called when a network interface is made active
4506  * @netdev: network interface device structure
4507  *
4508  * Returns 0 on success, negative value on failure
4509  *
4510  * The open entry point is called when a network interface is made
4511  * active by the system (IFF_UP).  At this point all resources needed
4512  * for transmit and receive operations are allocated, the interrupt
4513  * handler is registered with the OS, the watchdog timer is started,
4514  * and the stack is notified that the interface is ready.
4515  **/
4516 static int e1000_open(struct net_device *netdev)
4517 {
4518         struct e1000_adapter *adapter = netdev_priv(netdev);
4519         struct e1000_hw *hw = &adapter->hw;
4520         struct pci_dev *pdev = adapter->pdev;
4521         int err;
4522
4523         /* disallow open during test */
4524         if (test_bit(__E1000_TESTING, &adapter->state))
4525                 return -EBUSY;
4526
4527         pm_runtime_get_sync(&pdev->dev);
4528
4529         netif_carrier_off(netdev);
4530
4531         /* allocate transmit descriptors */
4532         err = e1000e_setup_tx_resources(adapter->tx_ring);
4533         if (err)
4534                 goto err_setup_tx;
4535
4536         /* allocate receive descriptors */
4537         err = e1000e_setup_rx_resources(adapter->rx_ring);
4538         if (err)
4539                 goto err_setup_rx;
4540
4541         /* If AMT is enabled, let the firmware know that the network
4542          * interface is now open and reset the part to a known state.
4543          */
4544         if (adapter->flags & FLAG_HAS_AMT) {
4545                 e1000e_get_hw_control(adapter);
4546                 e1000e_reset(adapter);
4547         }
4548
4549         e1000e_power_up_phy(adapter);
4550
4551         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4552         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4553                 e1000_update_mng_vlan(adapter);
4554
4555         /* DMA latency requirement to workaround jumbo issue */
4556         pm_qos_add_request(&adapter->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4557                            PM_QOS_DEFAULT_VALUE);
4558
4559         /* before we allocate an interrupt, we must be ready to handle it.
4560          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4561          * as soon as we call pci_request_irq, so we have to setup our
4562          * clean_rx handler before we do so.
4563          */
4564         e1000_configure(adapter);
4565
4566         err = e1000_request_irq(adapter);
4567         if (err)
4568                 goto err_req_irq;
4569
4570         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4571          * ignore e1000e MSI messages, which means we need to test our MSI
4572          * interrupt now
4573          */
4574         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4575                 err = e1000_test_msi(adapter);
4576                 if (err) {
4577                         e_err("Interrupt allocation failed\n");
4578                         goto err_req_irq;
4579                 }
4580         }
4581
4582         /* From here on the code is the same as e1000e_up() */
4583         clear_bit(__E1000_DOWN, &adapter->state);
4584
4585         napi_enable(&adapter->napi);
4586
4587         e1000_irq_enable(adapter);
4588
4589         adapter->tx_hang_recheck = false;
4590         netif_start_queue(netdev);
4591
4592         hw->mac.get_link_status = true;
4593         pm_runtime_put(&pdev->dev);
4594
4595         /* fire a link status change interrupt to start the watchdog */
4596         if (adapter->msix_entries)
4597                 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
4598         else
4599                 ew32(ICS, E1000_ICS_LSC);
4600
4601         return 0;
4602
4603 err_req_irq:
4604         pm_qos_remove_request(&adapter->pm_qos_req);
4605         e1000e_release_hw_control(adapter);
4606         e1000_power_down_phy(adapter);
4607         e1000e_free_rx_resources(adapter->rx_ring);
4608 err_setup_rx:
4609         e1000e_free_tx_resources(adapter->tx_ring);
4610 err_setup_tx:
4611         e1000e_reset(adapter);
4612         pm_runtime_put_sync(&pdev->dev);
4613
4614         return err;
4615 }
4616
4617 /**
4618  * e1000_close - Disables a network interface
4619  * @netdev: network interface device structure
4620  *
4621  * Returns 0, this is not allowed to fail
4622  *
4623  * The close entry point is called when an interface is de-activated
4624  * by the OS.  The hardware is still under the drivers control, but
4625  * needs to be disabled.  A global MAC reset is issued to stop the
4626  * hardware, and all transmit and receive resources are freed.
4627  **/
4628 static int e1000_close(struct net_device *netdev)
4629 {
4630         struct e1000_adapter *adapter = netdev_priv(netdev);
4631         struct pci_dev *pdev = adapter->pdev;
4632         int count = E1000_CHECK_RESET_COUNT;
4633
4634         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4635                 usleep_range(10000, 20000);
4636
4637         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4638
4639         pm_runtime_get_sync(&pdev->dev);
4640
4641         if (!test_bit(__E1000_DOWN, &adapter->state)) {
4642                 e1000e_down(adapter, true);
4643                 e1000_free_irq(adapter);
4644
4645                 /* Link status message must follow this format */
4646                 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4647         }
4648
4649         napi_disable(&adapter->napi);
4650
4651         e1000e_free_tx_resources(adapter->tx_ring);
4652         e1000e_free_rx_resources(adapter->rx_ring);
4653
4654         /* kill manageability vlan ID if supported, but not if a vlan with
4655          * the same ID is registered on the host OS (let 8021q kill it)
4656          */
4657         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4658                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4659                                        adapter->mng_vlan_id);
4660
4661         /* If AMT is enabled, let the firmware know that the network
4662          * interface is now closed
4663          */
4664         if ((adapter->flags & FLAG_HAS_AMT) &&
4665             !test_bit(__E1000_TESTING, &adapter->state))
4666                 e1000e_release_hw_control(adapter);
4667
4668         pm_qos_remove_request(&adapter->pm_qos_req);
4669
4670         pm_runtime_put_sync(&pdev->dev);
4671
4672         return 0;
4673 }
4674
4675 /**
4676  * e1000_set_mac - Change the Ethernet Address of the NIC
4677  * @netdev: network interface device structure
4678  * @p: pointer to an address structure
4679  *
4680  * Returns 0 on success, negative on failure
4681  **/
4682 static int e1000_set_mac(struct net_device *netdev, void *p)
4683 {
4684         struct e1000_adapter *adapter = netdev_priv(netdev);
4685         struct e1000_hw *hw = &adapter->hw;
4686         struct sockaddr *addr = p;
4687
4688         if (!is_valid_ether_addr(addr->sa_data))
4689                 return -EADDRNOTAVAIL;
4690
4691         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4692         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4693
4694         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4695
4696         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4697                 /* activate the work around */
4698                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4699
4700                 /* Hold a copy of the LAA in RAR[14] This is done so that
4701                  * between the time RAR[0] gets clobbered  and the time it
4702                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4703                  * of the RARs and no incoming packets directed to this port
4704                  * are dropped. Eventually the LAA will be in RAR[0] and
4705                  * RAR[14]
4706                  */
4707                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4708                                     adapter->hw.mac.rar_entry_count - 1);
4709         }
4710
4711         return 0;
4712 }
4713
4714 /**
4715  * e1000e_update_phy_task - work thread to update phy
4716  * @work: pointer to our work struct
4717  *
4718  * this worker thread exists because we must acquire a
4719  * semaphore to read the phy, which we could msleep while
4720  * waiting for it, and we can't msleep in a timer.
4721  **/
4722 static void e1000e_update_phy_task(struct work_struct *work)
4723 {
4724         struct e1000_adapter *adapter = container_of(work,
4725                                                      struct e1000_adapter,
4726                                                      update_phy_task);
4727         struct e1000_hw *hw = &adapter->hw;
4728
4729         if (test_bit(__E1000_DOWN, &adapter->state))
4730                 return;
4731
4732         e1000_get_phy_info(hw);
4733
4734         /* Enable EEE on 82579 after link up */
4735         if (hw->phy.type >= e1000_phy_82579)
4736                 e1000_set_eee_pchlan(hw);
4737 }
4738
4739 /**
4740  * e1000_update_phy_info - timre call-back to update PHY info
4741  * @data: pointer to adapter cast into an unsigned long
4742  *
4743  * Need to wait a few seconds after link up to get diagnostic information from
4744  * the phy
4745  **/
4746 static void e1000_update_phy_info(unsigned long data)
4747 {
4748         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4749
4750         if (test_bit(__E1000_DOWN, &adapter->state))
4751                 return;
4752
4753         schedule_work(&adapter->update_phy_task);
4754 }
4755
4756 /**
4757  * e1000e_update_phy_stats - Update the PHY statistics counters
4758  * @adapter: board private structure
4759  *
4760  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4761  **/
4762 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4763 {
4764         struct e1000_hw *hw = &adapter->hw;
4765         s32 ret_val;
4766         u16 phy_data;
4767
4768         ret_val = hw->phy.ops.acquire(hw);
4769         if (ret_val)
4770                 return;
4771
4772         /* A page set is expensive so check if already on desired page.
4773          * If not, set to the page with the PHY status registers.
4774          */
4775         hw->phy.addr = 1;
4776         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4777                                            &phy_data);
4778         if (ret_val)
4779                 goto release;
4780         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4781                 ret_val = hw->phy.ops.set_page(hw,
4782                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4783                 if (ret_val)
4784                         goto release;
4785         }
4786
4787         /* Single Collision Count */
4788         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4789         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4790         if (!ret_val)
4791                 adapter->stats.scc += phy_data;
4792
4793         /* Excessive Collision Count */
4794         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4795         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4796         if (!ret_val)
4797                 adapter->stats.ecol += phy_data;
4798
4799         /* Multiple Collision Count */
4800         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4801         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4802         if (!ret_val)
4803                 adapter->stats.mcc += phy_data;
4804
4805         /* Late Collision Count */
4806         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4807         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4808         if (!ret_val)
4809                 adapter->stats.latecol += phy_data;
4810
4811         /* Collision Count - also used for adaptive IFS */
4812         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4813         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4814         if (!ret_val)
4815                 hw->mac.collision_delta = phy_data;
4816
4817         /* Defer Count */
4818         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4819         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4820         if (!ret_val)
4821                 adapter->stats.dc += phy_data;
4822
4823         /* Transmit with no CRS */
4824         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4825         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4826         if (!ret_val)
4827                 adapter->stats.tncrs += phy_data;
4828
4829 release:
4830         hw->phy.ops.release(hw);
4831 }
4832
4833 /**
4834  * e1000e_update_stats - Update the board statistics counters
4835  * @adapter: board private structure
4836  **/
4837 static void e1000e_update_stats(struct e1000_adapter *adapter)
4838 {
4839         struct net_device *netdev = adapter->netdev;
4840         struct e1000_hw *hw = &adapter->hw;
4841         struct pci_dev *pdev = adapter->pdev;
4842
4843         /* Prevent stats update while adapter is being reset, or if the pci
4844          * connection is down.
4845          */
4846         if (adapter->link_speed == 0)
4847                 return;
4848         if (pci_channel_offline(pdev))
4849                 return;
4850
4851         adapter->stats.crcerrs += er32(CRCERRS);
4852         adapter->stats.gprc += er32(GPRC);
4853         adapter->stats.gorc += er32(GORCL);
4854         er32(GORCH);            /* Clear gorc */
4855         adapter->stats.bprc += er32(BPRC);
4856         adapter->stats.mprc += er32(MPRC);
4857         adapter->stats.roc += er32(ROC);
4858
4859         adapter->stats.mpc += er32(MPC);
4860
4861         /* Half-duplex statistics */
4862         if (adapter->link_duplex == HALF_DUPLEX) {
4863                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4864                         e1000e_update_phy_stats(adapter);
4865                 } else {
4866                         adapter->stats.scc += er32(SCC);
4867                         adapter->stats.ecol += er32(ECOL);
4868                         adapter->stats.mcc += er32(MCC);
4869                         adapter->stats.latecol += er32(LATECOL);
4870                         adapter->stats.dc += er32(DC);
4871
4872                         hw->mac.collision_delta = er32(COLC);
4873
4874                         if ((hw->mac.type != e1000_82574) &&
4875                             (hw->mac.type != e1000_82583))
4876                                 adapter->stats.tncrs += er32(TNCRS);
4877                 }
4878                 adapter->stats.colc += hw->mac.collision_delta;
4879         }
4880
4881         adapter->stats.xonrxc += er32(XONRXC);
4882         adapter->stats.xontxc += er32(XONTXC);
4883         adapter->stats.xoffrxc += er32(XOFFRXC);
4884         adapter->stats.xofftxc += er32(XOFFTXC);
4885         adapter->stats.gptc += er32(GPTC);
4886         adapter->stats.gotc += er32(GOTCL);
4887         er32(GOTCH);            /* Clear gotc */
4888         adapter->stats.rnbc += er32(RNBC);
4889         adapter->stats.ruc += er32(RUC);
4890
4891         adapter->stats.mptc += er32(MPTC);
4892         adapter->stats.bptc += er32(BPTC);
4893
4894         /* used for adaptive IFS */
4895
4896         hw->mac.tx_packet_delta = er32(TPT);
4897         adapter->stats.tpt += hw->mac.tx_packet_delta;
4898
4899         adapter->stats.algnerrc += er32(ALGNERRC);
4900         adapter->stats.rxerrc += er32(RXERRC);
4901         adapter->stats.cexterr += er32(CEXTERR);
4902         adapter->stats.tsctc += er32(TSCTC);
4903         adapter->stats.tsctfc += er32(TSCTFC);
4904
4905         /* Fill out the OS statistics structure */
4906         netdev->stats.multicast = adapter->stats.mprc;
4907         netdev->stats.collisions = adapter->stats.colc;
4908
4909         /* Rx Errors */
4910
4911         /* RLEC on some newer hardware can be incorrect so build
4912          * our own version based on RUC and ROC
4913          */
4914         netdev->stats.rx_errors = adapter->stats.rxerrc +
4915             adapter->stats.crcerrs + adapter->stats.algnerrc +
4916             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4917         netdev->stats.rx_length_errors = adapter->stats.ruc +
4918             adapter->stats.roc;
4919         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4920         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4921         netdev->stats.rx_missed_errors = adapter->stats.mpc;
4922
4923         /* Tx Errors */
4924         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4925         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4926         netdev->stats.tx_window_errors = adapter->stats.latecol;
4927         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4928
4929         /* Tx Dropped needs to be maintained elsewhere */
4930
4931         /* Management Stats */
4932         adapter->stats.mgptc += er32(MGTPTC);
4933         adapter->stats.mgprc += er32(MGTPRC);
4934         adapter->stats.mgpdc += er32(MGTPDC);
4935
4936         /* Correctable ECC Errors */
4937         if ((hw->mac.type == e1000_pch_lpt) ||
4938             (hw->mac.type == e1000_pch_spt)) {
4939                 u32 pbeccsts = er32(PBECCSTS);
4940
4941                 adapter->corr_errors +=
4942                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
4943                 adapter->uncorr_errors +=
4944                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
4945                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
4946         }
4947 }
4948
4949 /**
4950  * e1000_phy_read_status - Update the PHY register status snapshot
4951  * @adapter: board private structure
4952  **/
4953 static void e1000_phy_read_status(struct e1000_adapter *adapter)
4954 {
4955         struct e1000_hw *hw = &adapter->hw;
4956         struct e1000_phy_regs *phy = &adapter->phy_regs;
4957
4958         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
4959             (er32(STATUS) & E1000_STATUS_LU) &&
4960             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4961                 int ret_val;
4962
4963                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
4964                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
4965                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
4966                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
4967                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
4968                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
4969                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
4970                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
4971                 if (ret_val)
4972                         e_warn("Error reading PHY register\n");
4973         } else {
4974                 /* Do not read PHY registers if link is not up
4975                  * Set values to typical power-on defaults
4976                  */
4977                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4978                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4979                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4980                              BMSR_ERCAP);
4981                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4982                                   ADVERTISE_ALL | ADVERTISE_CSMA);
4983                 phy->lpa = 0;
4984                 phy->expansion = EXPANSION_ENABLENPAGE;
4985                 phy->ctrl1000 = ADVERTISE_1000FULL;
4986                 phy->stat1000 = 0;
4987                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4988         }
4989 }
4990
4991 static void e1000_print_link_info(struct e1000_adapter *adapter)
4992 {
4993         struct e1000_hw *hw = &adapter->hw;
4994         u32 ctrl = er32(CTRL);
4995
4996         /* Link status message must follow this format for user tools */
4997         pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4998                 adapter->netdev->name, adapter->link_speed,
4999                 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5000                 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5001                 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5002                 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5003 }
5004
5005 static bool e1000e_has_link(struct e1000_adapter *adapter)
5006 {
5007         struct e1000_hw *hw = &adapter->hw;
5008         bool link_active = false;
5009         s32 ret_val = 0;
5010
5011         /* get_link_status is set on LSC (link status) interrupt or
5012          * Rx sequence error interrupt.  get_link_status will stay
5013          * false until the check_for_link establishes link
5014          * for copper adapters ONLY
5015          */
5016         switch (hw->phy.media_type) {
5017         case e1000_media_type_copper:
5018                 if (hw->mac.get_link_status) {
5019                         ret_val = hw->mac.ops.check_for_link(hw);
5020                         link_active = !hw->mac.get_link_status;
5021                 } else {
5022                         link_active = true;
5023                 }
5024                 break;
5025         case e1000_media_type_fiber:
5026                 ret_val = hw->mac.ops.check_for_link(hw);
5027                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5028                 break;
5029         case e1000_media_type_internal_serdes:
5030                 ret_val = hw->mac.ops.check_for_link(hw);
5031                 link_active = adapter->hw.mac.serdes_has_link;
5032                 break;
5033         default:
5034         case e1000_media_type_unknown:
5035                 break;
5036         }
5037
5038         if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5039             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5040                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5041                 e_info("Gigabit has been disabled, downgrading speed\n");
5042         }
5043
5044         return link_active;
5045 }
5046
5047 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5048 {
5049         /* make sure the receive unit is started */
5050         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5051             (adapter->flags & FLAG_RESTART_NOW)) {
5052                 struct e1000_hw *hw = &adapter->hw;
5053                 u32 rctl = er32(RCTL);
5054
5055                 ew32(RCTL, rctl | E1000_RCTL_EN);
5056                 adapter->flags &= ~FLAG_RESTART_NOW;
5057         }
5058 }
5059
5060 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5061 {
5062         struct e1000_hw *hw = &adapter->hw;
5063
5064         /* With 82574 controllers, PHY needs to be checked periodically
5065          * for hung state and reset, if two calls return true
5066          */
5067         if (e1000_check_phy_82574(hw))
5068                 adapter->phy_hang_count++;
5069         else
5070                 adapter->phy_hang_count = 0;
5071
5072         if (adapter->phy_hang_count > 1) {
5073                 adapter->phy_hang_count = 0;
5074                 e_dbg("PHY appears hung - resetting\n");
5075                 schedule_work(&adapter->reset_task);
5076         }
5077 }
5078
5079 /**
5080  * e1000_watchdog - Timer Call-back
5081  * @data: pointer to adapter cast into an unsigned long
5082  **/
5083 static void e1000_watchdog(unsigned long data)
5084 {
5085         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
5086
5087         /* Do the rest outside of interrupt context */
5088         schedule_work(&adapter->watchdog_task);
5089
5090         /* TODO: make this use queue_delayed_work() */
5091 }
5092
5093 static void e1000_watchdog_task(struct work_struct *work)
5094 {
5095         struct e1000_adapter *adapter = container_of(work,
5096                                                      struct e1000_adapter,
5097                                                      watchdog_task);
5098         struct net_device *netdev = adapter->netdev;
5099         struct e1000_mac_info *mac = &adapter->hw.mac;
5100         struct e1000_phy_info *phy = &adapter->hw.phy;
5101         struct e1000_ring *tx_ring = adapter->tx_ring;
5102         struct e1000_hw *hw = &adapter->hw;
5103         u32 link, tctl;
5104
5105         if (test_bit(__E1000_DOWN, &adapter->state))
5106                 return;
5107
5108         link = e1000e_has_link(adapter);
5109         if ((netif_carrier_ok(netdev)) && link) {
5110                 /* Cancel scheduled suspend requests. */
5111                 pm_runtime_resume(netdev->dev.parent);
5112
5113                 e1000e_enable_receives(adapter);
5114                 goto link_up;
5115         }
5116
5117         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5118             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5119                 e1000_update_mng_vlan(adapter);
5120
5121         if (link) {
5122                 if (!netif_carrier_ok(netdev)) {
5123                         bool txb2b = true;
5124
5125                         /* Cancel scheduled suspend requests. */
5126                         pm_runtime_resume(netdev->dev.parent);
5127
5128                         /* update snapshot of PHY registers on LSC */
5129                         e1000_phy_read_status(adapter);
5130                         mac->ops.get_link_up_info(&adapter->hw,
5131                                                   &adapter->link_speed,
5132                                                   &adapter->link_duplex);
5133                         e1000_print_link_info(adapter);
5134
5135                         /* check if SmartSpeed worked */
5136                         e1000e_check_downshift(hw);
5137                         if (phy->speed_downgraded)
5138                                 netdev_warn(netdev,
5139                                             "Link Speed was downgraded by SmartSpeed\n");
5140
5141                         /* On supported PHYs, check for duplex mismatch only
5142                          * if link has autonegotiated at 10/100 half
5143                          */
5144                         if ((hw->phy.type == e1000_phy_igp_3 ||
5145                              hw->phy.type == e1000_phy_bm) &&
5146                             hw->mac.autoneg &&
5147                             (adapter->link_speed == SPEED_10 ||
5148                              adapter->link_speed == SPEED_100) &&
5149                             (adapter->link_duplex == HALF_DUPLEX)) {
5150                                 u16 autoneg_exp;
5151
5152                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5153
5154                                 if (!(autoneg_exp & EXPANSION_NWAY))
5155                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5156                         }
5157
5158                         /* adjust timeout factor according to speed/duplex */
5159                         adapter->tx_timeout_factor = 1;
5160                         switch (adapter->link_speed) {
5161                         case SPEED_10:
5162                                 txb2b = false;
5163                                 adapter->tx_timeout_factor = 16;
5164                                 break;
5165                         case SPEED_100:
5166                                 txb2b = false;
5167                                 adapter->tx_timeout_factor = 10;
5168                                 break;
5169                         }
5170
5171                         /* workaround: re-program speed mode bit after
5172                          * link-up event
5173                          */
5174                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5175                             !txb2b) {
5176                                 u32 tarc0;
5177
5178                                 tarc0 = er32(TARC(0));
5179                                 tarc0 &= ~SPEED_MODE_BIT;
5180                                 ew32(TARC(0), tarc0);
5181                         }
5182
5183                         /* disable TSO for pcie and 10/100 speeds, to avoid
5184                          * some hardware issues
5185                          */
5186                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
5187                                 switch (adapter->link_speed) {
5188                                 case SPEED_10:
5189                                 case SPEED_100:
5190                                         e_info("10/100 speed: disabling TSO\n");
5191                                         netdev->features &= ~NETIF_F_TSO;
5192                                         netdev->features &= ~NETIF_F_TSO6;
5193                                         break;
5194                                 case SPEED_1000:
5195                                         netdev->features |= NETIF_F_TSO;
5196                                         netdev->features |= NETIF_F_TSO6;
5197                                         break;
5198                                 default:
5199                                         /* oops */
5200                                         break;
5201                                 }
5202                         }
5203
5204                         /* enable transmits in the hardware, need to do this
5205                          * after setting TARC(0)
5206                          */
5207                         tctl = er32(TCTL);
5208                         tctl |= E1000_TCTL_EN;
5209                         ew32(TCTL, tctl);
5210
5211                         /* Perform any post-link-up configuration before
5212                          * reporting link up.
5213                          */
5214                         if (phy->ops.cfg_on_link_up)
5215                                 phy->ops.cfg_on_link_up(hw);
5216
5217                         netif_carrier_on(netdev);
5218
5219                         if (!test_bit(__E1000_DOWN, &adapter->state))
5220                                 mod_timer(&adapter->phy_info_timer,
5221                                           round_jiffies(jiffies + 2 * HZ));
5222                 }
5223         } else {
5224                 if (netif_carrier_ok(netdev)) {
5225                         adapter->link_speed = 0;
5226                         adapter->link_duplex = 0;
5227                         /* Link status message must follow this format */
5228                         pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5229                         netif_carrier_off(netdev);
5230                         if (!test_bit(__E1000_DOWN, &adapter->state))
5231                                 mod_timer(&adapter->phy_info_timer,
5232                                           round_jiffies(jiffies + 2 * HZ));
5233
5234                         /* 8000ES2LAN requires a Rx packet buffer work-around
5235                          * on link down event; reset the controller to flush
5236                          * the Rx packet buffer.
5237                          */
5238                         if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5239                                 adapter->flags |= FLAG_RESTART_NOW;
5240                         else
5241                                 pm_schedule_suspend(netdev->dev.parent,
5242                                                     LINK_TIMEOUT);
5243                 }
5244         }
5245
5246 link_up:
5247         spin_lock(&adapter->stats64_lock);
5248         e1000e_update_stats(adapter);
5249
5250         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5251         adapter->tpt_old = adapter->stats.tpt;
5252         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5253         adapter->colc_old = adapter->stats.colc;
5254
5255         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5256         adapter->gorc_old = adapter->stats.gorc;
5257         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5258         adapter->gotc_old = adapter->stats.gotc;
5259         spin_unlock(&adapter->stats64_lock);
5260
5261         /* If the link is lost the controller stops DMA, but
5262          * if there is queued Tx work it cannot be done.  So
5263          * reset the controller to flush the Tx packet buffers.
5264          */
5265         if (!netif_carrier_ok(netdev) &&
5266             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5267                 adapter->flags |= FLAG_RESTART_NOW;
5268
5269         /* If reset is necessary, do it outside of interrupt context. */
5270         if (adapter->flags & FLAG_RESTART_NOW) {
5271                 schedule_work(&adapter->reset_task);
5272                 /* return immediately since reset is imminent */
5273                 return;
5274         }
5275
5276         e1000e_update_adaptive(&adapter->hw);
5277
5278         /* Simple mode for Interrupt Throttle Rate (ITR) */
5279         if (adapter->itr_setting == 4) {
5280                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5281                  * Total asymmetrical Tx or Rx gets ITR=8000;
5282                  * everyone else is between 2000-8000.
5283                  */
5284                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5285                 u32 dif = (adapter->gotc > adapter->gorc ?
5286                            adapter->gotc - adapter->gorc :
5287                            adapter->gorc - adapter->gotc) / 10000;
5288                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5289
5290                 e1000e_write_itr(adapter, itr);
5291         }
5292
5293         /* Cause software interrupt to ensure Rx ring is cleaned */
5294         if (adapter->msix_entries)
5295                 ew32(ICS, adapter->rx_ring->ims_val);
5296         else
5297                 ew32(ICS, E1000_ICS_RXDMT0);
5298
5299         /* flush pending descriptors to memory before detecting Tx hang */
5300         e1000e_flush_descriptors(adapter);
5301
5302         /* Force detection of hung controller every watchdog period */
5303         adapter->detect_tx_hung = true;
5304
5305         /* With 82571 controllers, LAA may be overwritten due to controller
5306          * reset from the other port. Set the appropriate LAA in RAR[0]
5307          */
5308         if (e1000e_get_laa_state_82571(hw))
5309                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5310
5311         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5312                 e1000e_check_82574_phy_workaround(adapter);
5313
5314         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5315         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5316                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5317                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5318                         er32(RXSTMPH);
5319                         adapter->rx_hwtstamp_cleared++;
5320                 } else {
5321                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5322                 }
5323         }
5324
5325         /* Reset the timer */
5326         if (!test_bit(__E1000_DOWN, &adapter->state))
5327                 mod_timer(&adapter->watchdog_timer,
5328                           round_jiffies(jiffies + 2 * HZ));
5329 }
5330
5331 #define E1000_TX_FLAGS_CSUM             0x00000001
5332 #define E1000_TX_FLAGS_VLAN             0x00000002
5333 #define E1000_TX_FLAGS_TSO              0x00000004
5334 #define E1000_TX_FLAGS_IPV4             0x00000008
5335 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5336 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5337 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5338 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5339
5340 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5341                      __be16 protocol)
5342 {
5343         struct e1000_context_desc *context_desc;
5344         struct e1000_buffer *buffer_info;
5345         unsigned int i;
5346         u32 cmd_length = 0;
5347         u16 ipcse = 0, mss;
5348         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5349         int err;
5350
5351         if (!skb_is_gso(skb))
5352                 return 0;
5353
5354         err = skb_cow_head(skb, 0);
5355         if (err < 0)
5356                 return err;
5357
5358         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5359         mss = skb_shinfo(skb)->gso_size;
5360         if (protocol == htons(ETH_P_IP)) {
5361                 struct iphdr *iph = ip_hdr(skb);
5362                 iph->tot_len = 0;
5363                 iph->check = 0;
5364                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5365                                                          0, IPPROTO_TCP, 0);
5366                 cmd_length = E1000_TXD_CMD_IP;
5367                 ipcse = skb_transport_offset(skb) - 1;
5368         } else if (skb_is_gso_v6(skb)) {
5369                 ipv6_hdr(skb)->payload_len = 0;
5370                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5371                                                        &ipv6_hdr(skb)->daddr,
5372                                                        0, IPPROTO_TCP, 0);
5373                 ipcse = 0;
5374         }
5375         ipcss = skb_network_offset(skb);
5376         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5377         tucss = skb_transport_offset(skb);
5378         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5379
5380         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5381                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5382
5383         i = tx_ring->next_to_use;
5384         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5385         buffer_info = &tx_ring->buffer_info[i];
5386
5387         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5388         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5389         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5390         context_desc->upper_setup.tcp_fields.tucss = tucss;
5391         context_desc->upper_setup.tcp_fields.tucso = tucso;
5392         context_desc->upper_setup.tcp_fields.tucse = 0;
5393         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5394         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5395         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5396
5397         buffer_info->time_stamp = jiffies;
5398         buffer_info->next_to_watch = i;
5399
5400         i++;
5401         if (i == tx_ring->count)
5402                 i = 0;
5403         tx_ring->next_to_use = i;
5404
5405         return 1;
5406 }
5407
5408 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5409                           __be16 protocol)
5410 {
5411         struct e1000_adapter *adapter = tx_ring->adapter;
5412         struct e1000_context_desc *context_desc;
5413         struct e1000_buffer *buffer_info;
5414         unsigned int i;
5415         u8 css;
5416         u32 cmd_len = E1000_TXD_CMD_DEXT;
5417
5418         if (skb->ip_summed != CHECKSUM_PARTIAL)
5419                 return false;
5420
5421         switch (protocol) {
5422         case cpu_to_be16(ETH_P_IP):
5423                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5424                         cmd_len |= E1000_TXD_CMD_TCP;
5425                 break;
5426         case cpu_to_be16(ETH_P_IPV6):
5427                 /* XXX not handling all IPV6 headers */
5428                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5429                         cmd_len |= E1000_TXD_CMD_TCP;
5430                 break;
5431         default:
5432                 if (unlikely(net_ratelimit()))
5433                         e_warn("checksum_partial proto=%x!\n",
5434                                be16_to_cpu(protocol));
5435                 break;
5436         }
5437
5438         css = skb_checksum_start_offset(skb);
5439
5440         i = tx_ring->next_to_use;
5441         buffer_info = &tx_ring->buffer_info[i];
5442         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5443
5444         context_desc->lower_setup.ip_config = 0;
5445         context_desc->upper_setup.tcp_fields.tucss = css;
5446         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5447         context_desc->upper_setup.tcp_fields.tucse = 0;
5448         context_desc->tcp_seg_setup.data = 0;
5449         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5450
5451         buffer_info->time_stamp = jiffies;
5452         buffer_info->next_to_watch = i;
5453
5454         i++;
5455         if (i == tx_ring->count)
5456                 i = 0;
5457         tx_ring->next_to_use = i;
5458
5459         return true;
5460 }
5461
5462 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5463                         unsigned int first, unsigned int max_per_txd,
5464                         unsigned int nr_frags)
5465 {
5466         struct e1000_adapter *adapter = tx_ring->adapter;
5467         struct pci_dev *pdev = adapter->pdev;
5468         struct e1000_buffer *buffer_info;
5469         unsigned int len = skb_headlen(skb);
5470         unsigned int offset = 0, size, count = 0, i;
5471         unsigned int f, bytecount, segs;
5472
5473         i = tx_ring->next_to_use;
5474
5475         while (len) {
5476                 buffer_info = &tx_ring->buffer_info[i];
5477                 size = min(len, max_per_txd);
5478
5479                 buffer_info->length = size;
5480                 buffer_info->time_stamp = jiffies;
5481                 buffer_info->next_to_watch = i;
5482                 buffer_info->dma = dma_map_single(&pdev->dev,
5483                                                   skb->data + offset,
5484                                                   size, DMA_TO_DEVICE);
5485                 buffer_info->mapped_as_page = false;
5486                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5487                         goto dma_error;
5488
5489                 len -= size;
5490                 offset += size;
5491                 count++;
5492
5493                 if (len) {
5494                         i++;
5495                         if (i == tx_ring->count)
5496                                 i = 0;
5497                 }
5498         }
5499
5500         for (f = 0; f < nr_frags; f++) {
5501                 const struct skb_frag_struct *frag;
5502
5503                 frag = &skb_shinfo(skb)->frags[f];
5504                 len = skb_frag_size(frag);
5505                 offset = 0;
5506
5507                 while (len) {
5508                         i++;
5509                         if (i == tx_ring->count)
5510                                 i = 0;
5511
5512                         buffer_info = &tx_ring->buffer_info[i];
5513                         size = min(len, max_per_txd);
5514
5515                         buffer_info->length = size;
5516                         buffer_info->time_stamp = jiffies;
5517                         buffer_info->next_to_watch = i;
5518                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5519                                                             offset, size,
5520                                                             DMA_TO_DEVICE);
5521                         buffer_info->mapped_as_page = true;
5522                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5523                                 goto dma_error;
5524
5525                         len -= size;
5526                         offset += size;
5527                         count++;
5528                 }
5529         }
5530
5531         segs = skb_shinfo(skb)->gso_segs ? : 1;
5532         /* multiply data chunks by size of headers */
5533         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5534
5535         tx_ring->buffer_info[i].skb = skb;
5536         tx_ring->buffer_info[i].segs = segs;
5537         tx_ring->buffer_info[i].bytecount = bytecount;
5538         tx_ring->buffer_info[first].next_to_watch = i;
5539
5540         return count;
5541
5542 dma_error:
5543         dev_err(&pdev->dev, "Tx DMA map failed\n");
5544         buffer_info->dma = 0;
5545         if (count)
5546                 count--;
5547
5548         while (count--) {
5549                 if (i == 0)
5550                         i += tx_ring->count;
5551                 i--;
5552                 buffer_info = &tx_ring->buffer_info[i];
5553                 e1000_put_txbuf(tx_ring, buffer_info);
5554         }
5555
5556         return 0;
5557 }
5558
5559 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5560 {
5561         struct e1000_adapter *adapter = tx_ring->adapter;
5562         struct e1000_tx_desc *tx_desc = NULL;
5563         struct e1000_buffer *buffer_info;
5564         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5565         unsigned int i;
5566
5567         if (tx_flags & E1000_TX_FLAGS_TSO) {
5568                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5569                     E1000_TXD_CMD_TSE;
5570                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5571
5572                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5573                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5574         }
5575
5576         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5577                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5578                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5579         }
5580
5581         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5582                 txd_lower |= E1000_TXD_CMD_VLE;
5583                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5584         }
5585
5586         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5587                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5588
5589         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5590                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5591                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5592         }
5593
5594         i = tx_ring->next_to_use;
5595
5596         do {
5597                 buffer_info = &tx_ring->buffer_info[i];
5598                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5599                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5600                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5601                                                   buffer_info->length);
5602                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5603
5604                 i++;
5605                 if (i == tx_ring->count)
5606                         i = 0;
5607         } while (--count > 0);
5608
5609         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5610
5611         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5612         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5613                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5614
5615         /* Force memory writes to complete before letting h/w
5616          * know there are new descriptors to fetch.  (Only
5617          * applicable for weak-ordered memory model archs,
5618          * such as IA-64).
5619          */
5620         wmb();
5621
5622         tx_ring->next_to_use = i;
5623 }
5624
5625 #define MINIMUM_DHCP_PACKET_SIZE 282
5626 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5627                                     struct sk_buff *skb)
5628 {
5629         struct e1000_hw *hw = &adapter->hw;
5630         u16 length, offset;
5631
5632         if (skb_vlan_tag_present(skb) &&
5633             !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5634               (adapter->hw.mng_cookie.status &
5635                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5636                 return 0;
5637
5638         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5639                 return 0;
5640
5641         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5642                 return 0;
5643
5644         {
5645                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5646                 struct udphdr *udp;
5647
5648                 if (ip->protocol != IPPROTO_UDP)
5649                         return 0;
5650
5651                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5652                 if (ntohs(udp->dest) != 67)
5653                         return 0;
5654
5655                 offset = (u8 *)udp + 8 - skb->data;
5656                 length = skb->len - offset;
5657                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5658         }
5659
5660         return 0;
5661 }
5662
5663 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5664 {
5665         struct e1000_adapter *adapter = tx_ring->adapter;
5666
5667         netif_stop_queue(adapter->netdev);
5668         /* Herbert's original patch had:
5669          *  smp_mb__after_netif_stop_queue();
5670          * but since that doesn't exist yet, just open code it.
5671          */
5672         smp_mb();
5673
5674         /* We need to check again in a case another CPU has just
5675          * made room available.
5676          */
5677         if (e1000_desc_unused(tx_ring) < size)
5678                 return -EBUSY;
5679
5680         /* A reprieve! */
5681         netif_start_queue(adapter->netdev);
5682         ++adapter->restart_queue;
5683         return 0;
5684 }
5685
5686 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5687 {
5688         BUG_ON(size > tx_ring->count);
5689
5690         if (e1000_desc_unused(tx_ring) >= size)
5691                 return 0;
5692         return __e1000_maybe_stop_tx(tx_ring, size);
5693 }
5694
5695 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5696                                     struct net_device *netdev)
5697 {
5698         struct e1000_adapter *adapter = netdev_priv(netdev);
5699         struct e1000_ring *tx_ring = adapter->tx_ring;
5700         unsigned int first;
5701         unsigned int tx_flags = 0;
5702         unsigned int len = skb_headlen(skb);
5703         unsigned int nr_frags;
5704         unsigned int mss;
5705         int count = 0;
5706         int tso;
5707         unsigned int f;
5708         __be16 protocol = vlan_get_protocol(skb);
5709
5710         if (test_bit(__E1000_DOWN, &adapter->state)) {
5711                 dev_kfree_skb_any(skb);
5712                 return NETDEV_TX_OK;
5713         }
5714
5715         if (skb->len <= 0) {
5716                 dev_kfree_skb_any(skb);
5717                 return NETDEV_TX_OK;
5718         }
5719
5720         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5721          * pad skb in order to meet this minimum size requirement
5722          */
5723         if (skb_put_padto(skb, 17))
5724                 return NETDEV_TX_OK;
5725
5726         mss = skb_shinfo(skb)->gso_size;
5727         if (mss) {
5728                 u8 hdr_len;
5729
5730                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5731                  * points to just header, pull a few bytes of payload from
5732                  * frags into skb->data
5733                  */
5734                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5735                 /* we do this workaround for ES2LAN, but it is un-necessary,
5736                  * avoiding it could save a lot of cycles
5737                  */
5738                 if (skb->data_len && (hdr_len == len)) {
5739                         unsigned int pull_size;
5740
5741                         pull_size = min_t(unsigned int, 4, skb->data_len);
5742                         if (!__pskb_pull_tail(skb, pull_size)) {
5743                                 e_err("__pskb_pull_tail failed.\n");
5744                                 dev_kfree_skb_any(skb);
5745                                 return NETDEV_TX_OK;
5746                         }
5747                         len = skb_headlen(skb);
5748                 }
5749         }
5750
5751         /* reserve a descriptor for the offload context */
5752         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5753                 count++;
5754         count++;
5755
5756         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5757
5758         nr_frags = skb_shinfo(skb)->nr_frags;
5759         for (f = 0; f < nr_frags; f++)
5760                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5761                                       adapter->tx_fifo_limit);
5762
5763         if (adapter->hw.mac.tx_pkt_filtering)
5764                 e1000_transfer_dhcp_info(adapter, skb);
5765
5766         /* need: count + 2 desc gap to keep tail from touching
5767          * head, otherwise try next time
5768          */
5769         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5770                 return NETDEV_TX_BUSY;
5771
5772         if (skb_vlan_tag_present(skb)) {
5773                 tx_flags |= E1000_TX_FLAGS_VLAN;
5774                 tx_flags |= (skb_vlan_tag_get(skb) <<
5775                              E1000_TX_FLAGS_VLAN_SHIFT);
5776         }
5777
5778         first = tx_ring->next_to_use;
5779
5780         tso = e1000_tso(tx_ring, skb, protocol);
5781         if (tso < 0) {
5782                 dev_kfree_skb_any(skb);
5783                 return NETDEV_TX_OK;
5784         }
5785
5786         if (tso)
5787                 tx_flags |= E1000_TX_FLAGS_TSO;
5788         else if (e1000_tx_csum(tx_ring, skb, protocol))
5789                 tx_flags |= E1000_TX_FLAGS_CSUM;
5790
5791         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5792          * 82571 hardware supports TSO capabilities for IPv6 as well...
5793          * no longer assume, we must.
5794          */
5795         if (protocol == htons(ETH_P_IP))
5796                 tx_flags |= E1000_TX_FLAGS_IPV4;
5797
5798         if (unlikely(skb->no_fcs))
5799                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5800
5801         /* if count is 0 then mapping error has occurred */
5802         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5803                              nr_frags);
5804         if (count) {
5805                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5806                     (adapter->flags & FLAG_HAS_HW_TIMESTAMP) &&
5807                     !adapter->tx_hwtstamp_skb) {
5808                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5809                         tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5810                         adapter->tx_hwtstamp_skb = skb_get(skb);
5811                         adapter->tx_hwtstamp_start = jiffies;
5812                         schedule_work(&adapter->tx_hwtstamp_work);
5813                 } else {
5814                         skb_tx_timestamp(skb);
5815                 }
5816
5817                 netdev_sent_queue(netdev, skb->len);
5818                 e1000_tx_queue(tx_ring, tx_flags, count);
5819                 /* Make sure there is space in the ring for the next send. */
5820                 e1000_maybe_stop_tx(tx_ring,
5821                                     (MAX_SKB_FRAGS *
5822                                      DIV_ROUND_UP(PAGE_SIZE,
5823                                                   adapter->tx_fifo_limit) + 2));
5824
5825                 if (!skb->xmit_more ||
5826                     netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5827                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5828                                 e1000e_update_tdt_wa(tx_ring,
5829                                                      tx_ring->next_to_use);
5830                         else
5831                                 writel(tx_ring->next_to_use, tx_ring->tail);
5832
5833                         /* we need this if more than one processor can write
5834                          * to our tail at a time, it synchronizes IO on
5835                          *IA64/Altix systems
5836                          */
5837                         mmiowb();
5838                 }
5839         } else {
5840                 dev_kfree_skb_any(skb);
5841                 tx_ring->buffer_info[first].time_stamp = 0;
5842                 tx_ring->next_to_use = first;
5843         }
5844
5845         return NETDEV_TX_OK;
5846 }
5847
5848 /**
5849  * e1000_tx_timeout - Respond to a Tx Hang
5850  * @netdev: network interface device structure
5851  **/
5852 static void e1000_tx_timeout(struct net_device *netdev)
5853 {
5854         struct e1000_adapter *adapter = netdev_priv(netdev);
5855
5856         /* Do the reset outside of interrupt context */
5857         adapter->tx_timeout_count++;
5858         schedule_work(&adapter->reset_task);
5859 }
5860
5861 static void e1000_reset_task(struct work_struct *work)
5862 {
5863         struct e1000_adapter *adapter;
5864         adapter = container_of(work, struct e1000_adapter, reset_task);
5865
5866         /* don't run the task if already down */
5867         if (test_bit(__E1000_DOWN, &adapter->state))
5868                 return;
5869
5870         if (!(adapter->flags & FLAG_RESTART_NOW)) {
5871                 e1000e_dump(adapter);
5872                 e_err("Reset adapter unexpectedly\n");
5873         }
5874         e1000e_reinit_locked(adapter);
5875 }
5876
5877 /**
5878  * e1000_get_stats64 - Get System Network Statistics
5879  * @netdev: network interface device structure
5880  * @stats: rtnl_link_stats64 pointer
5881  *
5882  * Returns the address of the device statistics structure.
5883  **/
5884 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5885                                              struct rtnl_link_stats64 *stats)
5886 {
5887         struct e1000_adapter *adapter = netdev_priv(netdev);
5888
5889         memset(stats, 0, sizeof(struct rtnl_link_stats64));
5890         spin_lock(&adapter->stats64_lock);
5891         e1000e_update_stats(adapter);
5892         /* Fill out the OS statistics structure */
5893         stats->rx_bytes = adapter->stats.gorc;
5894         stats->rx_packets = adapter->stats.gprc;
5895         stats->tx_bytes = adapter->stats.gotc;
5896         stats->tx_packets = adapter->stats.gptc;
5897         stats->multicast = adapter->stats.mprc;
5898         stats->collisions = adapter->stats.colc;
5899
5900         /* Rx Errors */
5901
5902         /* RLEC on some newer hardware can be incorrect so build
5903          * our own version based on RUC and ROC
5904          */
5905         stats->rx_errors = adapter->stats.rxerrc +
5906             adapter->stats.crcerrs + adapter->stats.algnerrc +
5907             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5908         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5909         stats->rx_crc_errors = adapter->stats.crcerrs;
5910         stats->rx_frame_errors = adapter->stats.algnerrc;
5911         stats->rx_missed_errors = adapter->stats.mpc;
5912
5913         /* Tx Errors */
5914         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5915         stats->tx_aborted_errors = adapter->stats.ecol;
5916         stats->tx_window_errors = adapter->stats.latecol;
5917         stats->tx_carrier_errors = adapter->stats.tncrs;
5918
5919         /* Tx Dropped needs to be maintained elsewhere */
5920
5921         spin_unlock(&adapter->stats64_lock);
5922         return stats;
5923 }
5924
5925 /**
5926  * e1000_change_mtu - Change the Maximum Transfer Unit
5927  * @netdev: network interface device structure
5928  * @new_mtu: new value for maximum frame size
5929  *
5930  * Returns 0 on success, negative on failure
5931  **/
5932 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5933 {
5934         struct e1000_adapter *adapter = netdev_priv(netdev);
5935         int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
5936
5937         /* Jumbo frame support */
5938         if ((max_frame > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) &&
5939             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5940                 e_err("Jumbo Frames not supported.\n");
5941                 return -EINVAL;
5942         }
5943
5944         /* Supported frame sizes */
5945         if ((new_mtu < (VLAN_ETH_ZLEN + ETH_FCS_LEN)) ||
5946             (max_frame > adapter->max_hw_frame_size)) {
5947                 e_err("Unsupported MTU setting\n");
5948                 return -EINVAL;
5949         }
5950
5951         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
5952         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
5953             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5954             (new_mtu > ETH_DATA_LEN)) {
5955                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
5956                 return -EINVAL;
5957         }
5958
5959         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5960                 usleep_range(1000, 2000);
5961         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5962         adapter->max_frame_size = max_frame;
5963         e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5964         netdev->mtu = new_mtu;
5965
5966         pm_runtime_get_sync(netdev->dev.parent);
5967
5968         if (netif_running(netdev))
5969                 e1000e_down(adapter, true);
5970
5971         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5972          * means we reserve 2 more, this pushes us to allocate from the next
5973          * larger slab size.
5974          * i.e. RXBUFFER_2048 --> size-4096 slab
5975          * However with the new *_jumbo_rx* routines, jumbo receives will use
5976          * fragmented skbs
5977          */
5978
5979         if (max_frame <= 2048)
5980                 adapter->rx_buffer_len = 2048;
5981         else
5982                 adapter->rx_buffer_len = 4096;
5983
5984         /* adjust allocation if LPE protects us, and we aren't using SBP */
5985         if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
5986                 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
5987
5988         if (netif_running(netdev))
5989                 e1000e_up(adapter);
5990         else
5991                 e1000e_reset(adapter);
5992
5993         pm_runtime_put_sync(netdev->dev.parent);
5994
5995         clear_bit(__E1000_RESETTING, &adapter->state);
5996
5997         return 0;
5998 }
5999
6000 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6001                            int cmd)
6002 {
6003         struct e1000_adapter *adapter = netdev_priv(netdev);
6004         struct mii_ioctl_data *data = if_mii(ifr);
6005
6006         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6007                 return -EOPNOTSUPP;
6008
6009         switch (cmd) {
6010         case SIOCGMIIPHY:
6011                 data->phy_id = adapter->hw.phy.addr;
6012                 break;
6013         case SIOCGMIIREG:
6014                 e1000_phy_read_status(adapter);
6015
6016                 switch (data->reg_num & 0x1F) {
6017                 case MII_BMCR:
6018                         data->val_out = adapter->phy_regs.bmcr;
6019                         break;
6020                 case MII_BMSR:
6021                         data->val_out = adapter->phy_regs.bmsr;
6022                         break;
6023                 case MII_PHYSID1:
6024                         data->val_out = (adapter->hw.phy.id >> 16);
6025                         break;
6026                 case MII_PHYSID2:
6027                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
6028                         break;
6029                 case MII_ADVERTISE:
6030                         data->val_out = adapter->phy_regs.advertise;
6031                         break;
6032                 case MII_LPA:
6033                         data->val_out = adapter->phy_regs.lpa;
6034                         break;
6035                 case MII_EXPANSION:
6036                         data->val_out = adapter->phy_regs.expansion;
6037                         break;
6038                 case MII_CTRL1000:
6039                         data->val_out = adapter->phy_regs.ctrl1000;
6040                         break;
6041                 case MII_STAT1000:
6042                         data->val_out = adapter->phy_regs.stat1000;
6043                         break;
6044                 case MII_ESTATUS:
6045                         data->val_out = adapter->phy_regs.estatus;
6046                         break;
6047                 default:
6048                         return -EIO;
6049                 }
6050                 break;
6051         case SIOCSMIIREG:
6052         default:
6053                 return -EOPNOTSUPP;
6054         }
6055         return 0;
6056 }
6057
6058 /**
6059  * e1000e_hwtstamp_ioctl - control hardware time stamping
6060  * @netdev: network interface device structure
6061  * @ifreq: interface request
6062  *
6063  * Outgoing time stamping can be enabled and disabled. Play nice and
6064  * disable it when requested, although it shouldn't cause any overhead
6065  * when no packet needs it. At most one packet in the queue may be
6066  * marked for time stamping, otherwise it would be impossible to tell
6067  * for sure to which packet the hardware time stamp belongs.
6068  *
6069  * Incoming time stamping has to be configured via the hardware filters.
6070  * Not all combinations are supported, in particular event type has to be
6071  * specified. Matching the kind of event packet is not supported, with the
6072  * exception of "all V2 events regardless of level 2 or 4".
6073  **/
6074 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6075 {
6076         struct e1000_adapter *adapter = netdev_priv(netdev);
6077         struct hwtstamp_config config;
6078         int ret_val;
6079
6080         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6081                 return -EFAULT;
6082
6083         ret_val = e1000e_config_hwtstamp(adapter, &config);
6084         if (ret_val)
6085                 return ret_val;
6086
6087         switch (config.rx_filter) {
6088         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6089         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6090         case HWTSTAMP_FILTER_PTP_V2_SYNC:
6091         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6092         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6093         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6094                 /* With V2 type filters which specify a Sync or Delay Request,
6095                  * Path Delay Request/Response messages are also time stamped
6096                  * by hardware so notify the caller the requested packets plus
6097                  * some others are time stamped.
6098                  */
6099                 config.rx_filter = HWTSTAMP_FILTER_SOME;
6100                 break;
6101         default:
6102                 break;
6103         }
6104
6105         return copy_to_user(ifr->ifr_data, &config,
6106                             sizeof(config)) ? -EFAULT : 0;
6107 }
6108
6109 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6110 {
6111         struct e1000_adapter *adapter = netdev_priv(netdev);
6112
6113         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6114                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6115 }
6116
6117 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6118 {
6119         switch (cmd) {
6120         case SIOCGMIIPHY:
6121         case SIOCGMIIREG:
6122         case SIOCSMIIREG:
6123                 return e1000_mii_ioctl(netdev, ifr, cmd);
6124         case SIOCSHWTSTAMP:
6125                 return e1000e_hwtstamp_set(netdev, ifr);
6126         case SIOCGHWTSTAMP:
6127                 return e1000e_hwtstamp_get(netdev, ifr);
6128         default:
6129                 return -EOPNOTSUPP;
6130         }
6131 }
6132
6133 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6134 {
6135         struct e1000_hw *hw = &adapter->hw;
6136         u32 i, mac_reg, wuc;
6137         u16 phy_reg, wuc_enable;
6138         int retval;
6139
6140         /* copy MAC RARs to PHY RARs */
6141         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6142
6143         retval = hw->phy.ops.acquire(hw);
6144         if (retval) {
6145                 e_err("Could not acquire PHY\n");
6146                 return retval;
6147         }
6148
6149         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6150         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6151         if (retval)
6152                 goto release;
6153
6154         /* copy MAC MTA to PHY MTA - only needed for pchlan */
6155         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6156                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6157                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6158                                            (u16)(mac_reg & 0xFFFF));
6159                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6160                                            (u16)((mac_reg >> 16) & 0xFFFF));
6161         }
6162
6163         /* configure PHY Rx Control register */
6164         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6165         mac_reg = er32(RCTL);
6166         if (mac_reg & E1000_RCTL_UPE)
6167                 phy_reg |= BM_RCTL_UPE;
6168         if (mac_reg & E1000_RCTL_MPE)
6169                 phy_reg |= BM_RCTL_MPE;
6170         phy_reg &= ~(BM_RCTL_MO_MASK);
6171         if (mac_reg & E1000_RCTL_MO_3)
6172                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6173                             << BM_RCTL_MO_SHIFT);
6174         if (mac_reg & E1000_RCTL_BAM)
6175                 phy_reg |= BM_RCTL_BAM;
6176         if (mac_reg & E1000_RCTL_PMCF)
6177                 phy_reg |= BM_RCTL_PMCF;
6178         mac_reg = er32(CTRL);
6179         if (mac_reg & E1000_CTRL_RFCE)
6180                 phy_reg |= BM_RCTL_RFCE;
6181         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6182
6183         wuc = E1000_WUC_PME_EN;
6184         if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6185                 wuc |= E1000_WUC_APME;
6186
6187         /* enable PHY wakeup in MAC register */
6188         ew32(WUFC, wufc);
6189         ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6190                    E1000_WUC_PME_STATUS | wuc));
6191
6192         /* configure and enable PHY wakeup in PHY registers */
6193         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6194         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6195
6196         /* activate PHY wakeup */
6197         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6198         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6199         if (retval)
6200                 e_err("Could not set PHY Host Wakeup bit\n");
6201 release:
6202         hw->phy.ops.release(hw);
6203
6204         return retval;
6205 }
6206
6207 static void e1000e_flush_lpic(struct pci_dev *pdev)
6208 {
6209         struct net_device *netdev = pci_get_drvdata(pdev);
6210         struct e1000_adapter *adapter = netdev_priv(netdev);
6211         struct e1000_hw *hw = &adapter->hw;
6212         u32 ret_val;
6213
6214         pm_runtime_get_sync(netdev->dev.parent);
6215
6216         ret_val = hw->phy.ops.acquire(hw);
6217         if (ret_val)
6218                 goto fl_out;
6219
6220         pr_info("EEE TX LPI TIMER: %08X\n",
6221                 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6222
6223         hw->phy.ops.release(hw);
6224
6225 fl_out:
6226         pm_runtime_put_sync(netdev->dev.parent);
6227 }
6228
6229 static int e1000e_pm_freeze(struct device *dev)
6230 {
6231         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6232         struct e1000_adapter *adapter = netdev_priv(netdev);
6233
6234         netif_device_detach(netdev);
6235
6236         if (netif_running(netdev)) {
6237                 int count = E1000_CHECK_RESET_COUNT;
6238
6239                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6240                         usleep_range(10000, 20000);
6241
6242                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6243
6244                 /* Quiesce the device without resetting the hardware */
6245                 e1000e_down(adapter, false);
6246                 e1000_free_irq(adapter);
6247         }
6248         e1000e_reset_interrupt_capability(adapter);
6249
6250         /* Allow time for pending master requests to run */
6251         e1000e_disable_pcie_master(&adapter->hw);
6252
6253         return 0;
6254 }
6255
6256 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6257 {
6258         struct net_device *netdev = pci_get_drvdata(pdev);
6259         struct e1000_adapter *adapter = netdev_priv(netdev);
6260         struct e1000_hw *hw = &adapter->hw;
6261         u32 ctrl, ctrl_ext, rctl, status;
6262         /* Runtime suspend should only enable wakeup for link changes */
6263         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
6264         int retval = 0;
6265
6266         status = er32(STATUS);
6267         if (status & E1000_STATUS_LU)
6268                 wufc &= ~E1000_WUFC_LNKC;
6269
6270         if (wufc) {
6271                 e1000_setup_rctl(adapter);
6272                 e1000e_set_rx_mode(netdev);
6273
6274                 /* turn on all-multi mode if wake on multicast is enabled */
6275                 if (wufc & E1000_WUFC_MC) {
6276                         rctl = er32(RCTL);
6277                         rctl |= E1000_RCTL_MPE;
6278                         ew32(RCTL, rctl);
6279                 }
6280
6281                 ctrl = er32(CTRL);
6282                 ctrl |= E1000_CTRL_ADVD3WUC;
6283                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6284                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6285                 ew32(CTRL, ctrl);
6286
6287                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6288                     adapter->hw.phy.media_type ==
6289                     e1000_media_type_internal_serdes) {
6290                         /* keep the laser running in D3 */
6291                         ctrl_ext = er32(CTRL_EXT);
6292                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6293                         ew32(CTRL_EXT, ctrl_ext);
6294                 }
6295
6296                 if (!runtime)
6297                         e1000e_power_up_phy(adapter);
6298
6299                 if (adapter->flags & FLAG_IS_ICH)
6300                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
6301
6302                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6303                         /* enable wakeup by the PHY */
6304                         retval = e1000_init_phy_wakeup(adapter, wufc);
6305                         if (retval)
6306                                 return retval;
6307                 } else {
6308                         /* enable wakeup by the MAC */
6309                         ew32(WUFC, wufc);
6310                         ew32(WUC, E1000_WUC_PME_EN);
6311                 }
6312         } else {
6313                 ew32(WUC, 0);
6314                 ew32(WUFC, 0);
6315
6316                 e1000_power_down_phy(adapter);
6317         }
6318
6319         if (adapter->hw.phy.type == e1000_phy_igp_3) {
6320                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6321         } else if ((hw->mac.type == e1000_pch_lpt) ||
6322                    (hw->mac.type == e1000_pch_spt)) {
6323                 if (!(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6324                         /* ULP does not support wake from unicast, multicast
6325                          * or broadcast.
6326                          */
6327                         retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6328
6329                 if (retval)
6330                         return retval;
6331         }
6332
6333         /* Ensure that the appropriate bits are set in LPI_CTRL
6334          * for EEE in Sx
6335          */
6336         if ((hw->phy.type >= e1000_phy_i217) &&
6337             adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6338                 u16 lpi_ctrl = 0;
6339
6340                 retval = hw->phy.ops.acquire(hw);
6341                 if (!retval) {
6342                         retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6343                                                  &lpi_ctrl);
6344                         if (!retval) {
6345                                 if (adapter->eee_advert &
6346                                     hw->dev_spec.ich8lan.eee_lp_ability &
6347                                     I82579_EEE_100_SUPPORTED)
6348                                         lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6349                                 if (adapter->eee_advert &
6350                                     hw->dev_spec.ich8lan.eee_lp_ability &
6351                                     I82579_EEE_1000_SUPPORTED)
6352                                         lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6353
6354                                 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6355                                                          lpi_ctrl);
6356                         }
6357                 }
6358                 hw->phy.ops.release(hw);
6359         }
6360
6361         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6362          * would have already happened in close and is redundant.
6363          */
6364         e1000e_release_hw_control(adapter);
6365
6366         pci_clear_master(pdev);
6367
6368         /* The pci-e switch on some quad port adapters will report a
6369          * correctable error when the MAC transitions from D0 to D3.  To
6370          * prevent this we need to mask off the correctable errors on the
6371          * downstream port of the pci-e switch.
6372          *
6373          * We don't have the associated upstream bridge while assigning
6374          * the PCI device into guest. For example, the KVM on power is
6375          * one of the cases.
6376          */
6377         if (adapter->flags & FLAG_IS_QUAD_PORT) {
6378                 struct pci_dev *us_dev = pdev->bus->self;
6379                 u16 devctl;
6380
6381                 if (!us_dev)
6382                         return 0;
6383
6384                 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6385                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6386                                            (devctl & ~PCI_EXP_DEVCTL_CERE));
6387
6388                 pci_save_state(pdev);
6389                 pci_prepare_to_sleep(pdev);
6390
6391                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6392         }
6393
6394         return 0;
6395 }
6396
6397 /**
6398  * __e1000e_disable_aspm - Disable ASPM states
6399  * @pdev: pointer to PCI device struct
6400  * @state: bit-mask of ASPM states to disable
6401  * @locked: indication if this context holds pci_bus_sem locked.
6402  *
6403  * Some devices *must* have certain ASPM states disabled per hardware errata.
6404  **/
6405 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6406 {
6407         struct pci_dev *parent = pdev->bus->self;
6408         u16 aspm_dis_mask = 0;
6409         u16 pdev_aspmc, parent_aspmc;
6410
6411         switch (state) {
6412         case PCIE_LINK_STATE_L0S:
6413         case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6414                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6415                 /* fall-through - can't have L1 without L0s */
6416         case PCIE_LINK_STATE_L1:
6417                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6418                 break;
6419         default:
6420                 return;
6421         }
6422
6423         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6424         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6425
6426         if (parent) {
6427                 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6428                                           &parent_aspmc);
6429                 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6430         }
6431
6432         /* Nothing to do if the ASPM states to be disabled already are */
6433         if (!(pdev_aspmc & aspm_dis_mask) &&
6434             (!parent || !(parent_aspmc & aspm_dis_mask)))
6435                 return;
6436
6437         dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6438                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6439                  "L0s" : "",
6440                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6441                  "L1" : "");
6442
6443 #ifdef CONFIG_PCIEASPM
6444         if (locked)
6445                 pci_disable_link_state_locked(pdev, state);
6446         else
6447                 pci_disable_link_state(pdev, state);
6448
6449         /* Double-check ASPM control.  If not disabled by the above, the
6450          * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6451          * not enabled); override by writing PCI config space directly.
6452          */
6453         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6454         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6455
6456         if (!(aspm_dis_mask & pdev_aspmc))
6457                 return;
6458 #endif
6459
6460         /* Both device and parent should have the same ASPM setting.
6461          * Disable ASPM in downstream component first and then upstream.
6462          */
6463         pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6464
6465         if (parent)
6466                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6467                                            aspm_dis_mask);
6468 }
6469
6470 /**
6471  * e1000e_disable_aspm - Disable ASPM states.
6472  * @pdev: pointer to PCI device struct
6473  * @state: bit-mask of ASPM states to disable
6474  *
6475  * This function acquires the pci_bus_sem!
6476  * Some devices *must* have certain ASPM states disabled per hardware errata.
6477  **/
6478 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6479 {
6480         __e1000e_disable_aspm(pdev, state, 0);
6481 }
6482
6483 /**
6484  * e1000e_disable_aspm_locked   Disable ASPM states.
6485  * @pdev: pointer to PCI device struct
6486  * @state: bit-mask of ASPM states to disable
6487  *
6488  * This function must be called with pci_bus_sem acquired!
6489  * Some devices *must* have certain ASPM states disabled per hardware errata.
6490  **/
6491 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6492 {
6493         __e1000e_disable_aspm(pdev, state, 1);
6494 }
6495
6496 #ifdef CONFIG_PM
6497 static int __e1000_resume(struct pci_dev *pdev)
6498 {
6499         struct net_device *netdev = pci_get_drvdata(pdev);
6500         struct e1000_adapter *adapter = netdev_priv(netdev);
6501         struct e1000_hw *hw = &adapter->hw;
6502         u16 aspm_disable_flag = 0;
6503
6504         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6505                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6506         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6507                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6508         if (aspm_disable_flag)
6509                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6510
6511         pci_set_master(pdev);
6512
6513         if (hw->mac.type >= e1000_pch2lan)
6514                 e1000_resume_workarounds_pchlan(&adapter->hw);
6515
6516         e1000e_power_up_phy(adapter);
6517
6518         /* report the system wakeup cause from S3/S4 */
6519         if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6520                 u16 phy_data;
6521
6522                 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6523                 if (phy_data) {
6524                         e_info("PHY Wakeup cause - %s\n",
6525                                phy_data & E1000_WUS_EX ? "Unicast Packet" :
6526                                phy_data & E1000_WUS_MC ? "Multicast Packet" :
6527                                phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6528                                phy_data & E1000_WUS_MAG ? "Magic Packet" :
6529                                phy_data & E1000_WUS_LNKC ?
6530                                "Link Status Change" : "other");
6531                 }
6532                 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6533         } else {
6534                 u32 wus = er32(WUS);
6535
6536                 if (wus) {
6537                         e_info("MAC Wakeup cause - %s\n",
6538                                wus & E1000_WUS_EX ? "Unicast Packet" :
6539                                wus & E1000_WUS_MC ? "Multicast Packet" :
6540                                wus & E1000_WUS_BC ? "Broadcast Packet" :
6541                                wus & E1000_WUS_MAG ? "Magic Packet" :
6542                                wus & E1000_WUS_LNKC ? "Link Status Change" :
6543                                "other");
6544                 }
6545                 ew32(WUS, ~0);
6546         }
6547
6548         e1000e_reset(adapter);
6549
6550         e1000_init_manageability_pt(adapter);
6551
6552         /* If the controller has AMT, do not set DRV_LOAD until the interface
6553          * is up.  For all other cases, let the f/w know that the h/w is now
6554          * under the control of the driver.
6555          */
6556         if (!(adapter->flags & FLAG_HAS_AMT))
6557                 e1000e_get_hw_control(adapter);
6558
6559         return 0;
6560 }
6561
6562 #ifdef CONFIG_PM_SLEEP
6563 static int e1000e_pm_thaw(struct device *dev)
6564 {
6565         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6566         struct e1000_adapter *adapter = netdev_priv(netdev);
6567
6568         e1000e_set_interrupt_capability(adapter);
6569         if (netif_running(netdev)) {
6570                 u32 err = e1000_request_irq(adapter);
6571
6572                 if (err)
6573                         return err;
6574
6575                 e1000e_up(adapter);
6576         }
6577
6578         netif_device_attach(netdev);
6579
6580         return 0;
6581 }
6582
6583 static int e1000e_pm_suspend(struct device *dev)
6584 {
6585         struct pci_dev *pdev = to_pci_dev(dev);
6586
6587         e1000e_flush_lpic(pdev);
6588
6589         e1000e_pm_freeze(dev);
6590
6591         return __e1000_shutdown(pdev, false);
6592 }
6593
6594 static int e1000e_pm_resume(struct device *dev)
6595 {
6596         struct pci_dev *pdev = to_pci_dev(dev);
6597         int rc;
6598
6599         rc = __e1000_resume(pdev);
6600         if (rc)
6601                 return rc;
6602
6603         return e1000e_pm_thaw(dev);
6604 }
6605 #endif /* CONFIG_PM_SLEEP */
6606
6607 static int e1000e_pm_runtime_idle(struct device *dev)
6608 {
6609         struct pci_dev *pdev = to_pci_dev(dev);
6610         struct net_device *netdev = pci_get_drvdata(pdev);
6611         struct e1000_adapter *adapter = netdev_priv(netdev);
6612         u16 eee_lp;
6613
6614         eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6615
6616         if (!e1000e_has_link(adapter)) {
6617                 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6618                 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6619         }
6620
6621         return -EBUSY;
6622 }
6623
6624 static int e1000e_pm_runtime_resume(struct device *dev)
6625 {
6626         struct pci_dev *pdev = to_pci_dev(dev);
6627         struct net_device *netdev = pci_get_drvdata(pdev);
6628         struct e1000_adapter *adapter = netdev_priv(netdev);
6629         int rc;
6630
6631         rc = __e1000_resume(pdev);
6632         if (rc)
6633                 return rc;
6634
6635         if (netdev->flags & IFF_UP)
6636                 rc = e1000e_up(adapter);
6637
6638         return rc;
6639 }
6640
6641 static int e1000e_pm_runtime_suspend(struct device *dev)
6642 {
6643         struct pci_dev *pdev = to_pci_dev(dev);
6644         struct net_device *netdev = pci_get_drvdata(pdev);
6645         struct e1000_adapter *adapter = netdev_priv(netdev);
6646
6647         if (netdev->flags & IFF_UP) {
6648                 int count = E1000_CHECK_RESET_COUNT;
6649
6650                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6651                         usleep_range(10000, 20000);
6652
6653                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6654
6655                 /* Down the device without resetting the hardware */
6656                 e1000e_down(adapter, false);
6657         }
6658
6659         if (__e1000_shutdown(pdev, true)) {
6660                 e1000e_pm_runtime_resume(dev);
6661                 return -EBUSY;
6662         }
6663
6664         return 0;
6665 }
6666 #endif /* CONFIG_PM */
6667
6668 static void e1000_shutdown(struct pci_dev *pdev)
6669 {
6670         e1000e_flush_lpic(pdev);
6671
6672         e1000e_pm_freeze(&pdev->dev);
6673
6674         __e1000_shutdown(pdev, false);
6675 }
6676
6677 #ifdef CONFIG_NET_POLL_CONTROLLER
6678
6679 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6680 {
6681         struct net_device *netdev = data;
6682         struct e1000_adapter *adapter = netdev_priv(netdev);
6683
6684         if (adapter->msix_entries) {
6685                 int vector, msix_irq;
6686
6687                 vector = 0;
6688                 msix_irq = adapter->msix_entries[vector].vector;
6689                 disable_irq(msix_irq);
6690                 e1000_intr_msix_rx(msix_irq, netdev);
6691                 enable_irq(msix_irq);
6692
6693                 vector++;
6694                 msix_irq = adapter->msix_entries[vector].vector;
6695                 disable_irq(msix_irq);
6696                 e1000_intr_msix_tx(msix_irq, netdev);
6697                 enable_irq(msix_irq);
6698
6699                 vector++;
6700                 msix_irq = adapter->msix_entries[vector].vector;
6701                 disable_irq(msix_irq);
6702                 e1000_msix_other(msix_irq, netdev);
6703                 enable_irq(msix_irq);
6704         }
6705
6706         return IRQ_HANDLED;
6707 }
6708
6709 /**
6710  * e1000_netpoll
6711  * @netdev: network interface device structure
6712  *
6713  * Polling 'interrupt' - used by things like netconsole to send skbs
6714  * without having to re-enable interrupts. It's not called while
6715  * the interrupt routine is executing.
6716  */
6717 static void e1000_netpoll(struct net_device *netdev)
6718 {
6719         struct e1000_adapter *adapter = netdev_priv(netdev);
6720
6721         switch (adapter->int_mode) {
6722         case E1000E_INT_MODE_MSIX:
6723                 e1000_intr_msix(adapter->pdev->irq, netdev);
6724                 break;
6725         case E1000E_INT_MODE_MSI:
6726                 disable_irq(adapter->pdev->irq);
6727                 e1000_intr_msi(adapter->pdev->irq, netdev);
6728                 enable_irq(adapter->pdev->irq);
6729                 break;
6730         default:                /* E1000E_INT_MODE_LEGACY */
6731                 disable_irq(adapter->pdev->irq);
6732                 e1000_intr(adapter->pdev->irq, netdev);
6733                 enable_irq(adapter->pdev->irq);
6734                 break;
6735         }
6736 }
6737 #endif
6738
6739 /**
6740  * e1000_io_error_detected - called when PCI error is detected
6741  * @pdev: Pointer to PCI device
6742  * @state: The current pci connection state
6743  *
6744  * This function is called after a PCI bus error affecting
6745  * this device has been detected.
6746  */
6747 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6748                                                 pci_channel_state_t state)
6749 {
6750         struct net_device *netdev = pci_get_drvdata(pdev);
6751         struct e1000_adapter *adapter = netdev_priv(netdev);
6752
6753         netif_device_detach(netdev);
6754
6755         if (state == pci_channel_io_perm_failure)
6756                 return PCI_ERS_RESULT_DISCONNECT;
6757
6758         if (netif_running(netdev))
6759                 e1000e_down(adapter, true);
6760         pci_disable_device(pdev);
6761
6762         /* Request a slot slot reset. */
6763         return PCI_ERS_RESULT_NEED_RESET;
6764 }
6765
6766 /**
6767  * e1000_io_slot_reset - called after the pci bus has been reset.
6768  * @pdev: Pointer to PCI device
6769  *
6770  * Restart the card from scratch, as if from a cold-boot. Implementation
6771  * resembles the first-half of the e1000e_pm_resume routine.
6772  */
6773 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6774 {
6775         struct net_device *netdev = pci_get_drvdata(pdev);
6776         struct e1000_adapter *adapter = netdev_priv(netdev);
6777         struct e1000_hw *hw = &adapter->hw;
6778         u16 aspm_disable_flag = 0;
6779         int err;
6780         pci_ers_result_t result;
6781
6782         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6783                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6784         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6785                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6786         if (aspm_disable_flag)
6787                 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
6788
6789         err = pci_enable_device_mem(pdev);
6790         if (err) {
6791                 dev_err(&pdev->dev,
6792                         "Cannot re-enable PCI device after reset.\n");
6793                 result = PCI_ERS_RESULT_DISCONNECT;
6794         } else {
6795                 pdev->state_saved = true;
6796                 pci_restore_state(pdev);
6797                 pci_set_master(pdev);
6798
6799                 pci_enable_wake(pdev, PCI_D3hot, 0);
6800                 pci_enable_wake(pdev, PCI_D3cold, 0);
6801
6802                 e1000e_reset(adapter);
6803                 ew32(WUS, ~0);
6804                 result = PCI_ERS_RESULT_RECOVERED;
6805         }
6806
6807         pci_cleanup_aer_uncorrect_error_status(pdev);
6808
6809         return result;
6810 }
6811
6812 /**
6813  * e1000_io_resume - called when traffic can start flowing again.
6814  * @pdev: Pointer to PCI device
6815  *
6816  * This callback is called when the error recovery driver tells us that
6817  * its OK to resume normal operation. Implementation resembles the
6818  * second-half of the e1000e_pm_resume routine.
6819  */
6820 static void e1000_io_resume(struct pci_dev *pdev)
6821 {
6822         struct net_device *netdev = pci_get_drvdata(pdev);
6823         struct e1000_adapter *adapter = netdev_priv(netdev);
6824
6825         e1000_init_manageability_pt(adapter);
6826
6827         if (netif_running(netdev)) {
6828                 if (e1000e_up(adapter)) {
6829                         dev_err(&pdev->dev,
6830                                 "can't bring device back up after reset\n");
6831                         return;
6832                 }
6833         }
6834
6835         netif_device_attach(netdev);
6836
6837         /* If the controller has AMT, do not set DRV_LOAD until the interface
6838          * is up.  For all other cases, let the f/w know that the h/w is now
6839          * under the control of the driver.
6840          */
6841         if (!(adapter->flags & FLAG_HAS_AMT))
6842                 e1000e_get_hw_control(adapter);
6843 }
6844
6845 static void e1000_print_device_info(struct e1000_adapter *adapter)
6846 {
6847         struct e1000_hw *hw = &adapter->hw;
6848         struct net_device *netdev = adapter->netdev;
6849         u32 ret_val;
6850         u8 pba_str[E1000_PBANUM_LENGTH];
6851
6852         /* print bus type/speed/width info */
6853         e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6854                /* bus width */
6855                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6856                 "Width x1"),
6857                /* MAC address */
6858                netdev->dev_addr);
6859         e_info("Intel(R) PRO/%s Network Connection\n",
6860                (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6861         ret_val = e1000_read_pba_string_generic(hw, pba_str,
6862                                                 E1000_PBANUM_LENGTH);
6863         if (ret_val)
6864                 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6865         e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6866                hw->mac.type, hw->phy.type, pba_str);
6867 }
6868
6869 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6870 {
6871         struct e1000_hw *hw = &adapter->hw;
6872         int ret_val;
6873         u16 buf = 0;
6874
6875         if (hw->mac.type != e1000_82573)
6876                 return;
6877
6878         ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6879         le16_to_cpus(&buf);
6880         if (!ret_val && (!(buf & (1 << 0)))) {
6881                 /* Deep Smart Power Down (DSPD) */
6882                 dev_warn(&adapter->pdev->dev,
6883                          "Warning: detected DSPD enabled in EEPROM\n");
6884         }
6885 }
6886
6887 static netdev_features_t e1000_fix_features(struct net_device *netdev,
6888                                             netdev_features_t features)
6889 {
6890         struct e1000_adapter *adapter = netdev_priv(netdev);
6891         struct e1000_hw *hw = &adapter->hw;
6892
6893         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6894         if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
6895                 features &= ~NETIF_F_RXFCS;
6896
6897         return features;
6898 }
6899
6900 static int e1000_set_features(struct net_device *netdev,
6901                               netdev_features_t features)
6902 {
6903         struct e1000_adapter *adapter = netdev_priv(netdev);
6904         netdev_features_t changed = features ^ netdev->features;
6905
6906         if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6907                 adapter->flags |= FLAG_TSO_FORCE;
6908
6909         if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6910                          NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6911                          NETIF_F_RXALL)))
6912                 return 0;
6913
6914         if (changed & NETIF_F_RXFCS) {
6915                 if (features & NETIF_F_RXFCS) {
6916                         adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6917                 } else {
6918                         /* We need to take it back to defaults, which might mean
6919                          * stripping is still disabled at the adapter level.
6920                          */
6921                         if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6922                                 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6923                         else
6924                                 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6925                 }
6926         }
6927
6928         netdev->features = features;
6929
6930         if (netif_running(netdev))
6931                 e1000e_reinit_locked(adapter);
6932         else
6933                 e1000e_reset(adapter);
6934
6935         return 0;
6936 }
6937
6938 static const struct net_device_ops e1000e_netdev_ops = {
6939         .ndo_open               = e1000_open,
6940         .ndo_stop               = e1000_close,
6941         .ndo_start_xmit         = e1000_xmit_frame,
6942         .ndo_get_stats64        = e1000e_get_stats64,
6943         .ndo_set_rx_mode        = e1000e_set_rx_mode,
6944         .ndo_set_mac_address    = e1000_set_mac,
6945         .ndo_change_mtu         = e1000_change_mtu,
6946         .ndo_do_ioctl           = e1000_ioctl,
6947         .ndo_tx_timeout         = e1000_tx_timeout,
6948         .ndo_validate_addr      = eth_validate_addr,
6949
6950         .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
6951         .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
6952 #ifdef CONFIG_NET_POLL_CONTROLLER
6953         .ndo_poll_controller    = e1000_netpoll,
6954 #endif
6955         .ndo_set_features = e1000_set_features,
6956         .ndo_fix_features = e1000_fix_features,
6957         .ndo_features_check     = passthru_features_check,
6958 };
6959
6960 /**
6961  * e1000_probe - Device Initialization Routine
6962  * @pdev: PCI device information struct
6963  * @ent: entry in e1000_pci_tbl
6964  *
6965  * Returns 0 on success, negative on failure
6966  *
6967  * e1000_probe initializes an adapter identified by a pci_dev structure.
6968  * The OS initialization, configuring of the adapter private structure,
6969  * and a hardware reset occur.
6970  **/
6971 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6972 {
6973         struct net_device *netdev;
6974         struct e1000_adapter *adapter;
6975         struct e1000_hw *hw;
6976         const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
6977         resource_size_t mmio_start, mmio_len;
6978         resource_size_t flash_start, flash_len;
6979         static int cards_found;
6980         u16 aspm_disable_flag = 0;
6981         int bars, i, err, pci_using_dac;
6982         u16 eeprom_data = 0;
6983         u16 eeprom_apme_mask = E1000_EEPROM_APME;
6984         s32 rval = 0;
6985
6986         if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
6987                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6988         if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
6989                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6990         if (aspm_disable_flag)
6991                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6992
6993         err = pci_enable_device_mem(pdev);
6994         if (err)
6995                 return err;
6996
6997         pci_using_dac = 0;
6998         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
6999         if (!err) {
7000                 pci_using_dac = 1;
7001         } else {
7002                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7003                 if (err) {
7004                         dev_err(&pdev->dev,
7005                                 "No usable DMA configuration, aborting\n");
7006                         goto err_dma;
7007                 }
7008         }
7009
7010         bars = pci_select_bars(pdev, IORESOURCE_MEM);
7011         err = pci_request_selected_regions_exclusive(pdev, bars,
7012                                                      e1000e_driver_name);
7013         if (err)
7014                 goto err_pci_reg;
7015
7016         /* AER (Advanced Error Reporting) hooks */
7017         pci_enable_pcie_error_reporting(pdev);
7018
7019         pci_set_master(pdev);
7020         /* PCI config space info */
7021         err = pci_save_state(pdev);
7022         if (err)
7023                 goto err_alloc_etherdev;
7024
7025         err = -ENOMEM;
7026         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7027         if (!netdev)
7028                 goto err_alloc_etherdev;
7029
7030         SET_NETDEV_DEV(netdev, &pdev->dev);
7031
7032         netdev->irq = pdev->irq;
7033
7034         pci_set_drvdata(pdev, netdev);
7035         adapter = netdev_priv(netdev);
7036         hw = &adapter->hw;
7037         adapter->netdev = netdev;
7038         adapter->pdev = pdev;
7039         adapter->ei = ei;
7040         adapter->pba = ei->pba;
7041         adapter->flags = ei->flags;
7042         adapter->flags2 = ei->flags2;
7043         adapter->hw.adapter = adapter;
7044         adapter->hw.mac.type = ei->mac;
7045         adapter->max_hw_frame_size = ei->max_hw_frame_size;
7046         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7047
7048         mmio_start = pci_resource_start(pdev, 0);
7049         mmio_len = pci_resource_len(pdev, 0);
7050
7051         err = -EIO;
7052         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7053         if (!adapter->hw.hw_addr)
7054                 goto err_ioremap;
7055
7056         if ((adapter->flags & FLAG_HAS_FLASH) &&
7057             (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7058             (hw->mac.type < e1000_pch_spt)) {
7059                 flash_start = pci_resource_start(pdev, 1);
7060                 flash_len = pci_resource_len(pdev, 1);
7061                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7062                 if (!adapter->hw.flash_address)
7063                         goto err_flashmap;
7064         }
7065
7066         /* Set default EEE advertisement */
7067         if (adapter->flags2 & FLAG2_HAS_EEE)
7068                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7069
7070         /* construct the net_device struct */
7071         netdev->netdev_ops = &e1000e_netdev_ops;
7072         e1000e_set_ethtool_ops(netdev);
7073         netdev->watchdog_timeo = 5 * HZ;
7074         netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7075         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7076
7077         netdev->mem_start = mmio_start;
7078         netdev->mem_end = mmio_start + mmio_len;
7079
7080         adapter->bd_number = cards_found++;
7081
7082         e1000e_check_options(adapter);
7083
7084         /* setup adapter struct */
7085         err = e1000_sw_init(adapter);
7086         if (err)
7087                 goto err_sw_init;
7088
7089         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7090         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7091         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7092
7093         err = ei->get_variants(adapter);
7094         if (err)
7095                 goto err_hw_init;
7096
7097         if ((adapter->flags & FLAG_IS_ICH) &&
7098             (adapter->flags & FLAG_READ_ONLY_NVM) &&
7099             (hw->mac.type < e1000_pch_spt))
7100                 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7101
7102         hw->mac.ops.get_bus_info(&adapter->hw);
7103
7104         adapter->hw.phy.autoneg_wait_to_complete = 0;
7105
7106         /* Copper options */
7107         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7108                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7109                 adapter->hw.phy.disable_polarity_correction = 0;
7110                 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7111         }
7112
7113         if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7114                 dev_info(&pdev->dev,
7115                          "PHY reset is blocked due to SOL/IDER session.\n");
7116
7117         /* Set initial default active device features */
7118         netdev->features = (NETIF_F_SG |
7119                             NETIF_F_HW_VLAN_CTAG_RX |
7120                             NETIF_F_HW_VLAN_CTAG_TX |
7121                             NETIF_F_TSO |
7122                             NETIF_F_TSO6 |
7123                             NETIF_F_RXHASH |
7124                             NETIF_F_RXCSUM |
7125                             NETIF_F_HW_CSUM);
7126
7127         /* Set user-changeable features (subset of all device features) */
7128         netdev->hw_features = netdev->features;
7129         netdev->hw_features |= NETIF_F_RXFCS;
7130         netdev->priv_flags |= IFF_SUPP_NOFCS;
7131         netdev->hw_features |= NETIF_F_RXALL;
7132
7133         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7134                 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7135
7136         netdev->vlan_features |= (NETIF_F_SG |
7137                                   NETIF_F_TSO |
7138                                   NETIF_F_TSO6 |
7139                                   NETIF_F_HW_CSUM);
7140
7141         netdev->priv_flags |= IFF_UNICAST_FLT;
7142
7143         if (pci_using_dac) {
7144                 netdev->features |= NETIF_F_HIGHDMA;
7145                 netdev->vlan_features |= NETIF_F_HIGHDMA;
7146         }
7147
7148         if (e1000e_enable_mng_pass_thru(&adapter->hw))
7149                 adapter->flags |= FLAG_MNG_PT_ENABLED;
7150
7151         /* before reading the NVM, reset the controller to
7152          * put the device in a known good starting state
7153          */
7154         adapter->hw.mac.ops.reset_hw(&adapter->hw);
7155
7156         /* systems with ASPM and others may see the checksum fail on the first
7157          * attempt. Let's give it a few tries
7158          */
7159         for (i = 0;; i++) {
7160                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7161                         break;
7162                 if (i == 2) {
7163                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7164                         err = -EIO;
7165                         goto err_eeprom;
7166                 }
7167         }
7168
7169         e1000_eeprom_checks(adapter);
7170
7171         /* copy the MAC address */
7172         if (e1000e_read_mac_addr(&adapter->hw))
7173                 dev_err(&pdev->dev,
7174                         "NVM Read Error while reading MAC address\n");
7175
7176         memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7177
7178         if (!is_valid_ether_addr(netdev->dev_addr)) {
7179                 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7180                         netdev->dev_addr);
7181                 err = -EIO;
7182                 goto err_eeprom;
7183         }
7184
7185         init_timer(&adapter->watchdog_timer);
7186         adapter->watchdog_timer.function = e1000_watchdog;
7187         adapter->watchdog_timer.data = (unsigned long)adapter;
7188
7189         init_timer(&adapter->phy_info_timer);
7190         adapter->phy_info_timer.function = e1000_update_phy_info;
7191         adapter->phy_info_timer.data = (unsigned long)adapter;
7192
7193         INIT_WORK(&adapter->reset_task, e1000_reset_task);
7194         INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7195         INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7196         INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7197         INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7198
7199         /* Initialize link parameters. User can change them with ethtool */
7200         adapter->hw.mac.autoneg = 1;
7201         adapter->fc_autoneg = true;
7202         adapter->hw.fc.requested_mode = e1000_fc_default;
7203         adapter->hw.fc.current_mode = e1000_fc_default;
7204         adapter->hw.phy.autoneg_advertised = 0x2f;
7205
7206         /* Initial Wake on LAN setting - If APM wake is enabled in
7207          * the EEPROM, enable the ACPI Magic Packet filter
7208          */
7209         if (adapter->flags & FLAG_APME_IN_WUC) {
7210                 /* APME bit in EEPROM is mapped to WUC.APME */
7211                 eeprom_data = er32(WUC);
7212                 eeprom_apme_mask = E1000_WUC_APME;
7213                 if ((hw->mac.type > e1000_ich10lan) &&
7214                     (eeprom_data & E1000_WUC_PHY_WAKE))
7215                         adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7216         } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7217                 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7218                     (adapter->hw.bus.func == 1))
7219                         rval = e1000_read_nvm(&adapter->hw,
7220                                               NVM_INIT_CONTROL3_PORT_B,
7221                                               1, &eeprom_data);
7222                 else
7223                         rval = e1000_read_nvm(&adapter->hw,
7224                                               NVM_INIT_CONTROL3_PORT_A,
7225                                               1, &eeprom_data);
7226         }
7227
7228         /* fetch WoL from EEPROM */
7229         if (rval)
7230                 e_dbg("NVM read error getting WoL initial values: %d\n", rval);
7231         else if (eeprom_data & eeprom_apme_mask)
7232                 adapter->eeprom_wol |= E1000_WUFC_MAG;
7233
7234         /* now that we have the eeprom settings, apply the special cases
7235          * where the eeprom may be wrong or the board simply won't support
7236          * wake on lan on a particular port
7237          */
7238         if (!(adapter->flags & FLAG_HAS_WOL))
7239                 adapter->eeprom_wol = 0;
7240
7241         /* initialize the wol settings based on the eeprom settings */
7242         adapter->wol = adapter->eeprom_wol;
7243
7244         /* make sure adapter isn't asleep if manageability is enabled */
7245         if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7246             (hw->mac.ops.check_mng_mode(hw)))
7247                 device_wakeup_enable(&pdev->dev);
7248
7249         /* save off EEPROM version number */
7250         rval = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7251
7252         if (rval) {
7253                 e_dbg("NVM read error getting EEPROM version: %d\n", rval);
7254                 adapter->eeprom_vers = 0;
7255         }
7256
7257         /* reset the hardware with the new settings */
7258         e1000e_reset(adapter);
7259
7260         /* If the controller has AMT, do not set DRV_LOAD until the interface
7261          * is up.  For all other cases, let the f/w know that the h/w is now
7262          * under the control of the driver.
7263          */
7264         if (!(adapter->flags & FLAG_HAS_AMT))
7265                 e1000e_get_hw_control(adapter);
7266
7267         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7268         err = register_netdev(netdev);
7269         if (err)
7270                 goto err_register;
7271
7272         /* carrier off reporting is important to ethtool even BEFORE open */
7273         netif_carrier_off(netdev);
7274
7275         /* init PTP hardware clock */
7276         e1000e_ptp_init(adapter);
7277
7278         e1000_print_device_info(adapter);
7279
7280         if (pci_dev_run_wake(pdev))
7281                 pm_runtime_put_noidle(&pdev->dev);
7282
7283         return 0;
7284
7285 err_register:
7286         if (!(adapter->flags & FLAG_HAS_AMT))
7287                 e1000e_release_hw_control(adapter);
7288 err_eeprom:
7289         if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7290                 e1000_phy_hw_reset(&adapter->hw);
7291 err_hw_init:
7292         kfree(adapter->tx_ring);
7293         kfree(adapter->rx_ring);
7294 err_sw_init:
7295         if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7296                 iounmap(adapter->hw.flash_address);
7297         e1000e_reset_interrupt_capability(adapter);
7298 err_flashmap:
7299         iounmap(adapter->hw.hw_addr);
7300 err_ioremap:
7301         free_netdev(netdev);
7302 err_alloc_etherdev:
7303         pci_release_selected_regions(pdev,
7304                                      pci_select_bars(pdev, IORESOURCE_MEM));
7305 err_pci_reg:
7306 err_dma:
7307         pci_disable_device(pdev);
7308         return err;
7309 }
7310
7311 /**
7312  * e1000_remove - Device Removal Routine
7313  * @pdev: PCI device information struct
7314  *
7315  * e1000_remove is called by the PCI subsystem to alert the driver
7316  * that it should release a PCI device.  The could be caused by a
7317  * Hot-Plug event, or because the driver is going to be removed from
7318  * memory.
7319  **/
7320 static void e1000_remove(struct pci_dev *pdev)
7321 {
7322         struct net_device *netdev = pci_get_drvdata(pdev);
7323         struct e1000_adapter *adapter = netdev_priv(netdev);
7324         bool down = test_bit(__E1000_DOWN, &adapter->state);
7325
7326         e1000e_ptp_remove(adapter);
7327
7328         /* The timers may be rescheduled, so explicitly disable them
7329          * from being rescheduled.
7330          */
7331         if (!down)
7332                 set_bit(__E1000_DOWN, &adapter->state);
7333         del_timer_sync(&adapter->watchdog_timer);
7334         del_timer_sync(&adapter->phy_info_timer);
7335
7336         cancel_work_sync(&adapter->reset_task);
7337         cancel_work_sync(&adapter->watchdog_task);
7338         cancel_work_sync(&adapter->downshift_task);
7339         cancel_work_sync(&adapter->update_phy_task);
7340         cancel_work_sync(&adapter->print_hang_task);
7341
7342         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7343                 cancel_work_sync(&adapter->tx_hwtstamp_work);
7344                 if (adapter->tx_hwtstamp_skb) {
7345                         dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
7346                         adapter->tx_hwtstamp_skb = NULL;
7347                 }
7348         }
7349
7350         /* Don't lie to e1000_close() down the road. */
7351         if (!down)
7352                 clear_bit(__E1000_DOWN, &adapter->state);
7353         unregister_netdev(netdev);
7354
7355         if (pci_dev_run_wake(pdev))
7356                 pm_runtime_get_noresume(&pdev->dev);
7357
7358         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7359          * would have already happened in close and is redundant.
7360          */
7361         e1000e_release_hw_control(adapter);
7362
7363         e1000e_reset_interrupt_capability(adapter);
7364         kfree(adapter->tx_ring);
7365         kfree(adapter->rx_ring);
7366
7367         iounmap(adapter->hw.hw_addr);
7368         if ((adapter->hw.flash_address) &&
7369             (adapter->hw.mac.type < e1000_pch_spt))
7370                 iounmap(adapter->hw.flash_address);
7371         pci_release_selected_regions(pdev,
7372                                      pci_select_bars(pdev, IORESOURCE_MEM));
7373
7374         free_netdev(netdev);
7375
7376         /* AER disable */
7377         pci_disable_pcie_error_reporting(pdev);
7378
7379         pci_disable_device(pdev);
7380 }
7381
7382 /* PCI Error Recovery (ERS) */
7383 static const struct pci_error_handlers e1000_err_handler = {
7384         .error_detected = e1000_io_error_detected,
7385         .slot_reset = e1000_io_slot_reset,
7386         .resume = e1000_io_resume,
7387 };
7388
7389 static const struct pci_device_id e1000_pci_tbl[] = {
7390         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7391         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7392         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7393         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7394           board_82571 },
7395         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7396         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7397         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7398         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7399         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7400
7401         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7402         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7403         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7404         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7405
7406         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7407         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7408         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7409
7410         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7411         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7412         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7413
7414         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7415           board_80003es2lan },
7416         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7417           board_80003es2lan },
7418         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7419           board_80003es2lan },
7420         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7421           board_80003es2lan },
7422
7423         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7424         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7425         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7426         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7427         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7428         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7429         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7430         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7431
7432         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7433         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7434         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7435         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7436         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7437         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7438         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7439         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7440         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7441
7442         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7443         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7444         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7445
7446         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7447         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7448         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7449
7450         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7451         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7452         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7453         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7454
7455         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7456         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7457
7458         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7459         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7460         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7461         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7462         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7463         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7464         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7465         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7466         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7467         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7468         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7469         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7470
7471         { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7472 };
7473 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7474
7475 static const struct dev_pm_ops e1000_pm_ops = {
7476 #ifdef CONFIG_PM_SLEEP
7477         .suspend        = e1000e_pm_suspend,
7478         .resume         = e1000e_pm_resume,
7479         .freeze         = e1000e_pm_freeze,
7480         .thaw           = e1000e_pm_thaw,
7481         .poweroff       = e1000e_pm_suspend,
7482         .restore        = e1000e_pm_resume,
7483 #endif
7484         SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7485                            e1000e_pm_runtime_idle)
7486 };
7487
7488 /* PCI Device API Driver */
7489 static struct pci_driver e1000_driver = {
7490         .name     = e1000e_driver_name,
7491         .id_table = e1000_pci_tbl,
7492         .probe    = e1000_probe,
7493         .remove   = e1000_remove,
7494         .driver   = {
7495                 .pm = &e1000_pm_ops,
7496         },
7497         .shutdown = e1000_shutdown,
7498         .err_handler = &e1000_err_handler
7499 };
7500
7501 /**
7502  * e1000_init_module - Driver Registration Routine
7503  *
7504  * e1000_init_module is the first routine called when the driver is
7505  * loaded. All it does is register with the PCI subsystem.
7506  **/
7507 static int __init e1000_init_module(void)
7508 {
7509         int ret;
7510
7511         pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7512                 e1000e_driver_version);
7513         pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7514         ret = pci_register_driver(&e1000_driver);
7515
7516         return ret;
7517 }
7518 module_init(e1000_init_module);
7519
7520 /**
7521  * e1000_exit_module - Driver Exit Cleanup Routine
7522  *
7523  * e1000_exit_module is called just before the driver is removed
7524  * from memory.
7525  **/
7526 static void __exit e1000_exit_module(void)
7527 {
7528         pci_unregister_driver(&e1000_driver);
7529 }
7530 module_exit(e1000_exit_module);
7531
7532 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7533 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7534 MODULE_LICENSE("GPL");
7535 MODULE_VERSION(DRV_VERSION);
7536
7537 /* netdev.c */