kernel/drivers/net/ethernet/cavium/liquidio/octeon_main.h

   1 /**********************************************************************
   2  * Author: Cavium, Inc.
   3  *
   4  * Contact: support@cavium.com
   5  *          Please include "LiquidIO" in the subject.
   6  *
   7  * Copyright (c) 2003-2015 Cavium, Inc.
   8  *
   9  * This file is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License, Version 2, as
  11  * published by the Free Software Foundation.
  12  *
  13  * This file is distributed in the hope that it will be useful, but
  14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16  * NONINFRINGEMENT.  See the GNU General Public License for more
  17  * details.
  18  *
  19  * This file may also be available under a different license from Cavium.
  20  * Contact Cavium, Inc. for more information
  21  **********************************************************************/
  22
  23 /*! \file octeon_main.h
  24  *  \brief Host Driver: This file is included by all host driver source files
  25  *  to include common definitions.
  26  */
  27
  28 #ifndef _OCTEON_MAIN_H_
  29 #define  _OCTEON_MAIN_H_
  30
  31 #if BITS_PER_LONG == 32
  32 #define CVM_CAST64(v) ((long long)(v))
  33 #elif BITS_PER_LONG == 64
  34 #define CVM_CAST64(v) ((long long)(long)(v))
  35 #else
  36 #error "Unknown system architecture"
  37 #endif
  38
  39 #define DRV_NAME "LiquidIO"
  40
  41 /**
  42  * \brief determines if a given console has debug enabled.
  43  * @param console console to check
  44  * @returns  1 = enabled. 0 otherwise
  45  */
  46 int octeon_console_debug_enabled(u32 console);
  47
  48 /* BQL-related functions */
  49 void octeon_report_sent_bytes_to_bql(void *buf, int reqtype);
  50 void octeon_update_tx_completion_counters(void *buf, int reqtype,
  51                                           unsigned int *pkts_compl,
  52                                           unsigned int *bytes_compl);
  53 void octeon_report_tx_completion_to_bql(void *txq, unsigned int pkts_compl,
  54                                         unsigned int bytes_compl);
  55
  56 /** Swap 8B blocks */
  57 static inline void octeon_swap_8B_data(u64 *data, u32 blocks)
  58 {
  59         while (blocks) {
  60                 cpu_to_be64s(data);
  61                 blocks--;
  62                 data++;
  63         }
  64 }
  65
  66 /**
  67   * \brief unmaps a PCI BAR
  68   * @param oct Pointer to Octeon device
  69   * @param baridx bar index
  70   */
  71 static inline void octeon_unmap_pci_barx(struct octeon_device *oct, int baridx)
  72 {
  73         dev_dbg(&oct->pci_dev->dev, "Freeing PCI mapped regions for Bar%d\n",
  74                 baridx);
  75
  76         if (oct->mmio[baridx].done)
  77                 iounmap(oct->mmio[baridx].hw_addr);
  78
  79         if (oct->mmio[baridx].start)
  80                 pci_release_region(oct->pci_dev, baridx * 2);
  81 }
  82
  83 /**
  84  * \brief maps a PCI BAR
  85  * @param oct Pointer to Octeon device
  86  * @param baridx bar index
  87  * @param max_map_len maximum length of mapped memory
  88  */
  89 static inline int octeon_map_pci_barx(struct octeon_device *oct,
  90                                       int baridx, int max_map_len)
  91 {
  92         u32 mapped_len = 0;
  93
  94         if (pci_request_region(oct->pci_dev, baridx * 2, DRV_NAME)) {
  95                 dev_err(&oct->pci_dev->dev, "pci_request_region failed for bar %d\n",
  96                         baridx);
  97                 return 1;
  98         }
  99
 100         oct->mmio[baridx].start = pci_resource_start(oct->pci_dev, baridx * 2);
 101         oct->mmio[baridx].len = pci_resource_len(oct->pci_dev, baridx * 2);
 102
 103         mapped_len = oct->mmio[baridx].len;
 104         if (!mapped_len)
 105                 return 1;
 106
 107         if (max_map_len && (mapped_len > max_map_len))
 108                 mapped_len = max_map_len;
 109
 110         oct->mmio[baridx].hw_addr =
 111                 ioremap(oct->mmio[baridx].start, mapped_len);
 112         oct->mmio[baridx].mapped_len = mapped_len;
 113
 114         dev_dbg(&oct->pci_dev->dev, "BAR%d start: 0x%llx mapped %u of %u bytes\n",
 115                 baridx, oct->mmio[baridx].start, mapped_len,
 116                 oct->mmio[baridx].len);
 117
 118         if (!oct->mmio[baridx].hw_addr) {
 119                 dev_err(&oct->pci_dev->dev, "error ioremap for bar %d\n",
 120                         baridx);
 121                 return 1;
 122         }
 123         oct->mmio[baridx].done = 1;
 124
 125         return 0;
 126 }
 127
 128 static inline void *
 129 cnnic_alloc_aligned_dma(struct pci_dev *pci_dev,
 130                         u32 size,
 131                         u32 *alloc_size,
 132                         size_t *orig_ptr,
 133                         size_t *dma_addr __attribute__((unused)))
 134 {
 135         int retries = 0;
 136         void *ptr = NULL;
 137
 138 #define OCTEON_MAX_ALLOC_RETRIES     1
 139         do {
 140                 ptr =
 141                     (void *)__get_free_pages(GFP_KERNEL,
 142                                              get_order(size));
 143                 if ((unsigned long)ptr & 0x07) {
 144                         free_pages((unsigned long)ptr, get_order(size));
 145                         ptr = NULL;
 146                         /* Increment the size required if the first
 147                          * attempt failed.
 148                          */
 149                         if (!retries)
 150                                 size += 7;
 151                 }
 152                 retries++;
 153         } while ((retries <= OCTEON_MAX_ALLOC_RETRIES) && !ptr);
 154
 155         *alloc_size = size;
 156         *orig_ptr = (unsigned long)ptr;
 157         if ((unsigned long)ptr & 0x07)
 158                 ptr = (void *)(((unsigned long)ptr + 7) & ~(7UL));
 159         return ptr;
 160 }
 161
 162 #define cnnic_free_aligned_dma(pci_dev, ptr, size, orig_ptr, dma_addr) \
 163                 free_pages(orig_ptr, get_order(size))
 164
 165 static inline void
 166 sleep_cond(wait_queue_head_t *wait_queue, int *condition)
 167 {
 168         wait_queue_t we;
 169
 170         init_waitqueue_entry(&we, current);
 171         add_wait_queue(wait_queue, &we);
 172         while (!(ACCESS_ONCE(*condition))) {
 173                 set_current_state(TASK_INTERRUPTIBLE);
 174                 if (signal_pending(current))
 175                         goto out;
 176                 schedule();
 177         }
 178 out:
 179         set_current_state(TASK_RUNNING);
 180         remove_wait_queue(wait_queue, &we);
 181 }
 182
 183 static inline void
 184 sleep_atomic_cond(wait_queue_head_t *waitq, atomic_t *pcond)
 185 {
 186         wait_queue_t we;
 187
 188         init_waitqueue_entry(&we, current);
 189         add_wait_queue(waitq, &we);
 190         while (!atomic_read(pcond)) {
 191                 set_current_state(TASK_INTERRUPTIBLE);
 192                 if (signal_pending(current))
 193                         goto out;
 194                 schedule();
 195         }
 196 out:
 197         set_current_state(TASK_RUNNING);
 198         remove_wait_queue(waitq, &we);
 199 }
 200
 201 /* Gives up the CPU for a timeout period.
 202  * Check that the condition is not true before we go to sleep for a
 203  * timeout period.
 204  */
 205 static inline void
 206 sleep_timeout_cond(wait_queue_head_t *wait_queue,
 207                    int *condition,
 208                    int timeout)
 209 {
 210         wait_queue_t we;
 211
 212         init_waitqueue_entry(&we, current);
 213         add_wait_queue(wait_queue, &we);
 214         set_current_state(TASK_INTERRUPTIBLE);
 215         if (!(*condition))
 216                 schedule_timeout(timeout);
 217         set_current_state(TASK_RUNNING);
 218         remove_wait_queue(wait_queue, &we);
 219 }
 220
 221 #ifndef ROUNDUP4
 222 #define ROUNDUP4(val) (((val) + 3) & 0xfffffffc)
 223 #endif
 224
 225 #ifndef ROUNDUP8
 226 #define ROUNDUP8(val) (((val) + 7) & 0xfffffff8)
 227 #endif
 228
 229 #ifndef ROUNDUP16
 230 #define ROUNDUP16(val) (((val) + 15) & 0xfffffff0)
 231 #endif
 232
 233 #ifndef ROUNDUP128
 234 #define ROUNDUP128(val) (((val) + 127) & 0xffffff80)
 235 #endif
 236
 237 #endif /* _OCTEON_MAIN_H_ */