kernel/drivers/net/ethernet/broadcom/bcmsysport.c

   1 /*
   2  * Broadcom BCM7xxx System Port Ethernet MAC driver
   3  *
   4  * Copyright (C) 2014 Broadcom Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/netdevice.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/of.h>
  21 #include <linux/of_net.h>
  22 #include <linux/of_mdio.h>
  23 #include <linux/phy.h>
  24 #include <linux/phy_fixed.h>
  25 #include <net/ip.h>
  26 #include <net/ipv6.h>
  27
  28 #include "bcmsysport.h"
  29
  30 /* I/O accessors register helpers */
  31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
  32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off)  \
  33 {                                                                       \
  34         u32 reg = __raw_readl(priv->base + offset + off);               \
  35         return reg;                                                     \
  36 }                                                                       \
  37 static inline void name##_writel(struct bcm_sysport_priv *priv,         \
  38                                   u32 val, u32 off)                     \
  39 {                                                                       \
  40         __raw_writel(val, priv->base + offset + off);                   \
  41 }                                                                       \
  42
  43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
  44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
  45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
  46 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
  47 BCM_SYSPORT_IO_MACRO(rdma, SYS_PORT_RDMA_OFFSET);
  48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
  49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
  50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
  51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
  52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
  53
  54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
  55  * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
  56   */
  57 #define BCM_SYSPORT_INTR_L2(which)      \
  58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
  59                                                 u32 mask)               \
  60 {                                                                       \
  61         intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);     \
  62         priv->irq##which##_mask &= ~(mask);                             \
  63 }                                                                       \
  64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
  65                                                 u32 mask)               \
  66 {                                                                       \
  67         intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET);      \
  68         priv->irq##which##_mask |= (mask);                              \
  69 }                                                                       \
  70
  71 BCM_SYSPORT_INTR_L2(0)
  72 BCM_SYSPORT_INTR_L2(1)
  73
  74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
  75  * nanoseconds), so keep the check for 64-bits explicit here to save
  76  * one register write per-packet on 32-bits platforms.
  77  */
  78 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
  79                                      void __iomem *d,
  80                                      dma_addr_t addr)
  81 {
  82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
  83         __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
  84                      d + DESC_ADDR_HI_STATUS_LEN);
  85 #endif
  86         __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO);
  87 }
  88
  89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
  90                                              struct dma_desc *desc,
  91                                              unsigned int port)
  92 {
  93         /* Ports are latched, so write upper address first */
  94         tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
  95         tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
  96 }
  97
  98 /* Ethtool operations */
  99 static int bcm_sysport_set_settings(struct net_device *dev,
 100                                     struct ethtool_cmd *cmd)
 101 {
 102         struct bcm_sysport_priv *priv = netdev_priv(dev);
 103
 104         if (!netif_running(dev))
 105                 return -EINVAL;
 106
 107         return phy_ethtool_sset(priv->phydev, cmd);
 108 }
 109
 110 static int bcm_sysport_get_settings(struct net_device *dev,
 111                                     struct ethtool_cmd *cmd)
 112 {
 113         struct bcm_sysport_priv *priv = netdev_priv(dev);
 114
 115         if (!netif_running(dev))
 116                 return -EINVAL;
 117
 118         return phy_ethtool_gset(priv->phydev, cmd);
 119 }
 120
 121 static int bcm_sysport_set_rx_csum(struct net_device *dev,
 122                                    netdev_features_t wanted)
 123 {
 124         struct bcm_sysport_priv *priv = netdev_priv(dev);
 125         u32 reg;
 126
 127         priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
 128         reg = rxchk_readl(priv, RXCHK_CONTROL);
 129         if (priv->rx_chk_en)
 130                 reg |= RXCHK_EN;
 131         else
 132                 reg &= ~RXCHK_EN;
 133
 134         /* If UniMAC forwards CRC, we need to skip over it to get
 135          * a valid CHK bit to be set in the per-packet status word
 136          */
 137         if (priv->rx_chk_en && priv->crc_fwd)
 138                 reg |= RXCHK_SKIP_FCS;
 139         else
 140                 reg &= ~RXCHK_SKIP_FCS;
 141
 142         /* If Broadcom tags are enabled (e.g: using a switch), make
 143          * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
 144          * tag after the Ethernet MAC Source Address.
 145          */
 146         if (netdev_uses_dsa(dev))
 147                 reg |= RXCHK_BRCM_TAG_EN;
 148         else
 149                 reg &= ~RXCHK_BRCM_TAG_EN;
 150
 151         rxchk_writel(priv, reg, RXCHK_CONTROL);
 152
 153         return 0;
 154 }
 155
 156 static int bcm_sysport_set_tx_csum(struct net_device *dev,
 157                                    netdev_features_t wanted)
 158 {
 159         struct bcm_sysport_priv *priv = netdev_priv(dev);
 160         u32 reg;
 161
 162         /* Hardware transmit checksum requires us to enable the Transmit status
 163          * block prepended to the packet contents
 164          */
 165         priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
 166         reg = tdma_readl(priv, TDMA_CONTROL);
 167         if (priv->tsb_en)
 168                 reg |= TSB_EN;
 169         else
 170                 reg &= ~TSB_EN;
 171         tdma_writel(priv, reg, TDMA_CONTROL);
 172
 173         return 0;
 174 }
 175
 176 static int bcm_sysport_set_features(struct net_device *dev,
 177                                     netdev_features_t features)
 178 {
 179         netdev_features_t changed = features ^ dev->features;
 180         netdev_features_t wanted = dev->wanted_features;
 181         int ret = 0;
 182
 183         if (changed & NETIF_F_RXCSUM)
 184                 ret = bcm_sysport_set_rx_csum(dev, wanted);
 185         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
 186                 ret = bcm_sysport_set_tx_csum(dev, wanted);
 187
 188         return ret;
 189 }
 190
 191 /* Hardware counters must be kept in sync because the order/offset
 192  * is important here (order in structure declaration = order in hardware)
 193  */
 194 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
 195         /* general stats */
 196         STAT_NETDEV(rx_packets),
 197         STAT_NETDEV(tx_packets),
 198         STAT_NETDEV(rx_bytes),
 199         STAT_NETDEV(tx_bytes),
 200         STAT_NETDEV(rx_errors),
 201         STAT_NETDEV(tx_errors),
 202         STAT_NETDEV(rx_dropped),
 203         STAT_NETDEV(tx_dropped),
 204         STAT_NETDEV(multicast),
 205         /* UniMAC RSV counters */
 206         STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
 207         STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
 208         STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
 209         STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
 210         STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
 211         STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
 212         STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
 213         STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
 214         STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
 215         STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
 216         STAT_MIB_RX("rx_pkts", mib.rx.pkt),
 217         STAT_MIB_RX("rx_bytes", mib.rx.bytes),
 218         STAT_MIB_RX("rx_multicast", mib.rx.mca),
 219         STAT_MIB_RX("rx_broadcast", mib.rx.bca),
 220         STAT_MIB_RX("rx_fcs", mib.rx.fcs),
 221         STAT_MIB_RX("rx_control", mib.rx.cf),
 222         STAT_MIB_RX("rx_pause", mib.rx.pf),
 223         STAT_MIB_RX("rx_unknown", mib.rx.uo),
 224         STAT_MIB_RX("rx_align", mib.rx.aln),
 225         STAT_MIB_RX("rx_outrange", mib.rx.flr),
 226         STAT_MIB_RX("rx_code", mib.rx.cde),
 227         STAT_MIB_RX("rx_carrier", mib.rx.fcr),
 228         STAT_MIB_RX("rx_oversize", mib.rx.ovr),
 229         STAT_MIB_RX("rx_jabber", mib.rx.jbr),
 230         STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
 231         STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
 232         STAT_MIB_RX("rx_unicast", mib.rx.uc),
 233         STAT_MIB_RX("rx_ppp", mib.rx.ppp),
 234         STAT_MIB_RX("rx_crc", mib.rx.rcrc),
 235         /* UniMAC TSV counters */
 236         STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
 237         STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
 238         STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
 239         STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
 240         STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
 241         STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
 242         STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
 243         STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
 244         STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
 245         STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
 246         STAT_MIB_TX("tx_pkts", mib.tx.pkts),
 247         STAT_MIB_TX("tx_multicast", mib.tx.mca),
 248         STAT_MIB_TX("tx_broadcast", mib.tx.bca),
 249         STAT_MIB_TX("tx_pause", mib.tx.pf),
 250         STAT_MIB_TX("tx_control", mib.tx.cf),
 251         STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
 252         STAT_MIB_TX("tx_oversize", mib.tx.ovr),
 253         STAT_MIB_TX("tx_defer", mib.tx.drf),
 254         STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
 255         STAT_MIB_TX("tx_single_col", mib.tx.scl),
 256         STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
 257         STAT_MIB_TX("tx_late_col", mib.tx.lcl),
 258         STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
 259         STAT_MIB_TX("tx_frags", mib.tx.frg),
 260         STAT_MIB_TX("tx_total_col", mib.tx.ncl),
 261         STAT_MIB_TX("tx_jabber", mib.tx.jbr),
 262         STAT_MIB_TX("tx_bytes", mib.tx.bytes),
 263         STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
 264         STAT_MIB_TX("tx_unicast", mib.tx.uc),
 265         /* UniMAC RUNT counters */
 266         STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
 267         STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
 268         STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
 269         STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
 270         /* RXCHK misc statistics */
 271         STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
 272         STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
 273                    RXCHK_OTHER_DISC_CNTR),
 274         /* RBUF misc statistics */
 275         STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
 276         STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
 277         STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
 278         STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
 279         STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
 280 };
 281
 282 #define BCM_SYSPORT_STATS_LEN   ARRAY_SIZE(bcm_sysport_gstrings_stats)
 283
 284 static void bcm_sysport_get_drvinfo(struct net_device *dev,
 285                                     struct ethtool_drvinfo *info)
 286 {
 287         strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
 288         strlcpy(info->version, "0.1", sizeof(info->version));
 289         strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
 290 }
 291
 292 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
 293 {
 294         struct bcm_sysport_priv *priv = netdev_priv(dev);
 295
 296         return priv->msg_enable;
 297 }
 298
 299 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
 300 {
 301         struct bcm_sysport_priv *priv = netdev_priv(dev);
 302
 303         priv->msg_enable = enable;
 304 }
 305
 306 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
 307 {
 308         switch (string_set) {
 309         case ETH_SS_STATS:
 310                 return BCM_SYSPORT_STATS_LEN;
 311         default:
 312                 return -EOPNOTSUPP;
 313         }
 314 }
 315
 316 static void bcm_sysport_get_strings(struct net_device *dev,
 317                                     u32 stringset, u8 *data)
 318 {
 319         int i;
 320
 321         switch (stringset) {
 322         case ETH_SS_STATS:
 323                 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 324                         memcpy(data + i * ETH_GSTRING_LEN,
 325                                bcm_sysport_gstrings_stats[i].stat_string,
 326                                ETH_GSTRING_LEN);
 327                 }
 328                 break;
 329         default:
 330                 break;
 331         }
 332 }
 333
 334 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
 335 {
 336         int i, j = 0;
 337
 338         for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 339                 const struct bcm_sysport_stats *s;
 340                 u8 offset = 0;
 341                 u32 val = 0;
 342                 char *p;
 343
 344                 s = &bcm_sysport_gstrings_stats[i];
 345                 switch (s->type) {
 346                 case BCM_SYSPORT_STAT_NETDEV:
 347                 case BCM_SYSPORT_STAT_SOFT:
 348                         continue;
 349                 case BCM_SYSPORT_STAT_MIB_RX:
 350                 case BCM_SYSPORT_STAT_MIB_TX:
 351                 case BCM_SYSPORT_STAT_RUNT:
 352                         if (s->type != BCM_SYSPORT_STAT_MIB_RX)
 353                                 offset = UMAC_MIB_STAT_OFFSET;
 354                         val = umac_readl(priv, UMAC_MIB_START + j + offset);
 355                         break;
 356                 case BCM_SYSPORT_STAT_RXCHK:
 357                         val = rxchk_readl(priv, s->reg_offset);
 358                         if (val == ~0)
 359                                 rxchk_writel(priv, 0, s->reg_offset);
 360                         break;
 361                 case BCM_SYSPORT_STAT_RBUF:
 362                         val = rbuf_readl(priv, s->reg_offset);
 363                         if (val == ~0)
 364                                 rbuf_writel(priv, 0, s->reg_offset);
 365                         break;
 366                 }
 367
 368                 j += s->stat_sizeof;
 369                 p = (char *)priv + s->stat_offset;
 370                 *(u32 *)p = val;
 371         }
 372
 373         netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
 374 }
 375
 376 static void bcm_sysport_get_stats(struct net_device *dev,
 377                                   struct ethtool_stats *stats, u64 *data)
 378 {
 379         struct bcm_sysport_priv *priv = netdev_priv(dev);
 380         int i;
 381
 382         if (netif_running(dev))
 383                 bcm_sysport_update_mib_counters(priv);
 384
 385         for (i =  0; i < BCM_SYSPORT_STATS_LEN; i++) {
 386                 const struct bcm_sysport_stats *s;
 387                 char *p;
 388
 389                 s = &bcm_sysport_gstrings_stats[i];
 390                 if (s->type == BCM_SYSPORT_STAT_NETDEV)
 391                         p = (char *)&dev->stats;
 392                 else
 393                         p = (char *)priv;
 394                 p += s->stat_offset;
 395                 data[i] = *(u32 *)p;
 396         }
 397 }
 398
 399 static void bcm_sysport_get_wol(struct net_device *dev,
 400                                 struct ethtool_wolinfo *wol)
 401 {
 402         struct bcm_sysport_priv *priv = netdev_priv(dev);
 403         u32 reg;
 404
 405         wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 406         wol->wolopts = priv->wolopts;
 407
 408         if (!(priv->wolopts & WAKE_MAGICSECURE))
 409                 return;
 410
 411         /* Return the programmed SecureOn password */
 412         reg = umac_readl(priv, UMAC_PSW_MS);
 413         put_unaligned_be16(reg, &wol->sopass[0]);
 414         reg = umac_readl(priv, UMAC_PSW_LS);
 415         put_unaligned_be32(reg, &wol->sopass[2]);
 416 }
 417
 418 static int bcm_sysport_set_wol(struct net_device *dev,
 419                                struct ethtool_wolinfo *wol)
 420 {
 421         struct bcm_sysport_priv *priv = netdev_priv(dev);
 422         struct device *kdev = &priv->pdev->dev;
 423         u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 424
 425         if (!device_can_wakeup(kdev))
 426                 return -ENOTSUPP;
 427
 428         if (wol->wolopts & ~supported)
 429                 return -EINVAL;
 430
 431         /* Program the SecureOn password */
 432         if (wol->wolopts & WAKE_MAGICSECURE) {
 433                 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
 434                             UMAC_PSW_MS);
 435                 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
 436                             UMAC_PSW_LS);
 437         }
 438
 439         /* Flag the device and relevant IRQ as wakeup capable */
 440         if (wol->wolopts) {
 441                 device_set_wakeup_enable(kdev, 1);
 442                 if (priv->wol_irq_disabled)
 443                         enable_irq_wake(priv->wol_irq);
 444                 priv->wol_irq_disabled = 0;
 445         } else {
 446                 device_set_wakeup_enable(kdev, 0);
 447                 /* Avoid unbalanced disable_irq_wake calls */
 448                 if (!priv->wol_irq_disabled)
 449                         disable_irq_wake(priv->wol_irq);
 450                 priv->wol_irq_disabled = 1;
 451         }
 452
 453         priv->wolopts = wol->wolopts;
 454
 455         return 0;
 456 }
 457
 458 static int bcm_sysport_get_coalesce(struct net_device *dev,
 459                                     struct ethtool_coalesce *ec)
 460 {
 461         struct bcm_sysport_priv *priv = netdev_priv(dev);
 462         u32 reg;
 463
 464         reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
 465
 466         ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
 467         ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
 468
 469         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
 470
 471         ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
 472         ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
 473
 474         return 0;
 475 }
 476
 477 static int bcm_sysport_set_coalesce(struct net_device *dev,
 478                                     struct ethtool_coalesce *ec)
 479 {
 480         struct bcm_sysport_priv *priv = netdev_priv(dev);
 481         unsigned int i;
 482         u32 reg;
 483
 484         /* Base system clock is 125Mhz, DMA timeout is this reference clock
 485          * divided by 1024, which yield roughly 8.192 us, our maximum value has
 486          * to fit in the RING_TIMEOUT_MASK (16 bits).
 487          */
 488         if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
 489             ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
 490             ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
 491             ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
 492                 return -EINVAL;
 493
 494         if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
 495             (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0))
 496                 return -EINVAL;
 497
 498         for (i = 0; i < dev->num_tx_queues; i++) {
 499                 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(i));
 500                 reg &= ~(RING_INTR_THRESH_MASK |
 501                          RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
 502                 reg |= ec->tx_max_coalesced_frames;
 503                 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
 504                          RING_TIMEOUT_SHIFT;
 505                 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(i));
 506         }
 507
 508         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
 509         reg &= ~(RDMA_INTR_THRESH_MASK |
 510                  RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
 511         reg |= ec->rx_max_coalesced_frames;
 512         reg |= DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000, 8192) <<
 513                             RDMA_TIMEOUT_SHIFT;
 514         rdma_writel(priv, reg, RDMA_MBDONE_INTR);
 515
 516         return 0;
 517 }
 518
 519 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
 520 {
 521         dev_kfree_skb_any(cb->skb);
 522         cb->skb = NULL;
 523         dma_unmap_addr_set(cb, dma_addr, 0);
 524 }
 525
 526 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
 527                                              struct bcm_sysport_cb *cb)
 528 {
 529         struct device *kdev = &priv->pdev->dev;
 530         struct net_device *ndev = priv->netdev;
 531         struct sk_buff *skb, *rx_skb;
 532         dma_addr_t mapping;
 533
 534         /* Allocate a new SKB for a new packet */
 535         skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
 536         if (!skb) {
 537                 priv->mib.alloc_rx_buff_failed++;
 538                 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
 539                 return NULL;
 540         }
 541
 542         mapping = dma_map_single(kdev, skb->data,
 543                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 544         if (dma_mapping_error(kdev, mapping)) {
 545                 priv->mib.rx_dma_failed++;
 546                 dev_kfree_skb_any(skb);
 547                 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
 548                 return NULL;
 549         }
 550
 551         /* Grab the current SKB on the ring */
 552         rx_skb = cb->skb;
 553         if (likely(rx_skb))
 554                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 555                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 556
 557         /* Put the new SKB on the ring */
 558         cb->skb = skb;
 559         dma_unmap_addr_set(cb, dma_addr, mapping);
 560         dma_desc_set_addr(priv, cb->bd_addr, mapping);
 561
 562         netif_dbg(priv, rx_status, ndev, "RX refill\n");
 563
 564         /* Return the current SKB to the caller */
 565         return rx_skb;
 566 }
 567
 568 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
 569 {
 570         struct bcm_sysport_cb *cb;
 571         struct sk_buff *skb;
 572         unsigned int i;
 573
 574         for (i = 0; i < priv->num_rx_bds; i++) {
 575                 cb = &priv->rx_cbs[i];
 576                 skb = bcm_sysport_rx_refill(priv, cb);
 577                 if (skb)
 578                         dev_kfree_skb(skb);
 579                 if (!cb->skb)
 580                         return -ENOMEM;
 581         }
 582
 583         return 0;
 584 }
 585
 586 /* Poll the hardware for up to budget packets to process */
 587 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
 588                                         unsigned int budget)
 589 {
 590         struct net_device *ndev = priv->netdev;
 591         unsigned int processed = 0, to_process;
 592         struct bcm_sysport_cb *cb;
 593         struct sk_buff *skb;
 594         unsigned int p_index;
 595         u16 len, status;
 596         struct bcm_rsb *rsb;
 597
 598         /* Determine how much we should process since last call */
 599         p_index = rdma_readl(priv, RDMA_PROD_INDEX);
 600         p_index &= RDMA_PROD_INDEX_MASK;
 601
 602         if (p_index < priv->rx_c_index)
 603                 to_process = (RDMA_CONS_INDEX_MASK + 1) -
 604                         priv->rx_c_index + p_index;
 605         else
 606                 to_process = p_index - priv->rx_c_index;
 607
 608         netif_dbg(priv, rx_status, ndev,
 609                   "p_index=%d rx_c_index=%d to_process=%d\n",
 610                   p_index, priv->rx_c_index, to_process);
 611
 612         while ((processed < to_process) && (processed < budget)) {
 613                 cb = &priv->rx_cbs[priv->rx_read_ptr];
 614                 skb = bcm_sysport_rx_refill(priv, cb);
 615
 616
 617                 /* We do not have a backing SKB, so we do not a corresponding
 618                  * DMA mapping for this incoming packet since
 619                  * bcm_sysport_rx_refill always either has both skb and mapping
 620                  * or none.
 621                  */
 622                 if (unlikely(!skb)) {
 623                         netif_err(priv, rx_err, ndev, "out of memory!\n");
 624                         ndev->stats.rx_dropped++;
 625                         ndev->stats.rx_errors++;
 626                         goto next;
 627                 }
 628
 629                 /* Extract the Receive Status Block prepended */
 630                 rsb = (struct bcm_rsb *)skb->data;
 631                 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
 632                 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
 633                           DESC_STATUS_MASK;
 634
 635                 netif_dbg(priv, rx_status, ndev,
 636                           "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
 637                           p_index, priv->rx_c_index, priv->rx_read_ptr,
 638                           len, status);
 639
 640                 if (unlikely(len > RX_BUF_LENGTH)) {
 641                         netif_err(priv, rx_status, ndev, "oversized packet\n");
 642                         ndev->stats.rx_length_errors++;
 643                         ndev->stats.rx_errors++;
 644                         dev_kfree_skb_any(skb);
 645                         goto next;
 646                 }
 647
 648                 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
 649                         netif_err(priv, rx_status, ndev, "fragmented packet!\n");
 650                         ndev->stats.rx_dropped++;
 651                         ndev->stats.rx_errors++;
 652                         dev_kfree_skb_any(skb);
 653                         goto next;
 654                 }
 655
 656                 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
 657                         netif_err(priv, rx_err, ndev, "error packet\n");
 658                         if (status & RX_STATUS_OVFLOW)
 659                                 ndev->stats.rx_over_errors++;
 660                         ndev->stats.rx_dropped++;
 661                         ndev->stats.rx_errors++;
 662                         dev_kfree_skb_any(skb);
 663                         goto next;
 664                 }
 665
 666                 skb_put(skb, len);
 667
 668                 /* Hardware validated our checksum */
 669                 if (likely(status & DESC_L4_CSUM))
 670                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 671
 672                 /* Hardware pre-pends packets with 2bytes before Ethernet
 673                  * header plus we have the Receive Status Block, strip off all
 674                  * of this from the SKB.
 675                  */
 676                 skb_pull(skb, sizeof(*rsb) + 2);
 677                 len -= (sizeof(*rsb) + 2);
 678
 679                 /* UniMAC may forward CRC */
 680                 if (priv->crc_fwd) {
 681                         skb_trim(skb, len - ETH_FCS_LEN);
 682                         len -= ETH_FCS_LEN;
 683                 }
 684
 685                 skb->protocol = eth_type_trans(skb, ndev);
 686                 ndev->stats.rx_packets++;
 687                 ndev->stats.rx_bytes += len;
 688
 689                 napi_gro_receive(&priv->napi, skb);
 690 next:
 691                 processed++;
 692                 priv->rx_read_ptr++;
 693
 694                 if (priv->rx_read_ptr == priv->num_rx_bds)
 695                         priv->rx_read_ptr = 0;
 696         }
 697
 698         return processed;
 699 }
 700
 701 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv *priv,
 702                                        struct bcm_sysport_cb *cb,
 703                                        unsigned int *bytes_compl,
 704                                        unsigned int *pkts_compl)
 705 {
 706         struct device *kdev = &priv->pdev->dev;
 707         struct net_device *ndev = priv->netdev;
 708
 709         if (cb->skb) {
 710                 ndev->stats.tx_bytes += cb->skb->len;
 711                 *bytes_compl += cb->skb->len;
 712                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 713                                  dma_unmap_len(cb, dma_len),
 714                                  DMA_TO_DEVICE);
 715                 ndev->stats.tx_packets++;
 716                 (*pkts_compl)++;
 717                 bcm_sysport_free_cb(cb);
 718         /* SKB fragment */
 719         } else if (dma_unmap_addr(cb, dma_addr)) {
 720                 ndev->stats.tx_bytes += dma_unmap_len(cb, dma_len);
 721                 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
 722                                dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
 723                 dma_unmap_addr_set(cb, dma_addr, 0);
 724         }
 725 }
 726
 727 /* Reclaim queued SKBs for transmission completion, lockless version */
 728 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 729                                              struct bcm_sysport_tx_ring *ring)
 730 {
 731         struct net_device *ndev = priv->netdev;
 732         unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
 733         unsigned int pkts_compl = 0, bytes_compl = 0;
 734         struct bcm_sysport_cb *cb;
 735         u32 hw_ind;
 736
 737         /* Compute how many descriptors have been processed since last call */
 738         hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
 739         c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
 740         ring->p_index = (hw_ind & RING_PROD_INDEX_MASK);
 741
 742         last_c_index = ring->c_index;
 743         num_tx_cbs = ring->size;
 744
 745         c_index &= (num_tx_cbs - 1);
 746
 747         if (c_index >= last_c_index)
 748                 last_tx_cn = c_index - last_c_index;
 749         else
 750                 last_tx_cn = num_tx_cbs - last_c_index + c_index;
 751
 752         netif_dbg(priv, tx_done, ndev,
 753                   "ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
 754                   ring->index, c_index, last_tx_cn, last_c_index);
 755
 756         while (last_tx_cn-- > 0) {
 757                 cb = ring->cbs + last_c_index;
 758                 bcm_sysport_tx_reclaim_one(priv, cb, &bytes_compl, &pkts_compl);
 759
 760                 ring->desc_count++;
 761                 last_c_index++;
 762                 last_c_index &= (num_tx_cbs - 1);
 763         }
 764
 765         ring->c_index = c_index;
 766
 767         netif_dbg(priv, tx_done, ndev,
 768                   "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
 769                   ring->index, ring->c_index, pkts_compl, bytes_compl);
 770
 771         return pkts_compl;
 772 }
 773
 774 /* Locked version of the per-ring TX reclaim routine */
 775 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 776                                            struct bcm_sysport_tx_ring *ring)
 777 {
 778         struct netdev_queue *txq;
 779         unsigned int released;
 780         unsigned long flags;
 781
 782         txq = netdev_get_tx_queue(priv->netdev, ring->index);
 783
 784         spin_lock_irqsave(&ring->lock, flags);
 785         released = __bcm_sysport_tx_reclaim(priv, ring);
 786         if (released)
 787                 netif_tx_wake_queue(txq);
 788
 789         spin_unlock_irqrestore(&ring->lock, flags);
 790
 791         return released;
 792 }
 793
 794 /* Locked version of the per-ring TX reclaim, but does not wake the queue */
 795 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
 796                                  struct bcm_sysport_tx_ring *ring)
 797 {
 798         unsigned long flags;
 799
 800         spin_lock_irqsave(&ring->lock, flags);
 801         __bcm_sysport_tx_reclaim(priv, ring);
 802         spin_unlock_irqrestore(&ring->lock, flags);
 803 }
 804
 805 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
 806 {
 807         struct bcm_sysport_tx_ring *ring =
 808                 container_of(napi, struct bcm_sysport_tx_ring, napi);
 809         unsigned int work_done = 0;
 810
 811         work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
 812
 813         if (work_done == 0) {
 814                 napi_complete(napi);
 815                 /* re-enable TX interrupt */
 816                 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
 817
 818                 return 0;
 819         }
 820
 821         return budget;
 822 }
 823
 824 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
 825 {
 826         unsigned int q;
 827
 828         for (q = 0; q < priv->netdev->num_tx_queues; q++)
 829                 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
 830 }
 831
 832 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
 833 {
 834         struct bcm_sysport_priv *priv =
 835                 container_of(napi, struct bcm_sysport_priv, napi);
 836         unsigned int work_done = 0;
 837
 838         work_done = bcm_sysport_desc_rx(priv, budget);
 839
 840         priv->rx_c_index += work_done;
 841         priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
 842         rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
 843
 844         if (work_done < budget) {
 845                 napi_complete(napi);
 846                 /* re-enable RX interrupts */
 847                 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
 848         }
 849
 850         return work_done;
 851 }
 852
 853 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
 854 {
 855         u32 reg;
 856
 857         /* Stop monitoring MPD interrupt */
 858         intrl2_0_mask_set(priv, INTRL2_0_MPD);
 859
 860         /* Clear the MagicPacket detection logic */
 861         reg = umac_readl(priv, UMAC_MPD_CTRL);
 862         reg &= ~MPD_EN;
 863         umac_writel(priv, reg, UMAC_MPD_CTRL);
 864
 865         netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
 866 }
 867
 868 /* RX and misc interrupt routine */
 869 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
 870 {
 871         struct net_device *dev = dev_id;
 872         struct bcm_sysport_priv *priv = netdev_priv(dev);
 873
 874         priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
 875                           ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
 876         intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
 877
 878         if (unlikely(priv->irq0_stat == 0)) {
 879                 netdev_warn(priv->netdev, "spurious RX interrupt\n");
 880                 return IRQ_NONE;
 881         }
 882
 883         if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
 884                 if (likely(napi_schedule_prep(&priv->napi))) {
 885                         /* disable RX interrupts */
 886                         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
 887                         __napi_schedule(&priv->napi);
 888                 }
 889         }
 890
 891         /* TX ring is full, perform a full reclaim since we do not know
 892          * which one would trigger this interrupt
 893          */
 894         if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
 895                 bcm_sysport_tx_reclaim_all(priv);
 896
 897         if (priv->irq0_stat & INTRL2_0_MPD) {
 898                 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
 899                 bcm_sysport_resume_from_wol(priv);
 900         }
 901
 902         return IRQ_HANDLED;
 903 }
 904
 905 /* TX interrupt service routine */
 906 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
 907 {
 908         struct net_device *dev = dev_id;
 909         struct bcm_sysport_priv *priv = netdev_priv(dev);
 910         struct bcm_sysport_tx_ring *txr;
 911         unsigned int ring;
 912
 913         priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
 914                                 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
 915         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
 916
 917         if (unlikely(priv->irq1_stat == 0)) {
 918                 netdev_warn(priv->netdev, "spurious TX interrupt\n");
 919                 return IRQ_NONE;
 920         }
 921
 922         for (ring = 0; ring < dev->num_tx_queues; ring++) {
 923                 if (!(priv->irq1_stat & BIT(ring)))
 924                         continue;
 925
 926                 txr = &priv->tx_rings[ring];
 927
 928                 if (likely(napi_schedule_prep(&txr->napi))) {
 929                         intrl2_1_mask_set(priv, BIT(ring));
 930                         __napi_schedule(&txr->napi);
 931                 }
 932         }
 933
 934         return IRQ_HANDLED;
 935 }
 936
 937 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
 938 {
 939         struct bcm_sysport_priv *priv = dev_id;
 940
 941         pm_wakeup_event(&priv->pdev->dev, 0);
 942
 943         return IRQ_HANDLED;
 944 }
 945
 946 #ifdef CONFIG_NET_POLL_CONTROLLER
 947 static void bcm_sysport_poll_controller(struct net_device *dev)
 948 {
 949         struct bcm_sysport_priv *priv = netdev_priv(dev);
 950
 951         disable_irq(priv->irq0);
 952         bcm_sysport_rx_isr(priv->irq0, priv);
 953         enable_irq(priv->irq0);
 954
 955         disable_irq(priv->irq1);
 956         bcm_sysport_tx_isr(priv->irq1, priv);
 957         enable_irq(priv->irq1);
 958 }
 959 #endif
 960
 961 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
 962                                               struct net_device *dev)
 963 {
 964         struct sk_buff *nskb;
 965         struct bcm_tsb *tsb;
 966         u32 csum_info;
 967         u8 ip_proto;
 968         u16 csum_start;
 969         u16 ip_ver;
 970
 971         /* Re-allocate SKB if needed */
 972         if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
 973                 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
 974                 dev_kfree_skb(skb);
 975                 if (!nskb) {
 976                         dev->stats.tx_errors++;
 977                         dev->stats.tx_dropped++;
 978                         return NULL;
 979                 }
 980                 skb = nskb;
 981         }
 982
 983         tsb = (struct bcm_tsb *)skb_push(skb, sizeof(*tsb));
 984         /* Zero-out TSB by default */
 985         memset(tsb, 0, sizeof(*tsb));
 986
 987         if (skb->ip_summed == CHECKSUM_PARTIAL) {
 988                 ip_ver = htons(skb->protocol);
 989                 switch (ip_ver) {
 990                 case ETH_P_IP:
 991                         ip_proto = ip_hdr(skb)->protocol;
 992                         break;
 993                 case ETH_P_IPV6:
 994                         ip_proto = ipv6_hdr(skb)->nexthdr;
 995                         break;
 996                 default:
 997                         return skb;
 998                 }
 999
1000                 /* Get the checksum offset and the L4 (transport) offset */
1001                 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
1002                 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
1003                 csum_info |= (csum_start << L4_PTR_SHIFT);
1004
1005                 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
1006                         csum_info |= L4_LENGTH_VALID;
1007                         if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
1008                                 csum_info |= L4_UDP;
1009                 } else {
1010                         csum_info = 0;
1011                 }
1012
1013                 tsb->l4_ptr_dest_map = csum_info;
1014         }
1015
1016         return skb;
1017 }
1018
1019 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
1020                                     struct net_device *dev)
1021 {
1022         struct bcm_sysport_priv *priv = netdev_priv(dev);
1023         struct device *kdev = &priv->pdev->dev;
1024         struct bcm_sysport_tx_ring *ring;
1025         struct bcm_sysport_cb *cb;
1026         struct netdev_queue *txq;
1027         struct dma_desc *desc;
1028         unsigned int skb_len;
1029         unsigned long flags;
1030         dma_addr_t mapping;
1031         u32 len_status;
1032         u16 queue;
1033         int ret;
1034
1035         queue = skb_get_queue_mapping(skb);
1036         txq = netdev_get_tx_queue(dev, queue);
1037         ring = &priv->tx_rings[queue];
1038
1039         /* lock against tx reclaim in BH context and TX ring full interrupt */
1040         spin_lock_irqsave(&ring->lock, flags);
1041         if (unlikely(ring->desc_count == 0)) {
1042                 netif_tx_stop_queue(txq);
1043                 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1044                 ret = NETDEV_TX_BUSY;
1045                 goto out;
1046         }
1047
1048         /* Insert TSB and checksum infos */
1049         if (priv->tsb_en) {
1050                 skb = bcm_sysport_insert_tsb(skb, dev);
1051                 if (!skb) {
1052                         ret = NETDEV_TX_OK;
1053                         goto out;
1054                 }
1055         }
1056
1057         /* The Ethernet switch we are interfaced with needs packets to be at
1058          * least 64 bytes (including FCS) otherwise they will be discarded when
1059          * they enter the switch port logic. When Broadcom tags are enabled, we
1060          * need to make sure that packets are at least 68 bytes
1061          * (including FCS and tag) because the length verification is done after
1062          * the Broadcom tag is stripped off the ingress packet.
1063          */
1064         if (skb_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
1065                 ret = NETDEV_TX_OK;
1066                 goto out;
1067         }
1068
1069         skb_len = skb->len < ETH_ZLEN + ENET_BRCM_TAG_LEN ?
1070                         ETH_ZLEN + ENET_BRCM_TAG_LEN : skb->len;
1071
1072         mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1073         if (dma_mapping_error(kdev, mapping)) {
1074                 priv->mib.tx_dma_failed++;
1075                 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1076                           skb->data, skb_len);
1077                 ret = NETDEV_TX_OK;
1078                 goto out;
1079         }
1080
1081         /* Remember the SKB for future freeing */
1082         cb = &ring->cbs[ring->curr_desc];
1083         cb->skb = skb;
1084         dma_unmap_addr_set(cb, dma_addr, mapping);
1085         dma_unmap_len_set(cb, dma_len, skb_len);
1086
1087         /* Fetch a descriptor entry from our pool */
1088         desc = ring->desc_cpu;
1089
1090         desc->addr_lo = lower_32_bits(mapping);
1091         len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1092         len_status |= (skb_len << DESC_LEN_SHIFT);
1093         len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1094                        DESC_STATUS_SHIFT;
1095         if (skb->ip_summed == CHECKSUM_PARTIAL)
1096                 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1097
1098         ring->curr_desc++;
1099         if (ring->curr_desc == ring->size)
1100                 ring->curr_desc = 0;
1101         ring->desc_count--;
1102
1103         /* Ensure write completion of the descriptor status/length
1104          * in DRAM before the System Port WRITE_PORT register latches
1105          * the value
1106          */
1107         wmb();
1108         desc->addr_status_len = len_status;
1109         wmb();
1110
1111         /* Write this descriptor address to the RING write port */
1112         tdma_port_write_desc_addr(priv, desc, ring->index);
1113
1114         /* Check ring space and update SW control flow */
1115         if (ring->desc_count == 0)
1116                 netif_tx_stop_queue(txq);
1117
1118         netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1119                   ring->index, ring->desc_count, ring->curr_desc);
1120
1121         ret = NETDEV_TX_OK;
1122 out:
1123         spin_unlock_irqrestore(&ring->lock, flags);
1124         return ret;
1125 }
1126
1127 static void bcm_sysport_tx_timeout(struct net_device *dev)
1128 {
1129         netdev_warn(dev, "transmit timeout!\n");
1130
1131         dev->trans_start = jiffies;
1132         dev->stats.tx_errors++;
1133
1134         netif_tx_wake_all_queues(dev);
1135 }
1136
1137 /* phylib adjust link callback */
1138 static void bcm_sysport_adj_link(struct net_device *dev)
1139 {
1140         struct bcm_sysport_priv *priv = netdev_priv(dev);
1141         struct phy_device *phydev = priv->phydev;
1142         unsigned int changed = 0;
1143         u32 cmd_bits = 0, reg;
1144
1145         if (priv->old_link != phydev->link) {
1146                 changed = 1;
1147                 priv->old_link = phydev->link;
1148         }
1149
1150         if (priv->old_duplex != phydev->duplex) {
1151                 changed = 1;
1152                 priv->old_duplex = phydev->duplex;
1153         }
1154
1155         switch (phydev->speed) {
1156         case SPEED_2500:
1157                 cmd_bits = CMD_SPEED_2500;
1158                 break;
1159         case SPEED_1000:
1160                 cmd_bits = CMD_SPEED_1000;
1161                 break;
1162         case SPEED_100:
1163                 cmd_bits = CMD_SPEED_100;
1164                 break;
1165         case SPEED_10:
1166                 cmd_bits = CMD_SPEED_10;
1167                 break;
1168         default:
1169                 break;
1170         }
1171         cmd_bits <<= CMD_SPEED_SHIFT;
1172
1173         if (phydev->duplex == DUPLEX_HALF)
1174                 cmd_bits |= CMD_HD_EN;
1175
1176         if (priv->old_pause != phydev->pause) {
1177                 changed = 1;
1178                 priv->old_pause = phydev->pause;
1179         }
1180
1181         if (!phydev->pause)
1182                 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1183
1184         if (!changed)
1185                 return;
1186
1187         if (phydev->link) {
1188                 reg = umac_readl(priv, UMAC_CMD);
1189                 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1190                         CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1191                         CMD_TX_PAUSE_IGNORE);
1192                 reg |= cmd_bits;
1193                 umac_writel(priv, reg, UMAC_CMD);
1194         }
1195
1196         phy_print_status(priv->phydev);
1197 }
1198
1199 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1200                                     unsigned int index)
1201 {
1202         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1203         struct device *kdev = &priv->pdev->dev;
1204         size_t size;
1205         void *p;
1206         u32 reg;
1207
1208         /* Simple descriptors partitioning for now */
1209         size = 256;
1210
1211         /* We just need one DMA descriptor which is DMA-able, since writing to
1212          * the port will allocate a new descriptor in its internal linked-list
1213          */
1214         p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1215                                 GFP_KERNEL);
1216         if (!p) {
1217                 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1218                 return -ENOMEM;
1219         }
1220
1221         ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1222         if (!ring->cbs) {
1223                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1224                 return -ENOMEM;
1225         }
1226
1227         /* Initialize SW view of the ring */
1228         spin_lock_init(&ring->lock);
1229         ring->priv = priv;
1230         netif_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1231         ring->index = index;
1232         ring->size = size;
1233         ring->alloc_size = ring->size;
1234         ring->desc_cpu = p;
1235         ring->desc_count = ring->size;
1236         ring->curr_desc = 0;
1237
1238         /* Initialize HW ring */
1239         tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1240         tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1241         tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1242         tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1243         tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1244         tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1245
1246         /* Program the number of descriptors as MAX_THRESHOLD and half of
1247          * its size for the hysteresis trigger
1248          */
1249         tdma_writel(priv, ring->size |
1250                         1 << RING_HYST_THRESH_SHIFT,
1251                         TDMA_DESC_RING_MAX_HYST(index));
1252
1253         /* Enable the ring queue in the arbiter */
1254         reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1255         reg |= (1 << index);
1256         tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1257
1258         napi_enable(&ring->napi);
1259
1260         netif_dbg(priv, hw, priv->netdev,
1261                   "TDMA cfg, size=%d, desc_cpu=%p\n",
1262                   ring->size, ring->desc_cpu);
1263
1264         return 0;
1265 }
1266
1267 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1268                                      unsigned int index)
1269 {
1270         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1271         struct device *kdev = &priv->pdev->dev;
1272         u32 reg;
1273
1274         /* Caller should stop the TDMA engine */
1275         reg = tdma_readl(priv, TDMA_STATUS);
1276         if (!(reg & TDMA_DISABLED))
1277                 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1278
1279         /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1280          * fail, so by checking this pointer we know whether the TX ring was
1281          * fully initialized or not.
1282          */
1283         if (!ring->cbs)
1284                 return;
1285
1286         napi_disable(&ring->napi);
1287         netif_napi_del(&ring->napi);
1288
1289         bcm_sysport_tx_clean(priv, ring);
1290
1291         kfree(ring->cbs);
1292         ring->cbs = NULL;
1293
1294         if (ring->desc_dma) {
1295                 dma_free_coherent(kdev, sizeof(struct dma_desc),
1296                                   ring->desc_cpu, ring->desc_dma);
1297                 ring->desc_dma = 0;
1298         }
1299         ring->size = 0;
1300         ring->alloc_size = 0;
1301
1302         netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1303 }
1304
1305 /* RDMA helper */
1306 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1307                                   unsigned int enable)
1308 {
1309         unsigned int timeout = 1000;
1310         u32 reg;
1311
1312         reg = rdma_readl(priv, RDMA_CONTROL);
1313         if (enable)
1314                 reg |= RDMA_EN;
1315         else
1316                 reg &= ~RDMA_EN;
1317         rdma_writel(priv, reg, RDMA_CONTROL);
1318
1319         /* Poll for RMDA disabling completion */
1320         do {
1321                 reg = rdma_readl(priv, RDMA_STATUS);
1322                 if (!!(reg & RDMA_DISABLED) == !enable)
1323                         return 0;
1324                 usleep_range(1000, 2000);
1325         } while (timeout-- > 0);
1326
1327         netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1328
1329         return -ETIMEDOUT;
1330 }
1331
1332 /* TDMA helper */
1333 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1334                                   unsigned int enable)
1335 {
1336         unsigned int timeout = 1000;
1337         u32 reg;
1338
1339         reg = tdma_readl(priv, TDMA_CONTROL);
1340         if (enable)
1341                 reg |= TDMA_EN;
1342         else
1343                 reg &= ~TDMA_EN;
1344         tdma_writel(priv, reg, TDMA_CONTROL);
1345
1346         /* Poll for TMDA disabling completion */
1347         do {
1348                 reg = tdma_readl(priv, TDMA_STATUS);
1349                 if (!!(reg & TDMA_DISABLED) == !enable)
1350                         return 0;
1351
1352                 usleep_range(1000, 2000);
1353         } while (timeout-- > 0);
1354
1355         netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1356
1357         return -ETIMEDOUT;
1358 }
1359
1360 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1361 {
1362         struct bcm_sysport_cb *cb;
1363         u32 reg;
1364         int ret;
1365         int i;
1366
1367         /* Initialize SW view of the RX ring */
1368         priv->num_rx_bds = NUM_RX_DESC;
1369         priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1370         priv->rx_c_index = 0;
1371         priv->rx_read_ptr = 0;
1372         priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1373                                 GFP_KERNEL);
1374         if (!priv->rx_cbs) {
1375                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1376                 return -ENOMEM;
1377         }
1378
1379         for (i = 0; i < priv->num_rx_bds; i++) {
1380                 cb = priv->rx_cbs + i;
1381                 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1382         }
1383
1384         ret = bcm_sysport_alloc_rx_bufs(priv);
1385         if (ret) {
1386                 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1387                 return ret;
1388         }
1389
1390         /* Initialize HW, ensure RDMA is disabled */
1391         reg = rdma_readl(priv, RDMA_STATUS);
1392         if (!(reg & RDMA_DISABLED))
1393                 rdma_enable_set(priv, 0);
1394
1395         rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1396         rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1397         rdma_writel(priv, 0, RDMA_PROD_INDEX);
1398         rdma_writel(priv, 0, RDMA_CONS_INDEX);
1399         rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1400                           RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1401         /* Operate the queue in ring mode */
1402         rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1403         rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1404         rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1405         rdma_writel(priv, NUM_HW_RX_DESC_WORDS - 1, RDMA_END_ADDR_LO);
1406
1407         rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1408
1409         netif_dbg(priv, hw, priv->netdev,
1410                   "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1411                   priv->num_rx_bds, priv->rx_bds);
1412
1413         return 0;
1414 }
1415
1416 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1417 {
1418         struct bcm_sysport_cb *cb;
1419         unsigned int i;
1420         u32 reg;
1421
1422         /* Caller should ensure RDMA is disabled */
1423         reg = rdma_readl(priv, RDMA_STATUS);
1424         if (!(reg & RDMA_DISABLED))
1425                 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1426
1427         for (i = 0; i < priv->num_rx_bds; i++) {
1428                 cb = &priv->rx_cbs[i];
1429                 if (dma_unmap_addr(cb, dma_addr))
1430                         dma_unmap_single(&priv->pdev->dev,
1431                                          dma_unmap_addr(cb, dma_addr),
1432                                          RX_BUF_LENGTH, DMA_FROM_DEVICE);
1433                 bcm_sysport_free_cb(cb);
1434         }
1435
1436         kfree(priv->rx_cbs);
1437         priv->rx_cbs = NULL;
1438
1439         netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1440 }
1441
1442 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1443 {
1444         struct bcm_sysport_priv *priv = netdev_priv(dev);
1445         u32 reg;
1446
1447         reg = umac_readl(priv, UMAC_CMD);
1448         if (dev->flags & IFF_PROMISC)
1449                 reg |= CMD_PROMISC;
1450         else
1451                 reg &= ~CMD_PROMISC;
1452         umac_writel(priv, reg, UMAC_CMD);
1453
1454         /* No support for ALLMULTI */
1455         if (dev->flags & IFF_ALLMULTI)
1456                 return;
1457 }
1458
1459 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1460                                    u32 mask, unsigned int enable)
1461 {
1462         u32 reg;
1463
1464         reg = umac_readl(priv, UMAC_CMD);
1465         if (enable)
1466                 reg |= mask;
1467         else
1468                 reg &= ~mask;
1469         umac_writel(priv, reg, UMAC_CMD);
1470
1471         /* UniMAC stops on a packet boundary, wait for a full-sized packet
1472          * to be processed (1 msec).
1473          */
1474         if (enable == 0)
1475                 usleep_range(1000, 2000);
1476 }
1477
1478 static inline void umac_reset(struct bcm_sysport_priv *priv)
1479 {
1480         u32 reg;
1481
1482         reg = umac_readl(priv, UMAC_CMD);
1483         reg |= CMD_SW_RESET;
1484         umac_writel(priv, reg, UMAC_CMD);
1485         udelay(10);
1486         reg = umac_readl(priv, UMAC_CMD);
1487         reg &= ~CMD_SW_RESET;
1488         umac_writel(priv, reg, UMAC_CMD);
1489 }
1490
1491 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1492                              unsigned char *addr)
1493 {
1494         umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) |
1495                         (addr[2] << 8) | addr[3], UMAC_MAC0);
1496         umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1);
1497 }
1498
1499 static void topctrl_flush(struct bcm_sysport_priv *priv)
1500 {
1501         topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1502         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1503         mdelay(1);
1504         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1505         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1506 }
1507
1508 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1509 {
1510         struct bcm_sysport_priv *priv = netdev_priv(dev);
1511         struct sockaddr *addr = p;
1512
1513         if (!is_valid_ether_addr(addr->sa_data))
1514                 return -EINVAL;
1515
1516         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1517
1518         /* interface is disabled, changes to MAC will be reflected on next
1519          * open call
1520          */
1521         if (!netif_running(dev))
1522                 return 0;
1523
1524         umac_set_hw_addr(priv, dev->dev_addr);
1525
1526         return 0;
1527 }
1528
1529 static void bcm_sysport_netif_start(struct net_device *dev)
1530 {
1531         struct bcm_sysport_priv *priv = netdev_priv(dev);
1532
1533         /* Enable NAPI */
1534         napi_enable(&priv->napi);
1535
1536         /* Enable RX interrupt and TX ring full interrupt */
1537         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1538
1539         phy_start(priv->phydev);
1540
1541         /* Enable TX interrupts for the 32 TXQs */
1542         intrl2_1_mask_clear(priv, 0xffffffff);
1543
1544         /* Last call before we start the real business */
1545         netif_tx_start_all_queues(dev);
1546 }
1547
1548 static void rbuf_init(struct bcm_sysport_priv *priv)
1549 {
1550         u32 reg;
1551
1552         reg = rbuf_readl(priv, RBUF_CONTROL);
1553         reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1554         rbuf_writel(priv, reg, RBUF_CONTROL);
1555 }
1556
1557 static int bcm_sysport_open(struct net_device *dev)
1558 {
1559         struct bcm_sysport_priv *priv = netdev_priv(dev);
1560         unsigned int i;
1561         int ret;
1562
1563         /* Reset UniMAC */
1564         umac_reset(priv);
1565
1566         /* Flush TX and RX FIFOs at TOPCTRL level */
1567         topctrl_flush(priv);
1568
1569         /* Disable the UniMAC RX/TX */
1570         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1571
1572         /* Enable RBUF 2bytes alignment and Receive Status Block */
1573         rbuf_init(priv);
1574
1575         /* Set maximum frame length */
1576         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1577
1578         /* Set MAC address */
1579         umac_set_hw_addr(priv, dev->dev_addr);
1580
1581         /* Read CRC forward */
1582         priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1583
1584         priv->phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1585                                         0, priv->phy_interface);
1586         if (!priv->phydev) {
1587                 netdev_err(dev, "could not attach to PHY\n");
1588                 return -ENODEV;
1589         }
1590
1591         /* Reset house keeping link status */
1592         priv->old_duplex = -1;
1593         priv->old_link = -1;
1594         priv->old_pause = -1;
1595
1596         /* mask all interrupts and request them */
1597         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1598         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1599         intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1600         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1601         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1602         intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1603
1604         ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1605         if (ret) {
1606                 netdev_err(dev, "failed to request RX interrupt\n");
1607                 goto out_phy_disconnect;
1608         }
1609
1610         ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, dev->name, dev);
1611         if (ret) {
1612                 netdev_err(dev, "failed to request TX interrupt\n");
1613                 goto out_free_irq0;
1614         }
1615
1616         /* Initialize both hardware and software ring */
1617         for (i = 0; i < dev->num_tx_queues; i++) {
1618                 ret = bcm_sysport_init_tx_ring(priv, i);
1619                 if (ret) {
1620                         netdev_err(dev, "failed to initialize TX ring %d\n",
1621                                    i);
1622                         goto out_free_tx_ring;
1623                 }
1624         }
1625
1626         /* Initialize linked-list */
1627         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1628
1629         /* Initialize RX ring */
1630         ret = bcm_sysport_init_rx_ring(priv);
1631         if (ret) {
1632                 netdev_err(dev, "failed to initialize RX ring\n");
1633                 goto out_free_rx_ring;
1634         }
1635
1636         /* Turn on RDMA */
1637         ret = rdma_enable_set(priv, 1);
1638         if (ret)
1639                 goto out_free_rx_ring;
1640
1641         /* Turn on TDMA */
1642         ret = tdma_enable_set(priv, 1);
1643         if (ret)
1644                 goto out_clear_rx_int;
1645
1646         /* Turn on UniMAC TX/RX */
1647         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1648
1649         bcm_sysport_netif_start(dev);
1650
1651         return 0;
1652
1653 out_clear_rx_int:
1654         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1655 out_free_rx_ring:
1656         bcm_sysport_fini_rx_ring(priv);
1657 out_free_tx_ring:
1658         for (i = 0; i < dev->num_tx_queues; i++)
1659                 bcm_sysport_fini_tx_ring(priv, i);
1660         free_irq(priv->irq1, dev);
1661 out_free_irq0:
1662         free_irq(priv->irq0, dev);
1663 out_phy_disconnect:
1664         phy_disconnect(priv->phydev);
1665         return ret;
1666 }
1667
1668 static void bcm_sysport_netif_stop(struct net_device *dev)
1669 {
1670         struct bcm_sysport_priv *priv = netdev_priv(dev);
1671
1672         /* stop all software from updating hardware */
1673         netif_tx_stop_all_queues(dev);
1674         napi_disable(&priv->napi);
1675         phy_stop(priv->phydev);
1676
1677         /* mask all interrupts */
1678         intrl2_0_mask_set(priv, 0xffffffff);
1679         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1680         intrl2_1_mask_set(priv, 0xffffffff);
1681         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1682 }
1683
1684 static int bcm_sysport_stop(struct net_device *dev)
1685 {
1686         struct bcm_sysport_priv *priv = netdev_priv(dev);
1687         unsigned int i;
1688         int ret;
1689
1690         bcm_sysport_netif_stop(dev);
1691
1692         /* Disable UniMAC RX */
1693         umac_enable_set(priv, CMD_RX_EN, 0);
1694
1695         ret = tdma_enable_set(priv, 0);
1696         if (ret) {
1697                 netdev_err(dev, "timeout disabling RDMA\n");
1698                 return ret;
1699         }
1700
1701         /* Wait for a maximum packet size to be drained */
1702         usleep_range(2000, 3000);
1703
1704         ret = rdma_enable_set(priv, 0);
1705         if (ret) {
1706                 netdev_err(dev, "timeout disabling TDMA\n");
1707                 return ret;
1708         }
1709
1710         /* Disable UniMAC TX */
1711         umac_enable_set(priv, CMD_TX_EN, 0);
1712
1713         /* Free RX/TX rings SW structures */
1714         for (i = 0; i < dev->num_tx_queues; i++)
1715                 bcm_sysport_fini_tx_ring(priv, i);
1716         bcm_sysport_fini_rx_ring(priv);
1717
1718         free_irq(priv->irq0, dev);
1719         free_irq(priv->irq1, dev);
1720
1721         /* Disconnect from PHY */
1722         phy_disconnect(priv->phydev);
1723
1724         return 0;
1725 }
1726
1727 static struct ethtool_ops bcm_sysport_ethtool_ops = {
1728         .get_settings           = bcm_sysport_get_settings,
1729         .set_settings           = bcm_sysport_set_settings,
1730         .get_drvinfo            = bcm_sysport_get_drvinfo,
1731         .get_msglevel           = bcm_sysport_get_msglvl,
1732         .set_msglevel           = bcm_sysport_set_msglvl,
1733         .get_link               = ethtool_op_get_link,
1734         .get_strings            = bcm_sysport_get_strings,
1735         .get_ethtool_stats      = bcm_sysport_get_stats,
1736         .get_sset_count         = bcm_sysport_get_sset_count,
1737         .get_wol                = bcm_sysport_get_wol,
1738         .set_wol                = bcm_sysport_set_wol,
1739         .get_coalesce           = bcm_sysport_get_coalesce,
1740         .set_coalesce           = bcm_sysport_set_coalesce,
1741 };
1742
1743 static const struct net_device_ops bcm_sysport_netdev_ops = {
1744         .ndo_start_xmit         = bcm_sysport_xmit,
1745         .ndo_tx_timeout         = bcm_sysport_tx_timeout,
1746         .ndo_open               = bcm_sysport_open,
1747         .ndo_stop               = bcm_sysport_stop,
1748         .ndo_set_features       = bcm_sysport_set_features,
1749         .ndo_set_rx_mode        = bcm_sysport_set_rx_mode,
1750         .ndo_set_mac_address    = bcm_sysport_change_mac,
1751 #ifdef CONFIG_NET_POLL_CONTROLLER
1752         .ndo_poll_controller    = bcm_sysport_poll_controller,
1753 #endif
1754 };
1755
1756 #define REV_FMT "v%2x.%02x"
1757
1758 static int bcm_sysport_probe(struct platform_device *pdev)
1759 {
1760         struct bcm_sysport_priv *priv;
1761         struct device_node *dn;
1762         struct net_device *dev;
1763         const void *macaddr;
1764         struct resource *r;
1765         u32 txq, rxq;
1766         int ret;
1767
1768         dn = pdev->dev.of_node;
1769         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1770
1771         /* Read the Transmit/Receive Queue properties */
1772         if (of_property_read_u32(dn, "systemport,num-txq", &txq))
1773                 txq = TDMA_NUM_RINGS;
1774         if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
1775                 rxq = 1;
1776
1777         dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
1778         if (!dev)
1779                 return -ENOMEM;
1780
1781         /* Initialize private members */
1782         priv = netdev_priv(dev);
1783
1784         priv->irq0 = platform_get_irq(pdev, 0);
1785         priv->irq1 = platform_get_irq(pdev, 1);
1786         priv->wol_irq = platform_get_irq(pdev, 2);
1787         if (priv->irq0 <= 0 || priv->irq1 <= 0) {
1788                 dev_err(&pdev->dev, "invalid interrupts\n");
1789                 ret = -EINVAL;
1790                 goto err;
1791         }
1792
1793         priv->base = devm_ioremap_resource(&pdev->dev, r);
1794         if (IS_ERR(priv->base)) {
1795                 ret = PTR_ERR(priv->base);
1796                 goto err;
1797         }
1798
1799         priv->netdev = dev;
1800         priv->pdev = pdev;
1801
1802         priv->phy_interface = of_get_phy_mode(dn);
1803         /* Default to GMII interface mode */
1804         if (priv->phy_interface < 0)
1805                 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
1806
1807         /* In the case of a fixed PHY, the DT node associated
1808          * to the PHY is the Ethernet MAC DT node.
1809          */
1810         if (of_phy_is_fixed_link(dn)) {
1811                 ret = of_phy_register_fixed_link(dn);
1812                 if (ret) {
1813                         dev_err(&pdev->dev, "failed to register fixed PHY\n");
1814                         goto err;
1815                 }
1816
1817                 priv->phy_dn = dn;
1818         }
1819
1820         /* Initialize netdevice members */
1821         macaddr = of_get_mac_address(dn);
1822         if (!macaddr || !is_valid_ether_addr(macaddr)) {
1823                 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
1824                 eth_hw_addr_random(dev);
1825         } else {
1826                 ether_addr_copy(dev->dev_addr, macaddr);
1827         }
1828
1829         SET_NETDEV_DEV(dev, &pdev->dev);
1830         dev_set_drvdata(&pdev->dev, dev);
1831         dev->ethtool_ops = &bcm_sysport_ethtool_ops;
1832         dev->netdev_ops = &bcm_sysport_netdev_ops;
1833         netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
1834
1835         /* HW supported features, none enabled by default */
1836         dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
1837                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1838
1839         /* Request the WOL interrupt and advertise suspend if available */
1840         priv->wol_irq_disabled = 1;
1841         ret = devm_request_irq(&pdev->dev, priv->wol_irq,
1842                                bcm_sysport_wol_isr, 0, dev->name, priv);
1843         if (!ret)
1844                 device_set_wakeup_capable(&pdev->dev, 1);
1845
1846         /* Set the needed headroom once and for all */
1847         BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
1848         dev->needed_headroom += sizeof(struct bcm_tsb);
1849
1850         /* libphy will adjust the link state accordingly */
1851         netif_carrier_off(dev);
1852
1853         ret = register_netdev(dev);
1854         if (ret) {
1855                 dev_err(&pdev->dev, "failed to register net_device\n");
1856                 goto err;
1857         }
1858
1859         priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
1860         dev_info(&pdev->dev,
1861                  "Broadcom SYSTEMPORT" REV_FMT
1862                  " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1863                  (priv->rev >> 8) & 0xff, priv->rev & 0xff,
1864                  priv->base, priv->irq0, priv->irq1, txq, rxq);
1865
1866         return 0;
1867 err:
1868         free_netdev(dev);
1869         return ret;
1870 }
1871
1872 static int bcm_sysport_remove(struct platform_device *pdev)
1873 {
1874         struct net_device *dev = dev_get_drvdata(&pdev->dev);
1875
1876         /* Not much to do, ndo_close has been called
1877          * and we use managed allocations
1878          */
1879         unregister_netdev(dev);
1880         free_netdev(dev);
1881         dev_set_drvdata(&pdev->dev, NULL);
1882
1883         return 0;
1884 }
1885
1886 #ifdef CONFIG_PM_SLEEP
1887 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
1888 {
1889         struct net_device *ndev = priv->netdev;
1890         unsigned int timeout = 1000;
1891         u32 reg;
1892
1893         /* Password has already been programmed */
1894         reg = umac_readl(priv, UMAC_MPD_CTRL);
1895         reg |= MPD_EN;
1896         reg &= ~PSW_EN;
1897         if (priv->wolopts & WAKE_MAGICSECURE)
1898                 reg |= PSW_EN;
1899         umac_writel(priv, reg, UMAC_MPD_CTRL);
1900
1901         /* Make sure RBUF entered WoL mode as result */
1902         do {
1903                 reg = rbuf_readl(priv, RBUF_STATUS);
1904                 if (reg & RBUF_WOL_MODE)
1905                         break;
1906
1907                 udelay(10);
1908         } while (timeout-- > 0);
1909
1910         /* Do not leave the UniMAC RBUF matching only MPD packets */
1911         if (!timeout) {
1912                 reg = umac_readl(priv, UMAC_MPD_CTRL);
1913                 reg &= ~MPD_EN;
1914                 umac_writel(priv, reg, UMAC_MPD_CTRL);
1915                 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
1916                 return -ETIMEDOUT;
1917         }
1918
1919         /* UniMAC receive needs to be turned on */
1920         umac_enable_set(priv, CMD_RX_EN, 1);
1921
1922         /* Enable the interrupt wake-up source */
1923         intrl2_0_mask_clear(priv, INTRL2_0_MPD);
1924
1925         netif_dbg(priv, wol, ndev, "entered WOL mode\n");
1926
1927         return 0;
1928 }
1929
1930 static int bcm_sysport_suspend(struct device *d)
1931 {
1932         struct net_device *dev = dev_get_drvdata(d);
1933         struct bcm_sysport_priv *priv = netdev_priv(dev);
1934         unsigned int i;
1935         int ret = 0;
1936         u32 reg;
1937
1938         if (!netif_running(dev))
1939                 return 0;
1940
1941         bcm_sysport_netif_stop(dev);
1942
1943         phy_suspend(priv->phydev);
1944
1945         netif_device_detach(dev);
1946
1947         /* Disable UniMAC RX */
1948         umac_enable_set(priv, CMD_RX_EN, 0);
1949
1950         ret = rdma_enable_set(priv, 0);
1951         if (ret) {
1952                 netdev_err(dev, "RDMA timeout!\n");
1953                 return ret;
1954         }
1955
1956         /* Disable RXCHK if enabled */
1957         if (priv->rx_chk_en) {
1958                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1959                 reg &= ~RXCHK_EN;
1960                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1961         }
1962
1963         /* Flush RX pipe */
1964         if (!priv->wolopts)
1965                 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1966
1967         ret = tdma_enable_set(priv, 0);
1968         if (ret) {
1969                 netdev_err(dev, "TDMA timeout!\n");
1970                 return ret;
1971         }
1972
1973         /* Wait for a packet boundary */
1974         usleep_range(2000, 3000);
1975
1976         umac_enable_set(priv, CMD_TX_EN, 0);
1977
1978         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1979
1980         /* Free RX/TX rings SW structures */
1981         for (i = 0; i < dev->num_tx_queues; i++)
1982                 bcm_sysport_fini_tx_ring(priv, i);
1983         bcm_sysport_fini_rx_ring(priv);
1984
1985         /* Get prepared for Wake-on-LAN */
1986         if (device_may_wakeup(d) && priv->wolopts)
1987                 ret = bcm_sysport_suspend_to_wol(priv);
1988
1989         return ret;
1990 }
1991
1992 static int bcm_sysport_resume(struct device *d)
1993 {
1994         struct net_device *dev = dev_get_drvdata(d);
1995         struct bcm_sysport_priv *priv = netdev_priv(dev);
1996         unsigned int i;
1997         u32 reg;
1998         int ret;
1999
2000         if (!netif_running(dev))
2001                 return 0;
2002
2003         umac_reset(priv);
2004
2005         /* We may have been suspended and never received a WOL event that
2006          * would turn off MPD detection, take care of that now
2007          */
2008         bcm_sysport_resume_from_wol(priv);
2009
2010         /* Initialize both hardware and software ring */
2011         for (i = 0; i < dev->num_tx_queues; i++) {
2012                 ret = bcm_sysport_init_tx_ring(priv, i);
2013                 if (ret) {
2014                         netdev_err(dev, "failed to initialize TX ring %d\n",
2015                                    i);
2016                         goto out_free_tx_rings;
2017                 }
2018         }
2019
2020         /* Initialize linked-list */
2021         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2022
2023         /* Initialize RX ring */
2024         ret = bcm_sysport_init_rx_ring(priv);
2025         if (ret) {
2026                 netdev_err(dev, "failed to initialize RX ring\n");
2027                 goto out_free_rx_ring;
2028         }
2029
2030         netif_device_attach(dev);
2031
2032         /* RX pipe enable */
2033         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2034
2035         ret = rdma_enable_set(priv, 1);
2036         if (ret) {
2037                 netdev_err(dev, "failed to enable RDMA\n");
2038                 goto out_free_rx_ring;
2039         }
2040
2041         /* Enable rxhck */
2042         if (priv->rx_chk_en) {
2043                 reg = rxchk_readl(priv, RXCHK_CONTROL);
2044                 reg |= RXCHK_EN;
2045                 rxchk_writel(priv, reg, RXCHK_CONTROL);
2046         }
2047
2048         rbuf_init(priv);
2049
2050         /* Set maximum frame length */
2051         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2052
2053         /* Set MAC address */
2054         umac_set_hw_addr(priv, dev->dev_addr);
2055
2056         umac_enable_set(priv, CMD_RX_EN, 1);
2057
2058         /* TX pipe enable */
2059         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2060
2061         umac_enable_set(priv, CMD_TX_EN, 1);
2062
2063         ret = tdma_enable_set(priv, 1);
2064         if (ret) {
2065                 netdev_err(dev, "TDMA timeout!\n");
2066                 goto out_free_rx_ring;
2067         }
2068
2069         phy_resume(priv->phydev);
2070
2071         bcm_sysport_netif_start(dev);
2072
2073         return 0;
2074
2075 out_free_rx_ring:
2076         bcm_sysport_fini_rx_ring(priv);
2077 out_free_tx_rings:
2078         for (i = 0; i < dev->num_tx_queues; i++)
2079                 bcm_sysport_fini_tx_ring(priv, i);
2080         return ret;
2081 }
2082 #endif
2083
2084 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2085                 bcm_sysport_suspend, bcm_sysport_resume);
2086
2087 static const struct of_device_id bcm_sysport_of_match[] = {
2088         { .compatible = "brcm,systemport-v1.00" },
2089         { .compatible = "brcm,systemport" },
2090         { /* sentinel */ }
2091 };
2092 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2093
2094 static struct platform_driver bcm_sysport_driver = {
2095         .probe  = bcm_sysport_probe,
2096         .remove = bcm_sysport_remove,
2097         .driver =  {
2098                 .name = "brcm-systemport",
2099                 .of_match_table = bcm_sysport_of_match,
2100                 .pm = &bcm_sysport_pm_ops,
2101         },
2102 };
2103 module_platform_driver(bcm_sysport_driver);
2104
2105 MODULE_AUTHOR("Broadcom Corporation");
2106 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2107 MODULE_ALIAS("platform:brcm-systemport");
2108 MODULE_LICENSE("GPL");