2 * AMD 10Gb Ethernet driver
4 * This file is available to you under your choice of the following two
9 * Copyright (c) 2014 Advanced Micro Devices, Inc.
11 * This file is free software; you may copy, redistribute and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation, either version 2 of the License, or (at
14 * your option) any later version.
16 * This file is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program. If not, see <http://www.gnu.org/licenses/>.
24 * This file incorporates work covered by the following copyright and
26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
28 * Inc. unless otherwise expressly agreed to in writing between Synopsys
31 * The Software IS NOT an item of Licensed Software or Licensed Product
32 * under any End User Software License Agreement or Agreement for Licensed
33 * Product with Synopsys or any supplement thereto. Permission is hereby
34 * granted, free of charge, to any person obtaining a copy of this software
35 * annotated with this license and the Software, to deal in the Software
36 * without restriction, including without limitation the rights to use,
37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
38 * of the Software, and to permit persons to whom the Software is furnished
39 * to do so, subject to the following conditions:
41 * The above copyright notice and this permission notice shall be included
42 * in all copies or substantial portions of the Software.
44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
54 * THE POSSIBILITY OF SUCH DAMAGE.
57 * License 2: Modified BSD
59 * Copyright (c) 2014 Advanced Micro Devices, Inc.
60 * All rights reserved.
62 * Redistribution and use in source and binary forms, with or without
63 * modification, are permitted provided that the following conditions are met:
64 * * Redistributions of source code must retain the above copyright
65 * notice, this list of conditions and the following disclaimer.
66 * * Redistributions in binary form must reproduce the above copyright
67 * notice, this list of conditions and the following disclaimer in the
68 * documentation and/or other materials provided with the distribution.
69 * * Neither the name of Advanced Micro Devices, Inc. nor the
70 * names of its contributors may be used to endorse or promote products
71 * derived from this software without specific prior written permission.
73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84 * This file incorporates work covered by the following copyright and
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
88 * Inc. unless otherwise expressly agreed to in writing between Synopsys
91 * The Software IS NOT an item of Licensed Software or Licensed Product
92 * under any End User Software License Agreement or Agreement for Licensed
93 * Product with Synopsys or any supplement thereto. Permission is hereby
94 * granted, free of charge, to any person obtaining a copy of this software
95 * annotated with this license and the Software, to deal in the Software
96 * without restriction, including without limitation the rights to use,
97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
98 * of the Software, and to permit persons to whom the Software is furnished
99 * to do so, subject to the following conditions:
101 * The above copyright notice and this permission notice shall be included
102 * in all copies or substantial portions of the Software.
104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
114 * THE POSSIBILITY OF SUCH DAMAGE.
117 #include <linux/module.h>
118 #include <linux/device.h>
119 #include <linux/platform_device.h>
120 #include <linux/spinlock.h>
121 #include <linux/netdevice.h>
122 #include <linux/etherdevice.h>
123 #include <linux/io.h>
124 #include <linux/of.h>
125 #include <linux/of_net.h>
126 #include <linux/of_address.h>
127 #include <linux/clk.h>
128 #include <linux/property.h>
129 #include <linux/acpi.h>
132 #include "xgbe-common.h"
134 MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
135 MODULE_LICENSE("Dual BSD/GPL");
136 MODULE_VERSION(XGBE_DRV_VERSION);
137 MODULE_DESCRIPTION(XGBE_DRV_DESC);
139 static void xgbe_default_config(struct xgbe_prv_data *pdata)
141 DBGPR("-->xgbe_default_config\n");
143 pdata->pblx8 = DMA_PBL_X8_ENABLE;
144 pdata->tx_sf_mode = MTL_TSF_ENABLE;
145 pdata->tx_threshold = MTL_TX_THRESHOLD_64;
146 pdata->tx_pbl = DMA_PBL_16;
147 pdata->tx_osp_mode = DMA_OSP_ENABLE;
148 pdata->rx_sf_mode = MTL_RSF_DISABLE;
149 pdata->rx_threshold = MTL_RX_THRESHOLD_64;
150 pdata->rx_pbl = DMA_PBL_16;
151 pdata->pause_autoneg = 1;
154 pdata->phy_speed = SPEED_UNKNOWN;
155 pdata->power_down = 0;
156 pdata->default_autoneg = AUTONEG_ENABLE;
157 pdata->default_speed = SPEED_10000;
159 DBGPR("<--xgbe_default_config\n");
162 static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata)
164 xgbe_init_function_ptrs_dev(&pdata->hw_if);
165 xgbe_init_function_ptrs_desc(&pdata->desc_if);
169 static int xgbe_acpi_support(struct xgbe_prv_data *pdata)
171 struct acpi_device *adev = pdata->adev;
172 struct device *dev = pdata->dev;
176 unsigned long long data;
180 /* Obtain the system clock setting */
181 ret = device_property_read_u32(dev, XGBE_ACPI_DMA_FREQ, &property);
183 dev_err(dev, "unable to obtain %s property\n",
187 pdata->sysclk_rate = property;
189 /* Obtain the PTP clock setting */
190 ret = device_property_read_u32(dev, XGBE_ACPI_PTP_FREQ, &property);
192 dev_err(dev, "unable to obtain %s property\n",
196 pdata->ptpclk_rate = property;
198 /* Retrieve the device cache coherency value */
199 handle = adev->handle;
201 status = acpi_evaluate_integer(handle, "_CCA", NULL, &data);
202 if (!ACPI_FAILURE(status)) {
207 status = acpi_get_parent(handle, &handle);
208 } while (!ACPI_FAILURE(status));
210 if (ACPI_FAILURE(status)) {
211 dev_err(dev, "error obtaining acpi coherency value\n");
214 pdata->coherent = !!cca;
218 #else /* CONFIG_ACPI */
219 static int xgbe_acpi_support(struct xgbe_prv_data *pdata)
223 #endif /* CONFIG_ACPI */
226 static int xgbe_of_support(struct xgbe_prv_data *pdata)
228 struct device *dev = pdata->dev;
230 /* Obtain the system clock setting */
231 pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK);
232 if (IS_ERR(pdata->sysclk)) {
233 dev_err(dev, "dma devm_clk_get failed\n");
234 return PTR_ERR(pdata->sysclk);
236 pdata->sysclk_rate = clk_get_rate(pdata->sysclk);
238 /* Obtain the PTP clock setting */
239 pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK);
240 if (IS_ERR(pdata->ptpclk)) {
241 dev_err(dev, "ptp devm_clk_get failed\n");
242 return PTR_ERR(pdata->ptpclk);
244 pdata->ptpclk_rate = clk_get_rate(pdata->ptpclk);
246 /* Retrieve the device cache coherency value */
247 pdata->coherent = of_dma_is_coherent(dev->of_node);
251 #else /* CONFIG_OF */
252 static int xgbe_of_support(struct xgbe_prv_data *pdata)
256 #endif /*CONFIG_OF */
258 static int xgbe_probe(struct platform_device *pdev)
260 struct xgbe_prv_data *pdata;
261 struct xgbe_hw_if *hw_if;
262 struct xgbe_desc_if *desc_if;
263 struct net_device *netdev;
264 struct device *dev = &pdev->dev;
265 struct resource *res;
266 const char *phy_mode;
270 DBGPR("--> xgbe_probe\n");
272 netdev = alloc_etherdev_mq(sizeof(struct xgbe_prv_data),
273 XGBE_MAX_DMA_CHANNELS);
275 dev_err(dev, "alloc_etherdev failed\n");
279 SET_NETDEV_DEV(netdev, dev);
280 pdata = netdev_priv(netdev);
281 pdata->netdev = netdev;
283 pdata->adev = ACPI_COMPANION(dev);
285 platform_set_drvdata(pdev, netdev);
287 spin_lock_init(&pdata->lock);
288 mutex_init(&pdata->xpcs_mutex);
289 mutex_init(&pdata->rss_mutex);
290 spin_lock_init(&pdata->tstamp_lock);
292 /* Check if we should use ACPI or DT */
293 pdata->use_acpi = (!pdata->adev || acpi_disabled) ? 0 : 1;
295 /* Set and validate the number of descriptors for a ring */
296 BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT);
297 pdata->tx_desc_count = XGBE_TX_DESC_CNT;
298 if (pdata->tx_desc_count & (pdata->tx_desc_count - 1)) {
299 dev_err(dev, "tx descriptor count (%d) is not valid\n",
300 pdata->tx_desc_count);
304 BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_RX_DESC_CNT);
305 pdata->rx_desc_count = XGBE_RX_DESC_CNT;
306 if (pdata->rx_desc_count & (pdata->rx_desc_count - 1)) {
307 dev_err(dev, "rx descriptor count (%d) is not valid\n",
308 pdata->rx_desc_count);
313 /* Obtain the mmio areas for the device */
314 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
315 pdata->xgmac_regs = devm_ioremap_resource(dev, res);
316 if (IS_ERR(pdata->xgmac_regs)) {
317 dev_err(dev, "xgmac ioremap failed\n");
318 ret = PTR_ERR(pdata->xgmac_regs);
321 DBGPR(" xgmac_regs = %p\n", pdata->xgmac_regs);
323 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
324 pdata->xpcs_regs = devm_ioremap_resource(dev, res);
325 if (IS_ERR(pdata->xpcs_regs)) {
326 dev_err(dev, "xpcs ioremap failed\n");
327 ret = PTR_ERR(pdata->xpcs_regs);
330 DBGPR(" xpcs_regs = %p\n", pdata->xpcs_regs);
332 /* Retrieve the MAC address */
333 ret = device_property_read_u8_array(dev, XGBE_MAC_ADDR_PROPERTY,
335 sizeof(pdata->mac_addr));
336 if (ret || !is_valid_ether_addr(pdata->mac_addr)) {
337 dev_err(dev, "invalid %s property\n", XGBE_MAC_ADDR_PROPERTY);
343 /* Retrieve the PHY mode - it must be "xgmii" */
344 ret = device_property_read_string(dev, XGBE_PHY_MODE_PROPERTY,
346 if (ret || strcmp(phy_mode, phy_modes(PHY_INTERFACE_MODE_XGMII))) {
347 dev_err(dev, "invalid %s property\n", XGBE_PHY_MODE_PROPERTY);
352 pdata->phy_mode = PHY_INTERFACE_MODE_XGMII;
354 /* Check for per channel interrupt support */
355 if (device_property_present(dev, XGBE_DMA_IRQS_PROPERTY))
356 pdata->per_channel_irq = 1;
358 /* Obtain device settings unique to ACPI/OF */
360 ret = xgbe_acpi_support(pdata);
362 ret = xgbe_of_support(pdata);
366 /* Set the DMA coherency values */
367 if (pdata->coherent) {
368 pdata->axdomain = XGBE_DMA_OS_AXDOMAIN;
369 pdata->arcache = XGBE_DMA_OS_ARCACHE;
370 pdata->awcache = XGBE_DMA_OS_AWCACHE;
372 pdata->axdomain = XGBE_DMA_SYS_AXDOMAIN;
373 pdata->arcache = XGBE_DMA_SYS_ARCACHE;
374 pdata->awcache = XGBE_DMA_SYS_AWCACHE;
377 /* Get the device interrupt */
378 ret = platform_get_irq(pdev, 0);
380 dev_err(dev, "platform_get_irq 0 failed\n");
383 pdata->dev_irq = ret;
385 netdev->irq = pdata->dev_irq;
386 netdev->base_addr = (unsigned long)pdata->xgmac_regs;
387 memcpy(netdev->dev_addr, pdata->mac_addr, netdev->addr_len);
389 /* Set all the function pointers */
390 xgbe_init_all_fptrs(pdata);
391 hw_if = &pdata->hw_if;
392 desc_if = &pdata->desc_if;
394 /* Issue software reset to device */
397 /* Populate the hardware features */
398 xgbe_get_all_hw_features(pdata);
400 /* Set default configuration data */
401 xgbe_default_config(pdata);
403 /* Set the DMA mask */
405 dev->dma_mask = &dev->coherent_dma_mask;
406 ret = dma_set_mask_and_coherent(dev,
407 DMA_BIT_MASK(pdata->hw_feat.dma_width));
409 dev_err(dev, "dma_set_mask_and_coherent failed\n");
413 /* Calculate the number of Tx and Rx rings to be created
414 * -Tx (DMA) Channels map 1-to-1 to Tx Queues so set
415 * the number of Tx queues to the number of Tx channels
417 * -Rx (DMA) Channels do not map 1-to-1 so use the actual
418 * number of Rx queues
420 pdata->tx_ring_count = min_t(unsigned int, num_online_cpus(),
421 pdata->hw_feat.tx_ch_cnt);
422 pdata->tx_q_count = pdata->tx_ring_count;
423 ret = netif_set_real_num_tx_queues(netdev, pdata->tx_ring_count);
425 dev_err(dev, "error setting real tx queue count\n");
429 pdata->rx_ring_count = min_t(unsigned int,
430 netif_get_num_default_rss_queues(),
431 pdata->hw_feat.rx_ch_cnt);
432 pdata->rx_q_count = pdata->hw_feat.rx_q_cnt;
433 ret = netif_set_real_num_rx_queues(netdev, pdata->rx_ring_count);
435 dev_err(dev, "error setting real rx queue count\n");
439 /* Initialize RSS hash key and lookup table */
440 netdev_rss_key_fill(pdata->rss_key, sizeof(pdata->rss_key));
442 for (i = 0; i < XGBE_RSS_MAX_TABLE_SIZE; i++)
443 XGMAC_SET_BITS(pdata->rss_table[i], MAC_RSSDR, DMCH,
444 i % pdata->rx_ring_count);
446 XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, IP2TE, 1);
447 XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, TCP4TE, 1);
448 XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, UDP4TE, 1);
450 /* Prepare to regsiter with MDIO */
451 pdata->mii_bus_id = kasprintf(GFP_KERNEL, "%s", pdev->name);
452 if (!pdata->mii_bus_id) {
453 dev_err(dev, "failed to allocate mii bus id\n");
457 ret = xgbe_mdio_register(pdata);
461 /* Set device operations */
462 netdev->netdev_ops = xgbe_get_netdev_ops();
463 netdev->ethtool_ops = xgbe_get_ethtool_ops();
464 #ifdef CONFIG_AMD_XGBE_DCB
465 netdev->dcbnl_ops = xgbe_get_dcbnl_ops();
468 /* Set device features */
469 netdev->hw_features = NETIF_F_SG |
476 NETIF_F_HW_VLAN_CTAG_RX |
477 NETIF_F_HW_VLAN_CTAG_TX |
478 NETIF_F_HW_VLAN_CTAG_FILTER;
480 if (pdata->hw_feat.rss)
481 netdev->hw_features |= NETIF_F_RXHASH;
483 netdev->vlan_features |= NETIF_F_SG |
489 netdev->features |= netdev->hw_features;
490 pdata->netdev_features = netdev->features;
492 netdev->priv_flags |= IFF_UNICAST_FLT;
494 /* Use default watchdog timeout */
495 netdev->watchdog_timeo = 0;
497 xgbe_init_rx_coalesce(pdata);
498 xgbe_init_tx_coalesce(pdata);
500 netif_carrier_off(netdev);
501 ret = register_netdev(netdev);
503 dev_err(dev, "net device registration failed\n");
507 xgbe_ptp_register(pdata);
509 xgbe_debugfs_init(pdata);
511 netdev_notice(netdev, "net device enabled\n");
513 DBGPR("<-- xgbe_probe\n");
518 xgbe_mdio_unregister(pdata);
521 kfree(pdata->mii_bus_id);
527 dev_notice(dev, "net device not enabled\n");
532 static int xgbe_remove(struct platform_device *pdev)
534 struct net_device *netdev = platform_get_drvdata(pdev);
535 struct xgbe_prv_data *pdata = netdev_priv(netdev);
537 DBGPR("-->xgbe_remove\n");
539 xgbe_debugfs_exit(pdata);
541 xgbe_ptp_unregister(pdata);
543 unregister_netdev(netdev);
545 xgbe_mdio_unregister(pdata);
547 kfree(pdata->mii_bus_id);
551 DBGPR("<--xgbe_remove\n");
557 static int xgbe_suspend(struct device *dev)
559 struct net_device *netdev = dev_get_drvdata(dev);
562 DBGPR("-->xgbe_suspend\n");
564 if (!netif_running(netdev)) {
565 DBGPR("<--xgbe_dev_suspend\n");
569 ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT);
571 DBGPR("<--xgbe_suspend\n");
576 static int xgbe_resume(struct device *dev)
578 struct net_device *netdev = dev_get_drvdata(dev);
581 DBGPR("-->xgbe_resume\n");
583 if (!netif_running(netdev)) {
584 DBGPR("<--xgbe_dev_resume\n");
588 ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT);
590 DBGPR("<--xgbe_resume\n");
594 #endif /* CONFIG_PM */
597 static const struct acpi_device_id xgbe_acpi_match[] = {
602 MODULE_DEVICE_TABLE(acpi, xgbe_acpi_match);
606 static const struct of_device_id xgbe_of_match[] = {
607 { .compatible = "amd,xgbe-seattle-v1a", },
611 MODULE_DEVICE_TABLE(of, xgbe_of_match);
614 static SIMPLE_DEV_PM_OPS(xgbe_pm_ops, xgbe_suspend, xgbe_resume);
616 static struct platform_driver xgbe_driver = {
620 .acpi_match_table = xgbe_acpi_match,
623 .of_match_table = xgbe_of_match,
628 .remove = xgbe_remove,
631 module_platform_driver(xgbe_driver);