kernel/drivers/mtd/nand/sharpsl.c

   1 /*
   2  * drivers/mtd/nand/sharpsl.c
   3  *
   4  *  Copyright (C) 2004 Richard Purdie
   5  *  Copyright (C) 2008 Dmitry Baryshkov
   6  *
   7  *  Based on Sharp's NAND driver sharp_sl.c
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  */
  14
  15 #include <linux/genhd.h>
  16 #include <linux/slab.h>
  17 #include <linux/module.h>
  18 #include <linux/delay.h>
  19 #include <linux/mtd/mtd.h>
  20 #include <linux/mtd/nand.h>
  21 #include <linux/mtd/nand_ecc.h>
  22 #include <linux/mtd/partitions.h>
  23 #include <linux/mtd/sharpsl.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/platform_device.h>
  26
  27 #include <asm/io.h>
  28 #include <mach/hardware.h>
  29 #include <asm/mach-types.h>
  30
  31 struct sharpsl_nand {
  32         struct mtd_info         mtd;
  33         struct nand_chip        chip;
  34
  35         void __iomem            *io;
  36 };
  37
  38 #define mtd_to_sharpsl(_mtd)    container_of(_mtd, struct sharpsl_nand, mtd)
  39
  40 /* register offset */
  41 #define ECCLPLB         0x00    /* line parity 7 - 0 bit */
  42 #define ECCLPUB         0x04    /* line parity 15 - 8 bit */
  43 #define ECCCP           0x08    /* column parity 5 - 0 bit */
  44 #define ECCCNTR         0x0C    /* ECC byte counter */
  45 #define ECCCLRR         0x10    /* cleare ECC */
  46 #define FLASHIO         0x14    /* Flash I/O */
  47 #define FLASHCTL        0x18    /* Flash Control */
  48
  49 /* Flash control bit */
  50 #define FLRYBY          (1 << 5)
  51 #define FLCE1           (1 << 4)
  52 #define FLWP            (1 << 3)
  53 #define FLALE           (1 << 2)
  54 #define FLCLE           (1 << 1)
  55 #define FLCE0           (1 << 0)
  56
  57 /*
  58  *      hardware specific access to control-lines
  59  *      ctrl:
  60  *      NAND_CNE: bit 0 -> ! bit 0 & 4
  61  *      NAND_CLE: bit 1 -> bit 1
  62  *      NAND_ALE: bit 2 -> bit 2
  63  *
  64  */
  65 static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd,
  66                                    unsigned int ctrl)
  67 {
  68         struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
  69         struct nand_chip *chip = mtd->priv;
  70
  71         if (ctrl & NAND_CTRL_CHANGE) {
  72                 unsigned char bits = ctrl & 0x07;
  73
  74                 bits |= (ctrl & 0x01) << 4;
  75
  76                 bits ^= 0x11;
  77
  78                 writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL);
  79         }
  80
  81         if (cmd != NAND_CMD_NONE)
  82                 writeb(cmd, chip->IO_ADDR_W);
  83 }
  84
  85 static int sharpsl_nand_dev_ready(struct mtd_info *mtd)
  86 {
  87         struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
  88         return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0);
  89 }
  90
  91 static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode)
  92 {
  93         struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
  94         writeb(0, sharpsl->io + ECCCLRR);
  95 }
  96
  97 static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code)
  98 {
  99         struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
 100         ecc_code[0] = ~readb(sharpsl->io + ECCLPUB);
 101         ecc_code[1] = ~readb(sharpsl->io + ECCLPLB);
 102         ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03;
 103         return readb(sharpsl->io + ECCCNTR) != 0;
 104 }
 105
 106 /*
 107  * Main initialization routine
 108  */
 109 static int sharpsl_nand_probe(struct platform_device *pdev)
 110 {
 111         struct nand_chip *this;
 112         struct resource *r;
 113         int err = 0;
 114         struct sharpsl_nand *sharpsl;
 115         struct sharpsl_nand_platform_data *data = dev_get_platdata(&pdev->dev);
 116
 117         if (!data) {
 118                 dev_err(&pdev->dev, "no platform data!\n");
 119                 return -EINVAL;
 120         }
 121
 122         /* Allocate memory for MTD device structure and private data */
 123         sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL);
 124         if (!sharpsl)
 125                 return -ENOMEM;
 126
 127         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 128         if (!r) {
 129                 dev_err(&pdev->dev, "no io memory resource defined!\n");
 130                 err = -ENODEV;
 131                 goto err_get_res;
 132         }
 133
 134         /* map physical address */
 135         sharpsl->io = ioremap(r->start, resource_size(r));
 136         if (!sharpsl->io) {
 137                 dev_err(&pdev->dev, "ioremap to access Sharp SL NAND chip failed\n");
 138                 err = -EIO;
 139                 goto err_ioremap;
 140         }
 141
 142         /* Get pointer to private data */
 143         this = (struct nand_chip *)(&sharpsl->chip);
 144
 145         /* Link the private data with the MTD structure */
 146         sharpsl->mtd.priv = this;
 147         sharpsl->mtd.owner = THIS_MODULE;
 148
 149         platform_set_drvdata(pdev, sharpsl);
 150
 151         /*
 152          * PXA initialize
 153          */
 154         writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL);
 155
 156         /* Set address of NAND IO lines */
 157         this->IO_ADDR_R = sharpsl->io + FLASHIO;
 158         this->IO_ADDR_W = sharpsl->io + FLASHIO;
 159         /* Set address of hardware control function */
 160         this->cmd_ctrl = sharpsl_nand_hwcontrol;
 161         this->dev_ready = sharpsl_nand_dev_ready;
 162         /* 15 us command delay time */
 163         this->chip_delay = 15;
 164         /* set eccmode using hardware ECC */
 165         this->ecc.mode = NAND_ECC_HW;
 166         this->ecc.size = 256;
 167         this->ecc.bytes = 3;
 168         this->ecc.strength = 1;
 169         this->badblock_pattern = data->badblock_pattern;
 170         this->ecc.layout = data->ecc_layout;
 171         this->ecc.hwctl = sharpsl_nand_enable_hwecc;
 172         this->ecc.calculate = sharpsl_nand_calculate_ecc;
 173         this->ecc.correct = nand_correct_data;
 174
 175         /* Scan to find existence of the device */
 176         err = nand_scan(&sharpsl->mtd, 1);
 177         if (err)
 178                 goto err_scan;
 179
 180         /* Register the partitions */
 181         sharpsl->mtd.name = "sharpsl-nand";
 182
 183         err = mtd_device_parse_register(&sharpsl->mtd, NULL, NULL,
 184                                         data->partitions, data->nr_partitions);
 185         if (err)
 186                 goto err_add;
 187
 188         /* Return happy */
 189         return 0;
 190
 191 err_add:
 192         nand_release(&sharpsl->mtd);
 193
 194 err_scan:
 195         iounmap(sharpsl->io);
 196 err_ioremap:
 197 err_get_res:
 198         kfree(sharpsl);
 199         return err;
 200 }
 201
 202 /*
 203  * Clean up routine
 204  */
 205 static int sharpsl_nand_remove(struct platform_device *pdev)
 206 {
 207         struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev);
 208
 209         /* Release resources, unregister device */
 210         nand_release(&sharpsl->mtd);
 211
 212         iounmap(sharpsl->io);
 213
 214         /* Free the MTD device structure */
 215         kfree(sharpsl);
 216
 217         return 0;
 218 }
 219
 220 static struct platform_driver sharpsl_nand_driver = {
 221         .driver = {
 222                 .name   = "sharpsl-nand",
 223         },
 224         .probe          = sharpsl_nand_probe,
 225         .remove         = sharpsl_nand_remove,
 226 };
 227
 228 module_platform_driver(sharpsl_nand_driver);
 229
 230 MODULE_LICENSE("GPL");
 231 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
 232 MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series");