Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / drivers / media / usb / gspca / tv8532.c
1 /*
2  * Quickcam cameras initialization data
3  *
4  * V4L2 by Jean-Francois Moine <http://moinejf.free.fr>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19  *
20  */
21 #define MODULE_NAME "tv8532"
22
23 #include "gspca.h"
24
25 MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
26 MODULE_DESCRIPTION("TV8532 USB Camera Driver");
27 MODULE_LICENSE("GPL");
28
29 /* specific webcam descriptor */
30 struct sd {
31         struct gspca_dev gspca_dev;     /* !! must be the first item */
32
33         __u8 packet;
34 };
35
36 static const struct v4l2_pix_format sif_mode[] = {
37         {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
38                 .bytesperline = 176,
39                 .sizeimage = 176 * 144,
40                 .colorspace = V4L2_COLORSPACE_SRGB,
41                 .priv = 1},
42         {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
43                 .bytesperline = 352,
44                 .sizeimage = 352 * 288,
45                 .colorspace = V4L2_COLORSPACE_SRGB,
46                 .priv = 0},
47 };
48
49 /* TV-8532A (ICM532A) registers (LE) */
50 #define R00_PART_CONTROL 0x00
51 #define         LATENT_CHANGE   0x80
52 #define         EXPO_CHANGE     0x04
53 #define R01_TIMING_CONTROL_LOW 0x01
54 #define         CMD_EEprom_Open 0x30
55 #define         CMD_EEprom_Close 0x29
56 #define R03_TABLE_ADDR 0x03
57 #define R04_WTRAM_DATA_L 0x04
58 #define R05_WTRAM_DATA_M 0x05
59 #define R06_WTRAM_DATA_H 0x06
60 #define R07_TABLE_LEN   0x07
61 #define R08_RAM_WRITE_ACTION 0x08
62 #define R0C_AD_WIDTHL   0x0c
63 #define R0D_AD_WIDTHH   0x0d
64 #define R0E_AD_HEIGHTL  0x0e
65 #define R0F_AD_HEIGHTH  0x0f
66 #define R10_AD_COL_BEGINL 0x10
67 #define R11_AD_COL_BEGINH 0x11
68 #define         MIRROR          0x04    /* [10] */
69 #define R14_AD_ROW_BEGINL 0x14
70 #define R15_AD_ROWBEGINH  0x15
71 #define R1C_AD_EXPOSE_TIMEL 0x1c
72 #define R20_GAIN_G1L    0x20
73 #define R21_GAIN_G1H    0x21
74 #define R22_GAIN_RL     0x22
75 #define R23_GAIN_RH     0x23
76 #define R24_GAIN_BL     0x24
77 #define R25_GAIN_BH     0x25
78 #define R26_GAIN_G2L    0x26
79 #define R27_GAIN_G2H    0x27
80 #define R28_QUANT       0x28
81 #define R29_LINE        0x29
82 #define R2C_POLARITY    0x2c
83 #define R2D_POINT       0x2d
84 #define R2E_POINTH      0x2e
85 #define R2F_POINTB      0x2f
86 #define R30_POINTBH     0x30
87 #define R31_UPD         0x31
88 #define R2A_HIGH_BUDGET 0x2a
89 #define R2B_LOW_BUDGET  0x2b
90 #define R34_VID         0x34
91 #define R35_VIDH        0x35
92 #define R36_PID         0x36
93 #define R37_PIDH        0x37
94 #define R39_Test1       0x39            /* GPIO */
95 #define R3B_Test3       0x3b            /* GPIO */
96 #define R83_AD_IDH      0x83
97 #define R91_AD_SLOPEREG 0x91
98 #define R94_AD_BITCONTROL 0x94
99
100 static const u8 eeprom_data[][3] = {
101 /*      dataH dataM dataL */
102         {0x01, 0x00, 0x01},
103         {0x01, 0x80, 0x11},
104         {0x05, 0x00, 0x14},
105         {0x05, 0x00, 0x1c},
106         {0x0d, 0x00, 0x1e},
107         {0x05, 0x00, 0x1f},
108         {0x05, 0x05, 0x19},
109         {0x05, 0x01, 0x1b},
110         {0x05, 0x09, 0x1e},
111         {0x0d, 0x89, 0x2e},
112         {0x05, 0x89, 0x2f},
113         {0x05, 0x0d, 0xd9},
114         {0x05, 0x09, 0xf1},
115 };
116
117
118 /* write 1 byte */
119 static void reg_w1(struct gspca_dev *gspca_dev,
120                   __u16 index, __u8 value)
121 {
122         gspca_dev->usb_buf[0] = value;
123         usb_control_msg(gspca_dev->dev,
124                         usb_sndctrlpipe(gspca_dev->dev, 0),
125                         0x02,
126                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
127                         0,      /* value */
128                         index, gspca_dev->usb_buf, 1, 500);
129 }
130
131 /* write 2 bytes */
132 static void reg_w2(struct gspca_dev *gspca_dev,
133                   u16 index, u16 value)
134 {
135         gspca_dev->usb_buf[0] = value;
136         gspca_dev->usb_buf[1] = value >> 8;
137         usb_control_msg(gspca_dev->dev,
138                         usb_sndctrlpipe(gspca_dev->dev, 0),
139                         0x02,
140                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
141                         0,      /* value */
142                         index, gspca_dev->usb_buf, 2, 500);
143 }
144
145 static void tv_8532WriteEEprom(struct gspca_dev *gspca_dev)
146 {
147         int i;
148
149         reg_w1(gspca_dev, R01_TIMING_CONTROL_LOW, CMD_EEprom_Open);
150         for (i = 0; i < ARRAY_SIZE(eeprom_data); i++) {
151                 reg_w1(gspca_dev, R03_TABLE_ADDR, i);
152                 reg_w1(gspca_dev, R04_WTRAM_DATA_L, eeprom_data[i][2]);
153                 reg_w1(gspca_dev, R05_WTRAM_DATA_M, eeprom_data[i][1]);
154                 reg_w1(gspca_dev, R06_WTRAM_DATA_H, eeprom_data[i][0]);
155                 reg_w1(gspca_dev, R08_RAM_WRITE_ACTION, 0);
156         }
157         reg_w1(gspca_dev, R07_TABLE_LEN, i);
158         reg_w1(gspca_dev, R01_TIMING_CONTROL_LOW, CMD_EEprom_Close);
159 }
160
161 /* this function is called at probe time */
162 static int sd_config(struct gspca_dev *gspca_dev,
163                      const struct usb_device_id *id)
164 {
165         struct cam *cam;
166
167         cam = &gspca_dev->cam;
168         cam->cam_mode = sif_mode;
169         cam->nmodes = ARRAY_SIZE(sif_mode);
170
171         return 0;
172 }
173
174 static void tv_8532_setReg(struct gspca_dev *gspca_dev)
175 {
176         reg_w1(gspca_dev, R3B_Test3, 0x0a);     /* Test0Sel = 10 */
177         /******************************************************/
178         reg_w1(gspca_dev, R0E_AD_HEIGHTL, 0x90);
179         reg_w1(gspca_dev, R0F_AD_HEIGHTH, 0x01);
180         reg_w2(gspca_dev, R1C_AD_EXPOSE_TIMEL, 0x018f);
181         reg_w1(gspca_dev, R10_AD_COL_BEGINL, 0x44);
182                                                 /* begin active line */
183         reg_w1(gspca_dev, R11_AD_COL_BEGINH, 0x00);
184                                                 /* mirror and digital gain */
185         reg_w1(gspca_dev, R14_AD_ROW_BEGINL, 0x0a);
186
187         reg_w1(gspca_dev, R94_AD_BITCONTROL, 0x02);
188         reg_w1(gspca_dev, R91_AD_SLOPEREG, 0x00);
189         reg_w1(gspca_dev, R00_PART_CONTROL, LATENT_CHANGE | EXPO_CHANGE);
190                                                 /* = 0x84 */
191 }
192
193 /* this function is called at probe and resume time */
194 static int sd_init(struct gspca_dev *gspca_dev)
195 {
196         tv_8532WriteEEprom(gspca_dev);
197
198         return 0;
199 }
200
201 static void setexposure(struct gspca_dev *gspca_dev, s32 val)
202 {
203         reg_w2(gspca_dev, R1C_AD_EXPOSE_TIMEL, val);
204         reg_w1(gspca_dev, R00_PART_CONTROL, LATENT_CHANGE | EXPO_CHANGE);
205                                                 /* 0x84 */
206 }
207
208 static void setgain(struct gspca_dev *gspca_dev, s32 val)
209 {
210         reg_w2(gspca_dev, R20_GAIN_G1L, val);
211         reg_w2(gspca_dev, R22_GAIN_RL, val);
212         reg_w2(gspca_dev, R24_GAIN_BL, val);
213         reg_w2(gspca_dev, R26_GAIN_G2L, val);
214 }
215
216 /* -- start the camera -- */
217 static int sd_start(struct gspca_dev *gspca_dev)
218 {
219         struct sd *sd = (struct sd *) gspca_dev;
220
221         reg_w1(gspca_dev, R0C_AD_WIDTHL, 0xe8);         /* 0x20; 0x0c */
222         reg_w1(gspca_dev, R0D_AD_WIDTHH, 0x03);
223
224         /************************************************/
225         reg_w1(gspca_dev, R28_QUANT, 0x90);
226                                         /* 0x72 compressed mode 0x28 */
227         if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) {
228                 /* 176x144 */
229                 reg_w1(gspca_dev, R29_LINE, 0x41);
230                                         /* CIF - 2 lines/packet */
231         } else {
232                 /* 352x288 */
233                 reg_w1(gspca_dev, R29_LINE, 0x81);
234                                         /* CIF - 2 lines/packet */
235         }
236         /************************************************/
237         reg_w1(gspca_dev, R2C_POLARITY, 0x10);          /* slow clock */
238         reg_w1(gspca_dev, R2D_POINT, 0x14);
239         reg_w1(gspca_dev, R2E_POINTH, 0x01);
240         reg_w1(gspca_dev, R2F_POINTB, 0x12);
241         reg_w1(gspca_dev, R30_POINTBH, 0x01);
242
243         tv_8532_setReg(gspca_dev);
244
245         /************************************************/
246         reg_w1(gspca_dev, R31_UPD, 0x01);       /* update registers */
247         msleep(200);
248         reg_w1(gspca_dev, R31_UPD, 0x00);       /* end update */
249
250         gspca_dev->empty_packet = 0;            /* check the empty packets */
251         sd->packet = 0;                         /* ignore the first packets */
252
253         return 0;
254 }
255
256 static void sd_stopN(struct gspca_dev *gspca_dev)
257 {
258         reg_w1(gspca_dev, R3B_Test3, 0x0b);     /* Test0Sel = 11 = GPIO */
259 }
260
261 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
262                         u8 *data,                       /* isoc packet */
263                         int len)                        /* iso packet length */
264 {
265         struct sd *sd = (struct sd *) gspca_dev;
266         int packet_type0, packet_type1;
267
268         packet_type0 = packet_type1 = INTER_PACKET;
269         if (gspca_dev->empty_packet) {
270                 gspca_dev->empty_packet = 0;
271                 sd->packet = gspca_dev->pixfmt.height / 2;
272                 packet_type0 = FIRST_PACKET;
273         } else if (sd->packet == 0)
274                 return;                 /* 2 more lines in 352x288 ! */
275         sd->packet--;
276         if (sd->packet == 0)
277                 packet_type1 = LAST_PACKET;
278
279         /* each packet contains:
280          * - header 2 bytes
281          * - RGRG line
282          * - 4 bytes
283          * - GBGB line
284          * - 4 bytes
285          */
286         gspca_frame_add(gspca_dev, packet_type0,
287                         data + 2, gspca_dev->pixfmt.width);
288         gspca_frame_add(gspca_dev, packet_type1,
289                         data + gspca_dev->pixfmt.width + 5,
290                         gspca_dev->pixfmt.width);
291 }
292
293 static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
294 {
295         struct gspca_dev *gspca_dev =
296                 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
297
298         gspca_dev->usb_err = 0;
299
300         if (!gspca_dev->streaming)
301                 return 0;
302
303         switch (ctrl->id) {
304         case V4L2_CID_EXPOSURE:
305                 setexposure(gspca_dev, ctrl->val);
306                 break;
307         case V4L2_CID_GAIN:
308                 setgain(gspca_dev, ctrl->val);
309                 break;
310         }
311         return gspca_dev->usb_err;
312 }
313
314 static const struct v4l2_ctrl_ops sd_ctrl_ops = {
315         .s_ctrl = sd_s_ctrl,
316 };
317
318 static int sd_init_controls(struct gspca_dev *gspca_dev)
319 {
320         struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
321
322         gspca_dev->vdev.ctrl_handler = hdl;
323         v4l2_ctrl_handler_init(hdl, 2);
324         v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
325                         V4L2_CID_EXPOSURE, 0, 0x18f, 1, 0x18f);
326         v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
327                         V4L2_CID_GAIN, 0, 0x7ff, 1, 0x100);
328
329         if (hdl->error) {
330                 pr_err("Could not initialize controls\n");
331                 return hdl->error;
332         }
333         return 0;
334 }
335
336 /* sub-driver description */
337 static const struct sd_desc sd_desc = {
338         .name = MODULE_NAME,
339         .config = sd_config,
340         .init = sd_init,
341         .init_controls = sd_init_controls,
342         .start = sd_start,
343         .stopN = sd_stopN,
344         .pkt_scan = sd_pkt_scan,
345 };
346
347 /* -- module initialisation -- */
348 static const struct usb_device_id device_table[] = {
349         {USB_DEVICE(0x046d, 0x0920)},
350         {USB_DEVICE(0x046d, 0x0921)},
351         {USB_DEVICE(0x0545, 0x808b)},
352         {USB_DEVICE(0x0545, 0x8333)},
353         {USB_DEVICE(0x0923, 0x010f)},
354         {}
355 };
356
357 MODULE_DEVICE_TABLE(usb, device_table);
358
359 /* -- device connect -- */
360 static int sd_probe(struct usb_interface *intf,
361                     const struct usb_device_id *id)
362 {
363         return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
364                                THIS_MODULE);
365 }
366
367 static struct usb_driver sd_driver = {
368         .name = MODULE_NAME,
369         .id_table = device_table,
370         .probe = sd_probe,
371         .disconnect = gspca_disconnect,
372 #ifdef CONFIG_PM
373         .suspend = gspca_suspend,
374         .resume = gspca_resume,
375         .reset_resume = gspca_resume,
376 #endif
377 };
378
379 module_usb_driver(sd_driver);