kernel/drivers/media/usb/gspca/ov519.c

   1 /**
   2  * OV519 driver
   3  *
   4  * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
   5  * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
   6  *
   7  * This module is adapted from the ov51x-jpeg package, which itself
   8  * was adapted from the ov511 driver.
   9  *
  10  * Original copyright for the ov511 driver is:
  11  *
  12  * Copyright (c) 1999-2006 Mark W. McClelland
  13  * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
  14  * Many improvements by Bret Wallach <bwallac1@san.rr.com>
  15  * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
  16  * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
  17  * Changes by Claudio Matsuoka <claudio@conectiva.com>
  18  *
  19  * ov51x-jpeg original copyright is:
  20  *
  21  * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
  22  * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
  23  *
  24  * This program is free software; you can redistribute it and/or modify
  25  * it under the terms of the GNU General Public License as published by
  26  * the Free Software Foundation; either version 2 of the License, or
  27  * any later version.
  28  *
  29  * This program is distributed in the hope that it will be useful,
  30  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  31  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  32  * GNU General Public License for more details.
  33  *
  34  * You should have received a copy of the GNU General Public License
  35  * along with this program; if not, write to the Free Software
  36  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  37  *
  38  */
  39
  40 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  41
  42 #define MODULE_NAME "ov519"
  43
  44 #include <linux/input.h>
  45 #include "gspca.h"
  46
  47 /* The jpeg_hdr is used by w996Xcf only */
  48 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
  49 #define CONEX_CAM
  50 #include "jpeg.h"
  51
  52 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
  53 MODULE_DESCRIPTION("OV519 USB Camera Driver");
  54 MODULE_LICENSE("GPL");
  55
  56 /* global parameters */
  57 static int frame_rate;
  58
  59 /* Number of times to retry a failed I2C transaction. Increase this if you
  60  * are getting "Failed to read sensor ID..." */
  61 static int i2c_detect_tries = 10;
  62
  63 /* ov519 device descriptor */
  64 struct sd {
  65         struct gspca_dev gspca_dev;             /* !! must be the first item */
  66
  67         struct v4l2_ctrl *jpegqual;
  68         struct v4l2_ctrl *freq;
  69         struct { /* h/vflip control cluster */
  70                 struct v4l2_ctrl *hflip;
  71                 struct v4l2_ctrl *vflip;
  72         };
  73         struct { /* autobrightness/brightness control cluster */
  74                 struct v4l2_ctrl *autobright;
  75                 struct v4l2_ctrl *brightness;
  76         };
  77
  78         u8 revision;
  79
  80         u8 packet_nr;
  81
  82         char bridge;
  83 #define BRIDGE_OV511            0
  84 #define BRIDGE_OV511PLUS        1
  85 #define BRIDGE_OV518            2
  86 #define BRIDGE_OV518PLUS        3
  87 #define BRIDGE_OV519            4               /* = ov530 */
  88 #define BRIDGE_OVFX2            5
  89 #define BRIDGE_W9968CF          6
  90 #define BRIDGE_MASK             7
  91
  92         char invert_led;
  93 #define BRIDGE_INVERT_LED       8
  94
  95         char snapshot_pressed;
  96         char snapshot_needs_reset;
  97
  98         /* Determined by sensor type */
  99         u8 sif;
 100
 101 #define QUALITY_MIN 50
 102 #define QUALITY_MAX 70
 103 #define QUALITY_DEF 50
 104
 105         u8 stopped;             /* Streaming is temporarily paused */
 106         u8 first_frame;
 107
 108         u8 frame_rate;          /* current Framerate */
 109         u8 clockdiv;            /* clockdiv override */
 110
 111         s8 sensor;              /* Type of image sensor chip (SEN_*) */
 112
 113         u8 sensor_addr;
 114         u16 sensor_width;
 115         u16 sensor_height;
 116         s16 sensor_reg_cache[256];
 117
 118         u8 jpeg_hdr[JPEG_HDR_SZ];
 119 };
 120 enum sensors {
 121         SEN_OV2610,
 122         SEN_OV2610AE,
 123         SEN_OV3610,
 124         SEN_OV6620,
 125         SEN_OV6630,
 126         SEN_OV66308AF,
 127         SEN_OV7610,
 128         SEN_OV7620,
 129         SEN_OV7620AE,
 130         SEN_OV7640,
 131         SEN_OV7648,
 132         SEN_OV7660,
 133         SEN_OV7670,
 134         SEN_OV76BE,
 135         SEN_OV8610,
 136         SEN_OV9600,
 137 };
 138
 139 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
 140    the ov sensors which is already present here. When we have the time we
 141    really should move the sensor drivers to v4l2 sub drivers. */
 142 #include "w996Xcf.c"
 143
 144 /* table of the disabled controls */
 145 struct ctrl_valid {
 146         unsigned int has_brightness:1;
 147         unsigned int has_contrast:1;
 148         unsigned int has_exposure:1;
 149         unsigned int has_autogain:1;
 150         unsigned int has_sat:1;
 151         unsigned int has_hvflip:1;
 152         unsigned int has_autobright:1;
 153         unsigned int has_freq:1;
 154 };
 155
 156 static const struct ctrl_valid valid_controls[] = {
 157         [SEN_OV2610] = {
 158                 .has_exposure = 1,
 159                 .has_autogain = 1,
 160         },
 161         [SEN_OV2610AE] = {
 162                 .has_exposure = 1,
 163                 .has_autogain = 1,
 164         },
 165         [SEN_OV3610] = {
 166                 /* No controls */
 167         },
 168         [SEN_OV6620] = {
 169                 .has_brightness = 1,
 170                 .has_contrast = 1,
 171                 .has_sat = 1,
 172                 .has_autobright = 1,
 173                 .has_freq = 1,
 174         },
 175         [SEN_OV6630] = {
 176                 .has_brightness = 1,
 177                 .has_contrast = 1,
 178                 .has_sat = 1,
 179                 .has_autobright = 1,
 180                 .has_freq = 1,
 181         },
 182         [SEN_OV66308AF] = {
 183                 .has_brightness = 1,
 184                 .has_contrast = 1,
 185                 .has_sat = 1,
 186                 .has_autobright = 1,
 187                 .has_freq = 1,
 188         },
 189         [SEN_OV7610] = {
 190                 .has_brightness = 1,
 191                 .has_contrast = 1,
 192                 .has_sat = 1,
 193                 .has_autobright = 1,
 194                 .has_freq = 1,
 195         },
 196         [SEN_OV7620] = {
 197                 .has_brightness = 1,
 198                 .has_contrast = 1,
 199                 .has_sat = 1,
 200                 .has_autobright = 1,
 201                 .has_freq = 1,
 202         },
 203         [SEN_OV7620AE] = {
 204                 .has_brightness = 1,
 205                 .has_contrast = 1,
 206                 .has_sat = 1,
 207                 .has_autobright = 1,
 208                 .has_freq = 1,
 209         },
 210         [SEN_OV7640] = {
 211                 .has_brightness = 1,
 212                 .has_sat = 1,
 213                 .has_freq = 1,
 214         },
 215         [SEN_OV7648] = {
 216                 .has_brightness = 1,
 217                 .has_sat = 1,
 218                 .has_freq = 1,
 219         },
 220         [SEN_OV7660] = {
 221                 .has_brightness = 1,
 222                 .has_contrast = 1,
 223                 .has_sat = 1,
 224                 .has_hvflip = 1,
 225                 .has_freq = 1,
 226         },
 227         [SEN_OV7670] = {
 228                 .has_brightness = 1,
 229                 .has_contrast = 1,
 230                 .has_hvflip = 1,
 231                 .has_freq = 1,
 232         },
 233         [SEN_OV76BE] = {
 234                 .has_brightness = 1,
 235                 .has_contrast = 1,
 236                 .has_sat = 1,
 237                 .has_autobright = 1,
 238                 .has_freq = 1,
 239         },
 240         [SEN_OV8610] = {
 241                 .has_brightness = 1,
 242                 .has_contrast = 1,
 243                 .has_sat = 1,
 244                 .has_autobright = 1,
 245         },
 246         [SEN_OV9600] = {
 247                 .has_exposure = 1,
 248                 .has_autogain = 1,
 249         },
 250 };
 251
 252 static const struct v4l2_pix_format ov519_vga_mode[] = {
 253         {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 254                 .bytesperline = 320,
 255                 .sizeimage = 320 * 240 * 3 / 8 + 590,
 256                 .colorspace = V4L2_COLORSPACE_JPEG,
 257                 .priv = 1},
 258         {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 259                 .bytesperline = 640,
 260                 .sizeimage = 640 * 480 * 3 / 8 + 590,
 261                 .colorspace = V4L2_COLORSPACE_JPEG,
 262                 .priv = 0},
 263 };
 264 static const struct v4l2_pix_format ov519_sif_mode[] = {
 265         {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 266                 .bytesperline = 160,
 267                 .sizeimage = 160 * 120 * 3 / 8 + 590,
 268                 .colorspace = V4L2_COLORSPACE_JPEG,
 269                 .priv = 3},
 270         {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 271                 .bytesperline = 176,
 272                 .sizeimage = 176 * 144 * 3 / 8 + 590,
 273                 .colorspace = V4L2_COLORSPACE_JPEG,
 274                 .priv = 1},
 275         {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 276                 .bytesperline = 320,
 277                 .sizeimage = 320 * 240 * 3 / 8 + 590,
 278                 .colorspace = V4L2_COLORSPACE_JPEG,
 279                 .priv = 2},
 280         {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 281                 .bytesperline = 352,
 282                 .sizeimage = 352 * 288 * 3 / 8 + 590,
 283                 .colorspace = V4L2_COLORSPACE_JPEG,
 284                 .priv = 0},
 285 };
 286
 287 /* Note some of the sizeimage values for the ov511 / ov518 may seem
 288    larger then necessary, however they need to be this big as the ov511 /
 289    ov518 always fills the entire isoc frame, using 0 padding bytes when
 290    it doesn't have any data. So with low framerates the amount of data
 291    transferred can become quite large (libv4l will remove all the 0 padding
 292    in userspace). */
 293 static const struct v4l2_pix_format ov518_vga_mode[] = {
 294         {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 295                 .bytesperline = 320,
 296                 .sizeimage = 320 * 240 * 3,
 297                 .colorspace = V4L2_COLORSPACE_JPEG,
 298                 .priv = 1},
 299         {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 300                 .bytesperline = 640,
 301                 .sizeimage = 640 * 480 * 2,
 302                 .colorspace = V4L2_COLORSPACE_JPEG,
 303                 .priv = 0},
 304 };
 305 static const struct v4l2_pix_format ov518_sif_mode[] = {
 306         {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 307                 .bytesperline = 160,
 308                 .sizeimage = 70000,
 309                 .colorspace = V4L2_COLORSPACE_JPEG,
 310                 .priv = 3},
 311         {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 312                 .bytesperline = 176,
 313                 .sizeimage = 70000,
 314                 .colorspace = V4L2_COLORSPACE_JPEG,
 315                 .priv = 1},
 316         {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 317                 .bytesperline = 320,
 318                 .sizeimage = 320 * 240 * 3,
 319                 .colorspace = V4L2_COLORSPACE_JPEG,
 320                 .priv = 2},
 321         {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 322                 .bytesperline = 352,
 323                 .sizeimage = 352 * 288 * 3,
 324                 .colorspace = V4L2_COLORSPACE_JPEG,
 325                 .priv = 0},
 326 };
 327
 328 static const struct v4l2_pix_format ov511_vga_mode[] = {
 329         {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 330                 .bytesperline = 320,
 331                 .sizeimage = 320 * 240 * 3,
 332                 .colorspace = V4L2_COLORSPACE_JPEG,
 333                 .priv = 1},
 334         {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 335                 .bytesperline = 640,
 336                 .sizeimage = 640 * 480 * 2,
 337                 .colorspace = V4L2_COLORSPACE_JPEG,
 338                 .priv = 0},
 339 };
 340 static const struct v4l2_pix_format ov511_sif_mode[] = {
 341         {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 342                 .bytesperline = 160,
 343                 .sizeimage = 70000,
 344                 .colorspace = V4L2_COLORSPACE_JPEG,
 345                 .priv = 3},
 346         {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 347                 .bytesperline = 176,
 348                 .sizeimage = 70000,
 349                 .colorspace = V4L2_COLORSPACE_JPEG,
 350                 .priv = 1},
 351         {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 352                 .bytesperline = 320,
 353                 .sizeimage = 320 * 240 * 3,
 354                 .colorspace = V4L2_COLORSPACE_JPEG,
 355                 .priv = 2},
 356         {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 357                 .bytesperline = 352,
 358                 .sizeimage = 352 * 288 * 3,
 359                 .colorspace = V4L2_COLORSPACE_JPEG,
 360                 .priv = 0},
 361 };
 362
 363 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
 364         {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 365                 .bytesperline = 320,
 366                 .sizeimage = 320 * 240,
 367                 .colorspace = V4L2_COLORSPACE_SRGB,
 368                 .priv = 1},
 369         {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 370                 .bytesperline = 640,
 371                 .sizeimage = 640 * 480,
 372                 .colorspace = V4L2_COLORSPACE_SRGB,
 373                 .priv = 0},
 374 };
 375 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
 376         {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 377                 .bytesperline = 160,
 378                 .sizeimage = 160 * 120,
 379                 .colorspace = V4L2_COLORSPACE_SRGB,
 380                 .priv = 3},
 381         {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 382                 .bytesperline = 176,
 383                 .sizeimage = 176 * 144,
 384                 .colorspace = V4L2_COLORSPACE_SRGB,
 385                 .priv = 1},
 386         {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 387                 .bytesperline = 320,
 388                 .sizeimage = 320 * 240,
 389                 .colorspace = V4L2_COLORSPACE_SRGB,
 390                 .priv = 2},
 391         {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 392                 .bytesperline = 352,
 393                 .sizeimage = 352 * 288,
 394                 .colorspace = V4L2_COLORSPACE_SRGB,
 395                 .priv = 0},
 396 };
 397 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
 398         {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 399                 .bytesperline = 800,
 400                 .sizeimage = 800 * 600,
 401                 .colorspace = V4L2_COLORSPACE_SRGB,
 402                 .priv = 1},
 403         {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 404                 .bytesperline = 1600,
 405                 .sizeimage = 1600 * 1200,
 406                 .colorspace = V4L2_COLORSPACE_SRGB},
 407 };
 408 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
 409         {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 410                 .bytesperline = 640,
 411                 .sizeimage = 640 * 480,
 412                 .colorspace = V4L2_COLORSPACE_SRGB,
 413                 .priv = 1},
 414         {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 415                 .bytesperline = 800,
 416                 .sizeimage = 800 * 600,
 417                 .colorspace = V4L2_COLORSPACE_SRGB,
 418                 .priv = 1},
 419         {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 420                 .bytesperline = 1024,
 421                 .sizeimage = 1024 * 768,
 422                 .colorspace = V4L2_COLORSPACE_SRGB,
 423                 .priv = 1},
 424         {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 425                 .bytesperline = 1600,
 426                 .sizeimage = 1600 * 1200,
 427                 .colorspace = V4L2_COLORSPACE_SRGB,
 428                 .priv = 0},
 429         {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 430                 .bytesperline = 2048,
 431                 .sizeimage = 2048 * 1536,
 432                 .colorspace = V4L2_COLORSPACE_SRGB,
 433                 .priv = 0},
 434 };
 435 static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
 436         {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 437                 .bytesperline = 640,
 438                 .sizeimage = 640 * 480,
 439                 .colorspace = V4L2_COLORSPACE_SRGB,
 440                 .priv = 1},
 441         {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 442                 .bytesperline = 1280,
 443                 .sizeimage = 1280 * 1024,
 444                 .colorspace = V4L2_COLORSPACE_SRGB},
 445 };
 446
 447 /* Registers common to OV511 / OV518 */
 448 #define R51x_FIFO_PSIZE                 0x30    /* 2 bytes wide w/ OV518(+) */
 449 #define R51x_SYS_RESET                  0x50
 450         /* Reset type flags */
 451         #define OV511_RESET_OMNICE      0x08
 452 #define R51x_SYS_INIT                   0x53
 453 #define R51x_SYS_SNAP                   0x52
 454 #define R51x_SYS_CUST_ID                0x5f
 455 #define R51x_COMP_LUT_BEGIN             0x80
 456
 457 /* OV511 Camera interface register numbers */
 458 #define R511_CAM_DELAY                  0x10
 459 #define R511_CAM_EDGE                   0x11
 460 #define R511_CAM_PXCNT                  0x12
 461 #define R511_CAM_LNCNT                  0x13
 462 #define R511_CAM_PXDIV                  0x14
 463 #define R511_CAM_LNDIV                  0x15
 464 #define R511_CAM_UV_EN                  0x16
 465 #define R511_CAM_LINE_MODE              0x17
 466 #define R511_CAM_OPTS                   0x18
 467
 468 #define R511_SNAP_FRAME                 0x19
 469 #define R511_SNAP_PXCNT                 0x1a
 470 #define R511_SNAP_LNCNT                 0x1b
 471 #define R511_SNAP_PXDIV                 0x1c
 472 #define R511_SNAP_LNDIV                 0x1d
 473 #define R511_SNAP_UV_EN                 0x1e
 474 #define R511_SNAP_OPTS                  0x1f
 475
 476 #define R511_DRAM_FLOW_CTL              0x20
 477 #define R511_FIFO_OPTS                  0x31
 478 #define R511_I2C_CTL                    0x40
 479 #define R511_SYS_LED_CTL                0x55    /* OV511+ only */
 480 #define R511_COMP_EN                    0x78
 481 #define R511_COMP_LUT_EN                0x79
 482
 483 /* OV518 Camera interface register numbers */
 484 #define R518_GPIO_OUT                   0x56    /* OV518(+) only */
 485 #define R518_GPIO_CTL                   0x57    /* OV518(+) only */
 486
 487 /* OV519 Camera interface register numbers */
 488 #define OV519_R10_H_SIZE                0x10
 489 #define OV519_R11_V_SIZE                0x11
 490 #define OV519_R12_X_OFFSETL             0x12
 491 #define OV519_R13_X_OFFSETH             0x13
 492 #define OV519_R14_Y_OFFSETL             0x14
 493 #define OV519_R15_Y_OFFSETH             0x15
 494 #define OV519_R16_DIVIDER               0x16
 495 #define OV519_R20_DFR                   0x20
 496 #define OV519_R25_FORMAT                0x25
 497
 498 /* OV519 System Controller register numbers */
 499 #define OV519_R51_RESET1                0x51
 500 #define OV519_R54_EN_CLK1               0x54
 501 #define OV519_R57_SNAPSHOT              0x57
 502
 503 #define OV519_GPIO_DATA_OUT0            0x71
 504 #define OV519_GPIO_IO_CTRL0             0x72
 505
 506 /*#define OV511_ENDPOINT_ADDRESS 1       * Isoc endpoint number */
 507
 508 /*
 509  * The FX2 chip does not give us a zero length read at end of frame.
 510  * It does, however, give a short read at the end of a frame, if
 511  * necessary, rather than run two frames together.
 512  *
 513  * By choosing the right bulk transfer size, we are guaranteed to always
 514  * get a short read for the last read of each frame.  Frame sizes are
 515  * always a composite number (width * height, or a multiple) so if we
 516  * choose a prime number, we are guaranteed that the last read of a
 517  * frame will be short.
 518  *
 519  * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
 520  * otherwise EOVERFLOW "babbling" errors occur.  I have not been able
 521  * to figure out why.  [PMiller]
 522  *
 523  * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
 524  *
 525  * It isn't enough to know the number of bytes per frame, in case we
 526  * have data dropouts or buffer overruns (even though the FX2 double
 527  * buffers, there are some pretty strict real time constraints for
 528  * isochronous transfer for larger frame sizes).
 529  */
 530 /*jfm: this value does not work for 800x600 - see isoc_init */
 531 #define OVFX2_BULK_SIZE (13 * 4096)
 532
 533 /* I2C registers */
 534 #define R51x_I2C_W_SID          0x41
 535 #define R51x_I2C_SADDR_3        0x42
 536 #define R51x_I2C_SADDR_2        0x43
 537 #define R51x_I2C_R_SID          0x44
 538 #define R51x_I2C_DATA           0x45
 539 #define R518_I2C_CTL            0x47    /* OV518(+) only */
 540 #define OVFX2_I2C_ADDR          0x00
 541
 542 /* I2C ADDRESSES */
 543 #define OV7xx0_SID   0x42
 544 #define OV_HIRES_SID 0x60               /* OV9xxx / OV2xxx / OV3xxx */
 545 #define OV8xx0_SID   0xa0
 546 #define OV6xx0_SID   0xc0
 547
 548 /* OV7610 registers */
 549 #define OV7610_REG_GAIN         0x00    /* gain setting (5:0) */
 550 #define OV7610_REG_BLUE         0x01    /* blue channel balance */
 551 #define OV7610_REG_RED          0x02    /* red channel balance */
 552 #define OV7610_REG_SAT          0x03    /* saturation */
 553 #define OV8610_REG_HUE          0x04    /* 04 reserved */
 554 #define OV7610_REG_CNT          0x05    /* Y contrast */
 555 #define OV7610_REG_BRT          0x06    /* Y brightness */
 556 #define OV7610_REG_COM_C        0x14    /* misc common regs */
 557 #define OV7610_REG_ID_HIGH      0x1c    /* manufacturer ID MSB */
 558 #define OV7610_REG_ID_LOW       0x1d    /* manufacturer ID LSB */
 559 #define OV7610_REG_COM_I        0x29    /* misc settings */
 560
 561 /* OV7660 and OV7670 registers */
 562 #define OV7670_R00_GAIN         0x00    /* Gain lower 8 bits (rest in vref) */
 563 #define OV7670_R01_BLUE         0x01    /* blue gain */
 564 #define OV7670_R02_RED          0x02    /* red gain */
 565 #define OV7670_R03_VREF         0x03    /* Pieces of GAIN, VSTART, VSTOP */
 566 #define OV7670_R04_COM1         0x04    /* Control 1 */
 567 /*#define OV7670_R07_AECHH      0x07     * AEC MS 5 bits */
 568 #define OV7670_R0C_COM3         0x0c    /* Control 3 */
 569 #define OV7670_R0D_COM4         0x0d    /* Control 4 */
 570 #define OV7670_R0E_COM5         0x0e    /* All "reserved" */
 571 #define OV7670_R0F_COM6         0x0f    /* Control 6 */
 572 #define OV7670_R10_AECH         0x10    /* More bits of AEC value */
 573 #define OV7670_R11_CLKRC        0x11    /* Clock control */
 574 #define OV7670_R12_COM7         0x12    /* Control 7 */
 575 #define   OV7670_COM7_FMT_VGA    0x00
 576 /*#define   OV7670_COM7_YUV      0x00    * YUV */
 577 #define   OV7670_COM7_FMT_QVGA   0x10   /* QVGA format */
 578 #define   OV7670_COM7_FMT_MASK   0x38
 579 #define   OV7670_COM7_RESET      0x80   /* Register reset */
 580 #define OV7670_R13_COM8         0x13    /* Control 8 */
 581 #define   OV7670_COM8_AEC        0x01   /* Auto exposure enable */
 582 #define   OV7670_COM8_AWB        0x02   /* White balance enable */
 583 #define   OV7670_COM8_AGC        0x04   /* Auto gain enable */
 584 #define   OV7670_COM8_BFILT      0x20   /* Band filter enable */
 585 #define   OV7670_COM8_AECSTEP    0x40   /* Unlimited AEC step size */
 586 #define   OV7670_COM8_FASTAEC    0x80   /* Enable fast AGC/AEC */
 587 #define OV7670_R14_COM9         0x14    /* Control 9 - gain ceiling */
 588 #define OV7670_R15_COM10        0x15    /* Control 10 */
 589 #define OV7670_R17_HSTART       0x17    /* Horiz start high bits */
 590 #define OV7670_R18_HSTOP        0x18    /* Horiz stop high bits */
 591 #define OV7670_R19_VSTART       0x19    /* Vert start high bits */
 592 #define OV7670_R1A_VSTOP        0x1a    /* Vert stop high bits */
 593 #define OV7670_R1E_MVFP         0x1e    /* Mirror / vflip */
 594 #define   OV7670_MVFP_VFLIP      0x10   /* vertical flip */
 595 #define   OV7670_MVFP_MIRROR     0x20   /* Mirror image */
 596 #define OV7670_R24_AEW          0x24    /* AGC upper limit */
 597 #define OV7670_R25_AEB          0x25    /* AGC lower limit */
 598 #define OV7670_R26_VPT          0x26    /* AGC/AEC fast mode op region */
 599 #define OV7670_R32_HREF         0x32    /* HREF pieces */
 600 #define OV7670_R3A_TSLB         0x3a    /* lots of stuff */
 601 #define OV7670_R3B_COM11        0x3b    /* Control 11 */
 602 #define   OV7670_COM11_EXP       0x02
 603 #define   OV7670_COM11_HZAUTO    0x10   /* Auto detect 50/60 Hz */
 604 #define OV7670_R3C_COM12        0x3c    /* Control 12 */
 605 #define OV7670_R3D_COM13        0x3d    /* Control 13 */
 606 #define   OV7670_COM13_GAMMA     0x80   /* Gamma enable */
 607 #define   OV7670_COM13_UVSAT     0x40   /* UV saturation auto adjustment */
 608 #define OV7670_R3E_COM14        0x3e    /* Control 14 */
 609 #define OV7670_R3F_EDGE         0x3f    /* Edge enhancement factor */
 610 #define OV7670_R40_COM15        0x40    /* Control 15 */
 611 /*#define   OV7670_COM15_R00FF   0xc0    *      00 to FF */
 612 #define OV7670_R41_COM16        0x41    /* Control 16 */
 613 #define   OV7670_COM16_AWBGAIN   0x08   /* AWB gain enable */
 614 /* end of ov7660 common registers */
 615 #define OV7670_R55_BRIGHT       0x55    /* Brightness */
 616 #define OV7670_R56_CONTRAS      0x56    /* Contrast control */
 617 #define OV7670_R69_GFIX         0x69    /* Fix gain control */
 618 /*#define OV7670_R8C_RGB444     0x8c     * RGB 444 control */
 619 #define OV7670_R9F_HAECC1       0x9f    /* Hist AEC/AGC control 1 */
 620 #define OV7670_RA0_HAECC2       0xa0    /* Hist AEC/AGC control 2 */
 621 #define OV7670_RA5_BD50MAX      0xa5    /* 50hz banding step limit */
 622 #define OV7670_RA6_HAECC3       0xa6    /* Hist AEC/AGC control 3 */
 623 #define OV7670_RA7_HAECC4       0xa7    /* Hist AEC/AGC control 4 */
 624 #define OV7670_RA8_HAECC5       0xa8    /* Hist AEC/AGC control 5 */
 625 #define OV7670_RA9_HAECC6       0xa9    /* Hist AEC/AGC control 6 */
 626 #define OV7670_RAA_HAECC7       0xaa    /* Hist AEC/AGC control 7 */
 627 #define OV7670_RAB_BD60MAX      0xab    /* 60hz banding step limit */
 628
 629 struct ov_regvals {
 630         u8 reg;
 631         u8 val;
 632 };
 633 struct ov_i2c_regvals {
 634         u8 reg;
 635         u8 val;
 636 };
 637
 638 /* Settings for OV2610 camera chip */
 639 static const struct ov_i2c_regvals norm_2610[] = {
 640         { 0x12, 0x80 }, /* reset */
 641 };
 642
 643 static const struct ov_i2c_regvals norm_2610ae[] = {
 644         {0x12, 0x80},   /* reset */
 645         {0x13, 0xcd},
 646         {0x09, 0x01},
 647         {0x0d, 0x00},
 648         {0x11, 0x80},
 649         {0x12, 0x20},   /* 1600x1200 */
 650         {0x33, 0x0c},
 651         {0x35, 0x90},
 652         {0x36, 0x37},
 653 /* ms-win traces */
 654         {0x11, 0x83},   /* clock / 3 ? */
 655         {0x2d, 0x00},   /* 60 Hz filter */
 656         {0x24, 0xb0},   /* normal colors */
 657         {0x25, 0x90},
 658         {0x10, 0x43},
 659 };
 660
 661 static const struct ov_i2c_regvals norm_3620b[] = {
 662         /*
 663          * From the datasheet: "Note that after writing to register COMH
 664          * (0x12) to change the sensor mode, registers related to the
 665          * sensor’s cropping window will be reset back to their default
 666          * values."
 667          *
 668          * "wait 4096 external clock ... to make sure the sensor is
 669          * stable and ready to access registers" i.e. 160us at 24MHz
 670          */
 671         { 0x12, 0x80 }, /* COMH reset */
 672         { 0x12, 0x00 }, /* QXGA, master */
 673
 674         /*
 675          * 11 CLKRC "Clock Rate Control"
 676          * [7] internal frequency doublers: on
 677          * [6] video port mode: master
 678          * [5:0] clock divider: 1
 679          */
 680         { 0x11, 0x80 },
 681
 682         /*
 683          * 13 COMI "Common Control I"
 684          *                  = 192 (0xC0) 11000000
 685          *    COMI[7] "AEC speed selection"
 686          *                  =   1 (0x01) 1....... "Faster AEC correction"
 687          *    COMI[6] "AEC speed step selection"
 688          *                  =   1 (0x01) .1...... "Big steps, fast"
 689          *    COMI[5] "Banding filter on off"
 690          *                  =   0 (0x00) ..0..... "Off"
 691          *    COMI[4] "Banding filter option"
 692          *                  =   0 (0x00) ...0.... "Main clock is 48 MHz and
 693          *                                         the PLL is ON"
 694          *    COMI[3] "Reserved"
 695          *                  =   0 (0x00) ....0...
 696          *    COMI[2] "AGC auto manual control selection"
 697          *                  =   0 (0x00) .....0.. "Manual"
 698          *    COMI[1] "AWB auto manual control selection"
 699          *                  =   0 (0x00) ......0. "Manual"
 700          *    COMI[0] "Exposure control"
 701          *                  =   0 (0x00) .......0 "Manual"
 702          */
 703         { 0x13, 0xc0 },
 704
 705         /*
 706          * 09 COMC "Common Control C"
 707          *                  =   8 (0x08) 00001000
 708          *    COMC[7:5] "Reserved"
 709          *                  =   0 (0x00) 000.....
 710          *    COMC[4] "Sleep Mode Enable"
 711          *                  =   0 (0x00) ...0.... "Normal mode"
 712          *    COMC[3:2] "Sensor sampling reset timing selection"
 713          *                  =   2 (0x02) ....10.. "Longer reset time"
 714          *    COMC[1:0] "Output drive current select"
 715          *                  =   0 (0x00) ......00 "Weakest"
 716          */
 717         { 0x09, 0x08 },
 718
 719         /*
 720          * 0C COMD "Common Control D"
 721          *                  =   8 (0x08) 00001000
 722          *    COMD[7] "Reserved"
 723          *                  =   0 (0x00) 0.......
 724          *    COMD[6] "Swap MSB and LSB at the output port"
 725          *                  =   0 (0x00) .0...... "False"
 726          *    COMD[5:3] "Reserved"
 727          *                  =   1 (0x01) ..001...
 728          *    COMD[2] "Output Average On Off"
 729          *                  =   0 (0x00) .....0.. "Output Normal"
 730          *    COMD[1] "Sensor precharge voltage selection"
 731          *                  =   0 (0x00) ......0. "Selects internal
 732          *                                         reference precharge
 733          *                                         voltage"
 734          *    COMD[0] "Snapshot option"
 735          *                  =   0 (0x00) .......0 "Enable live video output
 736          *                                         after snapshot sequence"
 737          */
 738         { 0x0c, 0x08 },
 739
 740         /*
 741          * 0D COME "Common Control E"
 742          *                  = 161 (0xA1) 10100001
 743          *    COME[7] "Output average option"
 744          *                  =   1 (0x01) 1....... "Output average of 4 pixels"
 745          *    COME[6] "Anti-blooming control"
 746          *                  =   0 (0x00) .0...... "Off"
 747          *    COME[5:3] "Reserved"
 748          *                  =   4 (0x04) ..100...
 749          *    COME[2] "Clock output power down pin status"
 750          *                  =   0 (0x00) .....0.. "Tri-state data output pin
 751          *                                         on power down"
 752          *    COME[1] "Data output pin status selection at power down"
 753          *                  =   0 (0x00) ......0. "Tri-state VSYNC, PCLK,
 754          *                                         HREF, and CHSYNC pins on
 755          *                                         power down"
 756          *    COME[0] "Auto zero circuit select"
 757          *                  =   1 (0x01) .......1 "On"
 758          */
 759         { 0x0d, 0xa1 },
 760
 761         /*
 762          * 0E COMF "Common Control F"
 763          *                  = 112 (0x70) 01110000
 764          *    COMF[7] "System clock selection"
 765          *                  =   0 (0x00) 0....... "Use 24 MHz system clock"
 766          *    COMF[6:4] "Reserved"
 767          *                  =   7 (0x07) .111....
 768          *    COMF[3] "Manual auto negative offset canceling selection"
 769          *                  =   0 (0x00) ....0... "Auto detect negative
 770          *                                         offset and cancel it"
 771          *    COMF[2:0] "Reserved"
 772          *                  =   0 (0x00) .....000
 773          */
 774         { 0x0e, 0x70 },
 775
 776         /*
 777          * 0F COMG "Common Control G"
 778          *                  =  66 (0x42) 01000010
 779          *    COMG[7] "Optical black output selection"
 780          *                  =   0 (0x00) 0....... "Disable"
 781          *    COMG[6] "Black level calibrate selection"
 782          *                  =   1 (0x01) .1...... "Use optical black pixels
 783          *                                         to calibrate"
 784          *    COMG[5:4] "Reserved"
 785          *                  =   0 (0x00) ..00....
 786          *    COMG[3] "Channel offset adjustment"
 787          *                  =   0 (0x00) ....0... "Disable offset adjustment"
 788          *    COMG[2] "ADC black level calibration option"
 789          *                  =   0 (0x00) .....0.. "Use B/G line and G/R
 790          *                                         line to calibrate each
 791          *                                         channel's black level"
 792          *    COMG[1] "Reserved"
 793          *                  =   1 (0x01) ......1.
 794          *    COMG[0] "ADC black level calibration enable"
 795          *                  =   0 (0x00) .......0 "Disable"
 796          */
 797         { 0x0f, 0x42 },
 798
 799         /*
 800          * 14 COMJ "Common Control J"
 801          *                  = 198 (0xC6) 11000110
 802          *    COMJ[7:6] "AGC gain ceiling"
 803          *                  =   3 (0x03) 11...... "8x"
 804          *    COMJ[5:4] "Reserved"
 805          *                  =   0 (0x00) ..00....
 806          *    COMJ[3] "Auto banding filter"
 807          *                  =   0 (0x00) ....0... "Banding filter is always
 808          *                                         on off depending on
 809          *                                         COMI[5] setting"
 810          *    COMJ[2] "VSYNC drop option"
 811          *                  =   1 (0x01) .....1.. "SYNC is dropped if frame
 812          *                                         data is dropped"
 813          *    COMJ[1] "Frame data drop"
 814          *                  =   1 (0x01) ......1. "Drop frame data if
 815          *                                         exposure is not within
 816          *                                         tolerance.  In AEC mode,
 817          *                                         data is normally dropped
 818          *                                         when data is out of
 819          *                                         range."
 820          *    COMJ[0] "Reserved"
 821          *                  =   0 (0x00) .......0
 822          */
 823         { 0x14, 0xc6 },
 824
 825         /*
 826          * 15 COMK "Common Control K"
 827          *                  =   2 (0x02) 00000010
 828          *    COMK[7] "CHSYNC pin output swap"
 829          *                  =   0 (0x00) 0....... "CHSYNC"
 830          *    COMK[6] "HREF pin output swap"
 831          *                  =   0 (0x00) .0...... "HREF"
 832          *    COMK[5] "PCLK output selection"
 833          *                  =   0 (0x00) ..0..... "PCLK always output"
 834          *    COMK[4] "PCLK edge selection"
 835          *                  =   0 (0x00) ...0.... "Data valid on falling edge"
 836          *    COMK[3] "HREF output polarity"
 837          *                  =   0 (0x00) ....0... "positive"
 838          *    COMK[2] "Reserved"
 839          *                  =   0 (0x00) .....0..
 840          *    COMK[1] "VSYNC polarity"
 841          *                  =   1 (0x01) ......1. "negative"
 842          *    COMK[0] "HSYNC polarity"
 843          *                  =   0 (0x00) .......0 "positive"
 844          */
 845         { 0x15, 0x02 },
 846
 847         /*
 848          * 33 CHLF "Current Control"
 849          *                  =   9 (0x09) 00001001
 850          *    CHLF[7:6] "Sensor current control"
 851          *                  =   0 (0x00) 00......
 852          *    CHLF[5] "Sensor current range control"
 853          *                  =   0 (0x00) ..0..... "normal range"
 854          *    CHLF[4] "Sensor current"
 855          *                  =   0 (0x00) ...0.... "normal current"
 856          *    CHLF[3] "Sensor buffer current control"
 857          *                  =   1 (0x01) ....1... "half current"
 858          *    CHLF[2] "Column buffer current control"
 859          *                  =   0 (0x00) .....0.. "normal current"
 860          *    CHLF[1] "Analog DSP current control"
 861          *                  =   0 (0x00) ......0. "normal current"
 862          *    CHLF[1] "ADC current control"
 863          *                  =   0 (0x00) ......0. "normal current"
 864          */
 865         { 0x33, 0x09 },
 866
 867         /*
 868          * 34 VBLM "Blooming Control"
 869          *                  =  80 (0x50) 01010000
 870          *    VBLM[7] "Hard soft reset switch"
 871          *                  =   0 (0x00) 0....... "Hard reset"
 872          *    VBLM[6:4] "Blooming voltage selection"
 873          *                  =   5 (0x05) .101....
 874          *    VBLM[3:0] "Sensor current control"
 875          *                  =   0 (0x00) ....0000
 876          */
 877         { 0x34, 0x50 },
 878
 879         /*
 880          * 36 VCHG "Sensor Precharge Voltage Control"
 881          *                  =   0 (0x00) 00000000
 882          *    VCHG[7] "Reserved"
 883          *                  =   0 (0x00) 0.......
 884          *    VCHG[6:4] "Sensor precharge voltage control"
 885          *                  =   0 (0x00) .000....
 886          *    VCHG[3:0] "Sensor array common reference"
 887          *                  =   0 (0x00) ....0000
 888          */
 889         { 0x36, 0x00 },
 890
 891         /*
 892          * 37 ADC "ADC Reference Control"
 893          *                  =   4 (0x04) 00000100
 894          *    ADC[7:4] "Reserved"
 895          *                  =   0 (0x00) 0000....
 896          *    ADC[3] "ADC input signal range"
 897          *                  =   0 (0x00) ....0... "Input signal 1.0x"
 898          *    ADC[2:0] "ADC range control"
 899          *                  =   4 (0x04) .....100
 900          */
 901         { 0x37, 0x04 },
 902
 903         /*
 904          * 38 ACOM "Analog Common Ground"
 905          *                  =  82 (0x52) 01010010
 906          *    ACOM[7] "Analog gain control"
 907          *                  =   0 (0x00) 0....... "Gain 1x"
 908          *    ACOM[6] "Analog black level calibration"
 909          *                  =   1 (0x01) .1...... "On"
 910          *    ACOM[5:0] "Reserved"
 911          *                  =  18 (0x12) ..010010
 912          */
 913         { 0x38, 0x52 },
 914
 915         /*
 916          * 3A FREFA "Internal Reference Adjustment"
 917          *                  =   0 (0x00) 00000000
 918          *    FREFA[7:0] "Range"
 919          *                  =   0 (0x00) 00000000
 920          */
 921         { 0x3a, 0x00 },
 922
 923         /*
 924          * 3C FVOPT "Internal Reference Adjustment"
 925          *                  =  31 (0x1F) 00011111
 926          *    FVOPT[7:0] "Range"
 927          *                  =  31 (0x1F) 00011111
 928          */
 929         { 0x3c, 0x1f },
 930
 931         /*
 932          * 44 Undocumented  =   0 (0x00) 00000000
 933          *    44[7:0] "It's a secret"
 934          *                  =   0 (0x00) 00000000
 935          */
 936         { 0x44, 0x00 },
 937
 938         /*
 939          * 40 Undocumented  =   0 (0x00) 00000000
 940          *    40[7:0] "It's a secret"
 941          *                  =   0 (0x00) 00000000
 942          */
 943         { 0x40, 0x00 },
 944
 945         /*
 946          * 41 Undocumented  =   0 (0x00) 00000000
 947          *    41[7:0] "It's a secret"
 948          *                  =   0 (0x00) 00000000
 949          */
 950         { 0x41, 0x00 },
 951
 952         /*
 953          * 42 Undocumented  =   0 (0x00) 00000000
 954          *    42[7:0] "It's a secret"
 955          *                  =   0 (0x00) 00000000
 956          */
 957         { 0x42, 0x00 },
 958
 959         /*
 960          * 43 Undocumented  =   0 (0x00) 00000000
 961          *    43[7:0] "It's a secret"
 962          *                  =   0 (0x00) 00000000
 963          */
 964         { 0x43, 0x00 },
 965
 966         /*
 967          * 45 Undocumented  = 128 (0x80) 10000000
 968          *    45[7:0] "It's a secret"
 969          *                  = 128 (0x80) 10000000
 970          */
 971         { 0x45, 0x80 },
 972
 973         /*
 974          * 48 Undocumented  = 192 (0xC0) 11000000
 975          *    48[7:0] "It's a secret"
 976          *                  = 192 (0xC0) 11000000
 977          */
 978         { 0x48, 0xc0 },
 979
 980         /*
 981          * 49 Undocumented  =  25 (0x19) 00011001
 982          *    49[7:0] "It's a secret"
 983          *                  =  25 (0x19) 00011001
 984          */
 985         { 0x49, 0x19 },
 986
 987         /*
 988          * 4B Undocumented  = 128 (0x80) 10000000
 989          *    4B[7:0] "It's a secret"
 990          *                  = 128 (0x80) 10000000
 991          */
 992         { 0x4b, 0x80 },
 993
 994         /*
 995          * 4D Undocumented  = 196 (0xC4) 11000100
 996          *    4D[7:0] "It's a secret"
 997          *                  = 196 (0xC4) 11000100
 998          */
 999         { 0x4d, 0xc4 },
1000
1001         /*
1002          * 35 VREF "Reference Voltage Control"
1003          *                  =  76 (0x4c) 01001100
1004          *    VREF[7:5] "Column high reference control"
1005          *                  =   2 (0x02) 010..... "higher voltage"
1006          *    VREF[4:2] "Column low reference control"
1007          *                  =   3 (0x03) ...011.. "Highest voltage"
1008          *    VREF[1:0] "Reserved"
1009          *                  =   0 (0x00) ......00
1010          */
1011         { 0x35, 0x4c },
1012
1013         /*
1014          * 3D Undocumented  =   0 (0x00) 00000000
1015          *    3D[7:0] "It's a secret"
1016          *                  =   0 (0x00) 00000000
1017          */
1018         { 0x3d, 0x00 },
1019
1020         /*
1021          * 3E Undocumented  =   0 (0x00) 00000000
1022          *    3E[7:0] "It's a secret"
1023          *                  =   0 (0x00) 00000000
1024          */
1025         { 0x3e, 0x00 },
1026
1027         /*
1028          * 3B FREFB "Internal Reference Adjustment"
1029          *                  =  24 (0x18) 00011000
1030          *    FREFB[7:0] "Range"
1031          *                  =  24 (0x18) 00011000
1032          */
1033         { 0x3b, 0x18 },
1034
1035         /*
1036          * 33 CHLF "Current Control"
1037          *                  =  25 (0x19) 00011001
1038          *    CHLF[7:6] "Sensor current control"
1039          *                  =   0 (0x00) 00......
1040          *    CHLF[5] "Sensor current range control"
1041          *                  =   0 (0x00) ..0..... "normal range"
1042          *    CHLF[4] "Sensor current"
1043          *                  =   1 (0x01) ...1.... "double current"
1044          *    CHLF[3] "Sensor buffer current control"
1045          *                  =   1 (0x01) ....1... "half current"
1046          *    CHLF[2] "Column buffer current control"
1047          *                  =   0 (0x00) .....0.. "normal current"
1048          *    CHLF[1] "Analog DSP current control"
1049          *                  =   0 (0x00) ......0. "normal current"
1050          *    CHLF[1] "ADC current control"
1051          *                  =   0 (0x00) ......0. "normal current"
1052          */
1053         { 0x33, 0x19 },
1054
1055         /*
1056          * 34 VBLM "Blooming Control"
1057          *                  =  90 (0x5A) 01011010
1058          *    VBLM[7] "Hard soft reset switch"
1059          *                  =   0 (0x00) 0....... "Hard reset"
1060          *    VBLM[6:4] "Blooming voltage selection"
1061          *                  =   5 (0x05) .101....
1062          *    VBLM[3:0] "Sensor current control"
1063          *                  =  10 (0x0A) ....1010
1064          */
1065         { 0x34, 0x5a },
1066
1067         /*
1068          * 3B FREFB "Internal Reference Adjustment"
1069          *                  =   0 (0x00) 00000000
1070          *    FREFB[7:0] "Range"
1071          *                  =   0 (0x00) 00000000
1072          */
1073         { 0x3b, 0x00 },
1074
1075         /*
1076          * 33 CHLF "Current Control"
1077          *                  =   9 (0x09) 00001001
1078          *    CHLF[7:6] "Sensor current control"
1079          *                  =   0 (0x00) 00......
1080          *    CHLF[5] "Sensor current range control"
1081          *                  =   0 (0x00) ..0..... "normal range"
1082          *    CHLF[4] "Sensor current"
1083          *                  =   0 (0x00) ...0.... "normal current"
1084          *    CHLF[3] "Sensor buffer current control"
1085          *                  =   1 (0x01) ....1... "half current"
1086          *    CHLF[2] "Column buffer current control"
1087          *                  =   0 (0x00) .....0.. "normal current"
1088          *    CHLF[1] "Analog DSP current control"
1089          *                  =   0 (0x00) ......0. "normal current"
1090          *    CHLF[1] "ADC current control"
1091          *                  =   0 (0x00) ......0. "normal current"
1092          */
1093         { 0x33, 0x09 },
1094
1095         /*
1096          * 34 VBLM "Blooming Control"
1097          *                  =  80 (0x50) 01010000
1098          *    VBLM[7] "Hard soft reset switch"
1099          *                  =   0 (0x00) 0....... "Hard reset"
1100          *    VBLM[6:4] "Blooming voltage selection"
1101          *                  =   5 (0x05) .101....
1102          *    VBLM[3:0] "Sensor current control"
1103          *                  =   0 (0x00) ....0000
1104          */
1105         { 0x34, 0x50 },
1106
1107         /*
1108          * 12 COMH "Common Control H"
1109          *                  =  64 (0x40) 01000000
1110          *    COMH[7] "SRST"
1111          *                  =   0 (0x00) 0....... "No-op"
1112          *    COMH[6:4] "Resolution selection"
1113          *                  =   4 (0x04) .100.... "XGA"
1114          *    COMH[3] "Master slave selection"
1115          *                  =   0 (0x00) ....0... "Master mode"
1116          *    COMH[2] "Internal B/R channel option"
1117          *                  =   0 (0x00) .....0.. "B/R use same channel"
1118          *    COMH[1] "Color bar test pattern"
1119          *                  =   0 (0x00) ......0. "Off"
1120          *    COMH[0] "Reserved"
1121          *                  =   0 (0x00) .......0
1122          */
1123         { 0x12, 0x40 },
1124
1125         /*
1126          * 17 HREFST "Horizontal window start"
1127          *                  =  31 (0x1F) 00011111
1128          *    HREFST[7:0] "Horizontal window start, 8 MSBs"
1129          *                  =  31 (0x1F) 00011111
1130          */
1131         { 0x17, 0x1f },
1132
1133         /*
1134          * 18 HREFEND "Horizontal window end"
1135          *                  =  95 (0x5F) 01011111
1136          *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1137          *                  =  95 (0x5F) 01011111
1138          */
1139         { 0x18, 0x5f },
1140
1141         /*
1142          * 19 VSTRT "Vertical window start"
1143          *                  =   0 (0x00) 00000000
1144          *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1145          *                  =   0 (0x00) 00000000
1146          */
1147         { 0x19, 0x00 },
1148
1149         /*
1150          * 1A VEND "Vertical window end"
1151          *                  =  96 (0x60) 01100000
1152          *    VEND[7:0] "Vertical Window End, 8 MSBs"
1153          *                  =  96 (0x60) 01100000
1154          */
1155         { 0x1a, 0x60 },
1156
1157         /*
1158          * 32 COMM "Common Control M"
1159          *                  =  18 (0x12) 00010010
1160          *    COMM[7:6] "Pixel clock divide option"
1161          *                  =   0 (0x00) 00...... "/1"
1162          *    COMM[5:3] "Horizontal window end position, 3 LSBs"
1163          *                  =   2 (0x02) ..010...
1164          *    COMM[2:0] "Horizontal window start position, 3 LSBs"
1165          *                  =   2 (0x02) .....010
1166          */
1167         { 0x32, 0x12 },
1168
1169         /*
1170          * 03 COMA "Common Control A"
1171          *                  =  74 (0x4A) 01001010
1172          *    COMA[7:4] "AWB Update Threshold"
1173          *                  =   4 (0x04) 0100....
1174          *    COMA[3:2] "Vertical window end line control 2 LSBs"
1175          *                  =   2 (0x02) ....10..
1176          *    COMA[1:0] "Vertical window start line control 2 LSBs"
1177          *                  =   2 (0x02) ......10
1178          */
1179         { 0x03, 0x4a },
1180
1181         /*
1182          * 11 CLKRC "Clock Rate Control"
1183          *                  = 128 (0x80) 10000000
1184          *    CLKRC[7] "Internal frequency doublers on off seclection"
1185          *                  =   1 (0x01) 1....... "On"
1186          *    CLKRC[6] "Digital video master slave selection"
1187          *                  =   0 (0x00) .0...... "Master mode, sensor
1188          *                                         provides PCLK"
1189          *    CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1190          *                  =   0 (0x00) ..000000
1191          */
1192         { 0x11, 0x80 },
1193
1194         /*
1195          * 12 COMH "Common Control H"
1196          *                  =   0 (0x00) 00000000
1197          *    COMH[7] "SRST"
1198          *                  =   0 (0x00) 0....... "No-op"
1199          *    COMH[6:4] "Resolution selection"
1200          *                  =   0 (0x00) .000.... "QXGA"
1201          *    COMH[3] "Master slave selection"
1202          *                  =   0 (0x00) ....0... "Master mode"
1203          *    COMH[2] "Internal B/R channel option"
1204          *                  =   0 (0x00) .....0.. "B/R use same channel"
1205          *    COMH[1] "Color bar test pattern"
1206          *                  =   0 (0x00) ......0. "Off"
1207          *    COMH[0] "Reserved"
1208          *                  =   0 (0x00) .......0
1209          */
1210         { 0x12, 0x00 },
1211
1212         /*
1213          * 12 COMH "Common Control H"
1214          *                  =  64 (0x40) 01000000
1215          *    COMH[7] "SRST"
1216          *                  =   0 (0x00) 0....... "No-op"
1217          *    COMH[6:4] "Resolution selection"
1218          *                  =   4 (0x04) .100.... "XGA"
1219          *    COMH[3] "Master slave selection"
1220          *                  =   0 (0x00) ....0... "Master mode"
1221          *    COMH[2] "Internal B/R channel option"
1222          *                  =   0 (0x00) .....0.. "B/R use same channel"
1223          *    COMH[1] "Color bar test pattern"
1224          *                  =   0 (0x00) ......0. "Off"
1225          *    COMH[0] "Reserved"
1226          *                  =   0 (0x00) .......0
1227          */
1228         { 0x12, 0x40 },
1229
1230         /*
1231          * 17 HREFST "Horizontal window start"
1232          *                  =  31 (0x1F) 00011111
1233          *    HREFST[7:0] "Horizontal window start, 8 MSBs"
1234          *                  =  31 (0x1F) 00011111
1235          */
1236         { 0x17, 0x1f },
1237
1238         /*
1239          * 18 HREFEND "Horizontal window end"
1240          *                  =  95 (0x5F) 01011111
1241          *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1242          *                  =  95 (0x5F) 01011111
1243          */
1244         { 0x18, 0x5f },
1245
1246         /*
1247          * 19 VSTRT "Vertical window start"
1248          *                  =   0 (0x00) 00000000
1249          *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1250          *                  =   0 (0x00) 00000000
1251          */
1252         { 0x19, 0x00 },
1253
1254         /*
1255          * 1A VEND "Vertical window end"
1256          *                  =  96 (0x60) 01100000
1257          *    VEND[7:0] "Vertical Window End, 8 MSBs"
1258          *                  =  96 (0x60) 01100000
1259          */
1260         { 0x1a, 0x60 },
1261
1262         /*
1263          * 32 COMM "Common Control M"
1264          *                  =  18 (0x12) 00010010
1265          *    COMM[7:6] "Pixel clock divide option"
1266          *                  =   0 (0x00) 00...... "/1"
1267          *    COMM[5:3] "Horizontal window end position, 3 LSBs"
1268          *                  =   2 (0x02) ..010...
1269          *    COMM[2:0] "Horizontal window start position, 3 LSBs"
1270          *                  =   2 (0x02) .....010
1271          */
1272         { 0x32, 0x12 },
1273
1274         /*
1275          * 03 COMA "Common Control A"
1276          *                  =  74 (0x4A) 01001010
1277          *    COMA[7:4] "AWB Update Threshold"
1278          *                  =   4 (0x04) 0100....
1279          *    COMA[3:2] "Vertical window end line control 2 LSBs"
1280          *                  =   2 (0x02) ....10..
1281          *    COMA[1:0] "Vertical window start line control 2 LSBs"
1282          *                  =   2 (0x02) ......10
1283          */
1284         { 0x03, 0x4a },
1285
1286         /*
1287          * 02 RED "Red Gain Control"
1288          *                  = 175 (0xAF) 10101111
1289          *    RED[7] "Action"
1290          *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1291          *    RED[6:0] "Value"
1292          *                  =  47 (0x2F) .0101111
1293          */
1294         { 0x02, 0xaf },
1295
1296         /*
1297          * 2D ADDVSL "VSYNC Pulse Width"
1298          *                  = 210 (0xD2) 11010010
1299          *    ADDVSL[7:0] "VSYNC pulse width, LSB"
1300          *                  = 210 (0xD2) 11010010
1301          */
1302         { 0x2d, 0xd2 },
1303
1304         /*
1305          * 00 GAIN          =  24 (0x18) 00011000
1306          *    GAIN[7:6] "Reserved"
1307          *                  =   0 (0x00) 00......
1308          *    GAIN[5] "Double"
1309          *                  =   0 (0x00) ..0..... "False"
1310          *    GAIN[4] "Double"
1311          *                  =   1 (0x01) ...1.... "True"
1312          *    GAIN[3:0] "Range"
1313          *                  =   8 (0x08) ....1000
1314          */
1315         { 0x00, 0x18 },
1316
1317         /*
1318          * 01 BLUE "Blue Gain Control"
1319          *                  = 240 (0xF0) 11110000
1320          *    BLUE[7] "Action"
1321          *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1322          *    BLUE[6:0] "Value"
1323          *                  = 112 (0x70) .1110000
1324          */
1325         { 0x01, 0xf0 },
1326
1327         /*
1328          * 10 AEC "Automatic Exposure Control"
1329          *                  =  10 (0x0A) 00001010
1330          *    AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1331          *                  =  10 (0x0A) 00001010
1332          */
1333         { 0x10, 0x0a },
1334
1335         { 0xe1, 0x67 },
1336         { 0xe3, 0x03 },
1337         { 0xe4, 0x26 },
1338         { 0xe5, 0x3e },
1339         { 0xf8, 0x01 },
1340         { 0xff, 0x01 },
1341 };
1342
1343 static const struct ov_i2c_regvals norm_6x20[] = {
1344         { 0x12, 0x80 }, /* reset */
1345         { 0x11, 0x01 },
1346         { 0x03, 0x60 },
1347         { 0x05, 0x7f }, /* For when autoadjust is off */
1348         { 0x07, 0xa8 },
1349         /* The ratio of 0x0c and 0x0d controls the white point */
1350         { 0x0c, 0x24 },
1351         { 0x0d, 0x24 },
1352         { 0x0f, 0x15 }, /* COMS */
1353         { 0x10, 0x75 }, /* AEC Exposure time */
1354         { 0x12, 0x24 }, /* Enable AGC */
1355         { 0x14, 0x04 },
1356         /* 0x16: 0x06 helps frame stability with moving objects */
1357         { 0x16, 0x06 },
1358 /*      { 0x20, 0x30 },  * Aperture correction enable */
1359         { 0x26, 0xb2 }, /* BLC enable */
1360         /* 0x28: 0x05 Selects RGB format if RGB on */
1361         { 0x28, 0x05 },
1362         { 0x2a, 0x04 }, /* Disable framerate adjust */
1363 /*      { 0x2b, 0xac },  * Framerate; Set 2a[7] first */
1364         { 0x2d, 0x85 },
1365         { 0x33, 0xa0 }, /* Color Processing Parameter */
1366         { 0x34, 0xd2 }, /* Max A/D range */
1367         { 0x38, 0x8b },
1368         { 0x39, 0x40 },
1369
1370         { 0x3c, 0x39 }, /* Enable AEC mode changing */
1371         { 0x3c, 0x3c }, /* Change AEC mode */
1372         { 0x3c, 0x24 }, /* Disable AEC mode changing */
1373
1374         { 0x3d, 0x80 },
1375         /* These next two registers (0x4a, 0x4b) are undocumented.
1376          * They control the color balance */
1377         { 0x4a, 0x80 },
1378         { 0x4b, 0x80 },
1379         { 0x4d, 0xd2 }, /* This reduces noise a bit */
1380         { 0x4e, 0xc1 },
1381         { 0x4f, 0x04 },
1382 /* Do 50-53 have any effect? */
1383 /* Toggle 0x12[2] off and on here? */
1384 };
1385
1386 static const struct ov_i2c_regvals norm_6x30[] = {
1387         { 0x12, 0x80 }, /* Reset */
1388         { 0x00, 0x1f }, /* Gain */
1389         { 0x01, 0x99 }, /* Blue gain */
1390         { 0x02, 0x7c }, /* Red gain */
1391         { 0x03, 0xc0 }, /* Saturation */
1392         { 0x05, 0x0a }, /* Contrast */
1393         { 0x06, 0x95 }, /* Brightness */
1394         { 0x07, 0x2d }, /* Sharpness */
1395         { 0x0c, 0x20 },
1396         { 0x0d, 0x20 },
1397         { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1398         { 0x0f, 0x05 },
1399         { 0x10, 0x9a },
1400         { 0x11, 0x00 }, /* Pixel clock = fastest */
1401         { 0x12, 0x24 }, /* Enable AGC and AWB */
1402         { 0x13, 0x21 },
1403         { 0x14, 0x80 },
1404         { 0x15, 0x01 },
1405         { 0x16, 0x03 },
1406         { 0x17, 0x38 },
1407         { 0x18, 0xea },
1408         { 0x19, 0x04 },
1409         { 0x1a, 0x93 },
1410         { 0x1b, 0x00 },
1411         { 0x1e, 0xc4 },
1412         { 0x1f, 0x04 },
1413         { 0x20, 0x20 },
1414         { 0x21, 0x10 },
1415         { 0x22, 0x88 },
1416         { 0x23, 0xc0 }, /* Crystal circuit power level */
1417         { 0x25, 0x9a }, /* Increase AEC black ratio */
1418         { 0x26, 0xb2 }, /* BLC enable */
1419         { 0x27, 0xa2 },
1420         { 0x28, 0x00 },
1421         { 0x29, 0x00 },
1422         { 0x2a, 0x84 }, /* 60 Hz power */
1423         { 0x2b, 0xa8 }, /* 60 Hz power */
1424         { 0x2c, 0xa0 },
1425         { 0x2d, 0x95 }, /* Enable auto-brightness */
1426         { 0x2e, 0x88 },
1427         { 0x33, 0x26 },
1428         { 0x34, 0x03 },
1429         { 0x36, 0x8f },
1430         { 0x37, 0x80 },
1431         { 0x38, 0x83 },
1432         { 0x39, 0x80 },
1433         { 0x3a, 0x0f },
1434         { 0x3b, 0x3c },
1435         { 0x3c, 0x1a },
1436         { 0x3d, 0x80 },
1437         { 0x3e, 0x80 },
1438         { 0x3f, 0x0e },
1439         { 0x40, 0x00 }, /* White bal */
1440         { 0x41, 0x00 }, /* White bal */
1441         { 0x42, 0x80 },
1442         { 0x43, 0x3f }, /* White bal */
1443         { 0x44, 0x80 },
1444         { 0x45, 0x20 },
1445         { 0x46, 0x20 },
1446         { 0x47, 0x80 },
1447         { 0x48, 0x7f },
1448         { 0x49, 0x00 },
1449         { 0x4a, 0x00 },
1450         { 0x4b, 0x80 },
1451         { 0x4c, 0xd0 },
1452         { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1453         { 0x4e, 0x40 },
1454         { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1455         { 0x50, 0xff },
1456         { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1457         { 0x55, 0xff },
1458         { 0x56, 0x12 },
1459         { 0x57, 0x81 },
1460         { 0x58, 0x75 },
1461         { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1462         { 0x5a, 0x2c },
1463         { 0x5b, 0x0f }, /* AWB chrominance levels */
1464         { 0x5c, 0x10 },
1465         { 0x3d, 0x80 },
1466         { 0x27, 0xa6 },
1467         { 0x12, 0x20 }, /* Toggle AWB */
1468         { 0x12, 0x24 },
1469 };
1470
1471 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1472  *
1473  * Register 0x0f in the 7610 has the following effects:
1474  *
1475  * 0x85 (AEC method 1): Best overall, good contrast range
1476  * 0x45 (AEC method 2): Very overexposed
1477  * 0xa5 (spec sheet default): Ok, but the black level is
1478  *      shifted resulting in loss of contrast
1479  * 0x05 (old driver setting): very overexposed, too much
1480  *      contrast
1481  */
1482 static const struct ov_i2c_regvals norm_7610[] = {
1483         { 0x10, 0xff },
1484         { 0x16, 0x06 },
1485         { 0x28, 0x24 },
1486         { 0x2b, 0xac },
1487         { 0x12, 0x00 },
1488         { 0x38, 0x81 },
1489         { 0x28, 0x24 }, /* 0c */
1490         { 0x0f, 0x85 }, /* lg's setting */
1491         { 0x15, 0x01 },
1492         { 0x20, 0x1c },
1493         { 0x23, 0x2a },
1494         { 0x24, 0x10 },
1495         { 0x25, 0x8a },
1496         { 0x26, 0xa2 },
1497         { 0x27, 0xc2 },
1498         { 0x2a, 0x04 },
1499         { 0x2c, 0xfe },
1500         { 0x2d, 0x93 },
1501         { 0x30, 0x71 },
1502         { 0x31, 0x60 },
1503         { 0x32, 0x26 },
1504         { 0x33, 0x20 },
1505         { 0x34, 0x48 },
1506         { 0x12, 0x24 },
1507         { 0x11, 0x01 },
1508         { 0x0c, 0x24 },
1509         { 0x0d, 0x24 },
1510 };
1511
1512 static const struct ov_i2c_regvals norm_7620[] = {
1513         { 0x12, 0x80 },         /* reset */
1514         { 0x00, 0x00 },         /* gain */
1515         { 0x01, 0x80 },         /* blue gain */
1516         { 0x02, 0x80 },         /* red gain */
1517         { 0x03, 0xc0 },         /* OV7670_R03_VREF */
1518         { 0x06, 0x60 },
1519         { 0x07, 0x00 },
1520         { 0x0c, 0x24 },
1521         { 0x0c, 0x24 },
1522         { 0x0d, 0x24 },
1523         { 0x11, 0x01 },
1524         { 0x12, 0x24 },
1525         { 0x13, 0x01 },
1526         { 0x14, 0x84 },
1527         { 0x15, 0x01 },
1528         { 0x16, 0x03 },
1529         { 0x17, 0x2f },
1530         { 0x18, 0xcf },
1531         { 0x19, 0x06 },
1532         { 0x1a, 0xf5 },
1533         { 0x1b, 0x00 },
1534         { 0x20, 0x18 },
1535         { 0x21, 0x80 },
1536         { 0x22, 0x80 },
1537         { 0x23, 0x00 },
1538         { 0x26, 0xa2 },
1539         { 0x27, 0xea },
1540         { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1541         { 0x29, 0x00 },
1542         { 0x2a, 0x10 },
1543         { 0x2b, 0x00 },
1544         { 0x2c, 0x88 },
1545         { 0x2d, 0x91 },
1546         { 0x2e, 0x80 },
1547         { 0x2f, 0x44 },
1548         { 0x60, 0x27 },
1549         { 0x61, 0x02 },
1550         { 0x62, 0x5f },
1551         { 0x63, 0xd5 },
1552         { 0x64, 0x57 },
1553         { 0x65, 0x83 },
1554         { 0x66, 0x55 },
1555         { 0x67, 0x92 },
1556         { 0x68, 0xcf },
1557         { 0x69, 0x76 },
1558         { 0x6a, 0x22 },
1559         { 0x6b, 0x00 },
1560         { 0x6c, 0x02 },
1561         { 0x6d, 0x44 },
1562         { 0x6e, 0x80 },
1563         { 0x6f, 0x1d },
1564         { 0x70, 0x8b },
1565         { 0x71, 0x00 },
1566         { 0x72, 0x14 },
1567         { 0x73, 0x54 },
1568         { 0x74, 0x00 },
1569         { 0x75, 0x8e },
1570         { 0x76, 0x00 },
1571         { 0x77, 0xff },
1572         { 0x78, 0x80 },
1573         { 0x79, 0x80 },
1574         { 0x7a, 0x80 },
1575         { 0x7b, 0xe2 },
1576         { 0x7c, 0x00 },
1577 };
1578
1579 /* 7640 and 7648. The defaults should be OK for most registers. */
1580 static const struct ov_i2c_regvals norm_7640[] = {
1581         { 0x12, 0x80 },
1582         { 0x12, 0x14 },
1583 };
1584
1585 static const struct ov_regvals init_519_ov7660[] = {
1586         { 0x5d, 0x03 }, /* Turn off suspend mode */
1587         { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1588         { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1589         { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1590         { 0xa3, 0x18 },
1591         { 0xa4, 0x04 },
1592         { 0xa5, 0x28 },
1593         { 0x37, 0x00 }, /* SetUsbInit */
1594         { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1595         /* Enable both fields, YUV Input, disable defect comp (why?) */
1596         { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1597         { 0x21, 0x38 },
1598         { 0x22, 0x1d },
1599         { 0x17, 0x50 }, /* undocumented */
1600         { 0x37, 0x00 }, /* undocumented */
1601         { 0x40, 0xff }, /* I2C timeout counter */
1602         { 0x46, 0x00 }, /* I2C clock prescaler */
1603 };
1604 static const struct ov_i2c_regvals norm_7660[] = {
1605         {OV7670_R12_COM7, OV7670_COM7_RESET},
1606         {OV7670_R11_CLKRC, 0x81},
1607         {0x92, 0x00},                   /* DM_LNL */
1608         {0x93, 0x00},                   /* DM_LNH */
1609         {0x9d, 0x4c},                   /* BD50ST */
1610         {0x9e, 0x3f},                   /* BD60ST */
1611         {OV7670_R3B_COM11, 0x02},
1612         {OV7670_R13_COM8, 0xf5},
1613         {OV7670_R10_AECH, 0x00},
1614         {OV7670_R00_GAIN, 0x00},
1615         {OV7670_R01_BLUE, 0x7c},
1616         {OV7670_R02_RED, 0x9d},
1617         {OV7670_R12_COM7, 0x00},
1618         {OV7670_R04_COM1, 00},
1619         {OV7670_R18_HSTOP, 0x01},
1620         {OV7670_R17_HSTART, 0x13},
1621         {OV7670_R32_HREF, 0x92},
1622         {OV7670_R19_VSTART, 0x02},
1623         {OV7670_R1A_VSTOP, 0x7a},
1624         {OV7670_R03_VREF, 0x00},
1625         {OV7670_R0E_COM5, 0x04},
1626         {OV7670_R0F_COM6, 0x62},
1627         {OV7670_R15_COM10, 0x00},
1628         {0x16, 0x02},                   /* RSVD */
1629         {0x1b, 0x00},                   /* PSHFT */
1630         {OV7670_R1E_MVFP, 0x01},
1631         {0x29, 0x3c},                   /* RSVD */
1632         {0x33, 0x00},                   /* CHLF */
1633         {0x34, 0x07},                   /* ARBLM */
1634         {0x35, 0x84},                   /* RSVD */
1635         {0x36, 0x00},                   /* RSVD */
1636         {0x37, 0x04},                   /* ADC */
1637         {0x39, 0x43},                   /* OFON */
1638         {OV7670_R3A_TSLB, 0x00},
1639         {OV7670_R3C_COM12, 0x6c},
1640         {OV7670_R3D_COM13, 0x98},
1641         {OV7670_R3F_EDGE, 0x23},
1642         {OV7670_R40_COM15, 0xc1},
1643         {OV7670_R41_COM16, 0x22},
1644         {0x6b, 0x0a},                   /* DBLV */
1645         {0xa1, 0x08},                   /* RSVD */
1646         {0x69, 0x80},                   /* HV */
1647         {0x43, 0xf0},                   /* RSVD.. */
1648         {0x44, 0x10},
1649         {0x45, 0x78},
1650         {0x46, 0xa8},
1651         {0x47, 0x60},
1652         {0x48, 0x80},
1653         {0x59, 0xba},
1654         {0x5a, 0x9a},
1655         {0x5b, 0x22},
1656         {0x5c, 0xb9},
1657         {0x5d, 0x9b},
1658         {0x5e, 0x10},
1659         {0x5f, 0xe0},
1660         {0x60, 0x85},
1661         {0x61, 0x60},
1662         {0x9f, 0x9d},                   /* RSVD */
1663         {0xa0, 0xa0},                   /* DSPC2 */
1664         {0x4f, 0x60},                   /* matrix */
1665         {0x50, 0x64},
1666         {0x51, 0x04},
1667         {0x52, 0x18},
1668         {0x53, 0x3c},
1669         {0x54, 0x54},
1670         {0x55, 0x40},
1671         {0x56, 0x40},
1672         {0x57, 0x40},
1673         {0x58, 0x0d},                   /* matrix sign */
1674         {0x8b, 0xcc},                   /* RSVD */
1675         {0x8c, 0xcc},
1676         {0x8d, 0xcf},
1677         {0x6c, 0x40},                   /* gamma curve */
1678         {0x6d, 0xe0},
1679         {0x6e, 0xa0},
1680         {0x6f, 0x80},
1681         {0x70, 0x70},
1682         {0x71, 0x80},
1683         {0x72, 0x60},
1684         {0x73, 0x60},
1685         {0x74, 0x50},
1686         {0x75, 0x40},
1687         {0x76, 0x38},
1688         {0x77, 0x3c},
1689         {0x78, 0x32},
1690         {0x79, 0x1a},
1691         {0x7a, 0x28},
1692         {0x7b, 0x24},
1693         {0x7c, 0x04},                   /* gamma curve */
1694         {0x7d, 0x12},
1695         {0x7e, 0x26},
1696         {0x7f, 0x46},
1697         {0x80, 0x54},
1698         {0x81, 0x64},
1699         {0x82, 0x70},
1700         {0x83, 0x7c},
1701         {0x84, 0x86},
1702         {0x85, 0x8e},
1703         {0x86, 0x9c},
1704         {0x87, 0xab},
1705         {0x88, 0xc4},
1706         {0x89, 0xd1},
1707         {0x8a, 0xe5},
1708         {OV7670_R14_COM9, 0x1e},
1709         {OV7670_R24_AEW, 0x80},
1710         {OV7670_R25_AEB, 0x72},
1711         {OV7670_R26_VPT, 0xb3},
1712         {0x62, 0x80},                   /* LCC1 */
1713         {0x63, 0x80},                   /* LCC2 */
1714         {0x64, 0x06},                   /* LCC3 */
1715         {0x65, 0x00},                   /* LCC4 */
1716         {0x66, 0x01},                   /* LCC5 */
1717         {0x94, 0x0e},                   /* RSVD.. */
1718         {0x95, 0x14},
1719         {OV7670_R13_COM8, OV7670_COM8_FASTAEC
1720                         | OV7670_COM8_AECSTEP
1721                         | OV7670_COM8_BFILT
1722                         | 0x10
1723                         | OV7670_COM8_AGC
1724                         | OV7670_COM8_AWB
1725                         | OV7670_COM8_AEC},
1726         {0xa1, 0xc8}
1727 };
1728 static const struct ov_i2c_regvals norm_9600[] = {
1729         {0x12, 0x80},
1730         {0x0c, 0x28},
1731         {0x11, 0x80},
1732         {0x13, 0xb5},
1733         {0x14, 0x3e},
1734         {0x1b, 0x04},
1735         {0x24, 0xb0},
1736         {0x25, 0x90},
1737         {0x26, 0x94},
1738         {0x35, 0x90},
1739         {0x37, 0x07},
1740         {0x38, 0x08},
1741         {0x01, 0x8e},
1742         {0x02, 0x85}
1743 };
1744
1745 /* 7670. Defaults taken from OmniVision provided data,
1746 *  as provided by Jonathan Corbet of OLPC               */
1747 static const struct ov_i2c_regvals norm_7670[] = {
1748         { OV7670_R12_COM7, OV7670_COM7_RESET },
1749         { OV7670_R3A_TSLB, 0x04 },              /* OV */
1750         { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1751         { OV7670_R11_CLKRC, 0x01 },
1752 /*
1753  * Set the hardware window.  These values from OV don't entirely
1754  * make sense - hstop is less than hstart.  But they work...
1755  */
1756         { OV7670_R17_HSTART, 0x13 },
1757         { OV7670_R18_HSTOP, 0x01 },
1758         { OV7670_R32_HREF, 0xb6 },
1759         { OV7670_R19_VSTART, 0x02 },
1760         { OV7670_R1A_VSTOP, 0x7a },
1761         { OV7670_R03_VREF, 0x0a },
1762
1763         { OV7670_R0C_COM3, 0x00 },
1764         { OV7670_R3E_COM14, 0x00 },
1765 /* Mystery scaling numbers */
1766         { 0x70, 0x3a },
1767         { 0x71, 0x35 },
1768         { 0x72, 0x11 },
1769         { 0x73, 0xf0 },
1770         { 0xa2, 0x02 },
1771 /*      { OV7670_R15_COM10, 0x0 }, */
1772
1773 /* Gamma curve values */
1774         { 0x7a, 0x20 },
1775         { 0x7b, 0x10 },
1776         { 0x7c, 0x1e },
1777         { 0x7d, 0x35 },
1778         { 0x7e, 0x5a },
1779         { 0x7f, 0x69 },
1780         { 0x80, 0x76 },
1781         { 0x81, 0x80 },
1782         { 0x82, 0x88 },
1783         { 0x83, 0x8f },
1784         { 0x84, 0x96 },
1785         { 0x85, 0xa3 },
1786         { 0x86, 0xaf },
1787         { 0x87, 0xc4 },
1788         { 0x88, 0xd7 },
1789         { 0x89, 0xe8 },
1790
1791 /* AGC and AEC parameters.  Note we start by disabling those features,
1792    then turn them only after tweaking the values. */
1793         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1794                          | OV7670_COM8_AECSTEP
1795                          | OV7670_COM8_BFILT },
1796         { OV7670_R00_GAIN, 0x00 },
1797         { OV7670_R10_AECH, 0x00 },
1798         { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1799         { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1800         { OV7670_RA5_BD50MAX, 0x05 },
1801         { OV7670_RAB_BD60MAX, 0x07 },
1802         { OV7670_R24_AEW, 0x95 },
1803         { OV7670_R25_AEB, 0x33 },
1804         { OV7670_R26_VPT, 0xe3 },
1805         { OV7670_R9F_HAECC1, 0x78 },
1806         { OV7670_RA0_HAECC2, 0x68 },
1807         { 0xa1, 0x03 }, /* magic */
1808         { OV7670_RA6_HAECC3, 0xd8 },
1809         { OV7670_RA7_HAECC4, 0xd8 },
1810         { OV7670_RA8_HAECC5, 0xf0 },
1811         { OV7670_RA9_HAECC6, 0x90 },
1812         { OV7670_RAA_HAECC7, 0x94 },
1813         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1814                         | OV7670_COM8_AECSTEP
1815                         | OV7670_COM8_BFILT
1816                         | OV7670_COM8_AGC
1817                         | OV7670_COM8_AEC },
1818
1819 /* Almost all of these are magic "reserved" values.  */
1820         { OV7670_R0E_COM5, 0x61 },
1821         { OV7670_R0F_COM6, 0x4b },
1822         { 0x16, 0x02 },
1823         { OV7670_R1E_MVFP, 0x07 },
1824         { 0x21, 0x02 },
1825         { 0x22, 0x91 },
1826         { 0x29, 0x07 },
1827         { 0x33, 0x0b },
1828         { 0x35, 0x0b },
1829         { 0x37, 0x1d },
1830         { 0x38, 0x71 },
1831         { 0x39, 0x2a },
1832         { OV7670_R3C_COM12, 0x78 },
1833         { 0x4d, 0x40 },
1834         { 0x4e, 0x20 },
1835         { OV7670_R69_GFIX, 0x00 },
1836         { 0x6b, 0x4a },
1837         { 0x74, 0x10 },
1838         { 0x8d, 0x4f },
1839         { 0x8e, 0x00 },
1840         { 0x8f, 0x00 },
1841         { 0x90, 0x00 },
1842         { 0x91, 0x00 },
1843         { 0x96, 0x00 },
1844         { 0x9a, 0x00 },
1845         { 0xb0, 0x84 },
1846         { 0xb1, 0x0c },
1847         { 0xb2, 0x0e },
1848         { 0xb3, 0x82 },
1849         { 0xb8, 0x0a },
1850
1851 /* More reserved magic, some of which tweaks white balance */
1852         { 0x43, 0x0a },
1853         { 0x44, 0xf0 },
1854         { 0x45, 0x34 },
1855         { 0x46, 0x58 },
1856         { 0x47, 0x28 },
1857         { 0x48, 0x3a },
1858         { 0x59, 0x88 },
1859         { 0x5a, 0x88 },
1860         { 0x5b, 0x44 },
1861         { 0x5c, 0x67 },
1862         { 0x5d, 0x49 },
1863         { 0x5e, 0x0e },
1864         { 0x6c, 0x0a },
1865         { 0x6d, 0x55 },
1866         { 0x6e, 0x11 },
1867         { 0x6f, 0x9f },                 /* "9e for advance AWB" */
1868         { 0x6a, 0x40 },
1869         { OV7670_R01_BLUE, 0x40 },
1870         { OV7670_R02_RED, 0x60 },
1871         { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1872                         | OV7670_COM8_AECSTEP
1873                         | OV7670_COM8_BFILT
1874                         | OV7670_COM8_AGC
1875                         | OV7670_COM8_AEC
1876                         | OV7670_COM8_AWB },
1877
1878 /* Matrix coefficients */
1879         { 0x4f, 0x80 },
1880         { 0x50, 0x80 },
1881         { 0x51, 0x00 },
1882         { 0x52, 0x22 },
1883         { 0x53, 0x5e },
1884         { 0x54, 0x80 },
1885         { 0x58, 0x9e },
1886
1887         { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
1888         { OV7670_R3F_EDGE, 0x00 },
1889         { 0x75, 0x05 },
1890         { 0x76, 0xe1 },
1891         { 0x4c, 0x00 },
1892         { 0x77, 0x01 },
1893         { OV7670_R3D_COM13, OV7670_COM13_GAMMA
1894                           | OV7670_COM13_UVSAT
1895                           | 2},         /* was 3 */
1896         { 0x4b, 0x09 },
1897         { 0xc9, 0x60 },
1898         { OV7670_R41_COM16, 0x38 },
1899         { 0x56, 0x40 },
1900
1901         { 0x34, 0x11 },
1902         { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1903         { 0xa4, 0x88 },
1904         { 0x96, 0x00 },
1905         { 0x97, 0x30 },
1906         { 0x98, 0x20 },
1907         { 0x99, 0x30 },
1908         { 0x9a, 0x84 },
1909         { 0x9b, 0x29 },
1910         { 0x9c, 0x03 },
1911         { 0x9d, 0x4c },
1912         { 0x9e, 0x3f },
1913         { 0x78, 0x04 },
1914
1915 /* Extra-weird stuff.  Some sort of multiplexor register */
1916         { 0x79, 0x01 },
1917         { 0xc8, 0xf0 },
1918         { 0x79, 0x0f },
1919         { 0xc8, 0x00 },
1920         { 0x79, 0x10 },
1921         { 0xc8, 0x7e },
1922         { 0x79, 0x0a },
1923         { 0xc8, 0x80 },
1924         { 0x79, 0x0b },
1925         { 0xc8, 0x01 },
1926         { 0x79, 0x0c },
1927         { 0xc8, 0x0f },
1928         { 0x79, 0x0d },
1929         { 0xc8, 0x20 },
1930         { 0x79, 0x09 },
1931         { 0xc8, 0x80 },
1932         { 0x79, 0x02 },
1933         { 0xc8, 0xc0 },
1934         { 0x79, 0x03 },
1935         { 0xc8, 0x40 },
1936         { 0x79, 0x05 },
1937         { 0xc8, 0x30 },
1938         { 0x79, 0x26 },
1939 };
1940
1941 static const struct ov_i2c_regvals norm_8610[] = {
1942         { 0x12, 0x80 },
1943         { 0x00, 0x00 },
1944         { 0x01, 0x80 },
1945         { 0x02, 0x80 },
1946         { 0x03, 0xc0 },
1947         { 0x04, 0x30 },
1948         { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1949         { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1950         { 0x0a, 0x86 },
1951         { 0x0b, 0xb0 },
1952         { 0x0c, 0x20 },
1953         { 0x0d, 0x20 },
1954         { 0x11, 0x01 },
1955         { 0x12, 0x25 },
1956         { 0x13, 0x01 },
1957         { 0x14, 0x04 },
1958         { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1959         { 0x16, 0x03 },
1960         { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1961         { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1962         { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1963         { 0x1a, 0xf5 },
1964         { 0x1b, 0x00 },
1965         { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1966         { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1967         { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1968         { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1969         { 0x26, 0xa2 },
1970         { 0x27, 0xea },
1971         { 0x28, 0x00 },
1972         { 0x29, 0x00 },
1973         { 0x2a, 0x80 },
1974         { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1975         { 0x2c, 0xac },
1976         { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1977         { 0x2e, 0x80 },
1978         { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1979         { 0x4c, 0x00 },
1980         { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1981         { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1982         { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1983         { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1984         { 0x63, 0xff },
1985         { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1986                          * maybe thats wrong */
1987         { 0x65, 0x00 },
1988         { 0x66, 0x55 },
1989         { 0x67, 0xb0 },
1990         { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1991         { 0x69, 0x02 },
1992         { 0x6a, 0x22 },
1993         { 0x6b, 0x00 },
1994         { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1995                          * deleting bit7 colors the first images red */
1996         { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1997         { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1998         { 0x6f, 0x01 },
1999         { 0x70, 0x8b },
2000         { 0x71, 0x00 },
2001         { 0x72, 0x14 },
2002         { 0x73, 0x54 },
2003         { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
2004         { 0x75, 0x0e },
2005         { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
2006         { 0x77, 0xff },
2007         { 0x78, 0x80 },
2008         { 0x79, 0x80 },
2009         { 0x7a, 0x80 },
2010         { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
2011         { 0x7c, 0x00 },
2012         { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
2013         { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
2014         { 0x7f, 0xfb },
2015         { 0x80, 0x28 },
2016         { 0x81, 0x00 },
2017         { 0x82, 0x23 },
2018         { 0x83, 0x0b },
2019         { 0x84, 0x00 },
2020         { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
2021         { 0x86, 0xc9 },
2022         { 0x87, 0x00 },
2023         { 0x88, 0x00 },
2024         { 0x89, 0x01 },
2025         { 0x12, 0x20 },
2026         { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
2027 };
2028
2029 static unsigned char ov7670_abs_to_sm(unsigned char v)
2030 {
2031         if (v > 127)
2032                 return v & 0x7f;
2033         return (128 - v) | 0x80;
2034 }
2035
2036 /* Write a OV519 register */
2037 static void reg_w(struct sd *sd, u16 index, u16 value)
2038 {
2039         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2040         int ret, req = 0;
2041
2042         if (sd->gspca_dev.usb_err < 0)
2043                 return;
2044
2045         switch (sd->bridge) {
2046         case BRIDGE_OV511:
2047         case BRIDGE_OV511PLUS:
2048                 req = 2;
2049                 break;
2050         case BRIDGE_OVFX2:
2051                 req = 0x0a;
2052                 /* fall through */
2053         case BRIDGE_W9968CF:
2054                 PDEBUG(D_USBO, "SET %02x %04x %04x",
2055                                 req, value, index);
2056                 ret = usb_control_msg(sd->gspca_dev.dev,
2057                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2058                         req,
2059                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2060                         value, index, NULL, 0, 500);
2061                 goto leave;
2062         default:
2063                 req = 1;
2064         }
2065
2066         PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
2067                         req, index, value);
2068         sd->gspca_dev.usb_buf[0] = value;
2069         ret = usb_control_msg(sd->gspca_dev.dev,
2070                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2071                         req,
2072                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2073                         0, index,
2074                         sd->gspca_dev.usb_buf, 1, 500);
2075 leave:
2076         if (ret < 0) {
2077                 PERR("reg_w %02x failed %d\n", index, ret);
2078                 sd->gspca_dev.usb_err = ret;
2079                 return;
2080         }
2081 }
2082
2083 /* Read from a OV519 register, note not valid for the w9968cf!! */
2084 /* returns: negative is error, pos or zero is data */
2085 static int reg_r(struct sd *sd, u16 index)
2086 {
2087         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2088         int ret;
2089         int req;
2090
2091         if (sd->gspca_dev.usb_err < 0)
2092                 return -1;
2093
2094         switch (sd->bridge) {
2095         case BRIDGE_OV511:
2096         case BRIDGE_OV511PLUS:
2097                 req = 3;
2098                 break;
2099         case BRIDGE_OVFX2:
2100                 req = 0x0b;
2101                 break;
2102         default:
2103                 req = 1;
2104         }
2105
2106         ret = usb_control_msg(sd->gspca_dev.dev,
2107                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2108                         req,
2109                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2110                         0, index, sd->gspca_dev.usb_buf, 1, 500);
2111
2112         if (ret >= 0) {
2113                 ret = sd->gspca_dev.usb_buf[0];
2114                 PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
2115                         req, index, ret);
2116         } else {
2117                 PERR("reg_r %02x failed %d\n", index, ret);
2118                 sd->gspca_dev.usb_err = ret;
2119         }
2120
2121         return ret;
2122 }
2123
2124 /* Read 8 values from a OV519 register */
2125 static int reg_r8(struct sd *sd,
2126                   u16 index)
2127 {
2128         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2129         int ret;
2130
2131         if (sd->gspca_dev.usb_err < 0)
2132                 return -1;
2133
2134         ret = usb_control_msg(sd->gspca_dev.dev,
2135                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2136                         1,                      /* REQ_IO */
2137                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2138                         0, index, sd->gspca_dev.usb_buf, 8, 500);
2139
2140         if (ret >= 0) {
2141                 ret = sd->gspca_dev.usb_buf[0];
2142         } else {
2143                 PERR("reg_r8 %02x failed %d\n", index, ret);
2144                 sd->gspca_dev.usb_err = ret;
2145         }
2146
2147         return ret;
2148 }
2149
2150 /*
2151  * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2152  * the same position as 1's in "mask" are cleared and set to "value". Bits
2153  * that are in the same position as 0's in "mask" are preserved, regardless
2154  * of their respective state in "value".
2155  */
2156 static void reg_w_mask(struct sd *sd,
2157                         u16 index,
2158                         u8 value,
2159                         u8 mask)
2160 {
2161         int ret;
2162         u8 oldval;
2163
2164         if (mask != 0xff) {
2165                 value &= mask;                  /* Enforce mask on value */
2166                 ret = reg_r(sd, index);
2167                 if (ret < 0)
2168                         return;
2169
2170                 oldval = ret & ~mask;           /* Clear the masked bits */
2171                 value |= oldval;                /* Set the desired bits */
2172         }
2173         reg_w(sd, index, value);
2174 }
2175
2176 /*
2177  * Writes multiple (n) byte value to a single register. Only valid with certain
2178  * registers (0x30 and 0xc4 - 0xce).
2179  */
2180 static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2181 {
2182         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2183         int ret;
2184
2185         if (sd->gspca_dev.usb_err < 0)
2186                 return;
2187
2188         *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2189
2190         ret = usb_control_msg(sd->gspca_dev.dev,
2191                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2192                         1 /* REG_IO */,
2193                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2194                         0, index,
2195                         sd->gspca_dev.usb_buf, n, 500);
2196         if (ret < 0) {
2197                 PERR("reg_w32 %02x failed %d\n", index, ret);
2198                 sd->gspca_dev.usb_err = ret;
2199         }
2200 }
2201
2202 static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2203 {
2204         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2205         int rc, retries;
2206
2207         PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
2208
2209         /* Three byte write cycle */
2210         for (retries = 6; ; ) {
2211                 /* Select camera register */
2212                 reg_w(sd, R51x_I2C_SADDR_3, reg);
2213
2214                 /* Write "value" to I2C data port of OV511 */
2215                 reg_w(sd, R51x_I2C_DATA, value);
2216
2217                 /* Initiate 3-byte write cycle */
2218                 reg_w(sd, R511_I2C_CTL, 0x01);
2219
2220                 do {
2221                         rc = reg_r(sd, R511_I2C_CTL);
2222                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2223
2224                 if (rc < 0)
2225                         return;
2226
2227                 if ((rc & 2) == 0) /* Ack? */
2228                         break;
2229                 if (--retries < 0) {
2230                         PDEBUG(D_USBO, "i2c write retries exhausted");
2231                         return;
2232                 }
2233         }
2234 }
2235
2236 static int ov511_i2c_r(struct sd *sd, u8 reg)
2237 {
2238         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2239         int rc, value, retries;
2240
2241         /* Two byte write cycle */
2242         for (retries = 6; ; ) {
2243                 /* Select camera register */
2244                 reg_w(sd, R51x_I2C_SADDR_2, reg);
2245
2246                 /* Initiate 2-byte write cycle */
2247                 reg_w(sd, R511_I2C_CTL, 0x03);
2248
2249                 do {
2250                         rc = reg_r(sd, R511_I2C_CTL);
2251                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2252
2253                 if (rc < 0)
2254                         return rc;
2255
2256                 if ((rc & 2) == 0) /* Ack? */
2257                         break;
2258
2259                 /* I2C abort */
2260                 reg_w(sd, R511_I2C_CTL, 0x10);
2261
2262                 if (--retries < 0) {
2263                         PDEBUG(D_USBI, "i2c write retries exhausted");
2264                         return -1;
2265                 }
2266         }
2267
2268         /* Two byte read cycle */
2269         for (retries = 6; ; ) {
2270                 /* Initiate 2-byte read cycle */
2271                 reg_w(sd, R511_I2C_CTL, 0x05);
2272
2273                 do {
2274                         rc = reg_r(sd, R511_I2C_CTL);
2275                 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2276
2277                 if (rc < 0)
2278                         return rc;
2279
2280                 if ((rc & 2) == 0) /* Ack? */
2281                         break;
2282
2283                 /* I2C abort */
2284                 reg_w(sd, R511_I2C_CTL, 0x10);
2285
2286                 if (--retries < 0) {
2287                         PDEBUG(D_USBI, "i2c read retries exhausted");
2288                         return -1;
2289                 }
2290         }
2291
2292         value = reg_r(sd, R51x_I2C_DATA);
2293
2294         PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
2295
2296         /* This is needed to make i2c_w() work */
2297         reg_w(sd, R511_I2C_CTL, 0x05);
2298
2299         return value;
2300 }
2301
2302 /*
2303  * The OV518 I2C I/O procedure is different, hence, this function.
2304  * This is normally only called from i2c_w(). Note that this function
2305  * always succeeds regardless of whether the sensor is present and working.
2306  */
2307 static void ov518_i2c_w(struct sd *sd,
2308                 u8 reg,
2309                 u8 value)
2310 {
2311         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2312
2313         PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
2314
2315         /* Select camera register */
2316         reg_w(sd, R51x_I2C_SADDR_3, reg);
2317
2318         /* Write "value" to I2C data port of OV511 */
2319         reg_w(sd, R51x_I2C_DATA, value);
2320
2321         /* Initiate 3-byte write cycle */
2322         reg_w(sd, R518_I2C_CTL, 0x01);
2323
2324         /* wait for write complete */
2325         msleep(4);
2326         reg_r8(sd, R518_I2C_CTL);
2327 }
2328
2329 /*
2330  * returns: negative is error, pos or zero is data
2331  *
2332  * The OV518 I2C I/O procedure is different, hence, this function.
2333  * This is normally only called from i2c_r(). Note that this function
2334  * always succeeds regardless of whether the sensor is present and working.
2335  */
2336 static int ov518_i2c_r(struct sd *sd, u8 reg)
2337 {
2338         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2339         int value;
2340
2341         /* Select camera register */
2342         reg_w(sd, R51x_I2C_SADDR_2, reg);
2343
2344         /* Initiate 2-byte write cycle */
2345         reg_w(sd, R518_I2C_CTL, 0x03);
2346         reg_r8(sd, R518_I2C_CTL);
2347
2348         /* Initiate 2-byte read cycle */
2349         reg_w(sd, R518_I2C_CTL, 0x05);
2350         reg_r8(sd, R518_I2C_CTL);
2351
2352         value = reg_r(sd, R51x_I2C_DATA);
2353         PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
2354         return value;
2355 }
2356
2357 static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2358 {
2359         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2360         int ret;
2361
2362         if (sd->gspca_dev.usb_err < 0)
2363                 return;
2364
2365         ret = usb_control_msg(sd->gspca_dev.dev,
2366                         usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2367                         0x02,
2368                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2369                         (u16) value, (u16) reg, NULL, 0, 500);
2370
2371         if (ret < 0) {
2372                 PERR("ovfx2_i2c_w %02x failed %d\n", reg, ret);
2373                 sd->gspca_dev.usb_err = ret;
2374         }
2375
2376         PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
2377 }
2378
2379 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2380 {
2381         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2382         int ret;
2383
2384         if (sd->gspca_dev.usb_err < 0)
2385                 return -1;
2386
2387         ret = usb_control_msg(sd->gspca_dev.dev,
2388                         usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2389                         0x03,
2390                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2391                         0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2392
2393         if (ret >= 0) {
2394                 ret = sd->gspca_dev.usb_buf[0];
2395                 PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
2396         } else {
2397                 PERR("ovfx2_i2c_r %02x failed %d\n", reg, ret);
2398                 sd->gspca_dev.usb_err = ret;
2399         }
2400
2401         return ret;
2402 }
2403
2404 static void i2c_w(struct sd *sd, u8 reg, u8 value)
2405 {
2406         if (sd->sensor_reg_cache[reg] == value)
2407                 return;
2408
2409         switch (sd->bridge) {
2410         case BRIDGE_OV511:
2411         case BRIDGE_OV511PLUS:
2412                 ov511_i2c_w(sd, reg, value);
2413                 break;
2414         case BRIDGE_OV518:
2415         case BRIDGE_OV518PLUS:
2416         case BRIDGE_OV519:
2417                 ov518_i2c_w(sd, reg, value);
2418                 break;
2419         case BRIDGE_OVFX2:
2420                 ovfx2_i2c_w(sd, reg, value);
2421                 break;
2422         case BRIDGE_W9968CF:
2423                 w9968cf_i2c_w(sd, reg, value);
2424                 break;
2425         }
2426
2427         if (sd->gspca_dev.usb_err >= 0) {
2428                 /* Up on sensor reset empty the register cache */
2429                 if (reg == 0x12 && (value & 0x80))
2430                         memset(sd->sensor_reg_cache, -1,
2431                                 sizeof(sd->sensor_reg_cache));
2432                 else
2433                         sd->sensor_reg_cache[reg] = value;
2434         }
2435 }
2436
2437 static int i2c_r(struct sd *sd, u8 reg)
2438 {
2439         int ret = -1;
2440
2441         if (sd->sensor_reg_cache[reg] != -1)
2442                 return sd->sensor_reg_cache[reg];
2443
2444         switch (sd->bridge) {
2445         case BRIDGE_OV511:
2446         case BRIDGE_OV511PLUS:
2447                 ret = ov511_i2c_r(sd, reg);
2448                 break;
2449         case BRIDGE_OV518:
2450         case BRIDGE_OV518PLUS:
2451         case BRIDGE_OV519:
2452                 ret = ov518_i2c_r(sd, reg);
2453                 break;
2454         case BRIDGE_OVFX2:
2455                 ret = ovfx2_i2c_r(sd, reg);
2456                 break;
2457         case BRIDGE_W9968CF:
2458                 ret = w9968cf_i2c_r(sd, reg);
2459                 break;
2460         }
2461
2462         if (ret >= 0)
2463                 sd->sensor_reg_cache[reg] = ret;
2464
2465         return ret;
2466 }
2467
2468 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2469  * the same position as 1's in "mask" are cleared and set to "value". Bits
2470  * that are in the same position as 0's in "mask" are preserved, regardless
2471  * of their respective state in "value".
2472  */
2473 static void i2c_w_mask(struct sd *sd,
2474                         u8 reg,
2475                         u8 value,
2476                         u8 mask)
2477 {
2478         int rc;
2479         u8 oldval;
2480
2481         value &= mask;                  /* Enforce mask on value */
2482         rc = i2c_r(sd, reg);
2483         if (rc < 0)
2484                 return;
2485         oldval = rc & ~mask;            /* Clear the masked bits */
2486         value |= oldval;                /* Set the desired bits */
2487         i2c_w(sd, reg, value);
2488 }
2489
2490 /* Temporarily stops OV511 from functioning. Must do this before changing
2491  * registers while the camera is streaming */
2492 static inline void ov51x_stop(struct sd *sd)
2493 {
2494         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2495
2496         PDEBUG(D_STREAM, "stopping");
2497         sd->stopped = 1;
2498         switch (sd->bridge) {
2499         case BRIDGE_OV511:
2500         case BRIDGE_OV511PLUS:
2501                 reg_w(sd, R51x_SYS_RESET, 0x3d);
2502                 break;
2503         case BRIDGE_OV518:
2504         case BRIDGE_OV518PLUS:
2505                 reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2506                 break;
2507         case BRIDGE_OV519:
2508                 reg_w(sd, OV519_R51_RESET1, 0x0f);
2509                 reg_w(sd, OV519_R51_RESET1, 0x00);
2510                 reg_w(sd, 0x22, 0x00);          /* FRAR */
2511                 break;
2512         case BRIDGE_OVFX2:
2513                 reg_w_mask(sd, 0x0f, 0x00, 0x02);
2514                 break;
2515         case BRIDGE_W9968CF:
2516                 reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2517                 break;
2518         }
2519 }
2520
2521 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2522  * actually stopped (for performance). */
2523 static inline void ov51x_restart(struct sd *sd)
2524 {
2525         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2526
2527         PDEBUG(D_STREAM, "restarting");
2528         if (!sd->stopped)
2529                 return;
2530         sd->stopped = 0;
2531
2532         /* Reinitialize the stream */
2533         switch (sd->bridge) {
2534         case BRIDGE_OV511:
2535         case BRIDGE_OV511PLUS:
2536                 reg_w(sd, R51x_SYS_RESET, 0x00);
2537                 break;
2538         case BRIDGE_OV518:
2539         case BRIDGE_OV518PLUS:
2540                 reg_w(sd, 0x2f, 0x80);
2541                 reg_w(sd, R51x_SYS_RESET, 0x00);
2542                 break;
2543         case BRIDGE_OV519:
2544                 reg_w(sd, OV519_R51_RESET1, 0x0f);
2545                 reg_w(sd, OV519_R51_RESET1, 0x00);
2546                 reg_w(sd, 0x22, 0x1d);          /* FRAR */
2547                 break;
2548         case BRIDGE_OVFX2:
2549                 reg_w_mask(sd, 0x0f, 0x02, 0x02);
2550                 break;
2551         case BRIDGE_W9968CF:
2552                 reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2553                 break;
2554         }
2555 }
2556
2557 static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2558
2559 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2560  * is synchronized. Returns <0 on failure.
2561  */
2562 static int init_ov_sensor(struct sd *sd, u8 slave)
2563 {
2564         int i;
2565         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2566
2567         ov51x_set_slave_ids(sd, slave);
2568
2569         /* Reset the sensor */
2570         i2c_w(sd, 0x12, 0x80);
2571
2572         /* Wait for it to initialize */
2573         msleep(150);
2574
2575         for (i = 0; i < i2c_detect_tries; i++) {
2576                 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2577                     i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2578                         PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2579                         return 0;
2580                 }
2581
2582                 /* Reset the sensor */
2583                 i2c_w(sd, 0x12, 0x80);
2584
2585                 /* Wait for it to initialize */
2586                 msleep(150);
2587
2588                 /* Dummy read to sync I2C */
2589                 if (i2c_r(sd, 0x00) < 0)
2590                         return -1;
2591         }
2592         return -1;
2593 }
2594
2595 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2596  * and the read slave will be set to (slave + 1).
2597  * This should not be called from outside the i2c I/O functions.
2598  * Sets I2C read and write slave IDs. Returns <0 for error
2599  */
2600 static void ov51x_set_slave_ids(struct sd *sd,
2601                                 u8 slave)
2602 {
2603         switch (sd->bridge) {
2604         case BRIDGE_OVFX2:
2605                 reg_w(sd, OVFX2_I2C_ADDR, slave);
2606                 return;
2607         case BRIDGE_W9968CF:
2608                 sd->sensor_addr = slave;
2609                 return;
2610         }
2611
2612         reg_w(sd, R51x_I2C_W_SID, slave);
2613         reg_w(sd, R51x_I2C_R_SID, slave + 1);
2614 }
2615
2616 static void write_regvals(struct sd *sd,
2617                          const struct ov_regvals *regvals,
2618                          int n)
2619 {
2620         while (--n >= 0) {
2621                 reg_w(sd, regvals->reg, regvals->val);
2622                 regvals++;
2623         }
2624 }
2625
2626 static void write_i2c_regvals(struct sd *sd,
2627                         const struct ov_i2c_regvals *regvals,
2628                         int n)
2629 {
2630         while (--n >= 0) {
2631                 i2c_w(sd, regvals->reg, regvals->val);
2632                 regvals++;
2633         }
2634 }
2635
2636 /****************************************************************************
2637  *
2638  * OV511 and sensor configuration
2639  *
2640  ***************************************************************************/
2641
2642 /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
2643 static void ov_hires_configure(struct sd *sd)
2644 {
2645         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2646         int high, low;
2647
2648         if (sd->bridge != BRIDGE_OVFX2) {
2649                 PERR("error hires sensors only supported with ovfx2\n");
2650                 return;
2651         }
2652
2653         PDEBUG(D_PROBE, "starting ov hires configuration");
2654
2655         /* Detect sensor (sub)type */
2656         high = i2c_r(sd, 0x0a);
2657         low = i2c_r(sd, 0x0b);
2658         /* info("%x, %x", high, low); */
2659         switch (high) {
2660         case 0x96:
2661                 switch (low) {
2662                 case 0x40:
2663                         PDEBUG(D_PROBE, "Sensor is a OV2610");
2664                         sd->sensor = SEN_OV2610;
2665                         return;
2666                 case 0x41:
2667                         PDEBUG(D_PROBE, "Sensor is a OV2610AE");
2668                         sd->sensor = SEN_OV2610AE;
2669                         return;
2670                 case 0xb1:
2671                         PDEBUG(D_PROBE, "Sensor is a OV9600");
2672                         sd->sensor = SEN_OV9600;
2673                         return;
2674                 }
2675                 break;
2676         case 0x36:
2677                 if ((low & 0x0f) == 0x00) {
2678                         PDEBUG(D_PROBE, "Sensor is a OV3610");
2679                         sd->sensor = SEN_OV3610;
2680                         return;
2681                 }
2682                 break;
2683         }
2684         PERR("Error unknown sensor type: %02x%02x\n", high, low);
2685 }
2686
2687 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2688  * the same register settings as the OV8610, since they are very similar.
2689  */
2690 static void ov8xx0_configure(struct sd *sd)
2691 {
2692         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2693         int rc;
2694
2695         PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2696
2697         /* Detect sensor (sub)type */
2698         rc = i2c_r(sd, OV7610_REG_COM_I);
2699         if (rc < 0) {
2700                 PERR("Error detecting sensor type");
2701                 return;
2702         }
2703         if ((rc & 3) == 1)
2704                 sd->sensor = SEN_OV8610;
2705         else
2706                 PERR("Unknown image sensor version: %d\n", rc & 3);
2707 }
2708
2709 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2710  * the same register settings as the OV7610, since they are very similar.
2711  */
2712 static void ov7xx0_configure(struct sd *sd)
2713 {
2714         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2715         int rc, high, low;
2716
2717         PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2718
2719         /* Detect sensor (sub)type */
2720         rc = i2c_r(sd, OV7610_REG_COM_I);
2721
2722         /* add OV7670 here
2723          * it appears to be wrongly detected as a 7610 by default */
2724         if (rc < 0) {
2725                 PERR("Error detecting sensor type\n");
2726                 return;
2727         }
2728         if ((rc & 3) == 3) {
2729                 /* quick hack to make OV7670s work */
2730                 high = i2c_r(sd, 0x0a);
2731                 low = i2c_r(sd, 0x0b);
2732                 /* info("%x, %x", high, low); */
2733                 if (high == 0x76 && (low & 0xf0) == 0x70) {
2734                         PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
2735                         sd->sensor = SEN_OV7670;
2736                 } else {
2737                         PDEBUG(D_PROBE, "Sensor is an OV7610");
2738                         sd->sensor = SEN_OV7610;
2739                 }
2740         } else if ((rc & 3) == 1) {
2741                 /* I don't know what's different about the 76BE yet. */
2742                 if (i2c_r(sd, 0x15) & 1) {
2743                         PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2744                         sd->sensor = SEN_OV7620AE;
2745                 } else {
2746                         PDEBUG(D_PROBE, "Sensor is an OV76BE");
2747                         sd->sensor = SEN_OV76BE;
2748                 }
2749         } else if ((rc & 3) == 0) {
2750                 /* try to read product id registers */
2751                 high = i2c_r(sd, 0x0a);
2752                 if (high < 0) {
2753                         PERR("Error detecting camera chip PID\n");
2754                         return;
2755                 }
2756                 low = i2c_r(sd, 0x0b);
2757                 if (low < 0) {
2758                         PERR("Error detecting camera chip VER\n");
2759                         return;
2760                 }
2761                 if (high == 0x76) {
2762                         switch (low) {
2763                         case 0x30:
2764                                 PERR("Sensor is an OV7630/OV7635\n");
2765                                 PERR("7630 is not supported by this driver\n");
2766                                 return;
2767                         case 0x40:
2768                                 PDEBUG(D_PROBE, "Sensor is an OV7645");
2769                                 sd->sensor = SEN_OV7640; /* FIXME */
2770                                 break;
2771                         case 0x45:
2772                                 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2773                                 sd->sensor = SEN_OV7640; /* FIXME */
2774                                 break;
2775                         case 0x48:
2776                                 PDEBUG(D_PROBE, "Sensor is an OV7648");
2777                                 sd->sensor = SEN_OV7648;
2778                                 break;
2779                         case 0x60:
2780                                 PDEBUG(D_PROBE, "Sensor is a OV7660");
2781                                 sd->sensor = SEN_OV7660;
2782                                 break;
2783                         default:
2784                                 PERR("Unknown sensor: 0x76%02x\n", low);
2785                                 return;
2786                         }
2787                 } else {
2788                         PDEBUG(D_PROBE, "Sensor is an OV7620");
2789                         sd->sensor = SEN_OV7620;
2790                 }
2791         } else {
2792                 PERR("Unknown image sensor version: %d\n", rc & 3);
2793         }
2794 }
2795
2796 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2797 static void ov6xx0_configure(struct sd *sd)
2798 {
2799         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2800         int rc;
2801
2802         PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2803
2804         /* Detect sensor (sub)type */
2805         rc = i2c_r(sd, OV7610_REG_COM_I);
2806         if (rc < 0) {
2807                 PERR("Error detecting sensor type\n");
2808                 return;
2809         }
2810
2811         /* Ugh. The first two bits are the version bits, but
2812          * the entire register value must be used. I guess OVT
2813          * underestimated how many variants they would make. */
2814         switch (rc) {
2815         case 0x00:
2816                 sd->sensor = SEN_OV6630;
2817                 pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n");
2818                 break;
2819         case 0x01:
2820                 sd->sensor = SEN_OV6620;
2821                 PDEBUG(D_PROBE, "Sensor is an OV6620");
2822                 break;
2823         case 0x02:
2824                 sd->sensor = SEN_OV6630;
2825                 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2826                 break;
2827         case 0x03:
2828                 sd->sensor = SEN_OV66308AF;
2829                 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2830                 break;
2831         case 0x90:
2832                 sd->sensor = SEN_OV6630;
2833                 pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n");
2834                 break;
2835         default:
2836                 PERR("FATAL: Unknown sensor version: 0x%02x\n", rc);
2837                 return;
2838         }
2839
2840         /* Set sensor-specific vars */
2841         sd->sif = 1;
2842 }
2843
2844 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2845 static void ov51x_led_control(struct sd *sd, int on)
2846 {
2847         if (sd->invert_led)
2848                 on = !on;
2849
2850         switch (sd->bridge) {
2851         /* OV511 has no LED control */
2852         case BRIDGE_OV511PLUS:
2853                 reg_w(sd, R511_SYS_LED_CTL, on);
2854                 break;
2855         case BRIDGE_OV518:
2856         case BRIDGE_OV518PLUS:
2857                 reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2858                 break;
2859         case BRIDGE_OV519:
2860                 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2861                 break;
2862         }
2863 }
2864
2865 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2866 {
2867         struct sd *sd = (struct sd *) gspca_dev;
2868
2869         if (!sd->snapshot_needs_reset)
2870                 return;
2871
2872         /* Note it is important that we clear sd->snapshot_needs_reset,
2873            before actually clearing the snapshot state in the bridge
2874            otherwise we might race with the pkt_scan interrupt handler */
2875         sd->snapshot_needs_reset = 0;
2876
2877         switch (sd->bridge) {
2878         case BRIDGE_OV511:
2879         case BRIDGE_OV511PLUS:
2880                 reg_w(sd, R51x_SYS_SNAP, 0x02);
2881                 reg_w(sd, R51x_SYS_SNAP, 0x00);
2882                 break;
2883         case BRIDGE_OV518:
2884         case BRIDGE_OV518PLUS:
2885                 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2886                 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2887                 break;
2888         case BRIDGE_OV519:
2889                 reg_w(sd, R51x_SYS_RESET, 0x40);
2890                 reg_w(sd, R51x_SYS_RESET, 0x00);
2891                 break;
2892         }
2893 }
2894
2895 static void ov51x_upload_quan_tables(struct sd *sd)
2896 {
2897         const unsigned char yQuanTable511[] = {
2898                 0, 1, 1, 2, 2, 3, 3, 4,
2899                 1, 1, 1, 2, 2, 3, 4, 4,
2900                 1, 1, 2, 2, 3, 4, 4, 4,
2901                 2, 2, 2, 3, 4, 4, 4, 4,
2902                 2, 2, 3, 4, 4, 5, 5, 5,
2903                 3, 3, 4, 4, 5, 5, 5, 5,
2904                 3, 4, 4, 4, 5, 5, 5, 5,
2905                 4, 4, 4, 4, 5, 5, 5, 5
2906         };
2907
2908         const unsigned char uvQuanTable511[] = {
2909                 0, 2, 2, 3, 4, 4, 4, 4,
2910                 2, 2, 2, 4, 4, 4, 4, 4,
2911                 2, 2, 3, 4, 4, 4, 4, 4,
2912                 3, 4, 4, 4, 4, 4, 4, 4,
2913                 4, 4, 4, 4, 4, 4, 4, 4,
2914                 4, 4, 4, 4, 4, 4, 4, 4,
2915                 4, 4, 4, 4, 4, 4, 4, 4,
2916                 4, 4, 4, 4, 4, 4, 4, 4
2917         };
2918
2919         /* OV518 quantization tables are 8x4 (instead of 8x8) */
2920         const unsigned char yQuanTable518[] = {
2921                 5, 4, 5, 6, 6, 7, 7, 7,
2922                 5, 5, 5, 5, 6, 7, 7, 7,
2923                 6, 6, 6, 6, 7, 7, 7, 8,
2924                 7, 7, 6, 7, 7, 7, 8, 8
2925         };
2926         const unsigned char uvQuanTable518[] = {
2927                 6, 6, 6, 7, 7, 7, 7, 7,
2928                 6, 6, 6, 7, 7, 7, 7, 7,
2929                 6, 6, 6, 7, 7, 7, 7, 8,
2930                 7, 7, 7, 7, 7, 7, 8, 8
2931         };
2932
2933         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2934         const unsigned char *pYTable, *pUVTable;
2935         unsigned char val0, val1;
2936         int i, size, reg = R51x_COMP_LUT_BEGIN;
2937
2938         PDEBUG(D_PROBE, "Uploading quantization tables");
2939
2940         if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2941                 pYTable = yQuanTable511;
2942                 pUVTable = uvQuanTable511;
2943                 size = 32;
2944         } else {
2945                 pYTable = yQuanTable518;
2946                 pUVTable = uvQuanTable518;
2947                 size = 16;
2948         }
2949
2950         for (i = 0; i < size; i++) {
2951                 val0 = *pYTable++;
2952                 val1 = *pYTable++;
2953                 val0 &= 0x0f;
2954                 val1 &= 0x0f;
2955                 val0 |= val1 << 4;
2956                 reg_w(sd, reg, val0);
2957
2958                 val0 = *pUVTable++;
2959                 val1 = *pUVTable++;
2960                 val0 &= 0x0f;
2961                 val1 &= 0x0f;
2962                 val0 |= val1 << 4;
2963                 reg_w(sd, reg + size, val0);
2964
2965                 reg++;
2966         }
2967 }
2968
2969 /* This initializes the OV511/OV511+ and the sensor */
2970 static void ov511_configure(struct gspca_dev *gspca_dev)
2971 {
2972         struct sd *sd = (struct sd *) gspca_dev;
2973
2974         /* For 511 and 511+ */
2975         const struct ov_regvals init_511[] = {
2976                 { R51x_SYS_RESET,       0x7f },
2977                 { R51x_SYS_INIT,        0x01 },
2978                 { R51x_SYS_RESET,       0x7f },
2979                 { R51x_SYS_INIT,        0x01 },
2980                 { R51x_SYS_RESET,       0x3f },
2981                 { R51x_SYS_INIT,        0x01 },
2982                 { R51x_SYS_RESET,       0x3d },
2983         };
2984
2985         const struct ov_regvals norm_511[] = {
2986                 { R511_DRAM_FLOW_CTL,   0x01 },
2987                 { R51x_SYS_SNAP,        0x00 },
2988                 { R51x_SYS_SNAP,        0x02 },
2989                 { R51x_SYS_SNAP,        0x00 },
2990                 { R511_FIFO_OPTS,       0x1f },
2991                 { R511_COMP_EN,         0x00 },
2992                 { R511_COMP_LUT_EN,     0x03 },
2993         };
2994
2995         const struct ov_regvals norm_511_p[] = {
2996                 { R511_DRAM_FLOW_CTL,   0xff },
2997                 { R51x_SYS_SNAP,        0x00 },
2998                 { R51x_SYS_SNAP,        0x02 },
2999                 { R51x_SYS_SNAP,        0x00 },
3000                 { R511_FIFO_OPTS,       0xff },
3001                 { R511_COMP_EN,         0x00 },
3002                 { R511_COMP_LUT_EN,     0x03 },
3003         };
3004
3005         const struct ov_regvals compress_511[] = {
3006                 { 0x70, 0x1f },
3007                 { 0x71, 0x05 },
3008                 { 0x72, 0x06 },
3009                 { 0x73, 0x06 },
3010                 { 0x74, 0x14 },
3011                 { 0x75, 0x03 },
3012                 { 0x76, 0x04 },
3013                 { 0x77, 0x04 },
3014         };
3015
3016         PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
3017
3018         write_regvals(sd, init_511, ARRAY_SIZE(init_511));
3019
3020         switch (sd->bridge) {
3021         case BRIDGE_OV511:
3022                 write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
3023                 break;
3024         case BRIDGE_OV511PLUS:
3025                 write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
3026                 break;
3027         }
3028
3029         /* Init compression */
3030         write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
3031
3032         ov51x_upload_quan_tables(sd);
3033 }
3034
3035 /* This initializes the OV518/OV518+ and the sensor */
3036 static void ov518_configure(struct gspca_dev *gspca_dev)
3037 {
3038         struct sd *sd = (struct sd *) gspca_dev;
3039
3040         /* For 518 and 518+ */
3041         const struct ov_regvals init_518[] = {
3042                 { R51x_SYS_RESET,       0x40 },
3043                 { R51x_SYS_INIT,        0xe1 },
3044                 { R51x_SYS_RESET,       0x3e },
3045                 { R51x_SYS_INIT,        0xe1 },
3046                 { R51x_SYS_RESET,       0x00 },
3047                 { R51x_SYS_INIT,        0xe1 },
3048                 { 0x46,                 0x00 },
3049                 { 0x5d,                 0x03 },
3050         };
3051
3052         const struct ov_regvals norm_518[] = {
3053                 { R51x_SYS_SNAP,        0x02 }, /* Reset */
3054                 { R51x_SYS_SNAP,        0x01 }, /* Enable */
3055                 { 0x31,                 0x0f },
3056                 { 0x5d,                 0x03 },
3057                 { 0x24,                 0x9f },
3058                 { 0x25,                 0x90 },
3059                 { 0x20,                 0x00 },
3060                 { 0x51,                 0x04 },
3061                 { 0x71,                 0x19 },
3062                 { 0x2f,                 0x80 },
3063         };
3064
3065         const struct ov_regvals norm_518_p[] = {
3066                 { R51x_SYS_SNAP,        0x02 }, /* Reset */
3067                 { R51x_SYS_SNAP,        0x01 }, /* Enable */
3068                 { 0x31,                 0x0f },
3069                 { 0x5d,                 0x03 },
3070                 { 0x24,                 0x9f },
3071                 { 0x25,                 0x90 },
3072                 { 0x20,                 0x60 },
3073                 { 0x51,                 0x02 },
3074                 { 0x71,                 0x19 },
3075                 { 0x40,                 0xff },
3076                 { 0x41,                 0x42 },
3077                 { 0x46,                 0x00 },
3078                 { 0x33,                 0x04 },
3079                 { 0x21,                 0x19 },
3080                 { 0x3f,                 0x10 },
3081                 { 0x2f,                 0x80 },
3082         };
3083
3084         /* First 5 bits of custom ID reg are a revision ID on OV518 */
3085         sd->revision = reg_r(sd, R51x_SYS_CUST_ID) & 0x1f;
3086         PDEBUG(D_PROBE, "Device revision %d", sd->revision);
3087
3088         write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3089
3090         /* Set LED GPIO pin to output mode */
3091         reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3092
3093         switch (sd->bridge) {
3094         case BRIDGE_OV518:
3095                 write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3096                 break;
3097         case BRIDGE_OV518PLUS:
3098                 write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3099                 break;
3100         }
3101
3102         ov51x_upload_quan_tables(sd);
3103
3104         reg_w(sd, 0x2f, 0x80);
3105 }
3106
3107 static void ov519_configure(struct sd *sd)
3108 {
3109         static const struct ov_regvals init_519[] = {
3110                 { 0x5a, 0x6d }, /* EnableSystem */
3111                 { 0x53, 0x9b }, /* don't enable the microcontroller */
3112                 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3113                 { 0x5d, 0x03 },
3114                 { 0x49, 0x01 },
3115                 { 0x48, 0x00 },
3116                 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3117                  * detection will fail. This deserves further investigation. */
3118                 { OV519_GPIO_IO_CTRL0,   0xee },
3119                 { OV519_R51_RESET1, 0x0f },
3120                 { OV519_R51_RESET1, 0x00 },
3121                 { 0x22, 0x00 },
3122                 /* windows reads 0x55 at this point*/
3123         };
3124
3125         write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3126 }
3127
3128 static void ovfx2_configure(struct sd *sd)
3129 {
3130         static const struct ov_regvals init_fx2[] = {
3131                 { 0x00, 0x60 },
3132                 { 0x02, 0x01 },
3133                 { 0x0f, 0x1d },
3134                 { 0xe9, 0x82 },
3135                 { 0xea, 0xc7 },
3136                 { 0xeb, 0x10 },
3137                 { 0xec, 0xf6 },
3138         };
3139
3140         sd->stopped = 1;
3141
3142         write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3143 }
3144
3145 /* set the mode */
3146 /* This function works for ov7660 only */
3147 static void ov519_set_mode(struct sd *sd)
3148 {
3149         static const struct ov_regvals bridge_ov7660[2][10] = {
3150                 {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3151                  {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3152                  {0x25, 0x01}, {0x26, 0x00}},
3153                 {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3154                  {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3155                  {0x25, 0x03}, {0x26, 0x00}}
3156         };
3157         static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3158                 {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3159                 {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3160         };
3161         static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3162                 {OV7670_R17_HSTART, 0x13},
3163                 {OV7670_R18_HSTOP, 0x01},
3164                 {OV7670_R32_HREF, 0x92},
3165                 {OV7670_R19_VSTART, 0x02},
3166                 {OV7670_R1A_VSTOP, 0x7a},
3167                 {OV7670_R03_VREF, 0x00},
3168 /*              {0x33, 0x00}, */
3169 /*              {0x34, 0x07}, */
3170 /*              {0x36, 0x00}, */
3171 /*              {0x6b, 0x0a}, */
3172         };
3173
3174         write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3175                         ARRAY_SIZE(bridge_ov7660[0]));
3176         write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3177                         ARRAY_SIZE(sensor_ov7660[0]));
3178         write_i2c_regvals(sd, sensor_ov7660_2,
3179                         ARRAY_SIZE(sensor_ov7660_2));
3180 }
3181
3182 /* set the frame rate */
3183 /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
3184 static void ov519_set_fr(struct sd *sd)
3185 {
3186         int fr;
3187         u8 clock;
3188         /* frame rate table with indices:
3189          *      - mode = 0: 320x240, 1: 640x480
3190          *      - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3191          *      - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3192          */
3193         static const u8 fr_tb[2][6][3] = {
3194                 {{0x04, 0xff, 0x00},
3195                  {0x04, 0x1f, 0x00},
3196                  {0x04, 0x1b, 0x00},
3197                  {0x04, 0x15, 0x00},
3198                  {0x04, 0x09, 0x00},
3199                  {0x04, 0x01, 0x00}},
3200                 {{0x0c, 0xff, 0x00},
3201                  {0x0c, 0x1f, 0x00},
3202                  {0x0c, 0x1b, 0x00},
3203                  {0x04, 0xff, 0x01},
3204                  {0x04, 0x1f, 0x01},
3205                  {0x04, 0x1b, 0x01}},
3206         };
3207
3208         if (frame_rate > 0)
3209                 sd->frame_rate = frame_rate;
3210         if (sd->frame_rate >= 30)
3211                 fr = 0;
3212         else if (sd->frame_rate >= 25)
3213                 fr = 1;
3214         else if (sd->frame_rate >= 20)
3215                 fr = 2;
3216         else if (sd->frame_rate >= 15)
3217                 fr = 3;
3218         else if (sd->frame_rate >= 10)
3219                 fr = 4;
3220         else
3221                 fr = 5;
3222         reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3223         reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3224         clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3225         if (sd->sensor == SEN_OV7660)
3226                 clock |= 0x80;          /* enable double clock */
3227         ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3228 }
3229
3230 static void setautogain(struct gspca_dev *gspca_dev, s32 val)
3231 {
3232         struct sd *sd = (struct sd *) gspca_dev;
3233
3234         i2c_w_mask(sd, 0x13, val ? 0x05 : 0x00, 0x05);
3235 }
3236
3237 /* this function is called at probe time */
3238 static int sd_config(struct gspca_dev *gspca_dev,
3239                         const struct usb_device_id *id)
3240 {
3241         struct sd *sd = (struct sd *) gspca_dev;
3242         struct cam *cam = &gspca_dev->cam;
3243
3244         sd->bridge = id->driver_info & BRIDGE_MASK;
3245         sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3246
3247         switch (sd->bridge) {
3248         case BRIDGE_OV511:
3249         case BRIDGE_OV511PLUS:
3250                 cam->cam_mode = ov511_vga_mode;
3251                 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3252                 break;
3253         case BRIDGE_OV518:
3254         case BRIDGE_OV518PLUS:
3255                 cam->cam_mode = ov518_vga_mode;
3256                 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3257                 break;
3258         case BRIDGE_OV519:
3259                 cam->cam_mode = ov519_vga_mode;
3260                 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3261                 break;
3262         case BRIDGE_OVFX2:
3263                 cam->cam_mode = ov519_vga_mode;
3264                 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3265                 cam->bulk_size = OVFX2_BULK_SIZE;
3266                 cam->bulk_nurbs = MAX_NURBS;
3267                 cam->bulk = 1;
3268                 break;
3269         case BRIDGE_W9968CF:
3270                 cam->cam_mode = w9968cf_vga_mode;
3271                 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3272                 break;
3273         }
3274
3275         sd->frame_rate = 15;
3276
3277         return 0;
3278 }
3279
3280 /* this function is called at probe and resume time */
3281 static int sd_init(struct gspca_dev *gspca_dev)
3282 {
3283         struct sd *sd = (struct sd *) gspca_dev;
3284         struct cam *cam = &gspca_dev->cam;
3285
3286         switch (sd->bridge) {
3287         case BRIDGE_OV511:
3288         case BRIDGE_OV511PLUS:
3289                 ov511_configure(gspca_dev);
3290                 break;
3291         case BRIDGE_OV518:
3292         case BRIDGE_OV518PLUS:
3293                 ov518_configure(gspca_dev);
3294                 break;
3295         case BRIDGE_OV519:
3296                 ov519_configure(sd);
3297                 break;
3298         case BRIDGE_OVFX2:
3299                 ovfx2_configure(sd);
3300                 break;
3301         case BRIDGE_W9968CF:
3302                 w9968cf_configure(sd);
3303                 break;
3304         }
3305
3306         /* The OV519 must be more aggressive about sensor detection since
3307          * I2C write will never fail if the sensor is not present. We have
3308          * to try to initialize the sensor to detect its presence */
3309         sd->sensor = -1;
3310
3311         /* Test for 76xx */
3312         if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3313                 ov7xx0_configure(sd);
3314
3315         /* Test for 6xx0 */
3316         } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3317                 ov6xx0_configure(sd);
3318
3319         /* Test for 8xx0 */
3320         } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3321                 ov8xx0_configure(sd);
3322
3323         /* Test for 3xxx / 2xxx */
3324         } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3325                 ov_hires_configure(sd);
3326         } else {
3327                 PERR("Can't determine sensor slave IDs\n");
3328                 goto error;
3329         }
3330
3331         if (sd->sensor < 0)
3332                 goto error;
3333
3334         ov51x_led_control(sd, 0);       /* turn LED off */
3335
3336         switch (sd->bridge) {
3337         case BRIDGE_OV511:
3338         case BRIDGE_OV511PLUS:
3339                 if (sd->sif) {
3340                         cam->cam_mode = ov511_sif_mode;
3341                         cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3342                 }
3343                 break;
3344         case BRIDGE_OV518:
3345         case BRIDGE_OV518PLUS:
3346                 if (sd->sif) {
3347                         cam->cam_mode = ov518_sif_mode;
3348                         cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3349                 }
3350                 break;
3351         case BRIDGE_OV519:
3352                 if (sd->sif) {
3353                         cam->cam_mode = ov519_sif_mode;
3354                         cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3355                 }
3356                 break;
3357         case BRIDGE_OVFX2:
3358                 switch (sd->sensor) {
3359                 case SEN_OV2610:
3360                 case SEN_OV2610AE:
3361                         cam->cam_mode = ovfx2_ov2610_mode;
3362                         cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3363                         break;
3364                 case SEN_OV3610:
3365                         cam->cam_mode = ovfx2_ov3610_mode;
3366                         cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3367                         break;
3368                 case SEN_OV9600:
3369                         cam->cam_mode = ovfx2_ov9600_mode;
3370                         cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
3371                         break;
3372                 default:
3373                         if (sd->sif) {
3374                                 cam->cam_mode = ov519_sif_mode;
3375                                 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3376                         }
3377                         break;
3378                 }
3379                 break;
3380         case BRIDGE_W9968CF:
3381                 if (sd->sif)
3382                         cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3383
3384                 /* w9968cf needs initialisation once the sensor is known */
3385                 w9968cf_init(sd);
3386                 break;
3387         }
3388
3389         /* initialize the sensor */
3390         switch (sd->sensor) {
3391         case SEN_OV2610:
3392                 write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3393
3394                 /* Enable autogain, autoexpo, awb, bandfilter */
3395                 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3396                 break;
3397         case SEN_OV2610AE:
3398                 write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3399
3400                 /* enable autoexpo */
3401                 i2c_w_mask(sd, 0x13, 0x05, 0x05);
3402                 break;
3403         case SEN_OV3610:
3404                 write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3405
3406                 /* Enable autogain, autoexpo, awb, bandfilter */
3407                 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3408                 break;
3409         case SEN_OV6620:
3410                 write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3411                 break;
3412         case SEN_OV6630:
3413         case SEN_OV66308AF:
3414                 write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3415                 break;
3416         default:
3417 /*      case SEN_OV7610: */
3418 /*      case SEN_OV76BE: */
3419                 write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3420                 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3421                 break;
3422         case SEN_OV7620:
3423         case SEN_OV7620AE:
3424                 write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3425                 break;
3426         case SEN_OV7640:
3427         case SEN_OV7648:
3428                 write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3429                 break;
3430         case SEN_OV7660:
3431                 i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3432                 msleep(14);
3433                 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3434                 write_regvals(sd, init_519_ov7660,
3435                                 ARRAY_SIZE(init_519_ov7660));
3436                 write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3437                 sd->gspca_dev.curr_mode = 1;    /* 640x480 */
3438                 ov519_set_mode(sd);
3439                 ov519_set_fr(sd);
3440                 sd_reset_snapshot(gspca_dev);
3441                 ov51x_restart(sd);
3442                 ov51x_stop(sd);                 /* not in win traces */
3443                 ov51x_led_control(sd, 0);
3444                 break;
3445         case SEN_OV7670:
3446                 write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3447                 break;
3448         case SEN_OV8610:
3449                 write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3450                 break;
3451         case SEN_OV9600:
3452                 write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
3453
3454                 /* enable autoexpo */
3455 /*              i2c_w_mask(sd, 0x13, 0x05, 0x05); */
3456                 break;
3457         }
3458         return gspca_dev->usb_err;
3459 error:
3460         PERR("OV519 Config failed");
3461         return -EINVAL;
3462 }
3463
3464 /* function called at start time before URB creation */
3465 static int sd_isoc_init(struct gspca_dev *gspca_dev)
3466 {
3467         struct sd *sd = (struct sd *) gspca_dev;
3468
3469         switch (sd->bridge) {
3470         case BRIDGE_OVFX2:
3471                 if (gspca_dev->pixfmt.width != 800)
3472                         gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
3473                 else
3474                         gspca_dev->cam.bulk_size = 7 * 4096;
3475                 break;
3476         }
3477         return 0;
3478 }
3479
3480 /* Set up the OV511/OV511+ with the given image parameters.
3481  *
3482  * Do not put any sensor-specific code in here (including I2C I/O functions)
3483  */
3484 static void ov511_mode_init_regs(struct sd *sd)
3485 {
3486         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3487         int hsegs, vsegs, packet_size, fps, needed;
3488         int interlaced = 0;
3489         struct usb_host_interface *alt;
3490         struct usb_interface *intf;
3491
3492         intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3493         alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3494         if (!alt) {
3495                 PERR("Couldn't get altsetting\n");
3496                 sd->gspca_dev.usb_err = -EIO;
3497                 return;
3498         }
3499
3500         packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3501         reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3502
3503         reg_w(sd, R511_CAM_UV_EN, 0x01);
3504         reg_w(sd, R511_SNAP_UV_EN, 0x01);
3505         reg_w(sd, R511_SNAP_OPTS, 0x03);
3506
3507         /* Here I'm assuming that snapshot size == image size.
3508          * I hope that's always true. --claudio
3509          */
3510         hsegs = (sd->gspca_dev.pixfmt.width >> 3) - 1;
3511         vsegs = (sd->gspca_dev.pixfmt.height >> 3) - 1;
3512
3513         reg_w(sd, R511_CAM_PXCNT, hsegs);
3514         reg_w(sd, R511_CAM_LNCNT, vsegs);
3515         reg_w(sd, R511_CAM_PXDIV, 0x00);
3516         reg_w(sd, R511_CAM_LNDIV, 0x00);
3517
3518         /* YUV420, low pass filter on */
3519         reg_w(sd, R511_CAM_OPTS, 0x03);
3520
3521         /* Snapshot additions */
3522         reg_w(sd, R511_SNAP_PXCNT, hsegs);
3523         reg_w(sd, R511_SNAP_LNCNT, vsegs);
3524         reg_w(sd, R511_SNAP_PXDIV, 0x00);
3525         reg_w(sd, R511_SNAP_LNDIV, 0x00);
3526
3527         /******** Set the framerate ********/
3528         if (frame_rate > 0)
3529                 sd->frame_rate = frame_rate;
3530
3531         switch (sd->sensor) {
3532         case SEN_OV6620:
3533                 /* No framerate control, doesn't like higher rates yet */
3534                 sd->clockdiv = 3;
3535                 break;
3536
3537         /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3538            for more sensors we need to do this for them too */
3539         case SEN_OV7620:
3540         case SEN_OV7620AE:
3541         case SEN_OV7640:
3542         case SEN_OV7648:
3543         case SEN_OV76BE:
3544                 if (sd->gspca_dev.pixfmt.width == 320)
3545                         interlaced = 1;
3546                 /* Fall through */
3547         case SEN_OV6630:
3548         case SEN_OV7610:
3549         case SEN_OV7670:
3550                 switch (sd->frame_rate) {
3551                 case 30:
3552                 case 25:
3553                         /* Not enough bandwidth to do 640x480 @ 30 fps */
3554                         if (sd->gspca_dev.pixfmt.width != 640) {
3555                                 sd->clockdiv = 0;
3556                                 break;
3557                         }
3558                         /* Fall through for 640x480 case */
3559                 default:
3560 /*              case 20: */
3561 /*              case 15: */
3562                         sd->clockdiv = 1;
3563                         break;
3564                 case 10:
3565                         sd->clockdiv = 2;
3566                         break;
3567                 case 5:
3568                         sd->clockdiv = 5;
3569                         break;
3570                 }
3571                 if (interlaced) {
3572                         sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3573                         /* Higher then 10 does not work */
3574                         if (sd->clockdiv > 10)
3575                                 sd->clockdiv = 10;
3576                 }
3577                 break;
3578
3579         case SEN_OV8610:
3580                 /* No framerate control ?? */
3581                 sd->clockdiv = 0;
3582                 break;
3583         }
3584
3585         /* Check if we have enough bandwidth to disable compression */
3586         fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3587         needed = fps * sd->gspca_dev.pixfmt.width *
3588                         sd->gspca_dev.pixfmt.height * 3 / 2;
3589         /* 1000 isoc packets/sec */
3590         if (needed > 1000 * packet_size) {
3591                 /* Enable Y and UV quantization and compression */
3592                 reg_w(sd, R511_COMP_EN, 0x07);
3593                 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3594         } else {
3595                 reg_w(sd, R511_COMP_EN, 0x06);
3596                 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3597         }
3598
3599         reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3600         reg_w(sd, R51x_SYS_RESET, 0);
3601 }
3602
3603 /* Sets up the OV518/OV518+ with the given image parameters
3604  *
3605  * OV518 needs a completely different approach, until we can figure out what
3606  * the individual registers do. Also, only 15 FPS is supported now.
3607  *
3608  * Do not put any sensor-specific code in here (including I2C I/O functions)
3609  */
3610 static void ov518_mode_init_regs(struct sd *sd)
3611 {
3612         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3613         int hsegs, vsegs, packet_size;
3614         struct usb_host_interface *alt;
3615         struct usb_interface *intf;
3616
3617         intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3618         alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3619         if (!alt) {
3620                 PERR("Couldn't get altsetting\n");
3621                 sd->gspca_dev.usb_err = -EIO;
3622                 return;
3623         }
3624
3625         packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3626         ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3627
3628         /******** Set the mode ********/
3629         reg_w(sd, 0x2b, 0);
3630         reg_w(sd, 0x2c, 0);
3631         reg_w(sd, 0x2d, 0);
3632         reg_w(sd, 0x2e, 0);
3633         reg_w(sd, 0x3b, 0);
3634         reg_w(sd, 0x3c, 0);
3635         reg_w(sd, 0x3d, 0);
3636         reg_w(sd, 0x3e, 0);
3637
3638         if (sd->bridge == BRIDGE_OV518) {
3639                 /* Set 8-bit (YVYU) input format */
3640                 reg_w_mask(sd, 0x20, 0x08, 0x08);
3641
3642                 /* Set 12-bit (4:2:0) output format */
3643                 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3644                 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3645         } else {
3646                 reg_w(sd, 0x28, 0x80);
3647                 reg_w(sd, 0x38, 0x80);
3648         }
3649
3650         hsegs = sd->gspca_dev.pixfmt.width / 16;
3651         vsegs = sd->gspca_dev.pixfmt.height / 4;
3652
3653         reg_w(sd, 0x29, hsegs);
3654         reg_w(sd, 0x2a, vsegs);
3655
3656         reg_w(sd, 0x39, hsegs);
3657         reg_w(sd, 0x3a, vsegs);
3658
3659         /* Windows driver does this here; who knows why */
3660         reg_w(sd, 0x2f, 0x80);
3661
3662         /******** Set the framerate ********/
3663         if (sd->bridge == BRIDGE_OV518PLUS && sd->revision == 0 &&
3664                                               sd->sensor == SEN_OV7620AE)
3665                 sd->clockdiv = 0;
3666         else
3667                 sd->clockdiv = 1;
3668
3669         /* Mode independent, but framerate dependent, regs */
3670         /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3671         reg_w(sd, 0x51, 0x04);
3672         reg_w(sd, 0x22, 0x18);
3673         reg_w(sd, 0x23, 0xff);
3674
3675         if (sd->bridge == BRIDGE_OV518PLUS) {
3676                 switch (sd->sensor) {
3677                 case SEN_OV7620AE:
3678                         /*
3679                          * HdG: 640x480 needs special handling on device
3680                          * revision 2, we check for device revison > 0 to
3681                          * avoid regressions, as we don't know the correct
3682                          * thing todo for revision 1.
3683                          *
3684                          * Also this likely means we don't need to
3685                          * differentiate between the OV7620 and OV7620AE,
3686                          * earlier testing hitting this same problem likely
3687                          * happened to be with revision < 2 cams using an
3688                          * OV7620 and revision 2 cams using an OV7620AE.
3689                          */
3690                         if (sd->revision > 0 &&
3691                                         sd->gspca_dev.pixfmt.width == 640) {
3692                                 reg_w(sd, 0x20, 0x60);
3693                                 reg_w(sd, 0x21, 0x1f);
3694                         } else {
3695                                 reg_w(sd, 0x20, 0x00);
3696                                 reg_w(sd, 0x21, 0x19);
3697                         }
3698                         break;
3699                 case SEN_OV7620:
3700                         reg_w(sd, 0x20, 0x00);
3701                         reg_w(sd, 0x21, 0x19);
3702                         break;
3703                 default:
3704                         reg_w(sd, 0x21, 0x19);
3705                 }
3706         } else
3707                 reg_w(sd, 0x71, 0x17);  /* Compression-related? */
3708
3709         /* FIXME: Sensor-specific */
3710         /* Bit 5 is what matters here. Of course, it is "reserved" */
3711         i2c_w(sd, 0x54, 0x23);
3712
3713         reg_w(sd, 0x2f, 0x80);
3714
3715         if (sd->bridge == BRIDGE_OV518PLUS) {
3716                 reg_w(sd, 0x24, 0x94);
3717                 reg_w(sd, 0x25, 0x90);
3718                 ov518_reg_w32(sd, 0xc4,    400, 2);     /* 190h   */
3719                 ov518_reg_w32(sd, 0xc6,    540, 2);     /* 21ch   */
3720                 ov518_reg_w32(sd, 0xc7,    540, 2);     /* 21ch   */
3721                 ov518_reg_w32(sd, 0xc8,    108, 2);     /* 6ch    */
3722                 ov518_reg_w32(sd, 0xca, 131098, 3);     /* 2001ah */
3723                 ov518_reg_w32(sd, 0xcb,    532, 2);     /* 214h   */
3724                 ov518_reg_w32(sd, 0xcc,   2400, 2);     /* 960h   */
3725                 ov518_reg_w32(sd, 0xcd,     32, 2);     /* 20h    */
3726                 ov518_reg_w32(sd, 0xce,    608, 2);     /* 260h   */
3727         } else {
3728                 reg_w(sd, 0x24, 0x9f);
3729                 reg_w(sd, 0x25, 0x90);
3730                 ov518_reg_w32(sd, 0xc4,    400, 2);     /* 190h   */
3731                 ov518_reg_w32(sd, 0xc6,    381, 2);     /* 17dh   */
3732                 ov518_reg_w32(sd, 0xc7,    381, 2);     /* 17dh   */
3733                 ov518_reg_w32(sd, 0xc8,    128, 2);     /* 80h    */
3734                 ov518_reg_w32(sd, 0xca, 183331, 3);     /* 2cc23h */
3735                 ov518_reg_w32(sd, 0xcb,    746, 2);     /* 2eah   */
3736                 ov518_reg_w32(sd, 0xcc,   1750, 2);     /* 6d6h   */
3737                 ov518_reg_w32(sd, 0xcd,     45, 2);     /* 2dh    */
3738                 ov518_reg_w32(sd, 0xce,    851, 2);     /* 353h   */
3739         }
3740
3741         reg_w(sd, 0x2f, 0x80);
3742 }
3743
3744 /* Sets up the OV519 with the given image parameters
3745  *
3746  * OV519 needs a completely different approach, until we can figure out what
3747  * the individual registers do.
3748  *
3749  * Do not put any sensor-specific code in here (including I2C I/O functions)
3750  */
3751 static void ov519_mode_init_regs(struct sd *sd)
3752 {
3753         static const struct ov_regvals mode_init_519_ov7670[] = {
3754                 { 0x5d, 0x03 }, /* Turn off suspend mode */
3755                 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3756                 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3757                 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3758                 { 0xa3, 0x18 },
3759                 { 0xa4, 0x04 },
3760                 { 0xa5, 0x28 },
3761                 { 0x37, 0x00 }, /* SetUsbInit */
3762                 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3763                 /* Enable both fields, YUV Input, disable defect comp (why?) */
3764                 { 0x20, 0x0c },
3765                 { 0x21, 0x38 },
3766                 { 0x22, 0x1d },
3767                 { 0x17, 0x50 }, /* undocumented */
3768                 { 0x37, 0x00 }, /* undocumented */
3769                 { 0x40, 0xff }, /* I2C timeout counter */
3770                 { 0x46, 0x00 }, /* I2C clock prescaler */
3771                 { 0x59, 0x04 }, /* new from windrv 090403 */
3772                 { 0xff, 0x00 }, /* undocumented */
3773                 /* windows reads 0x55 at this point, why? */
3774         };
3775
3776         static const struct ov_regvals mode_init_519[] = {
3777                 { 0x5d, 0x03 }, /* Turn off suspend mode */
3778                 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3779                 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3780                 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3781                 { 0xa3, 0x18 },
3782                 { 0xa4, 0x04 },
3783                 { 0xa5, 0x28 },
3784                 { 0x37, 0x00 }, /* SetUsbInit */
3785                 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3786                 /* Enable both fields, YUV Input, disable defect comp (why?) */
3787                 { 0x22, 0x1d },
3788                 { 0x17, 0x50 }, /* undocumented */
3789                 { 0x37, 0x00 }, /* undocumented */
3790                 { 0x40, 0xff }, /* I2C timeout counter */
3791                 { 0x46, 0x00 }, /* I2C clock prescaler */
3792                 { 0x59, 0x04 }, /* new from windrv 090403 */
3793                 { 0xff, 0x00 }, /* undocumented */
3794                 /* windows reads 0x55 at this point, why? */
3795         };
3796
3797         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3798
3799         /******** Set the mode ********/
3800         switch (sd->sensor) {
3801         default:
3802                 write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3803                 if (sd->sensor == SEN_OV7640 ||
3804                     sd->sensor == SEN_OV7648) {
3805                         /* Select 8-bit input mode */
3806                         reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3807                 }
3808                 break;
3809         case SEN_OV7660:
3810                 return;         /* done by ov519_set_mode/fr() */
3811         case SEN_OV7670:
3812                 write_regvals(sd, mode_init_519_ov7670,
3813                                 ARRAY_SIZE(mode_init_519_ov7670));
3814                 break;
3815         }
3816
3817         reg_w(sd, OV519_R10_H_SIZE,     sd->gspca_dev.pixfmt.width >> 4);
3818         reg_w(sd, OV519_R11_V_SIZE,     sd->gspca_dev.pixfmt.height >> 3);
3819         if (sd->sensor == SEN_OV7670 &&
3820             sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3821                 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3822         else if (sd->sensor == SEN_OV7648 &&
3823             sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3824                 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3825         else
3826                 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3827         reg_w(sd, OV519_R13_X_OFFSETH,  0x00);
3828         reg_w(sd, OV519_R14_Y_OFFSETL,  0x00);
3829         reg_w(sd, OV519_R15_Y_OFFSETH,  0x00);
3830         reg_w(sd, OV519_R16_DIVIDER,    0x00);
3831         reg_w(sd, OV519_R25_FORMAT,     0x03); /* YUV422 */
3832         reg_w(sd, 0x26,                 0x00); /* Undocumented */
3833
3834         /******** Set the framerate ********/
3835         if (frame_rate > 0)
3836                 sd->frame_rate = frame_rate;
3837
3838 /* FIXME: These are only valid at the max resolution. */
3839         sd->clockdiv = 0;
3840         switch (sd->sensor) {
3841         case SEN_OV7640:
3842         case SEN_OV7648:
3843                 switch (sd->frame_rate) {
3844                 default:
3845 /*              case 30: */
3846                         reg_w(sd, 0xa4, 0x0c);
3847                         reg_w(sd, 0x23, 0xff);
3848                         break;
3849                 case 25:
3850                         reg_w(sd, 0xa4, 0x0c);
3851                         reg_w(sd, 0x23, 0x1f);
3852                         break;
3853                 case 20:
3854                         reg_w(sd, 0xa4, 0x0c);
3855                         reg_w(sd, 0x23, 0x1b);
3856                         break;
3857                 case 15:
3858                         reg_w(sd, 0xa4, 0x04);
3859                         reg_w(sd, 0x23, 0xff);
3860                         sd->clockdiv = 1;
3861                         break;
3862                 case 10:
3863                         reg_w(sd, 0xa4, 0x04);
3864                         reg_w(sd, 0x23, 0x1f);
3865                         sd->clockdiv = 1;
3866                         break;
3867                 case 5:
3868                         reg_w(sd, 0xa4, 0x04);
3869                         reg_w(sd, 0x23, 0x1b);
3870                         sd->clockdiv = 1;
3871                         break;
3872                 }
3873                 break;
3874         case SEN_OV8610:
3875                 switch (sd->frame_rate) {
3876                 default:        /* 15 fps */
3877 /*              case 15: */
3878                         reg_w(sd, 0xa4, 0x06);
3879                         reg_w(sd, 0x23, 0xff);
3880                         break;
3881                 case 10:
3882                         reg_w(sd, 0xa4, 0x06);
3883                         reg_w(sd, 0x23, 0x1f);
3884                         break;
3885                 case 5:
3886                         reg_w(sd, 0xa4, 0x06);
3887                         reg_w(sd, 0x23, 0x1b);
3888                         break;
3889                 }
3890                 break;
3891         case SEN_OV7670:                /* guesses, based on 7640 */
3892                 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3893                                  (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3894                 reg_w(sd, 0xa4, 0x10);
3895                 switch (sd->frame_rate) {
3896                 case 30:
3897                         reg_w(sd, 0x23, 0xff);
3898                         break;
3899                 case 20:
3900                         reg_w(sd, 0x23, 0x1b);
3901                         break;
3902                 default:
3903 /*              case 15: */
3904                         reg_w(sd, 0x23, 0xff);
3905                         sd->clockdiv = 1;
3906                         break;
3907                 }
3908                 break;
3909         }
3910 }
3911
3912 static void mode_init_ov_sensor_regs(struct sd *sd)
3913 {
3914         struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3915         int qvga, xstart, xend, ystart, yend;
3916         u8 v;
3917
3918         qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3919
3920         /******** Mode (VGA/QVGA) and sensor specific regs ********/
3921         switch (sd->sensor) {
3922         case SEN_OV2610:
3923                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3924                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3925                 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3926                 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3927                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3928                 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3929                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3930                 return;
3931         case SEN_OV2610AE: {
3932                 u8 v;
3933
3934                 /* frame rates:
3935                  *      10fps / 5 fps for 1600x1200
3936                  *      40fps / 20fps for 800x600
3937                  */
3938                 v = 80;
3939                 if (qvga) {
3940                         if (sd->frame_rate < 25)
3941                                 v = 0x81;
3942                 } else {
3943                         if (sd->frame_rate < 10)
3944                                 v = 0x81;
3945                 }
3946                 i2c_w(sd, 0x11, v);
3947                 i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
3948                 return;
3949             }
3950         case SEN_OV3610:
3951                 if (qvga) {
3952                         xstart = (1040 - gspca_dev->pixfmt.width) / 2 +
3953                                 (0x1f << 4);
3954                         ystart = (776 - gspca_dev->pixfmt.height) / 2;
3955                 } else {
3956                         xstart = (2076 - gspca_dev->pixfmt.width) / 2 +
3957                                 (0x10 << 4);
3958                         ystart = (1544 - gspca_dev->pixfmt.height) / 2;
3959                 }
3960                 xend = xstart + gspca_dev->pixfmt.width;
3961                 yend = ystart + gspca_dev->pixfmt.height;
3962                 /* Writing to the COMH register resets the other windowing regs
3963                    to their default values, so we must do this first. */
3964                 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3965                 i2c_w_mask(sd, 0x32,
3966                            (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3967                            0x3f);
3968                 i2c_w_mask(sd, 0x03,
3969                            (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3970                            0x0f);
3971                 i2c_w(sd, 0x17, xstart >> 4);
3972                 i2c_w(sd, 0x18, xend >> 4);
3973                 i2c_w(sd, 0x19, ystart >> 3);
3974                 i2c_w(sd, 0x1a, yend >> 3);
3975                 return;
3976         case SEN_OV8610:
3977                 /* For OV8610 qvga means qsvga */
3978                 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3979                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3980                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3981                 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3982                 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3983                 break;
3984         case SEN_OV7610:
3985                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3986                 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3987                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3988                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3989                 break;
3990         case SEN_OV7620:
3991         case SEN_OV7620AE:
3992         case SEN_OV76BE:
3993                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3994                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3995                 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3996                 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3997                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3998                 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3999                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4000                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4001                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4002                 if (sd->sensor == SEN_OV76BE)
4003                         i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
4004                 break;
4005         case SEN_OV7640:
4006         case SEN_OV7648:
4007                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4008                 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4009                 /* Setting this undocumented bit in qvga mode removes a very
4010                    annoying vertical shaking of the image */
4011                 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4012                 /* Unknown */
4013                 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
4014                 /* Allow higher automatic gain (to allow higher framerates) */
4015                 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4016                 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
4017                 break;
4018         case SEN_OV7670:
4019                 /* set COM7_FMT_VGA or COM7_FMT_QVGA
4020                  * do we need to set anything else?
4021                  *      HSTART etc are set in set_ov_sensor_window itself */
4022                 i2c_w_mask(sd, OV7670_R12_COM7,
4023                          qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
4024                          OV7670_COM7_FMT_MASK);
4025                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4026                 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
4027                                 OV7670_COM8_AWB);
4028                 if (qvga) {             /* QVGA from ov7670.c by
4029                                          * Jonathan Corbet */
4030                         xstart = 164;
4031                         xend = 28;
4032                         ystart = 14;
4033                         yend = 494;
4034                 } else {                /* VGA */
4035                         xstart = 158;
4036                         xend = 14;
4037                         ystart = 10;
4038                         yend = 490;
4039                 }
4040                 /* OV7670 hardware window registers are split across
4041                  * multiple locations */
4042                 i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
4043                 i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
4044                 v = i2c_r(sd, OV7670_R32_HREF);
4045                 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
4046                 msleep(10);     /* need to sleep between read and write to
4047                                  * same reg! */
4048                 i2c_w(sd, OV7670_R32_HREF, v);
4049
4050                 i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
4051                 i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
4052                 v = i2c_r(sd, OV7670_R03_VREF);
4053                 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
4054                 msleep(10);     /* need to sleep between read and write to
4055                                  * same reg! */
4056                 i2c_w(sd, OV7670_R03_VREF, v);
4057                 break;
4058         case SEN_OV6620:
4059                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4060                 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4061                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4062                 break;
4063         case SEN_OV6630:
4064         case SEN_OV66308AF:
4065                 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4066                 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4067                 break;
4068         case SEN_OV9600: {
4069                 const struct ov_i2c_regvals *vals;
4070                 static const struct ov_i2c_regvals sxga_15[] = {
4071                         {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4072                 };
4073                 static const struct ov_i2c_regvals sxga_7_5[] = {
4074                         {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4075                 };
4076                 static const struct ov_i2c_regvals vga_30[] = {
4077                         {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
4078                 };
4079                 static const struct ov_i2c_regvals vga_15[] = {
4080                         {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
4081                 };
4082
4083                 /* frame rates:
4084                  *      15fps / 7.5 fps for 1280x1024
4085                  *      30fps / 15fps for 640x480
4086                  */
4087                 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
4088                 if (qvga)
4089                         vals = sd->frame_rate < 30 ? vga_15 : vga_30;
4090                 else
4091                         vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
4092                 write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
4093                 return;
4094             }
4095         default:
4096                 return;
4097         }
4098
4099         /******** Clock programming ********/
4100         i2c_w(sd, 0x11, sd->clockdiv);
4101 }
4102
4103 /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
4104 static void sethvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip)
4105 {
4106         struct sd *sd = (struct sd *) gspca_dev;
4107
4108         if (sd->gspca_dev.streaming)
4109                 reg_w(sd, OV519_R51_RESET1, 0x0f);      /* block stream */
4110         i2c_w_mask(sd, OV7670_R1E_MVFP,
4111                 OV7670_MVFP_MIRROR * hflip | OV7670_MVFP_VFLIP * vflip,
4112                 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
4113         if (sd->gspca_dev.streaming)
4114                 reg_w(sd, OV519_R51_RESET1, 0x00);      /* restart stream */
4115 }
4116
4117 static void set_ov_sensor_window(struct sd *sd)
4118 {
4119         struct gspca_dev *gspca_dev;
4120         int qvga, crop;
4121         int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
4122
4123         /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4124         switch (sd->sensor) {
4125         case SEN_OV2610:
4126         case SEN_OV2610AE:
4127         case SEN_OV3610:
4128         case SEN_OV7670:
4129         case SEN_OV9600:
4130                 mode_init_ov_sensor_regs(sd);
4131                 return;
4132         case SEN_OV7660:
4133                 ov519_set_mode(sd);
4134                 ov519_set_fr(sd);
4135                 return;
4136         }
4137
4138         gspca_dev = &sd->gspca_dev;
4139         qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4140         crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4141
4142         /* The different sensor ICs handle setting up of window differently.
4143          * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4144         switch (sd->sensor) {
4145         case SEN_OV8610:
4146                 hwsbase = 0x1e;
4147                 hwebase = 0x1e;
4148                 vwsbase = 0x02;
4149                 vwebase = 0x02;
4150                 break;
4151         case SEN_OV7610:
4152         case SEN_OV76BE:
4153                 hwsbase = 0x38;
4154                 hwebase = 0x3a;
4155                 vwsbase = vwebase = 0x05;
4156                 break;
4157         case SEN_OV6620:
4158         case SEN_OV6630:
4159         case SEN_OV66308AF:
4160                 hwsbase = 0x38;
4161                 hwebase = 0x3a;
4162                 vwsbase = 0x05;
4163                 vwebase = 0x06;
4164                 if (sd->sensor == SEN_OV66308AF && qvga)
4165                         /* HDG: this fixes U and V getting swapped */
4166                         hwsbase++;
4167                 if (crop) {
4168                         hwsbase += 8;
4169                         hwebase += 8;
4170                         vwsbase += 11;
4171                         vwebase += 11;
4172                 }
4173                 break;
4174         case SEN_OV7620:
4175         case SEN_OV7620AE:
4176                 hwsbase = 0x2f;         /* From 7620.SET (spec is wrong) */
4177                 hwebase = 0x2f;
4178                 vwsbase = vwebase = 0x05;
4179                 break;
4180         case SEN_OV7640:
4181         case SEN_OV7648:
4182                 hwsbase = 0x1a;
4183                 hwebase = 0x1a;
4184                 vwsbase = vwebase = 0x03;
4185                 break;
4186         default:
4187                 return;
4188         }
4189
4190         switch (sd->sensor) {
4191         case SEN_OV6620:
4192         case SEN_OV6630:
4193         case SEN_OV66308AF:
4194                 if (qvga) {             /* QCIF */
4195                         hwscale = 0;
4196                         vwscale = 0;
4197                 } else {                /* CIF */
4198                         hwscale = 1;
4199                         vwscale = 1;    /* The datasheet says 0;
4200                                          * it's wrong */
4201                 }
4202                 break;
4203         case SEN_OV8610:
4204                 if (qvga) {             /* QSVGA */
4205                         hwscale = 1;
4206                         vwscale = 1;
4207                 } else {                /* SVGA */
4208                         hwscale = 2;
4209                         vwscale = 2;
4210                 }
4211                 break;
4212         default:                        /* SEN_OV7xx0 */
4213                 if (qvga) {             /* QVGA */
4214                         hwscale = 1;
4215                         vwscale = 0;
4216                 } else {                /* VGA */
4217                         hwscale = 2;
4218                         vwscale = 1;
4219                 }
4220         }
4221
4222         mode_init_ov_sensor_regs(sd);
4223
4224         i2c_w(sd, 0x17, hwsbase);
4225         i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4226         i2c_w(sd, 0x19, vwsbase);
4227         i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4228 }
4229
4230 /* -- start the camera -- */
4231 static int sd_start(struct gspca_dev *gspca_dev)
4232 {
4233         struct sd *sd = (struct sd *) gspca_dev;
4234
4235         /* Default for most bridges, allow bridge_mode_init_regs to override */
4236         sd->sensor_width = sd->gspca_dev.pixfmt.width;
4237         sd->sensor_height = sd->gspca_dev.pixfmt.height;
4238
4239         switch (sd->bridge) {
4240         case BRIDGE_OV511:
4241         case BRIDGE_OV511PLUS:
4242                 ov511_mode_init_regs(sd);
4243                 break;
4244         case BRIDGE_OV518:
4245         case BRIDGE_OV518PLUS:
4246                 ov518_mode_init_regs(sd);
4247                 break;
4248         case BRIDGE_OV519:
4249                 ov519_mode_init_regs(sd);
4250                 break;
4251         /* case BRIDGE_OVFX2: nothing to do */
4252         case BRIDGE_W9968CF:
4253                 w9968cf_mode_init_regs(sd);
4254                 break;
4255         }
4256
4257         set_ov_sensor_window(sd);
4258
4259         /* Force clear snapshot state in case the snapshot button was
4260            pressed while we weren't streaming */
4261         sd->snapshot_needs_reset = 1;
4262         sd_reset_snapshot(gspca_dev);
4263
4264         sd->first_frame = 3;
4265
4266         ov51x_restart(sd);
4267         ov51x_led_control(sd, 1);
4268         return gspca_dev->usb_err;
4269 }
4270
4271 static void sd_stopN(struct gspca_dev *gspca_dev)
4272 {
4273         struct sd *sd = (struct sd *) gspca_dev;
4274
4275         ov51x_stop(sd);
4276         ov51x_led_control(sd, 0);
4277 }
4278
4279 static void sd_stop0(struct gspca_dev *gspca_dev)
4280 {
4281         struct sd *sd = (struct sd *) gspca_dev;
4282
4283         if (!sd->gspca_dev.present)
4284                 return;
4285         if (sd->bridge == BRIDGE_W9968CF)
4286                 w9968cf_stop0(sd);
4287
4288 #if IS_ENABLED(CONFIG_INPUT)
4289         /* If the last button state is pressed, release it now! */
4290         if (sd->snapshot_pressed) {
4291                 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4292                 input_sync(gspca_dev->input_dev);
4293                 sd->snapshot_pressed = 0;
4294         }
4295 #endif
4296         if (sd->bridge == BRIDGE_OV519)
4297                 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4298 }
4299
4300 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4301 {
4302         struct sd *sd = (struct sd *) gspca_dev;
4303
4304         if (sd->snapshot_pressed != state) {
4305 #if IS_ENABLED(CONFIG_INPUT)
4306                 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4307                 input_sync(gspca_dev->input_dev);
4308 #endif
4309                 if (state)
4310                         sd->snapshot_needs_reset = 1;
4311
4312                 sd->snapshot_pressed = state;
4313         } else {
4314                 /* On the ov511 / ov519 we need to reset the button state
4315                    multiple times, as resetting does not work as long as the
4316                    button stays pressed */
4317                 switch (sd->bridge) {
4318                 case BRIDGE_OV511:
4319                 case BRIDGE_OV511PLUS:
4320                 case BRIDGE_OV519:
4321                         if (state)
4322                                 sd->snapshot_needs_reset = 1;
4323                         break;
4324                 }
4325         }
4326 }
4327
4328 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4329                         u8 *in,                 /* isoc packet */
4330                         int len)                /* iso packet length */
4331 {
4332         struct sd *sd = (struct sd *) gspca_dev;
4333
4334         /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4335          * byte non-zero. The EOF packet has image width/height in the
4336          * 10th and 11th bytes. The 9th byte is given as follows:
4337          *
4338          * bit 7: EOF
4339          *     6: compression enabled
4340          *     5: 422/420/400 modes
4341          *     4: 422/420/400 modes
4342          *     3: 1
4343          *     2: snapshot button on
4344          *     1: snapshot frame
4345          *     0: even/odd field
4346          */
4347         if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4348             (in[8] & 0x08)) {
4349                 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4350                 if (in[8] & 0x80) {
4351                         /* Frame end */
4352                         if ((in[9] + 1) * 8 != gspca_dev->pixfmt.width ||
4353                             (in[10] + 1) * 8 != gspca_dev->pixfmt.height) {
4354                                 PERR("Invalid frame size, got: %dx%d,"
4355                                         " requested: %dx%d\n",
4356                                         (in[9] + 1) * 8, (in[10] + 1) * 8,
4357                                         gspca_dev->pixfmt.width,
4358                                         gspca_dev->pixfmt.height);
4359                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4360                                 return;
4361                         }
4362                         /* Add 11 byte footer to frame, might be useful */
4363                         gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4364                         return;
4365                 } else {
4366                         /* Frame start */
4367                         gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4368                         sd->packet_nr = 0;
4369                 }
4370         }
4371
4372         /* Ignore the packet number */
4373         len--;
4374
4375         /* intermediate packet */
4376         gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4377 }
4378
4379 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4380                         u8 *data,                       /* isoc packet */
4381                         int len)                        /* iso packet length */
4382 {
4383         struct sd *sd = (struct sd *) gspca_dev;
4384
4385         /* A false positive here is likely, until OVT gives me
4386          * the definitive SOF/EOF format */
4387         if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4388                 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4389                 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4390                 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4391                 sd->packet_nr = 0;
4392         }
4393
4394         if (gspca_dev->last_packet_type == DISCARD_PACKET)
4395                 return;
4396
4397         /* Does this device use packet numbers ? */
4398         if (len & 7) {
4399                 len--;
4400                 if (sd->packet_nr == data[len])
4401                         sd->packet_nr++;
4402                 /* The last few packets of the frame (which are all 0's
4403                    except that they may contain part of the footer), are
4404                    numbered 0 */
4405                 else if (sd->packet_nr == 0 || data[len]) {
4406                         PERR("Invalid packet nr: %d (expect: %d)",
4407                                 (int)data[len], (int)sd->packet_nr);
4408                         gspca_dev->last_packet_type = DISCARD_PACKET;
4409                         return;
4410                 }
4411         }
4412
4413         /* intermediate packet */
4414         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4415 }
4416
4417 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4418                         u8 *data,                       /* isoc packet */
4419                         int len)                        /* iso packet length */
4420 {
4421         /* Header of ov519 is 16 bytes:
4422          *     Byte     Value      Description
4423          *      0       0xff    magic
4424          *      1       0xff    magic
4425          *      2       0xff    magic
4426          *      3       0xXX    0x50 = SOF, 0x51 = EOF
4427          *      9       0xXX    0x01 initial frame without data,
4428          *                      0x00 standard frame with image
4429          *      14      Lo      in EOF: length of image data / 8
4430          *      15      Hi
4431          */
4432
4433         if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4434                 switch (data[3]) {
4435                 case 0x50:              /* start of frame */
4436                         /* Don't check the button state here, as the state
4437                            usually (always ?) changes at EOF and checking it
4438                            here leads to unnecessary snapshot state resets. */
4439 #define HDRSZ 16
4440                         data += HDRSZ;
4441                         len -= HDRSZ;
4442 #undef HDRSZ
4443                         if (data[0] == 0xff || data[1] == 0xd8)
4444                                 gspca_frame_add(gspca_dev, FIRST_PACKET,
4445                                                 data, len);
4446                         else
4447                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4448                         return;
4449                 case 0x51:              /* end of frame */
4450                         ov51x_handle_button(gspca_dev, data[11] & 1);
4451                         if (data[9] != 0)
4452                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4453                         gspca_frame_add(gspca_dev, LAST_PACKET,
4454                                         NULL, 0);
4455                         return;
4456                 }
4457         }
4458
4459         /* intermediate packet */
4460         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4461 }
4462
4463 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4464                         u8 *data,                       /* isoc packet */
4465                         int len)                        /* iso packet length */
4466 {
4467         struct sd *sd = (struct sd *) gspca_dev;
4468
4469         gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4470
4471         /* A short read signals EOF */
4472         if (len < gspca_dev->cam.bulk_size) {
4473                 /* If the frame is short, and it is one of the first ones
4474                    the sensor and bridge are still syncing, so drop it. */
4475                 if (sd->first_frame) {
4476                         sd->first_frame--;
4477                         if (gspca_dev->image_len <
4478                                   sd->gspca_dev.pixfmt.width *
4479                                         sd->gspca_dev.pixfmt.height)
4480                                 gspca_dev->last_packet_type = DISCARD_PACKET;
4481                 }
4482                 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4483                 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4484         }
4485 }
4486
4487 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4488                         u8 *data,                       /* isoc packet */
4489                         int len)                        /* iso packet length */
4490 {
4491         struct sd *sd = (struct sd *) gspca_dev;
4492
4493         switch (sd->bridge) {
4494         case BRIDGE_OV511:
4495         case BRIDGE_OV511PLUS:
4496                 ov511_pkt_scan(gspca_dev, data, len);
4497                 break;
4498         case BRIDGE_OV518:
4499         case BRIDGE_OV518PLUS:
4500                 ov518_pkt_scan(gspca_dev, data, len);
4501                 break;
4502         case BRIDGE_OV519:
4503                 ov519_pkt_scan(gspca_dev, data, len);
4504                 break;
4505         case BRIDGE_OVFX2:
4506                 ovfx2_pkt_scan(gspca_dev, data, len);
4507                 break;
4508         case BRIDGE_W9968CF:
4509                 w9968cf_pkt_scan(gspca_dev, data, len);
4510                 break;
4511         }
4512 }
4513
4514 /* -- management routines -- */
4515
4516 static void setbrightness(struct gspca_dev *gspca_dev, s32 val)
4517 {
4518         struct sd *sd = (struct sd *) gspca_dev;
4519         static const struct ov_i2c_regvals brit_7660[][7] = {
4520                 {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4521                         {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4522                 {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4523                         {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4524                 {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4525                         {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4526                 {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4527                         {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4528                 {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4529                         {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4530                 {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4531                         {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4532                 {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4533                         {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4534         };
4535
4536         switch (sd->sensor) {
4537         case SEN_OV8610:
4538         case SEN_OV7610:
4539         case SEN_OV76BE:
4540         case SEN_OV6620:
4541         case SEN_OV6630:
4542         case SEN_OV66308AF:
4543         case SEN_OV7640:
4544         case SEN_OV7648:
4545                 i2c_w(sd, OV7610_REG_BRT, val);
4546                 break;
4547         case SEN_OV7620:
4548         case SEN_OV7620AE:
4549                 i2c_w(sd, OV7610_REG_BRT, val);
4550                 break;
4551         case SEN_OV7660:
4552                 write_i2c_regvals(sd, brit_7660[val],
4553                                 ARRAY_SIZE(brit_7660[0]));
4554                 break;
4555         case SEN_OV7670:
4556 /*win trace
4557  *              i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4558                 i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4559                 break;
4560         }
4561 }
4562
4563 static void setcontrast(struct gspca_dev *gspca_dev, s32 val)
4564 {
4565         struct sd *sd = (struct sd *) gspca_dev;
4566         static const struct ov_i2c_regvals contrast_7660[][31] = {
4567                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4568                  {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4569                  {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4570                  {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4571                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4572                  {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4573                  {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4574                  {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4575                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4576                  {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4577                  {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4578                  {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4579                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4580                  {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4581                  {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4582                  {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4583                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4584                  {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4585                  {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4586                  {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4587                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4588                  {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4589                  {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4590                  {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4591                 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4592                  {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4593                  {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4594                  {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4595                  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4596                  {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4597                  {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4598                  {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4599                 {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4600                  {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4601                  {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4602                  {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4603                  {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4604                  {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4605                  {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4606                  {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4607                 {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4608                  {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4609                  {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4610                  {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4611                  {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4612                  {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4613                  {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4614                  {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4615                 {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4616                  {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4617                  {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4618                  {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4619                  {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4620                  {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4621                  {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4622                  {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4623         };
4624
4625         switch (sd->sensor) {
4626         case SEN_OV7610:
4627         case SEN_OV6620:
4628                 i2c_w(sd, OV7610_REG_CNT, val);
4629                 break;
4630         case SEN_OV6630:
4631         case SEN_OV66308AF:
4632                 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4633                 break;
4634         case SEN_OV8610: {
4635                 static const u8 ctab[] = {
4636                         0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4637                 };
4638
4639                 /* Use Y gamma control instead. Bit 0 enables it. */
4640                 i2c_w(sd, 0x64, ctab[val >> 5]);
4641                 break;
4642             }
4643         case SEN_OV7620:
4644         case SEN_OV7620AE: {
4645                 static const u8 ctab[] = {
4646                         0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4647                         0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4648                 };
4649
4650                 /* Use Y gamma control instead. Bit 0 enables it. */
4651                 i2c_w(sd, 0x64, ctab[val >> 4]);
4652                 break;
4653             }
4654         case SEN_OV7660:
4655                 write_i2c_regvals(sd, contrast_7660[val],
4656                                         ARRAY_SIZE(contrast_7660[0]));
4657                 break;
4658         case SEN_OV7670:
4659                 /* check that this isn't just the same as ov7610 */
4660                 i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4661                 break;
4662         }
4663 }
4664
4665 static void setexposure(struct gspca_dev *gspca_dev, s32 val)
4666 {
4667         struct sd *sd = (struct sd *) gspca_dev;
4668
4669         i2c_w(sd, 0x10, val);
4670 }
4671
4672 static void setcolors(struct gspca_dev *gspca_dev, s32 val)
4673 {
4674         struct sd *sd = (struct sd *) gspca_dev;
4675         static const struct ov_i2c_regvals colors_7660[][6] = {
4676                 {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4677                  {0x53, 0x19}, {0x54, 0x23}},
4678                 {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4679                  {0x53, 0x2c}, {0x54, 0x3e}},
4680                 {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4681                  {0x53, 0x40}, {0x54, 0x59}},
4682                 {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4683                  {0x53, 0x53}, {0x54, 0x73}},
4684                 {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4685                  {0x53, 0x66}, {0x54, 0x8e}},
4686         };
4687
4688         switch (sd->sensor) {
4689         case SEN_OV8610:
4690         case SEN_OV7610:
4691         case SEN_OV76BE:
4692         case SEN_OV6620:
4693         case SEN_OV6630:
4694         case SEN_OV66308AF:
4695                 i2c_w(sd, OV7610_REG_SAT, val);
4696                 break;
4697         case SEN_OV7620:
4698         case SEN_OV7620AE:
4699                 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4700 /*              rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4701                 if (rc < 0)
4702                         goto out; */
4703                 i2c_w(sd, OV7610_REG_SAT, val);
4704                 break;
4705         case SEN_OV7640:
4706         case SEN_OV7648:
4707                 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4708                 break;
4709         case SEN_OV7660:
4710                 write_i2c_regvals(sd, colors_7660[val],
4711                                         ARRAY_SIZE(colors_7660[0]));
4712                 break;
4713         case SEN_OV7670:
4714                 /* supported later once I work out how to do it
4715                  * transparently fail now! */
4716                 /* set REG_COM13 values for UV sat auto mode */
4717                 break;
4718         }
4719 }
4720
4721 static void setautobright(struct gspca_dev *gspca_dev, s32 val)
4722 {
4723         struct sd *sd = (struct sd *) gspca_dev;
4724
4725         i2c_w_mask(sd, 0x2d, val ? 0x10 : 0x00, 0x10);
4726 }
4727
4728 static void setfreq_i(struct sd *sd, s32 val)
4729 {
4730         if (sd->sensor == SEN_OV7660
4731          || sd->sensor == SEN_OV7670) {
4732                 switch (val) {
4733                 case 0: /* Banding filter disabled */
4734                         i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4735                         break;
4736                 case 1: /* 50 hz */
4737                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4738                                    OV7670_COM8_BFILT);
4739                         i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4740                         break;
4741                 case 2: /* 60 hz */
4742                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4743                                    OV7670_COM8_BFILT);
4744                         i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4745                         break;
4746                 case 3: /* Auto hz - ov7670 only */
4747                         i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4748                                    OV7670_COM8_BFILT);
4749                         i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4750                                    0x18);
4751                         break;
4752                 }
4753         } else {
4754                 switch (val) {
4755                 case 0: /* Banding filter disabled */
4756                         i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4757                         i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4758                         break;
4759                 case 1: /* 50 hz (filter on and framerate adj) */
4760                         i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4761                         i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4762                         /* 20 fps -> 16.667 fps */
4763                         if (sd->sensor == SEN_OV6620 ||
4764                             sd->sensor == SEN_OV6630 ||
4765                             sd->sensor == SEN_OV66308AF)
4766                                 i2c_w(sd, 0x2b, 0x5e);
4767                         else
4768                                 i2c_w(sd, 0x2b, 0xac);
4769                         break;
4770                 case 2: /* 60 hz (filter on, ...) */
4771                         i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4772                         if (sd->sensor == SEN_OV6620 ||
4773                             sd->sensor == SEN_OV6630 ||
4774                             sd->sensor == SEN_OV66308AF) {
4775                                 /* 20 fps -> 15 fps */
4776                                 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4777                                 i2c_w(sd, 0x2b, 0xa8);
4778                         } else {
4779                                 /* no framerate adj. */
4780                                 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4781                         }
4782                         break;
4783                 }
4784         }
4785 }
4786
4787 static void setfreq(struct gspca_dev *gspca_dev, s32 val)
4788 {
4789         struct sd *sd = (struct sd *) gspca_dev;
4790
4791         setfreq_i(sd, val);
4792
4793         /* Ugly but necessary */
4794         if (sd->bridge == BRIDGE_W9968CF)
4795                 w9968cf_set_crop_window(sd);
4796 }
4797
4798 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4799                         struct v4l2_jpegcompression *jcomp)
4800 {
4801         struct sd *sd = (struct sd *) gspca_dev;
4802
4803         if (sd->bridge != BRIDGE_W9968CF)
4804                 return -ENOTTY;
4805
4806         memset(jcomp, 0, sizeof *jcomp);
4807         jcomp->quality = v4l2_ctrl_g_ctrl(sd->jpegqual);
4808         jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4809                               V4L2_JPEG_MARKER_DRI;
4810         return 0;
4811 }
4812
4813 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4814                         const struct v4l2_jpegcompression *jcomp)
4815 {
4816         struct sd *sd = (struct sd *) gspca_dev;
4817
4818         if (sd->bridge != BRIDGE_W9968CF)
4819                 return -ENOTTY;
4820
4821         v4l2_ctrl_s_ctrl(sd->jpegqual, jcomp->quality);
4822         return 0;
4823 }
4824
4825 static int sd_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
4826 {
4827         struct gspca_dev *gspca_dev =
4828                 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4829         struct sd *sd = (struct sd *)gspca_dev;
4830
4831         gspca_dev->usb_err = 0;
4832
4833         switch (ctrl->id) {
4834         case V4L2_CID_AUTOGAIN:
4835                 gspca_dev->exposure->val = i2c_r(sd, 0x10);
4836                 break;
4837         }
4838         return 0;
4839 }
4840
4841 static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
4842 {
4843         struct gspca_dev *gspca_dev =
4844                 container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4845         struct sd *sd = (struct sd *)gspca_dev;
4846
4847         gspca_dev->usb_err = 0;
4848
4849         if (!gspca_dev->streaming)
4850                 return 0;
4851
4852         switch (ctrl->id) {
4853         case V4L2_CID_BRIGHTNESS:
4854                 setbrightness(gspca_dev, ctrl->val);
4855                 break;
4856         case V4L2_CID_CONTRAST:
4857                 setcontrast(gspca_dev, ctrl->val);
4858                 break;
4859         case V4L2_CID_POWER_LINE_FREQUENCY:
4860                 setfreq(gspca_dev, ctrl->val);
4861                 break;
4862         case V4L2_CID_AUTOBRIGHTNESS:
4863                 if (ctrl->is_new)
4864                         setautobright(gspca_dev, ctrl->val);
4865                 if (!ctrl->val && sd->brightness->is_new)
4866                         setbrightness(gspca_dev, sd->brightness->val);
4867                 break;
4868         case V4L2_CID_SATURATION:
4869                 setcolors(gspca_dev, ctrl->val);
4870                 break;
4871         case V4L2_CID_HFLIP:
4872                 sethvflip(gspca_dev, ctrl->val, sd->vflip->val);
4873                 break;
4874         case V4L2_CID_AUTOGAIN:
4875                 if (ctrl->is_new)
4876                         setautogain(gspca_dev, ctrl->val);
4877                 if (!ctrl->val && gspca_dev->exposure->is_new)
4878                         setexposure(gspca_dev, gspca_dev->exposure->val);
4879                 break;
4880         case V4L2_CID_JPEG_COMPRESSION_QUALITY:
4881                 return -EBUSY; /* Should never happen, as we grab the ctrl */
4882         }
4883         return gspca_dev->usb_err;
4884 }
4885
4886 static const struct v4l2_ctrl_ops sd_ctrl_ops = {
4887         .g_volatile_ctrl = sd_g_volatile_ctrl,
4888         .s_ctrl = sd_s_ctrl,
4889 };
4890
4891 static int sd_init_controls(struct gspca_dev *gspca_dev)
4892 {
4893         struct sd *sd = (struct sd *)gspca_dev;
4894         struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
4895
4896         gspca_dev->vdev.ctrl_handler = hdl;
4897         v4l2_ctrl_handler_init(hdl, 10);
4898         if (valid_controls[sd->sensor].has_brightness)
4899                 sd->brightness = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4900                         V4L2_CID_BRIGHTNESS, 0,
4901                         sd->sensor == SEN_OV7660 ? 6 : 255, 1,
4902                         sd->sensor == SEN_OV7660 ? 3 : 127);
4903         if (valid_controls[sd->sensor].has_contrast) {
4904                 if (sd->sensor == SEN_OV7660)
4905                         v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4906                                 V4L2_CID_CONTRAST, 0, 6, 1, 3);
4907                 else
4908                         v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4909                                 V4L2_CID_CONTRAST, 0, 255, 1,
4910                                 (sd->sensor == SEN_OV6630 ||
4911                                  sd->sensor == SEN_OV66308AF) ? 200 : 127);
4912         }
4913         if (valid_controls[sd->sensor].has_sat)
4914                 v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4915                         V4L2_CID_SATURATION, 0,
4916                         sd->sensor == SEN_OV7660 ? 4 : 255, 1,
4917                         sd->sensor == SEN_OV7660 ? 2 : 127);
4918         if (valid_controls[sd->sensor].has_exposure)
4919                 gspca_dev->exposure = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4920                         V4L2_CID_EXPOSURE, 0, 255, 1, 127);
4921         if (valid_controls[sd->sensor].has_hvflip) {
4922                 sd->hflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4923                         V4L2_CID_HFLIP, 0, 1, 1, 0);
4924                 sd->vflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4925                         V4L2_CID_VFLIP, 0, 1, 1, 0);
4926         }
4927         if (valid_controls[sd->sensor].has_autobright)
4928                 sd->autobright = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4929                         V4L2_CID_AUTOBRIGHTNESS, 0, 1, 1, 1);
4930         if (valid_controls[sd->sensor].has_autogain)
4931                 gspca_dev->autogain = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4932                         V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
4933         if (valid_controls[sd->sensor].has_freq) {
4934                 if (sd->sensor == SEN_OV7670)
4935                         sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4936                                 V4L2_CID_POWER_LINE_FREQUENCY,
4937                                 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
4938                                 V4L2_CID_POWER_LINE_FREQUENCY_AUTO);
4939                 else
4940                         sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4941                                 V4L2_CID_POWER_LINE_FREQUENCY,
4942                                 V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0, 0);
4943         }
4944         if (sd->bridge == BRIDGE_W9968CF)
4945                 sd->jpegqual = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4946                         V4L2_CID_JPEG_COMPRESSION_QUALITY,
4947                         QUALITY_MIN, QUALITY_MAX, 1, QUALITY_DEF);
4948
4949         if (hdl->error) {
4950                 PERR("Could not initialize controls\n");
4951                 return hdl->error;
4952         }
4953         if (gspca_dev->autogain)
4954                 v4l2_ctrl_auto_cluster(3, &gspca_dev->autogain, 0, true);
4955         if (sd->autobright)
4956                 v4l2_ctrl_auto_cluster(2, &sd->autobright, 0, false);
4957         if (sd->hflip)
4958                 v4l2_ctrl_cluster(2, &sd->hflip);
4959         return 0;
4960 }
4961
4962 /* sub-driver description */
4963 static const struct sd_desc sd_desc = {
4964         .name = MODULE_NAME,
4965         .config = sd_config,
4966         .init = sd_init,
4967         .init_controls = sd_init_controls,
4968         .isoc_init = sd_isoc_init,
4969         .start = sd_start,
4970         .stopN = sd_stopN,
4971         .stop0 = sd_stop0,
4972         .pkt_scan = sd_pkt_scan,
4973         .dq_callback = sd_reset_snapshot,
4974         .get_jcomp = sd_get_jcomp,
4975         .set_jcomp = sd_set_jcomp,
4976 #if IS_ENABLED(CONFIG_INPUT)
4977         .other_input = 1,
4978 #endif
4979 };
4980
4981 /* -- module initialisation -- */
4982 static const struct usb_device_id device_table[] = {
4983         {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4984         {USB_DEVICE(0x041e, 0x4052),
4985                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4986         {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4987         {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4988         {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4989         {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
4990         {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4991         {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
4992         {USB_DEVICE(0x045e, 0x028c),
4993                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4994         {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4995         {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
4996         {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4997         {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4998         {USB_DEVICE(0x05a9, 0x0519),
4999                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5000         {USB_DEVICE(0x05a9, 0x0530),
5001                 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5002         {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
5003         {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
5004         {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
5005         {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
5006         {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
5007         {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
5008         {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
5009         {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
5010         {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
5011         {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
5012         {}
5013 };
5014
5015 MODULE_DEVICE_TABLE(usb, device_table);
5016
5017 /* -- device connect -- */
5018 static int sd_probe(struct usb_interface *intf,
5019                         const struct usb_device_id *id)
5020 {
5021         return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
5022                                 THIS_MODULE);
5023 }
5024
5025 static struct usb_driver sd_driver = {
5026         .name = MODULE_NAME,
5027         .id_table = device_table,
5028         .probe = sd_probe,
5029         .disconnect = gspca_disconnect,
5030 #ifdef CONFIG_PM
5031         .suspend = gspca_suspend,
5032         .resume = gspca_resume,
5033         .reset_resume = gspca_resume,
5034 #endif
5035 };
5036
5037 module_usb_driver(sd_driver);
5038
5039 module_param(frame_rate, int, 0644);
5040 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");