kernel/drivers/media/platform/coda/coda-bit.c

   1 /*
   2  * Coda multi-standard codec IP - BIT processor functions
   3  *
   4  * Copyright (C) 2012 Vista Silicon S.L.
   5  *    Javier Martin, <javier.martin@vista-silicon.com>
   6  *    Xavier Duret
   7  * Copyright (C) 2012-2014 Philipp Zabel, Pengutronix
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/irqreturn.h>
  17 #include <linux/kernel.h>
  18 #include <linux/log2.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/reset.h>
  21 #include <linux/slab.h>
  22 #include <linux/videodev2.h>
  23
  24 #include <media/v4l2-common.h>
  25 #include <media/v4l2-ctrls.h>
  26 #include <media/v4l2-fh.h>
  27 #include <media/v4l2-mem2mem.h>
  28 #include <media/videobuf2-core.h>
  29 #include <media/videobuf2-dma-contig.h>
  30 #include <media/videobuf2-vmalloc.h>
  31
  32 #include "coda.h"
  33 #define CREATE_TRACE_POINTS
  34 #include "trace.h"
  35
  36 #define CODA_PARA_BUF_SIZE      (10 * 1024)
  37 #define CODA7_PS_BUF_SIZE       0x28000
  38 #define CODA9_PS_SAVE_SIZE      (512 * 1024)
  39
  40 #define CODA_DEFAULT_GAMMA      4096
  41 #define CODA9_DEFAULT_GAMMA     24576   /* 0.75 * 32768 */
  42
  43 static void coda_free_bitstream_buffer(struct coda_ctx *ctx);
  44
  45 static inline int coda_is_initialized(struct coda_dev *dev)
  46 {
  47         return coda_read(dev, CODA_REG_BIT_CUR_PC) != 0;
  48 }
  49
  50 static inline unsigned long coda_isbusy(struct coda_dev *dev)
  51 {
  52         return coda_read(dev, CODA_REG_BIT_BUSY);
  53 }
  54
  55 static int coda_wait_timeout(struct coda_dev *dev)
  56 {
  57         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  58
  59         while (coda_isbusy(dev)) {
  60                 if (time_after(jiffies, timeout))
  61                         return -ETIMEDOUT;
  62         }
  63         return 0;
  64 }
  65
  66 static void coda_command_async(struct coda_ctx *ctx, int cmd)
  67 {
  68         struct coda_dev *dev = ctx->dev;
  69
  70         if (dev->devtype->product == CODA_960 ||
  71             dev->devtype->product == CODA_7541) {
  72                 /* Restore context related registers to CODA */
  73                 coda_write(dev, ctx->bit_stream_param,
  74                                 CODA_REG_BIT_BIT_STREAM_PARAM);
  75                 coda_write(dev, ctx->frm_dis_flg,
  76                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  77                 coda_write(dev, ctx->frame_mem_ctrl,
  78                                 CODA_REG_BIT_FRAME_MEM_CTRL);
  79                 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
  80         }
  81
  82         if (dev->devtype->product == CODA_960) {
  83                 coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR);
  84                 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
  85         }
  86
  87         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  88
  89         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
  90         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
  91         coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
  92
  93         trace_coda_bit_run(ctx, cmd);
  94
  95         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
  96 }
  97
  98 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
  99 {
 100         struct coda_dev *dev = ctx->dev;
 101         int ret;
 102
 103         coda_command_async(ctx, cmd);
 104         ret = coda_wait_timeout(dev);
 105         trace_coda_bit_done(ctx);
 106
 107         return ret;
 108 }
 109
 110 int coda_hw_reset(struct coda_ctx *ctx)
 111 {
 112         struct coda_dev *dev = ctx->dev;
 113         unsigned long timeout;
 114         unsigned int idx;
 115         int ret;
 116
 117         if (!dev->rstc)
 118                 return -ENOENT;
 119
 120         idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX);
 121
 122         if (dev->devtype->product == CODA_960) {
 123                 timeout = jiffies + msecs_to_jiffies(100);
 124                 coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL);
 125                 while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) {
 126                         if (time_after(jiffies, timeout))
 127                                 return -ETIME;
 128                         cpu_relax();
 129                 }
 130         }
 131
 132         ret = reset_control_reset(dev->rstc);
 133         if (ret < 0)
 134                 return ret;
 135
 136         if (dev->devtype->product == CODA_960)
 137                 coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL);
 138         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 139         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
 140         ret = coda_wait_timeout(dev);
 141         coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX);
 142
 143         return ret;
 144 }
 145
 146 static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
 147 {
 148         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 149         struct coda_dev *dev = ctx->dev;
 150         u32 rd_ptr;
 151
 152         rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 153         kfifo->out = (kfifo->in & ~kfifo->mask) |
 154                       (rd_ptr - ctx->bitstream.paddr);
 155         if (kfifo->out > kfifo->in)
 156                 kfifo->out -= kfifo->mask + 1;
 157 }
 158
 159 static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
 160 {
 161         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 162         struct coda_dev *dev = ctx->dev;
 163         u32 rd_ptr, wr_ptr;
 164
 165         rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
 166         coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 167         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
 168         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 169 }
 170
 171 static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
 172 {
 173         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 174         struct coda_dev *dev = ctx->dev;
 175         u32 wr_ptr;
 176
 177         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
 178         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 179 }
 180
 181 static int coda_bitstream_queue(struct coda_ctx *ctx,
 182                                 struct vb2_buffer *src_buf)
 183 {
 184         u32 src_size = vb2_get_plane_payload(src_buf, 0);
 185         u32 n;
 186
 187         n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0),
 188                      src_size);
 189         if (n < src_size)
 190                 return -ENOSPC;
 191
 192         src_buf->v4l2_buf.sequence = ctx->qsequence++;
 193
 194         return 0;
 195 }
 196
 197 static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
 198                                      struct vb2_buffer *src_buf)
 199 {
 200         int ret;
 201
 202         if (coda_get_bitstream_payload(ctx) +
 203             vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size)
 204                 return false;
 205
 206         if (vb2_plane_vaddr(src_buf, 0) == NULL) {
 207                 v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
 208                 return true;
 209         }
 210
 211         ret = coda_bitstream_queue(ctx, src_buf);
 212         if (ret < 0) {
 213                 v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
 214                 return false;
 215         }
 216         /* Sync read pointer to device */
 217         if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
 218                 coda_kfifo_sync_to_device_write(ctx);
 219
 220         ctx->hold = false;
 221
 222         return true;
 223 }
 224
 225 void coda_fill_bitstream(struct coda_ctx *ctx, bool streaming)
 226 {
 227         struct vb2_buffer *src_buf;
 228         struct coda_buffer_meta *meta;
 229         u32 start;
 230
 231         while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) {
 232                 /*
 233                  * Only queue a single JPEG into the bitstream buffer, except
 234                  * to increase payload over 512 bytes or if in hold state.
 235                  */
 236                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
 237                     (coda_get_bitstream_payload(ctx) >= 512) && !ctx->hold)
 238                         break;
 239
 240                 src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
 241
 242                 /* Drop frames that do not start/end with a SOI/EOI markers */
 243                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
 244                     !coda_jpeg_check_buffer(ctx, src_buf)) {
 245                         v4l2_err(&ctx->dev->v4l2_dev,
 246                                  "dropping invalid JPEG frame %d\n",
 247                                  ctx->qsequence);
 248                         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 249                         v4l2_m2m_buf_done(src_buf, streaming ?
 250                                           VB2_BUF_STATE_ERROR :
 251                                           VB2_BUF_STATE_QUEUED);
 252                         continue;
 253                 }
 254
 255                 /* Buffer start position */
 256                 start = ctx->bitstream_fifo.kfifo.in &
 257                         ctx->bitstream_fifo.kfifo.mask;
 258
 259                 if (coda_bitstream_try_queue(ctx, src_buf)) {
 260                         /*
 261                          * Source buffer is queued in the bitstream ringbuffer;
 262                          * queue the timestamp and mark source buffer as done
 263                          */
 264                         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 265
 266                         meta = kmalloc(sizeof(*meta), GFP_KERNEL);
 267                         if (meta) {
 268                                 meta->sequence = src_buf->v4l2_buf.sequence;
 269                                 meta->timecode = src_buf->v4l2_buf.timecode;
 270                                 meta->timestamp = src_buf->v4l2_buf.timestamp;
 271                                 meta->start = start;
 272                                 meta->end = ctx->bitstream_fifo.kfifo.in &
 273                                             ctx->bitstream_fifo.kfifo.mask;
 274                                 list_add_tail(&meta->list,
 275                                               &ctx->buffer_meta_list);
 276
 277                                 trace_coda_bit_queue(ctx, src_buf, meta);
 278                         }
 279
 280                         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
 281                 } else {
 282                         break;
 283                 }
 284         }
 285 }
 286
 287 void coda_bit_stream_end_flag(struct coda_ctx *ctx)
 288 {
 289         struct coda_dev *dev = ctx->dev;
 290
 291         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
 292
 293         /* If this context is currently running, update the hardware flag */
 294         if ((dev->devtype->product == CODA_960) &&
 295             coda_isbusy(dev) &&
 296             (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
 297                 coda_write(dev, ctx->bit_stream_param,
 298                            CODA_REG_BIT_BIT_STREAM_PARAM);
 299         }
 300 }
 301
 302 static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
 303 {
 304         struct coda_dev *dev = ctx->dev;
 305         u32 *p = ctx->parabuf.vaddr;
 306
 307         if (dev->devtype->product == CODA_DX6)
 308                 p[index] = value;
 309         else
 310                 p[index ^ 1] = value;
 311 }
 312
 313 static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
 314                                          struct coda_aux_buf *buf, size_t size,
 315                                          const char *name)
 316 {
 317         return coda_alloc_aux_buf(ctx->dev, buf, size, name, ctx->debugfs_entry);
 318 }
 319
 320
 321 static void coda_free_framebuffers(struct coda_ctx *ctx)
 322 {
 323         int i;
 324
 325         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
 326                 coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
 327 }
 328
 329 static int coda_alloc_framebuffers(struct coda_ctx *ctx,
 330                                    struct coda_q_data *q_data, u32 fourcc)
 331 {
 332         struct coda_dev *dev = ctx->dev;
 333         int width, height;
 334         dma_addr_t paddr;
 335         int ysize;
 336         int ret;
 337         int i;
 338
 339         if (ctx->codec && (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
 340              ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264)) {
 341                 width = round_up(q_data->width, 16);
 342                 height = round_up(q_data->height, 16);
 343         } else {
 344                 width = round_up(q_data->width, 8);
 345                 height = q_data->height;
 346         }
 347         ysize = width * height;
 348
 349         /* Allocate frame buffers */
 350         for (i = 0; i < ctx->num_internal_frames; i++) {
 351                 size_t size;
 352                 char *name;
 353
 354                 size = ysize + ysize / 2;
 355                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
 356                     dev->devtype->product != CODA_DX6)
 357                         size += ysize / 4;
 358                 name = kasprintf(GFP_KERNEL, "fb%d", i);
 359                 ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i],
 360                                              size, name);
 361                 kfree(name);
 362                 if (ret < 0) {
 363                         coda_free_framebuffers(ctx);
 364                         return ret;
 365                 }
 366         }
 367
 368         /* Register frame buffers in the parameter buffer */
 369         for (i = 0; i < ctx->num_internal_frames; i++) {
 370                 paddr = ctx->internal_frames[i].paddr;
 371                 /* Start addresses of Y, Cb, Cr planes */
 372                 coda_parabuf_write(ctx, i * 3 + 0, paddr);
 373                 coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize);
 374                 coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize / 4);
 375
 376                 /* mvcol buffer for h.264 */
 377                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
 378                     dev->devtype->product != CODA_DX6)
 379                         coda_parabuf_write(ctx, 96 + i,
 380                                            ctx->internal_frames[i].paddr +
 381                                            ysize + ysize/4 + ysize/4);
 382         }
 383
 384         /* mvcol buffer for mpeg4 */
 385         if ((dev->devtype->product != CODA_DX6) &&
 386             (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
 387                 coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
 388                                             ysize + ysize/4 + ysize/4);
 389
 390         return 0;
 391 }
 392
 393 static void coda_free_context_buffers(struct coda_ctx *ctx)
 394 {
 395         struct coda_dev *dev = ctx->dev;
 396
 397         coda_free_aux_buf(dev, &ctx->slicebuf);
 398         coda_free_aux_buf(dev, &ctx->psbuf);
 399         if (dev->devtype->product != CODA_DX6)
 400                 coda_free_aux_buf(dev, &ctx->workbuf);
 401         coda_free_aux_buf(dev, &ctx->parabuf);
 402 }
 403
 404 static int coda_alloc_context_buffers(struct coda_ctx *ctx,
 405                                       struct coda_q_data *q_data)
 406 {
 407         struct coda_dev *dev = ctx->dev;
 408         size_t size;
 409         int ret;
 410
 411         if (!ctx->parabuf.vaddr) {
 412                 ret = coda_alloc_context_buf(ctx, &ctx->parabuf,
 413                                              CODA_PARA_BUF_SIZE, "parabuf");
 414                 if (ret < 0)
 415                         return ret;
 416         }
 417
 418         if (dev->devtype->product == CODA_DX6)
 419                 return 0;
 420
 421         if (!ctx->slicebuf.vaddr && q_data->fourcc == V4L2_PIX_FMT_H264) {
 422                 /* worst case slice size */
 423                 size = (DIV_ROUND_UP(q_data->width, 16) *
 424                         DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
 425                 ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size,
 426                                              "slicebuf");
 427                 if (ret < 0)
 428                         goto err;
 429         }
 430
 431         if (!ctx->psbuf.vaddr && dev->devtype->product == CODA_7541) {
 432                 ret = coda_alloc_context_buf(ctx, &ctx->psbuf,
 433                                              CODA7_PS_BUF_SIZE, "psbuf");
 434                 if (ret < 0)
 435                         goto err;
 436         }
 437
 438         if (!ctx->workbuf.vaddr) {
 439                 size = dev->devtype->workbuf_size;
 440                 if (dev->devtype->product == CODA_960 &&
 441                     q_data->fourcc == V4L2_PIX_FMT_H264)
 442                         size += CODA9_PS_SAVE_SIZE;
 443                 ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size,
 444                                              "workbuf");
 445                 if (ret < 0)
 446                         goto err;
 447         }
 448
 449         return 0;
 450
 451 err:
 452         coda_free_context_buffers(ctx);
 453         return ret;
 454 }
 455
 456 static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
 457                               int header_code, u8 *header, int *size)
 458 {
 459         struct coda_dev *dev = ctx->dev;
 460         size_t bufsize;
 461         int ret;
 462         int i;
 463
 464         if (dev->devtype->product == CODA_960)
 465                 memset(vb2_plane_vaddr(buf, 0), 0, 64);
 466
 467         coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
 468                    CODA_CMD_ENC_HEADER_BB_START);
 469         bufsize = vb2_plane_size(buf, 0);
 470         if (dev->devtype->product == CODA_960)
 471                 bufsize /= 1024;
 472         coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE);
 473         coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
 474         ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
 475         if (ret < 0) {
 476                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
 477                 return ret;
 478         }
 479
 480         if (dev->devtype->product == CODA_960) {
 481                 for (i = 63; i > 0; i--)
 482                         if (((char *)vb2_plane_vaddr(buf, 0))[i] != 0)
 483                                 break;
 484                 *size = i + 1;
 485         } else {
 486                 *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
 487                         coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
 488         }
 489         memcpy(header, vb2_plane_vaddr(buf, 0), *size);
 490
 491         return 0;
 492 }
 493
 494 static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size)
 495 {
 496         phys_addr_t ret;
 497
 498         size = round_up(size, 1024);
 499         if (size > iram->remaining)
 500                 return 0;
 501         iram->remaining -= size;
 502
 503         ret = iram->next_paddr;
 504         iram->next_paddr += size;
 505
 506         return ret;
 507 }
 508
 509 static void coda_setup_iram(struct coda_ctx *ctx)
 510 {
 511         struct coda_iram_info *iram_info = &ctx->iram_info;
 512         struct coda_dev *dev = ctx->dev;
 513         int w64, w128;
 514         int mb_width;
 515         int dbk_bits;
 516         int bit_bits;
 517         int ip_bits;
 518
 519         memset(iram_info, 0, sizeof(*iram_info));
 520         iram_info->next_paddr = dev->iram.paddr;
 521         iram_info->remaining = dev->iram.size;
 522
 523         if (!dev->iram.vaddr)
 524                 return;
 525
 526         switch (dev->devtype->product) {
 527         case CODA_7541:
 528                 dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
 529                 bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
 530                 ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
 531                 break;
 532         case CODA_960:
 533                 dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
 534                 bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
 535                 ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
 536                 break;
 537         default: /* CODA_DX6 */
 538                 return;
 539         }
 540
 541         if (ctx->inst_type == CODA_INST_ENCODER) {
 542                 struct coda_q_data *q_data_src;
 543
 544                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 545                 mb_width = DIV_ROUND_UP(q_data_src->width, 16);
 546                 w128 = mb_width * 128;
 547                 w64 = mb_width * 64;
 548
 549                 /* Prioritize in case IRAM is too small for everything */
 550                 if (dev->devtype->product == CODA_7541) {
 551                         iram_info->search_ram_size = round_up(mb_width * 16 *
 552                                                               36 + 2048, 1024);
 553                         iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
 554                                                 iram_info->search_ram_size);
 555                         if (!iram_info->search_ram_paddr) {
 556                                 pr_err("IRAM is smaller than the search ram size\n");
 557                                 goto out;
 558                         }
 559                         iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE |
 560                                                    CODA7_USE_ME_ENABLE;
 561                 }
 562
 563                 /* Only H.264BP and H.263P3 are considered */
 564                 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w64);
 565                 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w64);
 566                 if (!iram_info->buf_dbk_c_use)
 567                         goto out;
 568                 iram_info->axi_sram_use |= dbk_bits;
 569
 570                 iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
 571                 if (!iram_info->buf_bit_use)
 572                         goto out;
 573                 iram_info->axi_sram_use |= bit_bits;
 574
 575                 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
 576                 if (!iram_info->buf_ip_ac_dc_use)
 577                         goto out;
 578                 iram_info->axi_sram_use |= ip_bits;
 579
 580                 /* OVL and BTP disabled for encoder */
 581         } else if (ctx->inst_type == CODA_INST_DECODER) {
 582                 struct coda_q_data *q_data_dst;
 583
 584                 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 585                 mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
 586                 w128 = mb_width * 128;
 587
 588                 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w128);
 589                 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w128);
 590                 if (!iram_info->buf_dbk_c_use)
 591                         goto out;
 592                 iram_info->axi_sram_use |= dbk_bits;
 593
 594                 iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
 595                 if (!iram_info->buf_bit_use)
 596                         goto out;
 597                 iram_info->axi_sram_use |= bit_bits;
 598
 599                 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
 600                 if (!iram_info->buf_ip_ac_dc_use)
 601                         goto out;
 602                 iram_info->axi_sram_use |= ip_bits;
 603
 604                 /* OVL and BTP unused as there is no VC1 support yet */
 605         }
 606
 607 out:
 608         if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
 609                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 610                          "IRAM smaller than needed\n");
 611
 612         if (dev->devtype->product == CODA_7541) {
 613                 /* TODO - Enabling these causes picture errors on CODA7541 */
 614                 if (ctx->inst_type == CODA_INST_DECODER) {
 615                         /* fw 1.4.50 */
 616                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
 617                                                      CODA7_USE_IP_ENABLE);
 618                 } else {
 619                         /* fw 13.4.29 */
 620                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
 621                                                      CODA7_USE_HOST_DBK_ENABLE |
 622                                                      CODA7_USE_IP_ENABLE |
 623                                                      CODA7_USE_DBK_ENABLE);
 624                 }
 625         }
 626 }
 627
 628 static u32 coda_supported_firmwares[] = {
 629         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
 630         CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
 631         CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
 632 };
 633
 634 static bool coda_firmware_supported(u32 vernum)
 635 {
 636         int i;
 637
 638         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
 639                 if (vernum == coda_supported_firmwares[i])
 640                         return true;
 641         return false;
 642 }
 643
 644 int coda_check_firmware(struct coda_dev *dev)
 645 {
 646         u16 product, major, minor, release;
 647         u32 data;
 648         int ret;
 649
 650         ret = clk_prepare_enable(dev->clk_per);
 651         if (ret)
 652                 goto err_clk_per;
 653
 654         ret = clk_prepare_enable(dev->clk_ahb);
 655         if (ret)
 656                 goto err_clk_ahb;
 657
 658         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
 659         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 660         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
 661         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
 662         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
 663         if (coda_wait_timeout(dev)) {
 664                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
 665                 ret = -EIO;
 666                 goto err_run_cmd;
 667         }
 668
 669         if (dev->devtype->product == CODA_960) {
 670                 data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV);
 671                 v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n",
 672                           data);
 673         }
 674
 675         /* Check we are compatible with the loaded firmware */
 676         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
 677         product = CODA_FIRMWARE_PRODUCT(data);
 678         major = CODA_FIRMWARE_MAJOR(data);
 679         minor = CODA_FIRMWARE_MINOR(data);
 680         release = CODA_FIRMWARE_RELEASE(data);
 681
 682         clk_disable_unprepare(dev->clk_per);
 683         clk_disable_unprepare(dev->clk_ahb);
 684
 685         if (product != dev->devtype->product) {
 686                 v4l2_err(&dev->v4l2_dev,
 687                          "Wrong firmware. Hw: %s, Fw: %s, Version: %u.%u.%u\n",
 688                          coda_product_name(dev->devtype->product),
 689                          coda_product_name(product), major, minor, release);
 690                 return -EINVAL;
 691         }
 692
 693         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
 694                   coda_product_name(product));
 695
 696         if (coda_firmware_supported(data)) {
 697                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
 698                           major, minor, release);
 699         } else {
 700                 v4l2_warn(&dev->v4l2_dev,
 701                           "Unsupported firmware version: %u.%u.%u\n",
 702                           major, minor, release);
 703         }
 704
 705         return 0;
 706
 707 err_run_cmd:
 708         clk_disable_unprepare(dev->clk_ahb);
 709 err_clk_ahb:
 710         clk_disable_unprepare(dev->clk_per);
 711 err_clk_per:
 712         return ret;
 713 }
 714
 715 /*
 716  * Encoder context operations
 717  */
 718
 719 static int coda_encoder_reqbufs(struct coda_ctx *ctx,
 720                                 struct v4l2_requestbuffers *rb)
 721 {
 722         struct coda_q_data *q_data_src;
 723         int ret;
 724
 725         if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
 726                 return 0;
 727
 728         if (rb->count) {
 729                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 730                 ret = coda_alloc_context_buffers(ctx, q_data_src);
 731                 if (ret < 0)
 732                         return ret;
 733         } else {
 734                 coda_free_context_buffers(ctx);
 735         }
 736
 737         return 0;
 738 }
 739
 740 static int coda_start_encoding(struct coda_ctx *ctx)
 741 {
 742         struct coda_dev *dev = ctx->dev;
 743         struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
 744         struct coda_q_data *q_data_src, *q_data_dst;
 745         u32 bitstream_buf, bitstream_size;
 746         struct vb2_buffer *buf;
 747         int gamma, ret, value;
 748         u32 dst_fourcc;
 749         int num_fb;
 750         u32 stride;
 751
 752         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 753         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 754         dst_fourcc = q_data_dst->fourcc;
 755
 756         buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
 757         bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
 758         bitstream_size = q_data_dst->sizeimage;
 759
 760         if (!coda_is_initialized(dev)) {
 761                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
 762                 return -EFAULT;
 763         }
 764
 765         if (dst_fourcc == V4L2_PIX_FMT_JPEG) {
 766                 if (!ctx->params.jpeg_qmat_tab[0])
 767                         ctx->params.jpeg_qmat_tab[0] = kmalloc(64, GFP_KERNEL);
 768                 if (!ctx->params.jpeg_qmat_tab[1])
 769                         ctx->params.jpeg_qmat_tab[1] = kmalloc(64, GFP_KERNEL);
 770                 coda_set_jpeg_compression_quality(ctx, ctx->params.jpeg_quality);
 771         }
 772
 773         mutex_lock(&dev->coda_mutex);
 774
 775         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
 776         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 777         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 778         switch (dev->devtype->product) {
 779         case CODA_DX6:
 780                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
 781                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
 782                 break;
 783         case CODA_960:
 784                 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
 785                 /* fallthrough */
 786         case CODA_7541:
 787                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
 788                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
 789                 break;
 790         }
 791
 792         ctx->frame_mem_ctrl &= ~CODA_FRAME_CHROMA_INTERLEAVE;
 793         if (q_data_src->fourcc == V4L2_PIX_FMT_NV12)
 794                 ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
 795         coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
 796
 797         if (dev->devtype->product == CODA_DX6) {
 798                 /* Configure the coda */
 799                 coda_write(dev, dev->iram.paddr,
 800                            CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
 801         }
 802
 803         /* Could set rotation here if needed */
 804         value = 0;
 805         switch (dev->devtype->product) {
 806         case CODA_DX6:
 807                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK)
 808                         << CODADX6_PICWIDTH_OFFSET;
 809                 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK)
 810                          << CODA_PICHEIGHT_OFFSET;
 811                 break;
 812         case CODA_7541:
 813                 if (dst_fourcc == V4L2_PIX_FMT_H264) {
 814                         value = (round_up(q_data_src->width, 16) &
 815                                  CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
 816                         value |= (round_up(q_data_src->height, 16) &
 817                                  CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
 818                         break;
 819                 }
 820                 /* fallthrough */
 821         case CODA_960:
 822                 value = (q_data_src->width & CODA7_PICWIDTH_MASK)
 823                         << CODA7_PICWIDTH_OFFSET;
 824                 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK)
 825                          << CODA_PICHEIGHT_OFFSET;
 826         }
 827         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
 828         if (dst_fourcc == V4L2_PIX_FMT_JPEG)
 829                 ctx->params.framerate = 0;
 830         coda_write(dev, ctx->params.framerate,
 831                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
 832
 833         ctx->params.codec_mode = ctx->codec->mode;
 834         switch (dst_fourcc) {
 835         case V4L2_PIX_FMT_MPEG4:
 836                 if (dev->devtype->product == CODA_960)
 837                         coda_write(dev, CODA9_STD_MPEG4,
 838                                    CODA_CMD_ENC_SEQ_COD_STD);
 839                 else
 840                         coda_write(dev, CODA_STD_MPEG4,
 841                                    CODA_CMD_ENC_SEQ_COD_STD);
 842                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
 843                 break;
 844         case V4L2_PIX_FMT_H264:
 845                 if (dev->devtype->product == CODA_960)
 846                         coda_write(dev, CODA9_STD_H264,
 847                                    CODA_CMD_ENC_SEQ_COD_STD);
 848                 else
 849                         coda_write(dev, CODA_STD_H264,
 850                                    CODA_CMD_ENC_SEQ_COD_STD);
 851                 if (ctx->params.h264_deblk_enabled) {
 852                         value = ((ctx->params.h264_deblk_alpha &
 853                                   CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
 854                                  CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
 855                                 ((ctx->params.h264_deblk_beta &
 856                                   CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
 857                                  CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET);
 858                 } else {
 859                         value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET;
 860                 }
 861                 coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA);
 862                 break;
 863         case V4L2_PIX_FMT_JPEG:
 864                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_PARA);
 865                 coda_write(dev, ctx->params.jpeg_restart_interval,
 866                                 CODA_CMD_ENC_SEQ_JPG_RST_INTERVAL);
 867                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_EN);
 868                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_SIZE);
 869                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_OFFSET);
 870
 871                 coda_jpeg_write_tables(ctx);
 872                 break;
 873         default:
 874                 v4l2_err(v4l2_dev,
 875                          "dst format (0x%08x) invalid.\n", dst_fourcc);
 876                 ret = -EINVAL;
 877                 goto out;
 878         }
 879
 880         /*
 881          * slice mode and GOP size registers are used for thumb size/offset
 882          * in JPEG mode
 883          */
 884         if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
 885                 switch (ctx->params.slice_mode) {
 886                 case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
 887                         value = 0;
 888                         break;
 889                 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
 890                         value  = (ctx->params.slice_max_mb &
 891                                   CODA_SLICING_SIZE_MASK)
 892                                  << CODA_SLICING_SIZE_OFFSET;
 893                         value |= (1 & CODA_SLICING_UNIT_MASK)
 894                                  << CODA_SLICING_UNIT_OFFSET;
 895                         value |=  1 & CODA_SLICING_MODE_MASK;
 896                         break;
 897                 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
 898                         value  = (ctx->params.slice_max_bits &
 899                                   CODA_SLICING_SIZE_MASK)
 900                                  << CODA_SLICING_SIZE_OFFSET;
 901                         value |= (0 & CODA_SLICING_UNIT_MASK)
 902                                  << CODA_SLICING_UNIT_OFFSET;
 903                         value |=  1 & CODA_SLICING_MODE_MASK;
 904                         break;
 905                 }
 906                 coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
 907                 value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
 908                 coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
 909         }
 910
 911         if (ctx->params.bitrate) {
 912                 /* Rate control enabled */
 913                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK)
 914                         << CODA_RATECONTROL_BITRATE_OFFSET;
 915                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
 916                 if (dev->devtype->product == CODA_960)
 917                         value |= BIT(31); /* disable autoskip */
 918         } else {
 919                 value = 0;
 920         }
 921         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
 922
 923         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
 924         coda_write(dev, ctx->params.intra_refresh,
 925                    CODA_CMD_ENC_SEQ_INTRA_REFRESH);
 926
 927         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
 928         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
 929
 930
 931         value = 0;
 932         if (dev->devtype->product == CODA_960)
 933                 gamma = CODA9_DEFAULT_GAMMA;
 934         else
 935                 gamma = CODA_DEFAULT_GAMMA;
 936         if (gamma > 0) {
 937                 coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET,
 938                            CODA_CMD_ENC_SEQ_RC_GAMMA);
 939         }
 940
 941         if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) {
 942                 coda_write(dev,
 943                            ctx->params.h264_min_qp << CODA_QPMIN_OFFSET |
 944                            ctx->params.h264_max_qp << CODA_QPMAX_OFFSET,
 945                            CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX);
 946         }
 947         if (dev->devtype->product == CODA_960) {
 948                 if (ctx->params.h264_max_qp)
 949                         value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET;
 950                 if (CODA_DEFAULT_GAMMA > 0)
 951                         value |= 1 << CODA9_OPTION_GAMMA_OFFSET;
 952         } else {
 953                 if (CODA_DEFAULT_GAMMA > 0) {
 954                         if (dev->devtype->product == CODA_DX6)
 955                                 value |= 1 << CODADX6_OPTION_GAMMA_OFFSET;
 956                         else
 957                                 value |= 1 << CODA7_OPTION_GAMMA_OFFSET;
 958                 }
 959                 if (ctx->params.h264_min_qp)
 960                         value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET;
 961                 if (ctx->params.h264_max_qp)
 962                         value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET;
 963         }
 964         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
 965
 966         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE);
 967
 968         coda_setup_iram(ctx);
 969
 970         if (dst_fourcc == V4L2_PIX_FMT_H264) {
 971                 switch (dev->devtype->product) {
 972                 case CODA_DX6:
 973                         value = FMO_SLICE_SAVE_BUF_SIZE << 7;
 974                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
 975                         break;
 976                 case CODA_7541:
 977                         coda_write(dev, ctx->iram_info.search_ram_paddr,
 978                                         CODA7_CMD_ENC_SEQ_SEARCH_BASE);
 979                         coda_write(dev, ctx->iram_info.search_ram_size,
 980                                         CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
 981                         break;
 982                 case CODA_960:
 983                         coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION);
 984                         coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT);
 985                 }
 986         }
 987
 988         ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
 989         if (ret < 0) {
 990                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
 991                 goto out;
 992         }
 993
 994         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
 995                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
 996                 ret = -EFAULT;
 997                 goto out;
 998         }
 999
1000         if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
1001                 if (dev->devtype->product == CODA_960)
1002                         ctx->num_internal_frames = 4;
1003                 else
1004                         ctx->num_internal_frames = 2;
1005                 ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1006                 if (ret < 0) {
1007                         v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
1008                         goto out;
1009                 }
1010                 num_fb = 2;
1011                 stride = q_data_src->bytesperline;
1012         } else {
1013                 ctx->num_internal_frames = 0;
1014                 num_fb = 0;
1015                 stride = 0;
1016         }
1017         coda_write(dev, num_fb, CODA_CMD_SET_FRAME_BUF_NUM);
1018         coda_write(dev, stride, CODA_CMD_SET_FRAME_BUF_STRIDE);
1019
1020         if (dev->devtype->product == CODA_7541) {
1021                 coda_write(dev, q_data_src->bytesperline,
1022                                 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1023         }
1024         if (dev->devtype->product != CODA_DX6) {
1025                 coda_write(dev, ctx->iram_info.buf_bit_use,
1026                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1027                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1028                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1029                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1030                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1031                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1032                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1033                 coda_write(dev, ctx->iram_info.buf_ovl_use,
1034                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1035                 if (dev->devtype->product == CODA_960) {
1036                         coda_write(dev, ctx->iram_info.buf_btp_use,
1037                                         CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1038
1039                         /* FIXME */
1040                         coda_write(dev, ctx->internal_frames[2].paddr,
1041                                    CODA9_CMD_SET_FRAME_SUBSAMP_A);
1042                         coda_write(dev, ctx->internal_frames[3].paddr,
1043                                    CODA9_CMD_SET_FRAME_SUBSAMP_B);
1044                 }
1045         }
1046
1047         ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
1048         if (ret < 0) {
1049                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1050                 goto out;
1051         }
1052
1053         /* Save stream headers */
1054         buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1055         switch (dst_fourcc) {
1056         case V4L2_PIX_FMT_H264:
1057                 /*
1058                  * Get SPS in the first frame and copy it to an
1059                  * intermediate buffer.
1060                  */
1061                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
1062                                          &ctx->vpu_header[0][0],
1063                                          &ctx->vpu_header_size[0]);
1064                 if (ret < 0)
1065                         goto out;
1066
1067                 /*
1068                  * Get PPS in the first frame and copy it to an
1069                  * intermediate buffer.
1070                  */
1071                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
1072                                          &ctx->vpu_header[1][0],
1073                                          &ctx->vpu_header_size[1]);
1074                 if (ret < 0)
1075                         goto out;
1076
1077                 /*
1078                  * Length of H.264 headers is variable and thus it might not be
1079                  * aligned for the coda to append the encoded frame. In that is
1080                  * the case a filler NAL must be added to header 2.
1081                  */
1082                 ctx->vpu_header_size[2] = coda_h264_padding(
1083                                         (ctx->vpu_header_size[0] +
1084                                          ctx->vpu_header_size[1]),
1085                                          ctx->vpu_header[2]);
1086                 break;
1087         case V4L2_PIX_FMT_MPEG4:
1088                 /*
1089                  * Get VOS in the first frame and copy it to an
1090                  * intermediate buffer
1091                  */
1092                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
1093                                          &ctx->vpu_header[0][0],
1094                                          &ctx->vpu_header_size[0]);
1095                 if (ret < 0)
1096                         goto out;
1097
1098                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
1099                                          &ctx->vpu_header[1][0],
1100                                          &ctx->vpu_header_size[1]);
1101                 if (ret < 0)
1102                         goto out;
1103
1104                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
1105                                          &ctx->vpu_header[2][0],
1106                                          &ctx->vpu_header_size[2]);
1107                 if (ret < 0)
1108                         goto out;
1109                 break;
1110         default:
1111                 /* No more formats need to save headers at the moment */
1112                 break;
1113         }
1114
1115 out:
1116         mutex_unlock(&dev->coda_mutex);
1117         return ret;
1118 }
1119
1120 static int coda_prepare_encode(struct coda_ctx *ctx)
1121 {
1122         struct coda_q_data *q_data_src, *q_data_dst;
1123         struct vb2_buffer *src_buf, *dst_buf;
1124         struct coda_dev *dev = ctx->dev;
1125         int force_ipicture;
1126         int quant_param = 0;
1127         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1128         u32 rot_mode = 0;
1129         u32 dst_fourcc;
1130         u32 reg;
1131
1132         src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
1133         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1134         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1135         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1136         dst_fourcc = q_data_dst->fourcc;
1137
1138         src_buf->v4l2_buf.sequence = ctx->osequence;
1139         dst_buf->v4l2_buf.sequence = ctx->osequence;
1140         ctx->osequence++;
1141
1142         /*
1143          * Workaround coda firmware BUG that only marks the first
1144          * frame as IDR. This is a problem for some decoders that can't
1145          * recover when a frame is lost.
1146          */
1147         if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
1148                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1149                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1150         } else {
1151                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1152                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1153         }
1154
1155         if (dev->devtype->product == CODA_960)
1156                 coda_set_gdi_regs(ctx);
1157
1158         /*
1159          * Copy headers at the beginning of the first frame for H.264 only.
1160          * In MPEG4 they are already copied by the coda.
1161          */
1162         if (src_buf->v4l2_buf.sequence == 0) {
1163                 pic_stream_buffer_addr =
1164                         vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
1165                         ctx->vpu_header_size[0] +
1166                         ctx->vpu_header_size[1] +
1167                         ctx->vpu_header_size[2];
1168                 pic_stream_buffer_size = q_data_dst->sizeimage -
1169                         ctx->vpu_header_size[0] -
1170                         ctx->vpu_header_size[1] -
1171                         ctx->vpu_header_size[2];
1172                 memcpy(vb2_plane_vaddr(dst_buf, 0),
1173                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1174                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
1175                        &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
1176                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
1177                         ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
1178                         ctx->vpu_header_size[2]);
1179         } else {
1180                 pic_stream_buffer_addr =
1181                         vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1182                 pic_stream_buffer_size = q_data_dst->sizeimage;
1183         }
1184
1185         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1186                 force_ipicture = 1;
1187                 switch (dst_fourcc) {
1188                 case V4L2_PIX_FMT_H264:
1189                         quant_param = ctx->params.h264_intra_qp;
1190                         break;
1191                 case V4L2_PIX_FMT_MPEG4:
1192                         quant_param = ctx->params.mpeg4_intra_qp;
1193                         break;
1194                 case V4L2_PIX_FMT_JPEG:
1195                         quant_param = 30;
1196                         break;
1197                 default:
1198                         v4l2_warn(&ctx->dev->v4l2_dev,
1199                                 "cannot set intra qp, fmt not supported\n");
1200                         break;
1201                 }
1202         } else {
1203                 force_ipicture = 0;
1204                 switch (dst_fourcc) {
1205                 case V4L2_PIX_FMT_H264:
1206                         quant_param = ctx->params.h264_inter_qp;
1207                         break;
1208                 case V4L2_PIX_FMT_MPEG4:
1209                         quant_param = ctx->params.mpeg4_inter_qp;
1210                         break;
1211                 default:
1212                         v4l2_warn(&ctx->dev->v4l2_dev,
1213                                 "cannot set inter qp, fmt not supported\n");
1214                         break;
1215                 }
1216         }
1217
1218         /* submit */
1219         if (ctx->params.rot_mode)
1220                 rot_mode = CODA_ROT_MIR_ENABLE | ctx->params.rot_mode;
1221         coda_write(dev, rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1222         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1223
1224         if (dev->devtype->product == CODA_960) {
1225                 coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX);
1226                 coda_write(dev, q_data_src->width, CODA9_CMD_ENC_PIC_SRC_STRIDE);
1227                 coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC);
1228
1229                 reg = CODA9_CMD_ENC_PIC_SRC_ADDR_Y;
1230         } else {
1231                 reg = CODA_CMD_ENC_PIC_SRC_ADDR_Y;
1232         }
1233         coda_write_base(ctx, q_data_src, src_buf, reg);
1234
1235         coda_write(dev, force_ipicture << 1 & 0x2,
1236                    CODA_CMD_ENC_PIC_OPTION);
1237
1238         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1239         coda_write(dev, pic_stream_buffer_size / 1024,
1240                    CODA_CMD_ENC_PIC_BB_SIZE);
1241
1242         if (!ctx->streamon_out) {
1243                 /* After streamoff on the output side, set stream end flag */
1244                 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1245                 coda_write(dev, ctx->bit_stream_param,
1246                            CODA_REG_BIT_BIT_STREAM_PARAM);
1247         }
1248
1249         if (dev->devtype->product != CODA_DX6)
1250                 coda_write(dev, ctx->iram_info.axi_sram_use,
1251                                 CODA7_REG_BIT_AXI_SRAM_USE);
1252
1253         trace_coda_enc_pic_run(ctx, src_buf);
1254
1255         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1256
1257         return 0;
1258 }
1259
1260 static void coda_finish_encode(struct coda_ctx *ctx)
1261 {
1262         struct vb2_buffer *src_buf, *dst_buf;
1263         struct coda_dev *dev = ctx->dev;
1264         u32 wr_ptr, start_ptr;
1265
1266         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
1267         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1268
1269         trace_coda_enc_pic_done(ctx, dst_buf);
1270
1271         /* Get results from the coda */
1272         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1273         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1274
1275         /* Calculate bytesused field */
1276         if (dst_buf->v4l2_buf.sequence == 0) {
1277                 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
1278                                         ctx->vpu_header_size[0] +
1279                                         ctx->vpu_header_size[1] +
1280                                         ctx->vpu_header_size[2]);
1281         } else {
1282                 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr);
1283         }
1284
1285         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1286                  wr_ptr - start_ptr);
1287
1288         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1289         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1290
1291         if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
1292                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1293                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1294         } else {
1295                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1296                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1297         }
1298
1299         dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
1300         dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
1301         dst_buf->v4l2_buf.flags |=
1302                 src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
1303         dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
1304
1305         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1306
1307         dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
1308         v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1309
1310         ctx->gopcounter--;
1311         if (ctx->gopcounter < 0)
1312                 ctx->gopcounter = ctx->params.gop_size - 1;
1313
1314         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1315                 "job finished: encoding frame (%d) (%s)\n",
1316                 dst_buf->v4l2_buf.sequence,
1317                 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1318                 "KEYFRAME" : "PFRAME");
1319 }
1320
1321 static void coda_seq_end_work(struct work_struct *work)
1322 {
1323         struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work);
1324         struct coda_dev *dev = ctx->dev;
1325
1326         mutex_lock(&ctx->buffer_mutex);
1327         mutex_lock(&dev->coda_mutex);
1328
1329         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1330                  "%d: %s: sent command 'SEQ_END' to coda\n", ctx->idx,
1331                  __func__);
1332         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1333                 v4l2_err(&dev->v4l2_dev,
1334                          "CODA_COMMAND_SEQ_END failed\n");
1335         }
1336
1337         kfifo_init(&ctx->bitstream_fifo,
1338                 ctx->bitstream.vaddr, ctx->bitstream.size);
1339
1340         coda_free_framebuffers(ctx);
1341
1342         mutex_unlock(&dev->coda_mutex);
1343         mutex_unlock(&ctx->buffer_mutex);
1344 }
1345
1346 static void coda_bit_release(struct coda_ctx *ctx)
1347 {
1348         mutex_lock(&ctx->buffer_mutex);
1349         coda_free_framebuffers(ctx);
1350         coda_free_context_buffers(ctx);
1351         coda_free_bitstream_buffer(ctx);
1352         mutex_unlock(&ctx->buffer_mutex);
1353 }
1354
1355 const struct coda_context_ops coda_bit_encode_ops = {
1356         .queue_init = coda_encoder_queue_init,
1357         .reqbufs = coda_encoder_reqbufs,
1358         .start_streaming = coda_start_encoding,
1359         .prepare_run = coda_prepare_encode,
1360         .finish_run = coda_finish_encode,
1361         .seq_end_work = coda_seq_end_work,
1362         .release = coda_bit_release,
1363 };
1364
1365 /*
1366  * Decoder context operations
1367  */
1368
1369 static int coda_alloc_bitstream_buffer(struct coda_ctx *ctx,
1370                                        struct coda_q_data *q_data)
1371 {
1372         if (ctx->bitstream.vaddr)
1373                 return 0;
1374
1375         ctx->bitstream.size = roundup_pow_of_two(q_data->sizeimage * 2);
1376         ctx->bitstream.vaddr = dma_alloc_writecombine(
1377                         &ctx->dev->plat_dev->dev, ctx->bitstream.size,
1378                         &ctx->bitstream.paddr, GFP_KERNEL);
1379         if (!ctx->bitstream.vaddr) {
1380                 v4l2_err(&ctx->dev->v4l2_dev,
1381                          "failed to allocate bitstream ringbuffer");
1382                 return -ENOMEM;
1383         }
1384         kfifo_init(&ctx->bitstream_fifo,
1385                    ctx->bitstream.vaddr, ctx->bitstream.size);
1386
1387         return 0;
1388 }
1389
1390 static void coda_free_bitstream_buffer(struct coda_ctx *ctx)
1391 {
1392         if (ctx->bitstream.vaddr == NULL)
1393                 return;
1394
1395         dma_free_writecombine(&ctx->dev->plat_dev->dev, ctx->bitstream.size,
1396                               ctx->bitstream.vaddr, ctx->bitstream.paddr);
1397         ctx->bitstream.vaddr = NULL;
1398         kfifo_init(&ctx->bitstream_fifo, NULL, 0);
1399 }
1400
1401 static int coda_decoder_reqbufs(struct coda_ctx *ctx,
1402                                 struct v4l2_requestbuffers *rb)
1403 {
1404         struct coda_q_data *q_data_src;
1405         int ret;
1406
1407         if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
1408                 return 0;
1409
1410         if (rb->count) {
1411                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1412                 ret = coda_alloc_context_buffers(ctx, q_data_src);
1413                 if (ret < 0)
1414                         return ret;
1415                 ret = coda_alloc_bitstream_buffer(ctx, q_data_src);
1416                 if (ret < 0) {
1417                         coda_free_context_buffers(ctx);
1418                         return ret;
1419                 }
1420         } else {
1421                 coda_free_bitstream_buffer(ctx);
1422                 coda_free_context_buffers(ctx);
1423         }
1424
1425         return 0;
1426 }
1427
1428 static int __coda_start_decoding(struct coda_ctx *ctx)
1429 {
1430         struct coda_q_data *q_data_src, *q_data_dst;
1431         u32 bitstream_buf, bitstream_size;
1432         struct coda_dev *dev = ctx->dev;
1433         int width, height;
1434         u32 src_fourcc, dst_fourcc;
1435         u32 val;
1436         int ret;
1437
1438         /* Start decoding */
1439         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1440         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1441         bitstream_buf = ctx->bitstream.paddr;
1442         bitstream_size = ctx->bitstream.size;
1443         src_fourcc = q_data_src->fourcc;
1444         dst_fourcc = q_data_dst->fourcc;
1445
1446         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1447
1448         /* Update coda bitstream read and write pointers from kfifo */
1449         coda_kfifo_sync_to_device_full(ctx);
1450
1451         ctx->frame_mem_ctrl &= ~CODA_FRAME_CHROMA_INTERLEAVE;
1452         if (dst_fourcc == V4L2_PIX_FMT_NV12)
1453                 ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
1454         coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
1455
1456         ctx->display_idx = -1;
1457         ctx->frm_dis_flg = 0;
1458         coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1459
1460         coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
1461                         CODA_REG_BIT_BIT_STREAM_PARAM);
1462
1463         coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
1464         coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
1465         val = 0;
1466         if ((dev->devtype->product == CODA_7541) ||
1467             (dev->devtype->product == CODA_960))
1468                 val |= CODA_REORDER_ENABLE;
1469         if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG)
1470                 val |= CODA_NO_INT_ENABLE;
1471         coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
1472
1473         ctx->params.codec_mode = ctx->codec->mode;
1474         if (dev->devtype->product == CODA_960 &&
1475             src_fourcc == V4L2_PIX_FMT_MPEG4)
1476                 ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4;
1477         else
1478                 ctx->params.codec_mode_aux = 0;
1479         if (src_fourcc == V4L2_PIX_FMT_H264) {
1480                 if (dev->devtype->product == CODA_7541) {
1481                         coda_write(dev, ctx->psbuf.paddr,
1482                                         CODA_CMD_DEC_SEQ_PS_BB_START);
1483                         coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
1484                                         CODA_CMD_DEC_SEQ_PS_BB_SIZE);
1485                 }
1486                 if (dev->devtype->product == CODA_960) {
1487                         coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN);
1488                         coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE);
1489                 }
1490         }
1491         if (dev->devtype->product != CODA_960)
1492                 coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE);
1493
1494         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1495                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1496                 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1497                 return -ETIMEDOUT;
1498         }
1499
1500         /* Update kfifo out pointer from coda bitstream read pointer */
1501         coda_kfifo_sync_from_device(ctx);
1502
1503         coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1504
1505         if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
1506                 v4l2_err(&dev->v4l2_dev,
1507                         "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
1508                         coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
1509                 return -EAGAIN;
1510         }
1511
1512         val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
1513         if (dev->devtype->product == CODA_DX6) {
1514                 width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
1515                 height = val & CODADX6_PICHEIGHT_MASK;
1516         } else {
1517                 width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
1518                 height = val & CODA7_PICHEIGHT_MASK;
1519         }
1520
1521         if (width > q_data_dst->bytesperline || height > q_data_dst->height) {
1522                 v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
1523                          width, height, q_data_dst->bytesperline,
1524                          q_data_dst->height);
1525                 return -EINVAL;
1526         }
1527
1528         width = round_up(width, 16);
1529         height = round_up(height, 16);
1530
1531         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
1532                  __func__, ctx->idx, width, height);
1533
1534         ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED);
1535         if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
1536                 v4l2_err(&dev->v4l2_dev,
1537                          "not enough framebuffers to decode (%d < %d)\n",
1538                          CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
1539                 return -EINVAL;
1540         }
1541
1542         if (src_fourcc == V4L2_PIX_FMT_H264) {
1543                 u32 left_right;
1544                 u32 top_bottom;
1545
1546                 left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT);
1547                 top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM);
1548
1549                 q_data_dst->rect.left = (left_right >> 10) & 0x3ff;
1550                 q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff;
1551                 q_data_dst->rect.width = width - q_data_dst->rect.left -
1552                                          (left_right & 0x3ff);
1553                 q_data_dst->rect.height = height - q_data_dst->rect.top -
1554                                           (top_bottom & 0x3ff);
1555         }
1556
1557         ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
1558         if (ret < 0) {
1559                 v4l2_err(&dev->v4l2_dev, "failed to allocate framebuffers\n");
1560                 return ret;
1561         }
1562
1563         /* Tell the decoder how many frame buffers we allocated. */
1564         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1565         coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
1566
1567         if (dev->devtype->product != CODA_DX6) {
1568                 /* Set secondary AXI IRAM */
1569                 coda_setup_iram(ctx);
1570
1571                 coda_write(dev, ctx->iram_info.buf_bit_use,
1572                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1573                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1574                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1575                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1576                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1577                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1578                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1579                 coda_write(dev, ctx->iram_info.buf_ovl_use,
1580                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1581                 if (dev->devtype->product == CODA_960)
1582                         coda_write(dev, ctx->iram_info.buf_btp_use,
1583                                         CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1584         }
1585
1586         if (dev->devtype->product == CODA_960) {
1587                 int cbb_size, crb_size;
1588
1589                 coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY);
1590                 /* Luma 2x0 page, 2x6 cache, chroma 2x0 page, 2x4 cache size */
1591                 coda_write(dev, 0x20262024, CODA9_CMD_SET_FRAME_CACHE_SIZE);
1592
1593                 if (dst_fourcc == V4L2_PIX_FMT_NV12) {
1594                         cbb_size = 0;
1595                         crb_size = 16;
1596                 } else {
1597                         cbb_size = 8;
1598                         crb_size = 8;
1599                 }
1600                 coda_write(dev, 2 << CODA9_CACHE_PAGEMERGE_OFFSET |
1601                                 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
1602                                 cbb_size << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET |
1603                                 crb_size << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET,
1604                                 CODA9_CMD_SET_FRAME_CACHE_CONFIG);
1605         }
1606
1607         if (src_fourcc == V4L2_PIX_FMT_H264) {
1608                 coda_write(dev, ctx->slicebuf.paddr,
1609                                 CODA_CMD_SET_FRAME_SLICE_BB_START);
1610                 coda_write(dev, ctx->slicebuf.size / 1024,
1611                                 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
1612         }
1613
1614         if (dev->devtype->product == CODA_7541) {
1615                 int max_mb_x = 1920 / 16;
1616                 int max_mb_y = 1088 / 16;
1617                 int max_mb_num = max_mb_x * max_mb_y;
1618
1619                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1620                                 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
1621         } else if (dev->devtype->product == CODA_960) {
1622                 int max_mb_x = 1920 / 16;
1623                 int max_mb_y = 1088 / 16;
1624                 int max_mb_num = max_mb_x * max_mb_y;
1625
1626                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1627                                 CODA9_CMD_SET_FRAME_MAX_DEC_SIZE);
1628         }
1629
1630         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1631                 v4l2_err(&ctx->dev->v4l2_dev,
1632                          "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1633                 return -ETIMEDOUT;
1634         }
1635
1636         return 0;
1637 }
1638
1639 static int coda_start_decoding(struct coda_ctx *ctx)
1640 {
1641         struct coda_dev *dev = ctx->dev;
1642         int ret;
1643
1644         mutex_lock(&dev->coda_mutex);
1645         ret = __coda_start_decoding(ctx);
1646         mutex_unlock(&dev->coda_mutex);
1647
1648         return ret;
1649 }
1650
1651 static int coda_prepare_decode(struct coda_ctx *ctx)
1652 {
1653         struct vb2_buffer *dst_buf;
1654         struct coda_dev *dev = ctx->dev;
1655         struct coda_q_data *q_data_dst;
1656         struct coda_buffer_meta *meta;
1657         u32 reg_addr, reg_stride;
1658
1659         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1660         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1661
1662         /* Try to copy source buffer contents into the bitstream ringbuffer */
1663         mutex_lock(&ctx->bitstream_mutex);
1664         coda_fill_bitstream(ctx, true);
1665         mutex_unlock(&ctx->bitstream_mutex);
1666
1667         if (coda_get_bitstream_payload(ctx) < 512 &&
1668             (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1669                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1670                          "bitstream payload: %d, skipping\n",
1671                          coda_get_bitstream_payload(ctx));
1672                 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1673                 return -EAGAIN;
1674         }
1675
1676         /* Run coda_start_decoding (again) if not yet initialized */
1677         if (!ctx->initialized) {
1678                 int ret = __coda_start_decoding(ctx);
1679
1680                 if (ret < 0) {
1681                         v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
1682                         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1683                         return -EAGAIN;
1684                 } else {
1685                         ctx->initialized = 1;
1686                 }
1687         }
1688
1689         if (dev->devtype->product == CODA_960)
1690                 coda_set_gdi_regs(ctx);
1691
1692         if (dev->devtype->product == CODA_960) {
1693                 /*
1694                  * The CODA960 seems to have an internal list of buffers with
1695                  * 64 entries that includes the registered frame buffers as
1696                  * well as the rotator buffer output.
1697                  * ROT_INDEX needs to be < 0x40, but > ctx->num_internal_frames.
1698                  */
1699                 coda_write(dev, CODA_MAX_FRAMEBUFFERS + dst_buf->v4l2_buf.index,
1700                                 CODA9_CMD_DEC_PIC_ROT_INDEX);
1701
1702                 reg_addr = CODA9_CMD_DEC_PIC_ROT_ADDR_Y;
1703                 reg_stride = CODA9_CMD_DEC_PIC_ROT_STRIDE;
1704         } else {
1705                 reg_addr = CODA_CMD_DEC_PIC_ROT_ADDR_Y;
1706                 reg_stride = CODA_CMD_DEC_PIC_ROT_STRIDE;
1707         }
1708         coda_write_base(ctx, q_data_dst, dst_buf, reg_addr);
1709         coda_write(dev, q_data_dst->bytesperline, reg_stride);
1710
1711         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
1712                         CODA_CMD_DEC_PIC_ROT_MODE);
1713
1714         switch (dev->devtype->product) {
1715         case CODA_DX6:
1716                 /* TBD */
1717         case CODA_7541:
1718                 coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1719                 break;
1720         case CODA_960:
1721                 /* 'hardcode to use interrupt disable mode'? */
1722                 coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION);
1723                 break;
1724         }
1725
1726         coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1727
1728         coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1729         coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1730
1731         if (dev->devtype->product != CODA_DX6)
1732                 coda_write(dev, ctx->iram_info.axi_sram_use,
1733                                 CODA7_REG_BIT_AXI_SRAM_USE);
1734
1735         meta = list_first_entry_or_null(&ctx->buffer_meta_list,
1736                                         struct coda_buffer_meta, list);
1737
1738         if (meta && ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG) {
1739
1740                 /* If this is the last buffer in the bitstream, add padding */
1741                 if (meta->end == (ctx->bitstream_fifo.kfifo.in &
1742                                   ctx->bitstream_fifo.kfifo.mask)) {
1743                         static unsigned char buf[512];
1744                         unsigned int pad;
1745
1746                         /* Pad to multiple of 256 and then add 256 more */
1747                         pad = ((0 - meta->end) & 0xff) + 256;
1748
1749                         memset(buf, 0xff, sizeof(buf));
1750
1751                         kfifo_in(&ctx->bitstream_fifo, buf, pad);
1752                 }
1753         }
1754
1755         coda_kfifo_sync_to_device_full(ctx);
1756
1757         /* Clear decode success flag */
1758         coda_write(dev, 0, CODA_RET_DEC_PIC_SUCCESS);
1759
1760         trace_coda_dec_pic_run(ctx, meta);
1761
1762         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1763
1764         return 0;
1765 }
1766
1767 static void coda_finish_decode(struct coda_ctx *ctx)
1768 {
1769         struct coda_dev *dev = ctx->dev;
1770         struct coda_q_data *q_data_src;
1771         struct coda_q_data *q_data_dst;
1772         struct vb2_buffer *dst_buf;
1773         struct coda_buffer_meta *meta;
1774         unsigned long payload;
1775         int width, height;
1776         int decoded_idx;
1777         int display_idx;
1778         u32 src_fourcc;
1779         int success;
1780         u32 err_mb;
1781         u32 val;
1782
1783         /* Update kfifo out pointer from coda bitstream read pointer */
1784         coda_kfifo_sync_from_device(ctx);
1785
1786         /*
1787          * in stream-end mode, the read pointer can overshoot the write pointer
1788          * by up to 512 bytes
1789          */
1790         if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
1791                 if (coda_get_bitstream_payload(ctx) >= ctx->bitstream.size - 512)
1792                         kfifo_init(&ctx->bitstream_fifo,
1793                                 ctx->bitstream.vaddr, ctx->bitstream.size);
1794         }
1795
1796         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1797         src_fourcc = q_data_src->fourcc;
1798
1799         val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
1800         if (val != 1)
1801                 pr_err("DEC_PIC_SUCCESS = %d\n", val);
1802
1803         success = val & 0x1;
1804         if (!success)
1805                 v4l2_err(&dev->v4l2_dev, "decode failed\n");
1806
1807         if (src_fourcc == V4L2_PIX_FMT_H264) {
1808                 if (val & (1 << 3))
1809                         v4l2_err(&dev->v4l2_dev,
1810                                  "insufficient PS buffer space (%d bytes)\n",
1811                                  ctx->psbuf.size);
1812                 if (val & (1 << 2))
1813                         v4l2_err(&dev->v4l2_dev,
1814                                  "insufficient slice buffer space (%d bytes)\n",
1815                                  ctx->slicebuf.size);
1816         }
1817
1818         val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
1819         width = (val >> 16) & 0xffff;
1820         height = val & 0xffff;
1821
1822         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1823
1824         /* frame crop information */
1825         if (src_fourcc == V4L2_PIX_FMT_H264) {
1826                 u32 left_right;
1827                 u32 top_bottom;
1828
1829                 left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT);
1830                 top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM);
1831
1832                 if (left_right == 0xffffffff && top_bottom == 0xffffffff) {
1833                         /* Keep current crop information */
1834                 } else {
1835                         struct v4l2_rect *rect = &q_data_dst->rect;
1836
1837                         rect->left = left_right >> 16 & 0xffff;
1838                         rect->top = top_bottom >> 16 & 0xffff;
1839                         rect->width = width - rect->left -
1840                                       (left_right & 0xffff);
1841                         rect->height = height - rect->top -
1842                                        (top_bottom & 0xffff);
1843                 }
1844         } else {
1845                 /* no cropping */
1846         }
1847
1848         err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
1849         if (err_mb > 0)
1850                 v4l2_err(&dev->v4l2_dev,
1851                          "errors in %d macroblocks\n", err_mb);
1852
1853         if (dev->devtype->product == CODA_7541) {
1854                 val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
1855                 if (val == 0) {
1856                         /* not enough bitstream data */
1857                         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1858                                  "prescan failed: %d\n", val);
1859                         ctx->hold = true;
1860                         return;
1861                 }
1862         }
1863
1864         ctx->frm_dis_flg = coda_read(dev,
1865                                      CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1866
1867         /*
1868          * The previous display frame was copied out by the rotator,
1869          * now it can be overwritten again
1870          */
1871         if (ctx->display_idx >= 0 &&
1872             ctx->display_idx < ctx->num_internal_frames) {
1873                 ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
1874                 coda_write(dev, ctx->frm_dis_flg,
1875                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1876         }
1877
1878         /*
1879          * The index of the last decoded frame, not necessarily in
1880          * display order, and the index of the next display frame.
1881          * The latter could have been decoded in a previous run.
1882          */
1883         decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
1884         display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
1885
1886         if (decoded_idx == -1) {
1887                 /* no frame was decoded, but we might have a display frame */
1888                 if (display_idx >= 0 && display_idx < ctx->num_internal_frames)
1889                         ctx->sequence_offset++;
1890                 else if (ctx->display_idx < 0)
1891                         ctx->hold = true;
1892         } else if (decoded_idx == -2) {
1893                 /* no frame was decoded, we still return remaining buffers */
1894         } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
1895                 v4l2_err(&dev->v4l2_dev,
1896                          "decoded frame index out of range: %d\n", decoded_idx);
1897         } else {
1898                 val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM) - 1;
1899                 val -= ctx->sequence_offset;
1900                 mutex_lock(&ctx->bitstream_mutex);
1901                 if (!list_empty(&ctx->buffer_meta_list)) {
1902                         meta = list_first_entry(&ctx->buffer_meta_list,
1903                                               struct coda_buffer_meta, list);
1904                         list_del(&meta->list);
1905                         if (val != (meta->sequence & 0xffff)) {
1906                                 v4l2_err(&dev->v4l2_dev,
1907                                          "sequence number mismatch (%d(%d) != %d)\n",
1908                                          val, ctx->sequence_offset,
1909                                          meta->sequence);
1910                         }
1911                         ctx->frame_metas[decoded_idx] = *meta;
1912                         kfree(meta);
1913                 } else {
1914                         v4l2_err(&dev->v4l2_dev, "empty timestamp list!\n");
1915                         memset(&ctx->frame_metas[decoded_idx], 0,
1916                                sizeof(struct coda_buffer_meta));
1917                         ctx->frame_metas[decoded_idx].sequence = val;
1918                         ctx->sequence_offset++;
1919                 }
1920                 mutex_unlock(&ctx->bitstream_mutex);
1921
1922                 trace_coda_dec_pic_done(ctx, &ctx->frame_metas[decoded_idx]);
1923
1924                 val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7;
1925                 if (val == 0)
1926                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_KEYFRAME;
1927                 else if (val == 1)
1928                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_PFRAME;
1929                 else
1930                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_BFRAME;
1931
1932                 ctx->frame_errors[decoded_idx] = err_mb;
1933         }
1934
1935         if (display_idx == -1) {
1936                 /*
1937                  * no more frames to be decoded, but there could still
1938                  * be rotator output to dequeue
1939                  */
1940                 ctx->hold = true;
1941         } else if (display_idx == -3) {
1942                 /* possibly prescan failure */
1943         } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
1944                 v4l2_err(&dev->v4l2_dev,
1945                          "presentation frame index out of range: %d\n",
1946                          display_idx);
1947         }
1948
1949         /* If a frame was copied out, return it */
1950         if (ctx->display_idx >= 0 &&
1951             ctx->display_idx < ctx->num_internal_frames) {
1952                 dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
1953                 dst_buf->v4l2_buf.sequence = ctx->osequence++;
1954
1955                 dst_buf->v4l2_buf.flags &= ~(V4L2_BUF_FLAG_KEYFRAME |
1956                                              V4L2_BUF_FLAG_PFRAME |
1957                                              V4L2_BUF_FLAG_BFRAME);
1958                 dst_buf->v4l2_buf.flags |= ctx->frame_types[ctx->display_idx];
1959                 meta = &ctx->frame_metas[ctx->display_idx];
1960                 dst_buf->v4l2_buf.timecode = meta->timecode;
1961                 dst_buf->v4l2_buf.timestamp = meta->timestamp;
1962
1963                 trace_coda_dec_rot_done(ctx, meta, dst_buf);
1964
1965                 switch (q_data_dst->fourcc) {
1966                 case V4L2_PIX_FMT_YUV420:
1967                 case V4L2_PIX_FMT_YVU420:
1968                 case V4L2_PIX_FMT_NV12:
1969                 default:
1970                         payload = width * height * 3 / 2;
1971                         break;
1972                 case V4L2_PIX_FMT_YUV422P:
1973                         payload = width * height * 2;
1974                         break;
1975                 }
1976                 vb2_set_plane_payload(dst_buf, 0, payload);
1977
1978                 v4l2_m2m_buf_done(dst_buf, ctx->frame_errors[display_idx] ?
1979                                   VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
1980
1981                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1982                         "job finished: decoding frame (%d) (%s)\n",
1983                         dst_buf->v4l2_buf.sequence,
1984                         (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1985                         "KEYFRAME" : "PFRAME");
1986         } else {
1987                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1988                         "job finished: no frame decoded\n");
1989         }
1990
1991         /* The rotator will copy the current display frame next time */
1992         ctx->display_idx = display_idx;
1993 }
1994
1995 const struct coda_context_ops coda_bit_decode_ops = {
1996         .queue_init = coda_decoder_queue_init,
1997         .reqbufs = coda_decoder_reqbufs,
1998         .start_streaming = coda_start_decoding,
1999         .prepare_run = coda_prepare_decode,
2000         .finish_run = coda_finish_decode,
2001         .seq_end_work = coda_seq_end_work,
2002         .release = coda_bit_release,
2003 };
2004
2005 irqreturn_t coda_irq_handler(int irq, void *data)
2006 {
2007         struct coda_dev *dev = data;
2008         struct coda_ctx *ctx;
2009
2010         /* read status register to attend the IRQ */
2011         coda_read(dev, CODA_REG_BIT_INT_STATUS);
2012         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
2013                       CODA_REG_BIT_INT_CLEAR);
2014
2015         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2016         if (ctx == NULL) {
2017                 v4l2_err(&dev->v4l2_dev,
2018                          "Instance released before the end of transaction\n");
2019                 mutex_unlock(&dev->coda_mutex);
2020                 return IRQ_HANDLED;
2021         }
2022
2023         trace_coda_bit_done(ctx);
2024
2025         if (ctx->aborting) {
2026                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2027                          "task has been aborted\n");
2028         }
2029
2030         if (coda_isbusy(ctx->dev)) {
2031                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2032                          "coda is still busy!!!!\n");
2033                 return IRQ_NONE;
2034         }
2035
2036         complete(&ctx->completion);
2037
2038         return IRQ_HANDLED;
2039 }