kernel/drivers/media/pci/saa7134/saa7134-ts.c

   1 /*
   2  *
   3  * device driver for philips saa7134 based TV cards
   4  * video4linux video interface
   5  *
   6  * (c) 2001,02 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
   7  *
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License as published by
  10  *  the Free Software Foundation; either version 2 of the License, or
  11  *  (at your option) any later version.
  12  *
  13  *  This program is distributed in the hope that it will be useful,
  14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *  GNU General Public License for more details.
  17  *
  18  *  You should have received a copy of the GNU General Public License
  19  *  along with this program; if not, write to the Free Software
  20  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/init.h>
  24 #include <linux/list.h>
  25 #include <linux/module.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28
  29 #include "saa7134-reg.h"
  30 #include "saa7134.h"
  31
  32 /* ------------------------------------------------------------------ */
  33
  34 static unsigned int ts_debug;
  35 module_param(ts_debug, int, 0644);
  36 MODULE_PARM_DESC(ts_debug,"enable debug messages [ts]");
  37
  38 #define dprintk(fmt, arg...)    if (ts_debug) \
  39         printk(KERN_DEBUG "%s/ts: " fmt, dev->name , ## arg)
  40
  41 /* ------------------------------------------------------------------ */
  42 static int buffer_activate(struct saa7134_dev *dev,
  43                            struct saa7134_buf *buf,
  44                            struct saa7134_buf *next)
  45 {
  46
  47         dprintk("buffer_activate [%p]",buf);
  48         buf->top_seen = 0;
  49
  50         if (!dev->ts_started)
  51                 dev->ts_field = V4L2_FIELD_TOP;
  52
  53         if (NULL == next)
  54                 next = buf;
  55         if (V4L2_FIELD_TOP == dev->ts_field) {
  56                 dprintk("- [top]     buf=%p next=%p\n",buf,next);
  57                 saa_writel(SAA7134_RS_BA1(5),saa7134_buffer_base(buf));
  58                 saa_writel(SAA7134_RS_BA2(5),saa7134_buffer_base(next));
  59                 dev->ts_field = V4L2_FIELD_BOTTOM;
  60         } else {
  61                 dprintk("- [bottom]  buf=%p next=%p\n",buf,next);
  62                 saa_writel(SAA7134_RS_BA1(5),saa7134_buffer_base(next));
  63                 saa_writel(SAA7134_RS_BA2(5),saa7134_buffer_base(buf));
  64                 dev->ts_field = V4L2_FIELD_TOP;
  65         }
  66
  67         /* start DMA */
  68         saa7134_set_dmabits(dev);
  69
  70         mod_timer(&dev->ts_q.timeout, jiffies+TS_BUFFER_TIMEOUT);
  71
  72         if (!dev->ts_started)
  73                 saa7134_ts_start(dev);
  74
  75         return 0;
  76 }
  77
  78 int saa7134_ts_buffer_init(struct vb2_buffer *vb2)
  79 {
  80         struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv;
  81         struct saa7134_buf *buf = container_of(vb2, struct saa7134_buf, vb2);
  82
  83         dmaq->curr = NULL;
  84         buf->activate = buffer_activate;
  85
  86         return 0;
  87 }
  88 EXPORT_SYMBOL_GPL(saa7134_ts_buffer_init);
  89
  90 int saa7134_ts_buffer_prepare(struct vb2_buffer *vb2)
  91 {
  92         struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv;
  93         struct saa7134_dev *dev = dmaq->dev;
  94         struct saa7134_buf *buf = container_of(vb2, struct saa7134_buf, vb2);
  95         struct sg_table *dma = vb2_dma_sg_plane_desc(vb2, 0);
  96         unsigned int lines, llength, size;
  97
  98         dprintk("buffer_prepare [%p]\n", buf);
  99
 100         llength = TS_PACKET_SIZE;
 101         lines = dev->ts.nr_packets;
 102
 103         size = lines * llength;
 104         if (vb2_plane_size(vb2, 0) < size)
 105                 return -EINVAL;
 106
 107         vb2_set_plane_payload(vb2, 0, size);
 108         vb2->v4l2_buf.field = dev->field;
 109
 110         return saa7134_pgtable_build(dev->pci, &dmaq->pt, dma->sgl, dma->nents,
 111                                     saa7134_buffer_startpage(buf));
 112 }
 113 EXPORT_SYMBOL_GPL(saa7134_ts_buffer_prepare);
 114
 115 int saa7134_ts_queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
 116                            unsigned int *nbuffers, unsigned int *nplanes,
 117                            unsigned int sizes[], void *alloc_ctxs[])
 118 {
 119         struct saa7134_dmaqueue *dmaq = q->drv_priv;
 120         struct saa7134_dev *dev = dmaq->dev;
 121         int size = TS_PACKET_SIZE * dev->ts.nr_packets;
 122
 123         if (0 == *nbuffers)
 124                 *nbuffers = dev->ts.nr_bufs;
 125         *nbuffers = saa7134_buffer_count(size, *nbuffers);
 126         if (*nbuffers < 3)
 127                 *nbuffers = 3;
 128         *nplanes = 1;
 129         sizes[0] = size;
 130         alloc_ctxs[0] = dev->alloc_ctx;
 131         return 0;
 132 }
 133 EXPORT_SYMBOL_GPL(saa7134_ts_queue_setup);
 134
 135 int saa7134_ts_start_streaming(struct vb2_queue *vq, unsigned int count)
 136 {
 137         struct saa7134_dmaqueue *dmaq = vq->drv_priv;
 138         struct saa7134_dev *dev = dmaq->dev;
 139
 140         /*
 141          * Planar video capture and TS share the same DMA channel,
 142          * so only one can be active at a time.
 143          */
 144         if (vb2_is_busy(&dev->video_vbq) && dev->fmt->planar) {
 145                 struct saa7134_buf *buf, *tmp;
 146
 147                 list_for_each_entry_safe(buf, tmp, &dmaq->queue, entry) {
 148                         list_del(&buf->entry);
 149                         vb2_buffer_done(&buf->vb2, VB2_BUF_STATE_QUEUED);
 150                 }
 151                 if (dmaq->curr) {
 152                         vb2_buffer_done(&dmaq->curr->vb2, VB2_BUF_STATE_QUEUED);
 153                         dmaq->curr = NULL;
 154                 }
 155                 return -EBUSY;
 156         }
 157         dmaq->seq_nr = 0;
 158         return 0;
 159 }
 160 EXPORT_SYMBOL_GPL(saa7134_ts_start_streaming);
 161
 162 void saa7134_ts_stop_streaming(struct vb2_queue *vq)
 163 {
 164         struct saa7134_dmaqueue *dmaq = vq->drv_priv;
 165         struct saa7134_dev *dev = dmaq->dev;
 166
 167         saa7134_ts_stop(dev);
 168         saa7134_stop_streaming(dev, dmaq);
 169 }
 170 EXPORT_SYMBOL_GPL(saa7134_ts_stop_streaming);
 171
 172 struct vb2_ops saa7134_ts_qops = {
 173         .queue_setup    = saa7134_ts_queue_setup,
 174         .buf_init       = saa7134_ts_buffer_init,
 175         .buf_prepare    = saa7134_ts_buffer_prepare,
 176         .buf_queue      = saa7134_vb2_buffer_queue,
 177         .wait_prepare   = vb2_ops_wait_prepare,
 178         .wait_finish    = vb2_ops_wait_finish,
 179         .stop_streaming = saa7134_ts_stop_streaming,
 180 };
 181 EXPORT_SYMBOL_GPL(saa7134_ts_qops);
 182
 183 /* ----------------------------------------------------------- */
 184 /* exported stuff                                              */
 185
 186 static unsigned int tsbufs = 8;
 187 module_param(tsbufs, int, 0444);
 188 MODULE_PARM_DESC(tsbufs, "number of ts buffers for read/write IO, range 2-32");
 189
 190 static unsigned int ts_nr_packets = 64;
 191 module_param(ts_nr_packets, int, 0444);
 192 MODULE_PARM_DESC(ts_nr_packets,"size of a ts buffers (in ts packets)");
 193
 194 int saa7134_ts_init_hw(struct saa7134_dev *dev)
 195 {
 196         /* deactivate TS softreset */
 197         saa_writeb(SAA7134_TS_SERIAL1, 0x00);
 198         /* TSSOP high active, TSVAL high active, TSLOCK ignored */
 199         saa_writeb(SAA7134_TS_PARALLEL, 0x6c);
 200         saa_writeb(SAA7134_TS_PARALLEL_SERIAL, (TS_PACKET_SIZE-1));
 201         saa_writeb(SAA7134_TS_DMA0, ((dev->ts.nr_packets-1)&0xff));
 202         saa_writeb(SAA7134_TS_DMA1, (((dev->ts.nr_packets-1)>>8)&0xff));
 203         /* TSNOPIT=0, TSCOLAP=0 */
 204         saa_writeb(SAA7134_TS_DMA2,
 205                 ((((dev->ts.nr_packets-1)>>16)&0x3f) | 0x00));
 206
 207         return 0;
 208 }
 209
 210 int saa7134_ts_init1(struct saa7134_dev *dev)
 211 {
 212         /* sanitycheck insmod options */
 213         if (tsbufs < 2)
 214                 tsbufs = 2;
 215         if (tsbufs > VIDEO_MAX_FRAME)
 216                 tsbufs = VIDEO_MAX_FRAME;
 217         if (ts_nr_packets < 4)
 218                 ts_nr_packets = 4;
 219         if (ts_nr_packets > 312)
 220                 ts_nr_packets = 312;
 221         dev->ts.nr_bufs    = tsbufs;
 222         dev->ts.nr_packets = ts_nr_packets;
 223
 224         INIT_LIST_HEAD(&dev->ts_q.queue);
 225         init_timer(&dev->ts_q.timeout);
 226         dev->ts_q.timeout.function = saa7134_buffer_timeout;
 227         dev->ts_q.timeout.data     = (unsigned long)(&dev->ts_q);
 228         dev->ts_q.dev              = dev;
 229         dev->ts_q.need_two         = 1;
 230         dev->ts_started            = 0;
 231         saa7134_pgtable_alloc(dev->pci, &dev->ts_q.pt);
 232
 233         /* init TS hw */
 234         saa7134_ts_init_hw(dev);
 235
 236         return 0;
 237 }
 238
 239 /* Function for stop TS */
 240 int saa7134_ts_stop(struct saa7134_dev *dev)
 241 {
 242         dprintk("TS stop\n");
 243
 244         if (!dev->ts_started)
 245                 return 0;
 246
 247         /* Stop TS stream */
 248         switch (saa7134_boards[dev->board].ts_type) {
 249         case SAA7134_MPEG_TS_PARALLEL:
 250                 saa_writeb(SAA7134_TS_PARALLEL, 0x6c);
 251                 dev->ts_started = 0;
 252                 break;
 253         case SAA7134_MPEG_TS_SERIAL:
 254                 saa_writeb(SAA7134_TS_SERIAL0, 0x40);
 255                 dev->ts_started = 0;
 256                 break;
 257         }
 258         return 0;
 259 }
 260
 261 /* Function for start TS */
 262 int saa7134_ts_start(struct saa7134_dev *dev)
 263 {
 264         dprintk("TS start\n");
 265
 266         if (WARN_ON(dev->ts_started))
 267                 return 0;
 268
 269         /* dma: setup channel 5 (= TS) */
 270         saa_writeb(SAA7134_TS_DMA0, (dev->ts.nr_packets - 1) & 0xff);
 271         saa_writeb(SAA7134_TS_DMA1,
 272                 ((dev->ts.nr_packets - 1) >> 8) & 0xff);
 273         /* TSNOPIT=0, TSCOLAP=0 */
 274         saa_writeb(SAA7134_TS_DMA2,
 275                 (((dev->ts.nr_packets - 1) >> 16) & 0x3f) | 0x00);
 276         saa_writel(SAA7134_RS_PITCH(5), TS_PACKET_SIZE);
 277         saa_writel(SAA7134_RS_CONTROL(5), SAA7134_RS_CONTROL_BURST_16 |
 278                                           SAA7134_RS_CONTROL_ME |
 279                                           (dev->ts_q.pt.dma >> 12));
 280
 281         /* reset hardware TS buffers */
 282         saa_writeb(SAA7134_TS_SERIAL1, 0x00);
 283         saa_writeb(SAA7134_TS_SERIAL1, 0x03);
 284         saa_writeb(SAA7134_TS_SERIAL1, 0x00);
 285         saa_writeb(SAA7134_TS_SERIAL1, 0x01);
 286
 287         /* TS clock non-inverted */
 288         saa_writeb(SAA7134_TS_SERIAL1, 0x00);
 289
 290         /* Start TS stream */
 291         switch (saa7134_boards[dev->board].ts_type) {
 292         case SAA7134_MPEG_TS_PARALLEL:
 293                 saa_writeb(SAA7134_TS_SERIAL0, 0x40);
 294                 saa_writeb(SAA7134_TS_PARALLEL, 0xec |
 295                         (saa7134_boards[dev->board].ts_force_val << 4));
 296                 break;
 297         case SAA7134_MPEG_TS_SERIAL:
 298                 saa_writeb(SAA7134_TS_SERIAL0, 0xd8);
 299                 saa_writeb(SAA7134_TS_PARALLEL, 0x6c |
 300                         (saa7134_boards[dev->board].ts_force_val << 4));
 301                 saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc);
 302                 saa_writeb(SAA7134_TS_SERIAL1, 0x02);
 303                 break;
 304         }
 305
 306         dev->ts_started = 1;
 307
 308         return 0;
 309 }
 310
 311 int saa7134_ts_fini(struct saa7134_dev *dev)
 312 {
 313         saa7134_pgtable_free(dev->pci, &dev->ts_q.pt);
 314         return 0;
 315 }
 316
 317 void saa7134_irq_ts_done(struct saa7134_dev *dev, unsigned long status)
 318 {
 319         enum v4l2_field field;
 320
 321         spin_lock(&dev->slock);
 322         if (dev->ts_q.curr) {
 323                 field = dev->ts_field;
 324                 if (field != V4L2_FIELD_TOP) {
 325                         if ((status & 0x100000) != 0x000000)
 326                                 goto done;
 327                 } else {
 328                         if ((status & 0x100000) != 0x100000)
 329                                 goto done;
 330                 }
 331                 saa7134_buffer_finish(dev, &dev->ts_q, VB2_BUF_STATE_DONE);
 332         }
 333         saa7134_buffer_next(dev,&dev->ts_q);
 334
 335  done:
 336         spin_unlock(&dev->slock);
 337 }