kernel/drivers/media/dvb-frontends/stv090x.c

   1 /*
   2         STV0900/0903 Multistandard Broadcast Frontend driver
   3         Copyright (C) Manu Abraham <abraham.manu@gmail.com>
   4
   5         Copyright (C) ST Microelectronics
   6
   7         This program is free software; you can redistribute it and/or modify
   8         it under the terms of the GNU General Public License as published by
   9         the Free Software Foundation; either version 2 of the License, or
  10         (at your option) any later version.
  11
  12         This program is distributed in the hope that it will be useful,
  13         but WITHOUT ANY WARRANTY; without even the implied warranty of
  14         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15         GNU General Public License for more details.
  16
  17         You should have received a copy of the GNU General Public License
  18         along with this program; if not, write to the Free Software
  19         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20 */
  21
  22 #include <linux/init.h>
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/string.h>
  26 #include <linux/slab.h>
  27 #include <linux/mutex.h>
  28
  29 #include <linux/dvb/frontend.h>
  30 #include "dvb_frontend.h"
  31
  32 #include "stv6110x.h" /* for demodulator internal modes */
  33
  34 #include "stv090x_reg.h"
  35 #include "stv090x.h"
  36 #include "stv090x_priv.h"
  37
  38 /* Max transfer size done by I2C transfer functions */
  39 #define MAX_XFER_SIZE  64
  40
  41 static unsigned int verbose;
  42 module_param(verbose, int, 0644);
  43
  44 /* internal params node */
  45 struct stv090x_dev {
  46         /* pointer for internal params, one for each pair of demods */
  47         struct stv090x_internal         *internal;
  48         struct stv090x_dev              *next_dev;
  49 };
  50
  51 /* first internal params */
  52 static struct stv090x_dev *stv090x_first_dev;
  53
  54 /* find chip by i2c adapter and i2c address */
  55 static struct stv090x_dev *find_dev(struct i2c_adapter *i2c_adap,
  56                                         u8 i2c_addr)
  57 {
  58         struct stv090x_dev *temp_dev = stv090x_first_dev;
  59
  60         /*
  61          Search of the last stv0900 chip or
  62          find it by i2c adapter and i2c address */
  63         while ((temp_dev != NULL) &&
  64                 ((temp_dev->internal->i2c_adap != i2c_adap) ||
  65                 (temp_dev->internal->i2c_addr != i2c_addr))) {
  66
  67                 temp_dev = temp_dev->next_dev;
  68         }
  69
  70         return temp_dev;
  71 }
  72
  73 /* deallocating chip */
  74 static void remove_dev(struct stv090x_internal *internal)
  75 {
  76         struct stv090x_dev *prev_dev = stv090x_first_dev;
  77         struct stv090x_dev *del_dev = find_dev(internal->i2c_adap,
  78                                                 internal->i2c_addr);
  79
  80         if (del_dev != NULL) {
  81                 if (del_dev == stv090x_first_dev) {
  82                         stv090x_first_dev = del_dev->next_dev;
  83                 } else {
  84                         while (prev_dev->next_dev != del_dev)
  85                                 prev_dev = prev_dev->next_dev;
  86
  87                         prev_dev->next_dev = del_dev->next_dev;
  88                 }
  89
  90                 kfree(del_dev);
  91         }
  92 }
  93
  94 /* allocating new chip */
  95 static struct stv090x_dev *append_internal(struct stv090x_internal *internal)
  96 {
  97         struct stv090x_dev *new_dev;
  98         struct stv090x_dev *temp_dev;
  99
 100         new_dev = kmalloc(sizeof(struct stv090x_dev), GFP_KERNEL);
 101         if (new_dev != NULL) {
 102                 new_dev->internal = internal;
 103                 new_dev->next_dev = NULL;
 104
 105                 /* append to list */
 106                 if (stv090x_first_dev == NULL) {
 107                         stv090x_first_dev = new_dev;
 108                 } else {
 109                         temp_dev = stv090x_first_dev;
 110                         while (temp_dev->next_dev != NULL)
 111                                 temp_dev = temp_dev->next_dev;
 112
 113                         temp_dev->next_dev = new_dev;
 114                 }
 115         }
 116
 117         return new_dev;
 118 }
 119
 120
 121 /* DVBS1 and DSS C/N Lookup table */
 122 static const struct stv090x_tab stv090x_s1cn_tab[] = {
 123         {   0, 8917 }, /*  0.0dB */
 124         {   5, 8801 }, /*  0.5dB */
 125         {  10, 8667 }, /*  1.0dB */
 126         {  15, 8522 }, /*  1.5dB */
 127         {  20, 8355 }, /*  2.0dB */
 128         {  25, 8175 }, /*  2.5dB */
 129         {  30, 7979 }, /*  3.0dB */
 130         {  35, 7763 }, /*  3.5dB */
 131         {  40, 7530 }, /*  4.0dB */
 132         {  45, 7282 }, /*  4.5dB */
 133         {  50, 7026 }, /*  5.0dB */
 134         {  55, 6781 }, /*  5.5dB */
 135         {  60, 6514 }, /*  6.0dB */
 136         {  65, 6241 }, /*  6.5dB */
 137         {  70, 5965 }, /*  7.0dB */
 138         {  75, 5690 }, /*  7.5dB */
 139         {  80, 5424 }, /*  8.0dB */
 140         {  85, 5161 }, /*  8.5dB */
 141         {  90, 4902 }, /*  9.0dB */
 142         {  95, 4654 }, /*  9.5dB */
 143         { 100, 4417 }, /* 10.0dB */
 144         { 105, 4186 }, /* 10.5dB */
 145         { 110, 3968 }, /* 11.0dB */
 146         { 115, 3757 }, /* 11.5dB */
 147         { 120, 3558 }, /* 12.0dB */
 148         { 125, 3366 }, /* 12.5dB */
 149         { 130, 3185 }, /* 13.0dB */
 150         { 135, 3012 }, /* 13.5dB */
 151         { 140, 2850 }, /* 14.0dB */
 152         { 145, 2698 }, /* 14.5dB */
 153         { 150, 2550 }, /* 15.0dB */
 154         { 160, 2283 }, /* 16.0dB */
 155         { 170, 2042 }, /* 17.0dB */
 156         { 180, 1827 }, /* 18.0dB */
 157         { 190, 1636 }, /* 19.0dB */
 158         { 200, 1466 }, /* 20.0dB */
 159         { 210, 1315 }, /* 21.0dB */
 160         { 220, 1181 }, /* 22.0dB */
 161         { 230, 1064 }, /* 23.0dB */
 162         { 240,  960 }, /* 24.0dB */
 163         { 250,  869 }, /* 25.0dB */
 164         { 260,  792 }, /* 26.0dB */
 165         { 270,  724 }, /* 27.0dB */
 166         { 280,  665 }, /* 28.0dB */
 167         { 290,  616 }, /* 29.0dB */
 168         { 300,  573 }, /* 30.0dB */
 169         { 310,  537 }, /* 31.0dB */
 170         { 320,  507 }, /* 32.0dB */
 171         { 330,  483 }, /* 33.0dB */
 172         { 400,  398 }, /* 40.0dB */
 173         { 450,  381 }, /* 45.0dB */
 174         { 500,  377 }  /* 50.0dB */
 175 };
 176
 177 /* DVBS2 C/N Lookup table */
 178 static const struct stv090x_tab stv090x_s2cn_tab[] = {
 179         { -30, 13348 }, /* -3.0dB */
 180         { -20, 12640 }, /* -2d.0B */
 181         { -10, 11883 }, /* -1.0dB */
 182         {   0, 11101 }, /* -0.0dB */
 183         {   5, 10718 }, /*  0.5dB */
 184         {  10, 10339 }, /*  1.0dB */
 185         {  15,  9947 }, /*  1.5dB */
 186         {  20,  9552 }, /*  2.0dB */
 187         {  25,  9183 }, /*  2.5dB */
 188         {  30,  8799 }, /*  3.0dB */
 189         {  35,  8422 }, /*  3.5dB */
 190         {  40,  8062 }, /*  4.0dB */
 191         {  45,  7707 }, /*  4.5dB */
 192         {  50,  7353 }, /*  5.0dB */
 193         {  55,  7025 }, /*  5.5dB */
 194         {  60,  6684 }, /*  6.0dB */
 195         {  65,  6331 }, /*  6.5dB */
 196         {  70,  6036 }, /*  7.0dB */
 197         {  75,  5727 }, /*  7.5dB */
 198         {  80,  5437 }, /*  8.0dB */
 199         {  85,  5164 }, /*  8.5dB */
 200         {  90,  4902 }, /*  9.0dB */
 201         {  95,  4653 }, /*  9.5dB */
 202         { 100,  4408 }, /* 10.0dB */
 203         { 105,  4187 }, /* 10.5dB */
 204         { 110,  3961 }, /* 11.0dB */
 205         { 115,  3751 }, /* 11.5dB */
 206         { 120,  3558 }, /* 12.0dB */
 207         { 125,  3368 }, /* 12.5dB */
 208         { 130,  3191 }, /* 13.0dB */
 209         { 135,  3017 }, /* 13.5dB */
 210         { 140,  2862 }, /* 14.0dB */
 211         { 145,  2710 }, /* 14.5dB */
 212         { 150,  2565 }, /* 15.0dB */
 213         { 160,  2300 }, /* 16.0dB */
 214         { 170,  2058 }, /* 17.0dB */
 215         { 180,  1849 }, /* 18.0dB */
 216         { 190,  1663 }, /* 19.0dB */
 217         { 200,  1495 }, /* 20.0dB */
 218         { 210,  1349 }, /* 21.0dB */
 219         { 220,  1222 }, /* 22.0dB */
 220         { 230,  1110 }, /* 23.0dB */
 221         { 240,  1011 }, /* 24.0dB */
 222         { 250,   925 }, /* 25.0dB */
 223         { 260,   853 }, /* 26.0dB */
 224         { 270,   789 }, /* 27.0dB */
 225         { 280,   734 }, /* 28.0dB */
 226         { 290,   690 }, /* 29.0dB */
 227         { 300,   650 }, /* 30.0dB */
 228         { 310,   619 }, /* 31.0dB */
 229         { 320,   593 }, /* 32.0dB */
 230         { 330,   571 }, /* 33.0dB */
 231         { 400,   498 }, /* 40.0dB */
 232         { 450,   484 }, /* 45.0dB */
 233         { 500,   481 }  /* 50.0dB */
 234 };
 235
 236 /* RF level C/N lookup table */
 237 static const struct stv090x_tab stv090x_rf_tab[] = {
 238         {  -5, 0xcaa1 }, /*  -5dBm */
 239         { -10, 0xc229 }, /* -10dBm */
 240         { -15, 0xbb08 }, /* -15dBm */
 241         { -20, 0xb4bc }, /* -20dBm */
 242         { -25, 0xad5a }, /* -25dBm */
 243         { -30, 0xa298 }, /* -30dBm */
 244         { -35, 0x98a8 }, /* -35dBm */
 245         { -40, 0x8389 }, /* -40dBm */
 246         { -45, 0x59be }, /* -45dBm */
 247         { -50, 0x3a14 }, /* -50dBm */
 248         { -55, 0x2d11 }, /* -55dBm */
 249         { -60, 0x210d }, /* -60dBm */
 250         { -65, 0xa14f }, /* -65dBm */
 251         { -70, 0x07aa }  /* -70dBm */
 252 };
 253
 254
 255 static struct stv090x_reg stv0900_initval[] = {
 256
 257         { STV090x_OUTCFG,               0x00 },
 258         { STV090x_MODECFG,              0xff },
 259         { STV090x_AGCRF1CFG,            0x11 },
 260         { STV090x_AGCRF2CFG,            0x13 },
 261         { STV090x_TSGENERAL1X,          0x14 },
 262         { STV090x_TSTTNR2,              0x21 },
 263         { STV090x_TSTTNR4,              0x21 },
 264         { STV090x_P2_DISTXCTL,          0x22 },
 265         { STV090x_P2_F22TX,             0xc0 },
 266         { STV090x_P2_F22RX,             0xc0 },
 267         { STV090x_P2_DISRXCTL,          0x00 },
 268         { STV090x_P2_DMDCFGMD,          0xF9 },
 269         { STV090x_P2_DEMOD,             0x08 },
 270         { STV090x_P2_DMDCFG3,           0xc4 },
 271         { STV090x_P2_CARFREQ,           0xed },
 272         { STV090x_P2_LDT,               0xd0 },
 273         { STV090x_P2_LDT2,              0xb8 },
 274         { STV090x_P2_TMGCFG,            0xd2 },
 275         { STV090x_P2_TMGTHRISE,         0x20 },
 276         { STV090x_P1_TMGCFG,            0xd2 },
 277
 278         { STV090x_P2_TMGTHFALL,         0x00 },
 279         { STV090x_P2_FECSPY,            0x88 },
 280         { STV090x_P2_FSPYDATA,          0x3a },
 281         { STV090x_P2_FBERCPT4,          0x00 },
 282         { STV090x_P2_FSPYBER,           0x10 },
 283         { STV090x_P2_ERRCTRL1,          0x35 },
 284         { STV090x_P2_ERRCTRL2,          0xc1 },
 285         { STV090x_P2_CFRICFG,           0xf8 },
 286         { STV090x_P2_NOSCFG,            0x1c },
 287         { STV090x_P2_DMDTOM,            0x20 },
 288         { STV090x_P2_CORRELMANT,        0x70 },
 289         { STV090x_P2_CORRELABS,         0x88 },
 290         { STV090x_P2_AGC2O,             0x5b },
 291         { STV090x_P2_AGC2REF,           0x38 },
 292         { STV090x_P2_CARCFG,            0xe4 },
 293         { STV090x_P2_ACLC,              0x1A },
 294         { STV090x_P2_BCLC,              0x09 },
 295         { STV090x_P2_CARHDR,            0x08 },
 296         { STV090x_P2_KREFTMG,           0xc1 },
 297         { STV090x_P2_SFRUPRATIO,        0xf0 },
 298         { STV090x_P2_SFRLOWRATIO,       0x70 },
 299         { STV090x_P2_SFRSTEP,           0x58 },
 300         { STV090x_P2_TMGCFG2,           0x01 },
 301         { STV090x_P2_CAR2CFG,           0x26 },
 302         { STV090x_P2_BCLC2S2Q,          0x86 },
 303         { STV090x_P2_BCLC2S28,          0x86 },
 304         { STV090x_P2_SMAPCOEF7,         0x77 },
 305         { STV090x_P2_SMAPCOEF6,         0x85 },
 306         { STV090x_P2_SMAPCOEF5,         0x77 },
 307         { STV090x_P2_TSCFGL,            0x20 },
 308         { STV090x_P2_DMDCFG2,           0x3b },
 309         { STV090x_P2_MODCODLST0,        0xff },
 310         { STV090x_P2_MODCODLST1,        0xff },
 311         { STV090x_P2_MODCODLST2,        0xff },
 312         { STV090x_P2_MODCODLST3,        0xff },
 313         { STV090x_P2_MODCODLST4,        0xff },
 314         { STV090x_P2_MODCODLST5,        0xff },
 315         { STV090x_P2_MODCODLST6,        0xff },
 316         { STV090x_P2_MODCODLST7,        0xcc },
 317         { STV090x_P2_MODCODLST8,        0xcc },
 318         { STV090x_P2_MODCODLST9,        0xcc },
 319         { STV090x_P2_MODCODLSTA,        0xcc },
 320         { STV090x_P2_MODCODLSTB,        0xcc },
 321         { STV090x_P2_MODCODLSTC,        0xcc },
 322         { STV090x_P2_MODCODLSTD,        0xcc },
 323         { STV090x_P2_MODCODLSTE,        0xcc },
 324         { STV090x_P2_MODCODLSTF,        0xcf },
 325         { STV090x_P1_DISTXCTL,          0x22 },
 326         { STV090x_P1_F22TX,             0xc0 },
 327         { STV090x_P1_F22RX,             0xc0 },
 328         { STV090x_P1_DISRXCTL,          0x00 },
 329         { STV090x_P1_DMDCFGMD,          0xf9 },
 330         { STV090x_P1_DEMOD,             0x08 },
 331         { STV090x_P1_DMDCFG3,           0xc4 },
 332         { STV090x_P1_DMDTOM,            0x20 },
 333         { STV090x_P1_CARFREQ,           0xed },
 334         { STV090x_P1_LDT,               0xd0 },
 335         { STV090x_P1_LDT2,              0xb8 },
 336         { STV090x_P1_TMGCFG,            0xd2 },
 337         { STV090x_P1_TMGTHRISE,         0x20 },
 338         { STV090x_P1_TMGTHFALL,         0x00 },
 339         { STV090x_P1_SFRUPRATIO,        0xf0 },
 340         { STV090x_P1_SFRLOWRATIO,       0x70 },
 341         { STV090x_P1_TSCFGL,            0x20 },
 342         { STV090x_P1_FECSPY,            0x88 },
 343         { STV090x_P1_FSPYDATA,          0x3a },
 344         { STV090x_P1_FBERCPT4,          0x00 },
 345         { STV090x_P1_FSPYBER,           0x10 },
 346         { STV090x_P1_ERRCTRL1,          0x35 },
 347         { STV090x_P1_ERRCTRL2,          0xc1 },
 348         { STV090x_P1_CFRICFG,           0xf8 },
 349         { STV090x_P1_NOSCFG,            0x1c },
 350         { STV090x_P1_CORRELMANT,        0x70 },
 351         { STV090x_P1_CORRELABS,         0x88 },
 352         { STV090x_P1_AGC2O,             0x5b },
 353         { STV090x_P1_AGC2REF,           0x38 },
 354         { STV090x_P1_CARCFG,            0xe4 },
 355         { STV090x_P1_ACLC,              0x1A },
 356         { STV090x_P1_BCLC,              0x09 },
 357         { STV090x_P1_CARHDR,            0x08 },
 358         { STV090x_P1_KREFTMG,           0xc1 },
 359         { STV090x_P1_SFRSTEP,           0x58 },
 360         { STV090x_P1_TMGCFG2,           0x01 },
 361         { STV090x_P1_CAR2CFG,           0x26 },
 362         { STV090x_P1_BCLC2S2Q,          0x86 },
 363         { STV090x_P1_BCLC2S28,          0x86 },
 364         { STV090x_P1_SMAPCOEF7,         0x77 },
 365         { STV090x_P1_SMAPCOEF6,         0x85 },
 366         { STV090x_P1_SMAPCOEF5,         0x77 },
 367         { STV090x_P1_DMDCFG2,           0x3b },
 368         { STV090x_P1_MODCODLST0,        0xff },
 369         { STV090x_P1_MODCODLST1,        0xff },
 370         { STV090x_P1_MODCODLST2,        0xff },
 371         { STV090x_P1_MODCODLST3,        0xff },
 372         { STV090x_P1_MODCODLST4,        0xff },
 373         { STV090x_P1_MODCODLST5,        0xff },
 374         { STV090x_P1_MODCODLST6,        0xff },
 375         { STV090x_P1_MODCODLST7,        0xcc },
 376         { STV090x_P1_MODCODLST8,        0xcc },
 377         { STV090x_P1_MODCODLST9,        0xcc },
 378         { STV090x_P1_MODCODLSTA,        0xcc },
 379         { STV090x_P1_MODCODLSTB,        0xcc },
 380         { STV090x_P1_MODCODLSTC,        0xcc },
 381         { STV090x_P1_MODCODLSTD,        0xcc },
 382         { STV090x_P1_MODCODLSTE,        0xcc },
 383         { STV090x_P1_MODCODLSTF,        0xcf },
 384         { STV090x_GENCFG,               0x1d },
 385         { STV090x_NBITER_NF4,           0x37 },
 386         { STV090x_NBITER_NF5,           0x29 },
 387         { STV090x_NBITER_NF6,           0x37 },
 388         { STV090x_NBITER_NF7,           0x33 },
 389         { STV090x_NBITER_NF8,           0x31 },
 390         { STV090x_NBITER_NF9,           0x2f },
 391         { STV090x_NBITER_NF10,          0x39 },
 392         { STV090x_NBITER_NF11,          0x3a },
 393         { STV090x_NBITER_NF12,          0x29 },
 394         { STV090x_NBITER_NF13,          0x37 },
 395         { STV090x_NBITER_NF14,          0x33 },
 396         { STV090x_NBITER_NF15,          0x2f },
 397         { STV090x_NBITER_NF16,          0x39 },
 398         { STV090x_NBITER_NF17,          0x3a },
 399         { STV090x_NBITERNOERR,          0x04 },
 400         { STV090x_GAINLLR_NF4,          0x0C },
 401         { STV090x_GAINLLR_NF5,          0x0F },
 402         { STV090x_GAINLLR_NF6,          0x11 },
 403         { STV090x_GAINLLR_NF7,          0x14 },
 404         { STV090x_GAINLLR_NF8,          0x17 },
 405         { STV090x_GAINLLR_NF9,          0x19 },
 406         { STV090x_GAINLLR_NF10,         0x20 },
 407         { STV090x_GAINLLR_NF11,         0x21 },
 408         { STV090x_GAINLLR_NF12,         0x0D },
 409         { STV090x_GAINLLR_NF13,         0x0F },
 410         { STV090x_GAINLLR_NF14,         0x13 },
 411         { STV090x_GAINLLR_NF15,         0x1A },
 412         { STV090x_GAINLLR_NF16,         0x1F },
 413         { STV090x_GAINLLR_NF17,         0x21 },
 414         { STV090x_RCCFGH,               0x20 },
 415         { STV090x_P1_FECM,              0x01 }, /* disable DSS modes */
 416         { STV090x_P2_FECM,              0x01 }, /* disable DSS modes */
 417         { STV090x_P1_PRVIT,             0x2F }, /* disable PR 6/7 */
 418         { STV090x_P2_PRVIT,             0x2F }, /* disable PR 6/7 */
 419 };
 420
 421 static struct stv090x_reg stv0903_initval[] = {
 422         { STV090x_OUTCFG,               0x00 },
 423         { STV090x_AGCRF1CFG,            0x11 },
 424         { STV090x_STOPCLK1,             0x48 },
 425         { STV090x_STOPCLK2,             0x14 },
 426         { STV090x_TSTTNR1,              0x27 },
 427         { STV090x_TSTTNR2,              0x21 },
 428         { STV090x_P1_DISTXCTL,          0x22 },
 429         { STV090x_P1_F22TX,             0xc0 },
 430         { STV090x_P1_F22RX,             0xc0 },
 431         { STV090x_P1_DISRXCTL,          0x00 },
 432         { STV090x_P1_DMDCFGMD,          0xF9 },
 433         { STV090x_P1_DEMOD,             0x08 },
 434         { STV090x_P1_DMDCFG3,           0xc4 },
 435         { STV090x_P1_CARFREQ,           0xed },
 436         { STV090x_P1_TNRCFG2,           0x82 },
 437         { STV090x_P1_LDT,               0xd0 },
 438         { STV090x_P1_LDT2,              0xb8 },
 439         { STV090x_P1_TMGCFG,            0xd2 },
 440         { STV090x_P1_TMGTHRISE,         0x20 },
 441         { STV090x_P1_TMGTHFALL,         0x00 },
 442         { STV090x_P1_SFRUPRATIO,        0xf0 },
 443         { STV090x_P1_SFRLOWRATIO,       0x70 },
 444         { STV090x_P1_TSCFGL,            0x20 },
 445         { STV090x_P1_FECSPY,            0x88 },
 446         { STV090x_P1_FSPYDATA,          0x3a },
 447         { STV090x_P1_FBERCPT4,          0x00 },
 448         { STV090x_P1_FSPYBER,           0x10 },
 449         { STV090x_P1_ERRCTRL1,          0x35 },
 450         { STV090x_P1_ERRCTRL2,          0xc1 },
 451         { STV090x_P1_CFRICFG,           0xf8 },
 452         { STV090x_P1_NOSCFG,            0x1c },
 453         { STV090x_P1_DMDTOM,            0x20 },
 454         { STV090x_P1_CORRELMANT,        0x70 },
 455         { STV090x_P1_CORRELABS,         0x88 },
 456         { STV090x_P1_AGC2O,             0x5b },
 457         { STV090x_P1_AGC2REF,           0x38 },
 458         { STV090x_P1_CARCFG,            0xe4 },
 459         { STV090x_P1_ACLC,              0x1A },
 460         { STV090x_P1_BCLC,              0x09 },
 461         { STV090x_P1_CARHDR,            0x08 },
 462         { STV090x_P1_KREFTMG,           0xc1 },
 463         { STV090x_P1_SFRSTEP,           0x58 },
 464         { STV090x_P1_TMGCFG2,           0x01 },
 465         { STV090x_P1_CAR2CFG,           0x26 },
 466         { STV090x_P1_BCLC2S2Q,          0x86 },
 467         { STV090x_P1_BCLC2S28,          0x86 },
 468         { STV090x_P1_SMAPCOEF7,         0x77 },
 469         { STV090x_P1_SMAPCOEF6,         0x85 },
 470         { STV090x_P1_SMAPCOEF5,         0x77 },
 471         { STV090x_P1_DMDCFG2,           0x3b },
 472         { STV090x_P1_MODCODLST0,        0xff },
 473         { STV090x_P1_MODCODLST1,        0xff },
 474         { STV090x_P1_MODCODLST2,        0xff },
 475         { STV090x_P1_MODCODLST3,        0xff },
 476         { STV090x_P1_MODCODLST4,        0xff },
 477         { STV090x_P1_MODCODLST5,        0xff },
 478         { STV090x_P1_MODCODLST6,        0xff },
 479         { STV090x_P1_MODCODLST7,        0xcc },
 480         { STV090x_P1_MODCODLST8,        0xcc },
 481         { STV090x_P1_MODCODLST9,        0xcc },
 482         { STV090x_P1_MODCODLSTA,        0xcc },
 483         { STV090x_P1_MODCODLSTB,        0xcc },
 484         { STV090x_P1_MODCODLSTC,        0xcc },
 485         { STV090x_P1_MODCODLSTD,        0xcc },
 486         { STV090x_P1_MODCODLSTE,        0xcc },
 487         { STV090x_P1_MODCODLSTF,        0xcf },
 488         { STV090x_GENCFG,               0x1c },
 489         { STV090x_NBITER_NF4,           0x37 },
 490         { STV090x_NBITER_NF5,           0x29 },
 491         { STV090x_NBITER_NF6,           0x37 },
 492         { STV090x_NBITER_NF7,           0x33 },
 493         { STV090x_NBITER_NF8,           0x31 },
 494         { STV090x_NBITER_NF9,           0x2f },
 495         { STV090x_NBITER_NF10,          0x39 },
 496         { STV090x_NBITER_NF11,          0x3a },
 497         { STV090x_NBITER_NF12,          0x29 },
 498         { STV090x_NBITER_NF13,          0x37 },
 499         { STV090x_NBITER_NF14,          0x33 },
 500         { STV090x_NBITER_NF15,          0x2f },
 501         { STV090x_NBITER_NF16,          0x39 },
 502         { STV090x_NBITER_NF17,          0x3a },
 503         { STV090x_NBITERNOERR,          0x04 },
 504         { STV090x_GAINLLR_NF4,          0x0C },
 505         { STV090x_GAINLLR_NF5,          0x0F },
 506         { STV090x_GAINLLR_NF6,          0x11 },
 507         { STV090x_GAINLLR_NF7,          0x14 },
 508         { STV090x_GAINLLR_NF8,          0x17 },
 509         { STV090x_GAINLLR_NF9,          0x19 },
 510         { STV090x_GAINLLR_NF10,         0x20 },
 511         { STV090x_GAINLLR_NF11,         0x21 },
 512         { STV090x_GAINLLR_NF12,         0x0D },
 513         { STV090x_GAINLLR_NF13,         0x0F },
 514         { STV090x_GAINLLR_NF14,         0x13 },
 515         { STV090x_GAINLLR_NF15,         0x1A },
 516         { STV090x_GAINLLR_NF16,         0x1F },
 517         { STV090x_GAINLLR_NF17,         0x21 },
 518         { STV090x_RCCFGH,               0x20 },
 519         { STV090x_P1_FECM,              0x01 }, /*disable the DSS mode */
 520         { STV090x_P1_PRVIT,             0x2f }  /*disable puncture rate 6/7*/
 521 };
 522
 523 static struct stv090x_reg stv0900_cut20_val[] = {
 524
 525         { STV090x_P2_DMDCFG3,           0xe8 },
 526         { STV090x_P2_DMDCFG4,           0x10 },
 527         { STV090x_P2_CARFREQ,           0x38 },
 528         { STV090x_P2_CARHDR,            0x20 },
 529         { STV090x_P2_KREFTMG,           0x5a },
 530         { STV090x_P2_SMAPCOEF7,         0x06 },
 531         { STV090x_P2_SMAPCOEF6,         0x00 },
 532         { STV090x_P2_SMAPCOEF5,         0x04 },
 533         { STV090x_P2_NOSCFG,            0x0c },
 534         { STV090x_P1_DMDCFG3,           0xe8 },
 535         { STV090x_P1_DMDCFG4,           0x10 },
 536         { STV090x_P1_CARFREQ,           0x38 },
 537         { STV090x_P1_CARHDR,            0x20 },
 538         { STV090x_P1_KREFTMG,           0x5a },
 539         { STV090x_P1_SMAPCOEF7,         0x06 },
 540         { STV090x_P1_SMAPCOEF6,         0x00 },
 541         { STV090x_P1_SMAPCOEF5,         0x04 },
 542         { STV090x_P1_NOSCFG,            0x0c },
 543         { STV090x_GAINLLR_NF4,          0x21 },
 544         { STV090x_GAINLLR_NF5,          0x21 },
 545         { STV090x_GAINLLR_NF6,          0x20 },
 546         { STV090x_GAINLLR_NF7,          0x1F },
 547         { STV090x_GAINLLR_NF8,          0x1E },
 548         { STV090x_GAINLLR_NF9,          0x1E },
 549         { STV090x_GAINLLR_NF10,         0x1D },
 550         { STV090x_GAINLLR_NF11,         0x1B },
 551         { STV090x_GAINLLR_NF12,         0x20 },
 552         { STV090x_GAINLLR_NF13,         0x20 },
 553         { STV090x_GAINLLR_NF14,         0x20 },
 554         { STV090x_GAINLLR_NF15,         0x20 },
 555         { STV090x_GAINLLR_NF16,         0x20 },
 556         { STV090x_GAINLLR_NF17,         0x21 },
 557 };
 558
 559 static struct stv090x_reg stv0903_cut20_val[] = {
 560         { STV090x_P1_DMDCFG3,           0xe8 },
 561         { STV090x_P1_DMDCFG4,           0x10 },
 562         { STV090x_P1_CARFREQ,           0x38 },
 563         { STV090x_P1_CARHDR,            0x20 },
 564         { STV090x_P1_KREFTMG,           0x5a },
 565         { STV090x_P1_SMAPCOEF7,         0x06 },
 566         { STV090x_P1_SMAPCOEF6,         0x00 },
 567         { STV090x_P1_SMAPCOEF5,         0x04 },
 568         { STV090x_P1_NOSCFG,            0x0c },
 569         { STV090x_GAINLLR_NF4,          0x21 },
 570         { STV090x_GAINLLR_NF5,          0x21 },
 571         { STV090x_GAINLLR_NF6,          0x20 },
 572         { STV090x_GAINLLR_NF7,          0x1F },
 573         { STV090x_GAINLLR_NF8,          0x1E },
 574         { STV090x_GAINLLR_NF9,          0x1E },
 575         { STV090x_GAINLLR_NF10,         0x1D },
 576         { STV090x_GAINLLR_NF11,         0x1B },
 577         { STV090x_GAINLLR_NF12,         0x20 },
 578         { STV090x_GAINLLR_NF13,         0x20 },
 579         { STV090x_GAINLLR_NF14,         0x20 },
 580         { STV090x_GAINLLR_NF15,         0x20 },
 581         { STV090x_GAINLLR_NF16,         0x20 },
 582         { STV090x_GAINLLR_NF17,         0x21 }
 583 };
 584
 585 /* Cut 2.0 Long Frame Tracking CR loop */
 586 static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
 587         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 588         { STV090x_QPSK_12,  0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
 589         { STV090x_QPSK_35,  0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
 590         { STV090x_QPSK_23,  0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
 591         { STV090x_QPSK_34,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 592         { STV090x_QPSK_45,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 593         { STV090x_QPSK_56,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 594         { STV090x_QPSK_89,  0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 595         { STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 596         { STV090x_8PSK_35,  0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
 597         { STV090x_8PSK_23,  0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
 598         { STV090x_8PSK_34,  0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
 599         { STV090x_8PSK_56,  0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
 600         { STV090x_8PSK_89,  0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
 601         { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
 602 };
 603
 604 /* Cut 3.0 Long Frame Tracking CR loop */
 605 static  struct stv090x_long_frame_crloop stv090x_s2_crl_cut30[] = {
 606         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 607         { STV090x_QPSK_12,  0x3c, 0x2c, 0x0c, 0x2c, 0x1b, 0x2c, 0x1b, 0x1c, 0x0b, 0x3b },
 608         { STV090x_QPSK_35,  0x0d, 0x0d, 0x0c, 0x0d, 0x1b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
 609         { STV090x_QPSK_23,  0x1d, 0x0d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
 610         { STV090x_QPSK_34,  0x1d, 0x1d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
 611         { STV090x_QPSK_45,  0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
 612         { STV090x_QPSK_56,  0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
 613         { STV090x_QPSK_89,  0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
 614         { STV090x_QPSK_910, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
 615         { STV090x_8PSK_35,  0x39, 0x29, 0x39, 0x19, 0x19, 0x19, 0x19, 0x19, 0x09, 0x19 },
 616         { STV090x_8PSK_23,  0x2a, 0x39, 0x1a, 0x0a, 0x39, 0x0a, 0x29, 0x39, 0x29, 0x0a },
 617         { STV090x_8PSK_34,  0x2b, 0x3a, 0x1b, 0x1b, 0x3a, 0x1b, 0x1a, 0x0b, 0x1a, 0x3a },
 618         { STV090x_8PSK_56,  0x0c, 0x1b, 0x3b, 0x3b, 0x1b, 0x3b, 0x3a, 0x3b, 0x3a, 0x1b },
 619         { STV090x_8PSK_89,  0x0d, 0x3c, 0x2c, 0x2c, 0x2b, 0x0c, 0x0b, 0x3b, 0x0b, 0x1b },
 620         { STV090x_8PSK_910, 0x0d, 0x0d, 0x2c, 0x3c, 0x3b, 0x1c, 0x0b, 0x3b, 0x0b, 0x1b }
 621 };
 622
 623 /* Cut 2.0 Long Frame Tracking CR Loop */
 624 static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
 625         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 626         { STV090x_16APSK_23,  0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
 627         { STV090x_16APSK_34,  0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
 628         { STV090x_16APSK_45,  0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
 629         { STV090x_16APSK_56,  0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
 630         { STV090x_16APSK_89,  0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
 631         { STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
 632         { STV090x_32APSK_34,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 633         { STV090x_32APSK_45,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 634         { STV090x_32APSK_56,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 635         { STV090x_32APSK_89,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 636         { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
 637 };
 638
 639 /* Cut 3.0 Long Frame Tracking CR Loop */
 640 static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut30[] = {
 641         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 642         { STV090x_16APSK_23,  0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x0a, 0x3a, 0x0a, 0x2a, 0x0a },
 643         { STV090x_16APSK_34,  0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x3b, 0x0a, 0x1b, 0x0a },
 644         { STV090x_16APSK_45,  0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
 645         { STV090x_16APSK_56,  0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
 646         { STV090x_16APSK_89,  0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
 647         { STV090x_16APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
 648         { STV090x_32APSK_34,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
 649         { STV090x_32APSK_45,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
 650         { STV090x_32APSK_56,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
 651         { STV090x_32APSK_89,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
 652         { STV090x_32APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }
 653 };
 654
 655 static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
 656         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 657         { STV090x_QPSK_14,  0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
 658         { STV090x_QPSK_13,  0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
 659         { STV090x_QPSK_25,  0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
 660 };
 661
 662 static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut30[] = {
 663         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 664         { STV090x_QPSK_14,  0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x2a, 0x1c, 0x3a, 0x3b },
 665         { STV090x_QPSK_13,  0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b },
 666         { STV090x_QPSK_25,  0x1c, 0x3c, 0x1b, 0x3c, 0x3a, 0x1c, 0x3a, 0x3b, 0x3a, 0x2b }
 667 };
 668
 669 /* Cut 2.0 Short Frame Tracking CR Loop */
 670 static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut20[] = {
 671         /* MODCOD         2M    5M    10M   20M   30M */
 672         { STV090x_QPSK,   0x2f, 0x2e, 0x0e, 0x0e, 0x3d },
 673         { STV090x_8PSK,   0x3e, 0x0e, 0x2d, 0x0d, 0x3c },
 674         { STV090x_16APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d },
 675         { STV090x_32APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d }
 676 };
 677
 678 /* Cut 3.0 Short Frame Tracking CR Loop */
 679 static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut30[] = {
 680         /* MODCOD         2M    5M    10M   20M   30M */
 681         { STV090x_QPSK,   0x2C, 0x2B, 0x0B, 0x0B, 0x3A },
 682         { STV090x_8PSK,   0x3B, 0x0B, 0x2A, 0x0A, 0x39 },
 683         { STV090x_16APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A },
 684         { STV090x_32APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A }
 685 };
 686
 687 static inline s32 comp2(s32 __x, s32 __width)
 688 {
 689         if (__width == 32)
 690                 return __x;
 691         else
 692                 return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
 693 }
 694
 695 static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
 696 {
 697         const struct stv090x_config *config = state->config;
 698         int ret;
 699
 700         u8 b0[] = { reg >> 8, reg & 0xff };
 701         u8 buf;
 702
 703         struct i2c_msg msg[] = {
 704                 { .addr = config->address, .flags       = 0,            .buf = b0,   .len = 2 },
 705                 { .addr = config->address, .flags       = I2C_M_RD,     .buf = &buf, .len = 1 }
 706         };
 707
 708         ret = i2c_transfer(state->i2c, msg, 2);
 709         if (ret != 2) {
 710                 if (ret != -ERESTARTSYS)
 711                         dprintk(FE_ERROR, 1,
 712                                 "Read error, Reg=[0x%02x], Status=%d",
 713                                 reg, ret);
 714
 715                 return ret < 0 ? ret : -EREMOTEIO;
 716         }
 717         if (unlikely(*state->verbose >= FE_DEBUGREG))
 718                 dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
 719                         reg, buf);
 720
 721         return (unsigned int) buf;
 722 }
 723
 724 static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
 725 {
 726         const struct stv090x_config *config = state->config;
 727         int ret;
 728         u8 buf[MAX_XFER_SIZE];
 729         struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
 730
 731         if (2 + count > sizeof(buf)) {
 732                 printk(KERN_WARNING
 733                        "%s: i2c wr reg=%04x: len=%d is too big!\n",
 734                        KBUILD_MODNAME, reg, count);
 735                 return -EINVAL;
 736         }
 737
 738         buf[0] = reg >> 8;
 739         buf[1] = reg & 0xff;
 740         memcpy(&buf[2], data, count);
 741
 742         if (unlikely(*state->verbose >= FE_DEBUGREG)) {
 743                 int i;
 744
 745                 printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg);
 746                 for (i = 0; i < count; i++)
 747                         printk(" %02x", data[i]);
 748                 printk("\n");
 749         }
 750
 751         ret = i2c_transfer(state->i2c, &i2c_msg, 1);
 752         if (ret != 1) {
 753                 if (ret != -ERESTARTSYS)
 754                         dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
 755                                 reg, data[0], count, ret);
 756                 return ret < 0 ? ret : -EREMOTEIO;
 757         }
 758
 759         return 0;
 760 }
 761
 762 static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
 763 {
 764         return stv090x_write_regs(state, reg, &data, 1);
 765 }
 766
 767 static int stv090x_i2c_gate_ctrl(struct stv090x_state *state, int enable)
 768 {
 769         u32 reg;
 770
 771         /*
 772          * NOTE! A lock is used as a FSM to control the state in which
 773          * access is serialized between two tuners on the same demod.
 774          * This has nothing to do with a lock to protect a critical section
 775          * which may in some other cases be confused with protecting I/O
 776          * access to the demodulator gate.
 777          * In case of any error, the lock is unlocked and exit within the
 778          * relevant operations themselves.
 779          */
 780         if (enable) {
 781                 if (state->config->tuner_i2c_lock)
 782                         state->config->tuner_i2c_lock(&state->frontend, 1);
 783                 else
 784                         mutex_lock(&state->internal->tuner_lock);
 785         }
 786
 787         reg = STV090x_READ_DEMOD(state, I2CRPT);
 788         if (enable) {
 789                 dprintk(FE_DEBUG, 1, "Enable Gate");
 790                 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
 791                 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
 792                         goto err;
 793
 794         } else {
 795                 dprintk(FE_DEBUG, 1, "Disable Gate");
 796                 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
 797                 if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
 798                         goto err;
 799         }
 800
 801         if (!enable) {
 802                 if (state->config->tuner_i2c_lock)
 803                         state->config->tuner_i2c_lock(&state->frontend, 0);
 804                 else
 805                         mutex_unlock(&state->internal->tuner_lock);
 806         }
 807
 808         return 0;
 809 err:
 810         dprintk(FE_ERROR, 1, "I/O error");
 811         if (state->config->tuner_i2c_lock)
 812                 state->config->tuner_i2c_lock(&state->frontend, 0);
 813         else
 814                 mutex_unlock(&state->internal->tuner_lock);
 815         return -1;
 816 }
 817
 818 static void stv090x_get_lock_tmg(struct stv090x_state *state)
 819 {
 820         switch (state->algo) {
 821         case STV090x_BLIND_SEARCH:
 822                 dprintk(FE_DEBUG, 1, "Blind Search");
 823                 if (state->srate <= 1500000) {  /*10Msps< SR <=15Msps*/
 824                         state->DemodTimeout = 1500;
 825                         state->FecTimeout = 400;
 826                 } else if (state->srate <= 5000000) {  /*10Msps< SR <=15Msps*/
 827                         state->DemodTimeout = 1000;
 828                         state->FecTimeout = 300;
 829                 } else {  /*SR >20Msps*/
 830                         state->DemodTimeout = 700;
 831                         state->FecTimeout = 100;
 832                 }
 833                 break;
 834
 835         case STV090x_COLD_SEARCH:
 836         case STV090x_WARM_SEARCH:
 837         default:
 838                 dprintk(FE_DEBUG, 1, "Normal Search");
 839                 if (state->srate <= 1000000) {  /*SR <=1Msps*/
 840                         state->DemodTimeout = 4500;
 841                         state->FecTimeout = 1700;
 842                 } else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
 843                         state->DemodTimeout = 2500;
 844                         state->FecTimeout = 1100;
 845                 } else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
 846                         state->DemodTimeout = 1000;
 847                         state->FecTimeout = 550;
 848                 } else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
 849                         state->DemodTimeout = 700;
 850                         state->FecTimeout = 250;
 851                 } else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
 852                         state->DemodTimeout = 400;
 853                         state->FecTimeout = 130;
 854                 } else {   /*SR >20Msps*/
 855                         state->DemodTimeout = 300;
 856                         state->FecTimeout = 100;
 857                 }
 858                 break;
 859         }
 860
 861         if (state->algo == STV090x_WARM_SEARCH)
 862                 state->DemodTimeout /= 2;
 863 }
 864
 865 static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
 866 {
 867         u32 sym;
 868
 869         if (srate > 60000000) {
 870                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
 871                 sym /= (state->internal->mclk >> 12);
 872         } else if (srate > 6000000) {
 873                 sym  = (srate << 6);
 874                 sym /= (state->internal->mclk >> 10);
 875         } else {
 876                 sym  = (srate << 9);
 877                 sym /= (state->internal->mclk >> 7);
 878         }
 879
 880         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
 881                 goto err;
 882         if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
 883                 goto err;
 884
 885         return 0;
 886 err:
 887         dprintk(FE_ERROR, 1, "I/O error");
 888         return -1;
 889 }
 890
 891 static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
 892 {
 893         u32 sym;
 894
 895         srate = 105 * (srate / 100);
 896         if (srate > 60000000) {
 897                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
 898                 sym /= (state->internal->mclk >> 12);
 899         } else if (srate > 6000000) {
 900                 sym  = (srate << 6);
 901                 sym /= (state->internal->mclk >> 10);
 902         } else {
 903                 sym  = (srate << 9);
 904                 sym /= (state->internal->mclk >> 7);
 905         }
 906
 907         if (sym < 0x7fff) {
 908                 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
 909                         goto err;
 910                 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
 911                         goto err;
 912         } else {
 913                 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x7f) < 0) /* MSB */
 914                         goto err;
 915                 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xff) < 0) /* LSB */
 916                         goto err;
 917         }
 918
 919         return 0;
 920 err:
 921         dprintk(FE_ERROR, 1, "I/O error");
 922         return -1;
 923 }
 924
 925 static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
 926 {
 927         u32 sym;
 928
 929         srate = 95 * (srate / 100);
 930         if (srate > 60000000) {
 931                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
 932                 sym /= (state->internal->mclk >> 12);
 933         } else if (srate > 6000000) {
 934                 sym  = (srate << 6);
 935                 sym /= (state->internal->mclk >> 10);
 936         } else {
 937                 sym  = (srate << 9);
 938                 sym /= (state->internal->mclk >> 7);
 939         }
 940
 941         if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0x7f)) < 0) /* MSB */
 942                 goto err;
 943         if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
 944                 goto err;
 945         return 0;
 946 err:
 947         dprintk(FE_ERROR, 1, "I/O error");
 948         return -1;
 949 }
 950
 951 static u32 stv090x_car_width(u32 srate, enum stv090x_rolloff rolloff)
 952 {
 953         u32 ro;
 954
 955         switch (rolloff) {
 956         case STV090x_RO_20:
 957                 ro = 20;
 958                 break;
 959         case STV090x_RO_25:
 960                 ro = 25;
 961                 break;
 962         case STV090x_RO_35:
 963         default:
 964                 ro = 35;
 965                 break;
 966         }
 967
 968         return srate + (srate * ro) / 100;
 969 }
 970
 971 static int stv090x_set_vit_thacq(struct stv090x_state *state)
 972 {
 973         if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
 974                 goto err;
 975         if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
 976                 goto err;
 977         if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
 978                 goto err;
 979         if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
 980                 goto err;
 981         if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
 982                 goto err;
 983         if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
 984                 goto err;
 985         return 0;
 986 err:
 987         dprintk(FE_ERROR, 1, "I/O error");
 988         return -1;
 989 }
 990
 991 static int stv090x_set_vit_thtracq(struct stv090x_state *state)
 992 {
 993         if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
 994                 goto err;
 995         if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
 996                 goto err;
 997         if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
 998                 goto err;
 999         if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
1000                 goto err;
1001         if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
1002                 goto err;
1003         if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
1004                 goto err;
1005         return 0;
1006 err:
1007         dprintk(FE_ERROR, 1, "I/O error");
1008         return -1;
1009 }
1010
1011 static int stv090x_set_viterbi(struct stv090x_state *state)
1012 {
1013         switch (state->search_mode) {
1014         case STV090x_SEARCH_AUTO:
1015                 if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
1016                         goto err;
1017                 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
1018                         goto err;
1019                 break;
1020         case STV090x_SEARCH_DVBS1:
1021                 if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
1022                         goto err;
1023                 switch (state->fec) {
1024                 case STV090x_PR12:
1025                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
1026                                 goto err;
1027                         break;
1028
1029                 case STV090x_PR23:
1030                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
1031                                 goto err;
1032                         break;
1033
1034                 case STV090x_PR34:
1035                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
1036                                 goto err;
1037                         break;
1038
1039                 case STV090x_PR56:
1040                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
1041                                 goto err;
1042                         break;
1043
1044                 case STV090x_PR78:
1045                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
1046                                 goto err;
1047                         break;
1048
1049                 default:
1050                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
1051                                 goto err;
1052                         break;
1053                 }
1054                 break;
1055         case STV090x_SEARCH_DSS:
1056                 if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
1057                         goto err;
1058                 switch (state->fec) {
1059                 case STV090x_PR12:
1060                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
1061                                 goto err;
1062                         break;
1063
1064                 case STV090x_PR23:
1065                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
1066                                 goto err;
1067                         break;
1068
1069                 case STV090x_PR67:
1070                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
1071                                 goto err;
1072                         break;
1073
1074                 default:
1075                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
1076                                 goto err;
1077                         break;
1078                 }
1079                 break;
1080         default:
1081                 break;
1082         }
1083         return 0;
1084 err:
1085         dprintk(FE_ERROR, 1, "I/O error");
1086         return -1;
1087 }
1088
1089 static int stv090x_stop_modcod(struct stv090x_state *state)
1090 {
1091         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1092                 goto err;
1093         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
1094                 goto err;
1095         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
1096                 goto err;
1097         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
1098                 goto err;
1099         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
1100                 goto err;
1101         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
1102                 goto err;
1103         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
1104                 goto err;
1105         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
1106                 goto err;
1107         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
1108                 goto err;
1109         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
1110                 goto err;
1111         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
1112                 goto err;
1113         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
1114                 goto err;
1115         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
1116                 goto err;
1117         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
1118                 goto err;
1119         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
1120                 goto err;
1121         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
1122                 goto err;
1123         return 0;
1124 err:
1125         dprintk(FE_ERROR, 1, "I/O error");
1126         return -1;
1127 }
1128
1129 static int stv090x_activate_modcod(struct stv090x_state *state)
1130 {
1131         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1132                 goto err;
1133         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
1134                 goto err;
1135         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
1136                 goto err;
1137         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
1138                 goto err;
1139         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
1140                 goto err;
1141         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
1142                 goto err;
1143         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
1144                 goto err;
1145         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
1146                 goto err;
1147         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
1148                 goto err;
1149         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
1150                 goto err;
1151         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
1152                 goto err;
1153         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
1154                 goto err;
1155         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
1156                 goto err;
1157         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
1158                 goto err;
1159         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
1160                 goto err;
1161         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
1162                 goto err;
1163
1164         return 0;
1165 err:
1166         dprintk(FE_ERROR, 1, "I/O error");
1167         return -1;
1168 }
1169
1170 static int stv090x_activate_modcod_single(struct stv090x_state *state)
1171 {
1172
1173         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1174                 goto err;
1175         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xf0) < 0)
1176                 goto err;
1177         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0x00) < 0)
1178                 goto err;
1179         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0x00) < 0)
1180                 goto err;
1181         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0x00) < 0)
1182                 goto err;
1183         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0x00) < 0)
1184                 goto err;
1185         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0x00) < 0)
1186                 goto err;
1187         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0x00) < 0)
1188                 goto err;
1189         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0x00) < 0)
1190                 goto err;
1191         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0x00) < 0)
1192                 goto err;
1193         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0x00) < 0)
1194                 goto err;
1195         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0x00) < 0)
1196                 goto err;
1197         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0x00) < 0)
1198                 goto err;
1199         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0x00) < 0)
1200                 goto err;
1201         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0x00) < 0)
1202                 goto err;
1203         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0x0f) < 0)
1204                 goto err;
1205
1206         return 0;
1207
1208 err:
1209         dprintk(FE_ERROR, 1, "I/O error");
1210         return -1;
1211 }
1212
1213 static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
1214 {
1215         u32 reg;
1216
1217         switch (state->demod) {
1218         case STV090x_DEMODULATOR_0:
1219                 mutex_lock(&state->internal->demod_lock);
1220                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1221                 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
1222                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1223                         goto err;
1224                 mutex_unlock(&state->internal->demod_lock);
1225                 break;
1226
1227         case STV090x_DEMODULATOR_1:
1228                 mutex_lock(&state->internal->demod_lock);
1229                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1230                 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
1231                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1232                         goto err;
1233                 mutex_unlock(&state->internal->demod_lock);
1234                 break;
1235
1236         default:
1237                 dprintk(FE_ERROR, 1, "Wrong demodulator!");
1238                 break;
1239         }
1240         return 0;
1241 err:
1242         mutex_unlock(&state->internal->demod_lock);
1243         dprintk(FE_ERROR, 1, "I/O error");
1244         return -1;
1245 }
1246
1247 static int stv090x_dvbs_track_crl(struct stv090x_state *state)
1248 {
1249         if (state->internal->dev_ver >= 0x30) {
1250                 /* Set ACLC BCLC optimised value vs SR */
1251                 if (state->srate >= 15000000) {
1252                         if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0)
1253                                 goto err;
1254                         if (STV090x_WRITE_DEMOD(state, BCLC, 0x1a) < 0)
1255                                 goto err;
1256                 } else if ((state->srate >= 7000000) && (15000000 > state->srate)) {
1257                         if (STV090x_WRITE_DEMOD(state, ACLC, 0x0c) < 0)
1258                                 goto err;
1259                         if (STV090x_WRITE_DEMOD(state, BCLC, 0x1b) < 0)
1260                                 goto err;
1261                 } else if (state->srate < 7000000) {
1262                         if (STV090x_WRITE_DEMOD(state, ACLC, 0x2c) < 0)
1263                                 goto err;
1264                         if (STV090x_WRITE_DEMOD(state, BCLC, 0x1c) < 0)
1265                                 goto err;
1266                 }
1267
1268         } else {
1269                 /* Cut 2.0 */
1270                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
1271                         goto err;
1272                 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1273                         goto err;
1274         }
1275         return 0;
1276 err:
1277         dprintk(FE_ERROR, 1, "I/O error");
1278         return -1;
1279 }
1280
1281 static int stv090x_delivery_search(struct stv090x_state *state)
1282 {
1283         u32 reg;
1284
1285         switch (state->search_mode) {
1286         case STV090x_SEARCH_DVBS1:
1287         case STV090x_SEARCH_DSS:
1288                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1289                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1290                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1291                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1292                         goto err;
1293
1294                 /* Activate Viterbi decoder in legacy search,
1295                  * do not use FRESVIT1, might impact VITERBI2
1296                  */
1297                 if (stv090x_vitclk_ctl(state, 0) < 0)
1298                         goto err;
1299
1300                 if (stv090x_dvbs_track_crl(state) < 0)
1301                         goto err;
1302
1303                 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
1304                         goto err;
1305
1306                 if (stv090x_set_vit_thacq(state) < 0)
1307                         goto err;
1308                 if (stv090x_set_viterbi(state) < 0)
1309                         goto err;
1310                 break;
1311
1312         case STV090x_SEARCH_DVBS2:
1313                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1314                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1315                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1316                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1317                         goto err;
1318                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1319                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1320                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1321                         goto err;
1322
1323                 if (stv090x_vitclk_ctl(state, 1) < 0)
1324                         goto err;
1325
1326                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
1327                         goto err;
1328                 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1329                         goto err;
1330
1331                 if (state->internal->dev_ver <= 0x20) {
1332                         /* enable S2 carrier loop */
1333                         if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1334                                 goto err;
1335                 } else {
1336                         /* > Cut 3: Stop carrier 3 */
1337                         if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
1338                                 goto err;
1339                 }
1340
1341                 if (state->demod_mode != STV090x_SINGLE) {
1342                         /* Cut 2: enable link during search */
1343                         if (stv090x_activate_modcod(state) < 0)
1344                                 goto err;
1345                 } else {
1346                         /* Single demodulator
1347                          * Authorize SHORT and LONG frames,
1348                          * QPSK, 8PSK, 16APSK and 32APSK
1349                          */
1350                         if (stv090x_activate_modcod_single(state) < 0)
1351                                 goto err;
1352                 }
1353
1354                 if (stv090x_set_vit_thtracq(state) < 0)
1355                         goto err;
1356                 break;
1357
1358         case STV090x_SEARCH_AUTO:
1359         default:
1360                 /* enable DVB-S2 and DVB-S2 in Auto MODE */
1361                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1362                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1363                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1364                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1365                         goto err;
1366                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1367                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1368                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1369                         goto err;
1370
1371                 if (stv090x_vitclk_ctl(state, 0) < 0)
1372                         goto err;
1373
1374                 if (stv090x_dvbs_track_crl(state) < 0)
1375                         goto err;
1376
1377                 if (state->internal->dev_ver <= 0x20) {
1378                         /* enable S2 carrier loop */
1379                         if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1380                                 goto err;
1381                 } else {
1382                         /* > Cut 3: Stop carrier 3 */
1383                         if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
1384                                 goto err;
1385                 }
1386
1387                 if (state->demod_mode != STV090x_SINGLE) {
1388                         /* Cut 2: enable link during search */
1389                         if (stv090x_activate_modcod(state) < 0)
1390                                 goto err;
1391                 } else {
1392                         /* Single demodulator
1393                          * Authorize SHORT and LONG frames,
1394                          * QPSK, 8PSK, 16APSK and 32APSK
1395                          */
1396                         if (stv090x_activate_modcod_single(state) < 0)
1397                                 goto err;
1398                 }
1399
1400                 if (stv090x_set_vit_thacq(state) < 0)
1401                         goto err;
1402
1403                 if (stv090x_set_viterbi(state) < 0)
1404                         goto err;
1405                 break;
1406         }
1407         return 0;
1408 err:
1409         dprintk(FE_ERROR, 1, "I/O error");
1410         return -1;
1411 }
1412
1413 static int stv090x_start_search(struct stv090x_state *state)
1414 {
1415         u32 reg, freq_abs;
1416         s16 freq;
1417
1418         /* Reset demodulator */
1419         reg = STV090x_READ_DEMOD(state, DMDISTATE);
1420         STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
1421         if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1422                 goto err;
1423
1424         if (state->internal->dev_ver <= 0x20) {
1425                 if (state->srate <= 5000000) {
1426                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
1427                                 goto err;
1428                         if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
1429                                 goto err;
1430                         if (STV090x_WRITE_DEMOD(state, CFRUP0, 0xff) < 0)
1431                                 goto err;
1432                         if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
1433                                 goto err;
1434                         if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
1435                                 goto err;
1436
1437                         /*enlarge the timing bandwidth for Low SR*/
1438                         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
1439                                 goto err;
1440                 } else {
1441                         /* If the symbol rate is >5 Msps
1442                         Set The carrier search up and low to auto mode */
1443                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1444                                 goto err;
1445                         /*reduce the timing bandwidth for high SR*/
1446                         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1447                                 goto err;
1448                 }
1449         } else {
1450                 /* >= Cut 3 */
1451                 if (state->srate <= 5000000) {
1452                         /* enlarge the timing bandwidth for Low SR */
1453                         STV090x_WRITE_DEMOD(state, RTCS2, 0x68);
1454                 } else {
1455                         /* reduce timing bandwidth for high SR */
1456                         STV090x_WRITE_DEMOD(state, RTCS2, 0x44);
1457                 }
1458
1459                 /* Set CFR min and max to manual mode */
1460                 STV090x_WRITE_DEMOD(state, CARCFG, 0x46);
1461
1462                 if (state->algo == STV090x_WARM_SEARCH) {
1463                         /* WARM Start
1464                          * CFR min = -1MHz,
1465                          * CFR max = +1MHz
1466                          */
1467                         freq_abs  = 1000 << 16;
1468                         freq_abs /= (state->internal->mclk / 1000);
1469                         freq      = (s16) freq_abs;
1470                 } else {
1471                         /* COLD Start
1472                          * CFR min =- (SearchRange / 2 + 600KHz)
1473                          * CFR max = +(SearchRange / 2 + 600KHz)
1474                          * (600KHz for the tuner step size)
1475                          */
1476                         freq_abs  = (state->search_range / 2000) + 600;
1477                         freq_abs  = freq_abs << 16;
1478                         freq_abs /= (state->internal->mclk / 1000);
1479                         freq      = (s16) freq_abs;
1480                 }
1481
1482                 if (STV090x_WRITE_DEMOD(state, CFRUP1, MSB(freq)) < 0)
1483                         goto err;
1484                 if (STV090x_WRITE_DEMOD(state, CFRUP0, LSB(freq)) < 0)
1485                         goto err;
1486
1487                 freq *= -1;
1488
1489                 if (STV090x_WRITE_DEMOD(state, CFRLOW1, MSB(freq)) < 0)
1490                         goto err;
1491                 if (STV090x_WRITE_DEMOD(state, CFRLOW0, LSB(freq)) < 0)
1492                         goto err;
1493
1494         }
1495
1496         if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
1497                 goto err;
1498         if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
1499                 goto err;
1500
1501         if (state->internal->dev_ver >= 0x20) {
1502                 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1503                         goto err;
1504                 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1505                         goto err;
1506
1507                 if ((state->search_mode == STV090x_SEARCH_DVBS1)        ||
1508                         (state->search_mode == STV090x_SEARCH_DSS)      ||
1509                         (state->search_mode == STV090x_SEARCH_AUTO)) {
1510
1511                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1512                                 goto err;
1513                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
1514                                 goto err;
1515                 }
1516         }
1517
1518         if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
1519                 goto err;
1520         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
1521                 goto err;
1522         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
1523                 goto err;
1524
1525         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1526         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1527         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1528         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1529                 goto err;
1530         reg = STV090x_READ_DEMOD(state, DMDCFG2);
1531         STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
1532         if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
1533                 goto err;
1534
1535         if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0)
1536                 goto err;
1537
1538         if (state->internal->dev_ver >= 0x20) {
1539                 /*Frequency offset detector setting*/
1540                 if (state->srate < 2000000) {
1541                         if (state->internal->dev_ver <= 0x20) {
1542                                 /* Cut 2 */
1543                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0)
1544                                         goto err;
1545                         } else {
1546                                 /* Cut 3 */
1547                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x89) < 0)
1548                                         goto err;
1549                         }
1550                         if (STV090x_WRITE_DEMOD(state, CARHDR, 0x40) < 0)
1551                                 goto err;
1552                 } else if (state->srate < 10000000) {
1553                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
1554                                 goto err;
1555                         if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
1556                                 goto err;
1557                 } else {
1558                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
1559                                 goto err;
1560                         if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
1561                                 goto err;
1562                 }
1563         } else {
1564                 if (state->srate < 10000000) {
1565                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
1566                                 goto err;
1567                 } else {
1568                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1569                                 goto err;
1570                 }
1571         }
1572
1573         switch (state->algo) {
1574         case STV090x_WARM_SEARCH:
1575                 /* The symbol rate and the exact
1576                  * carrier Frequency are known
1577                  */
1578                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1579                         goto err;
1580                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
1581                         goto err;
1582                 break;
1583
1584         case STV090x_COLD_SEARCH:
1585                 /* The symbol rate is known */
1586                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1587                         goto err;
1588                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1589                         goto err;
1590                 break;
1591
1592         default:
1593                 break;
1594         }
1595         return 0;
1596 err:
1597         dprintk(FE_ERROR, 1, "I/O error");
1598         return -1;
1599 }
1600
1601 static int stv090x_get_agc2_min_level(struct stv090x_state *state)
1602 {
1603         u32 agc2_min = 0xffff, agc2 = 0, freq_init, freq_step, reg;
1604         s32 i, j, steps, dir;
1605
1606         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1607                 goto err;
1608         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1609         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1610         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1611         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1612                 goto err;
1613
1614         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
1615                 goto err;
1616         if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1617                 goto err;
1618         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
1619                 goto err;
1620         if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1621                 goto err;
1622         if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
1623                 goto err;
1624         if (stv090x_set_srate(state, 1000000) < 0)
1625                 goto err;
1626
1627         steps  = state->search_range / 1000000;
1628         if (steps <= 0)
1629                 steps = 1;
1630
1631         dir = 1;
1632         freq_step = (1000000 * 256) / (state->internal->mclk / 256);
1633         freq_init = 0;
1634
1635         for (i = 0; i < steps; i++) {
1636                 if (dir > 0)
1637                         freq_init = freq_init + (freq_step * i);
1638                 else
1639                         freq_init = freq_init - (freq_step * i);
1640
1641                 dir *= -1;
1642
1643                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
1644                         goto err;
1645                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
1646                         goto err;
1647                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
1648                         goto err;
1649                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
1650                         goto err;
1651                 msleep(10);
1652
1653                 agc2 = 0;
1654                 for (j = 0; j < 10; j++) {
1655                         agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
1656                                 STV090x_READ_DEMOD(state, AGC2I0);
1657                 }
1658                 agc2 /= 10;
1659                 if (agc2 < agc2_min)
1660                         agc2_min = agc2;
1661         }
1662
1663         return agc2_min;
1664 err:
1665         dprintk(FE_ERROR, 1, "I/O error");
1666         return -1;
1667 }
1668
1669 static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
1670 {
1671         u8 r3, r2, r1, r0;
1672         s32 srate, int_1, int_2, tmp_1, tmp_2;
1673
1674         r3 = STV090x_READ_DEMOD(state, SFR3);
1675         r2 = STV090x_READ_DEMOD(state, SFR2);
1676         r1 = STV090x_READ_DEMOD(state, SFR1);
1677         r0 = STV090x_READ_DEMOD(state, SFR0);
1678
1679         srate = ((r3 << 24) | (r2 << 16) | (r1 <<  8) | r0);
1680
1681         int_1 = clk >> 16;
1682         int_2 = srate >> 16;
1683
1684         tmp_1 = clk % 0x10000;
1685         tmp_2 = srate % 0x10000;
1686
1687         srate = (int_1 * int_2) +
1688                 ((int_1 * tmp_2) >> 16) +
1689                 ((int_2 * tmp_1) >> 16);
1690
1691         return srate;
1692 }
1693
1694 static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1695 {
1696         struct dvb_frontend *fe = &state->frontend;
1697
1698         int tmg_lock = 0, i;
1699         s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
1700         u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
1701         u32 agc2th;
1702
1703         if (state->internal->dev_ver >= 0x30)
1704                 agc2th = 0x2e00;
1705         else
1706                 agc2th = 0x1f00;
1707
1708         reg = STV090x_READ_DEMOD(state, DMDISTATE);
1709         STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
1710         if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1711                 goto err;
1712         if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
1713                 goto err;
1714         if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0)
1715                 goto err;
1716         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
1717                 goto err;
1718         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
1719                 goto err;
1720         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1721         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
1722         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1723         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1724                 goto err;
1725
1726         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
1727                 goto err;
1728         if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1729                 goto err;
1730         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
1731                 goto err;
1732         if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1733                 goto err;
1734         if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
1735                 goto err;
1736         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0)
1737                 goto err;
1738
1739         if (state->internal->dev_ver >= 0x30) {
1740                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0)
1741                         goto err;
1742                 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x98) < 0)
1743                         goto err;
1744
1745         } else if (state->internal->dev_ver >= 0x20) {
1746                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
1747                         goto err;
1748                 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
1749                         goto err;
1750         }
1751
1752         if (state->srate <= 2000000)
1753                 car_step = 1000;
1754         else if (state->srate <= 5000000)
1755                 car_step = 2000;
1756         else if (state->srate <= 12000000)
1757                 car_step = 3000;
1758         else
1759                 car_step = 5000;
1760
1761         steps  = -1 + ((state->search_range / 1000) / car_step);
1762         steps /= 2;
1763         steps  = (2 * steps) + 1;
1764         if (steps < 0)
1765                 steps = 1;
1766         else if (steps > 10) {
1767                 steps = 11;
1768                 car_step = (state->search_range / 1000) / 10;
1769         }
1770         cur_step = 0;
1771         dir = 1;
1772         freq = state->frequency;
1773
1774         while ((!tmg_lock) && (cur_step < steps)) {
1775                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
1776                         goto err;
1777                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
1778                         goto err;
1779                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1780                         goto err;
1781                 if (STV090x_WRITE_DEMOD(state, SFRINIT1, 0x00) < 0)
1782                         goto err;
1783                 if (STV090x_WRITE_DEMOD(state, SFRINIT0, 0x00) < 0)
1784                         goto err;
1785                 /* trigger acquisition */
1786                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x40) < 0)
1787                         goto err;
1788                 msleep(50);
1789                 for (i = 0; i < 10; i++) {
1790                         reg = STV090x_READ_DEMOD(state, DSTATUS);
1791                         if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1792                                 tmg_cpt++;
1793                         agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
1794                                 STV090x_READ_DEMOD(state, AGC2I0);
1795                 }
1796                 agc2 /= 10;
1797                 srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1798                 cur_step++;
1799                 dir *= -1;
1800                 if ((tmg_cpt >= 5) && (agc2 < agc2th) &&
1801                     (srate_coarse < 50000000) && (srate_coarse > 850000))
1802                         tmg_lock = 1;
1803                 else if (cur_step < steps) {
1804                         if (dir > 0)
1805                                 freq += cur_step * car_step;
1806                         else
1807                                 freq -= cur_step * car_step;
1808
1809                         /* Setup tuner */
1810                         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
1811                                 goto err;
1812
1813                         if (state->config->tuner_set_frequency) {
1814                                 if (state->config->tuner_set_frequency(fe, freq) < 0)
1815                                         goto err_gateoff;
1816                         }
1817
1818                         if (state->config->tuner_set_bandwidth) {
1819                                 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
1820                                         goto err_gateoff;
1821                         }
1822
1823                         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
1824                                 goto err;
1825
1826                         msleep(50);
1827
1828                         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
1829                                 goto err;
1830
1831                         if (state->config->tuner_get_status) {
1832                                 if (state->config->tuner_get_status(fe, &reg) < 0)
1833                                         goto err_gateoff;
1834                         }
1835
1836                         if (reg)
1837                                 dprintk(FE_DEBUG, 1, "Tuner phase locked");
1838                         else
1839                                 dprintk(FE_DEBUG, 1, "Tuner unlocked");
1840
1841                         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
1842                                 goto err;
1843
1844                 }
1845         }
1846         if (!tmg_lock)
1847                 srate_coarse = 0;
1848         else
1849                 srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1850
1851         return srate_coarse;
1852
1853 err_gateoff:
1854         stv090x_i2c_gate_ctrl(state, 0);
1855 err:
1856         dprintk(FE_ERROR, 1, "I/O error");
1857         return -1;
1858 }
1859
1860 static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1861 {
1862         u32 srate_coarse, freq_coarse, sym, reg;
1863
1864         srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1865         freq_coarse  = STV090x_READ_DEMOD(state, CFR2) << 8;
1866         freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
1867         sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1868
1869         if (sym < state->srate)
1870                 srate_coarse = 0;
1871         else {
1872                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
1873                         goto err;
1874                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
1875                         goto err;
1876                 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1877                         goto err;
1878                 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1879                         goto err;
1880                 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
1881                         goto err;
1882                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1883                 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
1884                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1885                         goto err;
1886
1887                 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1888                         goto err;
1889
1890                 if (state->internal->dev_ver >= 0x30) {
1891                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
1892                                 goto err;
1893                 } else if (state->internal->dev_ver >= 0x20) {
1894                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
1895                                 goto err;
1896                 }
1897
1898                 if (srate_coarse > 3000000) {
1899                         sym  = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1900                         sym  = (sym / 1000) * 65536;
1901                         sym /= (state->internal->mclk / 1000);
1902                         if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1903                                 goto err;
1904                         if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1905                                 goto err;
1906                         sym  = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
1907                         sym  = (sym / 1000) * 65536;
1908                         sym /= (state->internal->mclk / 1000);
1909                         if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1910                                 goto err;
1911                         if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1912                                 goto err;
1913                         sym  = (srate_coarse / 1000) * 65536;
1914                         sym /= (state->internal->mclk / 1000);
1915                         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1916                                 goto err;
1917                         if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1918                                 goto err;
1919                 } else {
1920                         sym  = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1921                         sym  = (sym / 100) * 65536;
1922                         sym /= (state->internal->mclk / 100);
1923                         if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1924                                 goto err;
1925                         if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1926                                 goto err;
1927                         sym  = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
1928                         sym  = (sym / 100) * 65536;
1929                         sym /= (state->internal->mclk / 100);
1930                         if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1931                                 goto err;
1932                         if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1933                                 goto err;
1934                         sym  = (srate_coarse / 100) * 65536;
1935                         sym /= (state->internal->mclk / 100);
1936                         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1937                                 goto err;
1938                         if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1939                                 goto err;
1940                 }
1941                 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
1942                         goto err;
1943                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
1944                         goto err;
1945                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
1946                         goto err;
1947                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
1948                         goto err;
1949         }
1950
1951         return srate_coarse;
1952
1953 err:
1954         dprintk(FE_ERROR, 1, "I/O error");
1955         return -1;
1956 }
1957
1958 static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
1959 {
1960         s32 timer = 0, lock = 0;
1961         u32 reg;
1962         u8 stat;
1963
1964         while ((timer < timeout) && (!lock)) {
1965                 reg = STV090x_READ_DEMOD(state, DMDSTATE);
1966                 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
1967
1968                 switch (stat) {
1969                 case 0: /* searching */
1970                 case 1: /* first PLH detected */
1971                 default:
1972                         dprintk(FE_DEBUG, 1, "Demodulator searching ..");
1973                         lock = 0;
1974                         break;
1975                 case 2: /* DVB-S2 mode */
1976                 case 3: /* DVB-S1/legacy mode */
1977                         reg = STV090x_READ_DEMOD(state, DSTATUS);
1978                         lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
1979                         break;
1980                 }
1981
1982                 if (!lock)
1983                         msleep(10);
1984                 else
1985                         dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
1986
1987                 timer += 10;
1988         }
1989         return lock;
1990 }
1991
1992 static int stv090x_blind_search(struct stv090x_state *state)
1993 {
1994         u32 agc2, reg, srate_coarse;
1995         s32 cpt_fail, agc2_ovflw, i;
1996         u8 k_ref, k_max, k_min;
1997         int coarse_fail = 0;
1998         int lock;
1999
2000         k_max = 110;
2001         k_min = 10;
2002
2003         agc2 = stv090x_get_agc2_min_level(state);
2004
2005         if (agc2 > STV090x_SEARCH_AGC2_TH(state->internal->dev_ver)) {
2006                 lock = 0;
2007         } else {
2008
2009                 if (state->internal->dev_ver <= 0x20) {
2010                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
2011                                 goto err;
2012                 } else {
2013                         /* > Cut 3 */
2014                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0x06) < 0)
2015                                 goto err;
2016                 }
2017
2018                 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
2019                         goto err;
2020
2021                 if (state->internal->dev_ver >= 0x20) {
2022                         if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
2023                                 goto err;
2024                         if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
2025                                 goto err;
2026                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
2027                                 goto err;
2028                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
2029                                 goto err;
2030                 }
2031
2032                 k_ref = k_max;
2033                 do {
2034                         if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
2035                                 goto err;
2036                         if (stv090x_srate_srch_coarse(state) != 0) {
2037                                 srate_coarse = stv090x_srate_srch_fine(state);
2038                                 if (srate_coarse != 0) {
2039                                         stv090x_get_lock_tmg(state);
2040                                         lock = stv090x_get_dmdlock(state,
2041                                                         state->DemodTimeout);
2042                                 } else {
2043                                         lock = 0;
2044                                 }
2045                         } else {
2046                                 cpt_fail = 0;
2047                                 agc2_ovflw = 0;
2048                                 for (i = 0; i < 10; i++) {
2049                                         agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
2050                                                 STV090x_READ_DEMOD(state, AGC2I0);
2051                                         if (agc2 >= 0xff00)
2052                                                 agc2_ovflw++;
2053                                         reg = STV090x_READ_DEMOD(state, DSTATUS2);
2054                                         if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
2055                                             (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
2056
2057                                                 cpt_fail++;
2058                                 }
2059                                 if ((cpt_fail > 7) || (agc2_ovflw > 7))
2060                                         coarse_fail = 1;
2061
2062                                 lock = 0;
2063                         }
2064                         k_ref -= 20;
2065                 } while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
2066         }
2067
2068         return lock;
2069
2070 err:
2071         dprintk(FE_ERROR, 1, "I/O error");
2072         return -1;
2073 }
2074
2075 static int stv090x_chk_tmg(struct stv090x_state *state)
2076 {
2077         u32 reg;
2078         s32 tmg_cpt = 0, i;
2079         u8 freq, tmg_thh, tmg_thl;
2080         int tmg_lock = 0;
2081
2082         freq = STV090x_READ_DEMOD(state, CARFREQ);
2083         tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
2084         tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
2085         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
2086                 goto err;
2087         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
2088                 goto err;
2089
2090         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2091         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
2092         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2093                 goto err;
2094         if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
2095                 goto err;
2096
2097         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
2098                 goto err;
2099         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
2100                 goto err;
2101
2102         if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
2103                 goto err;
2104         if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
2105                 goto err;
2106         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
2107                 goto err;
2108
2109         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
2110                 goto err;
2111         msleep(10);
2112
2113         for (i = 0; i < 10; i++) {
2114                 reg = STV090x_READ_DEMOD(state, DSTATUS);
2115                 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
2116                         tmg_cpt++;
2117                 msleep(1);
2118         }
2119         if (tmg_cpt >= 3)
2120                 tmg_lock = 1;
2121
2122         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
2123                 goto err;
2124         if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
2125                 goto err;
2126         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
2127                 goto err;
2128
2129         if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
2130                 goto err;
2131         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
2132                 goto err;
2133         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
2134                 goto err;
2135
2136         return  tmg_lock;
2137
2138 err:
2139         dprintk(FE_ERROR, 1, "I/O error");
2140         return -1;
2141 }
2142
2143 static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
2144 {
2145         struct dvb_frontend *fe = &state->frontend;
2146
2147         u32 reg;
2148         s32 car_step, steps, cur_step, dir, freq, timeout_lock;
2149         int lock;
2150
2151         if (state->srate >= 10000000)
2152                 timeout_lock = timeout_dmd / 3;
2153         else
2154                 timeout_lock = timeout_dmd / 2;
2155
2156         lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
2157         if (lock)
2158                 return lock;
2159
2160         if (state->srate >= 10000000) {
2161                 if (stv090x_chk_tmg(state)) {
2162                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2163                                 goto err;
2164                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
2165                                 goto err;
2166                         return stv090x_get_dmdlock(state, timeout_dmd);
2167                 }
2168                 return 0;
2169         }
2170
2171         if (state->srate <= 4000000)
2172                 car_step = 1000;
2173         else if (state->srate <= 7000000)
2174                 car_step = 2000;
2175         else if (state->srate <= 10000000)
2176                 car_step = 3000;
2177         else
2178                 car_step = 5000;
2179
2180         steps  = (state->search_range / 1000) / car_step;
2181         steps /= 2;
2182         steps  = 2 * (steps + 1);
2183         if (steps < 0)
2184                 steps = 2;
2185         else if (steps > 12)
2186                 steps = 12;
2187
2188         cur_step = 1;
2189         dir = 1;
2190
2191         freq = state->frequency;
2192         state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
2193         while ((cur_step <= steps) && (!lock)) {
2194                 if (dir > 0)
2195                         freq += cur_step * car_step;
2196                 else
2197                         freq -= cur_step * car_step;
2198
2199                 /* Setup tuner */
2200                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
2201                         goto err;
2202
2203                 if (state->config->tuner_set_frequency) {
2204                         if (state->config->tuner_set_frequency(fe, freq) < 0)
2205                                 goto err_gateoff;
2206                 }
2207
2208                 if (state->config->tuner_set_bandwidth) {
2209                         if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
2210                                 goto err_gateoff;
2211                 }
2212
2213                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
2214                         goto err;
2215
2216                 msleep(50);
2217
2218                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
2219                         goto err;
2220
2221                 if (state->config->tuner_get_status) {
2222                         if (state->config->tuner_get_status(fe, &reg) < 0)
2223                                 goto err_gateoff;
2224                 }
2225
2226                 if (reg)
2227                         dprintk(FE_DEBUG, 1, "Tuner phase locked");
2228                 else
2229                         dprintk(FE_DEBUG, 1, "Tuner unlocked");
2230
2231                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
2232                         goto err;
2233
2234                 STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
2235                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
2236                         goto err;
2237                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
2238                         goto err;
2239                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2240                         goto err;
2241                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
2242                         goto err;
2243                 lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
2244
2245                 dir *= -1;
2246                 cur_step++;
2247         }
2248
2249         return lock;
2250
2251 err_gateoff:
2252         stv090x_i2c_gate_ctrl(state, 0);
2253 err:
2254         dprintk(FE_ERROR, 1, "I/O error");
2255         return -1;
2256 }
2257
2258 static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
2259 {
2260         s32 timeout, inc, steps_max, srate, car_max;
2261
2262         srate = state->srate;
2263         car_max = state->search_range / 1000;
2264         car_max += car_max / 10;
2265         car_max  = 65536 * (car_max / 2);
2266         car_max /= (state->internal->mclk / 1000);
2267
2268         if (car_max > 0x4000)
2269                 car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
2270
2271         inc  = srate;
2272         inc /= state->internal->mclk / 1000;
2273         inc *= 256;
2274         inc *= 256;
2275         inc /= 1000;
2276
2277         switch (state->search_mode) {
2278         case STV090x_SEARCH_DVBS1:
2279         case STV090x_SEARCH_DSS:
2280                 inc *= 3; /* freq step = 3% of srate */
2281                 timeout = 20;
2282                 break;
2283
2284         case STV090x_SEARCH_DVBS2:
2285                 inc *= 4;
2286                 timeout = 25;
2287                 break;
2288
2289         case STV090x_SEARCH_AUTO:
2290         default:
2291                 inc *= 3;
2292                 timeout = 25;
2293                 break;
2294         }
2295         inc /= 100;
2296         if ((inc > car_max) || (inc < 0))
2297                 inc = car_max / 2; /* increment <= 1/8 Mclk */
2298
2299         timeout *= 27500; /* 27.5 Msps reference */
2300         if (srate > 0)
2301                 timeout /= (srate / 1000);
2302
2303         if ((timeout > 100) || (timeout < 0))
2304                 timeout = 100;
2305
2306         steps_max = (car_max / inc) + 1; /* min steps = 3 */
2307         if ((steps_max > 100) || (steps_max < 0)) {
2308                 steps_max = 100; /* max steps <= 100 */
2309                 inc = car_max / steps_max;
2310         }
2311         *freq_inc = inc;
2312         *timeout_sw = timeout;
2313         *steps = steps_max;
2314
2315         return 0;
2316 }
2317
2318 static int stv090x_chk_signal(struct stv090x_state *state)
2319 {
2320         s32 offst_car, agc2, car_max;
2321         int no_signal;
2322
2323         offst_car  = STV090x_READ_DEMOD(state, CFR2) << 8;
2324         offst_car |= STV090x_READ_DEMOD(state, CFR1);
2325         offst_car = comp2(offst_car, 16);
2326
2327         agc2  = STV090x_READ_DEMOD(state, AGC2I1) << 8;
2328         agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
2329         car_max = state->search_range / 1000;
2330
2331         car_max += (car_max / 10); /* 10% margin */
2332         car_max  = (65536 * car_max / 2);
2333         car_max /= state->internal->mclk / 1000;
2334
2335         if (car_max > 0x4000)
2336                 car_max = 0x4000;
2337
2338         if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
2339                 no_signal = 1;
2340                 dprintk(FE_DEBUG, 1, "No Signal");
2341         } else {
2342                 no_signal = 0;
2343                 dprintk(FE_DEBUG, 1, "Found Signal");
2344         }
2345
2346         return no_signal;
2347 }
2348
2349 static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
2350 {
2351         int no_signal, lock = 0;
2352         s32 cpt_step = 0, offst_freq, car_max;
2353         u32 reg;
2354
2355         car_max  = state->search_range / 1000;
2356         car_max += (car_max / 10);
2357         car_max  = (65536 * car_max / 2);
2358         car_max /= (state->internal->mclk / 1000);
2359         if (car_max > 0x4000)
2360                 car_max = 0x4000;
2361
2362         if (zigzag)
2363                 offst_freq = 0;
2364         else
2365                 offst_freq = -car_max + inc;
2366
2367         do {
2368                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
2369                         goto err;
2370                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
2371                         goto err;
2372                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
2373                         goto err;
2374                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2375                         goto err;
2376
2377                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2378                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
2379                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2380                         goto err;
2381
2382                 if (zigzag) {
2383                         if (offst_freq >= 0)
2384                                 offst_freq = -offst_freq - 2 * inc;
2385                         else
2386                                 offst_freq = -offst_freq;
2387                 } else {
2388                         offst_freq += 2 * inc;
2389                 }
2390
2391                 cpt_step++;
2392
2393                 lock = stv090x_get_dmdlock(state, timeout);
2394                 no_signal = stv090x_chk_signal(state);
2395
2396         } while ((!lock) &&
2397                  (!no_signal) &&
2398                   ((offst_freq - inc) < car_max) &&
2399                   ((offst_freq + inc) > -car_max) &&
2400                   (cpt_step < steps_max));
2401
2402         reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2403         STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
2404         if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2405                         goto err;
2406
2407         return lock;
2408 err:
2409         dprintk(FE_ERROR, 1, "I/O error");
2410         return -1;
2411 }
2412
2413 static int stv090x_sw_algo(struct stv090x_state *state)
2414 {
2415         int no_signal, zigzag, lock = 0;
2416         u32 reg;
2417
2418         s32 dvbs2_fly_wheel;
2419         s32 inc, timeout_step, trials, steps_max;
2420
2421         /* get params */
2422         stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max);
2423
2424         switch (state->search_mode) {
2425         case STV090x_SEARCH_DVBS1:
2426         case STV090x_SEARCH_DSS:
2427                 /* accelerate the frequency detector */
2428                 if (state->internal->dev_ver >= 0x20) {
2429                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
2430                                 goto err;
2431                 }
2432
2433                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
2434                         goto err;
2435                 zigzag = 0;
2436                 break;
2437
2438         case STV090x_SEARCH_DVBS2:
2439                 if (state->internal->dev_ver >= 0x20) {
2440                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2441                                 goto err;
2442                 }
2443
2444                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2445                         goto err;
2446                 zigzag = 1;
2447                 break;
2448
2449         case STV090x_SEARCH_AUTO:
2450         default:
2451                 /* accelerate the frequency detector */
2452                 if (state->internal->dev_ver >= 0x20) {
2453                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
2454                                 goto err;
2455                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2456                                 goto err;
2457                 }
2458
2459                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0)
2460                         goto err;
2461                 zigzag = 0;
2462                 break;
2463         }
2464
2465         trials = 0;
2466         do {
2467                 lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
2468                 no_signal = stv090x_chk_signal(state);
2469                 trials++;
2470
2471                 /*run the SW search 2 times maximum*/
2472                 if (lock || no_signal || (trials == 2)) {
2473                         /*Check if the demod is not losing lock in DVBS2*/
2474                         if (state->internal->dev_ver >= 0x20) {
2475                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2476                                         goto err;
2477                                 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
2478                                         goto err;
2479                         }
2480
2481                         reg = STV090x_READ_DEMOD(state, DMDSTATE);
2482                         if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
2483                                 /*Check if the demod is not losing lock in DVBS2*/
2484                                 msleep(timeout_step);
2485                                 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2486                                 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2487                                 if (dvbs2_fly_wheel < 0xd) {     /*if correct frames is decrementing */
2488                                         msleep(timeout_step);
2489                                         reg = STV090x_READ_DEMOD(state, DMDFLYW);
2490                                         dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2491                                 }
2492                                 if (dvbs2_fly_wheel < 0xd) {
2493                                         /*FALSE lock, The demod is losing lock */
2494                                         lock = 0;
2495                                         if (trials < 2) {
2496                                                 if (state->internal->dev_ver >= 0x20) {
2497                                                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2498                                                                 goto err;
2499                                                 }
2500
2501                                                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2502                                                         goto err;
2503                                         }
2504                                 }
2505                         }
2506                 }
2507         } while ((!lock) && (trials < 2) && (!no_signal));
2508
2509         return lock;
2510 err:
2511         dprintk(FE_ERROR, 1, "I/O error");
2512         return -1;
2513 }
2514
2515 static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
2516 {
2517         u32 reg;
2518         enum stv090x_delsys delsys;
2519
2520         reg = STV090x_READ_DEMOD(state, DMDSTATE);
2521         if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
2522                 delsys = STV090x_DVBS2;
2523         else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
2524                 reg = STV090x_READ_DEMOD(state, FECM);
2525                 if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
2526                         delsys = STV090x_DSS;
2527                 else
2528                         delsys = STV090x_DVBS1;
2529         } else {
2530                 delsys = STV090x_ERROR;
2531         }
2532
2533         return delsys;
2534 }
2535
2536 /* in Hz */
2537 static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
2538 {
2539         s32 derot, int_1, int_2, tmp_1, tmp_2;
2540
2541         derot  = STV090x_READ_DEMOD(state, CFR2) << 16;
2542         derot |= STV090x_READ_DEMOD(state, CFR1) <<  8;
2543         derot |= STV090x_READ_DEMOD(state, CFR0);
2544
2545         derot = comp2(derot, 24);
2546         int_1 = mclk >> 12;
2547         int_2 = derot >> 12;
2548
2549         /* carrier_frequency = MasterClock * Reg / 2^24 */
2550         tmp_1 = mclk % 0x1000;
2551         tmp_2 = derot % 0x1000;
2552
2553         derot = (int_1 * int_2) +
2554                 ((int_1 * tmp_2) >> 12) +
2555                 ((int_2 * tmp_1) >> 12);
2556
2557         return derot;
2558 }
2559
2560 static int stv090x_get_viterbi(struct stv090x_state *state)
2561 {
2562         u32 reg, rate;
2563
2564         reg = STV090x_READ_DEMOD(state, VITCURPUN);
2565         rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
2566
2567         switch (rate) {
2568         case 13:
2569                 state->fec = STV090x_PR12;
2570                 break;
2571
2572         case 18:
2573                 state->fec = STV090x_PR23;
2574                 break;
2575
2576         case 21:
2577                 state->fec = STV090x_PR34;
2578                 break;
2579
2580         case 24:
2581                 state->fec = STV090x_PR56;
2582                 break;
2583
2584         case 25:
2585                 state->fec = STV090x_PR67;
2586                 break;
2587
2588         case 26:
2589                 state->fec = STV090x_PR78;
2590                 break;
2591
2592         default:
2593                 state->fec = STV090x_PRERR;
2594                 break;
2595         }
2596
2597         return 0;
2598 }
2599
2600 static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
2601 {
2602         struct dvb_frontend *fe = &state->frontend;
2603
2604         u8 tmg;
2605         u32 reg;
2606         s32 i = 0, offst_freq;
2607
2608         msleep(5);
2609
2610         if (state->algo == STV090x_BLIND_SEARCH) {
2611                 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2612                 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
2613                 while ((i <= 50) && (tmg != 0) && (tmg != 0xff)) {
2614                         tmg = STV090x_READ_DEMOD(state, TMGREG2);
2615                         msleep(5);
2616                         i += 5;
2617                 }
2618         }
2619         state->delsys = stv090x_get_std(state);
2620
2621         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
2622                 goto err;
2623
2624         if (state->config->tuner_get_frequency) {
2625                 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2626                         goto err_gateoff;
2627         }
2628
2629         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
2630                 goto err;
2631
2632         offst_freq = stv090x_get_car_freq(state, state->internal->mclk) / 1000;
2633         state->frequency += offst_freq;
2634
2635         if (stv090x_get_viterbi(state) < 0)
2636                 goto err;
2637
2638         reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2639         state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2640         state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2641         state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
2642         reg = STV090x_READ_DEMOD(state, TMGOBS);
2643         state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2644         reg = STV090x_READ_DEMOD(state, FECM);
2645         state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
2646
2647         if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
2648
2649                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
2650                         goto err;
2651
2652                 if (state->config->tuner_get_frequency) {
2653                         if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2654                                 goto err_gateoff;
2655                 }
2656
2657                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
2658                         goto err;
2659
2660                 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2661                         return STV090x_RANGEOK;
2662                 else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
2663                         return STV090x_RANGEOK;
2664         } else {
2665                 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2666                         return STV090x_RANGEOK;
2667         }
2668
2669         return STV090x_OUTOFRANGE;
2670
2671 err_gateoff:
2672         stv090x_i2c_gate_ctrl(state, 0);
2673 err:
2674         dprintk(FE_ERROR, 1, "I/O error");
2675         return -1;
2676 }
2677
2678 static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
2679 {
2680         s32 offst_tmg;
2681
2682         offst_tmg  = STV090x_READ_DEMOD(state, TMGREG2) << 16;
2683         offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) <<  8;
2684         offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
2685
2686         offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
2687         if (!offst_tmg)
2688                 offst_tmg = 1;
2689
2690         offst_tmg  = ((s32) srate * 10) / ((s32) 0x1000000 / offst_tmg);
2691         offst_tmg /= 320;
2692
2693         return offst_tmg;
2694 }
2695
2696 static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
2697 {
2698         u8 aclc = 0x29;
2699         s32 i;
2700         struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low;
2701
2702         if (state->internal->dev_ver == 0x20) {
2703                 car_loop                = stv090x_s2_crl_cut20;
2704                 car_loop_qpsk_low       = stv090x_s2_lowqpsk_crl_cut20;
2705                 car_loop_apsk_low       = stv090x_s2_apsk_crl_cut20;
2706         } else {
2707                 /* >= Cut 3 */
2708                 car_loop                = stv090x_s2_crl_cut30;
2709                 car_loop_qpsk_low       = stv090x_s2_lowqpsk_crl_cut30;
2710                 car_loop_apsk_low       = stv090x_s2_apsk_crl_cut30;
2711         }
2712
2713         if (modcod < STV090x_QPSK_12) {
2714                 i = 0;
2715                 while ((i < 3) && (modcod != car_loop_qpsk_low[i].modcod))
2716                         i++;
2717
2718                 if (i >= 3)
2719                         i = 2;
2720
2721         } else {
2722                 i = 0;
2723                 while ((i < 14) && (modcod != car_loop[i].modcod))
2724                         i++;
2725
2726                 if (i >= 14) {
2727                         i = 0;
2728                         while ((i < 11) && (modcod != car_loop_apsk_low[i].modcod))
2729                                 i++;
2730
2731                         if (i >= 11)
2732                                 i = 10;
2733                 }
2734         }
2735
2736         if (modcod <= STV090x_QPSK_25) {
2737                 if (pilots) {
2738                         if (state->srate <= 3000000)
2739                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_2;
2740                         else if (state->srate <= 7000000)
2741                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_5;
2742                         else if (state->srate <= 15000000)
2743                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_10;
2744                         else if (state->srate <= 25000000)
2745                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_20;
2746                         else
2747                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_30;
2748                 } else {
2749                         if (state->srate <= 3000000)
2750                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_2;
2751                         else if (state->srate <= 7000000)
2752                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_5;
2753                         else if (state->srate <= 15000000)
2754                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_10;
2755                         else if (state->srate <= 25000000)
2756                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_20;
2757                         else
2758                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_30;
2759                 }
2760
2761         } else if (modcod <= STV090x_8PSK_910) {
2762                 if (pilots) {
2763                         if (state->srate <= 3000000)
2764                                 aclc = car_loop[i].crl_pilots_on_2;
2765                         else if (state->srate <= 7000000)
2766                                 aclc = car_loop[i].crl_pilots_on_5;
2767                         else if (state->srate <= 15000000)
2768                                 aclc = car_loop[i].crl_pilots_on_10;
2769                         else if (state->srate <= 25000000)
2770                                 aclc = car_loop[i].crl_pilots_on_20;
2771                         else
2772                                 aclc = car_loop[i].crl_pilots_on_30;
2773                 } else {
2774                         if (state->srate <= 3000000)
2775                                 aclc = car_loop[i].crl_pilots_off_2;
2776                         else if (state->srate <= 7000000)
2777                                 aclc = car_loop[i].crl_pilots_off_5;
2778                         else if (state->srate <= 15000000)
2779                                 aclc = car_loop[i].crl_pilots_off_10;
2780                         else if (state->srate <= 25000000)
2781                                 aclc = car_loop[i].crl_pilots_off_20;
2782                         else
2783                                 aclc = car_loop[i].crl_pilots_off_30;
2784                 }
2785         } else { /* 16APSK and 32APSK */
2786                 /*
2787                  * This should never happen in practice, except if
2788                  * something is really wrong at the car_loop table.
2789                  */
2790                 if (i >= 11)
2791                         i = 10;
2792                 if (state->srate <= 3000000)
2793                         aclc = car_loop_apsk_low[i].crl_pilots_on_2;
2794                 else if (state->srate <= 7000000)
2795                         aclc = car_loop_apsk_low[i].crl_pilots_on_5;
2796                 else if (state->srate <= 15000000)
2797                         aclc = car_loop_apsk_low[i].crl_pilots_on_10;
2798                 else if (state->srate <= 25000000)
2799                         aclc = car_loop_apsk_low[i].crl_pilots_on_20;
2800                 else
2801                         aclc = car_loop_apsk_low[i].crl_pilots_on_30;
2802         }
2803
2804         return aclc;
2805 }
2806
2807 static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
2808 {
2809         struct stv090x_short_frame_crloop *short_crl = NULL;
2810         s32 index = 0;
2811         u8 aclc = 0x0b;
2812
2813         switch (state->modulation) {
2814         case STV090x_QPSK:
2815         default:
2816                 index = 0;
2817                 break;
2818         case STV090x_8PSK:
2819                 index = 1;
2820                 break;
2821         case STV090x_16APSK:
2822                 index = 2;
2823                 break;
2824         case STV090x_32APSK:
2825                 index = 3;
2826                 break;
2827         }
2828
2829         if (state->internal->dev_ver >= 0x30) {
2830                 /* Cut 3.0 and up */
2831                 short_crl = stv090x_s2_short_crl_cut30;
2832         } else {
2833                 /* Cut 2.0 and up: we don't support cuts older than 2.0 */
2834                 short_crl = stv090x_s2_short_crl_cut20;
2835         }
2836
2837         if (state->srate <= 3000000)
2838                 aclc = short_crl[index].crl_2;
2839         else if (state->srate <= 7000000)
2840                 aclc = short_crl[index].crl_5;
2841         else if (state->srate <= 15000000)
2842                 aclc = short_crl[index].crl_10;
2843         else if (state->srate <= 25000000)
2844                 aclc = short_crl[index].crl_20;
2845         else
2846                 aclc = short_crl[index].crl_30;
2847
2848         return aclc;
2849 }
2850
2851 static int stv090x_optimize_track(struct stv090x_state *state)
2852 {
2853         struct dvb_frontend *fe = &state->frontend;
2854
2855         enum stv090x_modcod modcod;
2856
2857         s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
2858         u32 reg;
2859
2860         srate  = stv090x_get_srate(state, state->internal->mclk);
2861         srate += stv090x_get_tmgoffst(state, srate);
2862
2863         switch (state->delsys) {
2864         case STV090x_DVBS1:
2865         case STV090x_DSS:
2866                 if (state->search_mode == STV090x_SEARCH_AUTO) {
2867                         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2868                         STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2869                         STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
2870                         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2871                                 goto err;
2872                 }
2873                 reg = STV090x_READ_DEMOD(state, DEMOD);
2874                 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
2875                 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x01);
2876                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2877                         goto err;
2878
2879                 if (state->internal->dev_ver >= 0x30) {
2880                         if (stv090x_get_viterbi(state) < 0)
2881                                 goto err;
2882
2883                         if (state->fec == STV090x_PR12) {
2884                                 if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x98) < 0)
2885                                         goto err;
2886                                 if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
2887                                         goto err;
2888                         } else {
2889                                 if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x18) < 0)
2890                                         goto err;
2891                                 if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
2892                                         goto err;
2893                         }
2894                 }
2895
2896                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
2897                         goto err;
2898                 break;
2899
2900         case STV090x_DVBS2:
2901                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2902                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
2903                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2904                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2905                         goto err;
2906                 if (state->internal->dev_ver >= 0x30) {
2907                         if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
2908                                 goto err;
2909                         if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
2910                                 goto err;
2911                 }
2912                 if (state->frame_len == STV090x_LONG_FRAME) {
2913                         reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2914                         modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2915                         pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2916                         aclc = stv090x_optimize_carloop(state, modcod, pilots);
2917                         if (modcod <= STV090x_QPSK_910) {
2918                                 STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
2919                         } else if (modcod <= STV090x_8PSK_910) {
2920                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2921                                         goto err;
2922                                 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2923                                         goto err;
2924                         }
2925                         if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
2926                                 if (modcod <= STV090x_16APSK_910) {
2927                                         if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2928                                                 goto err;
2929                                         if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2930                                                 goto err;
2931                                 } else {
2932                                         if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2933                                                 goto err;
2934                                         if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2935                                                 goto err;
2936                                 }
2937                         }
2938                 } else {
2939                         /*Carrier loop setting for short frame*/
2940                         aclc = stv090x_optimize_carloop_short(state);
2941                         if (state->modulation == STV090x_QPSK) {
2942                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
2943                                         goto err;
2944                         } else if (state->modulation == STV090x_8PSK) {
2945                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2946                                         goto err;
2947                                 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2948                                         goto err;
2949                         } else if (state->modulation == STV090x_16APSK) {
2950                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2951                                         goto err;
2952                                 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2953                                         goto err;
2954                         } else if (state->modulation == STV090x_32APSK)  {
2955                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2956                                         goto err;
2957                                 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2958                                         goto err;
2959                         }
2960                 }
2961
2962                 STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
2963                 break;
2964
2965         case STV090x_ERROR:
2966         default:
2967                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2968                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2969                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2970                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2971                         goto err;
2972                 break;
2973         }
2974
2975         f_1 = STV090x_READ_DEMOD(state, CFR2);
2976         f_0 = STV090x_READ_DEMOD(state, CFR1);
2977         reg = STV090x_READ_DEMOD(state, TMGOBS);
2978
2979         if (state->algo == STV090x_BLIND_SEARCH) {
2980                 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
2981                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2982                 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
2983                 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
2984                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2985                         goto err;
2986                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
2987                         goto err;
2988
2989                 if (stv090x_set_srate(state, srate) < 0)
2990                         goto err;
2991                 blind_tune = 1;
2992
2993                 if (stv090x_dvbs_track_crl(state) < 0)
2994                         goto err;
2995         }
2996
2997         if (state->internal->dev_ver >= 0x20) {
2998                 if ((state->search_mode == STV090x_SEARCH_DVBS1)        ||
2999                     (state->search_mode == STV090x_SEARCH_DSS)          ||
3000                     (state->search_mode == STV090x_SEARCH_AUTO)) {
3001
3002                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
3003                                 goto err;
3004                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
3005                                 goto err;
3006                 }
3007         }
3008
3009         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
3010                 goto err;
3011
3012         /* AUTO tracking MODE */
3013         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x80) < 0)
3014                 goto err;
3015         /* AUTO tracking MODE */
3016         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0)
3017                 goto err;
3018
3019         if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1) ||
3020             (state->srate < 10000000)) {
3021                 /* update initial carrier freq with the found freq offset */
3022                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
3023                         goto err;
3024                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
3025                         goto err;
3026                 state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
3027
3028                 if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1)) {
3029
3030                         if (state->algo != STV090x_WARM_SEARCH) {
3031
3032                                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
3033                                         goto err;
3034
3035                                 if (state->config->tuner_set_bandwidth) {
3036                                         if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
3037                                                 goto err_gateoff;
3038                                 }
3039
3040                                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
3041                                         goto err;
3042
3043                         }
3044                 }
3045                 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
3046                         msleep(50); /* blind search: wait 50ms for SR stabilization */
3047                 else
3048                         msleep(5);
3049
3050                 stv090x_get_lock_tmg(state);
3051
3052                 if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
3053                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
3054                                 goto err;
3055                         if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
3056                                 goto err;
3057                         if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
3058                                 goto err;
3059                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
3060                                 goto err;
3061
3062                         i = 0;
3063
3064                         while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
3065
3066                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
3067                                         goto err;
3068                                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
3069                                         goto err;
3070                                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
3071                                         goto err;
3072                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
3073                                         goto err;
3074                                 i++;
3075                         }
3076                 }
3077
3078         }
3079
3080         if (state->internal->dev_ver >= 0x20) {
3081                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
3082                         goto err;
3083         }
3084
3085         if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
3086                 stv090x_set_vit_thtracq(state);
3087
3088         return 0;
3089
3090 err_gateoff:
3091         stv090x_i2c_gate_ctrl(state, 0);
3092 err:
3093         dprintk(FE_ERROR, 1, "I/O error");
3094         return -1;
3095 }
3096
3097 static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
3098 {
3099         s32 timer = 0, lock = 0, stat;
3100         u32 reg;
3101
3102         while ((timer < timeout) && (!lock)) {
3103                 reg = STV090x_READ_DEMOD(state, DMDSTATE);
3104                 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3105
3106                 switch (stat) {
3107                 case 0: /* searching */
3108                 case 1: /* first PLH detected */
3109                 default:
3110                         lock = 0;
3111                         break;
3112
3113                 case 2: /* DVB-S2 mode */
3114                         reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
3115                         lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
3116                         break;
3117
3118                 case 3: /* DVB-S1/legacy mode */
3119                         reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3120                         lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
3121                         break;
3122                 }
3123                 if (!lock) {
3124                         msleep(10);
3125                         timer += 10;
3126                 }
3127         }
3128         return lock;
3129 }
3130
3131 static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
3132 {
3133         u32 reg;
3134         s32 timer = 0;
3135         int lock;
3136
3137         lock = stv090x_get_dmdlock(state, timeout_dmd);
3138         if (lock)
3139                 lock = stv090x_get_feclock(state, timeout_fec);
3140
3141         if (lock) {
3142                 lock = 0;
3143
3144                 while ((timer < timeout_fec) && (!lock)) {
3145                         reg = STV090x_READ_DEMOD(state, TSSTATUS);
3146                         lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
3147                         msleep(1);
3148                         timer++;
3149                 }
3150         }
3151
3152         return lock;
3153 }
3154
3155 static int stv090x_set_s2rolloff(struct stv090x_state *state)
3156 {
3157         u32 reg;
3158
3159         if (state->internal->dev_ver <= 0x20) {
3160                 /* rolloff to auto mode if DVBS2 */
3161                 reg = STV090x_READ_DEMOD(state, DEMOD);
3162                 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00);
3163                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3164                         goto err;
3165         } else {
3166                 /* DVB-S2 rolloff to auto mode if DVBS2 */
3167                 reg = STV090x_READ_DEMOD(state, DEMOD);
3168                 STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 0x00);
3169                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3170                         goto err;
3171         }
3172         return 0;
3173 err:
3174         dprintk(FE_ERROR, 1, "I/O error");
3175         return -1;
3176 }
3177
3178
3179 static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3180 {
3181         struct dvb_frontend *fe = &state->frontend;
3182         enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
3183         u32 reg;
3184         s32 agc1_power, power_iq = 0, i;
3185         int lock = 0, low_sr = 0;
3186
3187         reg = STV090x_READ_DEMOD(state, TSCFGH);
3188         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
3189         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3190                 goto err;
3191
3192         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
3193                 goto err;
3194
3195         if (state->internal->dev_ver >= 0x20) {
3196                 if (state->srate > 5000000) {
3197                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
3198                                 goto err;
3199                 } else {
3200                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x82) < 0)
3201                                 goto err;
3202                 }
3203         }
3204
3205         stv090x_get_lock_tmg(state);
3206
3207         if (state->algo == STV090x_BLIND_SEARCH) {
3208                 state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
3209                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0) /* wider srate scan */
3210                         goto err;
3211                 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
3212                         goto err;
3213                 if (stv090x_set_srate(state, 1000000) < 0) /* initial srate = 1Msps */
3214                         goto err;
3215         } else {
3216                 /* known srate */
3217                 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
3218                         goto err;
3219                 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
3220                         goto err;
3221
3222                 if (state->srate < 2000000) {
3223                         /* SR < 2MSPS */
3224                         if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x63) < 0)
3225                                 goto err;
3226                 } else {
3227                         /* SR >= 2Msps */
3228                         if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
3229                                 goto err;
3230                 }
3231
3232                 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
3233                         goto err;
3234
3235                 if (state->internal->dev_ver >= 0x20) {
3236                         if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
3237                                 goto err;
3238                         if (state->algo == STV090x_COLD_SEARCH)
3239                                 state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
3240                         else if (state->algo == STV090x_WARM_SEARCH)
3241                                 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
3242                 }
3243
3244                 /* if cold start or warm  (Symbolrate is known)
3245                  * use a Narrow symbol rate scan range
3246                  */
3247                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0) /* narrow srate scan */
3248                         goto err;
3249
3250                 if (stv090x_set_srate(state, state->srate) < 0)
3251                         goto err;
3252
3253                 if (stv090x_set_max_srate(state, state->internal->mclk,
3254                                           state->srate) < 0)
3255                         goto err;
3256                 if (stv090x_set_min_srate(state, state->internal->mclk,
3257                                           state->srate) < 0)
3258                         goto err;
3259
3260                 if (state->srate >= 10000000)
3261                         low_sr = 0;
3262                 else
3263                         low_sr = 1;
3264         }
3265
3266         /* Setup tuner */
3267         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
3268                 goto err;
3269
3270         if (state->config->tuner_set_bbgain) {
3271                 reg = state->config->tuner_bbgain;
3272                 if (reg == 0)
3273                         reg = 10; /* default: 10dB */
3274                 if (state->config->tuner_set_bbgain(fe, reg) < 0)
3275                         goto err_gateoff;
3276         }
3277
3278         if (state->config->tuner_set_frequency) {
3279                 if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
3280                         goto err_gateoff;
3281         }
3282
3283         if (state->config->tuner_set_bandwidth) {
3284                 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
3285                         goto err_gateoff;
3286         }
3287
3288         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
3289                 goto err;
3290
3291         msleep(50);
3292
3293         if (state->config->tuner_get_status) {
3294                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
3295                         goto err;
3296                 if (state->config->tuner_get_status(fe, &reg) < 0)
3297                         goto err_gateoff;
3298                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
3299                         goto err;
3300
3301                 if (reg)
3302                         dprintk(FE_DEBUG, 1, "Tuner phase locked");
3303                 else {
3304                         dprintk(FE_DEBUG, 1, "Tuner unlocked");
3305                         return STV090x_NOCARRIER;
3306                 }
3307         }
3308
3309         msleep(10);
3310         agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1),
3311                                 STV090x_READ_DEMOD(state, AGCIQIN0));
3312
3313         if (agc1_power == 0) {
3314                 /* If AGC1 integrator value is 0
3315                  * then read POWERI, POWERQ
3316                  */
3317                 for (i = 0; i < 5; i++) {
3318                         power_iq += (STV090x_READ_DEMOD(state, POWERI) +
3319                                      STV090x_READ_DEMOD(state, POWERQ)) >> 1;
3320                 }
3321                 power_iq /= 5;
3322         }
3323
3324         if ((agc1_power == 0) && (power_iq < STV090x_IQPOWER_THRESHOLD)) {
3325                 dprintk(FE_ERROR, 1, "No Signal: POWER_IQ=0x%02x", power_iq);
3326                 lock = 0;
3327                 signal_state = STV090x_NOAGC1;
3328         } else {
3329                 reg = STV090x_READ_DEMOD(state, DEMOD);
3330                 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
3331
3332                 if (state->internal->dev_ver <= 0x20) {
3333                         /* rolloff to auto mode if DVBS2 */
3334                         STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1);
3335                 } else {
3336                         /* DVB-S2 rolloff to auto mode if DVBS2 */
3337                         STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 1);
3338                 }
3339                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3340                         goto err;
3341
3342                 if (stv090x_delivery_search(state) < 0)
3343                         goto err;
3344
3345                 if (state->algo != STV090x_BLIND_SEARCH) {
3346                         if (stv090x_start_search(state) < 0)
3347                                 goto err;
3348                 }
3349         }
3350
3351         if (signal_state == STV090x_NOAGC1)
3352                 return signal_state;
3353
3354         if (state->algo == STV090x_BLIND_SEARCH)
3355                 lock = stv090x_blind_search(state);
3356
3357         else if (state->algo == STV090x_COLD_SEARCH)
3358                 lock = stv090x_get_coldlock(state, state->DemodTimeout);
3359
3360         else if (state->algo == STV090x_WARM_SEARCH)
3361                 lock = stv090x_get_dmdlock(state, state->DemodTimeout);
3362
3363         if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
3364                 if (!low_sr) {
3365                         if (stv090x_chk_tmg(state))
3366                                 lock = stv090x_sw_algo(state);
3367                 }
3368         }
3369
3370         if (lock)
3371                 signal_state = stv090x_get_sig_params(state);
3372
3373         if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
3374                 stv090x_optimize_track(state);
3375
3376                 if (state->internal->dev_ver >= 0x20) {
3377                         /* >= Cut 2.0 :release TS reset after
3378                          * demod lock and optimized Tracking
3379                          */
3380                         reg = STV090x_READ_DEMOD(state, TSCFGH);
3381                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3382                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3383                                 goto err;
3384
3385                         msleep(3);
3386
3387                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3388                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3389                                 goto err;
3390
3391                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3392                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3393                                 goto err;
3394                 }
3395
3396                 lock = stv090x_get_lock(state, state->FecTimeout,
3397                                 state->FecTimeout);
3398                 if (lock) {
3399                         if (state->delsys == STV090x_DVBS2) {
3400                                 stv090x_set_s2rolloff(state);
3401
3402                                 reg = STV090x_READ_DEMOD(state, PDELCTRL2);
3403                                 STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 1);
3404                                 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
3405                                         goto err;
3406                                 /* Reset DVBS2 packet delinator error counter */
3407                                 reg = STV090x_READ_DEMOD(state, PDELCTRL2);
3408                                 STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 0);
3409                                 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
3410                                         goto err;
3411
3412                                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
3413                                         goto err;
3414                         } else {
3415                                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
3416                                         goto err;
3417                         }
3418                         /* Reset the Total packet counter */
3419                         if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
3420                                 goto err;
3421                         /* Reset the packet Error counter2 */
3422                         if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3423                                 goto err;
3424                 } else {
3425                         signal_state = STV090x_NODATA;
3426                         stv090x_chk_signal(state);
3427                 }
3428         }
3429         return signal_state;
3430
3431 err_gateoff:
3432         stv090x_i2c_gate_ctrl(state, 0);
3433 err:
3434         dprintk(FE_ERROR, 1, "I/O error");
3435         return -1;
3436 }
3437
3438 static int stv090x_set_mis(struct stv090x_state *state, int mis)
3439 {
3440         u32 reg;
3441
3442         if (mis < 0 || mis > 255) {
3443                 dprintk(FE_DEBUG, 1, "Disable MIS filtering");
3444                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3445                 STV090x_SETFIELD_Px(reg, FILTER_EN_FIELD, 0x00);
3446                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3447                         goto err;
3448         } else {
3449                 dprintk(FE_DEBUG, 1, "Enable MIS filtering - %d", mis);
3450                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3451                 STV090x_SETFIELD_Px(reg, FILTER_EN_FIELD, 0x01);
3452                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3453                         goto err;
3454                 if (STV090x_WRITE_DEMOD(state, ISIENTRY, mis) < 0)
3455                         goto err;
3456                 if (STV090x_WRITE_DEMOD(state, ISIBITENA, 0xff) < 0)
3457                         goto err;
3458         }
3459         return 0;
3460 err:
3461         dprintk(FE_ERROR, 1, "I/O error");
3462         return -1;
3463 }
3464
3465 static enum dvbfe_search stv090x_search(struct dvb_frontend *fe)
3466 {
3467         struct stv090x_state *state = fe->demodulator_priv;
3468         struct dtv_frontend_properties *props = &fe->dtv_property_cache;
3469
3470         if (props->frequency == 0)
3471                 return DVBFE_ALGO_SEARCH_INVALID;
3472
3473         switch (props->delivery_system) {
3474         case SYS_DSS:
3475                 state->delsys = STV090x_DSS;
3476                 break;
3477         case SYS_DVBS:
3478                 state->delsys = STV090x_DVBS1;
3479                 break;
3480         case SYS_DVBS2:
3481                 state->delsys = STV090x_DVBS2;
3482                 break;
3483         default:
3484                 return DVBFE_ALGO_SEARCH_INVALID;
3485         }
3486
3487         state->frequency = props->frequency;
3488         state->srate = props->symbol_rate;
3489         state->search_mode = STV090x_SEARCH_AUTO;
3490         state->algo = STV090x_COLD_SEARCH;
3491         state->fec = STV090x_PRERR;
3492         if (state->srate > 10000000) {
3493                 dprintk(FE_DEBUG, 1, "Search range: 10 MHz");
3494                 state->search_range = 10000000;
3495         } else {
3496                 dprintk(FE_DEBUG, 1, "Search range: 5 MHz");
3497                 state->search_range = 5000000;
3498         }
3499
3500         stv090x_set_mis(state, props->stream_id);
3501
3502         if (stv090x_algo(state) == STV090x_RANGEOK) {
3503                 dprintk(FE_DEBUG, 1, "Search success!");
3504                 return DVBFE_ALGO_SEARCH_SUCCESS;
3505         } else {
3506                 dprintk(FE_DEBUG, 1, "Search failed!");
3507                 return DVBFE_ALGO_SEARCH_FAILED;
3508         }
3509
3510         return DVBFE_ALGO_SEARCH_ERROR;
3511 }
3512
3513 static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
3514 {
3515         struct stv090x_state *state = fe->demodulator_priv;
3516         u32 reg, dstatus;
3517         u8 search_state;
3518
3519         *status = 0;
3520
3521         dstatus = STV090x_READ_DEMOD(state, DSTATUS);
3522         if (STV090x_GETFIELD_Px(dstatus, CAR_LOCK_FIELD))
3523                 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
3524
3525         reg = STV090x_READ_DEMOD(state, DMDSTATE);
3526         search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3527
3528         switch (search_state) {
3529         case 0: /* searching */
3530         case 1: /* first PLH detected */
3531         default:
3532                 dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
3533                 break;
3534
3535         case 2: /* DVB-S2 mode */
3536                 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
3537                 if (STV090x_GETFIELD_Px(dstatus, LOCK_DEFINITIF_FIELD)) {
3538                         reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
3539                         if (STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD)) {
3540                                 *status |= FE_HAS_VITERBI;
3541                                 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3542                                 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD))
3543                                         *status |= FE_HAS_SYNC | FE_HAS_LOCK;
3544                         }
3545                 }
3546                 break;
3547
3548         case 3: /* DVB-S1/legacy mode */
3549                 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
3550                 if (STV090x_GETFIELD_Px(dstatus, LOCK_DEFINITIF_FIELD)) {
3551                         reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3552                         if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
3553                                 *status |= FE_HAS_VITERBI;
3554                                 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3555                                 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD))
3556                                         *status |= FE_HAS_SYNC | FE_HAS_LOCK;
3557                         }
3558                 }
3559                 break;
3560         }
3561
3562         return 0;
3563 }
3564
3565 static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
3566 {
3567         struct stv090x_state *state = fe->demodulator_priv;
3568
3569         s32 count_4, count_3, count_2, count_1, count_0, count;
3570         u32 reg, h, m, l;
3571         enum fe_status status;
3572
3573         stv090x_read_status(fe, &status);
3574         if (!(status & FE_HAS_LOCK)) {
3575                 *per = 1 << 23; /* Max PER */
3576         } else {
3577                 /* Counter 2 */
3578                 reg = STV090x_READ_DEMOD(state, ERRCNT22);
3579                 h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
3580
3581                 reg = STV090x_READ_DEMOD(state, ERRCNT21);
3582                 m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
3583
3584                 reg = STV090x_READ_DEMOD(state, ERRCNT20);
3585                 l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
3586
3587                 *per = ((h << 16) | (m << 8) | l);
3588
3589                 count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
3590                 count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
3591                 count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
3592                 count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
3593                 count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
3594
3595                 if ((!count_4) && (!count_3)) {
3596                         count  = (count_2 & 0xff) << 16;
3597                         count |= (count_1 & 0xff) <<  8;
3598                         count |=  count_0 & 0xff;
3599                 } else {
3600                         count = 1 << 24;
3601                 }
3602                 if (count == 0)
3603                         *per = 1;
3604         }
3605         if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
3606                 goto err;
3607         if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3608                 goto err;
3609
3610         return 0;
3611 err:
3612         dprintk(FE_ERROR, 1, "I/O error");
3613         return -1;
3614 }
3615
3616 static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
3617 {
3618         int res = 0;
3619         int min = 0, med;
3620
3621         if ((val >= tab[min].read && val < tab[max].read) ||
3622             (val >= tab[max].read && val < tab[min].read)) {
3623                 while ((max - min) > 1) {
3624                         med = (max + min) / 2;
3625                         if ((val >= tab[min].read && val < tab[med].read) ||
3626                             (val >= tab[med].read && val < tab[min].read))
3627                                 max = med;
3628                         else
3629                                 min = med;
3630                 }
3631                 res = ((val - tab[min].read) *
3632                        (tab[max].real - tab[min].real) /
3633                        (tab[max].read - tab[min].read)) +
3634                         tab[min].real;
3635         } else {
3636                 if (tab[min].read < tab[max].read) {
3637                         if (val < tab[min].read)
3638                                 res = tab[min].real;
3639                         else if (val >= tab[max].read)
3640                                 res = tab[max].real;
3641                 } else {
3642                         if (val >= tab[min].read)
3643                                 res = tab[min].real;
3644                         else if (val < tab[max].read)
3645                                 res = tab[max].real;
3646                 }
3647         }
3648
3649         return res;
3650 }
3651
3652 static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
3653 {
3654         struct stv090x_state *state = fe->demodulator_priv;
3655         u32 reg;
3656         s32 agc_0, agc_1, agc;
3657         s32 str;
3658
3659         reg = STV090x_READ_DEMOD(state, AGCIQIN1);
3660         agc_1 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3661         reg = STV090x_READ_DEMOD(state, AGCIQIN0);
3662         agc_0 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3663         agc = MAKEWORD16(agc_1, agc_0);
3664
3665         str = stv090x_table_lookup(stv090x_rf_tab,
3666                 ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
3667         if (agc > stv090x_rf_tab[0].read)
3668                 str = 0;
3669         else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
3670                 str = -100;
3671         *strength = (str + 100) * 0xFFFF / 100;
3672
3673         return 0;
3674 }
3675
3676 static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
3677 {
3678         struct stv090x_state *state = fe->demodulator_priv;
3679         u32 reg_0, reg_1, reg, i;
3680         s32 val_0, val_1, val = 0;
3681         u8 lock_f;
3682         s32 div;
3683         u32 last;
3684
3685         switch (state->delsys) {
3686         case STV090x_DVBS2:
3687                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3688                 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3689                 if (lock_f) {
3690                         msleep(5);
3691                         for (i = 0; i < 16; i++) {
3692                                 reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
3693                                 val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3694                                 reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
3695                                 val_0 = STV090x_GETFIELD_Px(reg_0, NOSPLHT_NORMED_FIELD);
3696                                 val  += MAKEWORD16(val_1, val_0);
3697                                 msleep(1);
3698                         }
3699                         val /= 16;
3700                         last = ARRAY_SIZE(stv090x_s2cn_tab) - 1;
3701                         div = stv090x_s2cn_tab[0].read -
3702                               stv090x_s2cn_tab[last].read;
3703                         *cnr = 0xFFFF - ((val * 0xFFFF) / div);
3704                 }
3705                 break;
3706
3707         case STV090x_DVBS1:
3708         case STV090x_DSS:
3709                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3710                 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3711                 if (lock_f) {
3712                         msleep(5);
3713                         for (i = 0; i < 16; i++) {
3714                                 reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
3715                                 val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3716                                 reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
3717                                 val_0 = STV090x_GETFIELD_Px(reg_0, NOSDATAT_UNNORMED_FIELD);
3718                                 val  += MAKEWORD16(val_1, val_0);
3719                                 msleep(1);
3720                         }
3721                         val /= 16;
3722                         last = ARRAY_SIZE(stv090x_s1cn_tab) - 1;
3723                         div = stv090x_s1cn_tab[0].read -
3724                               stv090x_s1cn_tab[last].read;
3725                         *cnr = 0xFFFF - ((val * 0xFFFF) / div);
3726                 }
3727                 break;
3728         default:
3729                 break;
3730         }
3731
3732         return 0;
3733 }
3734
3735 static int stv090x_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
3736 {
3737         struct stv090x_state *state = fe->demodulator_priv;
3738         u32 reg;
3739
3740         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3741         switch (tone) {
3742         case SEC_TONE_ON:
3743                 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3744                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3745                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3746                         goto err;
3747                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3748                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3749                         goto err;
3750                 break;
3751
3752         case SEC_TONE_OFF:
3753                 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3754                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3755                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3756                         goto err;
3757                 break;
3758         default:
3759                 return -EINVAL;
3760         }
3761
3762         return 0;
3763 err:
3764         dprintk(FE_ERROR, 1, "I/O error");
3765         return -1;
3766 }
3767
3768
3769 static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
3770 {
3771         return DVBFE_ALGO_CUSTOM;
3772 }
3773
3774 static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
3775 {
3776         struct stv090x_state *state = fe->demodulator_priv;
3777         u32 reg, idle = 0, fifo_full = 1;
3778         int i;
3779
3780         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3781
3782         STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD,
3783                 (state->config->diseqc_envelope_mode) ? 4 : 2);
3784         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3785         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3786                 goto err;
3787         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3788         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3789                 goto err;
3790
3791         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3792         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3793                 goto err;
3794
3795         for (i = 0; i < cmd->msg_len; i++) {
3796
3797                 while (fifo_full) {
3798                         reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3799                         fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3800                 }
3801
3802                 if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
3803                         goto err;
3804         }
3805         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3806         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3807         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3808                 goto err;
3809
3810         i = 0;
3811
3812         while ((!idle) && (i < 10)) {
3813                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3814                 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3815                 msleep(10);
3816                 i++;
3817         }
3818
3819         return 0;
3820 err:
3821         dprintk(FE_ERROR, 1, "I/O error");
3822         return -1;
3823 }
3824
3825 static int stv090x_send_diseqc_burst(struct dvb_frontend *fe,
3826                                      enum fe_sec_mini_cmd burst)
3827 {
3828         struct stv090x_state *state = fe->demodulator_priv;
3829         u32 reg, idle = 0, fifo_full = 1;
3830         u8 mode, value;
3831         int i;
3832
3833         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3834
3835         if (burst == SEC_MINI_A) {
3836                 mode = (state->config->diseqc_envelope_mode) ? 5 : 3;
3837                 value = 0x00;
3838         } else {
3839                 mode = (state->config->diseqc_envelope_mode) ? 4 : 2;
3840                 value = 0xFF;
3841         }
3842
3843         STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, mode);
3844         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3845         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3846                 goto err;
3847         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3848         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3849                 goto err;
3850
3851         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3852         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3853                 goto err;
3854
3855         while (fifo_full) {
3856                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3857                 fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3858         }
3859
3860         if (STV090x_WRITE_DEMOD(state, DISTXDATA, value) < 0)
3861                 goto err;
3862
3863         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3864         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3865         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3866                 goto err;
3867
3868         i = 0;
3869
3870         while ((!idle) && (i < 10)) {
3871                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3872                 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3873                 msleep(10);
3874                 i++;
3875         }
3876
3877         return 0;
3878 err:
3879         dprintk(FE_ERROR, 1, "I/O error");
3880         return -1;
3881 }
3882
3883 static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
3884 {
3885         struct stv090x_state *state = fe->demodulator_priv;
3886         u32 reg = 0, i = 0, rx_end = 0;
3887
3888         while ((rx_end != 1) && (i < 10)) {
3889                 msleep(10);
3890                 i++;
3891                 reg = STV090x_READ_DEMOD(state, DISRX_ST0);
3892                 rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
3893         }
3894
3895         if (rx_end) {
3896                 reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
3897                 for (i = 0; i < reply->msg_len; i++)
3898                         reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
3899         }
3900
3901         return 0;
3902 }
3903
3904 static int stv090x_sleep(struct dvb_frontend *fe)
3905 {
3906         struct stv090x_state *state = fe->demodulator_priv;
3907         u32 reg;
3908         u8 full_standby = 0;
3909
3910         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
3911                 goto err;
3912
3913         if (state->config->tuner_sleep) {
3914                 if (state->config->tuner_sleep(fe) < 0)
3915                         goto err_gateoff;
3916         }
3917
3918         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
3919                 goto err;
3920
3921         dprintk(FE_DEBUG, 1, "Set %s(%d) to sleep",
3922                 state->device == STV0900 ? "STV0900" : "STV0903",
3923                 state->demod);
3924
3925         mutex_lock(&state->internal->demod_lock);
3926
3927         switch (state->demod) {
3928         case STV090x_DEMODULATOR_0:
3929                 /* power off ADC 1 */
3930                 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3931                 STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
3932                 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3933                         goto err_unlock;
3934                 /* power off DiSEqC 1 */
3935                 reg = stv090x_read_reg(state, STV090x_TSTTNR2);
3936                 STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 0);
3937                 if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
3938                         goto err_unlock;
3939
3940                 /* check whether path 2 is already sleeping, that is when
3941                    ADC2 is off */
3942                 reg = stv090x_read_reg(state, STV090x_TSTTNR3);
3943                 if (STV090x_GETFIELD(reg, ADC2_PON_FIELD) == 0)
3944                         full_standby = 1;
3945
3946                 /* stop clocks */
3947                 reg = stv090x_read_reg(state, STV090x_STOPCLK1);
3948                 /* packet delineator 1 clock */
3949                 STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 1);
3950                 /* ADC 1 clock */
3951                 STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 1);
3952                 /* FEC clock is shared between the two paths, only stop it
3953                    when full standby is possible */
3954                 if (full_standby)
3955                         STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
3956                 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
3957                         goto err_unlock;
3958                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
3959                 /* sampling 1 clock */
3960                 STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 1);
3961                 /* viterbi 1 clock */
3962                 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 1);
3963                 /* TS clock is shared between the two paths, only stop it
3964                    when full standby is possible */
3965                 if (full_standby)
3966                         STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
3967                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
3968                         goto err_unlock;
3969                 break;
3970
3971         case STV090x_DEMODULATOR_1:
3972                 /* power off ADC 2 */
3973                 reg = stv090x_read_reg(state, STV090x_TSTTNR3);
3974                 STV090x_SETFIELD(reg, ADC2_PON_FIELD, 0);
3975                 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
3976                         goto err_unlock;
3977                 /* power off DiSEqC 2 */
3978                 reg = stv090x_read_reg(state, STV090x_TSTTNR4);
3979                 STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 0);
3980                 if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
3981                         goto err_unlock;
3982
3983                 /* check whether path 1 is already sleeping, that is when
3984                    ADC1 is off */
3985                 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3986                 if (STV090x_GETFIELD(reg, ADC1_PON_FIELD) == 0)
3987                         full_standby = 1;
3988
3989                 /* stop clocks */
3990                 reg = stv090x_read_reg(state, STV090x_STOPCLK1);
3991                 /* packet delineator 2 clock */
3992                 STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 1);
3993                 /* ADC 2 clock */
3994                 STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 1);
3995                 /* FEC clock is shared between the two paths, only stop it
3996                    when full standby is possible */
3997                 if (full_standby)
3998                         STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
3999                 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
4000                         goto err_unlock;
4001                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
4002                 /* sampling 2 clock */
4003                 STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 1);
4004                 /* viterbi 2 clock */
4005                 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 1);
4006                 /* TS clock is shared between the two paths, only stop it
4007                    when full standby is possible */
4008                 if (full_standby)
4009                         STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
4010                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
4011                         goto err_unlock;
4012                 break;
4013
4014         default:
4015                 dprintk(FE_ERROR, 1, "Wrong demodulator!");
4016                 break;
4017         }
4018
4019         if (full_standby) {
4020                 /* general power off */
4021                 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
4022                 STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
4023                 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
4024                         goto err_unlock;
4025         }
4026
4027         mutex_unlock(&state->internal->demod_lock);
4028         return 0;
4029
4030 err_gateoff:
4031         stv090x_i2c_gate_ctrl(state, 0);
4032         goto err;
4033 err_unlock:
4034         mutex_unlock(&state->internal->demod_lock);
4035 err:
4036         dprintk(FE_ERROR, 1, "I/O error");
4037         return -1;
4038 }
4039
4040 static int stv090x_wakeup(struct dvb_frontend *fe)
4041 {
4042         struct stv090x_state *state = fe->demodulator_priv;
4043         u32 reg;
4044
4045         dprintk(FE_DEBUG, 1, "Wake %s(%d) from standby",
4046                 state->device == STV0900 ? "STV0900" : "STV0903",
4047                 state->demod);
4048
4049         mutex_lock(&state->internal->demod_lock);
4050
4051         /* general power on */
4052         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
4053         STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
4054         if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
4055                 goto err;
4056
4057         switch (state->demod) {
4058         case STV090x_DEMODULATOR_0:
4059                 /* power on ADC 1 */
4060                 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
4061                 STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
4062                 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
4063                         goto err;
4064                 /* power on DiSEqC 1 */
4065                 reg = stv090x_read_reg(state, STV090x_TSTTNR2);
4066                 STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 1);
4067                 if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
4068                         goto err;
4069
4070                 /* activate clocks */
4071                 reg = stv090x_read_reg(state, STV090x_STOPCLK1);
4072                 /* packet delineator 1 clock */
4073                 STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 0);
4074                 /* ADC 1 clock */
4075                 STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 0);
4076                 /* FEC clock */
4077                 STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
4078                 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
4079                         goto err;
4080                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
4081                 /* sampling 1 clock */
4082                 STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 0);
4083                 /* viterbi 1 clock */
4084                 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 0);
4085                 /* TS clock */
4086                 STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
4087                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
4088                         goto err;
4089                 break;
4090
4091         case STV090x_DEMODULATOR_1:
4092                 /* power on ADC 2 */
4093                 reg = stv090x_read_reg(state, STV090x_TSTTNR3);
4094                 STV090x_SETFIELD(reg, ADC2_PON_FIELD, 1);
4095                 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
4096                         goto err;
4097                 /* power on DiSEqC 2 */
4098                 reg = stv090x_read_reg(state, STV090x_TSTTNR4);
4099                 STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 1);
4100                 if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
4101                         goto err;
4102
4103                 /* activate clocks */
4104                 reg = stv090x_read_reg(state, STV090x_STOPCLK1);
4105                 /* packet delineator 2 clock */
4106                 STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 0);
4107                 /* ADC 2 clock */
4108                 STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 0);
4109                 /* FEC clock */
4110                 STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
4111                 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
4112                         goto err;
4113                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
4114                 /* sampling 2 clock */
4115                 STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 0);
4116                 /* viterbi 2 clock */
4117                 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 0);
4118                 /* TS clock */
4119                 STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
4120                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
4121                         goto err;
4122                 break;
4123
4124         default:
4125                 dprintk(FE_ERROR, 1, "Wrong demodulator!");
4126                 break;
4127         }
4128
4129         mutex_unlock(&state->internal->demod_lock);
4130         return 0;
4131 err:
4132         mutex_unlock(&state->internal->demod_lock);
4133         dprintk(FE_ERROR, 1, "I/O error");
4134         return -1;
4135 }
4136
4137 static void stv090x_release(struct dvb_frontend *fe)
4138 {
4139         struct stv090x_state *state = fe->demodulator_priv;
4140
4141         state->internal->num_used--;
4142         if (state->internal->num_used <= 0) {
4143
4144                 dprintk(FE_ERROR, 1, "Actually removing");
4145
4146                 remove_dev(state->internal);
4147                 kfree(state->internal);
4148         }
4149
4150         kfree(state);
4151 }
4152
4153 static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
4154 {
4155         u32 reg = 0;
4156
4157         reg = stv090x_read_reg(state, STV090x_GENCFG);
4158
4159         switch (ldpc_mode) {
4160         case STV090x_DUAL:
4161         default:
4162                 if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
4163                         /* set LDPC to dual mode */
4164                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0)
4165                                 goto err;
4166
4167                         state->demod_mode = STV090x_DUAL;
4168
4169                         reg = stv090x_read_reg(state, STV090x_TSTRES0);
4170                         STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
4171                         if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
4172                                 goto err;
4173                         STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
4174                         if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
4175                                 goto err;
4176
4177                         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
4178                                 goto err;
4179                         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
4180                                 goto err;
4181                         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
4182                                 goto err;
4183                         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
4184                                 goto err;
4185                         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
4186                                 goto err;
4187                         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
4188                                 goto err;
4189                         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
4190                                 goto err;
4191
4192                         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
4193                                 goto err;
4194                         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
4195                                 goto err;
4196                         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
4197                                 goto err;
4198                         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
4199                                 goto err;
4200                         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
4201                                 goto err;
4202                         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
4203                                 goto err;
4204                         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
4205                                 goto err;
4206
4207                         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
4208                                 goto err;
4209                         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
4210                                 goto err;
4211                 }
4212                 break;
4213
4214         case STV090x_SINGLE:
4215                 if (stv090x_stop_modcod(state) < 0)
4216                         goto err;
4217                 if (stv090x_activate_modcod_single(state) < 0)
4218                         goto err;
4219
4220                 if (state->demod == STV090x_DEMODULATOR_1) {
4221                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
4222                                 goto err;
4223                 } else {
4224                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
4225                                 goto err;
4226                 }
4227
4228                 reg = stv090x_read_reg(state, STV090x_TSTRES0);
4229                 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
4230                 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
4231                         goto err;
4232                 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
4233                 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
4234                         goto err;
4235
4236                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
4237                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
4238                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
4239                         goto err;
4240                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
4241                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
4242                         goto err;
4243                 break;
4244         }
4245
4246         return 0;
4247 err:
4248         dprintk(FE_ERROR, 1, "I/O error");
4249         return -1;
4250 }
4251
4252 /* return (Hz), clk in Hz*/
4253 static u32 stv090x_get_mclk(struct stv090x_state *state)
4254 {
4255         const struct stv090x_config *config = state->config;
4256         u32 div, reg;
4257         u8 ratio;
4258
4259         div = stv090x_read_reg(state, STV090x_NCOARSE);
4260         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
4261         ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
4262
4263         return (div + 1) * config->xtal / ratio; /* kHz */
4264 }
4265
4266 static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
4267 {
4268         const struct stv090x_config *config = state->config;
4269         u32 reg, div, clk_sel;
4270
4271         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
4272         clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
4273
4274         div = ((clk_sel * mclk) / config->xtal) - 1;
4275
4276         reg = stv090x_read_reg(state, STV090x_NCOARSE);
4277         STV090x_SETFIELD(reg, M_DIV_FIELD, div);
4278         if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
4279                 goto err;
4280
4281         state->internal->mclk = stv090x_get_mclk(state);
4282
4283         /*Set the DiseqC frequency to 22KHz */
4284         div = state->internal->mclk / 704000;
4285         if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
4286                 goto err;
4287         if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
4288                 goto err;
4289
4290         return 0;
4291 err:
4292         dprintk(FE_ERROR, 1, "I/O error");
4293         return -1;
4294 }
4295
4296 static int stv0900_set_tspath(struct stv090x_state *state)
4297 {
4298         u32 reg;
4299
4300         if (state->internal->dev_ver >= 0x20) {
4301                 switch (state->config->ts1_mode) {
4302                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4303                 case STV090x_TSMODE_DVBCI:
4304                         switch (state->config->ts2_mode) {
4305                         case STV090x_TSMODE_SERIAL_PUNCTURED:
4306                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4307                         default:
4308                                 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
4309                                 break;
4310
4311                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4312                         case STV090x_TSMODE_DVBCI:
4313                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
4314                                         goto err;
4315                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4316                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4317                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4318                                         goto err;
4319                                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
4320                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4321                                 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
4322                                         goto err;
4323                                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
4324                                         goto err;
4325                                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
4326                                         goto err;
4327                                 break;
4328                         }
4329                         break;
4330
4331                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4332                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4333                 default:
4334                         switch (state->config->ts2_mode) {
4335                         case STV090x_TSMODE_SERIAL_PUNCTURED:
4336                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4337                         default:
4338                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
4339                                         goto err;
4340                                 break;
4341
4342                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4343                         case STV090x_TSMODE_DVBCI:
4344                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
4345                                         goto err;
4346                                 break;
4347                         }
4348                         break;
4349                 }
4350         } else {
4351                 switch (state->config->ts1_mode) {
4352                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4353                 case STV090x_TSMODE_DVBCI:
4354                         switch (state->config->ts2_mode) {
4355                         case STV090x_TSMODE_SERIAL_PUNCTURED:
4356                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4357                         default:
4358                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
4359                                 break;
4360
4361                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4362                         case STV090x_TSMODE_DVBCI:
4363                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
4364                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4365                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4366                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4367                                         goto err;
4368                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4369                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
4370                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4371                                         goto err;
4372                                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
4373                                         goto err;
4374                                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
4375                                         goto err;
4376                                 break;
4377                         }
4378                         break;
4379
4380                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4381                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4382                 default:
4383                         switch (state->config->ts2_mode) {
4384                         case STV090x_TSMODE_SERIAL_PUNCTURED:
4385                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4386                         default:
4387                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
4388                                 break;
4389
4390                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4391                         case STV090x_TSMODE_DVBCI:
4392                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
4393                                 break;
4394                         }
4395                         break;
4396                 }
4397         }
4398
4399         switch (state->config->ts1_mode) {
4400         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4401                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4402                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
4403                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4404                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4405                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4406                         goto err;
4407                 break;
4408
4409         case STV090x_TSMODE_DVBCI:
4410                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4411                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
4412                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4413                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4414                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4415                         goto err;
4416                 break;
4417
4418         case STV090x_TSMODE_SERIAL_PUNCTURED:
4419                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4420                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
4421                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4422                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4423                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4424                         goto err;
4425                 break;
4426
4427         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4428                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4429                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
4430                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4431                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4432                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4433                         goto err;
4434                 break;
4435
4436         default:
4437                 break;
4438         }
4439
4440         switch (state->config->ts2_mode) {
4441         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4442                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4443                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
4444                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4445                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4446                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4447                         goto err;
4448                 break;
4449
4450         case STV090x_TSMODE_DVBCI:
4451                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4452                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
4453                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4454                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4455                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4456                         goto err;
4457                 break;
4458
4459         case STV090x_TSMODE_SERIAL_PUNCTURED:
4460                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4461                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
4462                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4463                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4464                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4465                         goto err;
4466                 break;
4467
4468         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4469                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4470                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
4471                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4472                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4473                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4474                         goto err;
4475                 break;
4476
4477         default:
4478                 break;
4479         }
4480
4481         if (state->config->ts1_clk > 0) {
4482                 u32 speed;
4483
4484                 switch (state->config->ts1_mode) {
4485                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4486                 case STV090x_TSMODE_DVBCI:
4487                 default:
4488                         speed = state->internal->mclk /
4489                                 (state->config->ts1_clk / 4);
4490                         if (speed < 0x08)
4491                                 speed = 0x08;
4492                         if (speed > 0xFF)
4493                                 speed = 0xFF;
4494                         break;
4495                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4496                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4497                         speed = state->internal->mclk /
4498                                 (state->config->ts1_clk / 32);
4499                         if (speed < 0x20)
4500                                 speed = 0x20;
4501                         if (speed > 0xFF)
4502                                 speed = 0xFF;
4503                         break;
4504                 }
4505                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4506                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4507                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4508                         goto err;
4509                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
4510                         goto err;
4511         }
4512
4513         if (state->config->ts2_clk > 0) {
4514                 u32 speed;
4515
4516                 switch (state->config->ts2_mode) {
4517                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4518                 case STV090x_TSMODE_DVBCI:
4519                 default:
4520                         speed = state->internal->mclk /
4521                                 (state->config->ts2_clk / 4);
4522                         if (speed < 0x08)
4523                                 speed = 0x08;
4524                         if (speed > 0xFF)
4525                                 speed = 0xFF;
4526                         break;
4527                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4528                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4529                         speed = state->internal->mclk /
4530                                 (state->config->ts2_clk / 32);
4531                         if (speed < 0x20)
4532                                 speed = 0x20;
4533                         if (speed > 0xFF)
4534                                 speed = 0xFF;
4535                         break;
4536                 }
4537                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
4538                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4539                 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
4540                         goto err;
4541                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, speed) < 0)
4542                         goto err;
4543         }
4544
4545         reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4546         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4547         if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4548                 goto err;
4549         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4550         if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4551                 goto err;
4552
4553         reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4554         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4555         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4556                 goto err;
4557         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4558         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4559                 goto err;
4560
4561         return 0;
4562 err:
4563         dprintk(FE_ERROR, 1, "I/O error");
4564         return -1;
4565 }
4566
4567 static int stv0903_set_tspath(struct stv090x_state *state)
4568 {
4569         u32 reg;
4570
4571         if (state->internal->dev_ver >= 0x20) {
4572                 switch (state->config->ts1_mode) {
4573                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4574                 case STV090x_TSMODE_DVBCI:
4575                         stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
4576                         break;
4577
4578                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4579                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4580                 default:
4581                         stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c);
4582                         break;
4583                 }
4584         } else {
4585                 switch (state->config->ts1_mode) {
4586                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4587                 case STV090x_TSMODE_DVBCI:
4588                         stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
4589                         break;
4590
4591                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4592                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4593                 default:
4594                         stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
4595                         break;
4596                 }
4597         }
4598
4599         switch (state->config->ts1_mode) {
4600         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4601                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4602                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4603                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4604                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4605                         goto err;
4606                 break;
4607
4608         case STV090x_TSMODE_DVBCI:
4609                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4610                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4611                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4612                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4613                         goto err;
4614                 break;
4615
4616         case STV090x_TSMODE_SERIAL_PUNCTURED:
4617                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4618                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4619                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4620                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4621                         goto err;
4622                 break;
4623
4624         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4625                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4626                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4627                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4628                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4629                         goto err;
4630                 break;
4631
4632         default:
4633                 break;
4634         }
4635
4636         if (state->config->ts1_clk > 0) {
4637                 u32 speed;
4638
4639                 switch (state->config->ts1_mode) {
4640                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4641                 case STV090x_TSMODE_DVBCI:
4642                 default:
4643                         speed = state->internal->mclk /
4644                                 (state->config->ts1_clk / 4);
4645                         if (speed < 0x08)
4646                                 speed = 0x08;
4647                         if (speed > 0xFF)
4648                                 speed = 0xFF;
4649                         break;
4650                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4651                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4652                         speed = state->internal->mclk /
4653                                 (state->config->ts1_clk / 32);
4654                         if (speed < 0x20)
4655                                 speed = 0x20;
4656                         if (speed > 0xFF)
4657                                 speed = 0xFF;
4658                         break;
4659                 }
4660                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4661                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4662                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4663                         goto err;
4664                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
4665                         goto err;
4666         }
4667
4668         reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4669         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4670         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4671                 goto err;
4672         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4673         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4674                 goto err;
4675
4676         return 0;
4677 err:
4678         dprintk(FE_ERROR, 1, "I/O error");
4679         return -1;
4680 }
4681
4682 static int stv090x_init(struct dvb_frontend *fe)
4683 {
4684         struct stv090x_state *state = fe->demodulator_priv;
4685         const struct stv090x_config *config = state->config;
4686         u32 reg;
4687
4688         if (state->internal->mclk == 0) {
4689                 /* call tuner init to configure the tuner's clock output
4690                    divider directly before setting up the master clock of
4691                    the stv090x. */
4692                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
4693                         goto err;
4694
4695                 if (config->tuner_init) {
4696                         if (config->tuner_init(fe) < 0)
4697                                 goto err_gateoff;
4698                 }
4699
4700                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
4701                         goto err;
4702
4703                 stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
4704                 msleep(5);
4705                 if (stv090x_write_reg(state, STV090x_SYNTCTRL,
4706                                       0x20 | config->clk_mode) < 0)
4707                         goto err;
4708                 stv090x_get_mclk(state);
4709         }
4710
4711         if (stv090x_wakeup(fe) < 0) {
4712                 dprintk(FE_ERROR, 1, "Error waking device");
4713                 goto err;
4714         }
4715
4716         if (stv090x_ldpc_mode(state, state->demod_mode) < 0)
4717                 goto err;
4718
4719         reg = STV090x_READ_DEMOD(state, TNRCFG2);
4720         STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
4721         if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
4722                 goto err;
4723         reg = STV090x_READ_DEMOD(state, DEMOD);
4724         STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
4725         if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
4726                 goto err;
4727
4728         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
4729                 goto err;
4730
4731         if (config->tuner_set_mode) {
4732                 if (config->tuner_set_mode(fe, TUNER_WAKE) < 0)
4733                         goto err_gateoff;
4734         }
4735
4736         if (config->tuner_init) {
4737                 if (config->tuner_init(fe) < 0)
4738                         goto err_gateoff;
4739         }
4740
4741         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
4742                 goto err;
4743
4744         if (state->device == STV0900) {
4745                 if (stv0900_set_tspath(state) < 0)
4746                         goto err;
4747         } else {
4748                 if (stv0903_set_tspath(state) < 0)
4749                         goto err;
4750         }
4751
4752         return 0;
4753
4754 err_gateoff:
4755         stv090x_i2c_gate_ctrl(state, 0);
4756 err:
4757         dprintk(FE_ERROR, 1, "I/O error");
4758         return -1;
4759 }
4760
4761 static int stv090x_setup(struct dvb_frontend *fe)
4762 {
4763         struct stv090x_state *state = fe->demodulator_priv;
4764         const struct stv090x_config *config = state->config;
4765         const struct stv090x_reg *stv090x_initval = NULL;
4766         const struct stv090x_reg *stv090x_cut20_val = NULL;
4767         unsigned long t1_size = 0, t2_size = 0;
4768         u32 reg = 0;
4769
4770         int i;
4771
4772         if (state->device == STV0900) {
4773                 dprintk(FE_DEBUG, 1, "Initializing STV0900");
4774                 stv090x_initval = stv0900_initval;
4775                 t1_size = ARRAY_SIZE(stv0900_initval);
4776                 stv090x_cut20_val = stv0900_cut20_val;
4777                 t2_size = ARRAY_SIZE(stv0900_cut20_val);
4778         } else if (state->device == STV0903) {
4779                 dprintk(FE_DEBUG, 1, "Initializing STV0903");
4780                 stv090x_initval = stv0903_initval;
4781                 t1_size = ARRAY_SIZE(stv0903_initval);
4782                 stv090x_cut20_val = stv0903_cut20_val;
4783                 t2_size = ARRAY_SIZE(stv0903_cut20_val);
4784         }
4785
4786         /* STV090x init */
4787
4788         /* Stop Demod */
4789         if (stv090x_write_reg(state, STV090x_P1_DMDISTATE, 0x5c) < 0)
4790                 goto err;
4791         if (state->device == STV0900)
4792                 if (stv090x_write_reg(state, STV090x_P2_DMDISTATE, 0x5c) < 0)
4793                         goto err;
4794
4795         msleep(5);
4796
4797         /* Set No Tuner Mode */
4798         if (stv090x_write_reg(state, STV090x_P1_TNRCFG, 0x6c) < 0)
4799                 goto err;
4800         if (state->device == STV0900)
4801                 if (stv090x_write_reg(state, STV090x_P2_TNRCFG, 0x6c) < 0)
4802                         goto err;
4803
4804         /* I2C repeater OFF */
4805         STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
4806         if (stv090x_write_reg(state, STV090x_P1_I2CRPT, reg) < 0)
4807                 goto err;
4808         if (state->device == STV0900)
4809                 if (stv090x_write_reg(state, STV090x_P2_I2CRPT, reg) < 0)
4810                         goto err;
4811
4812         if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
4813                 goto err;
4814         msleep(5);
4815         if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
4816                 goto err;
4817         if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
4818                 goto err;
4819         msleep(5);
4820
4821         /* write initval */
4822         dprintk(FE_DEBUG, 1, "Setting up initial values");
4823         for (i = 0; i < t1_size; i++) {
4824                 if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
4825                         goto err;
4826         }
4827
4828         state->internal->dev_ver = stv090x_read_reg(state, STV090x_MID);
4829         if (state->internal->dev_ver >= 0x20) {
4830                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
4831                         goto err;
4832
4833                 /* write cut20_val*/
4834                 dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
4835                 for (i = 0; i < t2_size; i++) {
4836                         if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
4837                                 goto err;
4838                 }
4839
4840         } else if (state->internal->dev_ver < 0x20) {
4841                 dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!",
4842                         state->internal->dev_ver);
4843
4844                 goto err;
4845         } else if (state->internal->dev_ver > 0x30) {
4846                 /* we shouldn't bail out from here */
4847                 dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!",
4848                         state->internal->dev_ver);
4849         }
4850
4851         /* ADC1 range */
4852         reg = stv090x_read_reg(state, STV090x_TSTTNR1);
4853         STV090x_SETFIELD(reg, ADC1_INMODE_FIELD,
4854                 (config->adc1_range == STV090x_ADC_1Vpp) ? 0 : 1);
4855         if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
4856                 goto err;
4857
4858         /* ADC2 range */
4859         reg = stv090x_read_reg(state, STV090x_TSTTNR3);
4860         STV090x_SETFIELD(reg, ADC2_INMODE_FIELD,
4861                 (config->adc2_range == STV090x_ADC_1Vpp) ? 0 : 1);
4862         if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
4863                 goto err;
4864
4865         if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
4866                 goto err;
4867         if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
4868                 goto err;
4869
4870         return 0;
4871 err:
4872         dprintk(FE_ERROR, 1, "I/O error");
4873         return -1;
4874 }
4875
4876 static int stv090x_set_gpio(struct dvb_frontend *fe, u8 gpio, u8 dir,
4877                             u8 value, u8 xor_value)
4878 {
4879         struct stv090x_state *state = fe->demodulator_priv;
4880         u8 reg = 0;
4881
4882         STV090x_SETFIELD(reg, GPIOx_OPD_FIELD, dir);
4883         STV090x_SETFIELD(reg, GPIOx_CONFIG_FIELD, value);
4884         STV090x_SETFIELD(reg, GPIOx_XOR_FIELD, xor_value);
4885
4886         return stv090x_write_reg(state, STV090x_GPIOxCFG(gpio), reg);
4887 }
4888
4889 static struct dvb_frontend_ops stv090x_ops = {
4890         .delsys = { SYS_DVBS, SYS_DVBS2, SYS_DSS },
4891         .info = {
4892                 .name                   = "STV090x Multistandard",
4893                 .frequency_min          = 950000,
4894                 .frequency_max          = 2150000,
4895                 .frequency_stepsize     = 0,
4896                 .frequency_tolerance    = 0,
4897                 .symbol_rate_min        = 1000000,
4898                 .symbol_rate_max        = 45000000,
4899                 .caps                   = FE_CAN_INVERSION_AUTO |
4900                                           FE_CAN_FEC_AUTO       |
4901                                           FE_CAN_QPSK           |
4902                                           FE_CAN_2G_MODULATION
4903         },
4904
4905         .release                        = stv090x_release,
4906         .init                           = stv090x_init,
4907
4908         .sleep                          = stv090x_sleep,
4909         .get_frontend_algo              = stv090x_frontend_algo,
4910
4911         .diseqc_send_master_cmd         = stv090x_send_diseqc_msg,
4912         .diseqc_send_burst              = stv090x_send_diseqc_burst,
4913         .diseqc_recv_slave_reply        = stv090x_recv_slave_reply,
4914         .set_tone                       = stv090x_set_tone,
4915
4916         .search                         = stv090x_search,
4917         .read_status                    = stv090x_read_status,
4918         .read_ber                       = stv090x_read_per,
4919         .read_signal_strength           = stv090x_read_signal_strength,
4920         .read_snr                       = stv090x_read_cnr,
4921 };
4922
4923
4924 struct dvb_frontend *stv090x_attach(struct stv090x_config *config,
4925                                     struct i2c_adapter *i2c,
4926                                     enum stv090x_demodulator demod)
4927 {
4928         struct stv090x_state *state = NULL;
4929         struct stv090x_dev *temp_int;
4930
4931         state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL);
4932         if (state == NULL)
4933                 goto error;
4934
4935         state->verbose                          = &verbose;
4936         state->config                           = config;
4937         state->i2c                              = i2c;
4938         state->frontend.ops                     = stv090x_ops;
4939         state->frontend.demodulator_priv        = state;
4940         state->demod                            = demod;
4941         state->demod_mode                       = config->demod_mode; /* Single or Dual mode */
4942         state->device                           = config->device;
4943         state->rolloff                          = STV090x_RO_35; /* default */
4944
4945         temp_int = find_dev(state->i2c,
4946                                 state->config->address);
4947
4948         if ((temp_int != NULL) && (state->demod_mode == STV090x_DUAL)) {
4949                 state->internal = temp_int->internal;
4950                 state->internal->num_used++;
4951                 dprintk(FE_INFO, 1, "Found Internal Structure!");
4952         } else {
4953                 state->internal = kmalloc(sizeof(struct stv090x_internal),
4954                                           GFP_KERNEL);
4955                 if (!state->internal)
4956                         goto error;
4957                 temp_int = append_internal(state->internal);
4958                 if (!temp_int) {
4959                         kfree(state->internal);
4960                         goto error;
4961                 }
4962                 state->internal->num_used = 1;
4963                 state->internal->mclk = 0;
4964                 state->internal->dev_ver = 0;
4965                 state->internal->i2c_adap = state->i2c;
4966                 state->internal->i2c_addr = state->config->address;
4967                 dprintk(FE_INFO, 1, "Create New Internal Structure!");
4968
4969                 mutex_init(&state->internal->demod_lock);
4970                 mutex_init(&state->internal->tuner_lock);
4971
4972                 if (stv090x_setup(&state->frontend) < 0) {
4973                         dprintk(FE_ERROR, 1, "Error setting up device");
4974                         goto err_remove;
4975                 }
4976         }
4977
4978         if (state->internal->dev_ver >= 0x30)
4979                 state->frontend.ops.info.caps |= FE_CAN_MULTISTREAM;
4980
4981         /* workaround for stuck DiSEqC output */
4982         if (config->diseqc_envelope_mode)
4983                 stv090x_send_diseqc_burst(&state->frontend, SEC_MINI_A);
4984
4985         config->set_gpio = stv090x_set_gpio;
4986
4987         dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x",
4988                state->device == STV0900 ? "STV0900" : "STV0903",
4989                demod,
4990                state->internal->dev_ver);
4991
4992         return &state->frontend;
4993
4994 err_remove:
4995         remove_dev(state->internal);
4996         kfree(state->internal);
4997 error:
4998         kfree(state);
4999         return NULL;
5000 }
5001 EXPORT_SYMBOL(stv090x_attach);
5002 MODULE_PARM_DESC(verbose, "Set Verbosity level");
5003 MODULE_AUTHOR("Manu Abraham");
5004 MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
5005 MODULE_LICENSE("GPL");