Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / drivers / media / dvb-frontends / si2165.c
1 /*
2     Driver for Silicon Labs Si2161 DVB-T and Si2165 DVB-C/-T Demodulator
3
4     Copyright (C) 2013-2014 Matthias Schwarzott <zzam@gentoo.org>
5
6     This program is free software; you can redistribute it and/or modify
7     it under the terms of the GNU General Public License as published by
8     the Free Software Foundation; either version 2 of the License, or
9     (at your option) any later version.
10
11     This program is distributed in the hope that it will be useful,
12     but WITHOUT ANY WARRANTY; without even the implied warranty of
13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14     GNU General Public License for more details.
15
16     References:
17     http://www.silabs.com/Support%20Documents/TechnicalDocs/Si2165-short.pdf
18 */
19
20 #include <linux/delay.h>
21 #include <linux/errno.h>
22 #include <linux/init.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/string.h>
26 #include <linux/slab.h>
27 #include <linux/firmware.h>
28
29 #include "dvb_frontend.h"
30 #include "dvb_math.h"
31 #include "si2165_priv.h"
32 #include "si2165.h"
33
34 /* Hauppauge WinTV-HVR-930C-HD B130 / PCTV QuatroStick 521e 1113xx
35  * uses 16 MHz xtal */
36
37 /* Hauppauge WinTV-HVR-930C-HD B131 / PCTV QuatroStick 522e 1114xx
38  * uses 24 MHz clock provided by tuner */
39
40 struct si2165_state {
41         struct i2c_adapter *i2c;
42
43         struct dvb_frontend frontend;
44
45         struct si2165_config config;
46
47         u8 chip_revcode;
48         u8 chip_type;
49
50         /* calculated by xtal and div settings */
51         u32 fvco_hz;
52         u32 sys_clk;
53         u32 adc_clk;
54
55         bool has_dvbc;
56         bool has_dvbt;
57         bool firmware_loaded;
58 };
59
60 #define DEBUG_OTHER     0x01
61 #define DEBUG_I2C_WRITE 0x02
62 #define DEBUG_I2C_READ  0x04
63 #define DEBUG_REG_READ  0x08
64 #define DEBUG_REG_WRITE 0x10
65 #define DEBUG_FW_LOAD   0x20
66
67 static int debug = 0x00;
68
69 #define dprintk(args...) \
70         do { \
71                 if (debug & DEBUG_OTHER) \
72                         printk(KERN_DEBUG "si2165: " args); \
73         } while (0)
74
75 #define deb_i2c_write(args...) \
76         do { \
77                 if (debug & DEBUG_I2C_WRITE) \
78                         printk(KERN_DEBUG "si2165: i2c write: " args); \
79         } while (0)
80
81 #define deb_i2c_read(args...) \
82         do { \
83                 if (debug & DEBUG_I2C_READ) \
84                         printk(KERN_DEBUG "si2165: i2c read: " args); \
85         } while (0)
86
87 #define deb_readreg(args...) \
88         do { \
89                 if (debug & DEBUG_REG_READ) \
90                         printk(KERN_DEBUG "si2165: reg read: " args); \
91         } while (0)
92
93 #define deb_writereg(args...) \
94         do { \
95                 if (debug & DEBUG_REG_WRITE) \
96                         printk(KERN_DEBUG "si2165: reg write: " args); \
97         } while (0)
98
99 #define deb_fw_load(args...) \
100         do { \
101                 if (debug & DEBUG_FW_LOAD) \
102                         printk(KERN_DEBUG "si2165: fw load: " args); \
103         } while (0)
104
105 static int si2165_write(struct si2165_state *state, const u16 reg,
106                        const u8 *src, const int count)
107 {
108         int ret;
109         struct i2c_msg msg;
110         u8 buf[2 + 4]; /* write a maximum of 4 bytes of data */
111
112         if (count + 2 > sizeof(buf)) {
113                 dev_warn(&state->i2c->dev,
114                           "%s: i2c wr reg=%04x: count=%d is too big!\n",
115                           KBUILD_MODNAME, reg, count);
116                 return -EINVAL;
117         }
118         buf[0] = reg >> 8;
119         buf[1] = reg & 0xff;
120         memcpy(buf + 2, src, count);
121
122         msg.addr = state->config.i2c_addr;
123         msg.flags = 0;
124         msg.buf = buf;
125         msg.len = count + 2;
126
127         if (debug & DEBUG_I2C_WRITE)
128                 deb_i2c_write("reg: 0x%04x, data: %*ph\n", reg, count, src);
129
130         ret = i2c_transfer(state->i2c, &msg, 1);
131
132         if (ret != 1) {
133                 dev_err(&state->i2c->dev, "%s: ret == %d\n", __func__, ret);
134                 if (ret < 0)
135                         return ret;
136                 else
137                         return -EREMOTEIO;
138         }
139
140         return 0;
141 }
142
143 static int si2165_read(struct si2165_state *state,
144                        const u16 reg, u8 *val, const int count)
145 {
146         int ret;
147         u8 reg_buf[] = { reg >> 8, reg & 0xff };
148         struct i2c_msg msg[] = {
149                 { .addr = state->config.i2c_addr,
150                   .flags = 0, .buf = reg_buf, .len = 2 },
151                 { .addr = state->config.i2c_addr,
152                   .flags = I2C_M_RD, .buf = val, .len = count },
153         };
154
155         ret = i2c_transfer(state->i2c, msg, 2);
156
157         if (ret != 2) {
158                 dev_err(&state->i2c->dev, "%s: error (addr %02x reg %04x error (ret == %i)\n",
159                         __func__, state->config.i2c_addr, reg, ret);
160                 if (ret < 0)
161                         return ret;
162                 else
163                         return -EREMOTEIO;
164         }
165
166         if (debug & DEBUG_I2C_READ)
167                 deb_i2c_read("reg: 0x%04x, data: %*ph\n", reg, count, val);
168
169         return 0;
170 }
171
172 static int si2165_readreg8(struct si2165_state *state,
173                        const u16 reg, u8 *val)
174 {
175         int ret;
176
177         ret = si2165_read(state, reg, val, 1);
178         deb_readreg("R(0x%04x)=0x%02x\n", reg, *val);
179         return ret;
180 }
181
182 static int si2165_readreg16(struct si2165_state *state,
183                        const u16 reg, u16 *val)
184 {
185         u8 buf[2];
186
187         int ret = si2165_read(state, reg, buf, 2);
188         *val = buf[0] | buf[1] << 8;
189         deb_readreg("R(0x%04x)=0x%04x\n", reg, *val);
190         return ret;
191 }
192
193 static int si2165_writereg8(struct si2165_state *state, const u16 reg, u8 val)
194 {
195         return si2165_write(state, reg, &val, 1);
196 }
197
198 static int si2165_writereg16(struct si2165_state *state, const u16 reg, u16 val)
199 {
200         u8 buf[2] = { val & 0xff, (val >> 8) & 0xff };
201
202         return si2165_write(state, reg, buf, 2);
203 }
204
205 static int si2165_writereg24(struct si2165_state *state, const u16 reg, u32 val)
206 {
207         u8 buf[3] = { val & 0xff, (val >> 8) & 0xff, (val >> 16) & 0xff };
208
209         return si2165_write(state, reg, buf, 3);
210 }
211
212 static int si2165_writereg32(struct si2165_state *state, const u16 reg, u32 val)
213 {
214         u8 buf[4] = {
215                 val & 0xff,
216                 (val >> 8) & 0xff,
217                 (val >> 16) & 0xff,
218                 (val >> 24) & 0xff
219         };
220         return si2165_write(state, reg, buf, 4);
221 }
222
223 static int si2165_writereg_mask8(struct si2165_state *state, const u16 reg,
224                                  u8 val, u8 mask)
225 {
226         int ret;
227         u8 tmp;
228
229         if (mask != 0xff) {
230                 ret = si2165_readreg8(state, reg, &tmp);
231                 if (ret < 0)
232                         goto err;
233
234                 val &= mask;
235                 tmp &= ~mask;
236                 val |= tmp;
237         }
238
239         ret = si2165_writereg8(state, reg, val);
240 err:
241         return ret;
242 }
243
244 static int si2165_get_tune_settings(struct dvb_frontend *fe,
245                                     struct dvb_frontend_tune_settings *s)
246 {
247         s->min_delay_ms = 1000;
248         return 0;
249 }
250
251 static int si2165_init_pll(struct si2165_state *state)
252 {
253         u32 ref_freq_Hz = state->config.ref_freq_Hz;
254         u8 divr = 1; /* 1..7 */
255         u8 divp = 1; /* only 1 or 4 */
256         u8 divn = 56; /* 1..63 */
257         u8 divm = 8;
258         u8 divl = 12;
259         u8 buf[4];
260
261         /* hardcoded values can be deleted if calculation is verified
262          * or it yields the same values as the windows driver */
263         switch (ref_freq_Hz) {
264         case 16000000u:
265                 divn = 56;
266                 break;
267         case 24000000u:
268                 divr = 2;
269                 divp = 4;
270                 divn = 19;
271                 break;
272         default:
273                 /* ref_freq / divr must be between 4 and 16 MHz */
274                 if (ref_freq_Hz > 16000000u)
275                         divr = 2;
276
277                 /* now select divn and divp such that
278                  * fvco is in 1624..1824 MHz */
279                 if (1624000000u * divr > ref_freq_Hz * 2u * 63u)
280                         divp = 4;
281
282                 /* is this already correct regarding rounding? */
283                 divn = 1624000000u * divr / (ref_freq_Hz * 2u * divp);
284                 break;
285         }
286
287         /* adc_clk and sys_clk depend on xtal and pll settings */
288         state->fvco_hz = ref_freq_Hz / divr
289                         * 2u * divn * divp;
290         state->adc_clk = state->fvco_hz / (divm * 4u);
291         state->sys_clk = state->fvco_hz / (divl * 2u);
292
293         /* write pll registers 0x00a0..0x00a3 at once */
294         buf[0] = divl;
295         buf[1] = divm;
296         buf[2] = (divn & 0x3f) | ((divp == 1) ? 0x40 : 0x00) | 0x80;
297         buf[3] = divr;
298         return si2165_write(state, 0x00a0, buf, 4);
299 }
300
301 static int si2165_adjust_pll_divl(struct si2165_state *state, u8 divl)
302 {
303         state->sys_clk = state->fvco_hz / (divl * 2u);
304         return si2165_writereg8(state, 0x00a0, divl); /* pll_divl */
305 }
306
307 static u32 si2165_get_fe_clk(struct si2165_state *state)
308 {
309         /* assume Oversampling mode Ovr4 is used */
310         return state->adc_clk;
311 }
312
313 static int si2165_wait_init_done(struct si2165_state *state)
314 {
315         int ret = -EINVAL;
316         u8 val = 0;
317         int i;
318
319         for (i = 0; i < 3; ++i) {
320                 si2165_readreg8(state, 0x0054, &val);
321                 if (val == 0x01)
322                         return 0;
323                 usleep_range(1000, 50000);
324         }
325         dev_err(&state->i2c->dev, "%s: init_done was not set\n",
326                 KBUILD_MODNAME);
327         return ret;
328 }
329
330 static int si2165_upload_firmware_block(struct si2165_state *state,
331         const u8 *data, u32 len, u32 *poffset, u32 block_count)
332 {
333         int ret;
334         u8 buf_ctrl[4] = { 0x00, 0x00, 0x00, 0xc0 };
335         u8 wordcount;
336         u32 cur_block = 0;
337         u32 offset = poffset ? *poffset : 0;
338
339         if (len < 4)
340                 return -EINVAL;
341         if (len % 4 != 0)
342                 return -EINVAL;
343
344         deb_fw_load("si2165_upload_firmware_block called with len=0x%x offset=0x%x blockcount=0x%x\n",
345                                 len, offset, block_count);
346         while (offset+12 <= len && cur_block < block_count) {
347                 deb_fw_load("si2165_upload_firmware_block in while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n",
348                                         len, offset, cur_block, block_count);
349                 wordcount = data[offset];
350                 if (wordcount < 1 || data[offset+1] ||
351                     data[offset+2] || data[offset+3]) {
352                         dev_warn(&state->i2c->dev,
353                                  "%s: bad fw data[0..3] = %*ph\n",
354                                 KBUILD_MODNAME, 4, data);
355                         return -EINVAL;
356                 }
357
358                 if (offset + 8 + wordcount * 4 > len) {
359                         dev_warn(&state->i2c->dev,
360                                  "%s: len is too small for block len=%d, wordcount=%d\n",
361                                 KBUILD_MODNAME, len, wordcount);
362                         return -EINVAL;
363                 }
364
365                 buf_ctrl[0] = wordcount - 1;
366
367                 ret = si2165_write(state, 0x0364, buf_ctrl, 4);
368                 if (ret < 0)
369                         goto error;
370                 ret = si2165_write(state, 0x0368, data+offset+4, 4);
371                 if (ret < 0)
372                         goto error;
373
374                 offset += 8;
375
376                 while (wordcount > 0) {
377                         ret = si2165_write(state, 0x36c, data+offset, 4);
378                         if (ret < 0)
379                                 goto error;
380                         wordcount--;
381                         offset += 4;
382                 }
383                 cur_block++;
384         }
385
386         deb_fw_load("si2165_upload_firmware_block after while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n",
387                                 len, offset, cur_block, block_count);
388
389         if (poffset)
390                 *poffset = offset;
391
392         deb_fw_load("si2165_upload_firmware_block returned offset=0x%x\n",
393                                 offset);
394
395         return 0;
396 error:
397         return ret;
398 }
399
400 static int si2165_upload_firmware(struct si2165_state *state)
401 {
402         /* int ret; */
403         u8 val[3];
404         u16 val16;
405         int ret;
406
407         const struct firmware *fw = NULL;
408         u8 *fw_file;
409         const u8 *data;
410         u32 len;
411         u32 offset;
412         u8 patch_version;
413         u8 block_count;
414         u16 crc_expected;
415
416         switch (state->chip_revcode) {
417         case 0x03: /* revision D */
418                 fw_file = SI2165_FIRMWARE_REV_D;
419                 break;
420         default:
421                 dev_info(&state->i2c->dev, "%s: no firmware file for revision=%d\n",
422                         KBUILD_MODNAME, state->chip_revcode);
423                 return 0;
424         }
425
426         /* request the firmware, this will block and timeout */
427         ret = request_firmware(&fw, fw_file, state->i2c->dev.parent);
428         if (ret) {
429                 dev_warn(&state->i2c->dev, "%s: firmware file '%s' not found\n",
430                                 KBUILD_MODNAME, fw_file);
431                 goto error;
432         }
433
434         data = fw->data;
435         len = fw->size;
436
437         dev_info(&state->i2c->dev, "%s: downloading firmware from file '%s' size=%d\n",
438                         KBUILD_MODNAME, fw_file, len);
439
440         if (len % 4 != 0) {
441                 dev_warn(&state->i2c->dev, "%s: firmware size is not multiple of 4\n",
442                                 KBUILD_MODNAME);
443                 ret = -EINVAL;
444                 goto error;
445         }
446
447         /* check header (8 bytes) */
448         if (len < 8) {
449                 dev_warn(&state->i2c->dev, "%s: firmware header is missing\n",
450                                 KBUILD_MODNAME);
451                 ret = -EINVAL;
452                 goto error;
453         }
454
455         if (data[0] != 1 || data[1] != 0) {
456                 dev_warn(&state->i2c->dev, "%s: firmware file version is wrong\n",
457                                 KBUILD_MODNAME);
458                 ret = -EINVAL;
459                 goto error;
460         }
461
462         patch_version = data[2];
463         block_count = data[4];
464         crc_expected = data[7] << 8 | data[6];
465
466         /* start uploading fw */
467         /* boot/wdog status */
468         ret = si2165_writereg8(state, 0x0341, 0x00);
469         if (ret < 0)
470                 goto error;
471         /* reset */
472         ret = si2165_writereg8(state, 0x00c0, 0x00);
473         if (ret < 0)
474                 goto error;
475         /* boot/wdog status */
476         ret = si2165_readreg8(state, 0x0341, val);
477         if (ret < 0)
478                 goto error;
479
480         /* enable reset on error */
481         ret = si2165_readreg8(state, 0x035c, val);
482         if (ret < 0)
483                 goto error;
484         ret = si2165_readreg8(state, 0x035c, val);
485         if (ret < 0)
486                 goto error;
487         ret = si2165_writereg8(state, 0x035c, 0x02);
488         if (ret < 0)
489                 goto error;
490
491         /* start right after the header */
492         offset = 8;
493
494         dev_info(&state->i2c->dev, "%s: si2165_upload_firmware extracted patch_version=0x%02x, block_count=0x%02x, crc_expected=0x%04x\n",
495                 KBUILD_MODNAME, patch_version, block_count, crc_expected);
496
497         ret = si2165_upload_firmware_block(state, data, len, &offset, 1);
498         if (ret < 0)
499                 goto error;
500
501         ret = si2165_writereg8(state, 0x0344, patch_version);
502         if (ret < 0)
503                 goto error;
504
505         /* reset crc */
506         ret = si2165_writereg8(state, 0x0379, 0x01);
507         if (ret)
508                 goto error;
509
510         ret = si2165_upload_firmware_block(state, data, len,
511                                            &offset, block_count);
512         if (ret < 0) {
513                 dev_err(&state->i2c->dev,
514                         "%s: firmare could not be uploaded\n",
515                         KBUILD_MODNAME);
516                 goto error;
517         }
518
519         /* read crc */
520         ret = si2165_readreg16(state, 0x037a, &val16);
521         if (ret)
522                 goto error;
523
524         if (val16 != crc_expected) {
525                 dev_err(&state->i2c->dev,
526                         "%s: firmware crc mismatch %04x != %04x\n",
527                         KBUILD_MODNAME, val16, crc_expected);
528                 ret = -EINVAL;
529                 goto error;
530         }
531
532         ret = si2165_upload_firmware_block(state, data, len, &offset, 5);
533         if (ret)
534                 goto error;
535
536         if (len != offset) {
537                 dev_err(&state->i2c->dev,
538                         "%s: firmare len mismatch %04x != %04x\n",
539                         KBUILD_MODNAME, len, offset);
540                 ret = -EINVAL;
541                 goto error;
542         }
543
544         /* reset watchdog error register */
545         ret = si2165_writereg_mask8(state, 0x0341, 0x02, 0x02);
546         if (ret < 0)
547                 goto error;
548
549         /* enable reset on error */
550         ret = si2165_writereg_mask8(state, 0x035c, 0x01, 0x01);
551         if (ret < 0)
552                 goto error;
553
554         dev_info(&state->i2c->dev, "%s: fw load finished\n", KBUILD_MODNAME);
555
556         ret = 0;
557         state->firmware_loaded = true;
558 error:
559         if (fw) {
560                 release_firmware(fw);
561                 fw = NULL;
562         }
563
564         return ret;
565 }
566
567 static int si2165_init(struct dvb_frontend *fe)
568 {
569         int ret = 0;
570         struct si2165_state *state = fe->demodulator_priv;
571         u8 val;
572         u8 patch_version = 0x00;
573
574         dprintk("%s: called\n", __func__);
575
576         /* powerup */
577         ret = si2165_writereg8(state, 0x0000, state->config.chip_mode);
578         if (ret < 0)
579                 goto error;
580         /* dsp_clock_enable */
581         ret = si2165_writereg8(state, 0x0104, 0x01);
582         if (ret < 0)
583                 goto error;
584         ret = si2165_readreg8(state, 0x0000, &val); /* verify chip_mode */
585         if (ret < 0)
586                 goto error;
587         if (val != state->config.chip_mode) {
588                 dev_err(&state->i2c->dev, "%s: could not set chip_mode\n",
589                         KBUILD_MODNAME);
590                 return -EINVAL;
591         }
592
593         /* agc */
594         ret = si2165_writereg8(state, 0x018b, 0x00);
595         if (ret < 0)
596                 goto error;
597         ret = si2165_writereg8(state, 0x0190, 0x01);
598         if (ret < 0)
599                 goto error;
600         ret = si2165_writereg8(state, 0x0170, 0x00);
601         if (ret < 0)
602                 goto error;
603         ret = si2165_writereg8(state, 0x0171, 0x07);
604         if (ret < 0)
605                 goto error;
606         /* rssi pad */
607         ret = si2165_writereg8(state, 0x0646, 0x00);
608         if (ret < 0)
609                 goto error;
610         ret = si2165_writereg8(state, 0x0641, 0x00);
611         if (ret < 0)
612                 goto error;
613
614         ret = si2165_init_pll(state);
615         if (ret < 0)
616                 goto error;
617
618         /* enable chip_init */
619         ret = si2165_writereg8(state, 0x0050, 0x01);
620         if (ret < 0)
621                 goto error;
622         /* set start_init */
623         ret = si2165_writereg8(state, 0x0096, 0x01);
624         if (ret < 0)
625                 goto error;
626         ret = si2165_wait_init_done(state);
627         if (ret < 0)
628                 goto error;
629
630         /* disable chip_init */
631         ret = si2165_writereg8(state, 0x0050, 0x00);
632         if (ret < 0)
633                 goto error;
634
635         /* ber_pkt */
636         ret = si2165_writereg16(state, 0x0470 , 0x7530);
637         if (ret < 0)
638                 goto error;
639
640         ret = si2165_readreg8(state, 0x0344, &patch_version);
641         if (ret < 0)
642                 goto error;
643
644         ret = si2165_writereg8(state, 0x00cb, 0x00);
645         if (ret < 0)
646                 goto error;
647
648         /* dsp_addr_jump */
649         ret = si2165_writereg32(state, 0x0348, 0xf4000000);
650         if (ret < 0)
651                 goto error;
652         /* boot/wdog status */
653         ret = si2165_readreg8(state, 0x0341, &val);
654         if (ret < 0)
655                 goto error;
656
657         if (patch_version == 0x00) {
658                 ret = si2165_upload_firmware(state);
659                 if (ret < 0)
660                         goto error;
661         }
662
663         /* write adc values after each reset*/
664         ret = si2165_writereg8(state, 0x012a, 0x46);
665         if (ret < 0)
666                 goto error;
667         ret = si2165_writereg8(state, 0x012c, 0x00);
668         if (ret < 0)
669                 goto error;
670         ret = si2165_writereg8(state, 0x012e, 0x0a);
671         if (ret < 0)
672                 goto error;
673         ret = si2165_writereg8(state, 0x012f, 0xff);
674         if (ret < 0)
675                 goto error;
676         ret = si2165_writereg8(state, 0x0123, 0x70);
677         if (ret < 0)
678                 goto error;
679
680         return 0;
681 error:
682         return ret;
683 }
684
685 static int si2165_sleep(struct dvb_frontend *fe)
686 {
687         int ret;
688         struct si2165_state *state = fe->demodulator_priv;
689
690         /* dsp clock disable */
691         ret = si2165_writereg8(state, 0x0104, 0x00);
692         if (ret < 0)
693                 return ret;
694         /* chip mode */
695         ret = si2165_writereg8(state, 0x0000, SI2165_MODE_OFF);
696         if (ret < 0)
697                 return ret;
698         return 0;
699 }
700
701 static int si2165_read_status(struct dvb_frontend *fe, fe_status_t *status)
702 {
703         int ret;
704         u8 fec_lock = 0;
705         struct si2165_state *state = fe->demodulator_priv;
706
707         if (!state->has_dvbt)
708                 return -EINVAL;
709
710         /* check fec_lock */
711         ret = si2165_readreg8(state, 0x4e0, &fec_lock);
712         if (ret < 0)
713                 return ret;
714         *status = 0;
715         if (fec_lock & 0x01) {
716                 *status |= FE_HAS_SIGNAL;
717                 *status |= FE_HAS_CARRIER;
718                 *status |= FE_HAS_VITERBI;
719                 *status |= FE_HAS_SYNC;
720                 *status |= FE_HAS_LOCK;
721         }
722
723         return 0;
724 }
725
726 static int si2165_set_oversamp(struct si2165_state *state, u32 dvb_rate)
727 {
728         u64 oversamp;
729         u32 reg_value;
730
731         oversamp = si2165_get_fe_clk(state);
732         oversamp <<= 23;
733         do_div(oversamp, dvb_rate);
734         reg_value = oversamp & 0x3fffffff;
735
736         /* oversamp, usbdump contained 0x03100000; */
737         return si2165_writereg32(state, 0x00e4, reg_value);
738 }
739
740 static int si2165_set_if_freq_shift(struct si2165_state *state, u32 IF)
741 {
742         u64 if_freq_shift;
743         s32 reg_value = 0;
744         u32 fe_clk = si2165_get_fe_clk(state);
745
746         if_freq_shift = IF;
747         if_freq_shift <<= 29;
748
749         do_div(if_freq_shift, fe_clk);
750         reg_value = (s32)if_freq_shift;
751
752         if (state->config.inversion)
753                 reg_value = -reg_value;
754
755         reg_value = reg_value & 0x1fffffff;
756
757         /* if_freq_shift, usbdump contained 0x023ee08f; */
758         return si2165_writereg32(state, 0x00e8, reg_value);
759 }
760
761 static int si2165_set_parameters(struct dvb_frontend *fe)
762 {
763         int ret;
764         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
765         struct si2165_state *state = fe->demodulator_priv;
766         u8 val[3];
767         u32 IF;
768         u32 dvb_rate = 0;
769         u16 bw10k;
770
771         dprintk("%s: called\n", __func__);
772
773         if (!fe->ops.tuner_ops.get_if_frequency) {
774                 dev_err(&state->i2c->dev,
775                         "%s: Error: get_if_frequency() not defined at tuner. Can't work without it!\n",
776                         KBUILD_MODNAME);
777                 return -EINVAL;
778         }
779
780         if (!state->has_dvbt)
781                 return -EINVAL;
782
783         if (p->bandwidth_hz > 0) {
784                 dvb_rate = p->bandwidth_hz * 8 / 7;
785                 bw10k = p->bandwidth_hz / 10000;
786         } else {
787                 dvb_rate = 8 * 8 / 7;
788                 bw10k = 800;
789         }
790
791         /* standard = DVB-T */
792         ret = si2165_writereg8(state, 0x00ec, 0x01);
793         if (ret < 0)
794                 return ret;
795         ret = si2165_adjust_pll_divl(state, 12);
796         if (ret < 0)
797                 return ret;
798
799         fe->ops.tuner_ops.get_if_frequency(fe, &IF);
800         ret = si2165_set_if_freq_shift(state, IF);
801         if (ret < 0)
802                 return ret;
803         ret = si2165_writereg8(state, 0x08f8, 0x00);
804         if (ret < 0)
805                 return ret;
806         /* ts output config */
807         ret = si2165_writereg8(state, 0x04e4, 0x20);
808         if (ret < 0)
809                 return ret;
810         ret = si2165_writereg16(state, 0x04ef, 0x00fe);
811         if (ret < 0)
812                 return ret;
813         ret = si2165_writereg24(state, 0x04f4, 0x555555);
814         if (ret < 0)
815                 return ret;
816         ret = si2165_writereg8(state, 0x04e5, 0x01);
817         if (ret < 0)
818                 return ret;
819         /* bandwidth in 10KHz steps */
820         ret = si2165_writereg16(state, 0x0308, bw10k);
821         if (ret < 0)
822                 return ret;
823         ret = si2165_set_oversamp(state, dvb_rate);
824         if (ret < 0)
825                 return ret;
826         /* impulsive_noise_remover */
827         ret = si2165_writereg8(state, 0x031c, 0x01);
828         if (ret < 0)
829                 return ret;
830         ret = si2165_writereg8(state, 0x00cb, 0x00);
831         if (ret < 0)
832                 return ret;
833         /* agc2 */
834         ret = si2165_writereg8(state, 0x016e, 0x41);
835         if (ret < 0)
836                 return ret;
837         ret = si2165_writereg8(state, 0x016c, 0x0e);
838         if (ret < 0)
839                 return ret;
840         ret = si2165_writereg8(state, 0x016d, 0x10);
841         if (ret < 0)
842                 return ret;
843         /* agc */
844         ret = si2165_writereg8(state, 0x015b, 0x03);
845         if (ret < 0)
846                 return ret;
847         ret = si2165_writereg8(state, 0x0150, 0x78);
848         if (ret < 0)
849                 return ret;
850         /* agc */
851         ret = si2165_writereg8(state, 0x01a0, 0x78);
852         if (ret < 0)
853                 return ret;
854         ret = si2165_writereg8(state, 0x01c8, 0x68);
855         if (ret < 0)
856                 return ret;
857         /* freq_sync_range */
858         ret = si2165_writereg16(state, 0x030c, 0x0064);
859         if (ret < 0)
860                 return ret;
861         /* gp_reg0 */
862         ret = si2165_readreg8(state, 0x0387, val);
863         if (ret < 0)
864                 return ret;
865         ret = si2165_writereg8(state, 0x0387, 0x00);
866         if (ret < 0)
867                 return ret;
868         /* dsp_addr_jump */
869         ret = si2165_writereg32(state, 0x0348, 0xf4000000);
870         if (ret < 0)
871                 return ret;
872
873         if (fe->ops.tuner_ops.set_params)
874                 fe->ops.tuner_ops.set_params(fe);
875
876         /* recalc if_freq_shift if IF might has changed */
877         fe->ops.tuner_ops.get_if_frequency(fe, &IF);
878         ret = si2165_set_if_freq_shift(state, IF);
879         if (ret < 0)
880                 return ret;
881
882         /* boot/wdog status */
883         ret = si2165_readreg8(state, 0x0341, val);
884         if (ret < 0)
885                 return ret;
886         ret = si2165_writereg8(state, 0x0341, 0x00);
887         if (ret < 0)
888                 return ret;
889         /* reset all */
890         ret = si2165_writereg8(state, 0x00c0, 0x00);
891         if (ret < 0)
892                 return ret;
893         /* gp_reg0 */
894         ret = si2165_writereg32(state, 0x0384, 0x00000000);
895         if (ret < 0)
896                 return ret;
897         /* start_synchro */
898         ret = si2165_writereg8(state, 0x02e0, 0x01);
899         if (ret < 0)
900                 return ret;
901         /* boot/wdog status */
902         ret = si2165_readreg8(state, 0x0341, val);
903         if (ret < 0)
904                 return ret;
905
906         return 0;
907 }
908
909 static void si2165_release(struct dvb_frontend *fe)
910 {
911         struct si2165_state *state = fe->demodulator_priv;
912
913         dprintk("%s: called\n", __func__);
914         kfree(state);
915 }
916
917 static struct dvb_frontend_ops si2165_ops = {
918         .info = {
919                 .name = "Silicon Labs ",
920                 .caps = FE_CAN_FEC_1_2 |
921                         FE_CAN_FEC_2_3 |
922                         FE_CAN_FEC_3_4 |
923                         FE_CAN_FEC_5_6 |
924                         FE_CAN_FEC_7_8 |
925                         FE_CAN_FEC_AUTO |
926                         FE_CAN_QPSK |
927                         FE_CAN_QAM_16 |
928                         FE_CAN_QAM_32 |
929                         FE_CAN_QAM_64 |
930                         FE_CAN_QAM_128 |
931                         FE_CAN_QAM_256 |
932                         FE_CAN_QAM_AUTO |
933                         FE_CAN_TRANSMISSION_MODE_AUTO |
934                         FE_CAN_GUARD_INTERVAL_AUTO |
935                         FE_CAN_HIERARCHY_AUTO |
936                         FE_CAN_MUTE_TS |
937                         FE_CAN_TRANSMISSION_MODE_AUTO |
938                         FE_CAN_RECOVER
939         },
940
941         .get_tune_settings = si2165_get_tune_settings,
942
943         .init = si2165_init,
944         .sleep = si2165_sleep,
945
946         .set_frontend      = si2165_set_parameters,
947         .read_status       = si2165_read_status,
948
949         .release = si2165_release,
950 };
951
952 struct dvb_frontend *si2165_attach(const struct si2165_config *config,
953                                    struct i2c_adapter *i2c)
954 {
955         struct si2165_state *state = NULL;
956         int n;
957         int io_ret;
958         u8 val;
959         char rev_char;
960         const char *chip_name;
961
962         if (config == NULL || i2c == NULL)
963                 goto error;
964
965         /* allocate memory for the internal state */
966         state = kzalloc(sizeof(struct si2165_state), GFP_KERNEL);
967         if (state == NULL)
968                 goto error;
969
970         /* setup the state */
971         state->i2c = i2c;
972         state->config = *config;
973
974         if (state->config.ref_freq_Hz < 4000000
975             || state->config.ref_freq_Hz > 27000000) {
976                 dev_err(&state->i2c->dev, "%s: ref_freq of %d Hz not supported by this driver\n",
977                          KBUILD_MODNAME, state->config.ref_freq_Hz);
978                 goto error;
979         }
980
981         /* create dvb_frontend */
982         memcpy(&state->frontend.ops, &si2165_ops,
983                 sizeof(struct dvb_frontend_ops));
984         state->frontend.demodulator_priv = state;
985
986         /* powerup */
987         io_ret = si2165_writereg8(state, 0x0000, state->config.chip_mode);
988         if (io_ret < 0)
989                 goto error;
990
991         io_ret = si2165_readreg8(state, 0x0000, &val);
992         if (io_ret < 0)
993                 goto error;
994         if (val != state->config.chip_mode)
995                 goto error;
996
997         io_ret = si2165_readreg8(state, 0x0023, &state->chip_revcode);
998         if (io_ret < 0)
999                 goto error;
1000
1001         io_ret = si2165_readreg8(state, 0x0118, &state->chip_type);
1002         if (io_ret < 0)
1003                 goto error;
1004
1005         /* powerdown */
1006         io_ret = si2165_writereg8(state, 0x0000, SI2165_MODE_OFF);
1007         if (io_ret < 0)
1008                 goto error;
1009
1010         if (state->chip_revcode < 26)
1011                 rev_char = 'A' + state->chip_revcode;
1012         else
1013                 rev_char = '?';
1014
1015         switch (state->chip_type) {
1016         case 0x06:
1017                 chip_name = "Si2161";
1018                 state->has_dvbt = true;
1019                 break;
1020         case 0x07:
1021                 chip_name = "Si2165";
1022                 state->has_dvbt = true;
1023                 state->has_dvbc = true;
1024                 break;
1025         default:
1026                 dev_err(&state->i2c->dev, "%s: Unsupported Silicon Labs chip (type %d, rev %d)\n",
1027                         KBUILD_MODNAME, state->chip_type, state->chip_revcode);
1028                 goto error;
1029         }
1030
1031         dev_info(&state->i2c->dev,
1032                 "%s: Detected Silicon Labs %s-%c (type %d, rev %d)\n",
1033                 KBUILD_MODNAME, chip_name, rev_char, state->chip_type,
1034                 state->chip_revcode);
1035
1036         strlcat(state->frontend.ops.info.name, chip_name,
1037                         sizeof(state->frontend.ops.info.name));
1038
1039         n = 0;
1040         if (state->has_dvbt) {
1041                 state->frontend.ops.delsys[n++] = SYS_DVBT;
1042                 strlcat(state->frontend.ops.info.name, " DVB-T",
1043                         sizeof(state->frontend.ops.info.name));
1044         }
1045         if (state->has_dvbc)
1046                 dev_warn(&state->i2c->dev, "%s: DVB-C is not yet supported.\n",
1047                        KBUILD_MODNAME);
1048
1049         return &state->frontend;
1050
1051 error:
1052         kfree(state);
1053         return NULL;
1054 }
1055 EXPORT_SYMBOL(si2165_attach);
1056
1057 module_param(debug, int, 0644);
1058 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1059
1060 MODULE_DESCRIPTION("Silicon Labs Si2165 DVB-C/-T Demodulator driver");
1061 MODULE_AUTHOR("Matthias Schwarzott <zzam@gentoo.org>");
1062 MODULE_LICENSE("GPL");
1063 MODULE_FIRMWARE(SI2165_FIRMWARE_REV_D);