These changes are the raw update to linux-4.4.6-rt14. Kernel sources
[kvmfornfv.git] / kernel / drivers / media / dvb-frontends / horus3a.c
1 /*
2  * horus3a.h
3  *
4  * Sony Horus3A DVB-S/S2 tuner driver
5  *
6  * Copyright 2012 Sony Corporation
7  * Copyright (C) 2014 NetUP Inc.
8  * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
9  * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  * GNU General Public License for more details.
20  */
21
22 #include <linux/slab.h>
23 #include <linux/module.h>
24 #include <linux/dvb/frontend.h>
25 #include <linux/types.h>
26 #include "horus3a.h"
27 #include "dvb_frontend.h"
28
29 #define MAX_WRITE_REGSIZE      5
30
31 enum horus3a_state {
32         STATE_UNKNOWN,
33         STATE_SLEEP,
34         STATE_ACTIVE
35 };
36
37 struct horus3a_priv {
38         u32                     frequency;
39         u8                      i2c_address;
40         struct i2c_adapter      *i2c;
41         enum horus3a_state      state;
42         void                    *set_tuner_data;
43         int                     (*set_tuner)(void *, int);
44 };
45
46 static void horus3a_i2c_debug(struct horus3a_priv *priv,
47                               u8 reg, u8 write, const u8 *data, u32 len)
48 {
49         dev_dbg(&priv->i2c->dev, "horus3a: I2C %s reg 0x%02x size %d\n",
50                 (write == 0 ? "read" : "write"), reg, len);
51         print_hex_dump_bytes("horus3a: I2C data: ",
52                 DUMP_PREFIX_OFFSET, data, len);
53 }
54
55 static int horus3a_write_regs(struct horus3a_priv *priv,
56                               u8 reg, const u8 *data, u32 len)
57 {
58         int ret;
59         u8 buf[MAX_WRITE_REGSIZE + 1];
60         struct i2c_msg msg[1] = {
61                 {
62                         .addr = priv->i2c_address,
63                         .flags = 0,
64                         .len = len + 1,
65                         .buf = buf,
66                 }
67         };
68
69         if (len + 1 >= sizeof(buf)) {
70                 dev_warn(&priv->i2c->dev,"wr reg=%04x: len=%d is too big!\n",
71                          reg, len + 1);
72                 return -E2BIG;
73         }
74
75         horus3a_i2c_debug(priv, reg, 1, data, len);
76         buf[0] = reg;
77         memcpy(&buf[1], data, len);
78         ret = i2c_transfer(priv->i2c, msg, 1);
79         if (ret >= 0 && ret != 1)
80                 ret = -EREMOTEIO;
81         if (ret < 0) {
82                 dev_warn(&priv->i2c->dev,
83                         "%s: i2c wr failed=%d reg=%02x len=%d\n",
84                         KBUILD_MODNAME, ret, reg, len);
85                 return ret;
86         }
87         return 0;
88 }
89
90 static int horus3a_write_reg(struct horus3a_priv *priv, u8 reg, u8 val)
91 {
92         return horus3a_write_regs(priv, reg, &val, 1);
93 }
94
95 static int horus3a_enter_power_save(struct horus3a_priv *priv)
96 {
97         u8 data[2];
98
99         dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
100         if (priv->state == STATE_SLEEP)
101                 return 0;
102         /* IQ Generator disable */
103         horus3a_write_reg(priv, 0x2a, 0x79);
104         /* MDIV_EN = 0 */
105         horus3a_write_reg(priv, 0x29, 0x70);
106         /* VCO disable preparation */
107         horus3a_write_reg(priv, 0x28, 0x3e);
108         /* VCO buffer disable */
109         horus3a_write_reg(priv, 0x2a, 0x19);
110         /* VCO calibration disable */
111         horus3a_write_reg(priv, 0x1c, 0x00);
112         /* Power save setting (xtal is not stopped) */
113         data[0] = 0xC0;
114         /* LNA is Disabled */
115         data[1] = 0xA7;
116         /* 0x11 - 0x12 */
117         horus3a_write_regs(priv, 0x11, data, sizeof(data));
118         priv->state = STATE_SLEEP;
119         return 0;
120 }
121
122 static int horus3a_leave_power_save(struct horus3a_priv *priv)
123 {
124         u8 data[2];
125
126         dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
127         if (priv->state == STATE_ACTIVE)
128                 return 0;
129         /* Leave power save */
130         data[0] = 0x00;
131         /* LNA is Disabled */
132         data[1] = 0xa7;
133         /* 0x11 - 0x12 */
134         horus3a_write_regs(priv, 0x11, data, sizeof(data));
135         /* VCO buffer enable */
136         horus3a_write_reg(priv, 0x2a, 0x79);
137         /* VCO calibration enable */
138         horus3a_write_reg(priv, 0x1c, 0xc0);
139         /* MDIV_EN = 1 */
140         horus3a_write_reg(priv, 0x29, 0x71);
141         usleep_range(5000, 7000);
142         priv->state = STATE_ACTIVE;
143         return 0;
144 }
145
146 static int horus3a_init(struct dvb_frontend *fe)
147 {
148         struct horus3a_priv *priv = fe->tuner_priv;
149
150         dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
151         return 0;
152 }
153
154 static int horus3a_release(struct dvb_frontend *fe)
155 {
156         struct horus3a_priv *priv = fe->tuner_priv;
157
158         dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
159         kfree(fe->tuner_priv);
160         fe->tuner_priv = NULL;
161         return 0;
162 }
163
164 static int horus3a_sleep(struct dvb_frontend *fe)
165 {
166         struct horus3a_priv *priv = fe->tuner_priv;
167
168         dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
169         horus3a_enter_power_save(priv);
170         return 0;
171 }
172
173 static int horus3a_set_params(struct dvb_frontend *fe)
174 {
175         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
176         struct horus3a_priv *priv = fe->tuner_priv;
177         u32 frequency = p->frequency;
178         u32 symbol_rate = p->symbol_rate/1000;
179         u8 mixdiv = 0;
180         u8 mdiv = 0;
181         u32 ms = 0;
182         u8 f_ctl = 0;
183         u8 g_ctl = 0;
184         u8 fc_lpf = 0;
185         u8 data[5];
186
187         dev_dbg(&priv->i2c->dev, "%s(): frequency %dkHz symbol_rate %dksps\n",
188                 __func__, frequency, symbol_rate);
189         if (priv->set_tuner)
190                 priv->set_tuner(priv->set_tuner_data, 0);
191         if (priv->state == STATE_SLEEP)
192                 horus3a_leave_power_save(priv);
193
194         /* frequency should be X MHz (X : integer) */
195         frequency = DIV_ROUND_CLOSEST(frequency, 1000) * 1000;
196         if (frequency <= 1155000) {
197                 mixdiv = 4;
198                 mdiv = 1;
199         } else {
200                 mixdiv = 2;
201                 mdiv = 0;
202         }
203         /* Assumed that fREF == 1MHz (1000kHz) */
204         ms = DIV_ROUND_CLOSEST((frequency * mixdiv) / 2, 1000);
205         if (ms > 0x7FFF) { /* 15 bit */
206                 dev_err(&priv->i2c->dev, "horus3a: invalid frequency %d\n",
207                         frequency);
208                 return -EINVAL;
209         }
210         if (frequency < 975000) {
211                 /* F_CTL=11100 G_CTL=001 */
212                 f_ctl = 0x1C;
213                 g_ctl = 0x01;
214         } else if (frequency < 1050000) {
215                 /* F_CTL=11000 G_CTL=010 */
216                 f_ctl = 0x18;
217                 g_ctl = 0x02;
218         } else if (frequency < 1150000) {
219                 /* F_CTL=10100 G_CTL=010 */
220                 f_ctl = 0x14;
221                 g_ctl = 0x02;
222         } else if (frequency < 1250000) {
223                 /* F_CTL=10000 G_CTL=011 */
224                 f_ctl = 0x10;
225                 g_ctl = 0x03;
226         } else if (frequency < 1350000) {
227                 /* F_CTL=01100 G_CTL=100 */
228                 f_ctl = 0x0C;
229                 g_ctl = 0x04;
230         } else if (frequency < 1450000) {
231                 /* F_CTL=01010 G_CTL=100 */
232                 f_ctl = 0x0A;
233                 g_ctl = 0x04;
234         } else if (frequency < 1600000) {
235                 /* F_CTL=00111 G_CTL=101 */
236                 f_ctl = 0x07;
237                 g_ctl = 0x05;
238         } else if (frequency < 1800000) {
239                 /* F_CTL=00100 G_CTL=010 */
240                 f_ctl = 0x04;
241                 g_ctl = 0x02;
242         } else if (frequency < 2000000) {
243                 /* F_CTL=00010 G_CTL=001 */
244                 f_ctl = 0x02;
245                 g_ctl = 0x01;
246         } else {
247                 /* F_CTL=00000 G_CTL=000 */
248                 f_ctl = 0x00;
249                 g_ctl = 0x00;
250         }
251         /* LPF cutoff frequency setting */
252         if (p->delivery_system == SYS_DVBS) {
253                 /*
254                  * rolloff = 0.35
255                  * SR <= 4.3
256                  * fc_lpf = 5
257                  * 4.3 < SR <= 10
258                  * fc_lpf = SR * (1 + rolloff) / 2 + SR / 2 =
259                  *      SR * 1.175 = SR * (47/40)
260                  * 10 < SR
261                  * fc_lpf = SR * (1 + rolloff) / 2 + 5 =
262                  *      SR * 0.675 + 5 = SR * (27/40) + 5
263                  * NOTE: The result should be round up.
264                  */
265                 if (symbol_rate <= 4300)
266                         fc_lpf = 5;
267                 else if (symbol_rate <= 10000)
268                         fc_lpf = (u8)DIV_ROUND_UP(symbol_rate * 47, 40000);
269                 else
270                         fc_lpf = (u8)DIV_ROUND_UP(symbol_rate * 27, 40000) + 5;
271                 /* 5 <= fc_lpf <= 36 */
272                 if (fc_lpf > 36)
273                         fc_lpf = 36;
274         } else if (p->delivery_system == SYS_DVBS2) {
275                 int rolloff;
276
277                 switch (p->rolloff) {
278                 case ROLLOFF_35:
279                         rolloff = 35;
280                         break;
281                 case ROLLOFF_25:
282                         rolloff = 25;
283                         break;
284                 case ROLLOFF_20:
285                         rolloff = 20;
286                         break;
287                 case ROLLOFF_AUTO:
288                 default:
289                         dev_err(&priv->i2c->dev,
290                                 "horus3a: auto roll-off is not supported\n");
291                         return -EINVAL;
292                 }
293                 /*
294                  * SR <= 4.5:
295                  * fc_lpf = 5
296                  * 4.5 < SR <= 10:
297                  * fc_lpf = SR * (1 + rolloff) / 2 + SR / 2
298                  * 10 < SR:
299                  * fc_lpf = SR * (1 + rolloff) / 2 + 5
300                  * NOTE: The result should be round up.
301                  */
302                 if (symbol_rate <= 4500)
303                         fc_lpf = 5;
304                 else if (symbol_rate <= 10000)
305                         fc_lpf = (u8)DIV_ROUND_UP(
306                                 symbol_rate * (200 + rolloff), 200000);
307                 else
308                         fc_lpf = (u8)DIV_ROUND_UP(
309                                 symbol_rate * (100 + rolloff), 200000) + 5;
310                 /* 5 <= fc_lpf <= 36 is valid */
311                 if (fc_lpf > 36)
312                         fc_lpf = 36;
313         } else {
314                 dev_err(&priv->i2c->dev,
315                         "horus3a: invalid delivery system %d\n",
316                         p->delivery_system);
317                 return -EINVAL;
318         }
319         /* 0x00 - 0x04 */
320         data[0] = (u8)((ms >> 7) & 0xFF);
321         data[1] = (u8)((ms << 1) & 0xFF);
322         data[2] = 0x00;
323         data[3] = 0x00;
324         data[4] = (u8)(mdiv << 7);
325         horus3a_write_regs(priv, 0x00, data, sizeof(data));
326         /* Write G_CTL, F_CTL */
327         horus3a_write_reg(priv, 0x09, (u8)((g_ctl << 5) | f_ctl));
328         /* Write LPF cutoff frequency */
329         horus3a_write_reg(priv, 0x37, (u8)(0x80 | (fc_lpf << 1)));
330         /* Start Calibration */
331         horus3a_write_reg(priv, 0x05, 0x80);
332         /* IQ Generator enable */
333         horus3a_write_reg(priv, 0x2a, 0x7b);
334         /* tuner stabilization time */
335         msleep(60);
336         /* Store tuned frequency to the struct */
337         priv->frequency = ms * 2 * 1000 / mixdiv;
338         return 0;
339 }
340
341 static int horus3a_get_frequency(struct dvb_frontend *fe, u32 *frequency)
342 {
343         struct horus3a_priv *priv = fe->tuner_priv;
344
345         *frequency = priv->frequency;
346         return 0;
347 }
348
349 static struct dvb_tuner_ops horus3a_tuner_ops = {
350         .info = {
351                 .name = "Sony Horus3a",
352                 .frequency_min = 950000,
353                 .frequency_max = 2150000,
354                 .frequency_step = 1000,
355         },
356         .init = horus3a_init,
357         .release = horus3a_release,
358         .sleep = horus3a_sleep,
359         .set_params = horus3a_set_params,
360         .get_frequency = horus3a_get_frequency,
361 };
362
363 struct dvb_frontend *horus3a_attach(struct dvb_frontend *fe,
364                                     const struct horus3a_config *config,
365                                     struct i2c_adapter *i2c)
366 {
367         u8 buf[3], val;
368         struct horus3a_priv *priv = NULL;
369
370         priv = kzalloc(sizeof(struct horus3a_priv), GFP_KERNEL);
371         if (priv == NULL)
372                 return NULL;
373         priv->i2c_address = (config->i2c_address >> 1);
374         priv->i2c = i2c;
375         priv->set_tuner_data = config->set_tuner_priv;
376         priv->set_tuner = config->set_tuner_callback;
377
378         if (fe->ops.i2c_gate_ctrl)
379                 fe->ops.i2c_gate_ctrl(fe, 1);
380
381         /* wait 4ms after power on */
382         usleep_range(4000, 6000);
383         /* IQ Generator disable */
384         horus3a_write_reg(priv, 0x2a, 0x79);
385         /* REF_R = Xtal Frequency */
386         buf[0] = config->xtal_freq_mhz;
387         buf[1] = config->xtal_freq_mhz;
388         buf[2] = 0;
389         /* 0x6 - 0x8 */
390         horus3a_write_regs(priv, 0x6, buf, 3);
391         /* IQ Out = Single Ended */
392         horus3a_write_reg(priv, 0x0a, 0x40);
393         switch (config->xtal_freq_mhz) {
394         case 27:
395                 val = 0x1f;
396                 break;
397         case 24:
398                 val = 0x10;
399                 break;
400         case 16:
401                 val = 0xc;
402                 break;
403         default:
404                 val = 0;
405                 dev_warn(&priv->i2c->dev,
406                         "horus3a: invalid xtal frequency %dMHz\n",
407                         config->xtal_freq_mhz);
408                 break;
409         }
410         val <<= 2;
411         horus3a_write_reg(priv, 0x0e, val);
412         horus3a_enter_power_save(priv);
413         usleep_range(3000, 5000);
414
415         if (fe->ops.i2c_gate_ctrl)
416                 fe->ops.i2c_gate_ctrl(fe, 0);
417
418         memcpy(&fe->ops.tuner_ops, &horus3a_tuner_ops,
419                                 sizeof(struct dvb_tuner_ops));
420         fe->tuner_priv = priv;
421         dev_info(&priv->i2c->dev,
422                 "Sony HORUS3A attached on addr=%x at I2C adapter %p\n",
423                 priv->i2c_address, priv->i2c);
424         return fe;
425 }
426 EXPORT_SYMBOL(horus3a_attach);
427
428 MODULE_DESCRIPTION("Sony HORUS3A sattelite tuner driver");
429 MODULE_AUTHOR("Sergey Kozlov <serjk@netup.ru>");
430 MODULE_LICENSE("GPL");