kernel/drivers/iommu/amd_iommu_v2.c

   1 /*
   2  * Copyright (C) 2010-2012 Advanced Micro Devices, Inc.
   3  * Author: Joerg Roedel <jroedel@suse.de>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published
   7  * by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  17  */
  18
  19 #include <linux/mmu_notifier.h>
  20 #include <linux/amd-iommu.h>
  21 #include <linux/mm_types.h>
  22 #include <linux/profile.h>
  23 #include <linux/module.h>
  24 #include <linux/sched.h>
  25 #include <linux/iommu.h>
  26 #include <linux/wait.h>
  27 #include <linux/pci.h>
  28 #include <linux/gfp.h>
  29
  30 #include "amd_iommu_types.h"
  31 #include "amd_iommu_proto.h"
  32
  33 MODULE_LICENSE("GPL v2");
  34 MODULE_AUTHOR("Joerg Roedel <jroedel@suse.de>");
  35
  36 #define MAX_DEVICES             0x10000
  37 #define PRI_QUEUE_SIZE          512
  38
  39 struct pri_queue {
  40         atomic_t inflight;
  41         bool finish;
  42         int status;
  43 };
  44
  45 struct pasid_state {
  46         struct list_head list;                  /* For global state-list */
  47         atomic_t count;                         /* Reference count */
  48         unsigned mmu_notifier_count;            /* Counting nested mmu_notifier
  49                                                    calls */
  50         struct mm_struct *mm;                   /* mm_struct for the faults */
  51         struct mmu_notifier mn;                 /* mmu_notifier handle */
  52         struct pri_queue pri[PRI_QUEUE_SIZE];   /* PRI tag states */
  53         struct device_state *device_state;      /* Link to our device_state */
  54         int pasid;                              /* PASID index */
  55         bool invalid;                           /* Used during setup and
  56                                                    teardown of the pasid */
  57         spinlock_t lock;                        /* Protect pri_queues and
  58                                                    mmu_notifer_count */
  59         wait_queue_head_t wq;                   /* To wait for count == 0 */
  60 };
  61
  62 struct device_state {
  63         struct list_head list;
  64         u16 devid;
  65         atomic_t count;
  66         struct pci_dev *pdev;
  67         struct pasid_state **states;
  68         struct iommu_domain *domain;
  69         int pasid_levels;
  70         int max_pasids;
  71         amd_iommu_invalid_ppr_cb inv_ppr_cb;
  72         amd_iommu_invalidate_ctx inv_ctx_cb;
  73         spinlock_t lock;
  74         wait_queue_head_t wq;
  75 };
  76
  77 struct fault {
  78         struct work_struct work;
  79         struct device_state *dev_state;
  80         struct pasid_state *state;
  81         struct mm_struct *mm;
  82         u64 address;
  83         u16 devid;
  84         u16 pasid;
  85         u16 tag;
  86         u16 finish;
  87         u16 flags;
  88 };
  89
  90 static LIST_HEAD(state_list);
  91 static spinlock_t state_lock;
  92
  93 static struct workqueue_struct *iommu_wq;
  94
  95 static void free_pasid_states(struct device_state *dev_state);
  96
  97 static u16 device_id(struct pci_dev *pdev)
  98 {
  99         u16 devid;
 100
 101         devid = pdev->bus->number;
 102         devid = (devid << 8) | pdev->devfn;
 103
 104         return devid;
 105 }
 106
 107 static struct device_state *__get_device_state(u16 devid)
 108 {
 109         struct device_state *dev_state;
 110
 111         list_for_each_entry(dev_state, &state_list, list) {
 112                 if (dev_state->devid == devid)
 113                         return dev_state;
 114         }
 115
 116         return NULL;
 117 }
 118
 119 static struct device_state *get_device_state(u16 devid)
 120 {
 121         struct device_state *dev_state;
 122         unsigned long flags;
 123
 124         spin_lock_irqsave(&state_lock, flags);
 125         dev_state = __get_device_state(devid);
 126         if (dev_state != NULL)
 127                 atomic_inc(&dev_state->count);
 128         spin_unlock_irqrestore(&state_lock, flags);
 129
 130         return dev_state;
 131 }
 132
 133 static void free_device_state(struct device_state *dev_state)
 134 {
 135         /*
 136          * First detach device from domain - No more PRI requests will arrive
 137          * from that device after it is unbound from the IOMMUv2 domain.
 138          */
 139         iommu_detach_device(dev_state->domain, &dev_state->pdev->dev);
 140
 141         /* Everything is down now, free the IOMMUv2 domain */
 142         iommu_domain_free(dev_state->domain);
 143
 144         /* Finally get rid of the device-state */
 145         kfree(dev_state);
 146 }
 147
 148 static void put_device_state(struct device_state *dev_state)
 149 {
 150         if (atomic_dec_and_test(&dev_state->count))
 151                 wake_up(&dev_state->wq);
 152 }
 153
 154 /* Must be called under dev_state->lock */
 155 static struct pasid_state **__get_pasid_state_ptr(struct device_state *dev_state,
 156                                                   int pasid, bool alloc)
 157 {
 158         struct pasid_state **root, **ptr;
 159         int level, index;
 160
 161         level = dev_state->pasid_levels;
 162         root  = dev_state->states;
 163
 164         while (true) {
 165
 166                 index = (pasid >> (9 * level)) & 0x1ff;
 167                 ptr   = &root[index];
 168
 169                 if (level == 0)
 170                         break;
 171
 172                 if (*ptr == NULL) {
 173                         if (!alloc)
 174                                 return NULL;
 175
 176                         *ptr = (void *)get_zeroed_page(GFP_ATOMIC);
 177                         if (*ptr == NULL)
 178                                 return NULL;
 179                 }
 180
 181                 root   = (struct pasid_state **)*ptr;
 182                 level -= 1;
 183         }
 184
 185         return ptr;
 186 }
 187
 188 static int set_pasid_state(struct device_state *dev_state,
 189                            struct pasid_state *pasid_state,
 190                            int pasid)
 191 {
 192         struct pasid_state **ptr;
 193         unsigned long flags;
 194         int ret;
 195
 196         spin_lock_irqsave(&dev_state->lock, flags);
 197         ptr = __get_pasid_state_ptr(dev_state, pasid, true);
 198
 199         ret = -ENOMEM;
 200         if (ptr == NULL)
 201                 goto out_unlock;
 202
 203         ret = -ENOMEM;
 204         if (*ptr != NULL)
 205                 goto out_unlock;
 206
 207         *ptr = pasid_state;
 208
 209         ret = 0;
 210
 211 out_unlock:
 212         spin_unlock_irqrestore(&dev_state->lock, flags);
 213
 214         return ret;
 215 }
 216
 217 static void clear_pasid_state(struct device_state *dev_state, int pasid)
 218 {
 219         struct pasid_state **ptr;
 220         unsigned long flags;
 221
 222         spin_lock_irqsave(&dev_state->lock, flags);
 223         ptr = __get_pasid_state_ptr(dev_state, pasid, true);
 224
 225         if (ptr == NULL)
 226                 goto out_unlock;
 227
 228         *ptr = NULL;
 229
 230 out_unlock:
 231         spin_unlock_irqrestore(&dev_state->lock, flags);
 232 }
 233
 234 static struct pasid_state *get_pasid_state(struct device_state *dev_state,
 235                                            int pasid)
 236 {
 237         struct pasid_state **ptr, *ret = NULL;
 238         unsigned long flags;
 239
 240         spin_lock_irqsave(&dev_state->lock, flags);
 241         ptr = __get_pasid_state_ptr(dev_state, pasid, false);
 242
 243         if (ptr == NULL)
 244                 goto out_unlock;
 245
 246         ret = *ptr;
 247         if (ret)
 248                 atomic_inc(&ret->count);
 249
 250 out_unlock:
 251         spin_unlock_irqrestore(&dev_state->lock, flags);
 252
 253         return ret;
 254 }
 255
 256 static void free_pasid_state(struct pasid_state *pasid_state)
 257 {
 258         kfree(pasid_state);
 259 }
 260
 261 static void put_pasid_state(struct pasid_state *pasid_state)
 262 {
 263         if (atomic_dec_and_test(&pasid_state->count))
 264                 wake_up(&pasid_state->wq);
 265 }
 266
 267 static void put_pasid_state_wait(struct pasid_state *pasid_state)
 268 {
 269         atomic_dec(&pasid_state->count);
 270         wait_event(pasid_state->wq, !atomic_read(&pasid_state->count));
 271         free_pasid_state(pasid_state);
 272 }
 273
 274 static void unbind_pasid(struct pasid_state *pasid_state)
 275 {
 276         struct iommu_domain *domain;
 277
 278         domain = pasid_state->device_state->domain;
 279
 280         /*
 281          * Mark pasid_state as invalid, no more faults will we added to the
 282          * work queue after this is visible everywhere.
 283          */
 284         pasid_state->invalid = true;
 285
 286         /* Make sure this is visible */
 287         smp_wmb();
 288
 289         /* After this the device/pasid can't access the mm anymore */
 290         amd_iommu_domain_clear_gcr3(domain, pasid_state->pasid);
 291
 292         /* Make sure no more pending faults are in the queue */
 293         flush_workqueue(iommu_wq);
 294 }
 295
 296 static void free_pasid_states_level1(struct pasid_state **tbl)
 297 {
 298         int i;
 299
 300         for (i = 0; i < 512; ++i) {
 301                 if (tbl[i] == NULL)
 302                         continue;
 303
 304                 free_page((unsigned long)tbl[i]);
 305         }
 306 }
 307
 308 static void free_pasid_states_level2(struct pasid_state **tbl)
 309 {
 310         struct pasid_state **ptr;
 311         int i;
 312
 313         for (i = 0; i < 512; ++i) {
 314                 if (tbl[i] == NULL)
 315                         continue;
 316
 317                 ptr = (struct pasid_state **)tbl[i];
 318                 free_pasid_states_level1(ptr);
 319         }
 320 }
 321
 322 static void free_pasid_states(struct device_state *dev_state)
 323 {
 324         struct pasid_state *pasid_state;
 325         int i;
 326
 327         for (i = 0; i < dev_state->max_pasids; ++i) {
 328                 pasid_state = get_pasid_state(dev_state, i);
 329                 if (pasid_state == NULL)
 330                         continue;
 331
 332                 put_pasid_state(pasid_state);
 333
 334                 /*
 335                  * This will call the mn_release function and
 336                  * unbind the PASID
 337                  */
 338                 mmu_notifier_unregister(&pasid_state->mn, pasid_state->mm);
 339
 340                 put_pasid_state_wait(pasid_state); /* Reference taken in
 341                                                       amd_iommu_bind_pasid */
 342
 343                 /* Drop reference taken in amd_iommu_bind_pasid */
 344                 put_device_state(dev_state);
 345         }
 346
 347         if (dev_state->pasid_levels == 2)
 348                 free_pasid_states_level2(dev_state->states);
 349         else if (dev_state->pasid_levels == 1)
 350                 free_pasid_states_level1(dev_state->states);
 351         else if (dev_state->pasid_levels != 0)
 352                 BUG();
 353
 354         free_page((unsigned long)dev_state->states);
 355 }
 356
 357 static struct pasid_state *mn_to_state(struct mmu_notifier *mn)
 358 {
 359         return container_of(mn, struct pasid_state, mn);
 360 }
 361
 362 static void __mn_flush_page(struct mmu_notifier *mn,
 363                             unsigned long address)
 364 {
 365         struct pasid_state *pasid_state;
 366         struct device_state *dev_state;
 367
 368         pasid_state = mn_to_state(mn);
 369         dev_state   = pasid_state->device_state;
 370
 371         amd_iommu_flush_page(dev_state->domain, pasid_state->pasid, address);
 372 }
 373
 374 static int mn_clear_flush_young(struct mmu_notifier *mn,
 375                                 struct mm_struct *mm,
 376                                 unsigned long start,
 377                                 unsigned long end)
 378 {
 379         for (; start < end; start += PAGE_SIZE)
 380                 __mn_flush_page(mn, start);
 381
 382         return 0;
 383 }
 384
 385 static void mn_invalidate_page(struct mmu_notifier *mn,
 386                                struct mm_struct *mm,
 387                                unsigned long address)
 388 {
 389         __mn_flush_page(mn, address);
 390 }
 391
 392 static void mn_invalidate_range(struct mmu_notifier *mn,
 393                                 struct mm_struct *mm,
 394                                 unsigned long start, unsigned long end)
 395 {
 396         struct pasid_state *pasid_state;
 397         struct device_state *dev_state;
 398
 399         pasid_state = mn_to_state(mn);
 400         dev_state   = pasid_state->device_state;
 401
 402         if ((start ^ (end - 1)) < PAGE_SIZE)
 403                 amd_iommu_flush_page(dev_state->domain, pasid_state->pasid,
 404                                      start);
 405         else
 406                 amd_iommu_flush_tlb(dev_state->domain, pasid_state->pasid);
 407 }
 408
 409 static void mn_release(struct mmu_notifier *mn, struct mm_struct *mm)
 410 {
 411         struct pasid_state *pasid_state;
 412         struct device_state *dev_state;
 413         bool run_inv_ctx_cb;
 414
 415         might_sleep();
 416
 417         pasid_state    = mn_to_state(mn);
 418         dev_state      = pasid_state->device_state;
 419         run_inv_ctx_cb = !pasid_state->invalid;
 420
 421         if (run_inv_ctx_cb && dev_state->inv_ctx_cb)
 422                 dev_state->inv_ctx_cb(dev_state->pdev, pasid_state->pasid);
 423
 424         unbind_pasid(pasid_state);
 425 }
 426
 427 static struct mmu_notifier_ops iommu_mn = {
 428         .release                = mn_release,
 429         .clear_flush_young      = mn_clear_flush_young,
 430         .invalidate_page        = mn_invalidate_page,
 431         .invalidate_range       = mn_invalidate_range,
 432 };
 433
 434 static void set_pri_tag_status(struct pasid_state *pasid_state,
 435                                u16 tag, int status)
 436 {
 437         unsigned long flags;
 438
 439         spin_lock_irqsave(&pasid_state->lock, flags);
 440         pasid_state->pri[tag].status = status;
 441         spin_unlock_irqrestore(&pasid_state->lock, flags);
 442 }
 443
 444 static void finish_pri_tag(struct device_state *dev_state,
 445                            struct pasid_state *pasid_state,
 446                            u16 tag)
 447 {
 448         unsigned long flags;
 449
 450         spin_lock_irqsave(&pasid_state->lock, flags);
 451         if (atomic_dec_and_test(&pasid_state->pri[tag].inflight) &&
 452             pasid_state->pri[tag].finish) {
 453                 amd_iommu_complete_ppr(dev_state->pdev, pasid_state->pasid,
 454                                        pasid_state->pri[tag].status, tag);
 455                 pasid_state->pri[tag].finish = false;
 456                 pasid_state->pri[tag].status = PPR_SUCCESS;
 457         }
 458         spin_unlock_irqrestore(&pasid_state->lock, flags);
 459 }
 460
 461 static void handle_fault_error(struct fault *fault)
 462 {
 463         int status;
 464
 465         if (!fault->dev_state->inv_ppr_cb) {
 466                 set_pri_tag_status(fault->state, fault->tag, PPR_INVALID);
 467                 return;
 468         }
 469
 470         status = fault->dev_state->inv_ppr_cb(fault->dev_state->pdev,
 471                                               fault->pasid,
 472                                               fault->address,
 473                                               fault->flags);
 474         switch (status) {
 475         case AMD_IOMMU_INV_PRI_RSP_SUCCESS:
 476                 set_pri_tag_status(fault->state, fault->tag, PPR_SUCCESS);
 477                 break;
 478         case AMD_IOMMU_INV_PRI_RSP_INVALID:
 479                 set_pri_tag_status(fault->state, fault->tag, PPR_INVALID);
 480                 break;
 481         case AMD_IOMMU_INV_PRI_RSP_FAIL:
 482                 set_pri_tag_status(fault->state, fault->tag, PPR_FAILURE);
 483                 break;
 484         default:
 485                 BUG();
 486         }
 487 }
 488
 489 static void do_fault(struct work_struct *work)
 490 {
 491         struct fault *fault = container_of(work, struct fault, work);
 492         struct mm_struct *mm;
 493         struct vm_area_struct *vma;
 494         u64 address;
 495         int ret, write;
 496
 497         write = !!(fault->flags & PPR_FAULT_WRITE);
 498
 499         mm = fault->state->mm;
 500         address = fault->address;
 501
 502         down_read(&mm->mmap_sem);
 503         vma = find_extend_vma(mm, address);
 504         if (!vma || address < vma->vm_start) {
 505                 /* failed to get a vma in the right range */
 506                 up_read(&mm->mmap_sem);
 507                 handle_fault_error(fault);
 508                 goto out;
 509         }
 510
 511         ret = handle_mm_fault(mm, vma, address, write);
 512         if (ret & VM_FAULT_ERROR) {
 513                 /* failed to service fault */
 514                 up_read(&mm->mmap_sem);
 515                 handle_fault_error(fault);
 516                 goto out;
 517         }
 518
 519         up_read(&mm->mmap_sem);
 520
 521 out:
 522         finish_pri_tag(fault->dev_state, fault->state, fault->tag);
 523
 524         put_pasid_state(fault->state);
 525
 526         kfree(fault);
 527 }
 528
 529 static int ppr_notifier(struct notifier_block *nb, unsigned long e, void *data)
 530 {
 531         struct amd_iommu_fault *iommu_fault;
 532         struct pasid_state *pasid_state;
 533         struct device_state *dev_state;
 534         unsigned long flags;
 535         struct fault *fault;
 536         bool finish;
 537         u16 tag;
 538         int ret;
 539
 540         iommu_fault = data;
 541         tag         = iommu_fault->tag & 0x1ff;
 542         finish      = (iommu_fault->tag >> 9) & 1;
 543
 544         ret = NOTIFY_DONE;
 545         dev_state = get_device_state(iommu_fault->device_id);
 546         if (dev_state == NULL)
 547                 goto out;
 548
 549         pasid_state = get_pasid_state(dev_state, iommu_fault->pasid);
 550         if (pasid_state == NULL || pasid_state->invalid) {
 551                 /* We know the device but not the PASID -> send INVALID */
 552                 amd_iommu_complete_ppr(dev_state->pdev, iommu_fault->pasid,
 553                                        PPR_INVALID, tag);
 554                 goto out_drop_state;
 555         }
 556
 557         spin_lock_irqsave(&pasid_state->lock, flags);
 558         atomic_inc(&pasid_state->pri[tag].inflight);
 559         if (finish)
 560                 pasid_state->pri[tag].finish = true;
 561         spin_unlock_irqrestore(&pasid_state->lock, flags);
 562
 563         fault = kzalloc(sizeof(*fault), GFP_ATOMIC);
 564         if (fault == NULL) {
 565                 /* We are OOM - send success and let the device re-fault */
 566                 finish_pri_tag(dev_state, pasid_state, tag);
 567                 goto out_drop_state;
 568         }
 569
 570         fault->dev_state = dev_state;
 571         fault->address   = iommu_fault->address;
 572         fault->state     = pasid_state;
 573         fault->tag       = tag;
 574         fault->finish    = finish;
 575         fault->pasid     = iommu_fault->pasid;
 576         fault->flags     = iommu_fault->flags;
 577         INIT_WORK(&fault->work, do_fault);
 578
 579         queue_work(iommu_wq, &fault->work);
 580
 581         ret = NOTIFY_OK;
 582
 583 out_drop_state:
 584
 585         if (ret != NOTIFY_OK && pasid_state)
 586                 put_pasid_state(pasid_state);
 587
 588         put_device_state(dev_state);
 589
 590 out:
 591         return ret;
 592 }
 593
 594 static struct notifier_block ppr_nb = {
 595         .notifier_call = ppr_notifier,
 596 };
 597
 598 int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
 599                          struct task_struct *task)
 600 {
 601         struct pasid_state *pasid_state;
 602         struct device_state *dev_state;
 603         struct mm_struct *mm;
 604         u16 devid;
 605         int ret;
 606
 607         might_sleep();
 608
 609         if (!amd_iommu_v2_supported())
 610                 return -ENODEV;
 611
 612         devid     = device_id(pdev);
 613         dev_state = get_device_state(devid);
 614
 615         if (dev_state == NULL)
 616                 return -EINVAL;
 617
 618         ret = -EINVAL;
 619         if (pasid < 0 || pasid >= dev_state->max_pasids)
 620                 goto out;
 621
 622         ret = -ENOMEM;
 623         pasid_state = kzalloc(sizeof(*pasid_state), GFP_KERNEL);
 624         if (pasid_state == NULL)
 625                 goto out;
 626
 627
 628         atomic_set(&pasid_state->count, 1);
 629         init_waitqueue_head(&pasid_state->wq);
 630         spin_lock_init(&pasid_state->lock);
 631
 632         mm                        = get_task_mm(task);
 633         pasid_state->mm           = mm;
 634         pasid_state->device_state = dev_state;
 635         pasid_state->pasid        = pasid;
 636         pasid_state->invalid      = true; /* Mark as valid only if we are
 637                                              done with setting up the pasid */
 638         pasid_state->mn.ops       = &iommu_mn;
 639
 640         if (pasid_state->mm == NULL)
 641                 goto out_free;
 642
 643         mmu_notifier_register(&pasid_state->mn, mm);
 644
 645         ret = set_pasid_state(dev_state, pasid_state, pasid);
 646         if (ret)
 647                 goto out_unregister;
 648
 649         ret = amd_iommu_domain_set_gcr3(dev_state->domain, pasid,
 650                                         __pa(pasid_state->mm->pgd));
 651         if (ret)
 652                 goto out_clear_state;
 653
 654         /* Now we are ready to handle faults */
 655         pasid_state->invalid = false;
 656
 657         /*
 658          * Drop the reference to the mm_struct here. We rely on the
 659          * mmu_notifier release call-back to inform us when the mm
 660          * is going away.
 661          */
 662         mmput(mm);
 663
 664         return 0;
 665
 666 out_clear_state:
 667         clear_pasid_state(dev_state, pasid);
 668
 669 out_unregister:
 670         mmu_notifier_unregister(&pasid_state->mn, mm);
 671
 672 out_free:
 673         mmput(mm);
 674         free_pasid_state(pasid_state);
 675
 676 out:
 677         put_device_state(dev_state);
 678
 679         return ret;
 680 }
 681 EXPORT_SYMBOL(amd_iommu_bind_pasid);
 682
 683 void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid)
 684 {
 685         struct pasid_state *pasid_state;
 686         struct device_state *dev_state;
 687         u16 devid;
 688
 689         might_sleep();
 690
 691         if (!amd_iommu_v2_supported())
 692                 return;
 693
 694         devid = device_id(pdev);
 695         dev_state = get_device_state(devid);
 696         if (dev_state == NULL)
 697                 return;
 698
 699         if (pasid < 0 || pasid >= dev_state->max_pasids)
 700                 goto out;
 701
 702         pasid_state = get_pasid_state(dev_state, pasid);
 703         if (pasid_state == NULL)
 704                 goto out;
 705         /*
 706          * Drop reference taken here. We are safe because we still hold
 707          * the reference taken in the amd_iommu_bind_pasid function.
 708          */
 709         put_pasid_state(pasid_state);
 710
 711         /* Clear the pasid state so that the pasid can be re-used */
 712         clear_pasid_state(dev_state, pasid_state->pasid);
 713
 714         /*
 715          * Call mmu_notifier_unregister to drop our reference
 716          * to pasid_state->mm
 717          */
 718         mmu_notifier_unregister(&pasid_state->mn, pasid_state->mm);
 719
 720         put_pasid_state_wait(pasid_state); /* Reference taken in
 721                                               amd_iommu_bind_pasid */
 722 out:
 723         /* Drop reference taken in this function */
 724         put_device_state(dev_state);
 725
 726         /* Drop reference taken in amd_iommu_bind_pasid */
 727         put_device_state(dev_state);
 728 }
 729 EXPORT_SYMBOL(amd_iommu_unbind_pasid);
 730
 731 int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
 732 {
 733         struct device_state *dev_state;
 734         unsigned long flags;
 735         int ret, tmp;
 736         u16 devid;
 737
 738         might_sleep();
 739
 740         if (!amd_iommu_v2_supported())
 741                 return -ENODEV;
 742
 743         if (pasids <= 0 || pasids > (PASID_MASK + 1))
 744                 return -EINVAL;
 745
 746         devid = device_id(pdev);
 747
 748         dev_state = kzalloc(sizeof(*dev_state), GFP_KERNEL);
 749         if (dev_state == NULL)
 750                 return -ENOMEM;
 751
 752         spin_lock_init(&dev_state->lock);
 753         init_waitqueue_head(&dev_state->wq);
 754         dev_state->pdev  = pdev;
 755         dev_state->devid = devid;
 756
 757         tmp = pasids;
 758         for (dev_state->pasid_levels = 0; (tmp - 1) & ~0x1ff; tmp >>= 9)
 759                 dev_state->pasid_levels += 1;
 760
 761         atomic_set(&dev_state->count, 1);
 762         dev_state->max_pasids = pasids;
 763
 764         ret = -ENOMEM;
 765         dev_state->states = (void *)get_zeroed_page(GFP_KERNEL);
 766         if (dev_state->states == NULL)
 767                 goto out_free_dev_state;
 768
 769         dev_state->domain = iommu_domain_alloc(&pci_bus_type);
 770         if (dev_state->domain == NULL)
 771                 goto out_free_states;
 772
 773         amd_iommu_domain_direct_map(dev_state->domain);
 774
 775         ret = amd_iommu_domain_enable_v2(dev_state->domain, pasids);
 776         if (ret)
 777                 goto out_free_domain;
 778
 779         ret = iommu_attach_device(dev_state->domain, &pdev->dev);
 780         if (ret != 0)
 781                 goto out_free_domain;
 782
 783         spin_lock_irqsave(&state_lock, flags);
 784
 785         if (__get_device_state(devid) != NULL) {
 786                 spin_unlock_irqrestore(&state_lock, flags);
 787                 ret = -EBUSY;
 788                 goto out_free_domain;
 789         }
 790
 791         list_add_tail(&dev_state->list, &state_list);
 792
 793         spin_unlock_irqrestore(&state_lock, flags);
 794
 795         return 0;
 796
 797 out_free_domain:
 798         iommu_domain_free(dev_state->domain);
 799
 800 out_free_states:
 801         free_page((unsigned long)dev_state->states);
 802
 803 out_free_dev_state:
 804         kfree(dev_state);
 805
 806         return ret;
 807 }
 808 EXPORT_SYMBOL(amd_iommu_init_device);
 809
 810 void amd_iommu_free_device(struct pci_dev *pdev)
 811 {
 812         struct device_state *dev_state;
 813         unsigned long flags;
 814         u16 devid;
 815
 816         if (!amd_iommu_v2_supported())
 817                 return;
 818
 819         devid = device_id(pdev);
 820
 821         spin_lock_irqsave(&state_lock, flags);
 822
 823         dev_state = __get_device_state(devid);
 824         if (dev_state == NULL) {
 825                 spin_unlock_irqrestore(&state_lock, flags);
 826                 return;
 827         }
 828
 829         list_del(&dev_state->list);
 830
 831         spin_unlock_irqrestore(&state_lock, flags);
 832
 833         /* Get rid of any remaining pasid states */
 834         free_pasid_states(dev_state);
 835
 836         put_device_state(dev_state);
 837         /*
 838          * Wait until the last reference is dropped before freeing
 839          * the device state.
 840          */
 841         wait_event(dev_state->wq, !atomic_read(&dev_state->count));
 842         free_device_state(dev_state);
 843 }
 844 EXPORT_SYMBOL(amd_iommu_free_device);
 845
 846 int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
 847                                  amd_iommu_invalid_ppr_cb cb)
 848 {
 849         struct device_state *dev_state;
 850         unsigned long flags;
 851         u16 devid;
 852         int ret;
 853
 854         if (!amd_iommu_v2_supported())
 855                 return -ENODEV;
 856
 857         devid = device_id(pdev);
 858
 859         spin_lock_irqsave(&state_lock, flags);
 860
 861         ret = -EINVAL;
 862         dev_state = __get_device_state(devid);
 863         if (dev_state == NULL)
 864                 goto out_unlock;
 865
 866         dev_state->inv_ppr_cb = cb;
 867
 868         ret = 0;
 869
 870 out_unlock:
 871         spin_unlock_irqrestore(&state_lock, flags);
 872
 873         return ret;
 874 }
 875 EXPORT_SYMBOL(amd_iommu_set_invalid_ppr_cb);
 876
 877 int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev,
 878                                     amd_iommu_invalidate_ctx cb)
 879 {
 880         struct device_state *dev_state;
 881         unsigned long flags;
 882         u16 devid;
 883         int ret;
 884
 885         if (!amd_iommu_v2_supported())
 886                 return -ENODEV;
 887
 888         devid = device_id(pdev);
 889
 890         spin_lock_irqsave(&state_lock, flags);
 891
 892         ret = -EINVAL;
 893         dev_state = __get_device_state(devid);
 894         if (dev_state == NULL)
 895                 goto out_unlock;
 896
 897         dev_state->inv_ctx_cb = cb;
 898
 899         ret = 0;
 900
 901 out_unlock:
 902         spin_unlock_irqrestore(&state_lock, flags);
 903
 904         return ret;
 905 }
 906 EXPORT_SYMBOL(amd_iommu_set_invalidate_ctx_cb);
 907
 908 static int __init amd_iommu_v2_init(void)
 909 {
 910         int ret;
 911
 912         pr_info("AMD IOMMUv2 driver by Joerg Roedel <jroedel@suse.de>\n");
 913
 914         if (!amd_iommu_v2_supported()) {
 915                 pr_info("AMD IOMMUv2 functionality not available on this system\n");
 916                 /*
 917                  * Load anyway to provide the symbols to other modules
 918                  * which may use AMD IOMMUv2 optionally.
 919                  */
 920                 return 0;
 921         }
 922
 923         spin_lock_init(&state_lock);
 924
 925         ret = -ENOMEM;
 926         iommu_wq = create_workqueue("amd_iommu_v2");
 927         if (iommu_wq == NULL)
 928                 goto out;
 929
 930         amd_iommu_register_ppr_notifier(&ppr_nb);
 931
 932         return 0;
 933
 934 out:
 935         return ret;
 936 }
 937
 938 static void __exit amd_iommu_v2_exit(void)
 939 {
 940         struct device_state *dev_state;
 941         int i;
 942
 943         if (!amd_iommu_v2_supported())
 944                 return;
 945
 946         amd_iommu_unregister_ppr_notifier(&ppr_nb);
 947
 948         flush_workqueue(iommu_wq);
 949
 950         /*
 951          * The loop below might call flush_workqueue(), so call
 952          * destroy_workqueue() after it
 953          */
 954         for (i = 0; i < MAX_DEVICES; ++i) {
 955                 dev_state = get_device_state(i);
 956
 957                 if (dev_state == NULL)
 958                         continue;
 959
 960                 WARN_ON_ONCE(1);
 961
 962                 put_device_state(dev_state);
 963                 amd_iommu_free_device(dev_state->pdev);
 964         }
 965
 966         destroy_workqueue(iommu_wq);
 967 }
 968
 969 module_init(amd_iommu_v2_init);
 970 module_exit(amd_iommu_v2_exit);