kernel/drivers/infiniband/hw/mlx4/mad.c

   1 /*
   2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <rdma/ib_mad.h>
  34 #include <rdma/ib_smi.h>
  35 #include <rdma/ib_sa.h>
  36 #include <rdma/ib_cache.h>
  37
  38 #include <linux/random.h>
  39 #include <linux/mlx4/cmd.h>
  40 #include <linux/gfp.h>
  41 #include <rdma/ib_pma.h>
  42
  43 #include "mlx4_ib.h"
  44
  45 enum {
  46         MLX4_IB_VENDOR_CLASS1 = 0x9,
  47         MLX4_IB_VENDOR_CLASS2 = 0xa
  48 };
  49
  50 #define MLX4_TUN_SEND_WRID_SHIFT 34
  51 #define MLX4_TUN_QPN_SHIFT 32
  52 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
  53 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
  54
  55 #define MLX4_TUN_IS_RECV(a)  (((a) >>  MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
  56 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
  57
  58  /* Port mgmt change event handling */
  59
  60 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
  61 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
  62 #define NUM_IDX_IN_PKEY_TBL_BLK 32
  63 #define GUID_TBL_ENTRY_SIZE 8      /* size in bytes */
  64 #define GUID_TBL_BLK_NUM_ENTRIES 8
  65 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
  66
  67 struct mlx4_mad_rcv_buf {
  68         struct ib_grh grh;
  69         u8 payload[256];
  70 } __packed;
  71
  72 struct mlx4_mad_snd_buf {
  73         u8 payload[256];
  74 } __packed;
  75
  76 struct mlx4_tunnel_mad {
  77         struct ib_grh grh;
  78         struct mlx4_ib_tunnel_header hdr;
  79         struct ib_mad mad;
  80 } __packed;
  81
  82 struct mlx4_rcv_tunnel_mad {
  83         struct mlx4_rcv_tunnel_hdr hdr;
  84         struct ib_grh grh;
  85         struct ib_mad mad;
  86 } __packed;
  87
  88 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
  89 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
  90 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
  91                                 int block, u32 change_bitmap);
  92
  93 __be64 mlx4_ib_gen_node_guid(void)
  94 {
  95 #define NODE_GUID_HI    ((u64) (((u64)IB_OPENIB_OUI) << 40))
  96         return cpu_to_be64(NODE_GUID_HI | prandom_u32());
  97 }
  98
  99 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
 100 {
 101         return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
 102                 cpu_to_be64(0xff00000000000000LL);
 103 }
 104
 105 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
 106                  int port, const struct ib_wc *in_wc,
 107                  const struct ib_grh *in_grh,
 108                  const void *in_mad, void *response_mad)
 109 {
 110         struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
 111         void *inbox;
 112         int err;
 113         u32 in_modifier = port;
 114         u8 op_modifier = 0;
 115
 116         inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 117         if (IS_ERR(inmailbox))
 118                 return PTR_ERR(inmailbox);
 119         inbox = inmailbox->buf;
 120
 121         outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 122         if (IS_ERR(outmailbox)) {
 123                 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 124                 return PTR_ERR(outmailbox);
 125         }
 126
 127         memcpy(inbox, in_mad, 256);
 128
 129         /*
 130          * Key check traps can't be generated unless we have in_wc to
 131          * tell us where to send the trap.
 132          */
 133         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
 134                 op_modifier |= 0x1;
 135         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
 136                 op_modifier |= 0x2;
 137         if (mlx4_is_mfunc(dev->dev) &&
 138             (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
 139                 op_modifier |= 0x8;
 140
 141         if (in_wc) {
 142                 struct {
 143                         __be32          my_qpn;
 144                         u32             reserved1;
 145                         __be32          rqpn;
 146                         u8              sl;
 147                         u8              g_path;
 148                         u16             reserved2[2];
 149                         __be16          pkey;
 150                         u32             reserved3[11];
 151                         u8              grh[40];
 152                 } *ext_info;
 153
 154                 memset(inbox + 256, 0, 256);
 155                 ext_info = inbox + 256;
 156
 157                 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
 158                 ext_info->rqpn   = cpu_to_be32(in_wc->src_qp);
 159                 ext_info->sl     = in_wc->sl << 4;
 160                 ext_info->g_path = in_wc->dlid_path_bits |
 161                         (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
 162                 ext_info->pkey   = cpu_to_be16(in_wc->pkey_index);
 163
 164                 if (in_grh)
 165                         memcpy(ext_info->grh, in_grh, 40);
 166
 167                 op_modifier |= 0x4;
 168
 169                 in_modifier |= in_wc->slid << 16;
 170         }
 171
 172         err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
 173                            mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
 174                            MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
 175                            (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
 176
 177         if (!err)
 178                 memcpy(response_mad, outmailbox->buf, 256);
 179
 180         mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 181         mlx4_free_cmd_mailbox(dev->dev, outmailbox);
 182
 183         return err;
 184 }
 185
 186 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
 187 {
 188         struct ib_ah *new_ah;
 189         struct ib_ah_attr ah_attr;
 190         unsigned long flags;
 191
 192         if (!dev->send_agent[port_num - 1][0])
 193                 return;
 194
 195         memset(&ah_attr, 0, sizeof ah_attr);
 196         ah_attr.dlid     = lid;
 197         ah_attr.sl       = sl;
 198         ah_attr.port_num = port_num;
 199
 200         new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
 201                               &ah_attr);
 202         if (IS_ERR(new_ah))
 203                 return;
 204
 205         spin_lock_irqsave(&dev->sm_lock, flags);
 206         if (dev->sm_ah[port_num - 1])
 207                 ib_destroy_ah(dev->sm_ah[port_num - 1]);
 208         dev->sm_ah[port_num - 1] = new_ah;
 209         spin_unlock_irqrestore(&dev->sm_lock, flags);
 210 }
 211
 212 /*
 213  * Snoop SM MADs for port info, GUID info, and  P_Key table sets, so we can
 214  * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
 215  */
 216 static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
 217                       u16 prev_lid)
 218 {
 219         struct ib_port_info *pinfo;
 220         u16 lid;
 221         __be16 *base;
 222         u32 bn, pkey_change_bitmap;
 223         int i;
 224
 225
 226         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 227         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 228              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 229             mad->mad_hdr.method == IB_MGMT_METHOD_SET)
 230                 switch (mad->mad_hdr.attr_id) {
 231                 case IB_SMP_ATTR_PORT_INFO:
 232                         pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
 233                         lid = be16_to_cpu(pinfo->lid);
 234
 235                         update_sm_ah(dev, port_num,
 236                                      be16_to_cpu(pinfo->sm_lid),
 237                                      pinfo->neighbormtu_mastersmsl & 0xf);
 238
 239                         if (pinfo->clientrereg_resv_subnetto & 0x80)
 240                                 handle_client_rereg_event(dev, port_num);
 241
 242                         if (prev_lid != lid)
 243                                 handle_lid_change_event(dev, port_num);
 244                         break;
 245
 246                 case IB_SMP_ATTR_PKEY_TABLE:
 247                         if (!mlx4_is_mfunc(dev->dev)) {
 248                                 mlx4_ib_dispatch_event(dev, port_num,
 249                                                        IB_EVENT_PKEY_CHANGE);
 250                                 break;
 251                         }
 252
 253                         /* at this point, we are running in the master.
 254                          * Slaves do not receive SMPs.
 255                          */
 256                         bn  = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
 257                         base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
 258                         pkey_change_bitmap = 0;
 259                         for (i = 0; i < 32; i++) {
 260                                 pr_debug("PKEY[%d] = x%x\n",
 261                                          i + bn*32, be16_to_cpu(base[i]));
 262                                 if (be16_to_cpu(base[i]) !=
 263                                     dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
 264                                         pkey_change_bitmap |= (1 << i);
 265                                         dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
 266                                                 be16_to_cpu(base[i]);
 267                                 }
 268                         }
 269                         pr_debug("PKEY Change event: port=%d, "
 270                                  "block=0x%x, change_bitmap=0x%x\n",
 271                                  port_num, bn, pkey_change_bitmap);
 272
 273                         if (pkey_change_bitmap) {
 274                                 mlx4_ib_dispatch_event(dev, port_num,
 275                                                        IB_EVENT_PKEY_CHANGE);
 276                                 if (!dev->sriov.is_going_down)
 277                                         __propagate_pkey_ev(dev, port_num, bn,
 278                                                             pkey_change_bitmap);
 279                         }
 280                         break;
 281
 282                 case IB_SMP_ATTR_GUID_INFO:
 283                         /* paravirtualized master's guid is guid 0 -- does not change */
 284                         if (!mlx4_is_master(dev->dev))
 285                                 mlx4_ib_dispatch_event(dev, port_num,
 286                                                        IB_EVENT_GID_CHANGE);
 287                         /*if master, notify relevant slaves*/
 288                         if (mlx4_is_master(dev->dev) &&
 289                             !dev->sriov.is_going_down) {
 290                                 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
 291                                 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
 292                                                                     (u8 *)(&((struct ib_smp *)mad)->data));
 293                                 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
 294                                                                      (u8 *)(&((struct ib_smp *)mad)->data));
 295                         }
 296                         break;
 297
 298                 default:
 299                         break;
 300                 }
 301 }
 302
 303 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 304                                 int block, u32 change_bitmap)
 305 {
 306         int i, ix, slave, err;
 307         int have_event = 0;
 308
 309         for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
 310                 if (slave == mlx4_master_func_num(dev->dev))
 311                         continue;
 312                 if (!mlx4_is_slave_active(dev->dev, slave))
 313                         continue;
 314
 315                 have_event = 0;
 316                 for (i = 0; i < 32; i++) {
 317                         if (!(change_bitmap & (1 << i)))
 318                                 continue;
 319                         for (ix = 0;
 320                              ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
 321                                 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
 322                                     [ix] == i + 32 * block) {
 323                                         err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
 324                                         pr_debug("propagate_pkey_ev: slave %d,"
 325                                                  " port %d, ix %d (%d)\n",
 326                                                  slave, port_num, ix, err);
 327                                         have_event = 1;
 328                                         break;
 329                                 }
 330                         }
 331                         if (have_event)
 332                                 break;
 333                 }
 334         }
 335 }
 336
 337 static void node_desc_override(struct ib_device *dev,
 338                                struct ib_mad *mad)
 339 {
 340         unsigned long flags;
 341
 342         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 343              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 344             mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
 345             mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
 346                 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
 347                 memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
 348                 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
 349         }
 350 }
 351
 352 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
 353 {
 354         int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
 355         struct ib_mad_send_buf *send_buf;
 356         struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
 357         int ret;
 358         unsigned long flags;
 359
 360         if (agent) {
 361                 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
 362                                               IB_MGMT_MAD_DATA, GFP_ATOMIC,
 363                                               IB_MGMT_BASE_VERSION);
 364                 if (IS_ERR(send_buf))
 365                         return;
 366                 /*
 367                  * We rely here on the fact that MLX QPs don't use the
 368                  * address handle after the send is posted (this is
 369                  * wrong following the IB spec strictly, but we know
 370                  * it's OK for our devices).
 371                  */
 372                 spin_lock_irqsave(&dev->sm_lock, flags);
 373                 memcpy(send_buf->mad, mad, sizeof *mad);
 374                 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
 375                         ret = ib_post_send_mad(send_buf, NULL);
 376                 else
 377                         ret = -EINVAL;
 378                 spin_unlock_irqrestore(&dev->sm_lock, flags);
 379
 380                 if (ret)
 381                         ib_free_send_mad(send_buf);
 382         }
 383 }
 384
 385 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
 386                                                              struct ib_sa_mad *sa_mad)
 387 {
 388         int ret = 0;
 389
 390         /* dispatch to different sa handlers */
 391         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
 392         case IB_SA_ATTR_MC_MEMBER_REC:
 393                 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
 394                 break;
 395         default:
 396                 break;
 397         }
 398         return ret;
 399 }
 400
 401 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
 402 {
 403         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 404         int i;
 405
 406         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
 407                 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
 408                         return i;
 409         }
 410         return -1;
 411 }
 412
 413
 414 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
 415                                    u8 port, u16 pkey, u16 *ix)
 416 {
 417         int i, ret;
 418         u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
 419         u16 slot_pkey;
 420
 421         if (slave == mlx4_master_func_num(dev->dev))
 422                 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
 423
 424         unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
 425
 426         for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
 427                 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
 428                         continue;
 429
 430                 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
 431
 432                 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
 433                 if (ret)
 434                         continue;
 435                 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
 436                         if (slot_pkey & 0x8000) {
 437                                 *ix = (u16) pkey_ix;
 438                                 return 0;
 439                         } else {
 440                                 /* take first partial pkey index found */
 441                                 if (partial_ix == 0xFF)
 442                                         partial_ix = pkey_ix;
 443                         }
 444                 }
 445         }
 446
 447         if (partial_ix < 0xFF) {
 448                 *ix = (u16) partial_ix;
 449                 return 0;
 450         }
 451
 452         return -EINVAL;
 453 }
 454
 455 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
 456                           enum ib_qp_type dest_qpt, struct ib_wc *wc,
 457                           struct ib_grh *grh, struct ib_mad *mad)
 458 {
 459         struct ib_sge list;
 460         struct ib_ud_wr wr;
 461         struct ib_send_wr *bad_wr;
 462         struct mlx4_ib_demux_pv_ctx *tun_ctx;
 463         struct mlx4_ib_demux_pv_qp *tun_qp;
 464         struct mlx4_rcv_tunnel_mad *tun_mad;
 465         struct ib_ah_attr attr;
 466         struct ib_ah *ah;
 467         struct ib_qp *src_qp = NULL;
 468         unsigned tun_tx_ix = 0;
 469         int dqpn;
 470         int ret = 0;
 471         u16 tun_pkey_ix;
 472         u16 cached_pkey;
 473         u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
 474
 475         if (dest_qpt > IB_QPT_GSI)
 476                 return -EINVAL;
 477
 478         tun_ctx = dev->sriov.demux[port-1].tun[slave];
 479
 480         /* check if proxy qp created */
 481         if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
 482                 return -EAGAIN;
 483
 484         if (!dest_qpt)
 485                 tun_qp = &tun_ctx->qp[0];
 486         else
 487                 tun_qp = &tun_ctx->qp[1];
 488
 489         /* compute P_Key index to put in tunnel header for slave */
 490         if (dest_qpt) {
 491                 u16 pkey_ix;
 492                 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
 493                 if (ret)
 494                         return -EINVAL;
 495
 496                 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
 497                 if (ret)
 498                         return -EINVAL;
 499                 tun_pkey_ix = pkey_ix;
 500         } else
 501                 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
 502
 503         dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
 504
 505         /* get tunnel tx data buf for slave */
 506         src_qp = tun_qp->qp;
 507
 508         /* create ah. Just need an empty one with the port num for the post send.
 509          * The driver will set the force loopback bit in post_send */
 510         memset(&attr, 0, sizeof attr);
 511         attr.port_num = port;
 512         if (is_eth) {
 513                 memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
 514                 attr.ah_flags = IB_AH_GRH;
 515         }
 516         ah = ib_create_ah(tun_ctx->pd, &attr);
 517         if (IS_ERR(ah))
 518                 return -ENOMEM;
 519
 520         /* allocate tunnel tx buf after pass failure returns */
 521         spin_lock(&tun_qp->tx_lock);
 522         if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
 523             (MLX4_NUM_TUNNEL_BUFS - 1))
 524                 ret = -EAGAIN;
 525         else
 526                 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
 527         spin_unlock(&tun_qp->tx_lock);
 528         if (ret)
 529                 goto end;
 530
 531         tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
 532         if (tun_qp->tx_ring[tun_tx_ix].ah)
 533                 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
 534         tun_qp->tx_ring[tun_tx_ix].ah = ah;
 535         ib_dma_sync_single_for_cpu(&dev->ib_dev,
 536                                    tun_qp->tx_ring[tun_tx_ix].buf.map,
 537                                    sizeof (struct mlx4_rcv_tunnel_mad),
 538                                    DMA_TO_DEVICE);
 539
 540         /* copy over to tunnel buffer */
 541         if (grh)
 542                 memcpy(&tun_mad->grh, grh, sizeof *grh);
 543         memcpy(&tun_mad->mad, mad, sizeof *mad);
 544
 545         /* adjust tunnel data */
 546         tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
 547         tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
 548         tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
 549
 550         if (is_eth) {
 551                 u16 vlan = 0;
 552                 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
 553                                                 NULL)) {
 554                         /* VST mode */
 555                         if (vlan != wc->vlan_id)
 556                                 /* Packet vlan is not the VST-assigned vlan.
 557                                  * Drop the packet.
 558                                  */
 559                                 goto out;
 560                          else
 561                                 /* Remove the vlan tag before forwarding
 562                                  * the packet to the VF.
 563                                  */
 564                                 vlan = 0xffff;
 565                 } else {
 566                         vlan = wc->vlan_id;
 567                 }
 568
 569                 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
 570                 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
 571                 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
 572         } else {
 573                 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
 574                 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
 575         }
 576
 577         ib_dma_sync_single_for_device(&dev->ib_dev,
 578                                       tun_qp->tx_ring[tun_tx_ix].buf.map,
 579                                       sizeof (struct mlx4_rcv_tunnel_mad),
 580                                       DMA_TO_DEVICE);
 581
 582         list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
 583         list.length = sizeof (struct mlx4_rcv_tunnel_mad);
 584         list.lkey = tun_ctx->pd->local_dma_lkey;
 585
 586         wr.ah = ah;
 587         wr.port_num = port;
 588         wr.remote_qkey = IB_QP_SET_QKEY;
 589         wr.remote_qpn = dqpn;
 590         wr.wr.next = NULL;
 591         wr.wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
 592         wr.wr.sg_list = &list;
 593         wr.wr.num_sge = 1;
 594         wr.wr.opcode = IB_WR_SEND;
 595         wr.wr.send_flags = IB_SEND_SIGNALED;
 596
 597         ret = ib_post_send(src_qp, &wr.wr, &bad_wr);
 598         if (!ret)
 599                 return 0;
 600  out:
 601         spin_lock(&tun_qp->tx_lock);
 602         tun_qp->tx_ix_tail++;
 603         spin_unlock(&tun_qp->tx_lock);
 604         tun_qp->tx_ring[tun_tx_ix].ah = NULL;
 605 end:
 606         ib_destroy_ah(ah);
 607         return ret;
 608 }
 609
 610 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
 611                         struct ib_wc *wc, struct ib_grh *grh,
 612                         struct ib_mad *mad)
 613 {
 614         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 615         int err;
 616         int slave;
 617         u8 *slave_id;
 618         int is_eth = 0;
 619
 620         if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
 621                 is_eth = 0;
 622         else
 623                 is_eth = 1;
 624
 625         if (is_eth) {
 626                 if (!(wc->wc_flags & IB_WC_GRH)) {
 627                         mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
 628                         return -EINVAL;
 629                 }
 630                 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
 631                         mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
 632                         return -EINVAL;
 633                 }
 634                 if (mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave)) {
 635                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 636                         return -ENOENT;
 637                 }
 638                 if (slave >= dev->dev->caps.sqp_demux) {
 639                         mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 640                                      slave, dev->dev->caps.sqp_demux);
 641                         return -ENOENT;
 642                 }
 643
 644                 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
 645                         return 0;
 646
 647                 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 648                 if (err)
 649                         pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 650                                  slave, err);
 651                 return 0;
 652         }
 653
 654         /* Initially assume that this mad is for us */
 655         slave = mlx4_master_func_num(dev->dev);
 656
 657         /* See if the slave id is encoded in a response mad */
 658         if (mad->mad_hdr.method & 0x80) {
 659                 slave_id = (u8 *) &mad->mad_hdr.tid;
 660                 slave = *slave_id;
 661                 if (slave != 255) /*255 indicates the dom0*/
 662                         *slave_id = 0; /* remap tid */
 663         }
 664
 665         /* If a grh is present, we demux according to it */
 666         if (wc->wc_flags & IB_WC_GRH) {
 667                 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
 668                 if (slave < 0) {
 669                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 670                         return -ENOENT;
 671                 }
 672         }
 673         /* Class-specific handling */
 674         switch (mad->mad_hdr.mgmt_class) {
 675         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
 676         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
 677                 /* 255 indicates the dom0 */
 678                 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
 679                         if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
 680                                 return -EPERM;
 681                         /* for a VF. drop unsolicited MADs */
 682                         if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
 683                                 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
 684                                              slave, mad->mad_hdr.mgmt_class,
 685                                              mad->mad_hdr.method);
 686                                 return -EINVAL;
 687                         }
 688                 }
 689                 break;
 690         case IB_MGMT_CLASS_SUBN_ADM:
 691                 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
 692                                              (struct ib_sa_mad *) mad))
 693                         return 0;
 694                 break;
 695         case IB_MGMT_CLASS_CM:
 696                 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
 697                         return 0;
 698                 break;
 699         case IB_MGMT_CLASS_DEVICE_MGMT:
 700                 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
 701                         return 0;
 702                 break;
 703         default:
 704                 /* Drop unsupported classes for slaves in tunnel mode */
 705                 if (slave != mlx4_master_func_num(dev->dev)) {
 706                         pr_debug("dropping unsupported ingress mad from class:%d "
 707                                  "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
 708                         return 0;
 709                 }
 710         }
 711         /*make sure that no slave==255 was not handled yet.*/
 712         if (slave >= dev->dev->caps.sqp_demux) {
 713                 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 714                              slave, dev->dev->caps.sqp_demux);
 715                 return -ENOENT;
 716         }
 717
 718         err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 719         if (err)
 720                 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 721                          slave, err);
 722         return 0;
 723 }
 724
 725 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 726                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 727                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
 728 {
 729         u16 slid, prev_lid = 0;
 730         int err;
 731         struct ib_port_attr pattr;
 732
 733         if (in_wc && in_wc->qp->qp_num) {
 734                 pr_debug("received MAD: slid:%d sqpn:%d "
 735                         "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
 736                         in_wc->slid, in_wc->src_qp,
 737                         in_wc->dlid_path_bits,
 738                         in_wc->qp->qp_num,
 739                         in_wc->wc_flags,
 740                         in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
 741                         be16_to_cpu(in_mad->mad_hdr.attr_id));
 742                 if (in_wc->wc_flags & IB_WC_GRH) {
 743                         pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
 744                                  be64_to_cpu(in_grh->sgid.global.subnet_prefix),
 745                                  be64_to_cpu(in_grh->sgid.global.interface_id));
 746                         pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
 747                                  be64_to_cpu(in_grh->dgid.global.subnet_prefix),
 748                                  be64_to_cpu(in_grh->dgid.global.interface_id));
 749                 }
 750         }
 751
 752         slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
 753
 754         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
 755                 forward_trap(to_mdev(ibdev), port_num, in_mad);
 756                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 757         }
 758
 759         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 760             in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
 761                 if (in_mad->mad_hdr.method   != IB_MGMT_METHOD_GET &&
 762                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_SET &&
 763                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_TRAP_REPRESS)
 764                         return IB_MAD_RESULT_SUCCESS;
 765
 766                 /*
 767                  * Don't process SMInfo queries -- the SMA can't handle them.
 768                  */
 769                 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
 770                         return IB_MAD_RESULT_SUCCESS;
 771         } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
 772                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1   ||
 773                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2   ||
 774                    in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
 775                 if (in_mad->mad_hdr.method  != IB_MGMT_METHOD_GET &&
 776                     in_mad->mad_hdr.method  != IB_MGMT_METHOD_SET)
 777                         return IB_MAD_RESULT_SUCCESS;
 778         } else
 779                 return IB_MAD_RESULT_SUCCESS;
 780
 781         if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 782              in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 783             in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
 784             in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
 785             !ib_query_port(ibdev, port_num, &pattr))
 786                 prev_lid = pattr.lid;
 787
 788         err = mlx4_MAD_IFC(to_mdev(ibdev),
 789                            (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
 790                            (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
 791                            MLX4_MAD_IFC_NET_VIEW,
 792                            port_num, in_wc, in_grh, in_mad, out_mad);
 793         if (err)
 794                 return IB_MAD_RESULT_FAILURE;
 795
 796         if (!out_mad->mad_hdr.status) {
 797                 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
 798                         smp_snoop(ibdev, port_num, in_mad, prev_lid);
 799                 /* slaves get node desc from FW */
 800                 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
 801                         node_desc_override(ibdev, out_mad);
 802         }
 803
 804         /* set return bit in status of directed route responses */
 805         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
 806                 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
 807
 808         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
 809                 /* no response for trap repress */
 810                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 811
 812         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 813 }
 814
 815 static void edit_counter(struct mlx4_counter *cnt,
 816                                         struct ib_pma_portcounters *pma_cnt)
 817 {
 818         ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
 819                              (be64_to_cpu(cnt->tx_bytes) >> 2));
 820         ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
 821                              (be64_to_cpu(cnt->rx_bytes) >> 2));
 822         ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
 823                              be64_to_cpu(cnt->tx_frames));
 824         ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
 825                              be64_to_cpu(cnt->rx_frames));
 826 }
 827
 828 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 829                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 830                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
 831 {
 832         struct mlx4_counter counter_stats;
 833         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 834         struct counter_index *tmp_counter;
 835         int err = IB_MAD_RESULT_FAILURE, stats_avail = 0;
 836
 837         if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
 838                 return -EINVAL;
 839
 840         memset(&counter_stats, 0, sizeof(counter_stats));
 841         mutex_lock(&dev->counters_table[port_num - 1].mutex);
 842         list_for_each_entry(tmp_counter,
 843                             &dev->counters_table[port_num - 1].counters_list,
 844                             list) {
 845                 err = mlx4_get_counter_stats(dev->dev,
 846                                              tmp_counter->index,
 847                                              &counter_stats, 0);
 848                 if (err) {
 849                         err = IB_MAD_RESULT_FAILURE;
 850                         stats_avail = 0;
 851                         break;
 852                 }
 853                 stats_avail = 1;
 854         }
 855         mutex_unlock(&dev->counters_table[port_num - 1].mutex);
 856         if (stats_avail) {
 857                 memset(out_mad->data, 0, sizeof out_mad->data);
 858                 switch (counter_stats.counter_mode & 0xf) {
 859                 case 0:
 860                         edit_counter(&counter_stats,
 861                                      (void *)(out_mad->data + 40));
 862                         err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 863                         break;
 864                 default:
 865                         err = IB_MAD_RESULT_FAILURE;
 866                 }
 867         }
 868
 869         return err;
 870 }
 871
 872 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 873                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 874                         const struct ib_mad_hdr *in, size_t in_mad_size,
 875                         struct ib_mad_hdr *out, size_t *out_mad_size,
 876                         u16 *out_mad_pkey_index)
 877 {
 878         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 879         const struct ib_mad *in_mad = (const struct ib_mad *)in;
 880         struct ib_mad *out_mad = (struct ib_mad *)out;
 881         enum rdma_link_layer link = rdma_port_get_link_layer(ibdev, port_num);
 882
 883         if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
 884                          *out_mad_size != sizeof(*out_mad)))
 885                 return IB_MAD_RESULT_FAILURE;
 886
 887         /* iboe_process_mad() which uses the HCA flow-counters to implement IB PMA
 888          * queries, should be called only by VFs and for that specific purpose
 889          */
 890         if (link == IB_LINK_LAYER_INFINIBAND) {
 891                 if (mlx4_is_slave(dev->dev) &&
 892                     in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
 893                     in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS)
 894                         return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
 895                                                 in_grh, in_mad, out_mad);
 896
 897                 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
 898                                       in_grh, in_mad, out_mad);
 899         }
 900
 901         if (link == IB_LINK_LAYER_ETHERNET)
 902                 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
 903                                         in_grh, in_mad, out_mad);
 904
 905         return -EINVAL;
 906 }
 907
 908 static void send_handler(struct ib_mad_agent *agent,
 909                          struct ib_mad_send_wc *mad_send_wc)
 910 {
 911         if (mad_send_wc->send_buf->context[0])
 912                 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
 913         ib_free_send_mad(mad_send_wc->send_buf);
 914 }
 915
 916 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
 917 {
 918         struct ib_mad_agent *agent;
 919         int p, q;
 920         int ret;
 921         enum rdma_link_layer ll;
 922
 923         for (p = 0; p < dev->num_ports; ++p) {
 924                 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
 925                 for (q = 0; q <= 1; ++q) {
 926                         if (ll == IB_LINK_LAYER_INFINIBAND) {
 927                                 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
 928                                                               q ? IB_QPT_GSI : IB_QPT_SMI,
 929                                                               NULL, 0, send_handler,
 930                                                               NULL, NULL, 0);
 931                                 if (IS_ERR(agent)) {
 932                                         ret = PTR_ERR(agent);
 933                                         goto err;
 934                                 }
 935                                 dev->send_agent[p][q] = agent;
 936                         } else
 937                                 dev->send_agent[p][q] = NULL;
 938                 }
 939         }
 940
 941         return 0;
 942
 943 err:
 944         for (p = 0; p < dev->num_ports; ++p)
 945                 for (q = 0; q <= 1; ++q)
 946                         if (dev->send_agent[p][q])
 947                                 ib_unregister_mad_agent(dev->send_agent[p][q]);
 948
 949         return ret;
 950 }
 951
 952 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
 953 {
 954         struct ib_mad_agent *agent;
 955         int p, q;
 956
 957         for (p = 0; p < dev->num_ports; ++p) {
 958                 for (q = 0; q <= 1; ++q) {
 959                         agent = dev->send_agent[p][q];
 960                         if (agent) {
 961                                 dev->send_agent[p][q] = NULL;
 962                                 ib_unregister_mad_agent(agent);
 963                         }
 964                 }
 965
 966                 if (dev->sm_ah[p])
 967                         ib_destroy_ah(dev->sm_ah[p]);
 968         }
 969 }
 970
 971 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
 972 {
 973         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
 974
 975         if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
 976                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 977                                             MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
 978 }
 979
 980 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
 981 {
 982         /* re-configure the alias-guid and mcg's */
 983         if (mlx4_is_master(dev->dev)) {
 984                 mlx4_ib_invalidate_all_guid_record(dev, port_num);
 985
 986                 if (!dev->sriov.is_going_down) {
 987                         mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
 988                         mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 989                                                     MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
 990                 }
 991         }
 992         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
 993 }
 994
 995 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 996                               struct mlx4_eqe *eqe)
 997 {
 998         __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
 999                             GET_MASK_FROM_EQE(eqe));
1000 }
1001
1002 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
1003                                       u32 guid_tbl_blk_num, u32 change_bitmap)
1004 {
1005         struct ib_smp *in_mad  = NULL;
1006         struct ib_smp *out_mad  = NULL;
1007         u16 i;
1008
1009         if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
1010                 return;
1011
1012         in_mad  = kmalloc(sizeof *in_mad, GFP_KERNEL);
1013         out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1014         if (!in_mad || !out_mad) {
1015                 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
1016                 goto out;
1017         }
1018
1019         guid_tbl_blk_num  *= 4;
1020
1021         for (i = 0; i < 4; i++) {
1022                 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
1023                         continue;
1024                 memset(in_mad, 0, sizeof *in_mad);
1025                 memset(out_mad, 0, sizeof *out_mad);
1026
1027                 in_mad->base_version  = 1;
1028                 in_mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1029                 in_mad->class_version = 1;
1030                 in_mad->method        = IB_MGMT_METHOD_GET;
1031                 in_mad->attr_id       = IB_SMP_ATTR_GUID_INFO;
1032                 in_mad->attr_mod      = cpu_to_be32(guid_tbl_blk_num + i);
1033
1034                 if (mlx4_MAD_IFC(dev,
1035                                  MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1036                                  port_num, NULL, NULL, in_mad, out_mad)) {
1037                         mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1038                         goto out;
1039                 }
1040
1041                 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1042                                                     port_num,
1043                                                     (u8 *)(&((struct ib_smp *)out_mad)->data));
1044                 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1045                                                      port_num,
1046                                                      (u8 *)(&((struct ib_smp *)out_mad)->data));
1047         }
1048
1049 out:
1050         kfree(in_mad);
1051         kfree(out_mad);
1052         return;
1053 }
1054
1055 void handle_port_mgmt_change_event(struct work_struct *work)
1056 {
1057         struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1058         struct mlx4_ib_dev *dev = ew->ib_dev;
1059         struct mlx4_eqe *eqe = &(ew->ib_eqe);
1060         u8 port = eqe->event.port_mgmt_change.port;
1061         u32 changed_attr;
1062         u32 tbl_block;
1063         u32 change_bitmap;
1064
1065         switch (eqe->subtype) {
1066         case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1067                 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1068
1069                 /* Update the SM ah - This should be done before handling
1070                    the other changed attributes so that MADs can be sent to the SM */
1071                 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1072                         u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1073                         u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1074                         update_sm_ah(dev, port, lid, sl);
1075                 }
1076
1077                 /* Check if it is a lid change event */
1078                 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1079                         handle_lid_change_event(dev, port);
1080
1081                 /* Generate GUID changed event */
1082                 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1083                         if (mlx4_is_master(dev->dev)) {
1084                                 union ib_gid gid;
1085                                 int err = 0;
1086
1087                                 if (!eqe->event.port_mgmt_change.params.port_info.gid_prefix)
1088                                         err = __mlx4_ib_query_gid(&dev->ib_dev, port, 0, &gid, 1);
1089                                 else
1090                                         gid.global.subnet_prefix =
1091                                                 eqe->event.port_mgmt_change.params.port_info.gid_prefix;
1092                                 if (err) {
1093                                         pr_warn("Could not change QP1 subnet prefix for port %d: query_gid error (%d)\n",
1094                                                 port, err);
1095                                 } else {
1096                                         pr_debug("Changing QP1 subnet prefix for port %d. old=0x%llx. new=0x%llx\n",
1097                                                  port,
1098                                                  (u64)atomic64_read(&dev->sriov.demux[port - 1].subnet_prefix),
1099                                                  be64_to_cpu(gid.global.subnet_prefix));
1100                                         atomic64_set(&dev->sriov.demux[port - 1].subnet_prefix,
1101                                                      be64_to_cpu(gid.global.subnet_prefix));
1102                                 }
1103                         }
1104                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1105                         /*if master, notify all slaves*/
1106                         if (mlx4_is_master(dev->dev))
1107                                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1108                                                             MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1109                 }
1110
1111                 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1112                         handle_client_rereg_event(dev, port);
1113                 break;
1114
1115         case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1116                 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1117                 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1118                         propagate_pkey_ev(dev, port, eqe);
1119                 break;
1120         case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1121                 /* paravirtualized master's guid is guid 0 -- does not change */
1122                 if (!mlx4_is_master(dev->dev))
1123                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1124                 /*if master, notify relevant slaves*/
1125                 else if (!dev->sriov.is_going_down) {
1126                         tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1127                         change_bitmap = GET_MASK_FROM_EQE(eqe);
1128                         handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1129                 }
1130                 break;
1131         default:
1132                 pr_warn("Unsupported subtype 0x%x for "
1133                         "Port Management Change event\n", eqe->subtype);
1134         }
1135
1136         kfree(ew);
1137 }
1138
1139 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1140                             enum ib_event_type type)
1141 {
1142         struct ib_event event;
1143
1144         event.device            = &dev->ib_dev;
1145         event.element.port_num  = port_num;
1146         event.event             = type;
1147
1148         ib_dispatch_event(&event);
1149 }
1150
1151 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1152 {
1153         unsigned long flags;
1154         struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1155         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1156         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1157         if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1158                 queue_work(ctx->wq, &ctx->work);
1159         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1160 }
1161
1162 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1163                                   struct mlx4_ib_demux_pv_qp *tun_qp,
1164                                   int index)
1165 {
1166         struct ib_sge sg_list;
1167         struct ib_recv_wr recv_wr, *bad_recv_wr;
1168         int size;
1169
1170         size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1171                 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1172
1173         sg_list.addr = tun_qp->ring[index].map;
1174         sg_list.length = size;
1175         sg_list.lkey = ctx->pd->local_dma_lkey;
1176
1177         recv_wr.next = NULL;
1178         recv_wr.sg_list = &sg_list;
1179         recv_wr.num_sge = 1;
1180         recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1181                 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1182         ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1183                                       size, DMA_FROM_DEVICE);
1184         return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1185 }
1186
1187 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1188                 int slave, struct ib_sa_mad *sa_mad)
1189 {
1190         int ret = 0;
1191
1192         /* dispatch to different sa handlers */
1193         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1194         case IB_SA_ATTR_MC_MEMBER_REC:
1195                 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1196                 break;
1197         default:
1198                 break;
1199         }
1200         return ret;
1201 }
1202
1203 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1204 {
1205         int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1206
1207         return (qpn >= proxy_start && qpn <= proxy_start + 1);
1208 }
1209
1210
1211 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1212                          enum ib_qp_type dest_qpt, u16 pkey_index,
1213                          u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1214                          u8 *s_mac, u16 vlan_id, struct ib_mad *mad)
1215 {
1216         struct ib_sge list;
1217         struct ib_ud_wr wr;
1218         struct ib_send_wr *bad_wr;
1219         struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1220         struct mlx4_ib_demux_pv_qp *sqp;
1221         struct mlx4_mad_snd_buf *sqp_mad;
1222         struct ib_ah *ah;
1223         struct ib_qp *send_qp = NULL;
1224         unsigned wire_tx_ix = 0;
1225         int ret = 0;
1226         u16 wire_pkey_ix;
1227         int src_qpnum;
1228         u8 sgid_index;
1229
1230
1231         sqp_ctx = dev->sriov.sqps[port-1];
1232
1233         /* check if proxy qp created */
1234         if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1235                 return -EAGAIN;
1236
1237         if (dest_qpt == IB_QPT_SMI) {
1238                 src_qpnum = 0;
1239                 sqp = &sqp_ctx->qp[0];
1240                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1241         } else {
1242                 src_qpnum = 1;
1243                 sqp = &sqp_ctx->qp[1];
1244                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1245         }
1246
1247         send_qp = sqp->qp;
1248
1249         /* create ah */
1250         sgid_index = attr->grh.sgid_index;
1251         attr->grh.sgid_index = 0;
1252         ah = ib_create_ah(sqp_ctx->pd, attr);
1253         if (IS_ERR(ah))
1254                 return -ENOMEM;
1255         attr->grh.sgid_index = sgid_index;
1256         to_mah(ah)->av.ib.gid_index = sgid_index;
1257         /* get rid of force-loopback bit */
1258         to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1259         spin_lock(&sqp->tx_lock);
1260         if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1261             (MLX4_NUM_TUNNEL_BUFS - 1))
1262                 ret = -EAGAIN;
1263         else
1264                 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1265         spin_unlock(&sqp->tx_lock);
1266         if (ret)
1267                 goto out;
1268
1269         sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1270         if (sqp->tx_ring[wire_tx_ix].ah)
1271                 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1272         sqp->tx_ring[wire_tx_ix].ah = ah;
1273         ib_dma_sync_single_for_cpu(&dev->ib_dev,
1274                                    sqp->tx_ring[wire_tx_ix].buf.map,
1275                                    sizeof (struct mlx4_mad_snd_buf),
1276                                    DMA_TO_DEVICE);
1277
1278         memcpy(&sqp_mad->payload, mad, sizeof *mad);
1279
1280         ib_dma_sync_single_for_device(&dev->ib_dev,
1281                                       sqp->tx_ring[wire_tx_ix].buf.map,
1282                                       sizeof (struct mlx4_mad_snd_buf),
1283                                       DMA_TO_DEVICE);
1284
1285         list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1286         list.length = sizeof (struct mlx4_mad_snd_buf);
1287         list.lkey = sqp_ctx->pd->local_dma_lkey;
1288
1289         wr.ah = ah;
1290         wr.port_num = port;
1291         wr.pkey_index = wire_pkey_ix;
1292         wr.remote_qkey = qkey;
1293         wr.remote_qpn = remote_qpn;
1294         wr.wr.next = NULL;
1295         wr.wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1296         wr.wr.sg_list = &list;
1297         wr.wr.num_sge = 1;
1298         wr.wr.opcode = IB_WR_SEND;
1299         wr.wr.send_flags = IB_SEND_SIGNALED;
1300         if (s_mac)
1301                 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1302         if (vlan_id < 0x1000)
1303                 vlan_id |= (attr->sl & 7) << 13;
1304         to_mah(ah)->av.eth.vlan = cpu_to_be16(vlan_id);
1305
1306
1307         ret = ib_post_send(send_qp, &wr.wr, &bad_wr);
1308         if (!ret)
1309                 return 0;
1310
1311         spin_lock(&sqp->tx_lock);
1312         sqp->tx_ix_tail++;
1313         spin_unlock(&sqp->tx_lock);
1314         sqp->tx_ring[wire_tx_ix].ah = NULL;
1315 out:
1316         ib_destroy_ah(ah);
1317         return ret;
1318 }
1319
1320 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1321 {
1322         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1323                 return slave;
1324         return mlx4_get_base_gid_ix(dev->dev, slave, port);
1325 }
1326
1327 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1328                                     struct ib_ah_attr *ah_attr)
1329 {
1330         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1331                 ah_attr->grh.sgid_index = slave;
1332         else
1333                 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1334 }
1335
1336 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1337 {
1338         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1339         struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1340         int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1341         struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1342         struct mlx4_ib_ah ah;
1343         struct ib_ah_attr ah_attr;
1344         u8 *slave_id;
1345         int slave;
1346         int port;
1347         u16 vlan_id;
1348
1349         /* Get slave that sent this packet */
1350         if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1351             wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1352             (wc->src_qp & 0x1) != ctx->port - 1 ||
1353             wc->src_qp & 0x4) {
1354                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1355                 return;
1356         }
1357         slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1358         if (slave != ctx->slave) {
1359                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1360                              "belongs to another slave\n", wc->src_qp);
1361                 return;
1362         }
1363
1364         /* Map transaction ID */
1365         ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1366                                    sizeof (struct mlx4_tunnel_mad),
1367                                    DMA_FROM_DEVICE);
1368         switch (tunnel->mad.mad_hdr.method) {
1369         case IB_MGMT_METHOD_SET:
1370         case IB_MGMT_METHOD_GET:
1371         case IB_MGMT_METHOD_REPORT:
1372         case IB_SA_METHOD_GET_TABLE:
1373         case IB_SA_METHOD_DELETE:
1374         case IB_SA_METHOD_GET_MULTI:
1375         case IB_SA_METHOD_GET_TRACE_TBL:
1376                 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1377                 if (*slave_id) {
1378                         mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1379                                      "class:%d slave:%d\n", *slave_id,
1380                                      tunnel->mad.mad_hdr.mgmt_class, slave);
1381                         return;
1382                 } else
1383                         *slave_id = slave;
1384         default:
1385                 /* nothing */;
1386         }
1387
1388         /* Class-specific handling */
1389         switch (tunnel->mad.mad_hdr.mgmt_class) {
1390         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1391         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1392                 if (slave != mlx4_master_func_num(dev->dev) &&
1393                     !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1394                         return;
1395                 break;
1396         case IB_MGMT_CLASS_SUBN_ADM:
1397                 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1398                               (struct ib_sa_mad *) &tunnel->mad))
1399                         return;
1400                 break;
1401         case IB_MGMT_CLASS_CM:
1402                 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1403                               (struct ib_mad *) &tunnel->mad))
1404                         return;
1405                 break;
1406         case IB_MGMT_CLASS_DEVICE_MGMT:
1407                 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1408                     tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1409                         return;
1410                 break;
1411         default:
1412                 /* Drop unsupported classes for slaves in tunnel mode */
1413                 if (slave != mlx4_master_func_num(dev->dev)) {
1414                         mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1415                                      "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1416                         return;
1417                 }
1418         }
1419
1420         /* We are using standard ib_core services to send the mad, so generate a
1421          * stadard address handle by decoding the tunnelled mlx4_ah fields */
1422         memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1423         ah.ibah.device = ctx->ib_dev;
1424
1425         port = be32_to_cpu(ah.av.ib.port_pd) >> 24;
1426         port = mlx4_slave_convert_port(dev->dev, slave, port);
1427         if (port < 0)
1428                 return;
1429         ah.av.ib.port_pd = cpu_to_be32(port << 24 | (be32_to_cpu(ah.av.ib.port_pd) & 0xffffff));
1430
1431         mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1432         if (ah_attr.ah_flags & IB_AH_GRH)
1433                 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1434
1435         memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1436         vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1437         /* if slave have default vlan use it */
1438         mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1439                                     &vlan_id, &ah_attr.sl);
1440
1441         mlx4_ib_send_to_wire(dev, slave, ctx->port,
1442                              is_proxy_qp0(dev, wc->src_qp, slave) ?
1443                              IB_QPT_SMI : IB_QPT_GSI,
1444                              be16_to_cpu(tunnel->hdr.pkey_index),
1445                              be32_to_cpu(tunnel->hdr.remote_qpn),
1446                              be32_to_cpu(tunnel->hdr.qkey),
1447                              &ah_attr, wc->smac, vlan_id, &tunnel->mad);
1448 }
1449
1450 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1451                                  enum ib_qp_type qp_type, int is_tun)
1452 {
1453         int i;
1454         struct mlx4_ib_demux_pv_qp *tun_qp;
1455         int rx_buf_size, tx_buf_size;
1456
1457         if (qp_type > IB_QPT_GSI)
1458                 return -EINVAL;
1459
1460         tun_qp = &ctx->qp[qp_type];
1461
1462         tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1463                                GFP_KERNEL);
1464         if (!tun_qp->ring)
1465                 return -ENOMEM;
1466
1467         tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1468                                   sizeof (struct mlx4_ib_tun_tx_buf),
1469                                   GFP_KERNEL);
1470         if (!tun_qp->tx_ring) {
1471                 kfree(tun_qp->ring);
1472                 tun_qp->ring = NULL;
1473                 return -ENOMEM;
1474         }
1475
1476         if (is_tun) {
1477                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1478                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1479         } else {
1480                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1481                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1482         }
1483
1484         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1485                 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1486                 if (!tun_qp->ring[i].addr)
1487                         goto err;
1488                 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1489                                                         tun_qp->ring[i].addr,
1490                                                         rx_buf_size,
1491                                                         DMA_FROM_DEVICE);
1492                 if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1493                         kfree(tun_qp->ring[i].addr);
1494                         goto err;
1495                 }
1496         }
1497
1498         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1499                 tun_qp->tx_ring[i].buf.addr =
1500                         kmalloc(tx_buf_size, GFP_KERNEL);
1501                 if (!tun_qp->tx_ring[i].buf.addr)
1502                         goto tx_err;
1503                 tun_qp->tx_ring[i].buf.map =
1504                         ib_dma_map_single(ctx->ib_dev,
1505                                           tun_qp->tx_ring[i].buf.addr,
1506                                           tx_buf_size,
1507                                           DMA_TO_DEVICE);
1508                 if (ib_dma_mapping_error(ctx->ib_dev,
1509                                          tun_qp->tx_ring[i].buf.map)) {
1510                         kfree(tun_qp->tx_ring[i].buf.addr);
1511                         goto tx_err;
1512                 }
1513                 tun_qp->tx_ring[i].ah = NULL;
1514         }
1515         spin_lock_init(&tun_qp->tx_lock);
1516         tun_qp->tx_ix_head = 0;
1517         tun_qp->tx_ix_tail = 0;
1518         tun_qp->proxy_qpt = qp_type;
1519
1520         return 0;
1521
1522 tx_err:
1523         while (i > 0) {
1524                 --i;
1525                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1526                                     tx_buf_size, DMA_TO_DEVICE);
1527                 kfree(tun_qp->tx_ring[i].buf.addr);
1528         }
1529         kfree(tun_qp->tx_ring);
1530         tun_qp->tx_ring = NULL;
1531         i = MLX4_NUM_TUNNEL_BUFS;
1532 err:
1533         while (i > 0) {
1534                 --i;
1535                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1536                                     rx_buf_size, DMA_FROM_DEVICE);
1537                 kfree(tun_qp->ring[i].addr);
1538         }
1539         kfree(tun_qp->ring);
1540         tun_qp->ring = NULL;
1541         return -ENOMEM;
1542 }
1543
1544 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1545                                      enum ib_qp_type qp_type, int is_tun)
1546 {
1547         int i;
1548         struct mlx4_ib_demux_pv_qp *tun_qp;
1549         int rx_buf_size, tx_buf_size;
1550
1551         if (qp_type > IB_QPT_GSI)
1552                 return;
1553
1554         tun_qp = &ctx->qp[qp_type];
1555         if (is_tun) {
1556                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1557                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1558         } else {
1559                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1560                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1561         }
1562
1563
1564         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1565                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1566                                     rx_buf_size, DMA_FROM_DEVICE);
1567                 kfree(tun_qp->ring[i].addr);
1568         }
1569
1570         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1571                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1572                                     tx_buf_size, DMA_TO_DEVICE);
1573                 kfree(tun_qp->tx_ring[i].buf.addr);
1574                 if (tun_qp->tx_ring[i].ah)
1575                         ib_destroy_ah(tun_qp->tx_ring[i].ah);
1576         }
1577         kfree(tun_qp->tx_ring);
1578         kfree(tun_qp->ring);
1579 }
1580
1581 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1582 {
1583         struct mlx4_ib_demux_pv_ctx *ctx;
1584         struct mlx4_ib_demux_pv_qp *tun_qp;
1585         struct ib_wc wc;
1586         int ret;
1587         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1588         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1589
1590         while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1591                 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1592                 if (wc.status == IB_WC_SUCCESS) {
1593                         switch (wc.opcode) {
1594                         case IB_WC_RECV:
1595                                 mlx4_ib_multiplex_mad(ctx, &wc);
1596                                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1597                                                              wc.wr_id &
1598                                                              (MLX4_NUM_TUNNEL_BUFS - 1));
1599                                 if (ret)
1600                                         pr_err("Failed reposting tunnel "
1601                                                "buf:%lld\n", wc.wr_id);
1602                                 break;
1603                         case IB_WC_SEND:
1604                                 pr_debug("received tunnel send completion:"
1605                                          "wrid=0x%llx, status=0x%x\n",
1606                                          wc.wr_id, wc.status);
1607                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1608                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1609                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1610                                         = NULL;
1611                                 spin_lock(&tun_qp->tx_lock);
1612                                 tun_qp->tx_ix_tail++;
1613                                 spin_unlock(&tun_qp->tx_lock);
1614
1615                                 break;
1616                         default:
1617                                 break;
1618                         }
1619                 } else  {
1620                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1621                                  " status = %d, wrid = 0x%llx\n",
1622                                  ctx->slave, wc.status, wc.wr_id);
1623                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1624                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1625                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1626                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1627                                         = NULL;
1628                                 spin_lock(&tun_qp->tx_lock);
1629                                 tun_qp->tx_ix_tail++;
1630                                 spin_unlock(&tun_qp->tx_lock);
1631                         }
1632                 }
1633         }
1634 }
1635
1636 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1637 {
1638         struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1639
1640         /* It's worse than that! He's dead, Jim! */
1641         pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1642                event->event, sqp->port);
1643 }
1644
1645 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1646                             enum ib_qp_type qp_type, int create_tun)
1647 {
1648         int i, ret;
1649         struct mlx4_ib_demux_pv_qp *tun_qp;
1650         struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1651         struct ib_qp_attr attr;
1652         int qp_attr_mask_INIT;
1653
1654         if (qp_type > IB_QPT_GSI)
1655                 return -EINVAL;
1656
1657         tun_qp = &ctx->qp[qp_type];
1658
1659         memset(&qp_init_attr, 0, sizeof qp_init_attr);
1660         qp_init_attr.init_attr.send_cq = ctx->cq;
1661         qp_init_attr.init_attr.recv_cq = ctx->cq;
1662         qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1663         qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1664         qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1665         qp_init_attr.init_attr.cap.max_send_sge = 1;
1666         qp_init_attr.init_attr.cap.max_recv_sge = 1;
1667         if (create_tun) {
1668                 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1669                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1670                 qp_init_attr.port = ctx->port;
1671                 qp_init_attr.slave = ctx->slave;
1672                 qp_init_attr.proxy_qp_type = qp_type;
1673                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1674                            IB_QP_QKEY | IB_QP_PORT;
1675         } else {
1676                 qp_init_attr.init_attr.qp_type = qp_type;
1677                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1678                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1679         }
1680         qp_init_attr.init_attr.port_num = ctx->port;
1681         qp_init_attr.init_attr.qp_context = ctx;
1682         qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1683         tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1684         if (IS_ERR(tun_qp->qp)) {
1685                 ret = PTR_ERR(tun_qp->qp);
1686                 tun_qp->qp = NULL;
1687                 pr_err("Couldn't create %s QP (%d)\n",
1688                        create_tun ? "tunnel" : "special", ret);
1689                 return ret;
1690         }
1691
1692         memset(&attr, 0, sizeof attr);
1693         attr.qp_state = IB_QPS_INIT;
1694         ret = 0;
1695         if (create_tun)
1696                 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1697                                               ctx->port, IB_DEFAULT_PKEY_FULL,
1698                                               &attr.pkey_index);
1699         if (ret || !create_tun)
1700                 attr.pkey_index =
1701                         to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1702         attr.qkey = IB_QP1_QKEY;
1703         attr.port_num = ctx->port;
1704         ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1705         if (ret) {
1706                 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1707                        create_tun ? "tunnel" : "special", ret);
1708                 goto err_qp;
1709         }
1710         attr.qp_state = IB_QPS_RTR;
1711         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1712         if (ret) {
1713                 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1714                        create_tun ? "tunnel" : "special", ret);
1715                 goto err_qp;
1716         }
1717         attr.qp_state = IB_QPS_RTS;
1718         attr.sq_psn = 0;
1719         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1720         if (ret) {
1721                 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1722                        create_tun ? "tunnel" : "special", ret);
1723                 goto err_qp;
1724         }
1725
1726         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1727                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1728                 if (ret) {
1729                         pr_err(" mlx4_ib_post_pv_buf error"
1730                                " (err = %d, i = %d)\n", ret, i);
1731                         goto err_qp;
1732                 }
1733         }
1734         return 0;
1735
1736 err_qp:
1737         ib_destroy_qp(tun_qp->qp);
1738         tun_qp->qp = NULL;
1739         return ret;
1740 }
1741
1742 /*
1743  * IB MAD completion callback for real SQPs
1744  */
1745 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1746 {
1747         struct mlx4_ib_demux_pv_ctx *ctx;
1748         struct mlx4_ib_demux_pv_qp *sqp;
1749         struct ib_wc wc;
1750         struct ib_grh *grh;
1751         struct ib_mad *mad;
1752
1753         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1754         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1755
1756         while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1757                 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1758                 if (wc.status == IB_WC_SUCCESS) {
1759                         switch (wc.opcode) {
1760                         case IB_WC_SEND:
1761                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1762                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1763                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1764                                         = NULL;
1765                                 spin_lock(&sqp->tx_lock);
1766                                 sqp->tx_ix_tail++;
1767                                 spin_unlock(&sqp->tx_lock);
1768                                 break;
1769                         case IB_WC_RECV:
1770                                 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1771                                                 (sqp->ring[wc.wr_id &
1772                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1773                                 grh = &(((struct mlx4_mad_rcv_buf *)
1774                                                 (sqp->ring[wc.wr_id &
1775                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1776                                 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1777                                 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1778                                                            (MLX4_NUM_TUNNEL_BUFS - 1)))
1779                                         pr_err("Failed reposting SQP "
1780                                                "buf:%lld\n", wc.wr_id);
1781                                 break;
1782                         default:
1783                                 BUG_ON(1);
1784                                 break;
1785                         }
1786                 } else  {
1787                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1788                                  " status = %d, wrid = 0x%llx\n",
1789                                  ctx->slave, wc.status, wc.wr_id);
1790                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1791                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1792                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1793                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1794                                         = NULL;
1795                                 spin_lock(&sqp->tx_lock);
1796                                 sqp->tx_ix_tail++;
1797                                 spin_unlock(&sqp->tx_lock);
1798                         }
1799                 }
1800         }
1801 }
1802
1803 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1804                                struct mlx4_ib_demux_pv_ctx **ret_ctx)
1805 {
1806         struct mlx4_ib_demux_pv_ctx *ctx;
1807
1808         *ret_ctx = NULL;
1809         ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1810         if (!ctx) {
1811                 pr_err("failed allocating pv resource context "
1812                        "for port %d, slave %d\n", port, slave);
1813                 return -ENOMEM;
1814         }
1815
1816         ctx->ib_dev = &dev->ib_dev;
1817         ctx->port = port;
1818         ctx->slave = slave;
1819         *ret_ctx = ctx;
1820         return 0;
1821 }
1822
1823 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1824 {
1825         if (dev->sriov.demux[port - 1].tun[slave]) {
1826                 kfree(dev->sriov.demux[port - 1].tun[slave]);
1827                 dev->sriov.demux[port - 1].tun[slave] = NULL;
1828         }
1829 }
1830
1831 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1832                                int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1833 {
1834         int ret, cq_size;
1835         struct ib_cq_init_attr cq_attr = {};
1836
1837         if (ctx->state != DEMUX_PV_STATE_DOWN)
1838                 return -EEXIST;
1839
1840         ctx->state = DEMUX_PV_STATE_STARTING;
1841         /* have QP0 only if link layer is IB */
1842         if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1843             IB_LINK_LAYER_INFINIBAND)
1844                 ctx->has_smi = 1;
1845
1846         if (ctx->has_smi) {
1847                 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1848                 if (ret) {
1849                         pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1850                         goto err_out;
1851                 }
1852         }
1853
1854         ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1855         if (ret) {
1856                 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1857                 goto err_out_qp0;
1858         }
1859
1860         cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1861         if (ctx->has_smi)
1862                 cq_size *= 2;
1863
1864         cq_attr.cqe = cq_size;
1865         ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1866                                NULL, ctx, &cq_attr);
1867         if (IS_ERR(ctx->cq)) {
1868                 ret = PTR_ERR(ctx->cq);
1869                 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1870                 goto err_buf;
1871         }
1872
1873         ctx->pd = ib_alloc_pd(ctx->ib_dev);
1874         if (IS_ERR(ctx->pd)) {
1875                 ret = PTR_ERR(ctx->pd);
1876                 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1877                 goto err_cq;
1878         }
1879
1880         if (ctx->has_smi) {
1881                 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1882                 if (ret) {
1883                         pr_err("Couldn't create %s QP0 (%d)\n",
1884                                create_tun ? "tunnel for" : "",  ret);
1885                         goto err_pd;
1886                 }
1887         }
1888
1889         ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1890         if (ret) {
1891                 pr_err("Couldn't create %s QP1 (%d)\n",
1892                        create_tun ? "tunnel for" : "",  ret);
1893                 goto err_qp0;
1894         }
1895
1896         if (create_tun)
1897                 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1898         else
1899                 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1900
1901         ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1902
1903         ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1904         if (ret) {
1905                 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1906                 goto err_wq;
1907         }
1908         ctx->state = DEMUX_PV_STATE_ACTIVE;
1909         return 0;
1910
1911 err_wq:
1912         ctx->wq = NULL;
1913         ib_destroy_qp(ctx->qp[1].qp);
1914         ctx->qp[1].qp = NULL;
1915
1916
1917 err_qp0:
1918         if (ctx->has_smi)
1919                 ib_destroy_qp(ctx->qp[0].qp);
1920         ctx->qp[0].qp = NULL;
1921
1922 err_pd:
1923         ib_dealloc_pd(ctx->pd);
1924         ctx->pd = NULL;
1925
1926 err_cq:
1927         ib_destroy_cq(ctx->cq);
1928         ctx->cq = NULL;
1929
1930 err_buf:
1931         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
1932
1933 err_out_qp0:
1934         if (ctx->has_smi)
1935                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
1936 err_out:
1937         ctx->state = DEMUX_PV_STATE_DOWN;
1938         return ret;
1939 }
1940
1941 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
1942                                  struct mlx4_ib_demux_pv_ctx *ctx, int flush)
1943 {
1944         if (!ctx)
1945                 return;
1946         if (ctx->state > DEMUX_PV_STATE_DOWN) {
1947                 ctx->state = DEMUX_PV_STATE_DOWNING;
1948                 if (flush)
1949                         flush_workqueue(ctx->wq);
1950                 if (ctx->has_smi) {
1951                         ib_destroy_qp(ctx->qp[0].qp);
1952                         ctx->qp[0].qp = NULL;
1953                         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
1954                 }
1955                 ib_destroy_qp(ctx->qp[1].qp);
1956                 ctx->qp[1].qp = NULL;
1957                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
1958                 ib_dealloc_pd(ctx->pd);
1959                 ctx->pd = NULL;
1960                 ib_destroy_cq(ctx->cq);
1961                 ctx->cq = NULL;
1962                 ctx->state = DEMUX_PV_STATE_DOWN;
1963         }
1964 }
1965
1966 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
1967                                   int port, int do_init)
1968 {
1969         int ret = 0;
1970
1971         if (!do_init) {
1972                 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
1973                 /* for master, destroy real sqp resources */
1974                 if (slave == mlx4_master_func_num(dev->dev))
1975                         destroy_pv_resources(dev, slave, port,
1976                                              dev->sriov.sqps[port - 1], 1);
1977                 /* destroy the tunnel qp resources */
1978                 destroy_pv_resources(dev, slave, port,
1979                                      dev->sriov.demux[port - 1].tun[slave], 1);
1980                 return 0;
1981         }
1982
1983         /* create the tunnel qp resources */
1984         ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
1985                                   dev->sriov.demux[port - 1].tun[slave]);
1986
1987         /* for master, create the real sqp resources */
1988         if (!ret && slave == mlx4_master_func_num(dev->dev))
1989                 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
1990                                           dev->sriov.sqps[port - 1]);
1991         return ret;
1992 }
1993
1994 void mlx4_ib_tunnels_update_work(struct work_struct *work)
1995 {
1996         struct mlx4_ib_demux_work *dmxw;
1997
1998         dmxw = container_of(work, struct mlx4_ib_demux_work, work);
1999         mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
2000                                dmxw->do_init);
2001         kfree(dmxw);
2002         return;
2003 }
2004
2005 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
2006                                        struct mlx4_ib_demux_ctx *ctx,
2007                                        int port)
2008 {
2009         char name[12];
2010         int ret = 0;
2011         int i;
2012
2013         ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
2014                            sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
2015         if (!ctx->tun)
2016                 return -ENOMEM;
2017
2018         ctx->dev = dev;
2019         ctx->port = port;
2020         ctx->ib_dev = &dev->ib_dev;
2021
2022         for (i = 0;
2023              i < min(dev->dev->caps.sqp_demux,
2024              (u16)(dev->dev->persist->num_vfs + 1));
2025              i++) {
2026                 struct mlx4_active_ports actv_ports =
2027                         mlx4_get_active_ports(dev->dev, i);
2028
2029                 if (!test_bit(port - 1, actv_ports.ports))
2030                         continue;
2031
2032                 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
2033                 if (ret) {
2034                         ret = -ENOMEM;
2035                         goto err_mcg;
2036                 }
2037         }
2038
2039         ret = mlx4_ib_mcg_port_init(ctx);
2040         if (ret) {
2041                 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
2042                 goto err_mcg;
2043         }
2044
2045         snprintf(name, sizeof name, "mlx4_ibt%d", port);
2046         ctx->wq = create_singlethread_workqueue(name);
2047         if (!ctx->wq) {
2048                 pr_err("Failed to create tunnelling WQ for port %d\n", port);
2049                 ret = -ENOMEM;
2050                 goto err_wq;
2051         }
2052
2053         snprintf(name, sizeof name, "mlx4_ibud%d", port);
2054         ctx->ud_wq = create_singlethread_workqueue(name);
2055         if (!ctx->ud_wq) {
2056                 pr_err("Failed to create up/down WQ for port %d\n", port);
2057                 ret = -ENOMEM;
2058                 goto err_udwq;
2059         }
2060
2061         return 0;
2062
2063 err_udwq:
2064         destroy_workqueue(ctx->wq);
2065         ctx->wq = NULL;
2066
2067 err_wq:
2068         mlx4_ib_mcg_port_cleanup(ctx, 1);
2069 err_mcg:
2070         for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2071                 free_pv_object(dev, i, port);
2072         kfree(ctx->tun);
2073         ctx->tun = NULL;
2074         return ret;
2075 }
2076
2077 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2078 {
2079         if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2080                 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2081                 flush_workqueue(sqp_ctx->wq);
2082                 if (sqp_ctx->has_smi) {
2083                         ib_destroy_qp(sqp_ctx->qp[0].qp);
2084                         sqp_ctx->qp[0].qp = NULL;
2085                         mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2086                 }
2087                 ib_destroy_qp(sqp_ctx->qp[1].qp);
2088                 sqp_ctx->qp[1].qp = NULL;
2089                 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2090                 ib_dealloc_pd(sqp_ctx->pd);
2091                 sqp_ctx->pd = NULL;
2092                 ib_destroy_cq(sqp_ctx->cq);
2093                 sqp_ctx->cq = NULL;
2094                 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2095         }
2096 }
2097
2098 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2099 {
2100         int i;
2101         if (ctx) {
2102                 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2103                 mlx4_ib_mcg_port_cleanup(ctx, 1);
2104                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2105                         if (!ctx->tun[i])
2106                                 continue;
2107                         if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2108                                 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2109                 }
2110                 flush_workqueue(ctx->wq);
2111                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2112                         destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2113                         free_pv_object(dev, i, ctx->port);
2114                 }
2115                 kfree(ctx->tun);
2116                 destroy_workqueue(ctx->ud_wq);
2117                 destroy_workqueue(ctx->wq);
2118         }
2119 }
2120
2121 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2122 {
2123         int i;
2124
2125         if (!mlx4_is_master(dev->dev))
2126                 return;
2127         /* initialize or tear down tunnel QPs for the master */
2128         for (i = 0; i < dev->dev->caps.num_ports; i++)
2129                 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2130         return;
2131 }
2132
2133 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2134 {
2135         int i = 0;
2136         int err;
2137
2138         if (!mlx4_is_mfunc(dev->dev))
2139                 return 0;
2140
2141         dev->sriov.is_going_down = 0;
2142         spin_lock_init(&dev->sriov.going_down_lock);
2143         mlx4_ib_cm_paravirt_init(dev);
2144
2145         mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2146
2147         if (mlx4_is_slave(dev->dev)) {
2148                 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2149                 return 0;
2150         }
2151
2152         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2153                 if (i == mlx4_master_func_num(dev->dev))
2154                         mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2155                 else
2156                         mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2157         }
2158
2159         err = mlx4_ib_init_alias_guid_service(dev);
2160         if (err) {
2161                 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2162                 goto paravirt_err;
2163         }
2164         err = mlx4_ib_device_register_sysfs(dev);
2165         if (err) {
2166                 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2167                 goto sysfs_err;
2168         }
2169
2170         mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2171                      dev->dev->caps.sqp_demux);
2172         for (i = 0; i < dev->num_ports; i++) {
2173                 union ib_gid gid;
2174                 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2175                 if (err)
2176                         goto demux_err;
2177                 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2178                 atomic64_set(&dev->sriov.demux[i].subnet_prefix,
2179                              be64_to_cpu(gid.global.subnet_prefix));
2180                 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2181                                       &dev->sriov.sqps[i]);
2182                 if (err)
2183                         goto demux_err;
2184                 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2185                 if (err)
2186                         goto free_pv;
2187         }
2188         mlx4_ib_master_tunnels(dev, 1);
2189         return 0;
2190
2191 free_pv:
2192         free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2193 demux_err:
2194         while (--i >= 0) {
2195                 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2196                 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2197         }
2198         mlx4_ib_device_unregister_sysfs(dev);
2199
2200 sysfs_err:
2201         mlx4_ib_destroy_alias_guid_service(dev);
2202
2203 paravirt_err:
2204         mlx4_ib_cm_paravirt_clean(dev, -1);
2205
2206         return err;
2207 }
2208
2209 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2210 {
2211         int i;
2212         unsigned long flags;
2213
2214         if (!mlx4_is_mfunc(dev->dev))
2215                 return;
2216
2217         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2218         dev->sriov.is_going_down = 1;
2219         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2220         if (mlx4_is_master(dev->dev)) {
2221                 for (i = 0; i < dev->num_ports; i++) {
2222                         flush_workqueue(dev->sriov.demux[i].ud_wq);
2223                         mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2224                         kfree(dev->sriov.sqps[i]);
2225                         dev->sriov.sqps[i] = NULL;
2226                         mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2227                 }
2228
2229                 mlx4_ib_cm_paravirt_clean(dev, -1);
2230                 mlx4_ib_destroy_alias_guid_service(dev);
2231                 mlx4_ib_device_unregister_sysfs(dev);
2232         }
2233 }