kernel/drivers/gpu/drm/tilcdc/tilcdc_drv.c

   1 /*
   2  * Copyright (C) 2012 Texas Instruments
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 /* LCDC DRM driver, based on da8xx-fb */
  19
  20 #include <linux/component.h>
  21
  22 #include "tilcdc_drv.h"
  23 #include "tilcdc_regs.h"
  24 #include "tilcdc_tfp410.h"
  25 #include "tilcdc_panel.h"
  26 #include "tilcdc_external.h"
  27
  28 #include "drm_fb_helper.h"
  29
  30 static LIST_HEAD(module_list);
  31
  32 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
  33                 const struct tilcdc_module_ops *funcs)
  34 {
  35         mod->name = name;
  36         mod->funcs = funcs;
  37         INIT_LIST_HEAD(&mod->list);
  38         list_add(&mod->list, &module_list);
  39 }
  40
  41 void tilcdc_module_cleanup(struct tilcdc_module *mod)
  42 {
  43         list_del(&mod->list);
  44 }
  45
  46 static struct of_device_id tilcdc_of_match[];
  47
  48 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
  49                 struct drm_file *file_priv, struct drm_mode_fb_cmd2 *mode_cmd)
  50 {
  51         return drm_fb_cma_create(dev, file_priv, mode_cmd);
  52 }
  53
  54 static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
  55 {
  56         struct tilcdc_drm_private *priv = dev->dev_private;
  57         drm_fbdev_cma_hotplug_event(priv->fbdev);
  58 }
  59
  60 static const struct drm_mode_config_funcs mode_config_funcs = {
  61         .fb_create = tilcdc_fb_create,
  62         .output_poll_changed = tilcdc_fb_output_poll_changed,
  63 };
  64
  65 static int modeset_init(struct drm_device *dev)
  66 {
  67         struct tilcdc_drm_private *priv = dev->dev_private;
  68         struct tilcdc_module *mod;
  69
  70         drm_mode_config_init(dev);
  71
  72         priv->crtc = tilcdc_crtc_create(dev);
  73
  74         list_for_each_entry(mod, &module_list, list) {
  75                 DBG("loading module: %s", mod->name);
  76                 mod->funcs->modeset_init(mod, dev);
  77         }
  78
  79         dev->mode_config.min_width = 0;
  80         dev->mode_config.min_height = 0;
  81         dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
  82         dev->mode_config.max_height = 2048;
  83         dev->mode_config.funcs = &mode_config_funcs;
  84
  85         return 0;
  86 }
  87
  88 #ifdef CONFIG_CPU_FREQ
  89 static int cpufreq_transition(struct notifier_block *nb,
  90                                      unsigned long val, void *data)
  91 {
  92         struct tilcdc_drm_private *priv = container_of(nb,
  93                         struct tilcdc_drm_private, freq_transition);
  94         if (val == CPUFREQ_POSTCHANGE) {
  95                 if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
  96                         priv->lcd_fck_rate = clk_get_rate(priv->clk);
  97                         tilcdc_crtc_update_clk(priv->crtc);
  98                 }
  99         }
 100
 101         return 0;
 102 }
 103 #endif
 104
 105 /*
 106  * DRM operations:
 107  */
 108
 109 static int tilcdc_unload(struct drm_device *dev)
 110 {
 111         struct tilcdc_drm_private *priv = dev->dev_private;
 112
 113         tilcdc_remove_external_encoders(dev);
 114
 115         drm_fbdev_cma_fini(priv->fbdev);
 116         drm_kms_helper_poll_fini(dev);
 117         drm_mode_config_cleanup(dev);
 118         drm_vblank_cleanup(dev);
 119
 120         pm_runtime_get_sync(dev->dev);
 121         drm_irq_uninstall(dev);
 122         pm_runtime_put_sync(dev->dev);
 123
 124 #ifdef CONFIG_CPU_FREQ
 125         cpufreq_unregister_notifier(&priv->freq_transition,
 126                         CPUFREQ_TRANSITION_NOTIFIER);
 127 #endif
 128
 129         if (priv->clk)
 130                 clk_put(priv->clk);
 131
 132         if (priv->mmio)
 133                 iounmap(priv->mmio);
 134
 135         flush_workqueue(priv->wq);
 136         destroy_workqueue(priv->wq);
 137
 138         dev->dev_private = NULL;
 139
 140         pm_runtime_disable(dev->dev);
 141
 142         kfree(priv);
 143
 144         return 0;
 145 }
 146
 147 static int tilcdc_load(struct drm_device *dev, unsigned long flags)
 148 {
 149         struct platform_device *pdev = dev->platformdev;
 150         struct device_node *node = pdev->dev.of_node;
 151         struct tilcdc_drm_private *priv;
 152         struct tilcdc_module *mod;
 153         struct resource *res;
 154         u32 bpp = 0;
 155         int ret;
 156
 157         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 158         if (!priv) {
 159                 dev_err(dev->dev, "failed to allocate private data\n");
 160                 return -ENOMEM;
 161         }
 162
 163         dev->dev_private = priv;
 164
 165         priv->is_componentized =
 166                 tilcdc_get_external_components(dev->dev, NULL) > 0;
 167
 168         priv->wq = alloc_ordered_workqueue("tilcdc", 0);
 169         if (!priv->wq) {
 170                 ret = -ENOMEM;
 171                 goto fail_free_priv;
 172         }
 173
 174         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 175         if (!res) {
 176                 dev_err(dev->dev, "failed to get memory resource\n");
 177                 ret = -EINVAL;
 178                 goto fail_free_wq;
 179         }
 180
 181         priv->mmio = ioremap_nocache(res->start, resource_size(res));
 182         if (!priv->mmio) {
 183                 dev_err(dev->dev, "failed to ioremap\n");
 184                 ret = -ENOMEM;
 185                 goto fail_free_wq;
 186         }
 187
 188         priv->clk = clk_get(dev->dev, "fck");
 189         if (IS_ERR(priv->clk)) {
 190                 dev_err(dev->dev, "failed to get functional clock\n");
 191                 ret = -ENODEV;
 192                 goto fail_iounmap;
 193         }
 194
 195         priv->disp_clk = clk_get(dev->dev, "dpll_disp_ck");
 196         if (IS_ERR(priv->clk)) {
 197                 dev_err(dev->dev, "failed to get display clock\n");
 198                 ret = -ENODEV;
 199                 goto fail_put_clk;
 200         }
 201
 202 #ifdef CONFIG_CPU_FREQ
 203         priv->lcd_fck_rate = clk_get_rate(priv->clk);
 204         priv->freq_transition.notifier_call = cpufreq_transition;
 205         ret = cpufreq_register_notifier(&priv->freq_transition,
 206                         CPUFREQ_TRANSITION_NOTIFIER);
 207         if (ret) {
 208                 dev_err(dev->dev, "failed to register cpufreq notifier\n");
 209                 goto fail_put_disp_clk;
 210         }
 211 #endif
 212
 213         if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
 214                 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
 215
 216         DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
 217
 218         if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
 219                 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
 220
 221         DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
 222
 223         if (of_property_read_u32(node, "ti,max-pixelclock",
 224                                         &priv->max_pixelclock))
 225                 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
 226
 227         DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
 228
 229         pm_runtime_enable(dev->dev);
 230         pm_runtime_irq_safe(dev->dev);
 231
 232         /* Determine LCD IP Version */
 233         pm_runtime_get_sync(dev->dev);
 234         switch (tilcdc_read(dev, LCDC_PID_REG)) {
 235         case 0x4c100102:
 236                 priv->rev = 1;
 237                 break;
 238         case 0x4f200800:
 239         case 0x4f201000:
 240                 priv->rev = 2;
 241                 break;
 242         default:
 243                 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
 244                                 "defaulting to LCD revision 1\n",
 245                                 tilcdc_read(dev, LCDC_PID_REG));
 246                 priv->rev = 1;
 247                 break;
 248         }
 249
 250         pm_runtime_put_sync(dev->dev);
 251
 252         ret = modeset_init(dev);
 253         if (ret < 0) {
 254                 dev_err(dev->dev, "failed to initialize mode setting\n");
 255                 goto fail_cpufreq_unregister;
 256         }
 257
 258         platform_set_drvdata(pdev, dev);
 259
 260         if (priv->is_componentized) {
 261                 ret = component_bind_all(dev->dev, dev);
 262                 if (ret < 0)
 263                         goto fail_mode_config_cleanup;
 264
 265                 ret = tilcdc_add_external_encoders(dev, &bpp);
 266                 if (ret < 0)
 267                         goto fail_component_cleanup;
 268         }
 269
 270         if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
 271                 dev_err(dev->dev, "no encoders/connectors found\n");
 272                 ret = -ENXIO;
 273                 goto fail_external_cleanup;
 274         }
 275
 276         ret = drm_vblank_init(dev, 1);
 277         if (ret < 0) {
 278                 dev_err(dev->dev, "failed to initialize vblank\n");
 279                 goto fail_external_cleanup;
 280         }
 281
 282         pm_runtime_get_sync(dev->dev);
 283         ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
 284         pm_runtime_put_sync(dev->dev);
 285         if (ret < 0) {
 286                 dev_err(dev->dev, "failed to install IRQ handler\n");
 287                 goto fail_vblank_cleanup;
 288         }
 289
 290         list_for_each_entry(mod, &module_list, list) {
 291                 DBG("%s: preferred_bpp: %d", mod->name, mod->preferred_bpp);
 292                 bpp = mod->preferred_bpp;
 293                 if (bpp > 0)
 294                         break;
 295         }
 296
 297         priv->fbdev = drm_fbdev_cma_init(dev, bpp,
 298                         dev->mode_config.num_crtc,
 299                         dev->mode_config.num_connector);
 300         if (IS_ERR(priv->fbdev)) {
 301                 ret = PTR_ERR(priv->fbdev);
 302                 goto fail_irq_uninstall;
 303         }
 304
 305         drm_kms_helper_poll_init(dev);
 306
 307         return 0;
 308
 309 fail_irq_uninstall:
 310         pm_runtime_get_sync(dev->dev);
 311         drm_irq_uninstall(dev);
 312         pm_runtime_put_sync(dev->dev);
 313
 314 fail_vblank_cleanup:
 315         drm_vblank_cleanup(dev);
 316
 317 fail_mode_config_cleanup:
 318         drm_mode_config_cleanup(dev);
 319
 320 fail_component_cleanup:
 321         if (priv->is_componentized)
 322                 component_unbind_all(dev->dev, dev);
 323
 324 fail_external_cleanup:
 325         tilcdc_remove_external_encoders(dev);
 326
 327 fail_cpufreq_unregister:
 328         pm_runtime_disable(dev->dev);
 329 #ifdef CONFIG_CPU_FREQ
 330         cpufreq_unregister_notifier(&priv->freq_transition,
 331                         CPUFREQ_TRANSITION_NOTIFIER);
 332 fail_put_disp_clk:
 333         clk_put(priv->disp_clk);
 334 #endif
 335
 336 fail_put_clk:
 337         clk_put(priv->clk);
 338
 339 fail_iounmap:
 340         iounmap(priv->mmio);
 341
 342 fail_free_wq:
 343         flush_workqueue(priv->wq);
 344         destroy_workqueue(priv->wq);
 345
 346 fail_free_priv:
 347         dev->dev_private = NULL;
 348         kfree(priv);
 349         return ret;
 350 }
 351
 352 static void tilcdc_preclose(struct drm_device *dev, struct drm_file *file)
 353 {
 354         struct tilcdc_drm_private *priv = dev->dev_private;
 355
 356         tilcdc_crtc_cancel_page_flip(priv->crtc, file);
 357 }
 358
 359 static void tilcdc_lastclose(struct drm_device *dev)
 360 {
 361         struct tilcdc_drm_private *priv = dev->dev_private;
 362         drm_fbdev_cma_restore_mode(priv->fbdev);
 363 }
 364
 365 static irqreturn_t tilcdc_irq(int irq, void *arg)
 366 {
 367         struct drm_device *dev = arg;
 368         struct tilcdc_drm_private *priv = dev->dev_private;
 369         return tilcdc_crtc_irq(priv->crtc);
 370 }
 371
 372 static void tilcdc_irq_preinstall(struct drm_device *dev)
 373 {
 374         tilcdc_clear_irqstatus(dev, 0xffffffff);
 375 }
 376
 377 static int tilcdc_irq_postinstall(struct drm_device *dev)
 378 {
 379         struct tilcdc_drm_private *priv = dev->dev_private;
 380
 381         /* enable FIFO underflow irq: */
 382         if (priv->rev == 1)
 383                 tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_UNDERFLOW_INT_ENA);
 384         else
 385                 tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_UNDERFLOW_INT_ENA);
 386
 387         return 0;
 388 }
 389
 390 static void tilcdc_irq_uninstall(struct drm_device *dev)
 391 {
 392         struct tilcdc_drm_private *priv = dev->dev_private;
 393
 394         /* disable irqs that we might have enabled: */
 395         if (priv->rev == 1) {
 396                 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
 397                                 LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
 398                 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA);
 399         } else {
 400                 tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
 401                         LCDC_V2_UNDERFLOW_INT_ENA | LCDC_V2_PL_INT_ENA |
 402                         LCDC_V2_END_OF_FRAME0_INT_ENA | LCDC_V2_END_OF_FRAME1_INT_ENA |
 403                         LCDC_FRAME_DONE);
 404         }
 405
 406 }
 407
 408 static void enable_vblank(struct drm_device *dev, bool enable)
 409 {
 410         struct tilcdc_drm_private *priv = dev->dev_private;
 411         u32 reg, mask;
 412
 413         if (priv->rev == 1) {
 414                 reg = LCDC_DMA_CTRL_REG;
 415                 mask = LCDC_V1_END_OF_FRAME_INT_ENA;
 416         } else {
 417                 reg = LCDC_INT_ENABLE_SET_REG;
 418                 mask = LCDC_V2_END_OF_FRAME0_INT_ENA |
 419                         LCDC_V2_END_OF_FRAME1_INT_ENA | LCDC_FRAME_DONE;
 420         }
 421
 422         if (enable)
 423                 tilcdc_set(dev, reg, mask);
 424         else
 425                 tilcdc_clear(dev, reg, mask);
 426 }
 427
 428 static int tilcdc_enable_vblank(struct drm_device *dev, unsigned int pipe)
 429 {
 430         enable_vblank(dev, true);
 431         return 0;
 432 }
 433
 434 static void tilcdc_disable_vblank(struct drm_device *dev, unsigned int pipe)
 435 {
 436         enable_vblank(dev, false);
 437 }
 438
 439 #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_PM_SLEEP)
 440 static const struct {
 441         const char *name;
 442         uint8_t  rev;
 443         uint8_t  save;
 444         uint32_t reg;
 445 } registers[] =         {
 446 #define REG(rev, save, reg) { #reg, rev, save, reg }
 447                 /* exists in revision 1: */
 448                 REG(1, false, LCDC_PID_REG),
 449                 REG(1, true,  LCDC_CTRL_REG),
 450                 REG(1, false, LCDC_STAT_REG),
 451                 REG(1, true,  LCDC_RASTER_CTRL_REG),
 452                 REG(1, true,  LCDC_RASTER_TIMING_0_REG),
 453                 REG(1, true,  LCDC_RASTER_TIMING_1_REG),
 454                 REG(1, true,  LCDC_RASTER_TIMING_2_REG),
 455                 REG(1, true,  LCDC_DMA_CTRL_REG),
 456                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_0_REG),
 457                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_0_REG),
 458                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_1_REG),
 459                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_1_REG),
 460                 /* new in revision 2: */
 461                 REG(2, false, LCDC_RAW_STAT_REG),
 462                 REG(2, false, LCDC_MASKED_STAT_REG),
 463                 REG(2, false, LCDC_INT_ENABLE_SET_REG),
 464                 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
 465                 REG(2, false, LCDC_END_OF_INT_IND_REG),
 466                 REG(2, true,  LCDC_CLK_ENABLE_REG),
 467                 REG(2, true,  LCDC_INT_ENABLE_SET_REG),
 468 #undef REG
 469 };
 470 #endif
 471
 472 #ifdef CONFIG_DEBUG_FS
 473 static int tilcdc_regs_show(struct seq_file *m, void *arg)
 474 {
 475         struct drm_info_node *node = (struct drm_info_node *) m->private;
 476         struct drm_device *dev = node->minor->dev;
 477         struct tilcdc_drm_private *priv = dev->dev_private;
 478         unsigned i;
 479
 480         pm_runtime_get_sync(dev->dev);
 481
 482         seq_printf(m, "revision: %d\n", priv->rev);
 483
 484         for (i = 0; i < ARRAY_SIZE(registers); i++)
 485                 if (priv->rev >= registers[i].rev)
 486                         seq_printf(m, "%s:\t %08x\n", registers[i].name,
 487                                         tilcdc_read(dev, registers[i].reg));
 488
 489         pm_runtime_put_sync(dev->dev);
 490
 491         return 0;
 492 }
 493
 494 static int tilcdc_mm_show(struct seq_file *m, void *arg)
 495 {
 496         struct drm_info_node *node = (struct drm_info_node *) m->private;
 497         struct drm_device *dev = node->minor->dev;
 498         return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
 499 }
 500
 501 static struct drm_info_list tilcdc_debugfs_list[] = {
 502                 { "regs", tilcdc_regs_show, 0 },
 503                 { "mm",   tilcdc_mm_show,   0 },
 504                 { "fb",   drm_fb_cma_debugfs_show, 0 },
 505 };
 506
 507 static int tilcdc_debugfs_init(struct drm_minor *minor)
 508 {
 509         struct drm_device *dev = minor->dev;
 510         struct tilcdc_module *mod;
 511         int ret;
 512
 513         ret = drm_debugfs_create_files(tilcdc_debugfs_list,
 514                         ARRAY_SIZE(tilcdc_debugfs_list),
 515                         minor->debugfs_root, minor);
 516
 517         list_for_each_entry(mod, &module_list, list)
 518                 if (mod->funcs->debugfs_init)
 519                         mod->funcs->debugfs_init(mod, minor);
 520
 521         if (ret) {
 522                 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
 523                 return ret;
 524         }
 525
 526         return ret;
 527 }
 528
 529 static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
 530 {
 531         struct tilcdc_module *mod;
 532         drm_debugfs_remove_files(tilcdc_debugfs_list,
 533                         ARRAY_SIZE(tilcdc_debugfs_list), minor);
 534
 535         list_for_each_entry(mod, &module_list, list)
 536                 if (mod->funcs->debugfs_cleanup)
 537                         mod->funcs->debugfs_cleanup(mod, minor);
 538 }
 539 #endif
 540
 541 static const struct file_operations fops = {
 542         .owner              = THIS_MODULE,
 543         .open               = drm_open,
 544         .release            = drm_release,
 545         .unlocked_ioctl     = drm_ioctl,
 546 #ifdef CONFIG_COMPAT
 547         .compat_ioctl       = drm_compat_ioctl,
 548 #endif
 549         .poll               = drm_poll,
 550         .read               = drm_read,
 551         .llseek             = no_llseek,
 552         .mmap               = drm_gem_cma_mmap,
 553 };
 554
 555 static struct drm_driver tilcdc_driver = {
 556         .driver_features    = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
 557         .load               = tilcdc_load,
 558         .unload             = tilcdc_unload,
 559         .preclose           = tilcdc_preclose,
 560         .lastclose          = tilcdc_lastclose,
 561         .set_busid          = drm_platform_set_busid,
 562         .irq_handler        = tilcdc_irq,
 563         .irq_preinstall     = tilcdc_irq_preinstall,
 564         .irq_postinstall    = tilcdc_irq_postinstall,
 565         .irq_uninstall      = tilcdc_irq_uninstall,
 566         .get_vblank_counter = drm_vblank_no_hw_counter,
 567         .enable_vblank      = tilcdc_enable_vblank,
 568         .disable_vblank     = tilcdc_disable_vblank,
 569         .gem_free_object    = drm_gem_cma_free_object,
 570         .gem_vm_ops         = &drm_gem_cma_vm_ops,
 571         .dumb_create        = drm_gem_cma_dumb_create,
 572         .dumb_map_offset    = drm_gem_cma_dumb_map_offset,
 573         .dumb_destroy       = drm_gem_dumb_destroy,
 574 #ifdef CONFIG_DEBUG_FS
 575         .debugfs_init       = tilcdc_debugfs_init,
 576         .debugfs_cleanup    = tilcdc_debugfs_cleanup,
 577 #endif
 578         .fops               = &fops,
 579         .name               = "tilcdc",
 580         .desc               = "TI LCD Controller DRM",
 581         .date               = "20121205",
 582         .major              = 1,
 583         .minor              = 0,
 584 };
 585
 586 /*
 587  * Power management:
 588  */
 589
 590 #ifdef CONFIG_PM_SLEEP
 591 static int tilcdc_pm_suspend(struct device *dev)
 592 {
 593         struct drm_device *ddev = dev_get_drvdata(dev);
 594         struct tilcdc_drm_private *priv = ddev->dev_private;
 595         unsigned i, n = 0;
 596
 597         drm_kms_helper_poll_disable(ddev);
 598
 599         /* Save register state: */
 600         for (i = 0; i < ARRAY_SIZE(registers); i++)
 601                 if (registers[i].save && (priv->rev >= registers[i].rev))
 602                         priv->saved_register[n++] = tilcdc_read(ddev, registers[i].reg);
 603
 604         return 0;
 605 }
 606
 607 static int tilcdc_pm_resume(struct device *dev)
 608 {
 609         struct drm_device *ddev = dev_get_drvdata(dev);
 610         struct tilcdc_drm_private *priv = ddev->dev_private;
 611         unsigned i, n = 0;
 612
 613         /* Restore register state: */
 614         for (i = 0; i < ARRAY_SIZE(registers); i++)
 615                 if (registers[i].save && (priv->rev >= registers[i].rev))
 616                         tilcdc_write(ddev, registers[i].reg, priv->saved_register[n++]);
 617
 618         drm_kms_helper_poll_enable(ddev);
 619
 620         return 0;
 621 }
 622 #endif
 623
 624 static const struct dev_pm_ops tilcdc_pm_ops = {
 625         SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
 626 };
 627
 628 /*
 629  * Platform driver:
 630  */
 631
 632 static int tilcdc_bind(struct device *dev)
 633 {
 634         return drm_platform_init(&tilcdc_driver, to_platform_device(dev));
 635 }
 636
 637 static void tilcdc_unbind(struct device *dev)
 638 {
 639         drm_put_dev(dev_get_drvdata(dev));
 640 }
 641
 642 static const struct component_master_ops tilcdc_comp_ops = {
 643         .bind = tilcdc_bind,
 644         .unbind = tilcdc_unbind,
 645 };
 646
 647 static int tilcdc_pdev_probe(struct platform_device *pdev)
 648 {
 649         struct component_match *match = NULL;
 650         int ret;
 651
 652         /* bail out early if no DT data: */
 653         if (!pdev->dev.of_node) {
 654                 dev_err(&pdev->dev, "device-tree data is missing\n");
 655                 return -ENXIO;
 656         }
 657
 658         ret = tilcdc_get_external_components(&pdev->dev, &match);
 659         if (ret < 0)
 660                 return ret;
 661         else if (ret == 0)
 662                 return drm_platform_init(&tilcdc_driver, pdev);
 663         else
 664                 return component_master_add_with_match(&pdev->dev,
 665                                                        &tilcdc_comp_ops,
 666                                                        match);
 667 }
 668
 669 static int tilcdc_pdev_remove(struct platform_device *pdev)
 670 {
 671         struct drm_device *ddev = dev_get_drvdata(&pdev->dev);
 672         struct tilcdc_drm_private *priv = ddev->dev_private;
 673
 674         /* Check if a subcomponent has already triggered the unloading. */
 675         if (!priv)
 676                 return 0;
 677
 678         if (priv->is_componentized)
 679                 component_master_del(&pdev->dev, &tilcdc_comp_ops);
 680         else
 681                 drm_put_dev(platform_get_drvdata(pdev));
 682
 683         return 0;
 684 }
 685
 686 static struct of_device_id tilcdc_of_match[] = {
 687                 { .compatible = "ti,am33xx-tilcdc", },
 688                 { },
 689 };
 690 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
 691
 692 static struct platform_driver tilcdc_platform_driver = {
 693         .probe      = tilcdc_pdev_probe,
 694         .remove     = tilcdc_pdev_remove,
 695         .driver     = {
 696                 .name   = "tilcdc",
 697                 .pm     = &tilcdc_pm_ops,
 698                 .of_match_table = tilcdc_of_match,
 699         },
 700 };
 701
 702 static int __init tilcdc_drm_init(void)
 703 {
 704         DBG("init");
 705         tilcdc_tfp410_init();
 706         tilcdc_panel_init();
 707         return platform_driver_register(&tilcdc_platform_driver);
 708 }
 709
 710 static void __exit tilcdc_drm_fini(void)
 711 {
 712         DBG("fini");
 713         platform_driver_unregister(&tilcdc_platform_driver);
 714         tilcdc_panel_fini();
 715         tilcdc_tfp410_fini();
 716 }
 717
 718 module_init(tilcdc_drm_init);
 719 module_exit(tilcdc_drm_fini);
 720
 721 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
 722 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
 723 MODULE_LICENSE("GPL");