Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / drivers / gpu / drm / rcar-du / rcar_lvds_regs.h
1 /*
2  * rcar_lvds_regs.h  --  R-Car LVDS Interface Registers Definitions
3  *
4  * Copyright (C) 2013 Renesas Electronics Corporation
5  *
6  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2
10  * as published by the Free Software Foundation.
11  */
12
13 #ifndef __RCAR_LVDS_REGS_H__
14 #define __RCAR_LVDS_REGS_H__
15
16 #define LVDCR0                          0x0000
17 #define LVDCR0_DUSEL                    (1 << 15)
18 #define LVDCR0_DMD                      (1 << 12)
19 #define LVDCR0_LVMD_MASK                (0xf << 8)
20 #define LVDCR0_LVMD_SHIFT               8
21 #define LVDCR0_PLLEN                    (1 << 4)
22 #define LVDCR0_BEN                      (1 << 2)
23 #define LVDCR0_LVEN                     (1 << 1)
24 #define LVDCR0_LVRES                    (1 << 0)
25
26 #define LVDCR1                          0x0004
27 #define LVDCR1_CKSEL                    (1 << 15)
28 #define LVDCR1_CHSTBY(n)                (3 << (2 + (n) * 2))
29 #define LVDCR1_CLKSTBY                  (3 << 0)
30
31 #define LVDPLLCR                        0x0008
32 #define LVDPLLCR_CEEN                   (1 << 14)
33 #define LVDPLLCR_FBEN                   (1 << 13)
34 #define LVDPLLCR_COSEL                  (1 << 12)
35 #define LVDPLLCR_PLLDLYCNT_150M         (0x1bf << 0)
36 #define LVDPLLCR_PLLDLYCNT_121M         (0x22c << 0)
37 #define LVDPLLCR_PLLDLYCNT_60M          (0x77b << 0)
38 #define LVDPLLCR_PLLDLYCNT_38M          (0x69a << 0)
39 #define LVDPLLCR_PLLDLYCNT_MASK         (0x7ff << 0)
40
41 #define LVDCTRCR                        0x000c
42 #define LVDCTRCR_CTR3SEL_ZERO           (0 << 12)
43 #define LVDCTRCR_CTR3SEL_ODD            (1 << 12)
44 #define LVDCTRCR_CTR3SEL_CDE            (2 << 12)
45 #define LVDCTRCR_CTR3SEL_MASK           (7 << 12)
46 #define LVDCTRCR_CTR2SEL_DISP           (0 << 8)
47 #define LVDCTRCR_CTR2SEL_ODD            (1 << 8)
48 #define LVDCTRCR_CTR2SEL_CDE            (2 << 8)
49 #define LVDCTRCR_CTR2SEL_HSYNC          (3 << 8)
50 #define LVDCTRCR_CTR2SEL_VSYNC          (4 << 8)
51 #define LVDCTRCR_CTR2SEL_MASK           (7 << 8)
52 #define LVDCTRCR_CTR1SEL_VSYNC          (0 << 4)
53 #define LVDCTRCR_CTR1SEL_DISP           (1 << 4)
54 #define LVDCTRCR_CTR1SEL_ODD            (2 << 4)
55 #define LVDCTRCR_CTR1SEL_CDE            (3 << 4)
56 #define LVDCTRCR_CTR1SEL_HSYNC          (4 << 4)
57 #define LVDCTRCR_CTR1SEL_MASK           (7 << 4)
58 #define LVDCTRCR_CTR0SEL_HSYNC          (0 << 0)
59 #define LVDCTRCR_CTR0SEL_VSYNC          (1 << 0)
60 #define LVDCTRCR_CTR0SEL_DISP           (2 << 0)
61 #define LVDCTRCR_CTR0SEL_ODD            (3 << 0)
62 #define LVDCTRCR_CTR0SEL_CDE            (4 << 0)
63 #define LVDCTRCR_CTR0SEL_MASK           (7 << 0)
64
65 #define LVDCHCR                         0x0010
66 #define LVDCHCR_CHSEL_CH(n, c)          ((((c) - (n)) & 3) << ((n) * 4))
67 #define LVDCHCR_CHSEL_MASK(n)           (3 << ((n) * 4))
68
69 #endif /* __RCAR_LVDS_REGS_H__ */