Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / drivers / gpu / drm / omapdrm / omap_drv.c
1 /*
2  * drivers/gpu/drm/omapdrm/omap_drv.c
3  *
4  * Copyright (C) 2011 Texas Instruments
5  * Author: Rob Clark <rob@ti.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published by
9  * the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19
20 #include "omap_drv.h"
21
22 #include "drm_crtc_helper.h"
23 #include "drm_fb_helper.h"
24 #include "omap_dmm_tiler.h"
25
26 #define DRIVER_NAME             MODULE_NAME
27 #define DRIVER_DESC             "OMAP DRM"
28 #define DRIVER_DATE             "20110917"
29 #define DRIVER_MAJOR            1
30 #define DRIVER_MINOR            0
31 #define DRIVER_PATCHLEVEL       0
32
33 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
34
35 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
36 module_param(num_crtc, int, 0600);
37
38 /*
39  * mode config funcs
40  */
41
42 /* Notes about mapping DSS and DRM entities:
43  *    CRTC:        overlay
44  *    encoder:     manager.. with some extension to allow one primary CRTC
45  *                 and zero or more video CRTC's to be mapped to one encoder?
46  *    connector:   dssdev.. manager can be attached/detached from different
47  *                 devices
48  */
49
50 static void omap_fb_output_poll_changed(struct drm_device *dev)
51 {
52         struct omap_drm_private *priv = dev->dev_private;
53         DBG("dev=%p", dev);
54         if (priv->fbdev)
55                 drm_fb_helper_hotplug_event(priv->fbdev);
56 }
57
58 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
59         .fb_create = omap_framebuffer_create,
60         .output_poll_changed = omap_fb_output_poll_changed,
61 };
62
63 static int get_connector_type(struct omap_dss_device *dssdev)
64 {
65         switch (dssdev->type) {
66         case OMAP_DISPLAY_TYPE_HDMI:
67                 return DRM_MODE_CONNECTOR_HDMIA;
68         case OMAP_DISPLAY_TYPE_DVI:
69                 return DRM_MODE_CONNECTOR_DVID;
70         default:
71                 return DRM_MODE_CONNECTOR_Unknown;
72         }
73 }
74
75 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
76 {
77         struct omap_drm_private *priv = dev->dev_private;
78         int i;
79
80         for (i = 0; i < priv->num_crtcs; i++) {
81                 struct drm_crtc *crtc = priv->crtcs[i];
82
83                 if (omap_crtc_channel(crtc) == channel)
84                         return true;
85         }
86
87         return false;
88 }
89 static void omap_disconnect_dssdevs(void)
90 {
91         struct omap_dss_device *dssdev = NULL;
92
93         for_each_dss_dev(dssdev)
94                 dssdev->driver->disconnect(dssdev);
95 }
96
97 static int omap_connect_dssdevs(void)
98 {
99         int r;
100         struct omap_dss_device *dssdev = NULL;
101         bool no_displays = true;
102
103         for_each_dss_dev(dssdev) {
104                 r = dssdev->driver->connect(dssdev);
105                 if (r == -EPROBE_DEFER) {
106                         omap_dss_put_device(dssdev);
107                         goto cleanup;
108                 } else if (r) {
109                         dev_warn(dssdev->dev, "could not connect display: %s\n",
110                                 dssdev->name);
111                 } else {
112                         no_displays = false;
113                 }
114         }
115
116         if (no_displays)
117                 return -EPROBE_DEFER;
118
119         return 0;
120
121 cleanup:
122         /*
123          * if we are deferring probe, we disconnect the devices we previously
124          * connected
125          */
126         omap_disconnect_dssdevs();
127
128         return r;
129 }
130
131 static int omap_modeset_create_crtc(struct drm_device *dev, int id,
132                                     enum omap_channel channel)
133 {
134         struct omap_drm_private *priv = dev->dev_private;
135         struct drm_plane *plane;
136         struct drm_crtc *crtc;
137
138         plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
139         if (IS_ERR(plane))
140                 return PTR_ERR(plane);
141
142         crtc = omap_crtc_init(dev, plane, channel, id);
143
144         BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
145         priv->crtcs[id] = crtc;
146         priv->num_crtcs++;
147
148         priv->planes[id] = plane;
149         priv->num_planes++;
150
151         return 0;
152 }
153
154 static int omap_modeset_init(struct drm_device *dev)
155 {
156         struct omap_drm_private *priv = dev->dev_private;
157         struct omap_dss_device *dssdev = NULL;
158         int num_ovls = dss_feat_get_num_ovls();
159         int num_mgrs = dss_feat_get_num_mgrs();
160         int num_crtcs;
161         int i, id = 0;
162         int ret;
163
164         drm_mode_config_init(dev);
165
166         omap_drm_irq_install(dev);
167
168         /*
169          * We usually don't want to create a CRTC for each manager, at least
170          * not until we have a way to expose private planes to userspace.
171          * Otherwise there would not be enough video pipes left for drm planes.
172          * We use the num_crtc argument to limit the number of crtcs we create.
173          */
174         num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
175
176         dssdev = NULL;
177
178         for_each_dss_dev(dssdev) {
179                 struct drm_connector *connector;
180                 struct drm_encoder *encoder;
181                 enum omap_channel channel;
182                 struct omap_overlay_manager *mgr;
183
184                 if (!omapdss_device_is_connected(dssdev))
185                         continue;
186
187                 encoder = omap_encoder_init(dev, dssdev);
188
189                 if (!encoder) {
190                         dev_err(dev->dev, "could not create encoder: %s\n",
191                                         dssdev->name);
192                         return -ENOMEM;
193                 }
194
195                 connector = omap_connector_init(dev,
196                                 get_connector_type(dssdev), dssdev, encoder);
197
198                 if (!connector) {
199                         dev_err(dev->dev, "could not create connector: %s\n",
200                                         dssdev->name);
201                         return -ENOMEM;
202                 }
203
204                 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
205                 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
206
207                 priv->encoders[priv->num_encoders++] = encoder;
208                 priv->connectors[priv->num_connectors++] = connector;
209
210                 drm_mode_connector_attach_encoder(connector, encoder);
211
212                 /*
213                  * if we have reached the limit of the crtcs we are allowed to
214                  * create, let's not try to look for a crtc for this
215                  * panel/encoder and onwards, we will, of course, populate the
216                  * the possible_crtcs field for all the encoders with the final
217                  * set of crtcs we create
218                  */
219                 if (id == num_crtcs)
220                         continue;
221
222                 /*
223                  * get the recommended DISPC channel for this encoder. For now,
224                  * we only try to get create a crtc out of the recommended, the
225                  * other possible channels to which the encoder can connect are
226                  * not considered.
227                  */
228
229                 mgr = omapdss_find_mgr_from_display(dssdev);
230                 channel = mgr->id;
231                 /*
232                  * if this channel hasn't already been taken by a previously
233                  * allocated crtc, we create a new crtc for it
234                  */
235                 if (!channel_used(dev, channel)) {
236                         ret = omap_modeset_create_crtc(dev, id, channel);
237                         if (ret < 0) {
238                                 dev_err(dev->dev,
239                                         "could not create CRTC (channel %u)\n",
240                                         channel);
241                                 return ret;
242                         }
243
244                         id++;
245                 }
246         }
247
248         /*
249          * we have allocated crtcs according to the need of the panels/encoders,
250          * adding more crtcs here if needed
251          */
252         for (; id < num_crtcs; id++) {
253
254                 /* find a free manager for this crtc */
255                 for (i = 0; i < num_mgrs; i++) {
256                         if (!channel_used(dev, i))
257                                 break;
258                 }
259
260                 if (i == num_mgrs) {
261                         /* this shouldn't really happen */
262                         dev_err(dev->dev, "no managers left for crtc\n");
263                         return -ENOMEM;
264                 }
265
266                 ret = omap_modeset_create_crtc(dev, id, i);
267                 if (ret < 0) {
268                         dev_err(dev->dev,
269                                 "could not create CRTC (channel %u)\n", i);
270                         return ret;
271                 }
272         }
273
274         /*
275          * Create normal planes for the remaining overlays:
276          */
277         for (; id < num_ovls; id++) {
278                 struct drm_plane *plane;
279
280                 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
281                 if (IS_ERR(plane))
282                         return PTR_ERR(plane);
283
284                 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
285                 priv->planes[priv->num_planes++] = plane;
286         }
287
288         for (i = 0; i < priv->num_encoders; i++) {
289                 struct drm_encoder *encoder = priv->encoders[i];
290                 struct omap_dss_device *dssdev =
291                                         omap_encoder_get_dssdev(encoder);
292                 struct omap_dss_device *output;
293
294                 output = omapdss_find_output_from_display(dssdev);
295
296                 /* figure out which crtc's we can connect the encoder to: */
297                 encoder->possible_crtcs = 0;
298                 for (id = 0; id < priv->num_crtcs; id++) {
299                         struct drm_crtc *crtc = priv->crtcs[id];
300                         enum omap_channel crtc_channel;
301
302                         crtc_channel = omap_crtc_channel(crtc);
303
304                         if (output->dispc_channel == crtc_channel) {
305                                 encoder->possible_crtcs |= (1 << id);
306                                 break;
307                         }
308                 }
309
310                 omap_dss_put_device(output);
311         }
312
313         DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
314                 priv->num_planes, priv->num_crtcs, priv->num_encoders,
315                 priv->num_connectors);
316
317         dev->mode_config.min_width = 32;
318         dev->mode_config.min_height = 32;
319
320         /* note: eventually will need some cpu_is_omapXYZ() type stuff here
321          * to fill in these limits properly on different OMAP generations..
322          */
323         dev->mode_config.max_width = 2048;
324         dev->mode_config.max_height = 2048;
325
326         dev->mode_config.funcs = &omap_mode_config_funcs;
327
328         return 0;
329 }
330
331 static void omap_modeset_free(struct drm_device *dev)
332 {
333         drm_mode_config_cleanup(dev);
334 }
335
336 /*
337  * drm ioctl funcs
338  */
339
340
341 static int ioctl_get_param(struct drm_device *dev, void *data,
342                 struct drm_file *file_priv)
343 {
344         struct omap_drm_private *priv = dev->dev_private;
345         struct drm_omap_param *args = data;
346
347         DBG("%p: param=%llu", dev, args->param);
348
349         switch (args->param) {
350         case OMAP_PARAM_CHIPSET_ID:
351                 args->value = priv->omaprev;
352                 break;
353         default:
354                 DBG("unknown parameter %lld", args->param);
355                 return -EINVAL;
356         }
357
358         return 0;
359 }
360
361 static int ioctl_set_param(struct drm_device *dev, void *data,
362                 struct drm_file *file_priv)
363 {
364         struct drm_omap_param *args = data;
365
366         switch (args->param) {
367         default:
368                 DBG("unknown parameter %lld", args->param);
369                 return -EINVAL;
370         }
371
372         return 0;
373 }
374
375 static int ioctl_gem_new(struct drm_device *dev, void *data,
376                 struct drm_file *file_priv)
377 {
378         struct drm_omap_gem_new *args = data;
379         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
380                         args->size.bytes, args->flags);
381         return omap_gem_new_handle(dev, file_priv, args->size,
382                         args->flags, &args->handle);
383 }
384
385 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
386                 struct drm_file *file_priv)
387 {
388         struct drm_omap_gem_cpu_prep *args = data;
389         struct drm_gem_object *obj;
390         int ret;
391
392         VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
393
394         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
395         if (!obj)
396                 return -ENOENT;
397
398         ret = omap_gem_op_sync(obj, args->op);
399
400         if (!ret)
401                 ret = omap_gem_op_start(obj, args->op);
402
403         drm_gem_object_unreference_unlocked(obj);
404
405         return ret;
406 }
407
408 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
409                 struct drm_file *file_priv)
410 {
411         struct drm_omap_gem_cpu_fini *args = data;
412         struct drm_gem_object *obj;
413         int ret;
414
415         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
416
417         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
418         if (!obj)
419                 return -ENOENT;
420
421         /* XXX flushy, flushy */
422         ret = 0;
423
424         if (!ret)
425                 ret = omap_gem_op_finish(obj, args->op);
426
427         drm_gem_object_unreference_unlocked(obj);
428
429         return ret;
430 }
431
432 static int ioctl_gem_info(struct drm_device *dev, void *data,
433                 struct drm_file *file_priv)
434 {
435         struct drm_omap_gem_info *args = data;
436         struct drm_gem_object *obj;
437         int ret = 0;
438
439         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
440
441         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
442         if (!obj)
443                 return -ENOENT;
444
445         args->size = omap_gem_mmap_size(obj);
446         args->offset = omap_gem_mmap_offset(obj);
447
448         drm_gem_object_unreference_unlocked(obj);
449
450         return ret;
451 }
452
453 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
454         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
455         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
456         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
457         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
458         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
459         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
460 };
461
462 /*
463  * drm driver funcs
464  */
465
466 /**
467  * load - setup chip and create an initial config
468  * @dev: DRM device
469  * @flags: startup flags
470  *
471  * The driver load routine has to do several things:
472  *   - initialize the memory manager
473  *   - allocate initial config memory
474  *   - setup the DRM framebuffer with the allocated memory
475  */
476 static int dev_load(struct drm_device *dev, unsigned long flags)
477 {
478         struct omap_drm_platform_data *pdata = dev->dev->platform_data;
479         struct omap_drm_private *priv;
480         int ret;
481
482         DBG("load: dev=%p", dev);
483
484         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
485         if (!priv)
486                 return -ENOMEM;
487
488         priv->omaprev = pdata->omaprev;
489
490         dev->dev_private = priv;
491
492         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
493
494         spin_lock_init(&priv->list_lock);
495         INIT_LIST_HEAD(&priv->obj_list);
496
497         omap_gem_init(dev);
498
499         ret = omap_modeset_init(dev);
500         if (ret) {
501                 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
502                 dev->dev_private = NULL;
503                 kfree(priv);
504                 return ret;
505         }
506
507         ret = drm_vblank_init(dev, priv->num_crtcs);
508         if (ret)
509                 dev_warn(dev->dev, "could not init vblank\n");
510
511         priv->fbdev = omap_fbdev_init(dev);
512         if (!priv->fbdev) {
513                 dev_warn(dev->dev, "omap_fbdev_init failed\n");
514                 /* well, limp along without an fbdev.. maybe X11 will work? */
515         }
516
517         /* store off drm_device for use in pm ops */
518         dev_set_drvdata(dev->dev, dev);
519
520         drm_kms_helper_poll_init(dev);
521
522         return 0;
523 }
524
525 static int dev_unload(struct drm_device *dev)
526 {
527         struct omap_drm_private *priv = dev->dev_private;
528         int i;
529
530         DBG("unload: dev=%p", dev);
531
532         drm_kms_helper_poll_fini(dev);
533
534         if (priv->fbdev)
535                 omap_fbdev_free(dev);
536
537         /* flush crtcs so the fbs get released */
538         for (i = 0; i < priv->num_crtcs; i++)
539                 omap_crtc_flush(priv->crtcs[i]);
540
541         omap_modeset_free(dev);
542         omap_gem_deinit(dev);
543
544         destroy_workqueue(priv->wq);
545
546         drm_vblank_cleanup(dev);
547         omap_drm_irq_uninstall(dev);
548
549         kfree(dev->dev_private);
550         dev->dev_private = NULL;
551
552         dev_set_drvdata(dev->dev, NULL);
553
554         return 0;
555 }
556
557 static int dev_open(struct drm_device *dev, struct drm_file *file)
558 {
559         file->driver_priv = NULL;
560
561         DBG("open: dev=%p, file=%p", dev, file);
562
563         return 0;
564 }
565
566 /**
567  * lastclose - clean up after all DRM clients have exited
568  * @dev: DRM device
569  *
570  * Take care of cleaning up after all DRM clients have exited.  In the
571  * mode setting case, we want to restore the kernel's initial mode (just
572  * in case the last client left us in a bad state).
573  */
574 static void dev_lastclose(struct drm_device *dev)
575 {
576         int i;
577
578         /* we don't support vga-switcheroo.. so just make sure the fbdev
579          * mode is active
580          */
581         struct omap_drm_private *priv = dev->dev_private;
582         int ret;
583
584         DBG("lastclose: dev=%p", dev);
585
586         if (priv->rotation_prop) {
587                 /* need to restore default rotation state.. not sure
588                  * if there is a cleaner way to restore properties to
589                  * default state?  Maybe a flag that properties should
590                  * automatically be restored to default state on
591                  * lastclose?
592                  */
593                 for (i = 0; i < priv->num_crtcs; i++) {
594                         drm_object_property_set_value(&priv->crtcs[i]->base,
595                                         priv->rotation_prop, 0);
596                 }
597
598                 for (i = 0; i < priv->num_planes; i++) {
599                         drm_object_property_set_value(&priv->planes[i]->base,
600                                         priv->rotation_prop, 0);
601                 }
602         }
603
604         if (priv->fbdev) {
605                 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
606                 if (ret)
607                         DBG("failed to restore crtc mode");
608         }
609 }
610
611 static void dev_preclose(struct drm_device *dev, struct drm_file *file)
612 {
613         DBG("preclose: dev=%p", dev);
614 }
615
616 static void dev_postclose(struct drm_device *dev, struct drm_file *file)
617 {
618         DBG("postclose: dev=%p, file=%p", dev, file);
619 }
620
621 static const struct vm_operations_struct omap_gem_vm_ops = {
622         .fault = omap_gem_fault,
623         .open = drm_gem_vm_open,
624         .close = drm_gem_vm_close,
625 };
626
627 static const struct file_operations omapdriver_fops = {
628         .owner = THIS_MODULE,
629         .open = drm_open,
630         .unlocked_ioctl = drm_ioctl,
631         .release = drm_release,
632         .mmap = omap_gem_mmap,
633         .poll = drm_poll,
634         .read = drm_read,
635         .llseek = noop_llseek,
636 };
637
638 static struct drm_driver omap_drm_driver = {
639         .driver_features = DRIVER_HAVE_IRQ | DRIVER_MODESET | DRIVER_GEM
640                          | DRIVER_PRIME,
641         .load = dev_load,
642         .unload = dev_unload,
643         .open = dev_open,
644         .lastclose = dev_lastclose,
645         .preclose = dev_preclose,
646         .postclose = dev_postclose,
647         .set_busid = drm_platform_set_busid,
648         .get_vblank_counter = drm_vblank_count,
649         .enable_vblank = omap_irq_enable_vblank,
650         .disable_vblank = omap_irq_disable_vblank,
651         .irq_preinstall = omap_irq_preinstall,
652         .irq_postinstall = omap_irq_postinstall,
653         .irq_uninstall = omap_irq_uninstall,
654         .irq_handler = omap_irq_handler,
655 #ifdef CONFIG_DEBUG_FS
656         .debugfs_init = omap_debugfs_init,
657         .debugfs_cleanup = omap_debugfs_cleanup,
658 #endif
659         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
660         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
661         .gem_prime_export = omap_gem_prime_export,
662         .gem_prime_import = omap_gem_prime_import,
663         .gem_free_object = omap_gem_free_object,
664         .gem_vm_ops = &omap_gem_vm_ops,
665         .dumb_create = omap_gem_dumb_create,
666         .dumb_map_offset = omap_gem_dumb_map_offset,
667         .dumb_destroy = drm_gem_dumb_destroy,
668         .ioctls = ioctls,
669         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
670         .fops = &omapdriver_fops,
671         .name = DRIVER_NAME,
672         .desc = DRIVER_DESC,
673         .date = DRIVER_DATE,
674         .major = DRIVER_MAJOR,
675         .minor = DRIVER_MINOR,
676         .patchlevel = DRIVER_PATCHLEVEL,
677 };
678
679 static int pdev_probe(struct platform_device *device)
680 {
681         int r;
682
683         if (omapdss_is_initialized() == false)
684                 return -EPROBE_DEFER;
685
686         omap_crtc_pre_init();
687
688         r = omap_connect_dssdevs();
689         if (r) {
690                 omap_crtc_pre_uninit();
691                 return r;
692         }
693
694         DBG("%s", device->name);
695         return drm_platform_init(&omap_drm_driver, device);
696 }
697
698 static int pdev_remove(struct platform_device *device)
699 {
700         DBG("");
701
702         drm_put_dev(platform_get_drvdata(device));
703
704         omap_disconnect_dssdevs();
705         omap_crtc_pre_uninit();
706
707         return 0;
708 }
709
710 #ifdef CONFIG_PM_SLEEP
711 static int omap_drm_suspend(struct device *dev)
712 {
713         struct drm_device *drm_dev = dev_get_drvdata(dev);
714
715         drm_kms_helper_poll_disable(drm_dev);
716
717         return 0;
718 }
719
720 static int omap_drm_resume(struct device *dev)
721 {
722         struct drm_device *drm_dev = dev_get_drvdata(dev);
723
724         drm_kms_helper_poll_enable(drm_dev);
725
726         return omap_gem_resume(dev);
727 }
728 #endif
729
730 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
731
732 static struct platform_driver pdev = {
733         .driver = {
734                 .name = DRIVER_NAME,
735                 .pm = &omapdrm_pm_ops,
736         },
737         .probe = pdev_probe,
738         .remove = pdev_remove,
739 };
740
741 static int __init omap_drm_init(void)
742 {
743         int r;
744
745         DBG("init");
746
747         r = platform_driver_register(&omap_dmm_driver);
748         if (r) {
749                 pr_err("DMM driver registration failed\n");
750                 return r;
751         }
752
753         r = platform_driver_register(&pdev);
754         if (r) {
755                 pr_err("omapdrm driver registration failed\n");
756                 platform_driver_unregister(&omap_dmm_driver);
757                 return r;
758         }
759
760         return 0;
761 }
762
763 static void __exit omap_drm_fini(void)
764 {
765         DBG("fini");
766
767         platform_driver_unregister(&pdev);
768
769         platform_driver_unregister(&omap_dmm_driver);
770 }
771
772 /* need late_initcall() so we load after dss_driver's are loaded */
773 late_initcall(omap_drm_init);
774 module_exit(omap_drm_fini);
775
776 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
777 MODULE_DESCRIPTION("OMAP DRM Display Driver");
778 MODULE_ALIAS("platform:" DRIVER_NAME);
779 MODULE_LICENSE("GPL v2");