1 #ifndef __NVKM_FBRAM_FUC_H__
2 #define __NVKM_FBRAM_FUC_H__
4 #include <subdev/pmu.h>
7 struct nvkm_memx *memx;
16 u32 stride; /* in bytes */
21 static inline struct ramfuc_reg
22 ramfuc_stride(u32 addr, u32 stride, u32 mask)
24 return (struct ramfuc_reg) {
33 static inline struct ramfuc_reg
34 ramfuc_reg2(u32 addr1, u32 addr2)
36 return (struct ramfuc_reg) {
39 .stride = addr2 - addr1,
45 static noinline struct ramfuc_reg
48 return (struct ramfuc_reg) {
58 ramfuc_init(struct ramfuc *ram, struct nvkm_fb *fb)
60 int ret = nvkm_memx_init(fb->subdev.device->pmu, &ram->memx);
70 ramfuc_exec(struct ramfuc *ram, bool exec)
74 ret = nvkm_memx_fini(&ram->memx, exec);
81 ramfuc_rd32(struct ramfuc *ram, struct ramfuc_reg *reg)
83 struct nvkm_device *device = ram->fb->subdev.device;
84 if (reg->sequence != ram->sequence)
85 reg->data = nvkm_rd32(device, reg->addr);
90 ramfuc_wr32(struct ramfuc *ram, struct ramfuc_reg *reg, u32 data)
92 unsigned int mask, off = 0;
94 reg->sequence = ram->sequence;
97 for (mask = reg->mask; mask > 0; mask = (mask & ~1) >> 1) {
99 nvkm_memx_wr32(ram->memx, reg->addr+off, reg->data);
105 ramfuc_nuke(struct ramfuc *ram, struct ramfuc_reg *reg)
111 ramfuc_mask(struct ramfuc *ram, struct ramfuc_reg *reg, u32 mask, u32 data)
113 u32 temp = ramfuc_rd32(ram, reg);
114 if (temp != ((temp & ~mask) | data) || reg->force) {
115 ramfuc_wr32(ram, reg, (temp & ~mask) | data);
122 ramfuc_wait(struct ramfuc *ram, u32 addr, u32 mask, u32 data, u32 nsec)
124 nvkm_memx_wait(ram->memx, addr, mask, data, nsec);
128 ramfuc_nsec(struct ramfuc *ram, u32 nsec)
130 nvkm_memx_nsec(ram->memx, nsec);
134 ramfuc_wait_vblank(struct ramfuc *ram)
136 nvkm_memx_wait_vblank(ram->memx);
140 ramfuc_train(struct ramfuc *ram)
142 nvkm_memx_train(ram->memx);
146 ramfuc_train_result(struct nvkm_fb *fb, u32 *result, u32 rsize)
148 return nvkm_memx_train_result(fb->subdev.device->pmu, result, rsize);
152 ramfuc_block(struct ramfuc *ram)
154 nvkm_memx_block(ram->memx);
158 ramfuc_unblock(struct ramfuc *ram)
160 nvkm_memx_unblock(ram->memx);
163 #define ram_init(s,p) ramfuc_init(&(s)->base, (p))
164 #define ram_exec(s,e) ramfuc_exec(&(s)->base, (e))
165 #define ram_have(s,r) ((s)->r_##r.addr != 0x000000)
166 #define ram_rd32(s,r) ramfuc_rd32(&(s)->base, &(s)->r_##r)
167 #define ram_wr32(s,r,d) ramfuc_wr32(&(s)->base, &(s)->r_##r, (d))
168 #define ram_nuke(s,r) ramfuc_nuke(&(s)->base, &(s)->r_##r)
169 #define ram_mask(s,r,m,d) ramfuc_mask(&(s)->base, &(s)->r_##r, (m), (d))
170 #define ram_wait(s,r,m,d,n) ramfuc_wait(&(s)->base, (r), (m), (d), (n))
171 #define ram_nsec(s,n) ramfuc_nsec(&(s)->base, (n))
172 #define ram_wait_vblank(s) ramfuc_wait_vblank(&(s)->base)
173 #define ram_train(s) ramfuc_train(&(s)->base)
174 #define ram_train_result(s,r,l) ramfuc_train_result((s), (r), (l))
175 #define ram_block(s) ramfuc_block(&(s)->base)
176 #define ram_unblock(s) ramfuc_unblock(&(s)->base)