kernel/drivers/gpu/drm/nouveau/nvkm/engine/pm/gk104.c

   1 /*
   2  * Copyright 2013 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "gf100.h"
  25
  26 static const struct nvkm_specdom
  27 gk104_pm_hub[] = {
  28         { 0x60, (const struct nvkm_specsig[]) {
  29                         { 0x47, "hub00_user_0" },
  30                         {}
  31                 }, &gf100_perfctr_func },
  32         { 0x40, (const struct nvkm_specsig[]) {
  33                         { 0x27, "hub01_user_0" },
  34                         {}
  35                 }, &gf100_perfctr_func },
  36         { 0x60, (const struct nvkm_specsig[]) {
  37                         { 0x47, "hub02_user_0" },
  38                         {}
  39                 }, &gf100_perfctr_func },
  40         { 0x60, (const struct nvkm_specsig[]) {
  41                         { 0x47, "hub03_user_0" },
  42                         {}
  43                 }, &gf100_perfctr_func },
  44         { 0x40, (const struct nvkm_specsig[]) {
  45                         { 0x03, "host_mmio_rd" },
  46                         { 0x27, "hub04_user_0" },
  47                         {}
  48                 }, &gf100_perfctr_func },
  49         { 0x60, (const struct nvkm_specsig[]) {
  50                         { 0x47, "hub05_user_0" },
  51                         {}
  52                 }, &gf100_perfctr_func },
  53         { 0xc0, (const struct nvkm_specsig[]) {
  54                         { 0x74, "host_fb_rd3x" },
  55                         { 0x75, "host_fb_rd3x_2" },
  56                         { 0xa7, "hub06_user_0" },
  57                         {}
  58                 }, &gf100_perfctr_func },
  59         { 0x60, (const struct nvkm_specsig[]) {
  60                         { 0x47, "hub07_user_0" },
  61                         {}
  62                 }, &gf100_perfctr_func },
  63         {}
  64 };
  65
  66 static const struct nvkm_specdom
  67 gk104_pm_gpc[] = {
  68         { 0xe0, (const struct nvkm_specsig[]) {
  69                         { 0xc7, "gpc00_user_0" },
  70                         {}
  71                 }, &gf100_perfctr_func },
  72         {}
  73 };
  74
  75 static const struct nvkm_specdom
  76 gk104_pm_part[] = {
  77         { 0x60, (const struct nvkm_specsig[]) {
  78                         { 0x47, "part00_user_0" },
  79                         {}
  80                 }, &gf100_perfctr_func },
  81         { 0x60, (const struct nvkm_specsig[]) {
  82                         { 0x47, "part01_user_0" },
  83                         {}
  84                 }, &gf100_perfctr_func },
  85         {}
  86 };
  87
  88 static int
  89 gk104_pm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
  90               struct nvkm_oclass *oclass, void *data, u32 size,
  91               struct nvkm_object **pobject)
  92 {
  93         struct gf100_pm_priv *priv;
  94         u32 mask;
  95         int ret;
  96
  97         ret = nvkm_pm_create(parent, engine, oclass, &priv);
  98         *pobject = nv_object(priv);
  99         if (ret)
 100                 return ret;
 101
 102         /* PDAEMON */
 103         ret = nvkm_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0, gk104_pm_pwr);
 104         if (ret)
 105                 return ret;
 106
 107         /* HUB */
 108         ret = nvkm_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200,
 109                                gk104_pm_hub);
 110         if (ret)
 111                 return ret;
 112
 113         /* GPC */
 114         mask  = (1 << nv_rd32(priv, 0x022430)) - 1;
 115         mask &= ~nv_rd32(priv, 0x022504);
 116         mask &= ~nv_rd32(priv, 0x022584);
 117
 118         ret = nvkm_perfdom_new(&priv->base, "gpc", mask, 0x180000,
 119                                0x1000, 0x200, gk104_pm_gpc);
 120         if (ret)
 121                 return ret;
 122
 123         /* PART */
 124         mask  = (1 << nv_rd32(priv, 0x022438)) - 1;
 125         mask &= ~nv_rd32(priv, 0x022548);
 126         mask &= ~nv_rd32(priv, 0x0225c8);
 127
 128         ret = nvkm_perfdom_new(&priv->base, "part", mask, 0x1a0000,
 129                                0x1000, 0x200, gk104_pm_part);
 130         if (ret)
 131                 return ret;
 132
 133         nv_engine(priv)->cclass = &nvkm_pm_cclass;
 134         nv_engine(priv)->sclass =  nvkm_pm_sclass;
 135         priv->base.last = 7;
 136         return 0;
 137 }
 138
 139 struct nvkm_oclass
 140 gk104_pm_oclass = {
 141         .handle = NV_ENGINE(PM, 0xe0),
 142         .ofuncs = &(struct nvkm_ofuncs) {
 143                 .ctor = gk104_pm_ctor,
 144                 .dtor = _nvkm_pm_dtor,
 145                 .init = _nvkm_pm_init,
 146                 .fini = gf100_pm_fini,
 147         },
 148 };