2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
24 #include <engine/mpeg.h>
26 #include <subdev/bar.h>
27 #include <subdev/timer.h>
29 struct nv50_mpeg_priv {
30 struct nvkm_mpeg base;
33 struct nv50_mpeg_chan {
34 struct nvkm_mpeg_chan base;
37 /*******************************************************************************
39 ******************************************************************************/
42 nv50_mpeg_object_ctor(struct nvkm_object *parent,
43 struct nvkm_object *engine,
44 struct nvkm_oclass *oclass, void *data, u32 size,
45 struct nvkm_object **pobject)
47 struct nvkm_gpuobj *obj;
50 ret = nvkm_gpuobj_create(parent, engine, oclass, 0, parent,
52 *pobject = nv_object(obj);
56 nv_wo32(obj, 0x00, nv_mclass(obj));
57 nv_wo32(obj, 0x04, 0x00000000);
58 nv_wo32(obj, 0x08, 0x00000000);
59 nv_wo32(obj, 0x0c, 0x00000000);
65 .ctor = nv50_mpeg_object_ctor,
66 .dtor = _nvkm_gpuobj_dtor,
67 .init = _nvkm_gpuobj_init,
68 .fini = _nvkm_gpuobj_fini,
69 .rd32 = _nvkm_gpuobj_rd32,
70 .wr32 = _nvkm_gpuobj_wr32,
73 static struct nvkm_oclass
74 nv50_mpeg_sclass[] = {
75 { 0x3174, &nv50_mpeg_ofuncs },
79 /*******************************************************************************
81 ******************************************************************************/
84 nv50_mpeg_context_ctor(struct nvkm_object *parent,
85 struct nvkm_object *engine,
86 struct nvkm_oclass *oclass, void *data, u32 size,
87 struct nvkm_object **pobject)
89 struct nvkm_bar *bar = nvkm_bar(parent);
90 struct nv50_mpeg_chan *chan;
93 ret = nvkm_mpeg_context_create(parent, engine, oclass, NULL, 128 * 4,
94 0, NVOBJ_FLAG_ZERO_ALLOC, &chan);
95 *pobject = nv_object(chan);
99 nv_wo32(chan, 0x0070, 0x00801ec1);
100 nv_wo32(chan, 0x007c, 0x0000037c);
105 static struct nvkm_oclass
107 .handle = NV_ENGCTX(MPEG, 0x50),
108 .ofuncs = &(struct nvkm_ofuncs) {
109 .ctor = nv50_mpeg_context_ctor,
110 .dtor = _nvkm_mpeg_context_dtor,
111 .init = _nvkm_mpeg_context_init,
112 .fini = _nvkm_mpeg_context_fini,
113 .rd32 = _nvkm_mpeg_context_rd32,
114 .wr32 = _nvkm_mpeg_context_wr32,
118 /*******************************************************************************
119 * PMPEG engine/subdev functions
120 ******************************************************************************/
123 nv50_mpeg_intr(struct nvkm_subdev *subdev)
125 struct nv50_mpeg_priv *priv = (void *)subdev;
126 u32 stat = nv_rd32(priv, 0x00b100);
127 u32 type = nv_rd32(priv, 0x00b230);
128 u32 mthd = nv_rd32(priv, 0x00b234);
129 u32 data = nv_rd32(priv, 0x00b238);
132 if (stat & 0x01000000) {
133 /* happens on initial binding of the object */
134 if (type == 0x00000020 && mthd == 0x0000) {
135 nv_wr32(priv, 0x00b308, 0x00000100);
141 nv_info(priv, "0x%08x 0x%08x 0x%08x 0x%08x\n",
142 stat, type, mthd, data);
145 nv_wr32(priv, 0x00b100, stat);
146 nv_wr32(priv, 0x00b230, 0x00000001);
150 nv50_vpe_intr(struct nvkm_subdev *subdev)
152 struct nv50_mpeg_priv *priv = (void *)subdev;
154 if (nv_rd32(priv, 0x00b100))
155 nv50_mpeg_intr(subdev);
157 if (nv_rd32(priv, 0x00b800)) {
158 u32 stat = nv_rd32(priv, 0x00b800);
159 nv_info(priv, "PMSRCH: 0x%08x\n", stat);
160 nv_wr32(priv, 0xb800, stat);
165 nv50_mpeg_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
166 struct nvkm_oclass *oclass, void *data, u32 size,
167 struct nvkm_object **pobject)
169 struct nv50_mpeg_priv *priv;
172 ret = nvkm_mpeg_create(parent, engine, oclass, &priv);
173 *pobject = nv_object(priv);
177 nv_subdev(priv)->unit = 0x00400002;
178 nv_subdev(priv)->intr = nv50_vpe_intr;
179 nv_engine(priv)->cclass = &nv50_mpeg_cclass;
180 nv_engine(priv)->sclass = nv50_mpeg_sclass;
185 nv50_mpeg_init(struct nvkm_object *object)
187 struct nv50_mpeg_priv *priv = (void *)object;
190 ret = nvkm_mpeg_init(&priv->base);
194 nv_wr32(priv, 0x00b32c, 0x00000000);
195 nv_wr32(priv, 0x00b314, 0x00000100);
196 nv_wr32(priv, 0x00b0e0, 0x0000001a);
198 nv_wr32(priv, 0x00b220, 0x00000044);
199 nv_wr32(priv, 0x00b300, 0x00801ec1);
200 nv_wr32(priv, 0x00b390, 0x00000000);
201 nv_wr32(priv, 0x00b394, 0x00000000);
202 nv_wr32(priv, 0x00b398, 0x00000000);
203 nv_mask(priv, 0x00b32c, 0x00000001, 0x00000001);
205 nv_wr32(priv, 0x00b100, 0xffffffff);
206 nv_wr32(priv, 0x00b140, 0xffffffff);
208 if (!nv_wait(priv, 0x00b200, 0x00000001, 0x00000000)) {
209 nv_error(priv, "timeout 0x%08x\n", nv_rd32(priv, 0x00b200));
218 .handle = NV_ENGINE(MPEG, 0x50),
219 .ofuncs = &(struct nvkm_ofuncs) {
220 .ctor = nv50_mpeg_ctor,
221 .dtor = _nvkm_mpeg_dtor,
222 .init = nv50_mpeg_init,
223 .fini = _nvkm_mpeg_fini,