kernel/drivers/gpu/drm/i915/intel_dvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  */
  27 #include <linux/i2c.h>
  28 #include <linux/slab.h>
  29 #include <drm/drmP.h>
  30 #include <drm/drm_atomic_helper.h>
  31 #include <drm/drm_crtc.h>
  32 #include "intel_drv.h"
  33 #include <drm/i915_drm.h>
  34 #include "i915_drv.h"
  35 #include "dvo.h"
  36
  37 #define SIL164_ADDR     0x38
  38 #define CH7xxx_ADDR     0x76
  39 #define TFP410_ADDR     0x38
  40 #define NS2501_ADDR     0x38
  41
  42 static const struct intel_dvo_device intel_dvo_devices[] = {
  43         {
  44                 .type = INTEL_DVO_CHIP_TMDS,
  45                 .name = "sil164",
  46                 .dvo_reg = DVOC,
  47                 .slave_addr = SIL164_ADDR,
  48                 .dev_ops = &sil164_ops,
  49         },
  50         {
  51                 .type = INTEL_DVO_CHIP_TMDS,
  52                 .name = "ch7xxx",
  53                 .dvo_reg = DVOC,
  54                 .slave_addr = CH7xxx_ADDR,
  55                 .dev_ops = &ch7xxx_ops,
  56         },
  57         {
  58                 .type = INTEL_DVO_CHIP_TMDS,
  59                 .name = "ch7xxx",
  60                 .dvo_reg = DVOC,
  61                 .slave_addr = 0x75, /* For some ch7010 */
  62                 .dev_ops = &ch7xxx_ops,
  63         },
  64         {
  65                 .type = INTEL_DVO_CHIP_LVDS,
  66                 .name = "ivch",
  67                 .dvo_reg = DVOA,
  68                 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  69                 .dev_ops = &ivch_ops,
  70         },
  71         {
  72                 .type = INTEL_DVO_CHIP_TMDS,
  73                 .name = "tfp410",
  74                 .dvo_reg = DVOC,
  75                 .slave_addr = TFP410_ADDR,
  76                 .dev_ops = &tfp410_ops,
  77         },
  78         {
  79                 .type = INTEL_DVO_CHIP_LVDS,
  80                 .name = "ch7017",
  81                 .dvo_reg = DVOC,
  82                 .slave_addr = 0x75,
  83                 .gpio = GMBUS_PIN_DPB,
  84                 .dev_ops = &ch7017_ops,
  85         },
  86         {
  87                 .type = INTEL_DVO_CHIP_TMDS,
  88                 .name = "ns2501",
  89                 .dvo_reg = DVOB,
  90                 .slave_addr = NS2501_ADDR,
  91                 .dev_ops = &ns2501_ops,
  92        }
  93 };
  94
  95 struct intel_dvo {
  96         struct intel_encoder base;
  97
  98         struct intel_dvo_device dev;
  99
 100         struct intel_connector *attached_connector;
 101
 102         bool panel_wants_dither;
 103 };
 104
 105 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
 106 {
 107         return container_of(encoder, struct intel_dvo, base);
 108 }
 109
 110 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
 111 {
 112         return enc_to_dvo(intel_attached_encoder(connector));
 113 }
 114
 115 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
 116 {
 117         struct drm_device *dev = connector->base.dev;
 118         struct drm_i915_private *dev_priv = dev->dev_private;
 119         struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
 120         u32 tmp;
 121
 122         tmp = I915_READ(intel_dvo->dev.dvo_reg);
 123
 124         if (!(tmp & DVO_ENABLE))
 125                 return false;
 126
 127         return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
 128 }
 129
 130 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
 131                                    enum pipe *pipe)
 132 {
 133         struct drm_device *dev = encoder->base.dev;
 134         struct drm_i915_private *dev_priv = dev->dev_private;
 135         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 136         u32 tmp;
 137
 138         tmp = I915_READ(intel_dvo->dev.dvo_reg);
 139
 140         if (!(tmp & DVO_ENABLE))
 141                 return false;
 142
 143         *pipe = PORT_TO_PIPE(tmp);
 144
 145         return true;
 146 }
 147
 148 static void intel_dvo_get_config(struct intel_encoder *encoder,
 149                                  struct intel_crtc_state *pipe_config)
 150 {
 151         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
 152         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 153         u32 tmp, flags = 0;
 154
 155         tmp = I915_READ(intel_dvo->dev.dvo_reg);
 156         if (tmp & DVO_HSYNC_ACTIVE_HIGH)
 157                 flags |= DRM_MODE_FLAG_PHSYNC;
 158         else
 159                 flags |= DRM_MODE_FLAG_NHSYNC;
 160         if (tmp & DVO_VSYNC_ACTIVE_HIGH)
 161                 flags |= DRM_MODE_FLAG_PVSYNC;
 162         else
 163                 flags |= DRM_MODE_FLAG_NVSYNC;
 164
 165         pipe_config->base.adjusted_mode.flags |= flags;
 166
 167         pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
 168 }
 169
 170 static void intel_disable_dvo(struct intel_encoder *encoder)
 171 {
 172         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
 173         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 174         u32 dvo_reg = intel_dvo->dev.dvo_reg;
 175         u32 temp = I915_READ(dvo_reg);
 176
 177         intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
 178         I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
 179         I915_READ(dvo_reg);
 180 }
 181
 182 static void intel_enable_dvo(struct intel_encoder *encoder)
 183 {
 184         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
 185         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 186         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 187         u32 dvo_reg = intel_dvo->dev.dvo_reg;
 188         u32 temp = I915_READ(dvo_reg);
 189
 190         intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
 191                                          &crtc->config->base.mode,
 192                                          &crtc->config->base.adjusted_mode);
 193
 194         I915_WRITE(dvo_reg, temp | DVO_ENABLE);
 195         I915_READ(dvo_reg);
 196
 197         intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
 198 }
 199
 200 static enum drm_mode_status
 201 intel_dvo_mode_valid(struct drm_connector *connector,
 202                      struct drm_display_mode *mode)
 203 {
 204         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 205         const struct drm_display_mode *fixed_mode =
 206                 to_intel_connector(connector)->panel.fixed_mode;
 207         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 208         int target_clock = mode->clock;
 209
 210         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 211                 return MODE_NO_DBLESCAN;
 212
 213         /* XXX: Validate clock range */
 214
 215         if (fixed_mode) {
 216                 if (mode->hdisplay > fixed_mode->hdisplay)
 217                         return MODE_PANEL;
 218                 if (mode->vdisplay > fixed_mode->vdisplay)
 219                         return MODE_PANEL;
 220
 221                 target_clock = fixed_mode->clock;
 222         }
 223
 224         if (target_clock > max_dotclk)
 225                 return MODE_CLOCK_HIGH;
 226
 227         return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
 228 }
 229
 230 static bool intel_dvo_compute_config(struct intel_encoder *encoder,
 231                                      struct intel_crtc_state *pipe_config)
 232 {
 233         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 234         const struct drm_display_mode *fixed_mode =
 235                 intel_dvo->attached_connector->panel.fixed_mode;
 236         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 237
 238         /* If we have timings from the BIOS for the panel, put them in
 239          * to the adjusted mode.  The CRTC will be set up for this mode,
 240          * with the panel scaling set up to source from the H/VDisplay
 241          * of the original mode.
 242          */
 243         if (fixed_mode)
 244                 intel_fixed_panel_mode(fixed_mode, adjusted_mode);
 245
 246         return true;
 247 }
 248
 249 static void intel_dvo_pre_enable(struct intel_encoder *encoder)
 250 {
 251         struct drm_device *dev = encoder->base.dev;
 252         struct drm_i915_private *dev_priv = dev->dev_private;
 253         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 254         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 255         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 256         int pipe = crtc->pipe;
 257         u32 dvo_val;
 258         u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
 259
 260         switch (dvo_reg) {
 261         case DVOA:
 262         default:
 263                 dvo_srcdim_reg = DVOA_SRCDIM;
 264                 break;
 265         case DVOB:
 266                 dvo_srcdim_reg = DVOB_SRCDIM;
 267                 break;
 268         case DVOC:
 269                 dvo_srcdim_reg = DVOC_SRCDIM;
 270                 break;
 271         }
 272
 273         /* Save the data order, since I don't know what it should be set to. */
 274         dvo_val = I915_READ(dvo_reg) &
 275                   (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
 276         dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
 277                    DVO_BLANK_ACTIVE_HIGH;
 278
 279         if (pipe == 1)
 280                 dvo_val |= DVO_PIPE_B_SELECT;
 281         dvo_val |= DVO_PIPE_STALL;
 282         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 283                 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
 284         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 285                 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
 286
 287         /*I915_WRITE(DVOB_SRCDIM,
 288           (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 289           (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
 290         I915_WRITE(dvo_srcdim_reg,
 291                    (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 292                    (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
 293         /*I915_WRITE(DVOB, dvo_val);*/
 294         I915_WRITE(dvo_reg, dvo_val);
 295 }
 296
 297 /**
 298  * Detect the output connection on our DVO device.
 299  *
 300  * Unimplemented.
 301  */
 302 static enum drm_connector_status
 303 intel_dvo_detect(struct drm_connector *connector, bool force)
 304 {
 305         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 306         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 307                       connector->base.id, connector->name);
 308         return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
 309 }
 310
 311 static int intel_dvo_get_modes(struct drm_connector *connector)
 312 {
 313         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 314         const struct drm_display_mode *fixed_mode =
 315                 to_intel_connector(connector)->panel.fixed_mode;
 316
 317         /* We should probably have an i2c driver get_modes function for those
 318          * devices which will have a fixed set of modes determined by the chip
 319          * (TV-out, for example), but for now with just TMDS and LVDS,
 320          * that's not the case.
 321          */
 322         intel_ddc_get_modes(connector,
 323                             intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
 324         if (!list_empty(&connector->probed_modes))
 325                 return 1;
 326
 327         if (fixed_mode) {
 328                 struct drm_display_mode *mode;
 329                 mode = drm_mode_duplicate(connector->dev, fixed_mode);
 330                 if (mode) {
 331                         drm_mode_probed_add(connector, mode);
 332                         return 1;
 333                 }
 334         }
 335
 336         return 0;
 337 }
 338
 339 static void intel_dvo_destroy(struct drm_connector *connector)
 340 {
 341         drm_connector_cleanup(connector);
 342         intel_panel_fini(&to_intel_connector(connector)->panel);
 343         kfree(connector);
 344 }
 345
 346 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
 347         .dpms = drm_atomic_helper_connector_dpms,
 348         .detect = intel_dvo_detect,
 349         .destroy = intel_dvo_destroy,
 350         .fill_modes = drm_helper_probe_single_connector_modes,
 351         .atomic_get_property = intel_connector_atomic_get_property,
 352         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 353         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 354 };
 355
 356 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
 357         .mode_valid = intel_dvo_mode_valid,
 358         .get_modes = intel_dvo_get_modes,
 359         .best_encoder = intel_best_encoder,
 360 };
 361
 362 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
 363 {
 364         struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
 365
 366         if (intel_dvo->dev.dev_ops->destroy)
 367                 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
 368
 369         intel_encoder_destroy(encoder);
 370 }
 371
 372 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
 373         .destroy = intel_dvo_enc_destroy,
 374 };
 375
 376 /**
 377  * Attempts to get a fixed panel timing for LVDS (currently only the i830).
 378  *
 379  * Other chips with DVO LVDS will need to extend this to deal with the LVDS
 380  * chip being on DVOB/C and having multiple pipes.
 381  */
 382 static struct drm_display_mode *
 383 intel_dvo_get_current_mode(struct drm_connector *connector)
 384 {
 385         struct drm_device *dev = connector->dev;
 386         struct drm_i915_private *dev_priv = dev->dev_private;
 387         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 388         uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
 389         struct drm_display_mode *mode = NULL;
 390
 391         /* If the DVO port is active, that'll be the LVDS, so we can pull out
 392          * its timings to get how the BIOS set up the panel.
 393          */
 394         if (dvo_val & DVO_ENABLE) {
 395                 struct drm_crtc *crtc;
 396                 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
 397
 398                 crtc = intel_get_crtc_for_pipe(dev, pipe);
 399                 if (crtc) {
 400                         mode = intel_crtc_mode_get(dev, crtc);
 401                         if (mode) {
 402                                 mode->type |= DRM_MODE_TYPE_PREFERRED;
 403                                 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
 404                                         mode->flags |= DRM_MODE_FLAG_PHSYNC;
 405                                 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
 406                                         mode->flags |= DRM_MODE_FLAG_PVSYNC;
 407                         }
 408                 }
 409         }
 410
 411         return mode;
 412 }
 413
 414 void intel_dvo_init(struct drm_device *dev)
 415 {
 416         struct drm_i915_private *dev_priv = dev->dev_private;
 417         struct intel_encoder *intel_encoder;
 418         struct intel_dvo *intel_dvo;
 419         struct intel_connector *intel_connector;
 420         int i;
 421         int encoder_type = DRM_MODE_ENCODER_NONE;
 422
 423         intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
 424         if (!intel_dvo)
 425                 return;
 426
 427         intel_connector = intel_connector_alloc();
 428         if (!intel_connector) {
 429                 kfree(intel_dvo);
 430                 return;
 431         }
 432
 433         intel_dvo->attached_connector = intel_connector;
 434
 435         intel_encoder = &intel_dvo->base;
 436         drm_encoder_init(dev, &intel_encoder->base,
 437                          &intel_dvo_enc_funcs, encoder_type);
 438
 439         intel_encoder->disable = intel_disable_dvo;
 440         intel_encoder->enable = intel_enable_dvo;
 441         intel_encoder->get_hw_state = intel_dvo_get_hw_state;
 442         intel_encoder->get_config = intel_dvo_get_config;
 443         intel_encoder->compute_config = intel_dvo_compute_config;
 444         intel_encoder->pre_enable = intel_dvo_pre_enable;
 445         intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
 446         intel_connector->unregister = intel_connector_unregister;
 447
 448         /* Now, try to find a controller */
 449         for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
 450                 struct drm_connector *connector = &intel_connector->base;
 451                 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
 452                 struct i2c_adapter *i2c;
 453                 int gpio;
 454                 bool dvoinit;
 455                 enum pipe pipe;
 456                 uint32_t dpll[I915_MAX_PIPES];
 457
 458                 /* Allow the I2C driver info to specify the GPIO to be used in
 459                  * special cases, but otherwise default to what's defined
 460                  * in the spec.
 461                  */
 462                 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
 463                         gpio = dvo->gpio;
 464                 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
 465                         gpio = GMBUS_PIN_SSC;
 466                 else
 467                         gpio = GMBUS_PIN_DPB;
 468
 469                 /* Set up the I2C bus necessary for the chip we're probing.
 470                  * It appears that everything is on GPIOE except for panels
 471                  * on i830 laptops, which are on GPIOB (DVOA).
 472                  */
 473                 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
 474
 475                 intel_dvo->dev = *dvo;
 476
 477                 /* GMBUS NAK handling seems to be unstable, hence let the
 478                  * transmitter detection run in bit banging mode for now.
 479                  */
 480                 intel_gmbus_force_bit(i2c, true);
 481
 482                 /* ns2501 requires the DVO 2x clock before it will
 483                  * respond to i2c accesses, so make sure we have
 484                  * have the clock enabled before we attempt to
 485                  * initialize the device.
 486                  */
 487                 for_each_pipe(dev_priv, pipe) {
 488                         dpll[pipe] = I915_READ(DPLL(pipe));
 489                         I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
 490                 }
 491
 492                 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
 493
 494                 /* restore the DVO 2x clock state to original */
 495                 for_each_pipe(dev_priv, pipe) {
 496                         I915_WRITE(DPLL(pipe), dpll[pipe]);
 497                 }
 498
 499                 intel_gmbus_force_bit(i2c, false);
 500
 501                 if (!dvoinit)
 502                         continue;
 503
 504                 intel_encoder->type = INTEL_OUTPUT_DVO;
 505                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 506                 switch (dvo->type) {
 507                 case INTEL_DVO_CHIP_TMDS:
 508                         intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
 509                                 (1 << INTEL_OUTPUT_DVO);
 510                         drm_connector_init(dev, connector,
 511                                            &intel_dvo_connector_funcs,
 512                                            DRM_MODE_CONNECTOR_DVII);
 513                         encoder_type = DRM_MODE_ENCODER_TMDS;
 514                         break;
 515                 case INTEL_DVO_CHIP_LVDS:
 516                         intel_encoder->cloneable = 0;
 517                         drm_connector_init(dev, connector,
 518                                            &intel_dvo_connector_funcs,
 519                                            DRM_MODE_CONNECTOR_LVDS);
 520                         encoder_type = DRM_MODE_ENCODER_LVDS;
 521                         break;
 522                 }
 523
 524                 drm_connector_helper_add(connector,
 525                                          &intel_dvo_connector_helper_funcs);
 526                 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 527                 connector->interlace_allowed = false;
 528                 connector->doublescan_allowed = false;
 529
 530                 intel_connector_attach_encoder(intel_connector, intel_encoder);
 531                 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
 532                         /* For our LVDS chipsets, we should hopefully be able
 533                          * to dig the fixed panel mode out of the BIOS data.
 534                          * However, it's in a different format from the BIOS
 535                          * data on chipsets with integrated LVDS (stored in AIM
 536                          * headers, likely), so for now, just get the current
 537                          * mode being output through DVO.
 538                          */
 539                         intel_panel_init(&intel_connector->panel,
 540                                          intel_dvo_get_current_mode(connector),
 541                                          NULL);
 542                         intel_dvo->panel_wants_dither = true;
 543                 }
 544
 545                 drm_connector_register(connector);
 546                 return;
 547         }
 548
 549         drm_encoder_cleanup(&intel_encoder->base);
 550         kfree(intel_dvo);
 551         kfree(intel_connector);
 552 }