kernel/drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <drm/drmP.h>
  31 #include <drm/drm_atomic_helper.h>
  32 #include <drm/drm_crtc.h>
  33 #include <drm/drm_crtc_helper.h>
  34 #include <drm/drm_edid.h>
  35 #include "intel_drv.h"
  36 #include <drm/i915_drm.h>
  37 #include "i915_drv.h"
  38
  39 /* Here's the desired hotplug mode */
  40 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  41                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  42                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  43                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  44                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  45                            ADPA_CRT_HOTPLUG_ENABLE)
  46
  47 struct intel_crt {
  48         struct intel_encoder base;
  49         /* DPMS state is stored in the connector, which we need in the
  50          * encoder's enable/disable callbacks */
  51         struct intel_connector *connector;
  52         bool force_hotplug_required;
  53         u32 adpa_reg;
  54 };
  55
  56 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  57 {
  58         return container_of(encoder, struct intel_crt, base);
  59 }
  60
  61 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  62 {
  63         return intel_encoder_to_crt(intel_attached_encoder(connector));
  64 }
  65
  66 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  67                                    enum pipe *pipe)
  68 {
  69         struct drm_device *dev = encoder->base.dev;
  70         struct drm_i915_private *dev_priv = dev->dev_private;
  71         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  72         enum intel_display_power_domain power_domain;
  73         u32 tmp;
  74
  75         power_domain = intel_display_port_power_domain(encoder);
  76         if (!intel_display_power_is_enabled(dev_priv, power_domain))
  77                 return false;
  78
  79         tmp = I915_READ(crt->adpa_reg);
  80
  81         if (!(tmp & ADPA_DAC_ENABLE))
  82                 return false;
  83
  84         if (HAS_PCH_CPT(dev))
  85                 *pipe = PORT_TO_PIPE_CPT(tmp);
  86         else
  87                 *pipe = PORT_TO_PIPE(tmp);
  88
  89         return true;
  90 }
  91
  92 static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
  93 {
  94         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  95         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  96         u32 tmp, flags = 0;
  97
  98         tmp = I915_READ(crt->adpa_reg);
  99
 100         if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
 101                 flags |= DRM_MODE_FLAG_PHSYNC;
 102         else
 103                 flags |= DRM_MODE_FLAG_NHSYNC;
 104
 105         if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
 106                 flags |= DRM_MODE_FLAG_PVSYNC;
 107         else
 108                 flags |= DRM_MODE_FLAG_NVSYNC;
 109
 110         return flags;
 111 }
 112
 113 static void intel_crt_get_config(struct intel_encoder *encoder,
 114                                  struct intel_crtc_state *pipe_config)
 115 {
 116         struct drm_device *dev = encoder->base.dev;
 117         int dotclock;
 118
 119         pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
 120
 121         dotclock = pipe_config->port_clock;
 122
 123         if (HAS_PCH_SPLIT(dev))
 124                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
 125
 126         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
 127 }
 128
 129 static void hsw_crt_get_config(struct intel_encoder *encoder,
 130                                struct intel_crtc_state *pipe_config)
 131 {
 132         intel_ddi_get_config(encoder, pipe_config);
 133
 134         pipe_config->base.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
 135                                               DRM_MODE_FLAG_NHSYNC |
 136                                               DRM_MODE_FLAG_PVSYNC |
 137                                               DRM_MODE_FLAG_NVSYNC);
 138         pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
 139 }
 140
 141 /* Note: The caller is required to filter out dpms modes not supported by the
 142  * platform. */
 143 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
 144 {
 145         struct drm_device *dev = encoder->base.dev;
 146         struct drm_i915_private *dev_priv = dev->dev_private;
 147         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 148         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 149         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 150         u32 adpa;
 151
 152         if (INTEL_INFO(dev)->gen >= 5)
 153                 adpa = ADPA_HOTPLUG_BITS;
 154         else
 155                 adpa = 0;
 156
 157         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 158                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 159         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 160                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 161
 162         /* For CPT allow 3 pipe config, for others just use A or B */
 163         if (HAS_PCH_LPT(dev))
 164                 ; /* Those bits don't exist here */
 165         else if (HAS_PCH_CPT(dev))
 166                 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
 167         else if (crtc->pipe == 0)
 168                 adpa |= ADPA_PIPE_A_SELECT;
 169         else
 170                 adpa |= ADPA_PIPE_B_SELECT;
 171
 172         if (!HAS_PCH_SPLIT(dev))
 173                 I915_WRITE(BCLRPAT(crtc->pipe), 0);
 174
 175         switch (mode) {
 176         case DRM_MODE_DPMS_ON:
 177                 adpa |= ADPA_DAC_ENABLE;
 178                 break;
 179         case DRM_MODE_DPMS_STANDBY:
 180                 adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 181                 break;
 182         case DRM_MODE_DPMS_SUSPEND:
 183                 adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 184                 break;
 185         case DRM_MODE_DPMS_OFF:
 186                 adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 187                 break;
 188         }
 189
 190         I915_WRITE(crt->adpa_reg, adpa);
 191 }
 192
 193 static void intel_disable_crt(struct intel_encoder *encoder)
 194 {
 195         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 196 }
 197
 198 static void pch_disable_crt(struct intel_encoder *encoder)
 199 {
 200 }
 201
 202 static void pch_post_disable_crt(struct intel_encoder *encoder)
 203 {
 204         intel_disable_crt(encoder);
 205 }
 206
 207 static void intel_enable_crt(struct intel_encoder *encoder)
 208 {
 209         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 210
 211         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 212 }
 213
 214 static enum drm_mode_status
 215 intel_crt_mode_valid(struct drm_connector *connector,
 216                      struct drm_display_mode *mode)
 217 {
 218         struct drm_device *dev = connector->dev;
 219
 220         int max_clock = 0;
 221         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 222                 return MODE_NO_DBLESCAN;
 223
 224         if (mode->clock < 25000)
 225                 return MODE_CLOCK_LOW;
 226
 227         if (IS_GEN2(dev))
 228                 max_clock = 350000;
 229         else
 230                 max_clock = 400000;
 231         if (mode->clock > max_clock)
 232                 return MODE_CLOCK_HIGH;
 233
 234         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 235         if (HAS_PCH_LPT(dev) &&
 236             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 237                 return MODE_CLOCK_HIGH;
 238
 239         return MODE_OK;
 240 }
 241
 242 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 243                                      struct intel_crtc_state *pipe_config)
 244 {
 245         struct drm_device *dev = encoder->base.dev;
 246
 247         if (HAS_PCH_SPLIT(dev))
 248                 pipe_config->has_pch_encoder = true;
 249
 250         /* LPT FDI RX only supports 8bpc. */
 251         if (HAS_PCH_LPT(dev)) {
 252                 if (pipe_config->bw_constrained && pipe_config->pipe_bpp < 24) {
 253                         DRM_DEBUG_KMS("LPT only supports 24bpp\n");
 254                         return false;
 255                 }
 256
 257                 pipe_config->pipe_bpp = 24;
 258         }
 259
 260         /* FDI must always be 2.7 GHz */
 261         if (HAS_DDI(dev)) {
 262                 pipe_config->ddi_pll_sel = PORT_CLK_SEL_SPLL;
 263                 pipe_config->port_clock = 135000 * 2;
 264
 265                 pipe_config->dpll_hw_state.wrpll = 0;
 266                 pipe_config->dpll_hw_state.spll =
 267                         SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SSC;
 268         }
 269
 270         return true;
 271 }
 272
 273 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 274 {
 275         struct drm_device *dev = connector->dev;
 276         struct intel_crt *crt = intel_attached_crt(connector);
 277         struct drm_i915_private *dev_priv = dev->dev_private;
 278         u32 adpa;
 279         bool ret;
 280
 281         /* The first time through, trigger an explicit detection cycle */
 282         if (crt->force_hotplug_required) {
 283                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 284                 u32 save_adpa;
 285
 286                 crt->force_hotplug_required = 0;
 287
 288                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 289                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 290
 291                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 292                 if (turn_off_dac)
 293                         adpa &= ~ADPA_DAC_ENABLE;
 294
 295                 I915_WRITE(crt->adpa_reg, adpa);
 296
 297                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 298                              1000))
 299                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 300
 301                 if (turn_off_dac) {
 302                         I915_WRITE(crt->adpa_reg, save_adpa);
 303                         POSTING_READ(crt->adpa_reg);
 304                 }
 305         }
 306
 307         /* Check the status to see if both blue and green are on now */
 308         adpa = I915_READ(crt->adpa_reg);
 309         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 310                 ret = true;
 311         else
 312                 ret = false;
 313         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 314
 315         return ret;
 316 }
 317
 318 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 319 {
 320         struct drm_device *dev = connector->dev;
 321         struct intel_crt *crt = intel_attached_crt(connector);
 322         struct drm_i915_private *dev_priv = dev->dev_private;
 323         u32 adpa;
 324         bool ret;
 325         u32 save_adpa;
 326
 327         save_adpa = adpa = I915_READ(crt->adpa_reg);
 328         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 329
 330         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 331
 332         I915_WRITE(crt->adpa_reg, adpa);
 333
 334         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 335                      1000)) {
 336                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 337                 I915_WRITE(crt->adpa_reg, save_adpa);
 338         }
 339
 340         /* Check the status to see if both blue and green are on now */
 341         adpa = I915_READ(crt->adpa_reg);
 342         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 343                 ret = true;
 344         else
 345                 ret = false;
 346
 347         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 348
 349         return ret;
 350 }
 351
 352 /**
 353  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 354  *
 355  * Not for i915G/i915GM
 356  *
 357  * \return true if CRT is connected.
 358  * \return false if CRT is disconnected.
 359  */
 360 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 361 {
 362         struct drm_device *dev = connector->dev;
 363         struct drm_i915_private *dev_priv = dev->dev_private;
 364         u32 stat;
 365         bool ret = false;
 366         int i, tries = 0;
 367
 368         if (HAS_PCH_SPLIT(dev))
 369                 return intel_ironlake_crt_detect_hotplug(connector);
 370
 371         if (IS_VALLEYVIEW(dev))
 372                 return valleyview_crt_detect_hotplug(connector);
 373
 374         /*
 375          * On 4 series desktop, CRT detect sequence need to be done twice
 376          * to get a reliable result.
 377          */
 378
 379         if (IS_G4X(dev) && !IS_GM45(dev))
 380                 tries = 2;
 381         else
 382                 tries = 1;
 383
 384         for (i = 0; i < tries ; i++) {
 385                 /* turn on the FORCE_DETECT */
 386                 i915_hotplug_interrupt_update(dev_priv,
 387                                               CRT_HOTPLUG_FORCE_DETECT,
 388                                               CRT_HOTPLUG_FORCE_DETECT);
 389                 /* wait for FORCE_DETECT to go off */
 390                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 391                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 392                              1000))
 393                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 394         }
 395
 396         stat = I915_READ(PORT_HOTPLUG_STAT);
 397         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 398                 ret = true;
 399
 400         /* clear the interrupt we just generated, if any */
 401         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 402
 403         i915_hotplug_interrupt_update(dev_priv, CRT_HOTPLUG_FORCE_DETECT, 0);
 404
 405         return ret;
 406 }
 407
 408 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 409                                 struct i2c_adapter *i2c)
 410 {
 411         struct edid *edid;
 412
 413         edid = drm_get_edid(connector, i2c);
 414
 415         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 416                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 417                 intel_gmbus_force_bit(i2c, true);
 418                 edid = drm_get_edid(connector, i2c);
 419                 intel_gmbus_force_bit(i2c, false);
 420         }
 421
 422         return edid;
 423 }
 424
 425 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 426 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 427                                 struct i2c_adapter *adapter)
 428 {
 429         struct edid *edid;
 430         int ret;
 431
 432         edid = intel_crt_get_edid(connector, adapter);
 433         if (!edid)
 434                 return 0;
 435
 436         ret = intel_connector_update_modes(connector, edid);
 437         kfree(edid);
 438
 439         return ret;
 440 }
 441
 442 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 443 {
 444         struct intel_crt *crt = intel_attached_crt(connector);
 445         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 446         struct edid *edid;
 447         struct i2c_adapter *i2c;
 448         bool ret = false;
 449
 450         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 451
 452         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 453         edid = intel_crt_get_edid(connector, i2c);
 454
 455         if (edid) {
 456                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 457
 458                 /*
 459                  * This may be a DVI-I connector with a shared DDC
 460                  * link between analog and digital outputs, so we
 461                  * have to check the EDID input spec of the attached device.
 462                  */
 463                 if (!is_digital) {
 464                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 465                         ret = true;
 466                 } else {
 467                         DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 468                 }
 469         } else {
 470                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 471         }
 472
 473         kfree(edid);
 474
 475         return ret;
 476 }
 477
 478 static enum drm_connector_status
 479 intel_crt_load_detect(struct intel_crt *crt)
 480 {
 481         struct drm_device *dev = crt->base.base.dev;
 482         struct drm_i915_private *dev_priv = dev->dev_private;
 483         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 484         uint32_t save_bclrpat;
 485         uint32_t save_vtotal;
 486         uint32_t vtotal, vactive;
 487         uint32_t vsample;
 488         uint32_t vblank, vblank_start, vblank_end;
 489         uint32_t dsl;
 490         uint32_t bclrpat_reg;
 491         uint32_t vtotal_reg;
 492         uint32_t vblank_reg;
 493         uint32_t vsync_reg;
 494         uint32_t pipeconf_reg;
 495         uint32_t pipe_dsl_reg;
 496         uint8_t st00;
 497         enum drm_connector_status status;
 498
 499         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 500
 501         bclrpat_reg = BCLRPAT(pipe);
 502         vtotal_reg = VTOTAL(pipe);
 503         vblank_reg = VBLANK(pipe);
 504         vsync_reg = VSYNC(pipe);
 505         pipeconf_reg = PIPECONF(pipe);
 506         pipe_dsl_reg = PIPEDSL(pipe);
 507
 508         save_bclrpat = I915_READ(bclrpat_reg);
 509         save_vtotal = I915_READ(vtotal_reg);
 510         vblank = I915_READ(vblank_reg);
 511
 512         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 513         vactive = (save_vtotal & 0x7ff) + 1;
 514
 515         vblank_start = (vblank & 0xfff) + 1;
 516         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 517
 518         /* Set the border color to purple. */
 519         I915_WRITE(bclrpat_reg, 0x500050);
 520
 521         if (!IS_GEN2(dev)) {
 522                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 523                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 524                 POSTING_READ(pipeconf_reg);
 525                 /* Wait for next Vblank to substitue
 526                  * border color for Color info */
 527                 intel_wait_for_vblank(dev, pipe);
 528                 st00 = I915_READ8(VGA_MSR_WRITE);
 529                 status = ((st00 & (1 << 4)) != 0) ?
 530                         connector_status_connected :
 531                         connector_status_disconnected;
 532
 533                 I915_WRITE(pipeconf_reg, pipeconf);
 534         } else {
 535                 bool restore_vblank = false;
 536                 int count, detect;
 537
 538                 /*
 539                 * If there isn't any border, add some.
 540                 * Yes, this will flicker
 541                 */
 542                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 543                         uint32_t vsync = I915_READ(vsync_reg);
 544                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 545
 546                         vblank_start = vsync_start;
 547                         I915_WRITE(vblank_reg,
 548                                    (vblank_start - 1) |
 549                                    ((vblank_end - 1) << 16));
 550                         restore_vblank = true;
 551                 }
 552                 /* sample in the vertical border, selecting the larger one */
 553                 if (vblank_start - vactive >= vtotal - vblank_end)
 554                         vsample = (vblank_start + vactive) >> 1;
 555                 else
 556                         vsample = (vtotal + vblank_end) >> 1;
 557
 558                 /*
 559                  * Wait for the border to be displayed
 560                  */
 561                 while (I915_READ(pipe_dsl_reg) >= vactive)
 562                         ;
 563                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 564                         ;
 565                 /*
 566                  * Watch ST00 for an entire scanline
 567                  */
 568                 detect = 0;
 569                 count = 0;
 570                 do {
 571                         count++;
 572                         /* Read the ST00 VGA status register */
 573                         st00 = I915_READ8(VGA_MSR_WRITE);
 574                         if (st00 & (1 << 4))
 575                                 detect++;
 576                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 577
 578                 /* restore vblank if necessary */
 579                 if (restore_vblank)
 580                         I915_WRITE(vblank_reg, vblank);
 581                 /*
 582                  * If more than 3/4 of the scanline detected a monitor,
 583                  * then it is assumed to be present. This works even on i830,
 584                  * where there isn't any way to force the border color across
 585                  * the screen
 586                  */
 587                 status = detect * 4 > count * 3 ?
 588                          connector_status_connected :
 589                          connector_status_disconnected;
 590         }
 591
 592         /* Restore previous settings */
 593         I915_WRITE(bclrpat_reg, save_bclrpat);
 594
 595         return status;
 596 }
 597
 598 static enum drm_connector_status
 599 intel_crt_detect(struct drm_connector *connector, bool force)
 600 {
 601         struct drm_device *dev = connector->dev;
 602         struct drm_i915_private *dev_priv = dev->dev_private;
 603         struct intel_crt *crt = intel_attached_crt(connector);
 604         struct intel_encoder *intel_encoder = &crt->base;
 605         enum intel_display_power_domain power_domain;
 606         enum drm_connector_status status;
 607         struct intel_load_detect_pipe tmp;
 608         struct drm_modeset_acquire_ctx ctx;
 609
 610         DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
 611                       connector->base.id, connector->name,
 612                       force);
 613
 614         power_domain = intel_display_port_power_domain(intel_encoder);
 615         intel_display_power_get(dev_priv, power_domain);
 616
 617         if (I915_HAS_HOTPLUG(dev)) {
 618                 /* We can not rely on the HPD pin always being correctly wired
 619                  * up, for example many KVM do not pass it through, and so
 620                  * only trust an assertion that the monitor is connected.
 621                  */
 622                 if (intel_crt_detect_hotplug(connector)) {
 623                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 624                         status = connector_status_connected;
 625                         goto out;
 626                 } else
 627                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 628         }
 629
 630         if (intel_crt_detect_ddc(connector)) {
 631                 status = connector_status_connected;
 632                 goto out;
 633         }
 634
 635         /* Load detection is broken on HPD capable machines. Whoever wants a
 636          * broken monitor (without edid) to work behind a broken kvm (that fails
 637          * to have the right resistors for HP detection) needs to fix this up.
 638          * For now just bail out. */
 639         if (I915_HAS_HOTPLUG(dev) && !i915.load_detect_test) {
 640                 status = connector_status_disconnected;
 641                 goto out;
 642         }
 643
 644         if (!force) {
 645                 status = connector->status;
 646                 goto out;
 647         }
 648
 649         drm_modeset_acquire_init(&ctx, 0);
 650
 651         /* for pre-945g platforms use load detect */
 652         if (intel_get_load_detect_pipe(connector, NULL, &tmp, &ctx)) {
 653                 if (intel_crt_detect_ddc(connector))
 654                         status = connector_status_connected;
 655                 else if (INTEL_INFO(dev)->gen < 4)
 656                         status = intel_crt_load_detect(crt);
 657                 else
 658                         status = connector_status_unknown;
 659                 intel_release_load_detect_pipe(connector, &tmp, &ctx);
 660         } else
 661                 status = connector_status_unknown;
 662
 663         drm_modeset_drop_locks(&ctx);
 664         drm_modeset_acquire_fini(&ctx);
 665
 666 out:
 667         intel_display_power_put(dev_priv, power_domain);
 668         return status;
 669 }
 670
 671 static void intel_crt_destroy(struct drm_connector *connector)
 672 {
 673         drm_connector_cleanup(connector);
 674         kfree(connector);
 675 }
 676
 677 static int intel_crt_get_modes(struct drm_connector *connector)
 678 {
 679         struct drm_device *dev = connector->dev;
 680         struct drm_i915_private *dev_priv = dev->dev_private;
 681         struct intel_crt *crt = intel_attached_crt(connector);
 682         struct intel_encoder *intel_encoder = &crt->base;
 683         enum intel_display_power_domain power_domain;
 684         int ret;
 685         struct i2c_adapter *i2c;
 686
 687         power_domain = intel_display_port_power_domain(intel_encoder);
 688         intel_display_power_get(dev_priv, power_domain);
 689
 690         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 691         ret = intel_crt_ddc_get_modes(connector, i2c);
 692         if (ret || !IS_G4X(dev))
 693                 goto out;
 694
 695         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 696         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPB);
 697         ret = intel_crt_ddc_get_modes(connector, i2c);
 698
 699 out:
 700         intel_display_power_put(dev_priv, power_domain);
 701
 702         return ret;
 703 }
 704
 705 static int intel_crt_set_property(struct drm_connector *connector,
 706                                   struct drm_property *property,
 707                                   uint64_t value)
 708 {
 709         return 0;
 710 }
 711
 712 static void intel_crt_reset(struct drm_connector *connector)
 713 {
 714         struct drm_device *dev = connector->dev;
 715         struct drm_i915_private *dev_priv = dev->dev_private;
 716         struct intel_crt *crt = intel_attached_crt(connector);
 717
 718         if (INTEL_INFO(dev)->gen >= 5) {
 719                 u32 adpa;
 720
 721                 adpa = I915_READ(crt->adpa_reg);
 722                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 723                 adpa |= ADPA_HOTPLUG_BITS;
 724                 I915_WRITE(crt->adpa_reg, adpa);
 725                 POSTING_READ(crt->adpa_reg);
 726
 727                 DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);
 728                 crt->force_hotplug_required = 1;
 729         }
 730
 731 }
 732
 733 /*
 734  * Routines for controlling stuff on the analog port
 735  */
 736
 737 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 738         .reset = intel_crt_reset,
 739         .dpms = drm_atomic_helper_connector_dpms,
 740         .detect = intel_crt_detect,
 741         .fill_modes = drm_helper_probe_single_connector_modes,
 742         .destroy = intel_crt_destroy,
 743         .set_property = intel_crt_set_property,
 744         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 745         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 746         .atomic_get_property = intel_connector_atomic_get_property,
 747 };
 748
 749 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 750         .mode_valid = intel_crt_mode_valid,
 751         .get_modes = intel_crt_get_modes,
 752         .best_encoder = intel_best_encoder,
 753 };
 754
 755 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 756         .destroy = intel_encoder_destroy,
 757 };
 758
 759 static int intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 760 {
 761         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 762         return 1;
 763 }
 764
 765 static const struct dmi_system_id intel_no_crt[] = {
 766         {
 767                 .callback = intel_no_crt_dmi_callback,
 768                 .ident = "ACER ZGB",
 769                 .matches = {
 770                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 771                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 772                 },
 773         },
 774         {
 775                 .callback = intel_no_crt_dmi_callback,
 776                 .ident = "DELL XPS 8700",
 777                 .matches = {
 778                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 779                         DMI_MATCH(DMI_PRODUCT_NAME, "XPS 8700"),
 780                 },
 781         },
 782         { }
 783 };
 784
 785 void intel_crt_init(struct drm_device *dev)
 786 {
 787         struct drm_connector *connector;
 788         struct intel_crt *crt;
 789         struct intel_connector *intel_connector;
 790         struct drm_i915_private *dev_priv = dev->dev_private;
 791
 792         /* Skip machines without VGA that falsely report hotplug events */
 793         if (dmi_check_system(intel_no_crt))
 794                 return;
 795
 796         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 797         if (!crt)
 798                 return;
 799
 800         intel_connector = intel_connector_alloc();
 801         if (!intel_connector) {
 802                 kfree(crt);
 803                 return;
 804         }
 805
 806         connector = &intel_connector->base;
 807         crt->connector = intel_connector;
 808         drm_connector_init(dev, &intel_connector->base,
 809                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 810
 811         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 812                          DRM_MODE_ENCODER_DAC);
 813
 814         intel_connector_attach_encoder(intel_connector, &crt->base);
 815
 816         crt->base.type = INTEL_OUTPUT_ANALOG;
 817         crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
 818         if (IS_I830(dev))
 819                 crt->base.crtc_mask = (1 << 0);
 820         else
 821                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 822
 823         if (IS_GEN2(dev))
 824                 connector->interlace_allowed = 0;
 825         else
 826                 connector->interlace_allowed = 1;
 827         connector->doublescan_allowed = 0;
 828
 829         if (HAS_PCH_SPLIT(dev))
 830                 crt->adpa_reg = PCH_ADPA;
 831         else if (IS_VALLEYVIEW(dev))
 832                 crt->adpa_reg = VLV_ADPA;
 833         else
 834                 crt->adpa_reg = ADPA;
 835
 836         crt->base.compute_config = intel_crt_compute_config;
 837         if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev)) {
 838                 crt->base.disable = pch_disable_crt;
 839                 crt->base.post_disable = pch_post_disable_crt;
 840         } else {
 841                 crt->base.disable = intel_disable_crt;
 842         }
 843         crt->base.enable = intel_enable_crt;
 844         if (I915_HAS_HOTPLUG(dev))
 845                 crt->base.hpd_pin = HPD_CRT;
 846         if (HAS_DDI(dev)) {
 847                 crt->base.get_config = hsw_crt_get_config;
 848                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 849         } else {
 850                 crt->base.get_config = intel_crt_get_config;
 851                 crt->base.get_hw_state = intel_crt_get_hw_state;
 852         }
 853         intel_connector->get_hw_state = intel_connector_get_hw_state;
 854         intel_connector->unregister = intel_connector_unregister;
 855
 856         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 857
 858         drm_connector_register(connector);
 859
 860         if (!I915_HAS_HOTPLUG(dev))
 861                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 862
 863         /*
 864          * Configure the automatic hotplug detection stuff
 865          */
 866         crt->force_hotplug_required = 0;
 867
 868         /*
 869          * TODO: find a proper way to discover whether we need to set the the
 870          * polarity and link reversal bits or not, instead of relying on the
 871          * BIOS.
 872          */
 873         if (HAS_PCH_LPT(dev)) {
 874                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 875                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 876
 877                 dev_priv->fdi_rx_config = I915_READ(FDI_RX_CTL(PIPE_A)) & fdi_config;
 878         }
 879
 880         intel_crt_reset(connector);
 881 }