Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / drivers / gpu / drm / i915 / i915_gem_render_state.c
1 /*
2  * Copyright © 2014 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  * Authors:
24  *    Mika Kuoppala <mika.kuoppala@intel.com>
25  *
26  */
27
28 #include "i915_drv.h"
29 #include "intel_renderstate.h"
30
31 static const struct intel_renderstate_rodata *
32 render_state_get_rodata(struct drm_device *dev, const int gen)
33 {
34         switch (gen) {
35         case 6:
36                 return &gen6_null_state;
37         case 7:
38                 return &gen7_null_state;
39         case 8:
40                 return &gen8_null_state;
41         case 9:
42                 return &gen9_null_state;
43         }
44
45         return NULL;
46 }
47
48 static int render_state_init(struct render_state *so, struct drm_device *dev)
49 {
50         int ret;
51
52         so->gen = INTEL_INFO(dev)->gen;
53         so->rodata = render_state_get_rodata(dev, so->gen);
54         if (so->rodata == NULL)
55                 return 0;
56
57         if (so->rodata->batch_items * 4 > 4096)
58                 return -EINVAL;
59
60         so->obj = i915_gem_alloc_object(dev, 4096);
61         if (so->obj == NULL)
62                 return -ENOMEM;
63
64         ret = i915_gem_obj_ggtt_pin(so->obj, 4096, 0);
65         if (ret)
66                 goto free_gem;
67
68         so->ggtt_offset = i915_gem_obj_ggtt_offset(so->obj);
69         return 0;
70
71 free_gem:
72         drm_gem_object_unreference(&so->obj->base);
73         return ret;
74 }
75
76 static int render_state_setup(struct render_state *so)
77 {
78         const struct intel_renderstate_rodata *rodata = so->rodata;
79         unsigned int i = 0, reloc_index = 0;
80         struct page *page;
81         u32 *d;
82         int ret;
83
84         ret = i915_gem_object_set_to_cpu_domain(so->obj, true);
85         if (ret)
86                 return ret;
87
88         page = sg_page(so->obj->pages->sgl);
89         d = kmap(page);
90
91         while (i < rodata->batch_items) {
92                 u32 s = rodata->batch[i];
93
94                 if (i * 4  == rodata->reloc[reloc_index]) {
95                         u64 r = s + so->ggtt_offset;
96                         s = lower_32_bits(r);
97                         if (so->gen >= 8) {
98                                 if (i + 1 >= rodata->batch_items ||
99                                     rodata->batch[i + 1] != 0)
100                                         return -EINVAL;
101
102                                 d[i++] = s;
103                                 s = upper_32_bits(r);
104                         }
105
106                         reloc_index++;
107                 }
108
109                 d[i++] = s;
110         }
111         kunmap(page);
112
113         ret = i915_gem_object_set_to_gtt_domain(so->obj, false);
114         if (ret)
115                 return ret;
116
117         if (rodata->reloc[reloc_index] != -1) {
118                 DRM_ERROR("only %d relocs resolved\n", reloc_index);
119                 return -EINVAL;
120         }
121
122         return 0;
123 }
124
125 void i915_gem_render_state_fini(struct render_state *so)
126 {
127         i915_gem_object_ggtt_unpin(so->obj);
128         drm_gem_object_unreference(&so->obj->base);
129 }
130
131 int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
132                                   struct render_state *so)
133 {
134         int ret;
135
136         if (WARN_ON(ring->id != RCS))
137                 return -ENOENT;
138
139         ret = render_state_init(so, ring->dev);
140         if (ret)
141                 return ret;
142
143         if (so->rodata == NULL)
144                 return 0;
145
146         ret = render_state_setup(so);
147         if (ret) {
148                 i915_gem_render_state_fini(so);
149                 return ret;
150         }
151
152         return 0;
153 }
154
155 int i915_gem_render_state_init(struct intel_engine_cs *ring)
156 {
157         struct render_state so;
158         int ret;
159
160         ret = i915_gem_render_state_prepare(ring, &so);
161         if (ret)
162                 return ret;
163
164         if (so.rodata == NULL)
165                 return 0;
166
167         ret = ring->dispatch_execbuffer(ring,
168                                         so.ggtt_offset,
169                                         so.rodata->batch_items * 4,
170                                         I915_DISPATCH_SECURE);
171         if (ret)
172                 goto out;
173
174         i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
175
176         ret = __i915_add_request(ring, NULL, so.obj);
177         /* __i915_add_request moves object to inactive if it fails */
178 out:
179         i915_gem_render_state_fini(&so);
180         return ret;
181 }