Add the rt linux 4.1.3-rt3 as base
[kvmfornfv.git] / kernel / arch / x86 / platform / uv / tlb_uv.c
1 /*
2  *      SGI UltraViolet TLB flush routines.
3  *
4  *      (c) 2008-2014 Cliff Wickman <cpw@sgi.com>, SGI.
5  *
6  *      This code is released under the GNU General Public License version 2 or
7  *      later.
8  */
9 #include <linux/seq_file.h>
10 #include <linux/proc_fs.h>
11 #include <linux/debugfs.h>
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
14 #include <linux/delay.h>
15
16 #include <asm/mmu_context.h>
17 #include <asm/uv/uv.h>
18 #include <asm/uv/uv_mmrs.h>
19 #include <asm/uv/uv_hub.h>
20 #include <asm/uv/uv_bau.h>
21 #include <asm/apic.h>
22 #include <asm/idle.h>
23 #include <asm/tsc.h>
24 #include <asm/irq_vectors.h>
25 #include <asm/timer.h>
26
27 /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
28 static int timeout_base_ns[] = {
29                 20,
30                 160,
31                 1280,
32                 10240,
33                 81920,
34                 655360,
35                 5242880,
36                 167772160
37 };
38
39 static int timeout_us;
40 static int nobau;
41 static int nobau_perm;
42 static cycles_t congested_cycles;
43
44 /* tunables: */
45 static int max_concurr          = MAX_BAU_CONCURRENT;
46 static int max_concurr_const    = MAX_BAU_CONCURRENT;
47 static int plugged_delay        = PLUGGED_DELAY;
48 static int plugsb4reset         = PLUGSB4RESET;
49 static int giveup_limit         = GIVEUP_LIMIT;
50 static int timeoutsb4reset      = TIMEOUTSB4RESET;
51 static int ipi_reset_limit      = IPI_RESET_LIMIT;
52 static int complete_threshold   = COMPLETE_THRESHOLD;
53 static int congested_respns_us  = CONGESTED_RESPONSE_US;
54 static int congested_reps       = CONGESTED_REPS;
55 static int disabled_period      = DISABLED_PERIOD;
56
57 static struct tunables tunables[] = {
58         {&max_concurr, MAX_BAU_CONCURRENT}, /* must be [0] */
59         {&plugged_delay, PLUGGED_DELAY},
60         {&plugsb4reset, PLUGSB4RESET},
61         {&timeoutsb4reset, TIMEOUTSB4RESET},
62         {&ipi_reset_limit, IPI_RESET_LIMIT},
63         {&complete_threshold, COMPLETE_THRESHOLD},
64         {&congested_respns_us, CONGESTED_RESPONSE_US},
65         {&congested_reps, CONGESTED_REPS},
66         {&disabled_period, DISABLED_PERIOD},
67         {&giveup_limit, GIVEUP_LIMIT}
68 };
69
70 static struct dentry *tunables_dir;
71 static struct dentry *tunables_file;
72
73 /* these correspond to the statistics printed by ptc_seq_show() */
74 static char *stat_description[] = {
75         "sent:     number of shootdown messages sent",
76         "stime:    time spent sending messages",
77         "numuvhubs: number of hubs targeted with shootdown",
78         "numuvhubs16: number times 16 or more hubs targeted",
79         "numuvhubs8: number times 8 or more hubs targeted",
80         "numuvhubs4: number times 4 or more hubs targeted",
81         "numuvhubs2: number times 2 or more hubs targeted",
82         "numuvhubs1: number times 1 hub targeted",
83         "numcpus:  number of cpus targeted with shootdown",
84         "dto:      number of destination timeouts",
85         "retries:  destination timeout retries sent",
86         "rok:   :  destination timeouts successfully retried",
87         "resetp:   ipi-style resource resets for plugs",
88         "resett:   ipi-style resource resets for timeouts",
89         "giveup:   fall-backs to ipi-style shootdowns",
90         "sto:      number of source timeouts",
91         "bz:       number of stay-busy's",
92         "throt:    number times spun in throttle",
93         "swack:   image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
94         "recv:     shootdown messages received",
95         "rtime:    time spent processing messages",
96         "all:      shootdown all-tlb messages",
97         "one:      shootdown one-tlb messages",
98         "mult:     interrupts that found multiple messages",
99         "none:     interrupts that found no messages",
100         "retry:    number of retry messages processed",
101         "canc:     number messages canceled by retries",
102         "nocan:    number retries that found nothing to cancel",
103         "reset:    number of ipi-style reset requests processed",
104         "rcan:     number messages canceled by reset requests",
105         "disable:  number times use of the BAU was disabled",
106         "enable:   number times use of the BAU was re-enabled"
107 };
108
109 static int __init
110 setup_nobau(char *arg)
111 {
112         nobau = 1;
113         return 0;
114 }
115 early_param("nobau", setup_nobau);
116
117 /* base pnode in this partition */
118 static int uv_base_pnode __read_mostly;
119
120 static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
121 static DEFINE_PER_CPU(struct bau_control, bau_control);
122 static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
123
124 static void
125 set_bau_on(void)
126 {
127         int cpu;
128         struct bau_control *bcp;
129
130         if (nobau_perm) {
131                 pr_info("BAU not initialized; cannot be turned on\n");
132                 return;
133         }
134         nobau = 0;
135         for_each_present_cpu(cpu) {
136                 bcp = &per_cpu(bau_control, cpu);
137                 bcp->nobau = 0;
138         }
139         pr_info("BAU turned on\n");
140         return;
141 }
142
143 static void
144 set_bau_off(void)
145 {
146         int cpu;
147         struct bau_control *bcp;
148
149         nobau = 1;
150         for_each_present_cpu(cpu) {
151                 bcp = &per_cpu(bau_control, cpu);
152                 bcp->nobau = 1;
153         }
154         pr_info("BAU turned off\n");
155         return;
156 }
157
158 /*
159  * Determine the first node on a uvhub. 'Nodes' are used for kernel
160  * memory allocation.
161  */
162 static int __init uvhub_to_first_node(int uvhub)
163 {
164         int node, b;
165
166         for_each_online_node(node) {
167                 b = uv_node_to_blade_id(node);
168                 if (uvhub == b)
169                         return node;
170         }
171         return -1;
172 }
173
174 /*
175  * Determine the apicid of the first cpu on a uvhub.
176  */
177 static int __init uvhub_to_first_apicid(int uvhub)
178 {
179         int cpu;
180
181         for_each_present_cpu(cpu)
182                 if (uvhub == uv_cpu_to_blade_id(cpu))
183                         return per_cpu(x86_cpu_to_apicid, cpu);
184         return -1;
185 }
186
187 /*
188  * Free a software acknowledge hardware resource by clearing its Pending
189  * bit. This will return a reply to the sender.
190  * If the message has timed out, a reply has already been sent by the
191  * hardware but the resource has not been released. In that case our
192  * clear of the Timeout bit (as well) will free the resource. No reply will
193  * be sent (the hardware will only do one reply per message).
194  */
195 static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
196                                                 int do_acknowledge)
197 {
198         unsigned long dw;
199         struct bau_pq_entry *msg;
200
201         msg = mdp->msg;
202         if (!msg->canceled && do_acknowledge) {
203                 dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
204                 write_mmr_sw_ack(dw);
205         }
206         msg->replied_to = 1;
207         msg->swack_vec = 0;
208 }
209
210 /*
211  * Process the receipt of a RETRY message
212  */
213 static void bau_process_retry_msg(struct msg_desc *mdp,
214                                         struct bau_control *bcp)
215 {
216         int i;
217         int cancel_count = 0;
218         unsigned long msg_res;
219         unsigned long mmr = 0;
220         struct bau_pq_entry *msg = mdp->msg;
221         struct bau_pq_entry *msg2;
222         struct ptc_stats *stat = bcp->statp;
223
224         stat->d_retries++;
225         /*
226          * cancel any message from msg+1 to the retry itself
227          */
228         for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
229                 if (msg2 > mdp->queue_last)
230                         msg2 = mdp->queue_first;
231                 if (msg2 == msg)
232                         break;
233
234                 /* same conditions for cancellation as do_reset */
235                 if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
236                     (msg2->swack_vec) && ((msg2->swack_vec &
237                         msg->swack_vec) == 0) &&
238                     (msg2->sending_cpu == msg->sending_cpu) &&
239                     (msg2->msg_type != MSG_NOOP)) {
240                         mmr = read_mmr_sw_ack();
241                         msg_res = msg2->swack_vec;
242                         /*
243                          * This is a message retry; clear the resources held
244                          * by the previous message only if they timed out.
245                          * If it has not timed out we have an unexpected
246                          * situation to report.
247                          */
248                         if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
249                                 unsigned long mr;
250                                 /*
251                                  * Is the resource timed out?
252                                  * Make everyone ignore the cancelled message.
253                                  */
254                                 msg2->canceled = 1;
255                                 stat->d_canceled++;
256                                 cancel_count++;
257                                 mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
258                                 write_mmr_sw_ack(mr);
259                         }
260                 }
261         }
262         if (!cancel_count)
263                 stat->d_nocanceled++;
264 }
265
266 /*
267  * Do all the things a cpu should do for a TLB shootdown message.
268  * Other cpu's may come here at the same time for this message.
269  */
270 static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
271                                                 int do_acknowledge)
272 {
273         short socket_ack_count = 0;
274         short *sp;
275         struct atomic_short *asp;
276         struct ptc_stats *stat = bcp->statp;
277         struct bau_pq_entry *msg = mdp->msg;
278         struct bau_control *smaster = bcp->socket_master;
279
280         /*
281          * This must be a normal message, or retry of a normal message
282          */
283         if (msg->address == TLB_FLUSH_ALL) {
284                 local_flush_tlb();
285                 stat->d_alltlb++;
286         } else {
287                 __flush_tlb_one(msg->address);
288                 stat->d_onetlb++;
289         }
290         stat->d_requestee++;
291
292         /*
293          * One cpu on each uvhub has the additional job on a RETRY
294          * of releasing the resource held by the message that is
295          * being retried.  That message is identified by sending
296          * cpu number.
297          */
298         if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
299                 bau_process_retry_msg(mdp, bcp);
300
301         /*
302          * This is a swack message, so we have to reply to it.
303          * Count each responding cpu on the socket. This avoids
304          * pinging the count's cache line back and forth between
305          * the sockets.
306          */
307         sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
308         asp = (struct atomic_short *)sp;
309         socket_ack_count = atom_asr(1, asp);
310         if (socket_ack_count == bcp->cpus_in_socket) {
311                 int msg_ack_count;
312                 /*
313                  * Both sockets dump their completed count total into
314                  * the message's count.
315                  */
316                 *sp = 0;
317                 asp = (struct atomic_short *)&msg->acknowledge_count;
318                 msg_ack_count = atom_asr(socket_ack_count, asp);
319
320                 if (msg_ack_count == bcp->cpus_in_uvhub) {
321                         /*
322                          * All cpus in uvhub saw it; reply
323                          * (unless we are in the UV2 workaround)
324                          */
325                         reply_to_message(mdp, bcp, do_acknowledge);
326                 }
327         }
328
329         return;
330 }
331
332 /*
333  * Determine the first cpu on a pnode.
334  */
335 static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
336 {
337         int cpu;
338         struct hub_and_pnode *hpp;
339
340         for_each_present_cpu(cpu) {
341                 hpp = &smaster->thp[cpu];
342                 if (pnode == hpp->pnode)
343                         return cpu;
344         }
345         return -1;
346 }
347
348 /*
349  * Last resort when we get a large number of destination timeouts is
350  * to clear resources held by a given cpu.
351  * Do this with IPI so that all messages in the BAU message queue
352  * can be identified by their nonzero swack_vec field.
353  *
354  * This is entered for a single cpu on the uvhub.
355  * The sender want's this uvhub to free a specific message's
356  * swack resources.
357  */
358 static void do_reset(void *ptr)
359 {
360         int i;
361         struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
362         struct reset_args *rap = (struct reset_args *)ptr;
363         struct bau_pq_entry *msg;
364         struct ptc_stats *stat = bcp->statp;
365
366         stat->d_resets++;
367         /*
368          * We're looking for the given sender, and
369          * will free its swack resource.
370          * If all cpu's finally responded after the timeout, its
371          * message 'replied_to' was set.
372          */
373         for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
374                 unsigned long msg_res;
375                 /* do_reset: same conditions for cancellation as
376                    bau_process_retry_msg() */
377                 if ((msg->replied_to == 0) &&
378                     (msg->canceled == 0) &&
379                     (msg->sending_cpu == rap->sender) &&
380                     (msg->swack_vec) &&
381                     (msg->msg_type != MSG_NOOP)) {
382                         unsigned long mmr;
383                         unsigned long mr;
384                         /*
385                          * make everyone else ignore this message
386                          */
387                         msg->canceled = 1;
388                         /*
389                          * only reset the resource if it is still pending
390                          */
391                         mmr = read_mmr_sw_ack();
392                         msg_res = msg->swack_vec;
393                         mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
394                         if (mmr & msg_res) {
395                                 stat->d_rcanceled++;
396                                 write_mmr_sw_ack(mr);
397                         }
398                 }
399         }
400         return;
401 }
402
403 /*
404  * Use IPI to get all target uvhubs to release resources held by
405  * a given sending cpu number.
406  */
407 static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
408 {
409         int pnode;
410         int apnode;
411         int maskbits;
412         int sender = bcp->cpu;
413         cpumask_t *mask = bcp->uvhub_master->cpumask;
414         struct bau_control *smaster = bcp->socket_master;
415         struct reset_args reset_args;
416
417         reset_args.sender = sender;
418         cpumask_clear(mask);
419         /* find a single cpu for each uvhub in this distribution mask */
420         maskbits = sizeof(struct pnmask) * BITSPERBYTE;
421         /* each bit is a pnode relative to the partition base pnode */
422         for (pnode = 0; pnode < maskbits; pnode++) {
423                 int cpu;
424                 if (!bau_uvhub_isset(pnode, distribution))
425                         continue;
426                 apnode = pnode + bcp->partition_base_pnode;
427                 cpu = pnode_to_first_cpu(apnode, smaster);
428                 cpumask_set_cpu(cpu, mask);
429         }
430
431         /* IPI all cpus; preemption is already disabled */
432         smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
433         return;
434 }
435
436 /*
437  * Not to be confused with cycles_2_ns() from tsc.c; this gives a relative
438  * number, not an absolute. It converts a duration in cycles to a duration in
439  * ns.
440  */
441 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
442 {
443         struct cyc2ns_data *data = cyc2ns_read_begin();
444         unsigned long long ns;
445
446         ns = mul_u64_u32_shr(cyc, data->cyc2ns_mul, data->cyc2ns_shift);
447
448         cyc2ns_read_end(data);
449         return ns;
450 }
451
452 /*
453  * The reverse of the above; converts a duration in ns to a duration in cycles.
454  */
455 static inline unsigned long long ns_2_cycles(unsigned long long ns)
456 {
457         struct cyc2ns_data *data = cyc2ns_read_begin();
458         unsigned long long cyc;
459
460         cyc = (ns << data->cyc2ns_shift) / data->cyc2ns_mul;
461
462         cyc2ns_read_end(data);
463         return cyc;
464 }
465
466 static inline unsigned long cycles_2_us(unsigned long long cyc)
467 {
468         return cycles_2_ns(cyc) / NSEC_PER_USEC;
469 }
470
471 static inline cycles_t sec_2_cycles(unsigned long sec)
472 {
473         return ns_2_cycles(sec * NSEC_PER_SEC);
474 }
475
476 static inline unsigned long long usec_2_cycles(unsigned long usec)
477 {
478         return ns_2_cycles(usec * NSEC_PER_USEC);
479 }
480
481 /*
482  * wait for all cpus on this hub to finish their sends and go quiet
483  * leaves uvhub_quiesce set so that no new broadcasts are started by
484  * bau_flush_send_and_wait()
485  */
486 static inline void quiesce_local_uvhub(struct bau_control *hmaster)
487 {
488         atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
489 }
490
491 /*
492  * mark this quiet-requestor as done
493  */
494 static inline void end_uvhub_quiesce(struct bau_control *hmaster)
495 {
496         atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
497 }
498
499 static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
500 {
501         unsigned long descriptor_status;
502
503         descriptor_status = uv_read_local_mmr(mmr_offset);
504         descriptor_status >>= right_shift;
505         descriptor_status &= UV_ACT_STATUS_MASK;
506         return descriptor_status;
507 }
508
509 /*
510  * Wait for completion of a broadcast software ack message
511  * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
512  */
513 static int uv1_wait_completion(struct bau_desc *bau_desc,
514                                 unsigned long mmr_offset, int right_shift,
515                                 struct bau_control *bcp, long try)
516 {
517         unsigned long descriptor_status;
518         cycles_t ttm;
519         struct ptc_stats *stat = bcp->statp;
520
521         descriptor_status = uv1_read_status(mmr_offset, right_shift);
522         /* spin on the status MMR, waiting for it to go idle */
523         while ((descriptor_status != DS_IDLE)) {
524                 /*
525                  * Our software ack messages may be blocked because
526                  * there are no swack resources available.  As long
527                  * as none of them has timed out hardware will NACK
528                  * our message and its state will stay IDLE.
529                  */
530                 if (descriptor_status == DS_SOURCE_TIMEOUT) {
531                         stat->s_stimeout++;
532                         return FLUSH_GIVEUP;
533                 } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
534                         stat->s_dtimeout++;
535                         ttm = get_cycles();
536
537                         /*
538                          * Our retries may be blocked by all destination
539                          * swack resources being consumed, and a timeout
540                          * pending.  In that case hardware returns the
541                          * ERROR that looks like a destination timeout.
542                          */
543                         if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
544                                 bcp->conseccompletes = 0;
545                                 return FLUSH_RETRY_PLUGGED;
546                         }
547
548                         bcp->conseccompletes = 0;
549                         return FLUSH_RETRY_TIMEOUT;
550                 } else {
551                         /*
552                          * descriptor_status is still BUSY
553                          */
554                         cpu_relax();
555                 }
556                 descriptor_status = uv1_read_status(mmr_offset, right_shift);
557         }
558         bcp->conseccompletes++;
559         return FLUSH_COMPLETE;
560 }
561
562 /*
563  * UV2 could have an extra bit of status in the ACTIVATION_STATUS_2 register.
564  * But not currently used.
565  */
566 static unsigned long uv2_3_read_status(unsigned long offset, int rshft, int desc)
567 {
568         unsigned long descriptor_status;
569
570         descriptor_status =
571                 ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK) << 1;
572         return descriptor_status;
573 }
574
575 /*
576  * Return whether the status of the descriptor that is normally used for this
577  * cpu (the one indexed by its hub-relative cpu number) is busy.
578  * The status of the original 32 descriptors is always reflected in the 64
579  * bits of UVH_LB_BAU_SB_ACTIVATION_STATUS_0.
580  * The bit provided by the activation_status_2 register is irrelevant to
581  * the status if it is only being tested for busy or not busy.
582  */
583 int normal_busy(struct bau_control *bcp)
584 {
585         int cpu = bcp->uvhub_cpu;
586         int mmr_offset;
587         int right_shift;
588
589         mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
590         right_shift = cpu * UV_ACT_STATUS_SIZE;
591         return (((((read_lmmr(mmr_offset) >> right_shift) &
592                                 UV_ACT_STATUS_MASK)) << 1) == UV2H_DESC_BUSY);
593 }
594
595 /*
596  * Entered when a bau descriptor has gone into a permanent busy wait because
597  * of a hardware bug.
598  * Workaround the bug.
599  */
600 int handle_uv2_busy(struct bau_control *bcp)
601 {
602         struct ptc_stats *stat = bcp->statp;
603
604         stat->s_uv2_wars++;
605         bcp->busy = 1;
606         return FLUSH_GIVEUP;
607 }
608
609 static int uv2_3_wait_completion(struct bau_desc *bau_desc,
610                                 unsigned long mmr_offset, int right_shift,
611                                 struct bau_control *bcp, long try)
612 {
613         unsigned long descriptor_stat;
614         cycles_t ttm;
615         int desc = bcp->uvhub_cpu;
616         long busy_reps = 0;
617         struct ptc_stats *stat = bcp->statp;
618
619         descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
620
621         /* spin on the status MMR, waiting for it to go idle */
622         while (descriptor_stat != UV2H_DESC_IDLE) {
623                 if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT)) {
624                         /*
625                          * A h/w bug on the destination side may
626                          * have prevented the message being marked
627                          * pending, thus it doesn't get replied to
628                          * and gets continually nacked until it times
629                          * out with a SOURCE_TIMEOUT.
630                          */
631                         stat->s_stimeout++;
632                         return FLUSH_GIVEUP;
633                 } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
634                         ttm = get_cycles();
635
636                         /*
637                          * Our retries may be blocked by all destination
638                          * swack resources being consumed, and a timeout
639                          * pending.  In that case hardware returns the
640                          * ERROR that looks like a destination timeout.
641                          * Without using the extended status we have to
642                          * deduce from the short time that this was a
643                          * strong nack.
644                          */
645                         if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
646                                 bcp->conseccompletes = 0;
647                                 stat->s_plugged++;
648                                 /* FLUSH_RETRY_PLUGGED causes hang on boot */
649                                 return FLUSH_GIVEUP;
650                         }
651                         stat->s_dtimeout++;
652                         bcp->conseccompletes = 0;
653                         /* FLUSH_RETRY_TIMEOUT causes hang on boot */
654                         return FLUSH_GIVEUP;
655                 } else {
656                         busy_reps++;
657                         if (busy_reps > 1000000) {
658                                 /* not to hammer on the clock */
659                                 busy_reps = 0;
660                                 ttm = get_cycles();
661                                 if ((ttm - bcp->send_message) > bcp->timeout_interval)
662                                         return handle_uv2_busy(bcp);
663                         }
664                         /*
665                          * descriptor_stat is still BUSY
666                          */
667                         cpu_relax();
668                 }
669                 descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
670         }
671         bcp->conseccompletes++;
672         return FLUSH_COMPLETE;
673 }
674
675 /*
676  * There are 2 status registers; each and array[32] of 2 bits. Set up for
677  * which register to read and position in that register based on cpu in
678  * current hub.
679  */
680 static int wait_completion(struct bau_desc *bau_desc, struct bau_control *bcp, long try)
681 {
682         int right_shift;
683         unsigned long mmr_offset;
684         int desc = bcp->uvhub_cpu;
685
686         if (desc < UV_CPUS_PER_AS) {
687                 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
688                 right_shift = desc * UV_ACT_STATUS_SIZE;
689         } else {
690                 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
691                 right_shift = ((desc - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
692         }
693
694         if (bcp->uvhub_version == 1)
695                 return uv1_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
696         else
697                 return uv2_3_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
698 }
699
700 /*
701  * Our retries are blocked by all destination sw ack resources being
702  * in use, and a timeout is pending. In that case hardware immediately
703  * returns the ERROR that looks like a destination timeout.
704  */
705 static void destination_plugged(struct bau_desc *bau_desc,
706                         struct bau_control *bcp,
707                         struct bau_control *hmaster, struct ptc_stats *stat)
708 {
709         udelay(bcp->plugged_delay);
710         bcp->plugged_tries++;
711
712         if (bcp->plugged_tries >= bcp->plugsb4reset) {
713                 bcp->plugged_tries = 0;
714
715                 quiesce_local_uvhub(hmaster);
716
717                 raw_spin_lock(&hmaster->queue_lock);
718                 reset_with_ipi(&bau_desc->distribution, bcp);
719                 raw_spin_unlock(&hmaster->queue_lock);
720
721                 end_uvhub_quiesce(hmaster);
722
723                 bcp->ipi_attempts++;
724                 stat->s_resets_plug++;
725         }
726 }
727
728 static void destination_timeout(struct bau_desc *bau_desc,
729                         struct bau_control *bcp, struct bau_control *hmaster,
730                         struct ptc_stats *stat)
731 {
732         hmaster->max_concurr = 1;
733         bcp->timeout_tries++;
734         if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
735                 bcp->timeout_tries = 0;
736
737                 quiesce_local_uvhub(hmaster);
738
739                 raw_spin_lock(&hmaster->queue_lock);
740                 reset_with_ipi(&bau_desc->distribution, bcp);
741                 raw_spin_unlock(&hmaster->queue_lock);
742
743                 end_uvhub_quiesce(hmaster);
744
745                 bcp->ipi_attempts++;
746                 stat->s_resets_timeout++;
747         }
748 }
749
750 /*
751  * Stop all cpus on a uvhub from using the BAU for a period of time.
752  * This is reversed by check_enable.
753  */
754 static void disable_for_period(struct bau_control *bcp, struct ptc_stats *stat)
755 {
756         int tcpu;
757         struct bau_control *tbcp;
758         struct bau_control *hmaster;
759         cycles_t tm1;
760
761         hmaster = bcp->uvhub_master;
762         raw_spin_lock(&hmaster->disable_lock);
763         if (!bcp->baudisabled) {
764                 stat->s_bau_disabled++;
765                 tm1 = get_cycles();
766                 for_each_present_cpu(tcpu) {
767                         tbcp = &per_cpu(bau_control, tcpu);
768                         if (tbcp->uvhub_master == hmaster) {
769                                 tbcp->baudisabled = 1;
770                                 tbcp->set_bau_on_time =
771                                         tm1 + bcp->disabled_period;
772                         }
773                 }
774         }
775         raw_spin_unlock(&hmaster->disable_lock);
776 }
777
778 static void count_max_concurr(int stat, struct bau_control *bcp,
779                                 struct bau_control *hmaster)
780 {
781         bcp->plugged_tries = 0;
782         bcp->timeout_tries = 0;
783         if (stat != FLUSH_COMPLETE)
784                 return;
785         if (bcp->conseccompletes <= bcp->complete_threshold)
786                 return;
787         if (hmaster->max_concurr >= hmaster->max_concurr_const)
788                 return;
789         hmaster->max_concurr++;
790 }
791
792 static void record_send_stats(cycles_t time1, cycles_t time2,
793                 struct bau_control *bcp, struct ptc_stats *stat,
794                 int completion_status, int try)
795 {
796         cycles_t elapsed;
797
798         if (time2 > time1) {
799                 elapsed = time2 - time1;
800                 stat->s_time += elapsed;
801
802                 if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
803                         bcp->period_requests++;
804                         bcp->period_time += elapsed;
805                         if ((elapsed > congested_cycles) &&
806                             (bcp->period_requests > bcp->cong_reps) &&
807                             ((bcp->period_time / bcp->period_requests) >
808                                                         congested_cycles)) {
809                                 stat->s_congested++;
810                                 disable_for_period(bcp, stat);
811                         }
812                 }
813         } else
814                 stat->s_requestor--;
815
816         if (completion_status == FLUSH_COMPLETE && try > 1)
817                 stat->s_retriesok++;
818         else if (completion_status == FLUSH_GIVEUP) {
819                 stat->s_giveup++;
820                 if (get_cycles() > bcp->period_end)
821                         bcp->period_giveups = 0;
822                 bcp->period_giveups++;
823                 if (bcp->period_giveups == 1)
824                         bcp->period_end = get_cycles() + bcp->disabled_period;
825                 if (bcp->period_giveups > bcp->giveup_limit) {
826                         disable_for_period(bcp, stat);
827                         stat->s_giveuplimit++;
828                 }
829         }
830 }
831
832 /*
833  * Because of a uv1 hardware bug only a limited number of concurrent
834  * requests can be made.
835  */
836 static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
837 {
838         raw_spinlock_t *lock = &hmaster->uvhub_lock;
839         atomic_t *v;
840
841         v = &hmaster->active_descriptor_count;
842         if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
843                 stat->s_throttles++;
844                 do {
845                         cpu_relax();
846                 } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
847         }
848 }
849
850 /*
851  * Handle the completion status of a message send.
852  */
853 static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
854                         struct bau_control *bcp, struct bau_control *hmaster,
855                         struct ptc_stats *stat)
856 {
857         if (completion_status == FLUSH_RETRY_PLUGGED)
858                 destination_plugged(bau_desc, bcp, hmaster, stat);
859         else if (completion_status == FLUSH_RETRY_TIMEOUT)
860                 destination_timeout(bau_desc, bcp, hmaster, stat);
861 }
862
863 /*
864  * Send a broadcast and wait for it to complete.
865  *
866  * The flush_mask contains the cpus the broadcast is to be sent to including
867  * cpus that are on the local uvhub.
868  *
869  * Returns 0 if all flushing represented in the mask was done.
870  * Returns 1 if it gives up entirely and the original cpu mask is to be
871  * returned to the kernel.
872  */
873 int uv_flush_send_and_wait(struct cpumask *flush_mask, struct bau_control *bcp,
874         struct bau_desc *bau_desc)
875 {
876         int seq_number = 0;
877         int completion_stat = 0;
878         int uv1 = 0;
879         long try = 0;
880         unsigned long index;
881         cycles_t time1;
882         cycles_t time2;
883         struct ptc_stats *stat = bcp->statp;
884         struct bau_control *hmaster = bcp->uvhub_master;
885         struct uv1_bau_msg_header *uv1_hdr = NULL;
886         struct uv2_3_bau_msg_header *uv2_3_hdr = NULL;
887
888         if (bcp->uvhub_version == 1) {
889                 uv1 = 1;
890                 uv1_throttle(hmaster, stat);
891         }
892
893         while (hmaster->uvhub_quiesce)
894                 cpu_relax();
895
896         time1 = get_cycles();
897         if (uv1)
898                 uv1_hdr = &bau_desc->header.uv1_hdr;
899         else
900                 /* uv2 and uv3 */
901                 uv2_3_hdr = &bau_desc->header.uv2_3_hdr;
902
903         do {
904                 if (try == 0) {
905                         if (uv1)
906                                 uv1_hdr->msg_type = MSG_REGULAR;
907                         else
908                                 uv2_3_hdr->msg_type = MSG_REGULAR;
909                         seq_number = bcp->message_number++;
910                 } else {
911                         if (uv1)
912                                 uv1_hdr->msg_type = MSG_RETRY;
913                         else
914                                 uv2_3_hdr->msg_type = MSG_RETRY;
915                         stat->s_retry_messages++;
916                 }
917
918                 if (uv1)
919                         uv1_hdr->sequence = seq_number;
920                 else
921                         uv2_3_hdr->sequence = seq_number;
922                 index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
923                 bcp->send_message = get_cycles();
924
925                 write_mmr_activation(index);
926
927                 try++;
928                 completion_stat = wait_completion(bau_desc, bcp, try);
929
930                 handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
931
932                 if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
933                         bcp->ipi_attempts = 0;
934                         stat->s_overipilimit++;
935                         completion_stat = FLUSH_GIVEUP;
936                         break;
937                 }
938                 cpu_relax();
939         } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
940                  (completion_stat == FLUSH_RETRY_TIMEOUT));
941
942         time2 = get_cycles();
943
944         count_max_concurr(completion_stat, bcp, hmaster);
945
946         while (hmaster->uvhub_quiesce)
947                 cpu_relax();
948
949         atomic_dec(&hmaster->active_descriptor_count);
950
951         record_send_stats(time1, time2, bcp, stat, completion_stat, try);
952
953         if (completion_stat == FLUSH_GIVEUP)
954                 /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
955                 return 1;
956         return 0;
957 }
958
959 /*
960  * The BAU is disabled for this uvhub. When the disabled time period has
961  * expired re-enable it.
962  * Return 0 if it is re-enabled for all cpus on this uvhub.
963  */
964 static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
965 {
966         int tcpu;
967         struct bau_control *tbcp;
968         struct bau_control *hmaster;
969
970         hmaster = bcp->uvhub_master;
971         raw_spin_lock(&hmaster->disable_lock);
972         if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) {
973                 stat->s_bau_reenabled++;
974                 for_each_present_cpu(tcpu) {
975                         tbcp = &per_cpu(bau_control, tcpu);
976                         if (tbcp->uvhub_master == hmaster) {
977                                 tbcp->baudisabled = 0;
978                                 tbcp->period_requests = 0;
979                                 tbcp->period_time = 0;
980                                 tbcp->period_giveups = 0;
981                         }
982                 }
983                 raw_spin_unlock(&hmaster->disable_lock);
984                 return 0;
985         }
986         raw_spin_unlock(&hmaster->disable_lock);
987         return -1;
988 }
989
990 static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
991                                 int remotes, struct bau_desc *bau_desc)
992 {
993         stat->s_requestor++;
994         stat->s_ntargcpu += remotes + locals;
995         stat->s_ntargremotes += remotes;
996         stat->s_ntarglocals += locals;
997
998         /* uvhub statistics */
999         hubs = bau_uvhub_weight(&bau_desc->distribution);
1000         if (locals) {
1001                 stat->s_ntarglocaluvhub++;
1002                 stat->s_ntargremoteuvhub += (hubs - 1);
1003         } else
1004                 stat->s_ntargremoteuvhub += hubs;
1005
1006         stat->s_ntarguvhub += hubs;
1007
1008         if (hubs >= 16)
1009                 stat->s_ntarguvhub16++;
1010         else if (hubs >= 8)
1011                 stat->s_ntarguvhub8++;
1012         else if (hubs >= 4)
1013                 stat->s_ntarguvhub4++;
1014         else if (hubs >= 2)
1015                 stat->s_ntarguvhub2++;
1016         else
1017                 stat->s_ntarguvhub1++;
1018 }
1019
1020 /*
1021  * Translate a cpu mask to the uvhub distribution mask in the BAU
1022  * activation descriptor.
1023  */
1024 static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
1025                         struct bau_desc *bau_desc, int *localsp, int *remotesp)
1026 {
1027         int cpu;
1028         int pnode;
1029         int cnt = 0;
1030         struct hub_and_pnode *hpp;
1031
1032         for_each_cpu(cpu, flush_mask) {
1033                 /*
1034                  * The distribution vector is a bit map of pnodes, relative
1035                  * to the partition base pnode (and the partition base nasid
1036                  * in the header).
1037                  * Translate cpu to pnode and hub using a local memory array.
1038                  */
1039                 hpp = &bcp->socket_master->thp[cpu];
1040                 pnode = hpp->pnode - bcp->partition_base_pnode;
1041                 bau_uvhub_set(pnode, &bau_desc->distribution);
1042                 cnt++;
1043                 if (hpp->uvhub == bcp->uvhub)
1044                         (*localsp)++;
1045                 else
1046                         (*remotesp)++;
1047         }
1048         if (!cnt)
1049                 return 1;
1050         return 0;
1051 }
1052
1053 /*
1054  * globally purge translation cache of a virtual address or all TLB's
1055  * @cpumask: mask of all cpu's in which the address is to be removed
1056  * @mm: mm_struct containing virtual address range
1057  * @start: start virtual address to be removed from TLB
1058  * @end: end virtual address to be remove from TLB
1059  * @cpu: the current cpu
1060  *
1061  * This is the entry point for initiating any UV global TLB shootdown.
1062  *
1063  * Purges the translation caches of all specified processors of the given
1064  * virtual address, or purges all TLB's on specified processors.
1065  *
1066  * The caller has derived the cpumask from the mm_struct.  This function
1067  * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
1068  *
1069  * The cpumask is converted into a uvhubmask of the uvhubs containing
1070  * those cpus.
1071  *
1072  * Note that this function should be called with preemption disabled.
1073  *
1074  * Returns NULL if all remote flushing was done.
1075  * Returns pointer to cpumask if some remote flushing remains to be
1076  * done.  The returned pointer is valid till preemption is re-enabled.
1077  */
1078 const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
1079                                                 struct mm_struct *mm,
1080                                                 unsigned long start,
1081                                                 unsigned long end,
1082                                                 unsigned int cpu)
1083 {
1084         int locals = 0;
1085         int remotes = 0;
1086         int hubs = 0;
1087         struct bau_desc *bau_desc;
1088         struct cpumask *flush_mask;
1089         struct ptc_stats *stat;
1090         struct bau_control *bcp;
1091         unsigned long descriptor_status;
1092         unsigned long status;
1093
1094         bcp = &per_cpu(bau_control, cpu);
1095
1096         if (bcp->nobau)
1097                 return cpumask;
1098
1099         stat = bcp->statp;
1100         stat->s_enters++;
1101
1102         if (bcp->busy) {
1103                 descriptor_status =
1104                         read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_0);
1105                 status = ((descriptor_status >> (bcp->uvhub_cpu *
1106                         UV_ACT_STATUS_SIZE)) & UV_ACT_STATUS_MASK) << 1;
1107                 if (status == UV2H_DESC_BUSY)
1108                         return cpumask;
1109                 bcp->busy = 0;
1110         }
1111
1112         /* bau was disabled due to slow response */
1113         if (bcp->baudisabled) {
1114                 if (check_enable(bcp, stat)) {
1115                         stat->s_ipifordisabled++;
1116                         return cpumask;
1117                 }
1118         }
1119
1120         /*
1121          * Each sending cpu has a per-cpu mask which it fills from the caller's
1122          * cpu mask.  All cpus are converted to uvhubs and copied to the
1123          * activation descriptor.
1124          */
1125         flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
1126         /* don't actually do a shootdown of the local cpu */
1127         cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
1128
1129         if (cpumask_test_cpu(cpu, cpumask))
1130                 stat->s_ntargself++;
1131
1132         bau_desc = bcp->descriptor_base;
1133         bau_desc += (ITEMS_PER_DESC * bcp->uvhub_cpu);
1134         bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
1135         if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
1136                 return NULL;
1137
1138         record_send_statistics(stat, locals, hubs, remotes, bau_desc);
1139
1140         if (!end || (end - start) <= PAGE_SIZE)
1141                 bau_desc->payload.address = start;
1142         else
1143                 bau_desc->payload.address = TLB_FLUSH_ALL;
1144         bau_desc->payload.sending_cpu = cpu;
1145         /*
1146          * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
1147          * or 1 if it gave up and the original cpumask should be returned.
1148          */
1149         if (!uv_flush_send_and_wait(flush_mask, bcp, bau_desc))
1150                 return NULL;
1151         else
1152                 return cpumask;
1153 }
1154
1155 /*
1156  * Search the message queue for any 'other' unprocessed message with the
1157  * same software acknowledge resource bit vector as the 'msg' message.
1158  */
1159 struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
1160                                            struct bau_control *bcp)
1161 {
1162         struct bau_pq_entry *msg_next = msg + 1;
1163         unsigned char swack_vec = msg->swack_vec;
1164
1165         if (msg_next > bcp->queue_last)
1166                 msg_next = bcp->queue_first;
1167         while (msg_next != msg) {
1168                 if ((msg_next->canceled == 0) && (msg_next->replied_to == 0) &&
1169                                 (msg_next->swack_vec == swack_vec))
1170                         return msg_next;
1171                 msg_next++;
1172                 if (msg_next > bcp->queue_last)
1173                         msg_next = bcp->queue_first;
1174         }
1175         return NULL;
1176 }
1177
1178 /*
1179  * UV2 needs to work around a bug in which an arriving message has not
1180  * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
1181  * Such a message must be ignored.
1182  */
1183 void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
1184 {
1185         unsigned long mmr_image;
1186         unsigned char swack_vec;
1187         struct bau_pq_entry *msg = mdp->msg;
1188         struct bau_pq_entry *other_msg;
1189
1190         mmr_image = read_mmr_sw_ack();
1191         swack_vec = msg->swack_vec;
1192
1193         if ((swack_vec & mmr_image) == 0) {
1194                 /*
1195                  * This message was assigned a swack resource, but no
1196                  * reserved acknowlegment is pending.
1197                  * The bug has prevented this message from setting the MMR.
1198                  */
1199                 /*
1200                  * Some message has set the MMR 'pending' bit; it might have
1201                  * been another message.  Look for that message.
1202                  */
1203                 other_msg = find_another_by_swack(msg, bcp);
1204                 if (other_msg) {
1205                         /*
1206                          * There is another. Process this one but do not
1207                          * ack it.
1208                          */
1209                         bau_process_message(mdp, bcp, 0);
1210                         /*
1211                          * Let the natural processing of that other message
1212                          * acknowledge it. Don't get the processing of sw_ack's
1213                          * out of order.
1214                          */
1215                         return;
1216                 }
1217         }
1218
1219         /*
1220          * Either the MMR shows this one pending a reply or there is no
1221          * other message using this sw_ack, so it is safe to acknowledge it.
1222          */
1223         bau_process_message(mdp, bcp, 1);
1224
1225         return;
1226 }
1227
1228 /*
1229  * The BAU message interrupt comes here. (registered by set_intr_gate)
1230  * See entry_64.S
1231  *
1232  * We received a broadcast assist message.
1233  *
1234  * Interrupts are disabled; this interrupt could represent
1235  * the receipt of several messages.
1236  *
1237  * All cores/threads on this hub get this interrupt.
1238  * The last one to see it does the software ack.
1239  * (the resource will not be freed until noninterruptable cpus see this
1240  *  interrupt; hardware may timeout the s/w ack and reply ERROR)
1241  */
1242 void uv_bau_message_interrupt(struct pt_regs *regs)
1243 {
1244         int count = 0;
1245         cycles_t time_start;
1246         struct bau_pq_entry *msg;
1247         struct bau_control *bcp;
1248         struct ptc_stats *stat;
1249         struct msg_desc msgdesc;
1250
1251         ack_APIC_irq();
1252         time_start = get_cycles();
1253
1254         bcp = &per_cpu(bau_control, smp_processor_id());
1255         stat = bcp->statp;
1256
1257         msgdesc.queue_first = bcp->queue_first;
1258         msgdesc.queue_last = bcp->queue_last;
1259
1260         msg = bcp->bau_msg_head;
1261         while (msg->swack_vec) {
1262                 count++;
1263
1264                 msgdesc.msg_slot = msg - msgdesc.queue_first;
1265                 msgdesc.msg = msg;
1266                 if (bcp->uvhub_version == 2)
1267                         process_uv2_message(&msgdesc, bcp);
1268                 else
1269                         /* no error workaround for uv1 or uv3 */
1270                         bau_process_message(&msgdesc, bcp, 1);
1271
1272                 msg++;
1273                 if (msg > msgdesc.queue_last)
1274                         msg = msgdesc.queue_first;
1275                 bcp->bau_msg_head = msg;
1276         }
1277         stat->d_time += (get_cycles() - time_start);
1278         if (!count)
1279                 stat->d_nomsg++;
1280         else if (count > 1)
1281                 stat->d_multmsg++;
1282 }
1283
1284 /*
1285  * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
1286  * shootdown message timeouts enabled.  The timeout does not cause
1287  * an interrupt, but causes an error message to be returned to
1288  * the sender.
1289  */
1290 static void __init enable_timeouts(void)
1291 {
1292         int uvhub;
1293         int nuvhubs;
1294         int pnode;
1295         unsigned long mmr_image;
1296
1297         nuvhubs = uv_num_possible_blades();
1298
1299         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
1300                 if (!uv_blade_nr_possible_cpus(uvhub))
1301                         continue;
1302
1303                 pnode = uv_blade_to_pnode(uvhub);
1304                 mmr_image = read_mmr_misc_control(pnode);
1305                 /*
1306                  * Set the timeout period and then lock it in, in three
1307                  * steps; captures and locks in the period.
1308                  *
1309                  * To program the period, the SOFT_ACK_MODE must be off.
1310                  */
1311                 mmr_image &= ~(1L << SOFTACK_MSHIFT);
1312                 write_mmr_misc_control(pnode, mmr_image);
1313                 /*
1314                  * Set the 4-bit period.
1315                  */
1316                 mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
1317                 mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
1318                 write_mmr_misc_control(pnode, mmr_image);
1319                 /*
1320                  * UV1:
1321                  * Subsequent reversals of the timebase bit (3) cause an
1322                  * immediate timeout of one or all INTD resources as
1323                  * indicated in bits 2:0 (7 causes all of them to timeout).
1324                  */
1325                 mmr_image |= (1L << SOFTACK_MSHIFT);
1326                 if (is_uv2_hub()) {
1327                         /* do not touch the legacy mode bit */
1328                         /* hw bug workaround; do not use extended status */
1329                         mmr_image &= ~(1L << UV2_EXT_SHFT);
1330                 } else if (is_uv3_hub()) {
1331                         mmr_image &= ~(1L << PREFETCH_HINT_SHFT);
1332                         mmr_image |= (1L << SB_STATUS_SHFT);
1333                 }
1334                 write_mmr_misc_control(pnode, mmr_image);
1335         }
1336 }
1337
1338 static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
1339 {
1340         if (*offset < num_possible_cpus())
1341                 return offset;
1342         return NULL;
1343 }
1344
1345 static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
1346 {
1347         (*offset)++;
1348         if (*offset < num_possible_cpus())
1349                 return offset;
1350         return NULL;
1351 }
1352
1353 static void ptc_seq_stop(struct seq_file *file, void *data)
1354 {
1355 }
1356
1357 /*
1358  * Display the statistics thru /proc/sgi_uv/ptc_statistics
1359  * 'data' points to the cpu number
1360  * Note: see the descriptions in stat_description[].
1361  */
1362 static int ptc_seq_show(struct seq_file *file, void *data)
1363 {
1364         struct ptc_stats *stat;
1365         struct bau_control *bcp;
1366         int cpu;
1367
1368         cpu = *(loff_t *)data;
1369         if (!cpu) {
1370                 seq_puts(file,
1371                          "# cpu bauoff sent stime self locals remotes ncpus localhub ");
1372                 seq_puts(file, "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
1373                 seq_puts(file,
1374                          "numuvhubs4 numuvhubs2 numuvhubs1 dto snacks retries ");
1375                 seq_puts(file,
1376                          "rok resetp resett giveup sto bz throt disable ");
1377                 seq_puts(file,
1378                          "enable wars warshw warwaits enters ipidis plugged ");
1379                 seq_puts(file,
1380                          "ipiover glim cong swack recv rtime all one mult ");
1381                 seq_puts(file, "none retry canc nocan reset rcan\n");
1382         }
1383         if (cpu < num_possible_cpus() && cpu_online(cpu)) {
1384                 bcp = &per_cpu(bau_control, cpu);
1385                 if (bcp->nobau) {
1386                         seq_printf(file, "cpu %d bau disabled\n", cpu);
1387                         return 0;
1388                 }
1389                 stat = bcp->statp;
1390                 /* source side statistics */
1391                 seq_printf(file,
1392                         "cpu %d %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1393                            cpu, bcp->nobau, stat->s_requestor,
1394                            cycles_2_us(stat->s_time),
1395                            stat->s_ntargself, stat->s_ntarglocals,
1396                            stat->s_ntargremotes, stat->s_ntargcpu,
1397                            stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
1398                            stat->s_ntarguvhub, stat->s_ntarguvhub16);
1399                 seq_printf(file, "%ld %ld %ld %ld %ld %ld ",
1400                            stat->s_ntarguvhub8, stat->s_ntarguvhub4,
1401                            stat->s_ntarguvhub2, stat->s_ntarguvhub1,
1402                            stat->s_dtimeout, stat->s_strongnacks);
1403                 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
1404                            stat->s_retry_messages, stat->s_retriesok,
1405                            stat->s_resets_plug, stat->s_resets_timeout,
1406                            stat->s_giveup, stat->s_stimeout,
1407                            stat->s_busy, stat->s_throttles);
1408                 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1409                            stat->s_bau_disabled, stat->s_bau_reenabled,
1410                            stat->s_uv2_wars, stat->s_uv2_wars_hw,
1411                            stat->s_uv2_war_waits, stat->s_enters,
1412                            stat->s_ipifordisabled, stat->s_plugged,
1413                            stat->s_overipilimit, stat->s_giveuplimit,
1414                            stat->s_congested);
1415
1416                 /* destination side statistics */
1417                 seq_printf(file,
1418                         "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
1419                            read_gmmr_sw_ack(uv_cpu_to_pnode(cpu)),
1420                            stat->d_requestee, cycles_2_us(stat->d_time),
1421                            stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
1422                            stat->d_nomsg, stat->d_retries, stat->d_canceled,
1423                            stat->d_nocanceled, stat->d_resets,
1424                            stat->d_rcanceled);
1425         }
1426         return 0;
1427 }
1428
1429 /*
1430  * Display the tunables thru debugfs
1431  */
1432 static ssize_t tunables_read(struct file *file, char __user *userbuf,
1433                                 size_t count, loff_t *ppos)
1434 {
1435         char *buf;
1436         int ret;
1437
1438         buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d %d\n",
1439                 "max_concur plugged_delay plugsb4reset timeoutsb4reset",
1440                 "ipi_reset_limit complete_threshold congested_response_us",
1441                 "congested_reps disabled_period giveup_limit",
1442                 max_concurr, plugged_delay, plugsb4reset,
1443                 timeoutsb4reset, ipi_reset_limit, complete_threshold,
1444                 congested_respns_us, congested_reps, disabled_period,
1445                 giveup_limit);
1446
1447         if (!buf)
1448                 return -ENOMEM;
1449
1450         ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
1451         kfree(buf);
1452         return ret;
1453 }
1454
1455 /*
1456  * handle a write to /proc/sgi_uv/ptc_statistics
1457  * -1: reset the statistics
1458  *  0: display meaning of the statistics
1459  */
1460 static ssize_t ptc_proc_write(struct file *file, const char __user *user,
1461                                 size_t count, loff_t *data)
1462 {
1463         int cpu;
1464         int i;
1465         int elements;
1466         long input_arg;
1467         char optstr[64];
1468         struct ptc_stats *stat;
1469
1470         if (count == 0 || count > sizeof(optstr))
1471                 return -EINVAL;
1472         if (copy_from_user(optstr, user, count))
1473                 return -EFAULT;
1474         optstr[count - 1] = '\0';
1475
1476         if (!strcmp(optstr, "on")) {
1477                 set_bau_on();
1478                 return count;
1479         } else if (!strcmp(optstr, "off")) {
1480                 set_bau_off();
1481                 return count;
1482         }
1483
1484         if (kstrtol(optstr, 10, &input_arg) < 0) {
1485                 printk(KERN_DEBUG "%s is invalid\n", optstr);
1486                 return -EINVAL;
1487         }
1488
1489         if (input_arg == 0) {
1490                 elements = ARRAY_SIZE(stat_description);
1491                 printk(KERN_DEBUG "# cpu:      cpu number\n");
1492                 printk(KERN_DEBUG "Sender statistics:\n");
1493                 for (i = 0; i < elements; i++)
1494                         printk(KERN_DEBUG "%s\n", stat_description[i]);
1495         } else if (input_arg == -1) {
1496                 for_each_present_cpu(cpu) {
1497                         stat = &per_cpu(ptcstats, cpu);
1498                         memset(stat, 0, sizeof(struct ptc_stats));
1499                 }
1500         }
1501
1502         return count;
1503 }
1504
1505 static int local_atoi(const char *name)
1506 {
1507         int val = 0;
1508
1509         for (;; name++) {
1510                 switch (*name) {
1511                 case '0' ... '9':
1512                         val = 10*val+(*name-'0');
1513                         break;
1514                 default:
1515                         return val;
1516                 }
1517         }
1518 }
1519
1520 /*
1521  * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
1522  * Zero values reset them to defaults.
1523  */
1524 static int parse_tunables_write(struct bau_control *bcp, char *instr,
1525                                 int count)
1526 {
1527         char *p;
1528         char *q;
1529         int cnt = 0;
1530         int val;
1531         int e = ARRAY_SIZE(tunables);
1532
1533         p = instr + strspn(instr, WHITESPACE);
1534         q = p;
1535         for (; *p; p = q + strspn(q, WHITESPACE)) {
1536                 q = p + strcspn(p, WHITESPACE);
1537                 cnt++;
1538                 if (q == p)
1539                         break;
1540         }
1541         if (cnt != e) {
1542                 printk(KERN_INFO "bau tunable error: should be %d values\n", e);
1543                 return -EINVAL;
1544         }
1545
1546         p = instr + strspn(instr, WHITESPACE);
1547         q = p;
1548         for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
1549                 q = p + strcspn(p, WHITESPACE);
1550                 val = local_atoi(p);
1551                 switch (cnt) {
1552                 case 0:
1553                         if (val == 0) {
1554                                 max_concurr = MAX_BAU_CONCURRENT;
1555                                 max_concurr_const = MAX_BAU_CONCURRENT;
1556                                 continue;
1557                         }
1558                         if (val < 1 || val > bcp->cpus_in_uvhub) {
1559                                 printk(KERN_DEBUG
1560                                 "Error: BAU max concurrent %d is invalid\n",
1561                                 val);
1562                                 return -EINVAL;
1563                         }
1564                         max_concurr = val;
1565                         max_concurr_const = val;
1566                         continue;
1567                 default:
1568                         if (val == 0)
1569                                 *tunables[cnt].tunp = tunables[cnt].deflt;
1570                         else
1571                                 *tunables[cnt].tunp = val;
1572                         continue;
1573                 }
1574                 if (q == p)
1575                         break;
1576         }
1577         return 0;
1578 }
1579
1580 /*
1581  * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
1582  */
1583 static ssize_t tunables_write(struct file *file, const char __user *user,
1584                                 size_t count, loff_t *data)
1585 {
1586         int cpu;
1587         int ret;
1588         char instr[100];
1589         struct bau_control *bcp;
1590
1591         if (count == 0 || count > sizeof(instr)-1)
1592                 return -EINVAL;
1593         if (copy_from_user(instr, user, count))
1594                 return -EFAULT;
1595
1596         instr[count] = '\0';
1597
1598         cpu = get_cpu();
1599         bcp = &per_cpu(bau_control, cpu);
1600         ret = parse_tunables_write(bcp, instr, count);
1601         put_cpu();
1602         if (ret)
1603                 return ret;
1604
1605         for_each_present_cpu(cpu) {
1606                 bcp = &per_cpu(bau_control, cpu);
1607                 bcp->max_concurr =              max_concurr;
1608                 bcp->max_concurr_const =        max_concurr;
1609                 bcp->plugged_delay =            plugged_delay;
1610                 bcp->plugsb4reset =             plugsb4reset;
1611                 bcp->timeoutsb4reset =          timeoutsb4reset;
1612                 bcp->ipi_reset_limit =          ipi_reset_limit;
1613                 bcp->complete_threshold =       complete_threshold;
1614                 bcp->cong_response_us =         congested_respns_us;
1615                 bcp->cong_reps =                congested_reps;
1616                 bcp->disabled_period =          sec_2_cycles(disabled_period);
1617                 bcp->giveup_limit =             giveup_limit;
1618         }
1619         return count;
1620 }
1621
1622 static const struct seq_operations uv_ptc_seq_ops = {
1623         .start          = ptc_seq_start,
1624         .next           = ptc_seq_next,
1625         .stop           = ptc_seq_stop,
1626         .show           = ptc_seq_show
1627 };
1628
1629 static int ptc_proc_open(struct inode *inode, struct file *file)
1630 {
1631         return seq_open(file, &uv_ptc_seq_ops);
1632 }
1633
1634 static int tunables_open(struct inode *inode, struct file *file)
1635 {
1636         return 0;
1637 }
1638
1639 static const struct file_operations proc_uv_ptc_operations = {
1640         .open           = ptc_proc_open,
1641         .read           = seq_read,
1642         .write          = ptc_proc_write,
1643         .llseek         = seq_lseek,
1644         .release        = seq_release,
1645 };
1646
1647 static const struct file_operations tunables_fops = {
1648         .open           = tunables_open,
1649         .read           = tunables_read,
1650         .write          = tunables_write,
1651         .llseek         = default_llseek,
1652 };
1653
1654 static int __init uv_ptc_init(void)
1655 {
1656         struct proc_dir_entry *proc_uv_ptc;
1657
1658         if (!is_uv_system())
1659                 return 0;
1660
1661         proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
1662                                   &proc_uv_ptc_operations);
1663         if (!proc_uv_ptc) {
1664                 printk(KERN_ERR "unable to create %s proc entry\n",
1665                        UV_PTC_BASENAME);
1666                 return -EINVAL;
1667         }
1668
1669         tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
1670         if (!tunables_dir) {
1671                 printk(KERN_ERR "unable to create debugfs directory %s\n",
1672                        UV_BAU_TUNABLES_DIR);
1673                 return -EINVAL;
1674         }
1675         tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
1676                                         tunables_dir, NULL, &tunables_fops);
1677         if (!tunables_file) {
1678                 printk(KERN_ERR "unable to create debugfs file %s\n",
1679                        UV_BAU_TUNABLES_FILE);
1680                 return -EINVAL;
1681         }
1682         return 0;
1683 }
1684
1685 /*
1686  * Initialize the sending side's sending buffers.
1687  */
1688 static void activation_descriptor_init(int node, int pnode, int base_pnode)
1689 {
1690         int i;
1691         int cpu;
1692         int uv1 = 0;
1693         unsigned long gpa;
1694         unsigned long m;
1695         unsigned long n;
1696         size_t dsize;
1697         struct bau_desc *bau_desc;
1698         struct bau_desc *bd2;
1699         struct uv1_bau_msg_header *uv1_hdr;
1700         struct uv2_3_bau_msg_header *uv2_3_hdr;
1701         struct bau_control *bcp;
1702
1703         /*
1704          * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
1705          * per cpu; and one per cpu on the uvhub (ADP_SZ)
1706          */
1707         dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
1708         bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
1709         BUG_ON(!bau_desc);
1710
1711         gpa = uv_gpa(bau_desc);
1712         n = uv_gpa_to_gnode(gpa);
1713         m = uv_gpa_to_offset(gpa);
1714         if (is_uv1_hub())
1715                 uv1 = 1;
1716
1717         /* the 14-bit pnode */
1718         write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
1719         /*
1720          * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
1721          * cpu even though we only use the first one; one descriptor can
1722          * describe a broadcast to 256 uv hubs.
1723          */
1724         for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
1725                 memset(bd2, 0, sizeof(struct bau_desc));
1726                 if (uv1) {
1727                         uv1_hdr = &bd2->header.uv1_hdr;
1728                         uv1_hdr->swack_flag =   1;
1729                         /*
1730                          * The base_dest_nasid set in the message header
1731                          * is the nasid of the first uvhub in the partition.
1732                          * The bit map will indicate destination pnode numbers
1733                          * relative to that base. They may not be consecutive
1734                          * if nasid striding is being used.
1735                          */
1736                         uv1_hdr->base_dest_nasid =
1737                                                 UV_PNODE_TO_NASID(base_pnode);
1738                         uv1_hdr->dest_subnodeid =       UV_LB_SUBNODEID;
1739                         uv1_hdr->command =              UV_NET_ENDPOINT_INTD;
1740                         uv1_hdr->int_both =             1;
1741                         /*
1742                          * all others need to be set to zero:
1743                          *   fairness chaining multilevel count replied_to
1744                          */
1745                 } else {
1746                         /*
1747                          * BIOS uses legacy mode, but uv2 and uv3 hardware always
1748                          * uses native mode for selective broadcasts.
1749                          */
1750                         uv2_3_hdr = &bd2->header.uv2_3_hdr;
1751                         uv2_3_hdr->swack_flag = 1;
1752                         uv2_3_hdr->base_dest_nasid =
1753                                                 UV_PNODE_TO_NASID(base_pnode);
1754                         uv2_3_hdr->dest_subnodeid =     UV_LB_SUBNODEID;
1755                         uv2_3_hdr->command =            UV_NET_ENDPOINT_INTD;
1756                 }
1757         }
1758         for_each_present_cpu(cpu) {
1759                 if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
1760                         continue;
1761                 bcp = &per_cpu(bau_control, cpu);
1762                 bcp->descriptor_base = bau_desc;
1763         }
1764 }
1765
1766 /*
1767  * initialize the destination side's receiving buffers
1768  * entered for each uvhub in the partition
1769  * - node is first node (kernel memory notion) on the uvhub
1770  * - pnode is the uvhub's physical identifier
1771  */
1772 static void pq_init(int node, int pnode)
1773 {
1774         int cpu;
1775         size_t plsize;
1776         char *cp;
1777         void *vp;
1778         unsigned long pn;
1779         unsigned long first;
1780         unsigned long pn_first;
1781         unsigned long last;
1782         struct bau_pq_entry *pqp;
1783         struct bau_control *bcp;
1784
1785         plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
1786         vp = kmalloc_node(plsize, GFP_KERNEL, node);
1787         pqp = (struct bau_pq_entry *)vp;
1788         BUG_ON(!pqp);
1789
1790         cp = (char *)pqp + 31;
1791         pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
1792
1793         for_each_present_cpu(cpu) {
1794                 if (pnode != uv_cpu_to_pnode(cpu))
1795                         continue;
1796                 /* for every cpu on this pnode: */
1797                 bcp = &per_cpu(bau_control, cpu);
1798                 bcp->queue_first        = pqp;
1799                 bcp->bau_msg_head       = pqp;
1800                 bcp->queue_last         = pqp + (DEST_Q_SIZE - 1);
1801         }
1802         /*
1803          * need the gnode of where the memory was really allocated
1804          */
1805         pn = uv_gpa_to_gnode(uv_gpa(pqp));
1806         first = uv_physnodeaddr(pqp);
1807         pn_first = ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | first;
1808         last = uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1));
1809         write_mmr_payload_first(pnode, pn_first);
1810         write_mmr_payload_tail(pnode, first);
1811         write_mmr_payload_last(pnode, last);
1812         write_gmmr_sw_ack(pnode, 0xffffUL);
1813
1814         /* in effect, all msg_type's are set to MSG_NOOP */
1815         memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
1816 }
1817
1818 /*
1819  * Initialization of each UV hub's structures
1820  */
1821 static void __init init_uvhub(int uvhub, int vector, int base_pnode)
1822 {
1823         int node;
1824         int pnode;
1825         unsigned long apicid;
1826
1827         node = uvhub_to_first_node(uvhub);
1828         pnode = uv_blade_to_pnode(uvhub);
1829
1830         activation_descriptor_init(node, pnode, base_pnode);
1831
1832         pq_init(node, pnode);
1833         /*
1834          * The below initialization can't be in firmware because the
1835          * messaging IRQ will be determined by the OS.
1836          */
1837         apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
1838         write_mmr_data_config(pnode, ((apicid << 32) | vector));
1839 }
1840
1841 /*
1842  * We will set BAU_MISC_CONTROL with a timeout period.
1843  * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
1844  * So the destination timeout period has to be calculated from them.
1845  */
1846 static int calculate_destination_timeout(void)
1847 {
1848         unsigned long mmr_image;
1849         int mult1;
1850         int mult2;
1851         int index;
1852         int base;
1853         int ret;
1854         unsigned long ts_ns;
1855
1856         if (is_uv1_hub()) {
1857                 mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
1858                 mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
1859                 index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
1860                 mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
1861                 mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
1862                 ts_ns = timeout_base_ns[index];
1863                 ts_ns *= (mult1 * mult2);
1864                 ret = ts_ns / 1000;
1865         } else {
1866                 /* same destination timeout for uv2 and uv3 */
1867                 /* 4 bits  0/1 for 10/80us base, 3 bits of multiplier */
1868                 mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
1869                 mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
1870                 if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
1871                         base = 80;
1872                 else
1873                         base = 10;
1874                 mult1 = mmr_image & UV2_ACK_MASK;
1875                 ret = mult1 * base;
1876         }
1877         return ret;
1878 }
1879
1880 static void __init init_per_cpu_tunables(void)
1881 {
1882         int cpu;
1883         struct bau_control *bcp;
1884
1885         for_each_present_cpu(cpu) {
1886                 bcp = &per_cpu(bau_control, cpu);
1887                 bcp->baudisabled                = 0;
1888                 if (nobau)
1889                         bcp->nobau              = 1;
1890                 bcp->statp                      = &per_cpu(ptcstats, cpu);
1891                 /* time interval to catch a hardware stay-busy bug */
1892                 bcp->timeout_interval           = usec_2_cycles(2*timeout_us);
1893                 bcp->max_concurr                = max_concurr;
1894                 bcp->max_concurr_const          = max_concurr;
1895                 bcp->plugged_delay              = plugged_delay;
1896                 bcp->plugsb4reset               = plugsb4reset;
1897                 bcp->timeoutsb4reset            = timeoutsb4reset;
1898                 bcp->ipi_reset_limit            = ipi_reset_limit;
1899                 bcp->complete_threshold         = complete_threshold;
1900                 bcp->cong_response_us           = congested_respns_us;
1901                 bcp->cong_reps                  = congested_reps;
1902                 bcp->disabled_period =          sec_2_cycles(disabled_period);
1903                 bcp->giveup_limit =             giveup_limit;
1904                 raw_spin_lock_init(&bcp->queue_lock);
1905                 raw_spin_lock_init(&bcp->uvhub_lock);
1906                 raw_spin_lock_init(&bcp->disable_lock);
1907         }
1908 }
1909
1910 /*
1911  * Scan all cpus to collect blade and socket summaries.
1912  */
1913 static int __init get_cpu_topology(int base_pnode,
1914                                         struct uvhub_desc *uvhub_descs,
1915                                         unsigned char *uvhub_mask)
1916 {
1917         int cpu;
1918         int pnode;
1919         int uvhub;
1920         int socket;
1921         struct bau_control *bcp;
1922         struct uvhub_desc *bdp;
1923         struct socket_desc *sdp;
1924
1925         for_each_present_cpu(cpu) {
1926                 bcp = &per_cpu(bau_control, cpu);
1927
1928                 memset(bcp, 0, sizeof(struct bau_control));
1929
1930                 pnode = uv_cpu_hub_info(cpu)->pnode;
1931                 if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
1932                         printk(KERN_EMERG
1933                                 "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
1934                                 cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
1935                         return 1;
1936                 }
1937
1938                 bcp->osnode = cpu_to_node(cpu);
1939                 bcp->partition_base_pnode = base_pnode;
1940
1941                 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1942                 *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
1943                 bdp = &uvhub_descs[uvhub];
1944
1945                 bdp->num_cpus++;
1946                 bdp->uvhub = uvhub;
1947                 bdp->pnode = pnode;
1948
1949                 /* kludge: 'assuming' one node per socket, and assuming that
1950                    disabling a socket just leaves a gap in node numbers */
1951                 socket = bcp->osnode & 1;
1952                 bdp->socket_mask |= (1 << socket);
1953                 sdp = &bdp->socket[socket];
1954                 sdp->cpu_number[sdp->num_cpus] = cpu;
1955                 sdp->num_cpus++;
1956                 if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
1957                         printk(KERN_EMERG "%d cpus per socket invalid\n",
1958                                 sdp->num_cpus);
1959                         return 1;
1960                 }
1961         }
1962         return 0;
1963 }
1964
1965 /*
1966  * Each socket is to get a local array of pnodes/hubs.
1967  */
1968 static void make_per_cpu_thp(struct bau_control *smaster)
1969 {
1970         int cpu;
1971         size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
1972
1973         smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
1974         memset(smaster->thp, 0, hpsz);
1975         for_each_present_cpu(cpu) {
1976                 smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
1977                 smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1978         }
1979 }
1980
1981 /*
1982  * Each uvhub is to get a local cpumask.
1983  */
1984 static void make_per_hub_cpumask(struct bau_control *hmaster)
1985 {
1986         int sz = sizeof(cpumask_t);
1987
1988         hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
1989 }
1990
1991 /*
1992  * Initialize all the per_cpu information for the cpu's on a given socket,
1993  * given what has been gathered into the socket_desc struct.
1994  * And reports the chosen hub and socket masters back to the caller.
1995  */
1996 static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
1997                         struct bau_control **smasterp,
1998                         struct bau_control **hmasterp)
1999 {
2000         int i;
2001         int cpu;
2002         struct bau_control *bcp;
2003
2004         for (i = 0; i < sdp->num_cpus; i++) {
2005                 cpu = sdp->cpu_number[i];
2006                 bcp = &per_cpu(bau_control, cpu);
2007                 bcp->cpu = cpu;
2008                 if (i == 0) {
2009                         *smasterp = bcp;
2010                         if (!(*hmasterp))
2011                                 *hmasterp = bcp;
2012                 }
2013                 bcp->cpus_in_uvhub = bdp->num_cpus;
2014                 bcp->cpus_in_socket = sdp->num_cpus;
2015                 bcp->socket_master = *smasterp;
2016                 bcp->uvhub = bdp->uvhub;
2017                 if (is_uv1_hub())
2018                         bcp->uvhub_version = 1;
2019                 else if (is_uv2_hub())
2020                         bcp->uvhub_version = 2;
2021                 else if (is_uv3_hub())
2022                         bcp->uvhub_version = 3;
2023                 else {
2024                         printk(KERN_EMERG "uvhub version not 1, 2 or 3\n");
2025                         return 1;
2026                 }
2027                 bcp->uvhub_master = *hmasterp;
2028                 bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->blade_processor_id;
2029                 if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
2030                         printk(KERN_EMERG "%d cpus per uvhub invalid\n",
2031                                 bcp->uvhub_cpu);
2032                         return 1;
2033                 }
2034         }
2035         return 0;
2036 }
2037
2038 /*
2039  * Summarize the blade and socket topology into the per_cpu structures.
2040  */
2041 static int __init summarize_uvhub_sockets(int nuvhubs,
2042                         struct uvhub_desc *uvhub_descs,
2043                         unsigned char *uvhub_mask)
2044 {
2045         int socket;
2046         int uvhub;
2047         unsigned short socket_mask;
2048
2049         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2050                 struct uvhub_desc *bdp;
2051                 struct bau_control *smaster = NULL;
2052                 struct bau_control *hmaster = NULL;
2053
2054                 if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
2055                         continue;
2056
2057                 bdp = &uvhub_descs[uvhub];
2058                 socket_mask = bdp->socket_mask;
2059                 socket = 0;
2060                 while (socket_mask) {
2061                         struct socket_desc *sdp;
2062                         if ((socket_mask & 1)) {
2063                                 sdp = &bdp->socket[socket];
2064                                 if (scan_sock(sdp, bdp, &smaster, &hmaster))
2065                                         return 1;
2066                                 make_per_cpu_thp(smaster);
2067                         }
2068                         socket++;
2069                         socket_mask = (socket_mask >> 1);
2070                 }
2071                 make_per_hub_cpumask(hmaster);
2072         }
2073         return 0;
2074 }
2075
2076 /*
2077  * initialize the bau_control structure for each cpu
2078  */
2079 static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
2080 {
2081         unsigned char *uvhub_mask;
2082         void *vp;
2083         struct uvhub_desc *uvhub_descs;
2084
2085         timeout_us = calculate_destination_timeout();
2086
2087         vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
2088         uvhub_descs = (struct uvhub_desc *)vp;
2089         memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
2090         uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
2091
2092         if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
2093                 goto fail;
2094
2095         if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
2096                 goto fail;
2097
2098         kfree(uvhub_descs);
2099         kfree(uvhub_mask);
2100         init_per_cpu_tunables();
2101         return 0;
2102
2103 fail:
2104         kfree(uvhub_descs);
2105         kfree(uvhub_mask);
2106         return 1;
2107 }
2108
2109 /*
2110  * Initialization of BAU-related structures
2111  */
2112 static int __init uv_bau_init(void)
2113 {
2114         int uvhub;
2115         int pnode;
2116         int nuvhubs;
2117         int cur_cpu;
2118         int cpus;
2119         int vector;
2120         cpumask_var_t *mask;
2121
2122         if (!is_uv_system())
2123                 return 0;
2124
2125         for_each_possible_cpu(cur_cpu) {
2126                 mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
2127                 zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
2128         }
2129
2130         nuvhubs = uv_num_possible_blades();
2131         congested_cycles = usec_2_cycles(congested_respns_us);
2132
2133         uv_base_pnode = 0x7fffffff;
2134         for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2135                 cpus = uv_blade_nr_possible_cpus(uvhub);
2136                 if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
2137                         uv_base_pnode = uv_blade_to_pnode(uvhub);
2138         }
2139
2140         enable_timeouts();
2141
2142         if (init_per_cpu(nuvhubs, uv_base_pnode)) {
2143                 set_bau_off();
2144                 nobau_perm = 1;
2145                 return 0;
2146         }
2147
2148         vector = UV_BAU_MESSAGE;
2149         for_each_possible_blade(uvhub) {
2150                 if (uv_blade_nr_possible_cpus(uvhub))
2151                         init_uvhub(uvhub, vector, uv_base_pnode);
2152         }
2153
2154         alloc_intr_gate(vector, uv_bau_message_intr1);
2155
2156         for_each_possible_blade(uvhub) {
2157                 if (uv_blade_nr_possible_cpus(uvhub)) {
2158                         unsigned long val;
2159                         unsigned long mmr;
2160                         pnode = uv_blade_to_pnode(uvhub);
2161                         /* INIT the bau */
2162                         val = 1L << 63;
2163                         write_gmmr_activation(pnode, val);
2164                         mmr = 1; /* should be 1 to broadcast to both sockets */
2165                         if (!is_uv1_hub())
2166                                 write_mmr_data_broadcast(pnode, mmr);
2167                 }
2168         }
2169
2170         return 0;
2171 }
2172 core_initcall(uv_bau_init);
2173 fs_initcall(uv_ptc_init);