kernel/arch/x86/pci/acpi.c

   1 #include <linux/pci.h>
   2 #include <linux/acpi.h>
   3 #include <linux/init.h>
   4 #include <linux/irq.h>
   5 #include <linux/dmi.h>
   6 #include <linux/slab.h>
   7 #include <asm/numa.h>
   8 #include <asm/pci_x86.h>
   9
  10 struct pci_root_info {
  11         struct acpi_device *bridge;
  12         char name[16];
  13         struct pci_sysdata sd;
  14 #ifdef  CONFIG_PCI_MMCONFIG
  15         bool mcfg_added;
  16         u16 segment;
  17         u8 start_bus;
  18         u8 end_bus;
  19 #endif
  20 };
  21
  22 static bool pci_use_crs = true;
  23 static bool pci_ignore_seg = false;
  24
  25 static int __init set_use_crs(const struct dmi_system_id *id)
  26 {
  27         pci_use_crs = true;
  28         return 0;
  29 }
  30
  31 static int __init set_nouse_crs(const struct dmi_system_id *id)
  32 {
  33         pci_use_crs = false;
  34         return 0;
  35 }
  36
  37 static int __init set_ignore_seg(const struct dmi_system_id *id)
  38 {
  39         printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
  40         pci_ignore_seg = true;
  41         return 0;
  42 }
  43
  44 static const struct dmi_system_id pci_crs_quirks[] __initconst = {
  45         /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
  46         {
  47                 .callback = set_use_crs,
  48                 .ident = "IBM System x3800",
  49                 .matches = {
  50                         DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  51                         DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
  52                 },
  53         },
  54         /* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
  55         /* 2006 AMD HT/VIA system with two host bridges */
  56         {
  57                 .callback = set_use_crs,
  58                 .ident = "ASRock ALiveSATA2-GLAN",
  59                 .matches = {
  60                         DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
  61                 },
  62         },
  63         /* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
  64         /* 2006 AMD HT/VIA system with two host bridges */
  65         {
  66                 .callback = set_use_crs,
  67                 .ident = "ASUS M2V-MX SE",
  68                 .matches = {
  69                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  70                         DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
  71                         DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
  72                 },
  73         },
  74         /* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
  75         {
  76                 .callback = set_use_crs,
  77                 .ident = "MSI MS-7253",
  78                 .matches = {
  79                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  80                         DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
  81                         DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
  82                 },
  83         },
  84         /* https://bugs.launchpad.net/ubuntu/+source/alsa-driver/+bug/931368 */
  85         /* https://bugs.launchpad.net/ubuntu/+source/alsa-driver/+bug/1033299 */
  86         {
  87                 .callback = set_use_crs,
  88                 .ident = "Foxconn K8M890-8237A",
  89                 .matches = {
  90                         DMI_MATCH(DMI_BOARD_VENDOR, "Foxconn"),
  91                         DMI_MATCH(DMI_BOARD_NAME, "K8M890-8237A"),
  92                         DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
  93                 },
  94         },
  95
  96         /* Now for the blacklist.. */
  97
  98         /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
  99         {
 100                 .callback = set_nouse_crs,
 101                 .ident = "Dell Studio 1557",
 102                 .matches = {
 103                         DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
 104                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
 105                         DMI_MATCH(DMI_BIOS_VERSION, "A09"),
 106                 },
 107         },
 108         /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
 109         {
 110                 .callback = set_nouse_crs,
 111                 .ident = "Thinkpad SL510",
 112                 .matches = {
 113                         DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
 114                         DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
 115                         DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
 116                 },
 117         },
 118
 119         /* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
 120         {
 121                 .callback = set_ignore_seg,
 122                 .ident = "HP xw9300",
 123                 .matches = {
 124                         DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
 125                         DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
 126                 },
 127         },
 128         {}
 129 };
 130
 131 void __init pci_acpi_crs_quirks(void)
 132 {
 133         int year;
 134
 135         if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008) {
 136                 if (iomem_resource.end <= 0xffffffff)
 137                         pci_use_crs = false;
 138         }
 139
 140         dmi_check_system(pci_crs_quirks);
 141
 142         /*
 143          * If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
 144          * takes precedence over anything we figured out above.
 145          */
 146         if (pci_probe & PCI_ROOT_NO_CRS)
 147                 pci_use_crs = false;
 148         else if (pci_probe & PCI_USE__CRS)
 149                 pci_use_crs = true;
 150
 151         printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
 152                "if necessary, use \"pci=%s\" and report a bug\n",
 153                pci_use_crs ? "Using" : "Ignoring",
 154                pci_use_crs ? "nocrs" : "use_crs");
 155 }
 156
 157 #ifdef  CONFIG_PCI_MMCONFIG
 158 static int check_segment(u16 seg, struct device *dev, char *estr)
 159 {
 160         if (seg) {
 161                 dev_err(dev,
 162                         "%s can't access PCI configuration "
 163                         "space under this host bridge.\n",
 164                         estr);
 165                 return -EIO;
 166         }
 167
 168         /*
 169          * Failure in adding MMCFG information is not fatal,
 170          * just can't access extended configuration space of
 171          * devices under this host bridge.
 172          */
 173         dev_warn(dev,
 174                  "%s can't access extended PCI configuration "
 175                  "space under this bridge.\n",
 176                  estr);
 177
 178         return 0;
 179 }
 180
 181 static int setup_mcfg_map(struct pci_root_info *info, u16 seg, u8 start,
 182                           u8 end, phys_addr_t addr)
 183 {
 184         int result;
 185         struct device *dev = &info->bridge->dev;
 186
 187         info->start_bus = start;
 188         info->end_bus = end;
 189         info->mcfg_added = false;
 190
 191         /* return success if MMCFG is not in use */
 192         if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
 193                 return 0;
 194
 195         if (!(pci_probe & PCI_PROBE_MMCONF))
 196                 return check_segment(seg, dev, "MMCONFIG is disabled,");
 197
 198         result = pci_mmconfig_insert(dev, seg, start, end, addr);
 199         if (result == 0) {
 200                 /* enable MMCFG if it hasn't been enabled yet */
 201                 if (raw_pci_ext_ops == NULL)
 202                         raw_pci_ext_ops = &pci_mmcfg;
 203                 info->mcfg_added = true;
 204         } else if (result != -EEXIST)
 205                 return check_segment(seg, dev,
 206                          "fail to add MMCONFIG information,");
 207
 208         return 0;
 209 }
 210
 211 static void teardown_mcfg_map(struct pci_root_info *info)
 212 {
 213         if (info->mcfg_added) {
 214                 pci_mmconfig_delete(info->segment, info->start_bus,
 215                                     info->end_bus);
 216                 info->mcfg_added = false;
 217         }
 218 }
 219 #else
 220 static int setup_mcfg_map(struct pci_root_info *info,
 221                                     u16 seg, u8 start, u8 end,
 222                                     phys_addr_t addr)
 223 {
 224         return 0;
 225 }
 226 static void teardown_mcfg_map(struct pci_root_info *info)
 227 {
 228 }
 229 #endif
 230
 231 static void validate_resources(struct device *dev, struct list_head *crs_res,
 232                                unsigned long type)
 233 {
 234         LIST_HEAD(list);
 235         struct resource *res1, *res2, *root = NULL;
 236         struct resource_entry *tmp, *entry, *entry2;
 237
 238         BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
 239         root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
 240
 241         list_splice_init(crs_res, &list);
 242         resource_list_for_each_entry_safe(entry, tmp, &list) {
 243                 bool free = false;
 244                 resource_size_t end;
 245
 246                 res1 = entry->res;
 247                 if (!(res1->flags & type))
 248                         goto next;
 249
 250                 /* Exclude non-addressable range or non-addressable portion */
 251                 end = min(res1->end, root->end);
 252                 if (end <= res1->start) {
 253                         dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
 254                                  res1);
 255                         free = true;
 256                         goto next;
 257                 } else if (res1->end != end) {
 258                         dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
 259                                  res1, (unsigned long long)end + 1,
 260                                  (unsigned long long)res1->end);
 261                         res1->end = end;
 262                 }
 263
 264                 resource_list_for_each_entry(entry2, crs_res) {
 265                         res2 = entry2->res;
 266                         if (!(res2->flags & type))
 267                                 continue;
 268
 269                         /*
 270                          * I don't like throwing away windows because then
 271                          * our resources no longer match the ACPI _CRS, but
 272                          * the kernel resource tree doesn't allow overlaps.
 273                          */
 274                         if (resource_overlaps(res1, res2)) {
 275                                 res2->start = min(res1->start, res2->start);
 276                                 res2->end = max(res1->end, res2->end);
 277                                 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
 278                                          res2, res1);
 279                                 free = true;
 280                                 goto next;
 281                         }
 282                 }
 283
 284 next:
 285                 resource_list_del(entry);
 286                 if (free)
 287                         resource_list_free_entry(entry);
 288                 else
 289                         resource_list_add_tail(entry, crs_res);
 290         }
 291 }
 292
 293 static void add_resources(struct pci_root_info *info,
 294                           struct list_head *resources,
 295                           struct list_head *crs_res)
 296 {
 297         struct resource_entry *entry, *tmp;
 298         struct resource *res, *conflict, *root = NULL;
 299
 300         validate_resources(&info->bridge->dev, crs_res, IORESOURCE_MEM);
 301         validate_resources(&info->bridge->dev, crs_res, IORESOURCE_IO);
 302
 303         resource_list_for_each_entry_safe(entry, tmp, crs_res) {
 304                 res = entry->res;
 305                 if (res->flags & IORESOURCE_MEM)
 306                         root = &iomem_resource;
 307                 else if (res->flags & IORESOURCE_IO)
 308                         root = &ioport_resource;
 309                 else
 310                         BUG_ON(res);
 311
 312                 conflict = insert_resource_conflict(root, res);
 313                 if (conflict) {
 314                         dev_info(&info->bridge->dev,
 315                                  "ignoring host bridge window %pR (conflicts with %s %pR)\n",
 316                                  res, conflict->name, conflict);
 317                         resource_list_destroy_entry(entry);
 318                 }
 319         }
 320
 321         list_splice_tail(crs_res, resources);
 322 }
 323
 324 static void release_pci_root_info(struct pci_host_bridge *bridge)
 325 {
 326         struct resource *res;
 327         struct resource_entry *entry;
 328         struct pci_root_info *info = bridge->release_data;
 329
 330         resource_list_for_each_entry(entry, &bridge->windows) {
 331                 res = entry->res;
 332                 if (res->parent &&
 333                     (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
 334                         release_resource(res);
 335         }
 336
 337         teardown_mcfg_map(info);
 338         kfree(info);
 339 }
 340
 341 /*
 342  * An IO port or MMIO resource assigned to a PCI host bridge may be
 343  * consumed by the host bridge itself or available to its child
 344  * bus/devices. The ACPI specification defines a bit (Producer/Consumer)
 345  * to tell whether the resource is consumed by the host bridge itself,
 346  * but firmware hasn't used that bit consistently, so we can't rely on it.
 347  *
 348  * On x86 and IA64 platforms, all IO port and MMIO resources are assumed
 349  * to be available to child bus/devices except one special case:
 350  *     IO port [0xCF8-0xCFF] is consumed by the host bridge itself
 351  *     to access PCI configuration space.
 352  *
 353  * So explicitly filter out PCI CFG IO ports[0xCF8-0xCFF].
 354  */
 355 static bool resource_is_pcicfg_ioport(struct resource *res)
 356 {
 357         return (res->flags & IORESOURCE_IO) &&
 358                 res->start == 0xCF8 && res->end == 0xCFF;
 359 }
 360
 361 static void probe_pci_root_info(struct pci_root_info *info,
 362                                 struct acpi_device *device,
 363                                 int busnum, int domain,
 364                                 struct list_head *list)
 365 {
 366         int ret;
 367         struct resource_entry *entry, *tmp;
 368
 369         sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
 370         info->bridge = device;
 371         ret = acpi_dev_get_resources(device, list,
 372                                      acpi_dev_filter_resource_type_cb,
 373                                      (void *)(IORESOURCE_IO | IORESOURCE_MEM));
 374         if (ret < 0)
 375                 dev_warn(&device->dev,
 376                          "failed to parse _CRS method, error code %d\n", ret);
 377         else if (ret == 0)
 378                 dev_dbg(&device->dev,
 379                         "no IO and memory resources present in _CRS\n");
 380         else
 381                 resource_list_for_each_entry_safe(entry, tmp, list) {
 382                         if ((entry->res->flags & IORESOURCE_DISABLED) ||
 383                             resource_is_pcicfg_ioport(entry->res))
 384                                 resource_list_destroy_entry(entry);
 385                         else
 386                                 entry->res->name = info->name;
 387                 }
 388 }
 389
 390 struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
 391 {
 392         struct acpi_device *device = root->device;
 393         struct pci_root_info *info;
 394         int domain = root->segment;
 395         int busnum = root->secondary.start;
 396         struct resource_entry *res_entry;
 397         LIST_HEAD(crs_res);
 398         LIST_HEAD(resources);
 399         struct pci_bus *bus;
 400         struct pci_sysdata *sd;
 401         int node;
 402
 403         if (pci_ignore_seg)
 404                 domain = 0;
 405
 406         if (domain && !pci_domains_supported) {
 407                 printk(KERN_WARNING "pci_bus %04x:%02x: "
 408                        "ignored (multiple domains not supported)\n",
 409                        domain, busnum);
 410                 return NULL;
 411         }
 412
 413         node = acpi_get_node(device->handle);
 414         if (node == NUMA_NO_NODE) {
 415                 node = x86_pci_root_bus_node(busnum);
 416                 if (node != 0 && node != NUMA_NO_NODE)
 417                         dev_info(&device->dev, FW_BUG "no _PXM; falling back to node %d from hardware (may be inconsistent with ACPI node numbers)\n",
 418                                 node);
 419         }
 420
 421         if (node != NUMA_NO_NODE && !node_online(node))
 422                 node = NUMA_NO_NODE;
 423
 424         info = kzalloc_node(sizeof(*info), GFP_KERNEL, node);
 425         if (!info) {
 426                 printk(KERN_WARNING "pci_bus %04x:%02x: "
 427                        "ignored (out of memory)\n", domain, busnum);
 428                 return NULL;
 429         }
 430
 431         sd = &info->sd;
 432         sd->domain = domain;
 433         sd->node = node;
 434         sd->companion = device;
 435
 436         bus = pci_find_bus(domain, busnum);
 437         if (bus) {
 438                 /*
 439                  * If the desired bus has been scanned already, replace
 440                  * its bus->sysdata.
 441                  */
 442                 memcpy(bus->sysdata, sd, sizeof(*sd));
 443                 kfree(info);
 444         } else {
 445                 /* insert busn res at first */
 446                 pci_add_resource(&resources,  &root->secondary);
 447
 448                 /*
 449                  * _CRS with no apertures is normal, so only fall back to
 450                  * defaults or native bridge info if we're ignoring _CRS.
 451                  */
 452                 probe_pci_root_info(info, device, busnum, domain, &crs_res);
 453                 if (pci_use_crs) {
 454                         add_resources(info, &resources, &crs_res);
 455                 } else {
 456                         resource_list_for_each_entry(res_entry, &crs_res)
 457                                 dev_printk(KERN_DEBUG, &device->dev,
 458                                            "host bridge window %pR (ignored)\n",
 459                                            res_entry->res);
 460                         resource_list_free(&crs_res);
 461                         x86_pci_root_bus_resources(busnum, &resources);
 462                 }
 463
 464                 if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
 465                                     (u8)root->secondary.end, root->mcfg_addr))
 466                         bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
 467                                                   sd, &resources);
 468
 469                 if (bus) {
 470                         pci_scan_child_bus(bus);
 471                         pci_set_host_bridge_release(
 472                                 to_pci_host_bridge(bus->bridge),
 473                                 release_pci_root_info, info);
 474                 } else {
 475                         resource_list_free(&resources);
 476                         teardown_mcfg_map(info);
 477                         kfree(info);
 478                 }
 479         }
 480
 481         /* After the PCI-E bus has been walked and all devices discovered,
 482          * configure any settings of the fabric that might be necessary.
 483          */
 484         if (bus) {
 485                 struct pci_bus *child;
 486                 list_for_each_entry(child, &bus->children, node)
 487                         pcie_bus_configure_settings(child);
 488         }
 489
 490         if (bus && node != NUMA_NO_NODE)
 491                 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
 492
 493         return bus;
 494 }
 495
 496 int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
 497 {
 498         /*
 499          * We pass NULL as parent to pci_create_root_bus(), so if it is not NULL
 500          * here, pci_create_root_bus() has been called by someone else and
 501          * sysdata is likely to be different from what we expect.  Let it go in
 502          * that case.
 503          */
 504         if (!bridge->dev.parent) {
 505                 struct pci_sysdata *sd = bridge->bus->sysdata;
 506                 ACPI_COMPANION_SET(&bridge->dev, sd->companion);
 507         }
 508         return 0;
 509 }
 510
 511 int __init pci_acpi_init(void)
 512 {
 513         struct pci_dev *dev = NULL;
 514
 515         if (acpi_noirq)
 516                 return -ENODEV;
 517
 518         printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
 519         acpi_irq_penalty_init();
 520         pcibios_enable_irq = acpi_pci_irq_enable;
 521         pcibios_disable_irq = acpi_pci_irq_disable;
 522         x86_init.pci.init_irq = x86_init_noop;
 523
 524         if (pci_routeirq) {
 525                 /*
 526                  * PCI IRQ routing is set up by pci_enable_device(), but we
 527                  * also do it here in case there are still broken drivers that
 528                  * don't use pci_enable_device().
 529                  */
 530                 printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
 531                 for_each_pci_dev(dev)
 532                         acpi_pci_irq_enable(dev);
 533         }
 534
 535         return 0;
 536 }