kernel/arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 118
 119 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 120 static u32 __read_mostly tsc_tolerance_ppm = 250;
 121 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 122
 123 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 124 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 125 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 126
 127 static bool __read_mostly backwards_tsc_observed = false;
 128
 129 #define KVM_NR_SHARED_MSRS 16
 130
 131 struct kvm_shared_msrs_global {
 132         int nr;
 133         u32 msrs[KVM_NR_SHARED_MSRS];
 134 };
 135
 136 struct kvm_shared_msrs {
 137         struct user_return_notifier urn;
 138         bool registered;
 139         struct kvm_shared_msr_values {
 140                 u64 host;
 141                 u64 curr;
 142         } values[KVM_NR_SHARED_MSRS];
 143 };
 144
 145 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 146 static struct kvm_shared_msrs __percpu *shared_msrs;
 147
 148 struct kvm_stats_debugfs_item debugfs_entries[] = {
 149         { "pf_fixed", VCPU_STAT(pf_fixed) },
 150         { "pf_guest", VCPU_STAT(pf_guest) },
 151         { "tlb_flush", VCPU_STAT(tlb_flush) },
 152         { "invlpg", VCPU_STAT(invlpg) },
 153         { "exits", VCPU_STAT(exits) },
 154         { "io_exits", VCPU_STAT(io_exits) },
 155         { "mmio_exits", VCPU_STAT(mmio_exits) },
 156         { "signal_exits", VCPU_STAT(signal_exits) },
 157         { "irq_window", VCPU_STAT(irq_window_exits) },
 158         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 159         { "halt_exits", VCPU_STAT(halt_exits) },
 160         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 161         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 162         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 163         { "hypercalls", VCPU_STAT(hypercalls) },
 164         { "request_irq", VCPU_STAT(request_irq_exits) },
 165         { "irq_exits", VCPU_STAT(irq_exits) },
 166         { "host_state_reload", VCPU_STAT(host_state_reload) },
 167         { "efer_reload", VCPU_STAT(efer_reload) },
 168         { "fpu_reload", VCPU_STAT(fpu_reload) },
 169         { "insn_emulation", VCPU_STAT(insn_emulation) },
 170         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 171         { "irq_injections", VCPU_STAT(irq_injections) },
 172         { "nmi_injections", VCPU_STAT(nmi_injections) },
 173         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 174         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 175         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 176         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 177         { "mmu_flooded", VM_STAT(mmu_flooded) },
 178         { "mmu_recycled", VM_STAT(mmu_recycled) },
 179         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 180         { "mmu_unsync", VM_STAT(mmu_unsync) },
 181         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 182         { "largepages", VM_STAT(lpages) },
 183         { NULL }
 184 };
 185
 186 u64 __read_mostly host_xcr0;
 187
 188 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 189
 190 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 191 {
 192         int i;
 193         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 194                 vcpu->arch.apf.gfns[i] = ~0;
 195 }
 196
 197 static void kvm_on_user_return(struct user_return_notifier *urn)
 198 {
 199         unsigned slot;
 200         struct kvm_shared_msrs *locals
 201                 = container_of(urn, struct kvm_shared_msrs, urn);
 202         struct kvm_shared_msr_values *values;
 203
 204         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 205                 values = &locals->values[slot];
 206                 if (values->host != values->curr) {
 207                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 208                         values->curr = values->host;
 209                 }
 210         }
 211         locals->registered = false;
 212         user_return_notifier_unregister(urn);
 213 }
 214
 215 static void shared_msr_update(unsigned slot, u32 msr)
 216 {
 217         u64 value;
 218         unsigned int cpu = smp_processor_id();
 219         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 220
 221         /* only read, and nobody should modify it at this time,
 222          * so don't need lock */
 223         if (slot >= shared_msrs_global.nr) {
 224                 printk(KERN_ERR "kvm: invalid MSR slot!");
 225                 return;
 226         }
 227         rdmsrl_safe(msr, &value);
 228         smsr->values[slot].host = value;
 229         smsr->values[slot].curr = value;
 230 }
 231
 232 void kvm_define_shared_msr(unsigned slot, u32 msr)
 233 {
 234         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 235         shared_msrs_global.msrs[slot] = msr;
 236         if (slot >= shared_msrs_global.nr)
 237                 shared_msrs_global.nr = slot + 1;
 238 }
 239 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 240
 241 static void kvm_shared_msr_cpu_online(void)
 242 {
 243         unsigned i;
 244
 245         for (i = 0; i < shared_msrs_global.nr; ++i)
 246                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 247 }
 248
 249 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 250 {
 251         unsigned int cpu = smp_processor_id();
 252         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 253         int err;
 254
 255         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 256                 return 0;
 257         smsr->values[slot].curr = value;
 258         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 259         if (err)
 260                 return 1;
 261
 262         if (!smsr->registered) {
 263                 smsr->urn.on_user_return = kvm_on_user_return;
 264                 user_return_notifier_register(&smsr->urn);
 265                 smsr->registered = true;
 266         }
 267         return 0;
 268 }
 269 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 270
 271 static void drop_user_return_notifiers(void)
 272 {
 273         unsigned int cpu = smp_processor_id();
 274         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 275
 276         if (smsr->registered)
 277                 kvm_on_user_return(&smsr->urn);
 278 }
 279
 280 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 281 {
 282         return vcpu->arch.apic_base;
 283 }
 284 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 285
 286 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 287 {
 288         u64 old_state = vcpu->arch.apic_base &
 289                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 290         u64 new_state = msr_info->data &
 291                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 292         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 293                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 294
 295         if (!msr_info->host_initiated &&
 296             ((msr_info->data & reserved_bits) != 0 ||
 297              new_state == X2APIC_ENABLE ||
 298              (new_state == MSR_IA32_APICBASE_ENABLE &&
 299               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 300              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 301               old_state == 0)))
 302                 return 1;
 303
 304         kvm_lapic_set_base(vcpu, msr_info->data);
 305         return 0;
 306 }
 307 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 308
 309 asmlinkage __visible void kvm_spurious_fault(void)
 310 {
 311         /* Fault while not rebooting.  We want the trace. */
 312         BUG();
 313 }
 314 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 315
 316 #define EXCPT_BENIGN            0
 317 #define EXCPT_CONTRIBUTORY      1
 318 #define EXCPT_PF                2
 319
 320 static int exception_class(int vector)
 321 {
 322         switch (vector) {
 323         case PF_VECTOR:
 324                 return EXCPT_PF;
 325         case DE_VECTOR:
 326         case TS_VECTOR:
 327         case NP_VECTOR:
 328         case SS_VECTOR:
 329         case GP_VECTOR:
 330                 return EXCPT_CONTRIBUTORY;
 331         default:
 332                 break;
 333         }
 334         return EXCPT_BENIGN;
 335 }
 336
 337 #define EXCPT_FAULT             0
 338 #define EXCPT_TRAP              1
 339 #define EXCPT_ABORT             2
 340 #define EXCPT_INTERRUPT         3
 341
 342 static int exception_type(int vector)
 343 {
 344         unsigned int mask;
 345
 346         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 347                 return EXCPT_INTERRUPT;
 348
 349         mask = 1 << vector;
 350
 351         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 352         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 353                 return EXCPT_TRAP;
 354
 355         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 356                 return EXCPT_ABORT;
 357
 358         /* Reserved exceptions will result in fault */
 359         return EXCPT_FAULT;
 360 }
 361
 362 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 363                 unsigned nr, bool has_error, u32 error_code,
 364                 bool reinject)
 365 {
 366         u32 prev_nr;
 367         int class1, class2;
 368
 369         kvm_make_request(KVM_REQ_EVENT, vcpu);
 370
 371         if (!vcpu->arch.exception.pending) {
 372         queue:
 373                 if (has_error && !is_protmode(vcpu))
 374                         has_error = false;
 375                 vcpu->arch.exception.pending = true;
 376                 vcpu->arch.exception.has_error_code = has_error;
 377                 vcpu->arch.exception.nr = nr;
 378                 vcpu->arch.exception.error_code = error_code;
 379                 vcpu->arch.exception.reinject = reinject;
 380                 return;
 381         }
 382
 383         /* to check exception */
 384         prev_nr = vcpu->arch.exception.nr;
 385         if (prev_nr == DF_VECTOR) {
 386                 /* triple fault -> shutdown */
 387                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 388                 return;
 389         }
 390         class1 = exception_class(prev_nr);
 391         class2 = exception_class(nr);
 392         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 393                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 394                 /* generate double fault per SDM Table 5-5 */
 395                 vcpu->arch.exception.pending = true;
 396                 vcpu->arch.exception.has_error_code = true;
 397                 vcpu->arch.exception.nr = DF_VECTOR;
 398                 vcpu->arch.exception.error_code = 0;
 399         } else
 400                 /* replace previous exception with a new one in a hope
 401                    that instruction re-execution will regenerate lost
 402                    exception */
 403                 goto queue;
 404 }
 405
 406 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 407 {
 408         kvm_multiple_exception(vcpu, nr, false, 0, false);
 409 }
 410 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 411
 412 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 413 {
 414         kvm_multiple_exception(vcpu, nr, false, 0, true);
 415 }
 416 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 417
 418 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 419 {
 420         if (err)
 421                 kvm_inject_gp(vcpu, 0);
 422         else
 423                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 424 }
 425 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 426
 427 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 428 {
 429         ++vcpu->stat.pf_guest;
 430         vcpu->arch.cr2 = fault->address;
 431         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 432 }
 433 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 434
 435 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 436 {
 437         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 438                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 439         else
 440                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 441
 442         return fault->nested_page_fault;
 443 }
 444
 445 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 446 {
 447         atomic_inc(&vcpu->arch.nmi_queued);
 448         kvm_make_request(KVM_REQ_NMI, vcpu);
 449 }
 450 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 451
 452 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 453 {
 454         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 455 }
 456 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 457
 458 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 459 {
 460         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 461 }
 462 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 463
 464 /*
 465  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 466  * a #GP and return false.
 467  */
 468 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 469 {
 470         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 471                 return true;
 472         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 473         return false;
 474 }
 475 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 476
 477 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 478 {
 479         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 480                 return true;
 481
 482         kvm_queue_exception(vcpu, UD_VECTOR);
 483         return false;
 484 }
 485 EXPORT_SYMBOL_GPL(kvm_require_dr);
 486
 487 /*
 488  * This function will be used to read from the physical memory of the currently
 489  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 490  * can read from guest physical or from the guest's guest physical memory.
 491  */
 492 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 493                             gfn_t ngfn, void *data, int offset, int len,
 494                             u32 access)
 495 {
 496         struct x86_exception exception;
 497         gfn_t real_gfn;
 498         gpa_t ngpa;
 499
 500         ngpa     = gfn_to_gpa(ngfn);
 501         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 502         if (real_gfn == UNMAPPED_GVA)
 503                 return -EFAULT;
 504
 505         real_gfn = gpa_to_gfn(real_gfn);
 506
 507         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 508 }
 509 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 510
 511 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 512                                void *data, int offset, int len, u32 access)
 513 {
 514         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 515                                        data, offset, len, access);
 516 }
 517
 518 /*
 519  * Load the pae pdptrs.  Return true is they are all valid.
 520  */
 521 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 522 {
 523         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 524         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 525         int i;
 526         int ret;
 527         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 528
 529         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 530                                       offset * sizeof(u64), sizeof(pdpte),
 531                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 532         if (ret < 0) {
 533                 ret = 0;
 534                 goto out;
 535         }
 536         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 537                 if (is_present_gpte(pdpte[i]) &&
 538                     (pdpte[i] &
 539                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 540                         ret = 0;
 541                         goto out;
 542                 }
 543         }
 544         ret = 1;
 545
 546         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 547         __set_bit(VCPU_EXREG_PDPTR,
 548                   (unsigned long *)&vcpu->arch.regs_avail);
 549         __set_bit(VCPU_EXREG_PDPTR,
 550                   (unsigned long *)&vcpu->arch.regs_dirty);
 551 out:
 552
 553         return ret;
 554 }
 555 EXPORT_SYMBOL_GPL(load_pdptrs);
 556
 557 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 558 {
 559         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 560         bool changed = true;
 561         int offset;
 562         gfn_t gfn;
 563         int r;
 564
 565         if (is_long_mode(vcpu) || !is_pae(vcpu))
 566                 return false;
 567
 568         if (!test_bit(VCPU_EXREG_PDPTR,
 569                       (unsigned long *)&vcpu->arch.regs_avail))
 570                 return true;
 571
 572         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 573         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 574         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 575                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 576         if (r < 0)
 577                 goto out;
 578         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 579 out:
 580
 581         return changed;
 582 }
 583
 584 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 585 {
 586         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 587         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 588
 589         cr0 |= X86_CR0_ET;
 590
 591 #ifdef CONFIG_X86_64
 592         if (cr0 & 0xffffffff00000000UL)
 593                 return 1;
 594 #endif
 595
 596         cr0 &= ~CR0_RESERVED_BITS;
 597
 598         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 599                 return 1;
 600
 601         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 602                 return 1;
 603
 604         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 605 #ifdef CONFIG_X86_64
 606                 if ((vcpu->arch.efer & EFER_LME)) {
 607                         int cs_db, cs_l;
 608
 609                         if (!is_pae(vcpu))
 610                                 return 1;
 611                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 612                         if (cs_l)
 613                                 return 1;
 614                 } else
 615 #endif
 616                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 617                                                  kvm_read_cr3(vcpu)))
 618                         return 1;
 619         }
 620
 621         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 622                 return 1;
 623
 624         kvm_x86_ops->set_cr0(vcpu, cr0);
 625
 626         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 627                 kvm_clear_async_pf_completion_queue(vcpu);
 628                 kvm_async_pf_hash_reset(vcpu);
 629         }
 630
 631         if ((cr0 ^ old_cr0) & update_bits)
 632                 kvm_mmu_reset_context(vcpu);
 633
 634         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 635             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 636             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 637                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 638
 639         return 0;
 640 }
 641 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 642
 643 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 644 {
 645         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 646 }
 647 EXPORT_SYMBOL_GPL(kvm_lmsw);
 648
 649 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 650 {
 651         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 652                         !vcpu->guest_xcr0_loaded) {
 653                 /* kvm_set_xcr() also depends on this */
 654                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 655                 vcpu->guest_xcr0_loaded = 1;
 656         }
 657 }
 658
 659 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 660 {
 661         if (vcpu->guest_xcr0_loaded) {
 662                 if (vcpu->arch.xcr0 != host_xcr0)
 663                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 664                 vcpu->guest_xcr0_loaded = 0;
 665         }
 666 }
 667
 668 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 669 {
 670         u64 xcr0 = xcr;
 671         u64 old_xcr0 = vcpu->arch.xcr0;
 672         u64 valid_bits;
 673
 674         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 675         if (index != XCR_XFEATURE_ENABLED_MASK)
 676                 return 1;
 677         if (!(xcr0 & XFEATURE_MASK_FP))
 678                 return 1;
 679         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 680                 return 1;
 681
 682         /*
 683          * Do not allow the guest to set bits that we do not support
 684          * saving.  However, xcr0 bit 0 is always set, even if the
 685          * emulated CPU does not support XSAVE (see fx_init).
 686          */
 687         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 688         if (xcr0 & ~valid_bits)
 689                 return 1;
 690
 691         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 692             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 693                 return 1;
 694
 695         if (xcr0 & XFEATURE_MASK_AVX512) {
 696                 if (!(xcr0 & XFEATURE_MASK_YMM))
 697                         return 1;
 698                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 699                         return 1;
 700         }
 701         kvm_put_guest_xcr0(vcpu);
 702         vcpu->arch.xcr0 = xcr0;
 703
 704         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 705                 kvm_update_cpuid(vcpu);
 706         return 0;
 707 }
 708
 709 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 710 {
 711         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 712             __kvm_set_xcr(vcpu, index, xcr)) {
 713                 kvm_inject_gp(vcpu, 0);
 714                 return 1;
 715         }
 716         return 0;
 717 }
 718 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 719
 720 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 721 {
 722         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 723         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 724                                    X86_CR4_SMEP | X86_CR4_SMAP;
 725
 726         if (cr4 & CR4_RESERVED_BITS)
 727                 return 1;
 728
 729         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 730                 return 1;
 731
 732         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 733                 return 1;
 734
 735         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 736                 return 1;
 737
 738         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 739                 return 1;
 740
 741         if (is_long_mode(vcpu)) {
 742                 if (!(cr4 & X86_CR4_PAE))
 743                         return 1;
 744         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 745                    && ((cr4 ^ old_cr4) & pdptr_bits)
 746                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 747                                    kvm_read_cr3(vcpu)))
 748                 return 1;
 749
 750         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 751                 if (!guest_cpuid_has_pcid(vcpu))
 752                         return 1;
 753
 754                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 755                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 756                         return 1;
 757         }
 758
 759         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 760                 return 1;
 761
 762         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 763             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 764                 kvm_mmu_reset_context(vcpu);
 765
 766         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 767                 kvm_update_cpuid(vcpu);
 768
 769         return 0;
 770 }
 771 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 772
 773 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 774 {
 775 #ifdef CONFIG_X86_64
 776         cr3 &= ~CR3_PCID_INVD;
 777 #endif
 778
 779         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 780                 kvm_mmu_sync_roots(vcpu);
 781                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 782                 return 0;
 783         }
 784
 785         if (is_long_mode(vcpu)) {
 786                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 787                         return 1;
 788         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 789                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 790                 return 1;
 791
 792         vcpu->arch.cr3 = cr3;
 793         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 794         kvm_mmu_new_cr3(vcpu);
 795         return 0;
 796 }
 797 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 798
 799 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 800 {
 801         if (cr8 & CR8_RESERVED_BITS)
 802                 return 1;
 803         if (lapic_in_kernel(vcpu))
 804                 kvm_lapic_set_tpr(vcpu, cr8);
 805         else
 806                 vcpu->arch.cr8 = cr8;
 807         return 0;
 808 }
 809 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 810
 811 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 812 {
 813         if (lapic_in_kernel(vcpu))
 814                 return kvm_lapic_get_cr8(vcpu);
 815         else
 816                 return vcpu->arch.cr8;
 817 }
 818 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 819
 820 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 821 {
 822         int i;
 823
 824         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 825                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 826                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 827                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 828         }
 829 }
 830
 831 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 832 {
 833         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 834                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 835 }
 836
 837 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 838 {
 839         unsigned long dr7;
 840
 841         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 842                 dr7 = vcpu->arch.guest_debug_dr7;
 843         else
 844                 dr7 = vcpu->arch.dr7;
 845         kvm_x86_ops->set_dr7(vcpu, dr7);
 846         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 847         if (dr7 & DR7_BP_EN_MASK)
 848                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 849 }
 850
 851 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 852 {
 853         u64 fixed = DR6_FIXED_1;
 854
 855         if (!guest_cpuid_has_rtm(vcpu))
 856                 fixed |= DR6_RTM;
 857         return fixed;
 858 }
 859
 860 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 861 {
 862         switch (dr) {
 863         case 0 ... 3:
 864                 vcpu->arch.db[dr] = val;
 865                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 866                         vcpu->arch.eff_db[dr] = val;
 867                 break;
 868         case 4:
 869                 /* fall through */
 870         case 6:
 871                 if (val & 0xffffffff00000000ULL)
 872                         return -1; /* #GP */
 873                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 874                 kvm_update_dr6(vcpu);
 875                 break;
 876         case 5:
 877                 /* fall through */
 878         default: /* 7 */
 879                 if (val & 0xffffffff00000000ULL)
 880                         return -1; /* #GP */
 881                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 882                 kvm_update_dr7(vcpu);
 883                 break;
 884         }
 885
 886         return 0;
 887 }
 888
 889 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 890 {
 891         if (__kvm_set_dr(vcpu, dr, val)) {
 892                 kvm_inject_gp(vcpu, 0);
 893                 return 1;
 894         }
 895         return 0;
 896 }
 897 EXPORT_SYMBOL_GPL(kvm_set_dr);
 898
 899 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 900 {
 901         switch (dr) {
 902         case 0 ... 3:
 903                 *val = vcpu->arch.db[dr];
 904                 break;
 905         case 4:
 906                 /* fall through */
 907         case 6:
 908                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 909                         *val = vcpu->arch.dr6;
 910                 else
 911                         *val = kvm_x86_ops->get_dr6(vcpu);
 912                 break;
 913         case 5:
 914                 /* fall through */
 915         default: /* 7 */
 916                 *val = vcpu->arch.dr7;
 917                 break;
 918         }
 919         return 0;
 920 }
 921 EXPORT_SYMBOL_GPL(kvm_get_dr);
 922
 923 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 924 {
 925         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 926         u64 data;
 927         int err;
 928
 929         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 930         if (err)
 931                 return err;
 932         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 933         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 934         return err;
 935 }
 936 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 937
 938 /*
 939  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 940  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 941  *
 942  * This list is modified at module load time to reflect the
 943  * capabilities of the host cpu. This capabilities test skips MSRs that are
 944  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 945  * may depend on host virtualization features rather than host cpu features.
 946  */
 947
 948 static u32 msrs_to_save[] = {
 949         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 950         MSR_STAR,
 951 #ifdef CONFIG_X86_64
 952         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 953 #endif
 954         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 955         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 956 };
 957
 958 static unsigned num_msrs_to_save;
 959
 960 static u32 emulated_msrs[] = {
 961         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 962         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 963         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 964         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 965         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 966         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 967         HV_X64_MSR_RESET,
 968         HV_X64_MSR_VP_INDEX,
 969         HV_X64_MSR_VP_RUNTIME,
 970         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 971         MSR_KVM_PV_EOI_EN,
 972
 973         MSR_IA32_TSC_ADJUST,
 974         MSR_IA32_TSCDEADLINE,
 975         MSR_IA32_MISC_ENABLE,
 976         MSR_IA32_MCG_STATUS,
 977         MSR_IA32_MCG_CTL,
 978         MSR_IA32_SMBASE,
 979 };
 980
 981 static unsigned num_emulated_msrs;
 982
 983 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 984 {
 985         if (efer & efer_reserved_bits)
 986                 return false;
 987
 988         if (efer & EFER_FFXSR) {
 989                 struct kvm_cpuid_entry2 *feat;
 990
 991                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 992                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 993                         return false;
 994         }
 995
 996         if (efer & EFER_SVME) {
 997                 struct kvm_cpuid_entry2 *feat;
 998
 999                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1000                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1001                         return false;
1002         }
1003
1004         return true;
1005 }
1006 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1007
1008 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1009 {
1010         u64 old_efer = vcpu->arch.efer;
1011
1012         if (!kvm_valid_efer(vcpu, efer))
1013                 return 1;
1014
1015         if (is_paging(vcpu)
1016             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1017                 return 1;
1018
1019         efer &= ~EFER_LMA;
1020         efer |= vcpu->arch.efer & EFER_LMA;
1021
1022         kvm_x86_ops->set_efer(vcpu, efer);
1023
1024         /* Update reserved bits */
1025         if ((efer ^ old_efer) & EFER_NX)
1026                 kvm_mmu_reset_context(vcpu);
1027
1028         return 0;
1029 }
1030
1031 void kvm_enable_efer_bits(u64 mask)
1032 {
1033        efer_reserved_bits &= ~mask;
1034 }
1035 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1036
1037 /*
1038  * Writes msr value into into the appropriate "register".
1039  * Returns 0 on success, non-0 otherwise.
1040  * Assumes vcpu_load() was already called.
1041  */
1042 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1043 {
1044         switch (msr->index) {
1045         case MSR_FS_BASE:
1046         case MSR_GS_BASE:
1047         case MSR_KERNEL_GS_BASE:
1048         case MSR_CSTAR:
1049         case MSR_LSTAR:
1050                 if (is_noncanonical_address(msr->data))
1051                         return 1;
1052                 break;
1053         case MSR_IA32_SYSENTER_EIP:
1054         case MSR_IA32_SYSENTER_ESP:
1055                 /*
1056                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1057                  * non-canonical address is written on Intel but not on
1058                  * AMD (which ignores the top 32-bits, because it does
1059                  * not implement 64-bit SYSENTER).
1060                  *
1061                  * 64-bit code should hence be able to write a non-canonical
1062                  * value on AMD.  Making the address canonical ensures that
1063                  * vmentry does not fail on Intel after writing a non-canonical
1064                  * value, and that something deterministic happens if the guest
1065                  * invokes 64-bit SYSENTER.
1066                  */
1067                 msr->data = get_canonical(msr->data);
1068         }
1069         return kvm_x86_ops->set_msr(vcpu, msr);
1070 }
1071 EXPORT_SYMBOL_GPL(kvm_set_msr);
1072
1073 /*
1074  * Adapt set_msr() to msr_io()'s calling convention
1075  */
1076 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1077 {
1078         struct msr_data msr;
1079         int r;
1080
1081         msr.index = index;
1082         msr.host_initiated = true;
1083         r = kvm_get_msr(vcpu, &msr);
1084         if (r)
1085                 return r;
1086
1087         *data = msr.data;
1088         return 0;
1089 }
1090
1091 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1092 {
1093         struct msr_data msr;
1094
1095         msr.data = *data;
1096         msr.index = index;
1097         msr.host_initiated = true;
1098         return kvm_set_msr(vcpu, &msr);
1099 }
1100
1101 #ifdef CONFIG_X86_64
1102 struct pvclock_gtod_data {
1103         seqcount_t      seq;
1104
1105         struct { /* extract of a clocksource struct */
1106                 int vclock_mode;
1107                 cycle_t cycle_last;
1108                 cycle_t mask;
1109                 u32     mult;
1110                 u32     shift;
1111         } clock;
1112
1113         u64             boot_ns;
1114         u64             nsec_base;
1115 };
1116
1117 static struct pvclock_gtod_data pvclock_gtod_data;
1118
1119 static void update_pvclock_gtod(struct timekeeper *tk)
1120 {
1121         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1122         u64 boot_ns;
1123
1124         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1125
1126         write_seqcount_begin(&vdata->seq);
1127
1128         /* copy pvclock gtod data */
1129         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1130         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1131         vdata->clock.mask               = tk->tkr_mono.mask;
1132         vdata->clock.mult               = tk->tkr_mono.mult;
1133         vdata->clock.shift              = tk->tkr_mono.shift;
1134
1135         vdata->boot_ns                  = boot_ns;
1136         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1137
1138         write_seqcount_end(&vdata->seq);
1139 }
1140 #endif
1141
1142 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1143 {
1144         /*
1145          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1146          * vcpu_enter_guest.  This function is only called from
1147          * the physical CPU that is running vcpu.
1148          */
1149         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1150 }
1151
1152 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1153 {
1154         int version;
1155         int r;
1156         struct pvclock_wall_clock wc;
1157         struct timespec boot;
1158
1159         if (!wall_clock)
1160                 return;
1161
1162         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1163         if (r)
1164                 return;
1165
1166         if (version & 1)
1167                 ++version;  /* first time write, random junk */
1168
1169         ++version;
1170
1171         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1172
1173         /*
1174          * The guest calculates current wall clock time by adding
1175          * system time (updated by kvm_guest_time_update below) to the
1176          * wall clock specified here.  guest system time equals host
1177          * system time for us, thus we must fill in host boot time here.
1178          */
1179         getboottime(&boot);
1180
1181         if (kvm->arch.kvmclock_offset) {
1182                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1183                 boot = timespec_sub(boot, ts);
1184         }
1185         wc.sec = boot.tv_sec;
1186         wc.nsec = boot.tv_nsec;
1187         wc.version = version;
1188
1189         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1190
1191         version++;
1192         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1193 }
1194
1195 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1196 {
1197         uint32_t quotient, remainder;
1198
1199         /* Don't try to replace with do_div(), this one calculates
1200          * "(dividend << 32) / divisor" */
1201         __asm__ ( "divl %4"
1202                   : "=a" (quotient), "=d" (remainder)
1203                   : "0" (0), "1" (dividend), "r" (divisor) );
1204         return quotient;
1205 }
1206
1207 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1208                                s8 *pshift, u32 *pmultiplier)
1209 {
1210         uint64_t scaled64;
1211         int32_t  shift = 0;
1212         uint64_t tps64;
1213         uint32_t tps32;
1214
1215         tps64 = base_khz * 1000LL;
1216         scaled64 = scaled_khz * 1000LL;
1217         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1218                 tps64 >>= 1;
1219                 shift--;
1220         }
1221
1222         tps32 = (uint32_t)tps64;
1223         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1224                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1225                         scaled64 >>= 1;
1226                 else
1227                         tps32 <<= 1;
1228                 shift++;
1229         }
1230
1231         *pshift = shift;
1232         *pmultiplier = div_frac(scaled64, tps32);
1233
1234         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1235                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1236 }
1237
1238 #ifdef CONFIG_X86_64
1239 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1240 #endif
1241
1242 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1243 static unsigned long max_tsc_khz;
1244
1245 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1246 {
1247         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1248                                    vcpu->arch.virtual_tsc_shift);
1249 }
1250
1251 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1252 {
1253         u64 v = (u64)khz * (1000000 + ppm);
1254         do_div(v, 1000000);
1255         return v;
1256 }
1257
1258 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1259 {
1260         u64 ratio;
1261
1262         /* Guest TSC same frequency as host TSC? */
1263         if (!scale) {
1264                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1265                 return 0;
1266         }
1267
1268         /* TSC scaling supported? */
1269         if (!kvm_has_tsc_control) {
1270                 if (user_tsc_khz > tsc_khz) {
1271                         vcpu->arch.tsc_catchup = 1;
1272                         vcpu->arch.tsc_always_catchup = 1;
1273                         return 0;
1274                 } else {
1275                         WARN(1, "user requested TSC rate below hardware speed\n");
1276                         return -1;
1277                 }
1278         }
1279
1280         /* TSC scaling required  - calculate ratio */
1281         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1282                                 user_tsc_khz, tsc_khz);
1283
1284         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1285                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1286                           user_tsc_khz);
1287                 return -1;
1288         }
1289
1290         vcpu->arch.tsc_scaling_ratio = ratio;
1291         return 0;
1292 }
1293
1294 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1295 {
1296         u32 thresh_lo, thresh_hi;
1297         int use_scaling = 0;
1298
1299         /* tsc_khz can be zero if TSC calibration fails */
1300         if (this_tsc_khz == 0) {
1301                 /* set tsc_scaling_ratio to a safe value */
1302                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1303                 return -1;
1304         }
1305
1306         /* Compute a scale to convert nanoseconds in TSC cycles */
1307         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1308                            &vcpu->arch.virtual_tsc_shift,
1309                            &vcpu->arch.virtual_tsc_mult);
1310         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1311
1312         /*
1313          * Compute the variation in TSC rate which is acceptable
1314          * within the range of tolerance and decide if the
1315          * rate being applied is within that bounds of the hardware
1316          * rate.  If so, no scaling or compensation need be done.
1317          */
1318         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1319         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1320         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1321                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1322                 use_scaling = 1;
1323         }
1324         return set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1325 }
1326
1327 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1328 {
1329         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1330                                       vcpu->arch.virtual_tsc_mult,
1331                                       vcpu->arch.virtual_tsc_shift);
1332         tsc += vcpu->arch.this_tsc_write;
1333         return tsc;
1334 }
1335
1336 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1337 {
1338 #ifdef CONFIG_X86_64
1339         bool vcpus_matched;
1340         struct kvm_arch *ka = &vcpu->kvm->arch;
1341         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1342
1343         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1344                          atomic_read(&vcpu->kvm->online_vcpus));
1345
1346         /*
1347          * Once the masterclock is enabled, always perform request in
1348          * order to update it.
1349          *
1350          * In order to enable masterclock, the host clocksource must be TSC
1351          * and the vcpus need to have matched TSCs.  When that happens,
1352          * perform request to enable masterclock.
1353          */
1354         if (ka->use_master_clock ||
1355             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1356                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1357
1358         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1359                             atomic_read(&vcpu->kvm->online_vcpus),
1360                             ka->use_master_clock, gtod->clock.vclock_mode);
1361 #endif
1362 }
1363
1364 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1365 {
1366         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1367         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1368 }
1369
1370 /*
1371  * Multiply tsc by a fixed point number represented by ratio.
1372  *
1373  * The most significant 64-N bits (mult) of ratio represent the
1374  * integral part of the fixed point number; the remaining N bits
1375  * (frac) represent the fractional part, ie. ratio represents a fixed
1376  * point number (mult + frac * 2^(-N)).
1377  *
1378  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1379  */
1380 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1381 {
1382         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1383 }
1384
1385 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1386 {
1387         u64 _tsc = tsc;
1388         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1389
1390         if (ratio != kvm_default_tsc_scaling_ratio)
1391                 _tsc = __scale_tsc(ratio, tsc);
1392
1393         return _tsc;
1394 }
1395 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1396
1397 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1398 {
1399         u64 tsc;
1400
1401         tsc = kvm_scale_tsc(vcpu, rdtsc());
1402
1403         return target_tsc - tsc;
1404 }
1405
1406 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1407 {
1408         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1409 }
1410 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1411
1412 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1413 {
1414         struct kvm *kvm = vcpu->kvm;
1415         u64 offset, ns, elapsed;
1416         unsigned long flags;
1417         s64 usdiff;
1418         bool matched;
1419         bool already_matched;
1420         u64 data = msr->data;
1421
1422         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1423         offset = kvm_compute_tsc_offset(vcpu, data);
1424         ns = get_kernel_ns();
1425         elapsed = ns - kvm->arch.last_tsc_nsec;
1426
1427         if (vcpu->arch.virtual_tsc_khz) {
1428                 int faulted = 0;
1429
1430                 /* n.b - signed multiplication and division required */
1431                 usdiff = data - kvm->arch.last_tsc_write;
1432 #ifdef CONFIG_X86_64
1433                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1434 #else
1435                 /* do_div() only does unsigned */
1436                 asm("1: idivl %[divisor]\n"
1437                     "2: xor %%edx, %%edx\n"
1438                     "   movl $0, %[faulted]\n"
1439                     "3:\n"
1440                     ".section .fixup,\"ax\"\n"
1441                     "4: movl $1, %[faulted]\n"
1442                     "   jmp  3b\n"
1443                     ".previous\n"
1444
1445                 _ASM_EXTABLE(1b, 4b)
1446
1447                 : "=A"(usdiff), [faulted] "=r" (faulted)
1448                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1449
1450 #endif
1451                 do_div(elapsed, 1000);
1452                 usdiff -= elapsed;
1453                 if (usdiff < 0)
1454                         usdiff = -usdiff;
1455
1456                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1457                 if (faulted)
1458                         usdiff = USEC_PER_SEC;
1459         } else
1460                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1461
1462         /*
1463          * Special case: TSC write with a small delta (1 second) of virtual
1464          * cycle time against real time is interpreted as an attempt to
1465          * synchronize the CPU.
1466          *
1467          * For a reliable TSC, we can match TSC offsets, and for an unstable
1468          * TSC, we add elapsed time in this computation.  We could let the
1469          * compensation code attempt to catch up if we fall behind, but
1470          * it's better to try to match offsets from the beginning.
1471          */
1472         if (usdiff < USEC_PER_SEC &&
1473             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1474                 if (!check_tsc_unstable()) {
1475                         offset = kvm->arch.cur_tsc_offset;
1476                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1477                 } else {
1478                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1479                         data += delta;
1480                         offset = kvm_compute_tsc_offset(vcpu, data);
1481                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1482                 }
1483                 matched = true;
1484                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1485         } else {
1486                 /*
1487                  * We split periods of matched TSC writes into generations.
1488                  * For each generation, we track the original measured
1489                  * nanosecond time, offset, and write, so if TSCs are in
1490                  * sync, we can match exact offset, and if not, we can match
1491                  * exact software computation in compute_guest_tsc()
1492                  *
1493                  * These values are tracked in kvm->arch.cur_xxx variables.
1494                  */
1495                 kvm->arch.cur_tsc_generation++;
1496                 kvm->arch.cur_tsc_nsec = ns;
1497                 kvm->arch.cur_tsc_write = data;
1498                 kvm->arch.cur_tsc_offset = offset;
1499                 matched = false;
1500                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1501                          kvm->arch.cur_tsc_generation, data);
1502         }
1503
1504         /*
1505          * We also track th most recent recorded KHZ, write and time to
1506          * allow the matching interval to be extended at each write.
1507          */
1508         kvm->arch.last_tsc_nsec = ns;
1509         kvm->arch.last_tsc_write = data;
1510         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1511
1512         vcpu->arch.last_guest_tsc = data;
1513
1514         /* Keep track of which generation this VCPU has synchronized to */
1515         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1516         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1517         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1518
1519         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1520                 update_ia32_tsc_adjust_msr(vcpu, offset);
1521         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1522         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1523
1524         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1525         if (!matched) {
1526                 kvm->arch.nr_vcpus_matched_tsc = 0;
1527         } else if (!already_matched) {
1528                 kvm->arch.nr_vcpus_matched_tsc++;
1529         }
1530
1531         kvm_track_tsc_matching(vcpu);
1532         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1533 }
1534
1535 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1536
1537 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1538                                            s64 adjustment)
1539 {
1540         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1541 }
1542
1543 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1544 {
1545         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1546                 WARN_ON(adjustment < 0);
1547         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1548         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1549 }
1550
1551 #ifdef CONFIG_X86_64
1552
1553 static cycle_t read_tsc(void)
1554 {
1555         cycle_t ret = (cycle_t)rdtsc_ordered();
1556         u64 last = pvclock_gtod_data.clock.cycle_last;
1557
1558         if (likely(ret >= last))
1559                 return ret;
1560
1561         /*
1562          * GCC likes to generate cmov here, but this branch is extremely
1563          * predictable (it's just a funciton of time and the likely is
1564          * very likely) and there's a data dependence, so force GCC
1565          * to generate a branch instead.  I don't barrier() because
1566          * we don't actually need a barrier, and if this function
1567          * ever gets inlined it will generate worse code.
1568          */
1569         asm volatile ("");
1570         return last;
1571 }
1572
1573 static inline u64 vgettsc(cycle_t *cycle_now)
1574 {
1575         long v;
1576         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1577
1578         *cycle_now = read_tsc();
1579
1580         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1581         return v * gtod->clock.mult;
1582 }
1583
1584 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1585 {
1586         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1587         unsigned long seq;
1588         int mode;
1589         u64 ns;
1590
1591         do {
1592                 seq = read_seqcount_begin(&gtod->seq);
1593                 mode = gtod->clock.vclock_mode;
1594                 ns = gtod->nsec_base;
1595                 ns += vgettsc(cycle_now);
1596                 ns >>= gtod->clock.shift;
1597                 ns += gtod->boot_ns;
1598         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1599         *t = ns;
1600
1601         return mode;
1602 }
1603
1604 /* returns true if host is using tsc clocksource */
1605 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1606 {
1607         /* checked again under seqlock below */
1608         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1609                 return false;
1610
1611         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1612 }
1613 #endif
1614
1615 /*
1616  *
1617  * Assuming a stable TSC across physical CPUS, and a stable TSC
1618  * across virtual CPUs, the following condition is possible.
1619  * Each numbered line represents an event visible to both
1620  * CPUs at the next numbered event.
1621  *
1622  * "timespecX" represents host monotonic time. "tscX" represents
1623  * RDTSC value.
1624  *
1625  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1626  *
1627  * 1.  read timespec0,tsc0
1628  * 2.                                   | timespec1 = timespec0 + N
1629  *                                      | tsc1 = tsc0 + M
1630  * 3. transition to guest               | transition to guest
1631  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1632  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1633  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1634  *
1635  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1636  *
1637  *      - ret0 < ret1
1638  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1639  *              ...
1640  *      - 0 < N - M => M < N
1641  *
1642  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1643  * always the case (the difference between two distinct xtime instances
1644  * might be smaller then the difference between corresponding TSC reads,
1645  * when updating guest vcpus pvclock areas).
1646  *
1647  * To avoid that problem, do not allow visibility of distinct
1648  * system_timestamp/tsc_timestamp values simultaneously: use a master
1649  * copy of host monotonic time values. Update that master copy
1650  * in lockstep.
1651  *
1652  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1653  *
1654  */
1655
1656 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1657 {
1658 #ifdef CONFIG_X86_64
1659         struct kvm_arch *ka = &kvm->arch;
1660         int vclock_mode;
1661         bool host_tsc_clocksource, vcpus_matched;
1662
1663         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1664                         atomic_read(&kvm->online_vcpus));
1665
1666         /*
1667          * If the host uses TSC clock, then passthrough TSC as stable
1668          * to the guest.
1669          */
1670         host_tsc_clocksource = kvm_get_time_and_clockread(
1671                                         &ka->master_kernel_ns,
1672                                         &ka->master_cycle_now);
1673
1674         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1675                                 && !backwards_tsc_observed
1676                                 && !ka->boot_vcpu_runs_old_kvmclock;
1677
1678         if (ka->use_master_clock)
1679                 atomic_set(&kvm_guest_has_master_clock, 1);
1680
1681         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1682         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1683                                         vcpus_matched);
1684 #endif
1685 }
1686
1687 static void kvm_gen_update_masterclock(struct kvm *kvm)
1688 {
1689 #ifdef CONFIG_X86_64
1690         int i;
1691         struct kvm_vcpu *vcpu;
1692         struct kvm_arch *ka = &kvm->arch;
1693
1694         spin_lock(&ka->pvclock_gtod_sync_lock);
1695         kvm_make_mclock_inprogress_request(kvm);
1696         /* no guest entries from this point */
1697         pvclock_update_vm_gtod_copy(kvm);
1698
1699         kvm_for_each_vcpu(i, vcpu, kvm)
1700                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1701
1702         /* guest entries allowed */
1703         kvm_for_each_vcpu(i, vcpu, kvm)
1704                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1705
1706         spin_unlock(&ka->pvclock_gtod_sync_lock);
1707 #endif
1708 }
1709
1710 static int kvm_guest_time_update(struct kvm_vcpu *v)
1711 {
1712         unsigned long flags, this_tsc_khz, tgt_tsc_khz;
1713         struct kvm_vcpu_arch *vcpu = &v->arch;
1714         struct kvm_arch *ka = &v->kvm->arch;
1715         s64 kernel_ns;
1716         u64 tsc_timestamp, host_tsc;
1717         struct pvclock_vcpu_time_info guest_hv_clock;
1718         u8 pvclock_flags;
1719         bool use_master_clock;
1720
1721         kernel_ns = 0;
1722         host_tsc = 0;
1723
1724         /*
1725          * If the host uses TSC clock, then passthrough TSC as stable
1726          * to the guest.
1727          */
1728         spin_lock(&ka->pvclock_gtod_sync_lock);
1729         use_master_clock = ka->use_master_clock;
1730         if (use_master_clock) {
1731                 host_tsc = ka->master_cycle_now;
1732                 kernel_ns = ka->master_kernel_ns;
1733         }
1734         spin_unlock(&ka->pvclock_gtod_sync_lock);
1735
1736         /* Keep irq disabled to prevent changes to the clock */
1737         local_irq_save(flags);
1738         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1739         if (unlikely(this_tsc_khz == 0)) {
1740                 local_irq_restore(flags);
1741                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1742                 return 1;
1743         }
1744         if (!use_master_clock) {
1745                 host_tsc = rdtsc();
1746                 kernel_ns = get_kernel_ns();
1747         }
1748
1749         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1750
1751         /*
1752          * We may have to catch up the TSC to match elapsed wall clock
1753          * time for two reasons, even if kvmclock is used.
1754          *   1) CPU could have been running below the maximum TSC rate
1755          *   2) Broken TSC compensation resets the base at each VCPU
1756          *      entry to avoid unknown leaps of TSC even when running
1757          *      again on the same CPU.  This may cause apparent elapsed
1758          *      time to disappear, and the guest to stand still or run
1759          *      very slowly.
1760          */
1761         if (vcpu->tsc_catchup) {
1762                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1763                 if (tsc > tsc_timestamp) {
1764                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1765                         tsc_timestamp = tsc;
1766                 }
1767         }
1768
1769         local_irq_restore(flags);
1770
1771         if (!vcpu->pv_time_enabled)
1772                 return 0;
1773
1774         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1775                 tgt_tsc_khz = kvm_has_tsc_control ?
1776                         vcpu->virtual_tsc_khz : this_tsc_khz;
1777                 kvm_get_time_scale(NSEC_PER_SEC / 1000, tgt_tsc_khz,
1778                                    &vcpu->hv_clock.tsc_shift,
1779                                    &vcpu->hv_clock.tsc_to_system_mul);
1780                 vcpu->hw_tsc_khz = this_tsc_khz;
1781         }
1782
1783         /* With all the info we got, fill in the values */
1784         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1785         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1786         vcpu->last_guest_tsc = tsc_timestamp;
1787
1788         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1789                 &guest_hv_clock, sizeof(guest_hv_clock))))
1790                 return 0;
1791
1792         /* This VCPU is paused, but it's legal for a guest to read another
1793          * VCPU's kvmclock, so we really have to follow the specification where
1794          * it says that version is odd if data is being modified, and even after
1795          * it is consistent.
1796          *
1797          * Version field updates must be kept separate.  This is because
1798          * kvm_write_guest_cached might use a "rep movs" instruction, and
1799          * writes within a string instruction are weakly ordered.  So there
1800          * are three writes overall.
1801          *
1802          * As a small optimization, only write the version field in the first
1803          * and third write.  The vcpu->pv_time cache is still valid, because the
1804          * version field is the first in the struct.
1805          */
1806         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1807
1808         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1809         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1810                                 &vcpu->hv_clock,
1811                                 sizeof(vcpu->hv_clock.version));
1812
1813         smp_wmb();
1814
1815         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1816         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1817
1818         if (vcpu->pvclock_set_guest_stopped_request) {
1819                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1820                 vcpu->pvclock_set_guest_stopped_request = false;
1821         }
1822
1823         /* If the host uses TSC clocksource, then it is stable */
1824         if (use_master_clock)
1825                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1826
1827         vcpu->hv_clock.flags = pvclock_flags;
1828
1829         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1830
1831         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1832                                 &vcpu->hv_clock,
1833                                 sizeof(vcpu->hv_clock));
1834
1835         smp_wmb();
1836
1837         vcpu->hv_clock.version++;
1838         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1839                                 &vcpu->hv_clock,
1840                                 sizeof(vcpu->hv_clock.version));
1841         return 0;
1842 }
1843
1844 /*
1845  * kvmclock updates which are isolated to a given vcpu, such as
1846  * vcpu->cpu migration, should not allow system_timestamp from
1847  * the rest of the vcpus to remain static. Otherwise ntp frequency
1848  * correction applies to one vcpu's system_timestamp but not
1849  * the others.
1850  *
1851  * So in those cases, request a kvmclock update for all vcpus.
1852  * We need to rate-limit these requests though, as they can
1853  * considerably slow guests that have a large number of vcpus.
1854  * The time for a remote vcpu to update its kvmclock is bound
1855  * by the delay we use to rate-limit the updates.
1856  */
1857
1858 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1859
1860 static void kvmclock_update_fn(struct work_struct *work)
1861 {
1862         int i;
1863         struct delayed_work *dwork = to_delayed_work(work);
1864         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1865                                            kvmclock_update_work);
1866         struct kvm *kvm = container_of(ka, struct kvm, arch);
1867         struct kvm_vcpu *vcpu;
1868
1869         kvm_for_each_vcpu(i, vcpu, kvm) {
1870                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1871                 kvm_vcpu_kick(vcpu);
1872         }
1873 }
1874
1875 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1876 {
1877         struct kvm *kvm = v->kvm;
1878
1879         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1880         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1881                                         KVMCLOCK_UPDATE_DELAY);
1882 }
1883
1884 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1885
1886 static void kvmclock_sync_fn(struct work_struct *work)
1887 {
1888         struct delayed_work *dwork = to_delayed_work(work);
1889         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1890                                            kvmclock_sync_work);
1891         struct kvm *kvm = container_of(ka, struct kvm, arch);
1892
1893         if (!kvmclock_periodic_sync)
1894                 return;
1895
1896         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1897         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1898                                         KVMCLOCK_SYNC_PERIOD);
1899 }
1900
1901 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1902 {
1903         u64 mcg_cap = vcpu->arch.mcg_cap;
1904         unsigned bank_num = mcg_cap & 0xff;
1905
1906         switch (msr) {
1907         case MSR_IA32_MCG_STATUS:
1908                 vcpu->arch.mcg_status = data;
1909                 break;
1910         case MSR_IA32_MCG_CTL:
1911                 if (!(mcg_cap & MCG_CTL_P))
1912                         return 1;
1913                 if (data != 0 && data != ~(u64)0)
1914                         return -1;
1915                 vcpu->arch.mcg_ctl = data;
1916                 break;
1917         default:
1918                 if (msr >= MSR_IA32_MC0_CTL &&
1919                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1920                         u32 offset = msr - MSR_IA32_MC0_CTL;
1921                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1922                          * some Linux kernels though clear bit 10 in bank 4 to
1923                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1924                          * this to avoid an uncatched #GP in the guest
1925                          */
1926                         if ((offset & 0x3) == 0 &&
1927                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1928                                 return -1;
1929                         vcpu->arch.mce_banks[offset] = data;
1930                         break;
1931                 }
1932                 return 1;
1933         }
1934         return 0;
1935 }
1936
1937 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1938 {
1939         struct kvm *kvm = vcpu->kvm;
1940         int lm = is_long_mode(vcpu);
1941         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1942                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1943         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1944                 : kvm->arch.xen_hvm_config.blob_size_32;
1945         u32 page_num = data & ~PAGE_MASK;
1946         u64 page_addr = data & PAGE_MASK;
1947         u8 *page;
1948         int r;
1949
1950         r = -E2BIG;
1951         if (page_num >= blob_size)
1952                 goto out;
1953         r = -ENOMEM;
1954         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1955         if (IS_ERR(page)) {
1956                 r = PTR_ERR(page);
1957                 goto out;
1958         }
1959         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1960                 goto out_free;
1961         r = 0;
1962 out_free:
1963         kfree(page);
1964 out:
1965         return r;
1966 }
1967
1968 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1969 {
1970         gpa_t gpa = data & ~0x3f;
1971
1972         /* Bits 2:5 are reserved, Should be zero */
1973         if (data & 0x3c)
1974                 return 1;
1975
1976         vcpu->arch.apf.msr_val = data;
1977
1978         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1979                 kvm_clear_async_pf_completion_queue(vcpu);
1980                 kvm_async_pf_hash_reset(vcpu);
1981                 return 0;
1982         }
1983
1984         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1985                                         sizeof(u32)))
1986                 return 1;
1987
1988         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1989         kvm_async_pf_wakeup_all(vcpu);
1990         return 0;
1991 }
1992
1993 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1994 {
1995         vcpu->arch.pv_time_enabled = false;
1996 }
1997
1998 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1999 {
2000         u64 delta;
2001
2002         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2003                 return;
2004
2005         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2006         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2007         vcpu->arch.st.accum_steal = delta;
2008 }
2009
2010 static void record_steal_time(struct kvm_vcpu *vcpu)
2011 {
2012         accumulate_steal_time(vcpu);
2013
2014         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2015                 return;
2016
2017         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2018                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2019                 return;
2020
2021         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2022         vcpu->arch.st.steal.version += 2;
2023         vcpu->arch.st.accum_steal = 0;
2024
2025         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2026                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2027 }
2028
2029 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2030 {
2031         bool pr = false;
2032         u32 msr = msr_info->index;
2033         u64 data = msr_info->data;
2034
2035         switch (msr) {
2036         case MSR_AMD64_NB_CFG:
2037         case MSR_IA32_UCODE_REV:
2038         case MSR_IA32_UCODE_WRITE:
2039         case MSR_VM_HSAVE_PA:
2040         case MSR_AMD64_PATCH_LOADER:
2041         case MSR_AMD64_BU_CFG2:
2042                 break;
2043
2044         case MSR_EFER:
2045                 return set_efer(vcpu, data);
2046         case MSR_K7_HWCR:
2047                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2048                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2049                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2050                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2051                 if (data != 0) {
2052                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2053                                     data);
2054                         return 1;
2055                 }
2056                 break;
2057         case MSR_FAM10H_MMIO_CONF_BASE:
2058                 if (data != 0) {
2059                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2060                                     "0x%llx\n", data);
2061                         return 1;
2062                 }
2063                 break;
2064         case MSR_IA32_DEBUGCTLMSR:
2065                 if (!data) {
2066                         /* We support the non-activated case already */
2067                         break;
2068                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2069                         /* Values other than LBR and BTF are vendor-specific,
2070                            thus reserved and should throw a #GP */
2071                         return 1;
2072                 }
2073                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2074                             __func__, data);
2075                 break;
2076         case 0x200 ... 0x2ff:
2077                 return kvm_mtrr_set_msr(vcpu, msr, data);
2078         case MSR_IA32_APICBASE:
2079                 return kvm_set_apic_base(vcpu, msr_info);
2080         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2081                 return kvm_x2apic_msr_write(vcpu, msr, data);
2082         case MSR_IA32_TSCDEADLINE:
2083                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2084                 break;
2085         case MSR_IA32_TSC_ADJUST:
2086                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2087                         if (!msr_info->host_initiated) {
2088                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2089                                 adjust_tsc_offset_guest(vcpu, adj);
2090                         }
2091                         vcpu->arch.ia32_tsc_adjust_msr = data;
2092                 }
2093                 break;
2094         case MSR_IA32_MISC_ENABLE:
2095                 vcpu->arch.ia32_misc_enable_msr = data;
2096                 break;
2097         case MSR_IA32_SMBASE:
2098                 if (!msr_info->host_initiated)
2099                         return 1;
2100                 vcpu->arch.smbase = data;
2101                 break;
2102         case MSR_KVM_WALL_CLOCK_NEW:
2103         case MSR_KVM_WALL_CLOCK:
2104                 vcpu->kvm->arch.wall_clock = data;
2105                 kvm_write_wall_clock(vcpu->kvm, data);
2106                 break;
2107         case MSR_KVM_SYSTEM_TIME_NEW:
2108         case MSR_KVM_SYSTEM_TIME: {
2109                 u64 gpa_offset;
2110                 struct kvm_arch *ka = &vcpu->kvm->arch;
2111
2112                 kvmclock_reset(vcpu);
2113
2114                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2115                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2116
2117                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2118                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2119                                         &vcpu->requests);
2120
2121                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2122                 }
2123
2124                 vcpu->arch.time = data;
2125                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2126
2127                 /* we verify if the enable bit is set... */
2128                 if (!(data & 1))
2129                         break;
2130
2131                 gpa_offset = data & ~(PAGE_MASK | 1);
2132
2133                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2134                      &vcpu->arch.pv_time, data & ~1ULL,
2135                      sizeof(struct pvclock_vcpu_time_info)))
2136                         vcpu->arch.pv_time_enabled = false;
2137                 else
2138                         vcpu->arch.pv_time_enabled = true;
2139
2140                 break;
2141         }
2142         case MSR_KVM_ASYNC_PF_EN:
2143                 if (kvm_pv_enable_async_pf(vcpu, data))
2144                         return 1;
2145                 break;
2146         case MSR_KVM_STEAL_TIME:
2147
2148                 if (unlikely(!sched_info_on()))
2149                         return 1;
2150
2151                 if (data & KVM_STEAL_RESERVED_MASK)
2152                         return 1;
2153
2154                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2155                                                 data & KVM_STEAL_VALID_BITS,
2156                                                 sizeof(struct kvm_steal_time)))
2157                         return 1;
2158
2159                 vcpu->arch.st.msr_val = data;
2160
2161                 if (!(data & KVM_MSR_ENABLED))
2162                         break;
2163
2164                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2165
2166                 break;
2167         case MSR_KVM_PV_EOI_EN:
2168                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2169                         return 1;
2170                 break;
2171
2172         case MSR_IA32_MCG_CTL:
2173         case MSR_IA32_MCG_STATUS:
2174         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2175                 return set_msr_mce(vcpu, msr, data);
2176
2177         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2178         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2179                 pr = true; /* fall through */
2180         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2181         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2182                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2183                         return kvm_pmu_set_msr(vcpu, msr_info);
2184
2185                 if (pr || data != 0)
2186                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2187                                     "0x%x data 0x%llx\n", msr, data);
2188                 break;
2189         case MSR_K7_CLK_CTL:
2190                 /*
2191                  * Ignore all writes to this no longer documented MSR.
2192                  * Writes are only relevant for old K7 processors,
2193                  * all pre-dating SVM, but a recommended workaround from
2194                  * AMD for these chips. It is possible to specify the
2195                  * affected processor models on the command line, hence
2196                  * the need to ignore the workaround.
2197                  */
2198                 break;
2199         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2200         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2201         case HV_X64_MSR_CRASH_CTL:
2202                 return kvm_hv_set_msr_common(vcpu, msr, data,
2203                                              msr_info->host_initiated);
2204         case MSR_IA32_BBL_CR_CTL3:
2205                 /* Drop writes to this legacy MSR -- see rdmsr
2206                  * counterpart for further detail.
2207                  */
2208                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2209                 break;
2210         case MSR_AMD64_OSVW_ID_LENGTH:
2211                 if (!guest_cpuid_has_osvw(vcpu))
2212                         return 1;
2213                 vcpu->arch.osvw.length = data;
2214                 break;
2215         case MSR_AMD64_OSVW_STATUS:
2216                 if (!guest_cpuid_has_osvw(vcpu))
2217                         return 1;
2218                 vcpu->arch.osvw.status = data;
2219                 break;
2220         default:
2221                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2222                         return xen_hvm_config(vcpu, data);
2223                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2224                         return kvm_pmu_set_msr(vcpu, msr_info);
2225                 if (!ignore_msrs) {
2226                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2227                                     msr, data);
2228                         return 1;
2229                 } else {
2230                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2231                                     msr, data);
2232                         break;
2233                 }
2234         }
2235         return 0;
2236 }
2237 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2238
2239
2240 /*
2241  * Reads an msr value (of 'msr_index') into 'pdata'.
2242  * Returns 0 on success, non-0 otherwise.
2243  * Assumes vcpu_load() was already called.
2244  */
2245 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2246 {
2247         return kvm_x86_ops->get_msr(vcpu, msr);
2248 }
2249 EXPORT_SYMBOL_GPL(kvm_get_msr);
2250
2251 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2252 {
2253         u64 data;
2254         u64 mcg_cap = vcpu->arch.mcg_cap;
2255         unsigned bank_num = mcg_cap & 0xff;
2256
2257         switch (msr) {
2258         case MSR_IA32_P5_MC_ADDR:
2259         case MSR_IA32_P5_MC_TYPE:
2260                 data = 0;
2261                 break;
2262         case MSR_IA32_MCG_CAP:
2263                 data = vcpu->arch.mcg_cap;
2264                 break;
2265         case MSR_IA32_MCG_CTL:
2266                 if (!(mcg_cap & MCG_CTL_P))
2267                         return 1;
2268                 data = vcpu->arch.mcg_ctl;
2269                 break;
2270         case MSR_IA32_MCG_STATUS:
2271                 data = vcpu->arch.mcg_status;
2272                 break;
2273         default:
2274                 if (msr >= MSR_IA32_MC0_CTL &&
2275                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2276                         u32 offset = msr - MSR_IA32_MC0_CTL;
2277                         data = vcpu->arch.mce_banks[offset];
2278                         break;
2279                 }
2280                 return 1;
2281         }
2282         *pdata = data;
2283         return 0;
2284 }
2285
2286 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2287 {
2288         switch (msr_info->index) {
2289         case MSR_IA32_PLATFORM_ID:
2290         case MSR_IA32_EBL_CR_POWERON:
2291         case MSR_IA32_DEBUGCTLMSR:
2292         case MSR_IA32_LASTBRANCHFROMIP:
2293         case MSR_IA32_LASTBRANCHTOIP:
2294         case MSR_IA32_LASTINTFROMIP:
2295         case MSR_IA32_LASTINTTOIP:
2296         case MSR_K8_SYSCFG:
2297         case MSR_K8_TSEG_ADDR:
2298         case MSR_K8_TSEG_MASK:
2299         case MSR_K7_HWCR:
2300         case MSR_VM_HSAVE_PA:
2301         case MSR_K8_INT_PENDING_MSG:
2302         case MSR_AMD64_NB_CFG:
2303         case MSR_FAM10H_MMIO_CONF_BASE:
2304         case MSR_AMD64_BU_CFG2:
2305                 msr_info->data = 0;
2306                 break;
2307         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2308         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2309         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2310         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2311                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2312                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2313                 msr_info->data = 0;
2314                 break;
2315         case MSR_IA32_UCODE_REV:
2316                 msr_info->data = 0x100000000ULL;
2317                 break;
2318         case MSR_MTRRcap:
2319         case 0x200 ... 0x2ff:
2320                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2321         case 0xcd: /* fsb frequency */
2322                 msr_info->data = 3;
2323                 break;
2324                 /*
2325                  * MSR_EBC_FREQUENCY_ID
2326                  * Conservative value valid for even the basic CPU models.
2327                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2328                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2329                  * and 266MHz for model 3, or 4. Set Core Clock
2330                  * Frequency to System Bus Frequency Ratio to 1 (bits
2331                  * 31:24) even though these are only valid for CPU
2332                  * models > 2, however guests may end up dividing or
2333                  * multiplying by zero otherwise.
2334                  */
2335         case MSR_EBC_FREQUENCY_ID:
2336                 msr_info->data = 1 << 24;
2337                 break;
2338         case MSR_IA32_APICBASE:
2339                 msr_info->data = kvm_get_apic_base(vcpu);
2340                 break;
2341         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2342                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2343                 break;
2344         case MSR_IA32_TSCDEADLINE:
2345                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2346                 break;
2347         case MSR_IA32_TSC_ADJUST:
2348                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2349                 break;
2350         case MSR_IA32_MISC_ENABLE:
2351                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2352                 break;
2353         case MSR_IA32_SMBASE:
2354                 if (!msr_info->host_initiated)
2355                         return 1;
2356                 msr_info->data = vcpu->arch.smbase;
2357                 break;
2358         case MSR_IA32_PERF_STATUS:
2359                 /* TSC increment by tick */
2360                 msr_info->data = 1000ULL;
2361                 /* CPU multiplier */
2362                 msr_info->data |= (((uint64_t)4ULL) << 40);
2363                 break;
2364         case MSR_EFER:
2365                 msr_info->data = vcpu->arch.efer;
2366                 break;
2367         case MSR_KVM_WALL_CLOCK:
2368         case MSR_KVM_WALL_CLOCK_NEW:
2369                 msr_info->data = vcpu->kvm->arch.wall_clock;
2370                 break;
2371         case MSR_KVM_SYSTEM_TIME:
2372         case MSR_KVM_SYSTEM_TIME_NEW:
2373                 msr_info->data = vcpu->arch.time;
2374                 break;
2375         case MSR_KVM_ASYNC_PF_EN:
2376                 msr_info->data = vcpu->arch.apf.msr_val;
2377                 break;
2378         case MSR_KVM_STEAL_TIME:
2379                 msr_info->data = vcpu->arch.st.msr_val;
2380                 break;
2381         case MSR_KVM_PV_EOI_EN:
2382                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2383                 break;
2384         case MSR_IA32_P5_MC_ADDR:
2385         case MSR_IA32_P5_MC_TYPE:
2386         case MSR_IA32_MCG_CAP:
2387         case MSR_IA32_MCG_CTL:
2388         case MSR_IA32_MCG_STATUS:
2389         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2390                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2391         case MSR_K7_CLK_CTL:
2392                 /*
2393                  * Provide expected ramp-up count for K7. All other
2394                  * are set to zero, indicating minimum divisors for
2395                  * every field.
2396                  *
2397                  * This prevents guest kernels on AMD host with CPU
2398                  * type 6, model 8 and higher from exploding due to
2399                  * the rdmsr failing.
2400                  */
2401                 msr_info->data = 0x20000000;
2402                 break;
2403         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2404         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2405         case HV_X64_MSR_CRASH_CTL:
2406                 return kvm_hv_get_msr_common(vcpu,
2407                                              msr_info->index, &msr_info->data);
2408                 break;
2409         case MSR_IA32_BBL_CR_CTL3:
2410                 /* This legacy MSR exists but isn't fully documented in current
2411                  * silicon.  It is however accessed by winxp in very narrow
2412                  * scenarios where it sets bit #19, itself documented as
2413                  * a "reserved" bit.  Best effort attempt to source coherent
2414                  * read data here should the balance of the register be
2415                  * interpreted by the guest:
2416                  *
2417                  * L2 cache control register 3: 64GB range, 256KB size,
2418                  * enabled, latency 0x1, configured
2419                  */
2420                 msr_info->data = 0xbe702111;
2421                 break;
2422         case MSR_AMD64_OSVW_ID_LENGTH:
2423                 if (!guest_cpuid_has_osvw(vcpu))
2424                         return 1;
2425                 msr_info->data = vcpu->arch.osvw.length;
2426                 break;
2427         case MSR_AMD64_OSVW_STATUS:
2428                 if (!guest_cpuid_has_osvw(vcpu))
2429                         return 1;
2430                 msr_info->data = vcpu->arch.osvw.status;
2431                 break;
2432         default:
2433                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2434                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2435                 if (!ignore_msrs) {
2436                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2437                         return 1;
2438                 } else {
2439                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2440                         msr_info->data = 0;
2441                 }
2442                 break;
2443         }
2444         return 0;
2445 }
2446 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2447
2448 /*
2449  * Read or write a bunch of msrs. All parameters are kernel addresses.
2450  *
2451  * @return number of msrs set successfully.
2452  */
2453 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2454                     struct kvm_msr_entry *entries,
2455                     int (*do_msr)(struct kvm_vcpu *vcpu,
2456                                   unsigned index, u64 *data))
2457 {
2458         int i, idx;
2459
2460         idx = srcu_read_lock(&vcpu->kvm->srcu);
2461         for (i = 0; i < msrs->nmsrs; ++i)
2462                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2463                         break;
2464         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2465
2466         return i;
2467 }
2468
2469 /*
2470  * Read or write a bunch of msrs. Parameters are user addresses.
2471  *
2472  * @return number of msrs set successfully.
2473  */
2474 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2475                   int (*do_msr)(struct kvm_vcpu *vcpu,
2476                                 unsigned index, u64 *data),
2477                   int writeback)
2478 {
2479         struct kvm_msrs msrs;
2480         struct kvm_msr_entry *entries;
2481         int r, n;
2482         unsigned size;
2483
2484         r = -EFAULT;
2485         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2486                 goto out;
2487
2488         r = -E2BIG;
2489         if (msrs.nmsrs >= MAX_IO_MSRS)
2490                 goto out;
2491
2492         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2493         entries = memdup_user(user_msrs->entries, size);
2494         if (IS_ERR(entries)) {
2495                 r = PTR_ERR(entries);
2496                 goto out;
2497         }
2498
2499         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2500         if (r < 0)
2501                 goto out_free;
2502
2503         r = -EFAULT;
2504         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2505                 goto out_free;
2506
2507         r = n;
2508
2509 out_free:
2510         kfree(entries);
2511 out:
2512         return r;
2513 }
2514
2515 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2516 {
2517         int r;
2518
2519         switch (ext) {
2520         case KVM_CAP_IRQCHIP:
2521         case KVM_CAP_HLT:
2522         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2523         case KVM_CAP_SET_TSS_ADDR:
2524         case KVM_CAP_EXT_CPUID:
2525         case KVM_CAP_EXT_EMUL_CPUID:
2526         case KVM_CAP_CLOCKSOURCE:
2527         case KVM_CAP_PIT:
2528         case KVM_CAP_NOP_IO_DELAY:
2529         case KVM_CAP_MP_STATE:
2530         case KVM_CAP_SYNC_MMU:
2531         case KVM_CAP_USER_NMI:
2532         case KVM_CAP_REINJECT_CONTROL:
2533         case KVM_CAP_IRQ_INJECT_STATUS:
2534         case KVM_CAP_IOEVENTFD:
2535         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2536         case KVM_CAP_PIT2:
2537         case KVM_CAP_PIT_STATE2:
2538         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2539         case KVM_CAP_XEN_HVM:
2540         case KVM_CAP_ADJUST_CLOCK:
2541         case KVM_CAP_VCPU_EVENTS:
2542         case KVM_CAP_HYPERV:
2543         case KVM_CAP_HYPERV_VAPIC:
2544         case KVM_CAP_HYPERV_SPIN:
2545         case KVM_CAP_PCI_SEGMENT:
2546         case KVM_CAP_DEBUGREGS:
2547         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2548         case KVM_CAP_XSAVE:
2549         case KVM_CAP_ASYNC_PF:
2550         case KVM_CAP_GET_TSC_KHZ:
2551         case KVM_CAP_KVMCLOCK_CTRL:
2552         case KVM_CAP_READONLY_MEM:
2553         case KVM_CAP_HYPERV_TIME:
2554         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2555         case KVM_CAP_TSC_DEADLINE_TIMER:
2556         case KVM_CAP_ENABLE_CAP_VM:
2557         case KVM_CAP_DISABLE_QUIRKS:
2558         case KVM_CAP_SET_BOOT_CPU_ID:
2559         case KVM_CAP_SPLIT_IRQCHIP:
2560 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2561         case KVM_CAP_ASSIGN_DEV_IRQ:
2562         case KVM_CAP_PCI_2_3:
2563 #endif
2564                 r = 1;
2565                 break;
2566         case KVM_CAP_X86_SMM:
2567                 /* SMBASE is usually relocated above 1M on modern chipsets,
2568                  * and SMM handlers might indeed rely on 4G segment limits,
2569                  * so do not report SMM to be available if real mode is
2570                  * emulated via vm86 mode.  Still, do not go to great lengths
2571                  * to avoid userspace's usage of the feature, because it is a
2572                  * fringe case that is not enabled except via specific settings
2573                  * of the module parameters.
2574                  */
2575                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2576                 break;
2577         case KVM_CAP_COALESCED_MMIO:
2578                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2579                 break;
2580         case KVM_CAP_VAPIC:
2581                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2582                 break;
2583         case KVM_CAP_NR_VCPUS:
2584                 r = KVM_SOFT_MAX_VCPUS;
2585                 break;
2586         case KVM_CAP_MAX_VCPUS:
2587                 r = KVM_MAX_VCPUS;
2588                 break;
2589         case KVM_CAP_NR_MEMSLOTS:
2590                 r = KVM_USER_MEM_SLOTS;
2591                 break;
2592         case KVM_CAP_PV_MMU:    /* obsolete */
2593                 r = 0;
2594                 break;
2595 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2596         case KVM_CAP_IOMMU:
2597                 r = iommu_present(&pci_bus_type);
2598                 break;
2599 #endif
2600         case KVM_CAP_MCE:
2601                 r = KVM_MAX_MCE_BANKS;
2602                 break;
2603         case KVM_CAP_XCRS:
2604                 r = cpu_has_xsave;
2605                 break;
2606         case KVM_CAP_TSC_CONTROL:
2607                 r = kvm_has_tsc_control;
2608                 break;
2609         default:
2610                 r = 0;
2611                 break;
2612         }
2613         return r;
2614
2615 }
2616
2617 long kvm_arch_dev_ioctl(struct file *filp,
2618                         unsigned int ioctl, unsigned long arg)
2619 {
2620         void __user *argp = (void __user *)arg;
2621         long r;
2622
2623         switch (ioctl) {
2624         case KVM_GET_MSR_INDEX_LIST: {
2625                 struct kvm_msr_list __user *user_msr_list = argp;
2626                 struct kvm_msr_list msr_list;
2627                 unsigned n;
2628
2629                 r = -EFAULT;
2630                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2631                         goto out;
2632                 n = msr_list.nmsrs;
2633                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2634                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2635                         goto out;
2636                 r = -E2BIG;
2637                 if (n < msr_list.nmsrs)
2638                         goto out;
2639                 r = -EFAULT;
2640                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2641                                  num_msrs_to_save * sizeof(u32)))
2642                         goto out;
2643                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2644                                  &emulated_msrs,
2645                                  num_emulated_msrs * sizeof(u32)))
2646                         goto out;
2647                 r = 0;
2648                 break;
2649         }
2650         case KVM_GET_SUPPORTED_CPUID:
2651         case KVM_GET_EMULATED_CPUID: {
2652                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2653                 struct kvm_cpuid2 cpuid;
2654
2655                 r = -EFAULT;
2656                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2657                         goto out;
2658
2659                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2660                                             ioctl);
2661                 if (r)
2662                         goto out;
2663
2664                 r = -EFAULT;
2665                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2666                         goto out;
2667                 r = 0;
2668                 break;
2669         }
2670         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2671                 u64 mce_cap;
2672
2673                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2674                 r = -EFAULT;
2675                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2676                         goto out;
2677                 r = 0;
2678                 break;
2679         }
2680         default:
2681                 r = -EINVAL;
2682         }
2683 out:
2684         return r;
2685 }
2686
2687 static void wbinvd_ipi(void *garbage)
2688 {
2689         wbinvd();
2690 }
2691
2692 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2693 {
2694         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2695 }
2696
2697 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2698 {
2699         /* Address WBINVD may be executed by guest */
2700         if (need_emulate_wbinvd(vcpu)) {
2701                 if (kvm_x86_ops->has_wbinvd_exit())
2702                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2703                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2704                         smp_call_function_single(vcpu->cpu,
2705                                         wbinvd_ipi, NULL, 1);
2706         }
2707
2708         kvm_x86_ops->vcpu_load(vcpu, cpu);
2709
2710         /* Apply any externally detected TSC adjustments (due to suspend) */
2711         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2712                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2713                 vcpu->arch.tsc_offset_adjustment = 0;
2714                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2715         }
2716
2717         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2718                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2719                                 rdtsc() - vcpu->arch.last_host_tsc;
2720                 if (tsc_delta < 0)
2721                         mark_tsc_unstable("KVM discovered backwards TSC");
2722
2723                 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2724                                 kvm_x86_ops->set_hv_timer(vcpu,
2725                                         kvm_get_lapic_tscdeadline_msr(vcpu)))
2726                         kvm_lapic_switch_to_sw_timer(vcpu);
2727                 if (check_tsc_unstable()) {
2728                         u64 offset = kvm_compute_tsc_offset(vcpu,
2729                                                 vcpu->arch.last_guest_tsc);
2730                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2731                         vcpu->arch.tsc_catchup = 1;
2732                 }
2733                 /*
2734                  * On a host with synchronized TSC, there is no need to update
2735                  * kvmclock on vcpu->cpu migration
2736                  */
2737                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2738                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2739                 if (vcpu->cpu != cpu)
2740                         kvm_migrate_timers(vcpu);
2741                 vcpu->cpu = cpu;
2742         }
2743
2744         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2745 }
2746
2747 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2748 {
2749         kvm_x86_ops->vcpu_put(vcpu);
2750         kvm_put_guest_fpu(vcpu);
2751         vcpu->arch.last_host_tsc = rdtsc();
2752 }
2753
2754 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2755                                     struct kvm_lapic_state *s)
2756 {
2757         kvm_x86_ops->sync_pir_to_irr(vcpu);
2758         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2759
2760         return 0;
2761 }
2762
2763 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2764                                     struct kvm_lapic_state *s)
2765 {
2766         kvm_apic_post_state_restore(vcpu, s);
2767         update_cr8_intercept(vcpu);
2768
2769         return 0;
2770 }
2771
2772 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2773 {
2774         return (!lapic_in_kernel(vcpu) ||
2775                 kvm_apic_accept_pic_intr(vcpu));
2776 }
2777
2778 /*
2779  * if userspace requested an interrupt window, check that the
2780  * interrupt window is open.
2781  *
2782  * No need to exit to userspace if we already have an interrupt queued.
2783  */
2784 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2785 {
2786         return kvm_arch_interrupt_allowed(vcpu) &&
2787                 !kvm_cpu_has_interrupt(vcpu) &&
2788                 !kvm_event_needs_reinjection(vcpu) &&
2789                 kvm_cpu_accept_dm_intr(vcpu);
2790 }
2791
2792 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2793                                     struct kvm_interrupt *irq)
2794 {
2795         if (irq->irq >= KVM_NR_INTERRUPTS)
2796                 return -EINVAL;
2797
2798         if (!irqchip_in_kernel(vcpu->kvm)) {
2799                 kvm_queue_interrupt(vcpu, irq->irq, false);
2800                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2801                 return 0;
2802         }
2803
2804         /*
2805          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2806          * fail for in-kernel 8259.
2807          */
2808         if (pic_in_kernel(vcpu->kvm))
2809                 return -ENXIO;
2810
2811         if (vcpu->arch.pending_external_vector != -1)
2812                 return -EEXIST;
2813
2814         vcpu->arch.pending_external_vector = irq->irq;
2815         kvm_make_request(KVM_REQ_EVENT, vcpu);
2816         return 0;
2817 }
2818
2819 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2820 {
2821         kvm_inject_nmi(vcpu);
2822
2823         return 0;
2824 }
2825
2826 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2827 {
2828         kvm_make_request(KVM_REQ_SMI, vcpu);
2829
2830         return 0;
2831 }
2832
2833 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2834                                            struct kvm_tpr_access_ctl *tac)
2835 {
2836         if (tac->flags)
2837                 return -EINVAL;
2838         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2839         return 0;
2840 }
2841
2842 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2843                                         u64 mcg_cap)
2844 {
2845         int r;
2846         unsigned bank_num = mcg_cap & 0xff, bank;
2847
2848         r = -EINVAL;
2849         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2850                 goto out;
2851         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2852                 goto out;
2853         r = 0;
2854         vcpu->arch.mcg_cap = mcg_cap;
2855         /* Init IA32_MCG_CTL to all 1s */
2856         if (mcg_cap & MCG_CTL_P)
2857                 vcpu->arch.mcg_ctl = ~(u64)0;
2858         /* Init IA32_MCi_CTL to all 1s */
2859         for (bank = 0; bank < bank_num; bank++)
2860                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2861 out:
2862         return r;
2863 }
2864
2865 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2866                                       struct kvm_x86_mce *mce)
2867 {
2868         u64 mcg_cap = vcpu->arch.mcg_cap;
2869         unsigned bank_num = mcg_cap & 0xff;
2870         u64 *banks = vcpu->arch.mce_banks;
2871
2872         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2873                 return -EINVAL;
2874         /*
2875          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2876          * reporting is disabled
2877          */
2878         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2879             vcpu->arch.mcg_ctl != ~(u64)0)
2880                 return 0;
2881         banks += 4 * mce->bank;
2882         /*
2883          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2884          * reporting is disabled for the bank
2885          */
2886         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2887                 return 0;
2888         if (mce->status & MCI_STATUS_UC) {
2889                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2890                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2891                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2892                         return 0;
2893                 }
2894                 if (banks[1] & MCI_STATUS_VAL)
2895                         mce->status |= MCI_STATUS_OVER;
2896                 banks[2] = mce->addr;
2897                 banks[3] = mce->misc;
2898                 vcpu->arch.mcg_status = mce->mcg_status;
2899                 banks[1] = mce->status;
2900                 kvm_queue_exception(vcpu, MC_VECTOR);
2901         } else if (!(banks[1] & MCI_STATUS_VAL)
2902                    || !(banks[1] & MCI_STATUS_UC)) {
2903                 if (banks[1] & MCI_STATUS_VAL)
2904                         mce->status |= MCI_STATUS_OVER;
2905                 banks[2] = mce->addr;
2906                 banks[3] = mce->misc;
2907                 banks[1] = mce->status;
2908         } else
2909                 banks[1] |= MCI_STATUS_OVER;
2910         return 0;
2911 }
2912
2913 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2914                                                struct kvm_vcpu_events *events)
2915 {
2916         process_nmi(vcpu);
2917         events->exception.injected =
2918                 vcpu->arch.exception.pending &&
2919                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2920         events->exception.nr = vcpu->arch.exception.nr;
2921         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2922         events->exception.pad = 0;
2923         events->exception.error_code = vcpu->arch.exception.error_code;
2924
2925         events->interrupt.injected =
2926                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2927         events->interrupt.nr = vcpu->arch.interrupt.nr;
2928         events->interrupt.soft = 0;
2929         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2930
2931         events->nmi.injected = vcpu->arch.nmi_injected;
2932         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2933         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2934         events->nmi.pad = 0;
2935
2936         events->sipi_vector = 0; /* never valid when reporting to user space */
2937
2938         events->smi.smm = is_smm(vcpu);
2939         events->smi.pending = vcpu->arch.smi_pending;
2940         events->smi.smm_inside_nmi =
2941                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2942         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2943
2944         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2945                          | KVM_VCPUEVENT_VALID_SHADOW
2946                          | KVM_VCPUEVENT_VALID_SMM);
2947         memset(&events->reserved, 0, sizeof(events->reserved));
2948 }
2949
2950 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2951                                               struct kvm_vcpu_events *events)
2952 {
2953         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2954                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2955                               | KVM_VCPUEVENT_VALID_SHADOW
2956                               | KVM_VCPUEVENT_VALID_SMM))
2957                 return -EINVAL;
2958
2959         process_nmi(vcpu);
2960         vcpu->arch.exception.pending = events->exception.injected;
2961         vcpu->arch.exception.nr = events->exception.nr;
2962         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2963         vcpu->arch.exception.error_code = events->exception.error_code;
2964
2965         vcpu->arch.interrupt.pending = events->interrupt.injected;
2966         vcpu->arch.interrupt.nr = events->interrupt.nr;
2967         vcpu->arch.interrupt.soft = events->interrupt.soft;
2968         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2969                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2970                                                   events->interrupt.shadow);
2971
2972         vcpu->arch.nmi_injected = events->nmi.injected;
2973         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2974                 vcpu->arch.nmi_pending = events->nmi.pending;
2975         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2976
2977         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2978             kvm_vcpu_has_lapic(vcpu))
2979                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2980
2981         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2982                 if (events->smi.smm)
2983                         vcpu->arch.hflags |= HF_SMM_MASK;
2984                 else
2985                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2986                 vcpu->arch.smi_pending = events->smi.pending;
2987                 if (events->smi.smm_inside_nmi)
2988                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2989                 else
2990                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2991                 if (kvm_vcpu_has_lapic(vcpu)) {
2992                         if (events->smi.latched_init)
2993                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2994                         else
2995                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2996                 }
2997         }
2998
2999         kvm_make_request(KVM_REQ_EVENT, vcpu);
3000
3001         return 0;
3002 }
3003
3004 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3005                                              struct kvm_debugregs *dbgregs)
3006 {
3007         unsigned long val;
3008
3009         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3010         kvm_get_dr(vcpu, 6, &val);
3011         dbgregs->dr6 = val;
3012         dbgregs->dr7 = vcpu->arch.dr7;
3013         dbgregs->flags = 0;
3014         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3015 }
3016
3017 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3018                                             struct kvm_debugregs *dbgregs)
3019 {
3020         if (dbgregs->flags)
3021                 return -EINVAL;
3022
3023         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3024         kvm_update_dr0123(vcpu);
3025         vcpu->arch.dr6 = dbgregs->dr6;
3026         kvm_update_dr6(vcpu);
3027         vcpu->arch.dr7 = dbgregs->dr7;
3028         kvm_update_dr7(vcpu);
3029
3030         return 0;
3031 }
3032
3033 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3034
3035 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3036 {
3037         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3038         u64 xstate_bv = xsave->header.xfeatures;
3039         u64 valid;
3040
3041         /*
3042          * Copy legacy XSAVE area, to avoid complications with CPUID
3043          * leaves 0 and 1 in the loop below.
3044          */
3045         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3046
3047         /* Set XSTATE_BV */
3048         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3049
3050         /*
3051          * Copy each region from the possibly compacted offset to the
3052          * non-compacted offset.
3053          */
3054         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3055         while (valid) {
3056                 u64 feature = valid & -valid;
3057                 int index = fls64(feature) - 1;
3058                 void *src = get_xsave_addr(xsave, feature);
3059
3060                 if (src) {
3061                         u32 size, offset, ecx, edx;
3062                         cpuid_count(XSTATE_CPUID, index,
3063                                     &size, &offset, &ecx, &edx);
3064                         memcpy(dest + offset, src, size);
3065                 }
3066
3067                 valid -= feature;
3068         }
3069 }
3070
3071 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3072 {
3073         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3074         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3075         u64 valid;
3076
3077         /*
3078          * Copy legacy XSAVE area, to avoid complications with CPUID
3079          * leaves 0 and 1 in the loop below.
3080          */
3081         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3082
3083         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3084         xsave->header.xfeatures = xstate_bv;
3085         if (cpu_has_xsaves)
3086                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3087
3088         /*
3089          * Copy each region from the non-compacted offset to the
3090          * possibly compacted offset.
3091          */
3092         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3093         while (valid) {
3094                 u64 feature = valid & -valid;
3095                 int index = fls64(feature) - 1;
3096                 void *dest = get_xsave_addr(xsave, feature);
3097
3098                 if (dest) {
3099                         u32 size, offset, ecx, edx;
3100                         cpuid_count(XSTATE_CPUID, index,
3101                                     &size, &offset, &ecx, &edx);
3102                         memcpy(dest, src + offset, size);
3103                 }
3104
3105                 valid -= feature;
3106         }
3107 }
3108
3109 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3110                                          struct kvm_xsave *guest_xsave)
3111 {
3112         if (cpu_has_xsave) {
3113                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3114                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3115         } else {
3116                 memcpy(guest_xsave->region,
3117                         &vcpu->arch.guest_fpu.state.fxsave,
3118                         sizeof(struct fxregs_state));
3119                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3120                         XFEATURE_MASK_FPSSE;
3121         }
3122 }
3123
3124 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3125                                         struct kvm_xsave *guest_xsave)
3126 {
3127         u64 xstate_bv =
3128                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3129
3130         if (cpu_has_xsave) {
3131                 /*
3132                  * Here we allow setting states that are not present in
3133                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3134                  * with old userspace.
3135                  */
3136                 if (xstate_bv & ~kvm_supported_xcr0())
3137                         return -EINVAL;
3138                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3139         } else {
3140                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3141                         return -EINVAL;
3142                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3143                         guest_xsave->region, sizeof(struct fxregs_state));
3144         }
3145         return 0;
3146 }
3147
3148 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3149                                         struct kvm_xcrs *guest_xcrs)
3150 {
3151         if (!cpu_has_xsave) {
3152                 guest_xcrs->nr_xcrs = 0;
3153                 return;
3154         }
3155
3156         guest_xcrs->nr_xcrs = 1;
3157         guest_xcrs->flags = 0;
3158         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3159         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3160 }
3161
3162 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3163                                        struct kvm_xcrs *guest_xcrs)
3164 {
3165         int i, r = 0;
3166
3167         if (!cpu_has_xsave)
3168                 return -EINVAL;
3169
3170         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3171                 return -EINVAL;
3172
3173         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3174                 /* Only support XCR0 currently */
3175                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3176                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3177                                 guest_xcrs->xcrs[i].value);
3178                         break;
3179                 }
3180         if (r)
3181                 r = -EINVAL;
3182         return r;
3183 }
3184
3185 /*
3186  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3187  * stopped by the hypervisor.  This function will be called from the host only.
3188  * EINVAL is returned when the host attempts to set the flag for a guest that
3189  * does not support pv clocks.
3190  */
3191 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3192 {
3193         if (!vcpu->arch.pv_time_enabled)
3194                 return -EINVAL;
3195         vcpu->arch.pvclock_set_guest_stopped_request = true;
3196         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3197         return 0;
3198 }
3199
3200 long kvm_arch_vcpu_ioctl(struct file *filp,
3201                          unsigned int ioctl, unsigned long arg)
3202 {
3203         struct kvm_vcpu *vcpu = filp->private_data;
3204         void __user *argp = (void __user *)arg;
3205         int r;
3206         union {
3207                 struct kvm_lapic_state *lapic;
3208                 struct kvm_xsave *xsave;
3209                 struct kvm_xcrs *xcrs;
3210                 void *buffer;
3211         } u;
3212
3213         u.buffer = NULL;
3214         switch (ioctl) {
3215         case KVM_GET_LAPIC: {
3216                 r = -EINVAL;
3217                 if (!vcpu->arch.apic)
3218                         goto out;
3219                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3220
3221                 r = -ENOMEM;
3222                 if (!u.lapic)
3223                         goto out;
3224                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3225                 if (r)
3226                         goto out;
3227                 r = -EFAULT;
3228                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3229                         goto out;
3230                 r = 0;
3231                 break;
3232         }
3233         case KVM_SET_LAPIC: {
3234                 r = -EINVAL;
3235                 if (!vcpu->arch.apic)
3236                         goto out;
3237                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3238                 if (IS_ERR(u.lapic))
3239                         return PTR_ERR(u.lapic);
3240
3241                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3242                 break;
3243         }
3244         case KVM_INTERRUPT: {
3245                 struct kvm_interrupt irq;
3246
3247                 r = -EFAULT;
3248                 if (copy_from_user(&irq, argp, sizeof irq))
3249                         goto out;
3250                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3251                 break;
3252         }
3253         case KVM_NMI: {
3254                 r = kvm_vcpu_ioctl_nmi(vcpu);
3255                 break;
3256         }
3257         case KVM_SMI: {
3258                 r = kvm_vcpu_ioctl_smi(vcpu);
3259                 break;
3260         }
3261         case KVM_SET_CPUID: {
3262                 struct kvm_cpuid __user *cpuid_arg = argp;
3263                 struct kvm_cpuid cpuid;
3264
3265                 r = -EFAULT;
3266                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3267                         goto out;
3268                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3269                 break;
3270         }
3271         case KVM_SET_CPUID2: {
3272                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3273                 struct kvm_cpuid2 cpuid;
3274
3275                 r = -EFAULT;
3276                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3277                         goto out;
3278                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3279                                               cpuid_arg->entries);
3280                 break;
3281         }
3282         case KVM_GET_CPUID2: {
3283                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3284                 struct kvm_cpuid2 cpuid;
3285
3286                 r = -EFAULT;
3287                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3288                         goto out;
3289                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3290                                               cpuid_arg->entries);
3291                 if (r)
3292                         goto out;
3293                 r = -EFAULT;
3294                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3295                         goto out;
3296                 r = 0;
3297                 break;
3298         }
3299         case KVM_GET_MSRS:
3300                 r = msr_io(vcpu, argp, do_get_msr, 1);
3301                 break;
3302         case KVM_SET_MSRS:
3303                 r = msr_io(vcpu, argp, do_set_msr, 0);
3304                 break;
3305         case KVM_TPR_ACCESS_REPORTING: {
3306                 struct kvm_tpr_access_ctl tac;
3307
3308                 r = -EFAULT;
3309                 if (copy_from_user(&tac, argp, sizeof tac))
3310                         goto out;
3311                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3312                 if (r)
3313                         goto out;
3314                 r = -EFAULT;
3315                 if (copy_to_user(argp, &tac, sizeof tac))
3316                         goto out;
3317                 r = 0;
3318                 break;
3319         };
3320         case KVM_SET_VAPIC_ADDR: {
3321                 struct kvm_vapic_addr va;
3322
3323                 r = -EINVAL;
3324                 if (!lapic_in_kernel(vcpu))
3325                         goto out;
3326                 r = -EFAULT;
3327                 if (copy_from_user(&va, argp, sizeof va))
3328                         goto out;
3329                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3330                 break;
3331         }
3332         case KVM_X86_SETUP_MCE: {
3333                 u64 mcg_cap;
3334
3335                 r = -EFAULT;
3336                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3337                         goto out;
3338                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3339                 break;
3340         }
3341         case KVM_X86_SET_MCE: {
3342                 struct kvm_x86_mce mce;
3343
3344                 r = -EFAULT;
3345                 if (copy_from_user(&mce, argp, sizeof mce))
3346                         goto out;
3347                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3348                 break;
3349         }
3350         case KVM_GET_VCPU_EVENTS: {
3351                 struct kvm_vcpu_events events;
3352
3353                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3354
3355                 r = -EFAULT;
3356                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3357                         break;
3358                 r = 0;
3359                 break;
3360         }
3361         case KVM_SET_VCPU_EVENTS: {
3362                 struct kvm_vcpu_events events;
3363
3364                 r = -EFAULT;
3365                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3366                         break;
3367
3368                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3369                 break;
3370         }
3371         case KVM_GET_DEBUGREGS: {
3372                 struct kvm_debugregs dbgregs;
3373
3374                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3375
3376                 r = -EFAULT;
3377                 if (copy_to_user(argp, &dbgregs,
3378                                  sizeof(struct kvm_debugregs)))
3379                         break;
3380                 r = 0;
3381                 break;
3382         }
3383         case KVM_SET_DEBUGREGS: {
3384                 struct kvm_debugregs dbgregs;
3385
3386                 r = -EFAULT;
3387                 if (copy_from_user(&dbgregs, argp,
3388                                    sizeof(struct kvm_debugregs)))
3389                         break;
3390
3391                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3392                 break;
3393         }
3394         case KVM_GET_XSAVE: {
3395                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3396                 r = -ENOMEM;
3397                 if (!u.xsave)
3398                         break;
3399
3400                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3401
3402                 r = -EFAULT;
3403                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3404                         break;
3405                 r = 0;
3406                 break;
3407         }
3408         case KVM_SET_XSAVE: {
3409                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3410                 if (IS_ERR(u.xsave))
3411                         return PTR_ERR(u.xsave);
3412
3413                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3414                 break;
3415         }
3416         case KVM_GET_XCRS: {
3417                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3418                 r = -ENOMEM;
3419                 if (!u.xcrs)
3420                         break;
3421
3422                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3423
3424                 r = -EFAULT;
3425                 if (copy_to_user(argp, u.xcrs,
3426                                  sizeof(struct kvm_xcrs)))
3427                         break;
3428                 r = 0;
3429                 break;
3430         }
3431         case KVM_SET_XCRS: {
3432                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3433                 if (IS_ERR(u.xcrs))
3434                         return PTR_ERR(u.xcrs);
3435
3436                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3437                 break;
3438         }
3439         case KVM_SET_TSC_KHZ: {
3440                 u32 user_tsc_khz;
3441
3442                 r = -EINVAL;
3443                 user_tsc_khz = (u32)arg;
3444
3445                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3446                         goto out;
3447
3448                 if (user_tsc_khz == 0)
3449                         user_tsc_khz = tsc_khz;
3450
3451                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3452                         r = 0;
3453
3454                 goto out;
3455         }
3456         case KVM_GET_TSC_KHZ: {
3457                 r = vcpu->arch.virtual_tsc_khz;
3458                 goto out;
3459         }
3460         case KVM_KVMCLOCK_CTRL: {
3461                 r = kvm_set_guest_paused(vcpu);
3462                 goto out;
3463         }
3464         default:
3465                 r = -EINVAL;
3466         }
3467 out:
3468         kfree(u.buffer);
3469         return r;
3470 }
3471
3472 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3473 {
3474         return VM_FAULT_SIGBUS;
3475 }
3476
3477 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3478 {
3479         int ret;
3480
3481         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3482                 return -EINVAL;
3483         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3484         return ret;
3485 }
3486
3487 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3488                                               u64 ident_addr)
3489 {
3490         kvm->arch.ept_identity_map_addr = ident_addr;
3491         return 0;
3492 }
3493
3494 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3495                                           u32 kvm_nr_mmu_pages)
3496 {
3497         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3498                 return -EINVAL;
3499
3500         mutex_lock(&kvm->slots_lock);
3501
3502         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3503         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3504
3505         mutex_unlock(&kvm->slots_lock);
3506         return 0;
3507 }
3508
3509 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3510 {
3511         return kvm->arch.n_max_mmu_pages;
3512 }
3513
3514 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3515 {
3516         int r;
3517
3518         r = 0;
3519         switch (chip->chip_id) {
3520         case KVM_IRQCHIP_PIC_MASTER:
3521                 memcpy(&chip->chip.pic,
3522                         &pic_irqchip(kvm)->pics[0],
3523                         sizeof(struct kvm_pic_state));
3524                 break;
3525         case KVM_IRQCHIP_PIC_SLAVE:
3526                 memcpy(&chip->chip.pic,
3527                         &pic_irqchip(kvm)->pics[1],
3528                         sizeof(struct kvm_pic_state));
3529                 break;
3530         case KVM_IRQCHIP_IOAPIC:
3531                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3532                 break;
3533         default:
3534                 r = -EINVAL;
3535                 break;
3536         }
3537         return r;
3538 }
3539
3540 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3541 {
3542         int r;
3543
3544         r = 0;
3545         switch (chip->chip_id) {
3546         case KVM_IRQCHIP_PIC_MASTER:
3547                 spin_lock(&pic_irqchip(kvm)->lock);
3548                 memcpy(&pic_irqchip(kvm)->pics[0],
3549                         &chip->chip.pic,
3550                         sizeof(struct kvm_pic_state));
3551                 spin_unlock(&pic_irqchip(kvm)->lock);
3552                 break;
3553         case KVM_IRQCHIP_PIC_SLAVE:
3554                 spin_lock(&pic_irqchip(kvm)->lock);
3555                 memcpy(&pic_irqchip(kvm)->pics[1],
3556                         &chip->chip.pic,
3557                         sizeof(struct kvm_pic_state));
3558                 spin_unlock(&pic_irqchip(kvm)->lock);
3559                 break;
3560         case KVM_IRQCHIP_IOAPIC:
3561                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3562                 break;
3563         default:
3564                 r = -EINVAL;
3565                 break;
3566         }
3567         kvm_pic_update_irq(pic_irqchip(kvm));
3568         return r;
3569 }
3570
3571 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3572 {
3573         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3574         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3575         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3576         return 0;
3577 }
3578
3579 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3580 {
3581         int i;
3582         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3583         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3584         for (i = 0; i < 3; i++)
3585                 kvm_pit_load_count(kvm, i, ps->channels[i].count, 0);
3586         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3587         return 0;
3588 }
3589
3590 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3591 {
3592         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3593         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3594                 sizeof(ps->channels));
3595         ps->flags = kvm->arch.vpit->pit_state.flags;
3596         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3597         memset(&ps->reserved, 0, sizeof(ps->reserved));
3598         return 0;
3599 }
3600
3601 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3602 {
3603         int start = 0;
3604         int i;
3605         u32 prev_legacy, cur_legacy;
3606         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3607         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3608         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3609         if (!prev_legacy && cur_legacy)
3610                 start = 1;
3611         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3612                sizeof(kvm->arch.vpit->pit_state.channels));
3613         kvm->arch.vpit->pit_state.flags = ps->flags;
3614         for (i = 0; i < 3; i++)
3615                 kvm_pit_load_count(kvm, i, kvm->arch.vpit->pit_state.channels[i].count,
3616                                    start && i == 0);
3617         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3618         return 0;
3619 }
3620
3621 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3622                                  struct kvm_reinject_control *control)
3623 {
3624         if (!kvm->arch.vpit)
3625                 return -ENXIO;
3626         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3627         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3628         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3629         return 0;
3630 }
3631
3632 /**
3633  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3634  * @kvm: kvm instance
3635  * @log: slot id and address to which we copy the log
3636  *
3637  * Steps 1-4 below provide general overview of dirty page logging. See
3638  * kvm_get_dirty_log_protect() function description for additional details.
3639  *
3640  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3641  * always flush the TLB (step 4) even if previous step failed  and the dirty
3642  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3643  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3644  * writes will be marked dirty for next log read.
3645  *
3646  *   1. Take a snapshot of the bit and clear it if needed.
3647  *   2. Write protect the corresponding page.
3648  *   3. Copy the snapshot to the userspace.
3649  *   4. Flush TLB's if needed.
3650  */
3651 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3652 {
3653         bool is_dirty = false;
3654         int r;
3655
3656         mutex_lock(&kvm->slots_lock);
3657
3658         /*
3659          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3660          */
3661         if (kvm_x86_ops->flush_log_dirty)
3662                 kvm_x86_ops->flush_log_dirty(kvm);
3663
3664         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3665
3666         /*
3667          * All the TLBs can be flushed out of mmu lock, see the comments in
3668          * kvm_mmu_slot_remove_write_access().
3669          */
3670         lockdep_assert_held(&kvm->slots_lock);
3671         if (is_dirty)
3672                 kvm_flush_remote_tlbs(kvm);
3673
3674         mutex_unlock(&kvm->slots_lock);
3675         return r;
3676 }
3677
3678 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3679                         bool line_status)
3680 {
3681         if (!irqchip_in_kernel(kvm))
3682                 return -ENXIO;
3683
3684         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3685                                         irq_event->irq, irq_event->level,
3686                                         line_status);
3687         return 0;
3688 }
3689
3690 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3691                                    struct kvm_enable_cap *cap)
3692 {
3693         int r;
3694
3695         if (cap->flags)
3696                 return -EINVAL;
3697
3698         switch (cap->cap) {
3699         case KVM_CAP_DISABLE_QUIRKS:
3700                 kvm->arch.disabled_quirks = cap->args[0];
3701                 r = 0;
3702                 break;
3703         case KVM_CAP_SPLIT_IRQCHIP: {
3704                 mutex_lock(&kvm->lock);
3705                 r = -EINVAL;
3706                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3707                         goto split_irqchip_unlock;
3708                 r = -EEXIST;
3709                 if (irqchip_in_kernel(kvm))
3710                         goto split_irqchip_unlock;
3711                 if (atomic_read(&kvm->online_vcpus))
3712                         goto split_irqchip_unlock;
3713                 r = kvm_setup_empty_irq_routing(kvm);
3714                 if (r)
3715                         goto split_irqchip_unlock;
3716                 /* Pairs with irqchip_in_kernel. */
3717                 smp_wmb();
3718                 kvm->arch.irqchip_split = true;
3719                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3720                 r = 0;
3721 split_irqchip_unlock:
3722                 mutex_unlock(&kvm->lock);
3723                 break;
3724         }
3725         default:
3726                 r = -EINVAL;
3727                 break;
3728         }
3729         return r;
3730 }
3731
3732 long kvm_arch_vm_ioctl(struct file *filp,
3733                        unsigned int ioctl, unsigned long arg)
3734 {
3735         struct kvm *kvm = filp->private_data;
3736         void __user *argp = (void __user *)arg;
3737         int r = -ENOTTY;
3738         /*
3739          * This union makes it completely explicit to gcc-3.x
3740          * that these two variables' stack usage should be
3741          * combined, not added together.
3742          */
3743         union {
3744                 struct kvm_pit_state ps;
3745                 struct kvm_pit_state2 ps2;
3746                 struct kvm_pit_config pit_config;
3747         } u;
3748
3749         switch (ioctl) {
3750         case KVM_SET_TSS_ADDR:
3751                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3752                 break;
3753         case KVM_SET_IDENTITY_MAP_ADDR: {
3754                 u64 ident_addr;
3755
3756                 r = -EFAULT;
3757                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3758                         goto out;
3759                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3760                 break;
3761         }
3762         case KVM_SET_NR_MMU_PAGES:
3763                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3764                 break;
3765         case KVM_GET_NR_MMU_PAGES:
3766                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3767                 break;
3768         case KVM_CREATE_IRQCHIP: {
3769                 struct kvm_pic *vpic;
3770
3771                 mutex_lock(&kvm->lock);
3772                 r = -EEXIST;
3773                 if (kvm->arch.vpic)
3774                         goto create_irqchip_unlock;
3775                 r = -EINVAL;
3776                 if (atomic_read(&kvm->online_vcpus))
3777                         goto create_irqchip_unlock;
3778                 r = -ENOMEM;
3779                 vpic = kvm_create_pic(kvm);
3780                 if (vpic) {
3781                         r = kvm_ioapic_init(kvm);
3782                         if (r) {
3783                                 mutex_lock(&kvm->slots_lock);
3784                                 kvm_destroy_pic(vpic);
3785                                 mutex_unlock(&kvm->slots_lock);
3786                                 goto create_irqchip_unlock;
3787                         }
3788                 } else
3789                         goto create_irqchip_unlock;
3790                 r = kvm_setup_default_irq_routing(kvm);
3791                 if (r) {
3792                         mutex_lock(&kvm->slots_lock);
3793                         mutex_lock(&kvm->irq_lock);
3794                         kvm_ioapic_destroy(kvm);
3795                         kvm_destroy_pic(vpic);
3796                         mutex_unlock(&kvm->irq_lock);
3797                         mutex_unlock(&kvm->slots_lock);
3798                         goto create_irqchip_unlock;
3799                 }
3800                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3801                 smp_wmb();
3802                 kvm->arch.vpic = vpic;
3803         create_irqchip_unlock:
3804                 mutex_unlock(&kvm->lock);
3805                 break;
3806         }
3807         case KVM_CREATE_PIT:
3808                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3809                 goto create_pit;
3810         case KVM_CREATE_PIT2:
3811                 r = -EFAULT;
3812                 if (copy_from_user(&u.pit_config, argp,
3813                                    sizeof(struct kvm_pit_config)))
3814                         goto out;
3815         create_pit:
3816                 mutex_lock(&kvm->slots_lock);
3817                 r = -EEXIST;
3818                 if (kvm->arch.vpit)
3819                         goto create_pit_unlock;
3820                 r = -ENOMEM;
3821                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3822                 if (kvm->arch.vpit)
3823                         r = 0;
3824         create_pit_unlock:
3825                 mutex_unlock(&kvm->slots_lock);
3826                 break;
3827         case KVM_GET_IRQCHIP: {
3828                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3829                 struct kvm_irqchip *chip;
3830
3831                 chip = memdup_user(argp, sizeof(*chip));
3832                 if (IS_ERR(chip)) {
3833                         r = PTR_ERR(chip);
3834                         goto out;
3835                 }
3836
3837                 r = -ENXIO;
3838                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3839                         goto get_irqchip_out;
3840                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3841                 if (r)
3842                         goto get_irqchip_out;
3843                 r = -EFAULT;
3844                 if (copy_to_user(argp, chip, sizeof *chip))
3845                         goto get_irqchip_out;
3846                 r = 0;
3847         get_irqchip_out:
3848                 kfree(chip);
3849                 break;
3850         }
3851         case KVM_SET_IRQCHIP: {
3852                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3853                 struct kvm_irqchip *chip;
3854
3855                 chip = memdup_user(argp, sizeof(*chip));
3856                 if (IS_ERR(chip)) {
3857                         r = PTR_ERR(chip);
3858                         goto out;
3859                 }
3860
3861                 r = -ENXIO;
3862                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3863                         goto set_irqchip_out;
3864                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3865                 if (r)
3866                         goto set_irqchip_out;
3867                 r = 0;
3868         set_irqchip_out:
3869                 kfree(chip);
3870                 break;
3871         }
3872         case KVM_GET_PIT: {
3873                 r = -EFAULT;
3874                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3875                         goto out;
3876                 r = -ENXIO;
3877                 if (!kvm->arch.vpit)
3878                         goto out;
3879                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3880                 if (r)
3881                         goto out;
3882                 r = -EFAULT;
3883                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3884                         goto out;
3885                 r = 0;
3886                 break;
3887         }
3888         case KVM_SET_PIT: {
3889                 r = -EFAULT;
3890                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3891                         goto out;
3892                 r = -ENXIO;
3893                 if (!kvm->arch.vpit)
3894                         goto out;
3895                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3896                 break;
3897         }
3898         case KVM_GET_PIT2: {
3899                 r = -ENXIO;
3900                 if (!kvm->arch.vpit)
3901                         goto out;
3902                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3903                 if (r)
3904                         goto out;
3905                 r = -EFAULT;
3906                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3907                         goto out;
3908                 r = 0;
3909                 break;
3910         }
3911         case KVM_SET_PIT2: {
3912                 r = -EFAULT;
3913                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3914                         goto out;
3915                 r = -ENXIO;
3916                 if (!kvm->arch.vpit)
3917                         goto out;
3918                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3919                 break;
3920         }
3921         case KVM_REINJECT_CONTROL: {
3922                 struct kvm_reinject_control control;
3923                 r =  -EFAULT;
3924                 if (copy_from_user(&control, argp, sizeof(control)))
3925                         goto out;
3926                 r = kvm_vm_ioctl_reinject(kvm, &control);
3927                 break;
3928         }
3929         case KVM_SET_BOOT_CPU_ID:
3930                 r = 0;
3931                 mutex_lock(&kvm->lock);
3932                 if (atomic_read(&kvm->online_vcpus) != 0)
3933                         r = -EBUSY;
3934                 else
3935                         kvm->arch.bsp_vcpu_id = arg;
3936                 mutex_unlock(&kvm->lock);
3937                 break;
3938         case KVM_XEN_HVM_CONFIG: {
3939                 r = -EFAULT;
3940                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3941                                    sizeof(struct kvm_xen_hvm_config)))
3942                         goto out;
3943                 r = -EINVAL;
3944                 if (kvm->arch.xen_hvm_config.flags)
3945                         goto out;
3946                 r = 0;
3947                 break;
3948         }
3949         case KVM_SET_CLOCK: {
3950                 struct kvm_clock_data user_ns;
3951                 u64 now_ns;
3952                 s64 delta;
3953
3954                 r = -EFAULT;
3955                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3956                         goto out;
3957
3958                 r = -EINVAL;
3959                 if (user_ns.flags)
3960                         goto out;
3961
3962                 r = 0;
3963                 local_irq_disable();
3964                 now_ns = get_kernel_ns();
3965                 delta = user_ns.clock - now_ns;
3966                 local_irq_enable();
3967                 kvm->arch.kvmclock_offset = delta;
3968                 kvm_gen_update_masterclock(kvm);
3969                 break;
3970         }
3971         case KVM_GET_CLOCK: {
3972                 struct kvm_clock_data user_ns;
3973                 u64 now_ns;
3974
3975                 local_irq_disable();
3976                 now_ns = get_kernel_ns();
3977                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3978                 local_irq_enable();
3979                 user_ns.flags = 0;
3980                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3981
3982                 r = -EFAULT;
3983                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3984                         goto out;
3985                 r = 0;
3986                 break;
3987         }
3988         case KVM_ENABLE_CAP: {
3989                 struct kvm_enable_cap cap;
3990
3991                 r = -EFAULT;
3992                 if (copy_from_user(&cap, argp, sizeof(cap)))
3993                         goto out;
3994                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3995                 break;
3996         }
3997         default:
3998                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3999         }
4000 out:
4001         return r;
4002 }
4003
4004 static void kvm_init_msr_list(void)
4005 {
4006         u32 dummy[2];
4007         unsigned i, j;
4008
4009         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4010                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4011                         continue;
4012
4013                 /*
4014                  * Even MSRs that are valid in the host may not be exposed
4015                  * to the guests in some cases.
4016                  */
4017                 switch (msrs_to_save[i]) {
4018                 case MSR_IA32_BNDCFGS:
4019                         if (!kvm_x86_ops->mpx_supported())
4020                                 continue;
4021                         break;
4022                 case MSR_TSC_AUX:
4023                         if (!kvm_x86_ops->rdtscp_supported())
4024                                 continue;
4025                         break;
4026                 default:
4027                         break;
4028                 }
4029
4030                 if (j < i)
4031                         msrs_to_save[j] = msrs_to_save[i];
4032                 j++;
4033         }
4034         num_msrs_to_save = j;
4035
4036         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4037                 switch (emulated_msrs[i]) {
4038                 case MSR_IA32_SMBASE:
4039                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4040                                 continue;
4041                         break;
4042                 default:
4043                         break;
4044                 }
4045
4046                 if (j < i)
4047                         emulated_msrs[j] = emulated_msrs[i];
4048                 j++;
4049         }
4050         num_emulated_msrs = j;
4051 }
4052
4053 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4054                            const void *v)
4055 {
4056         int handled = 0;
4057         int n;
4058
4059         do {
4060                 n = min(len, 8);
4061                 if (!(vcpu->arch.apic &&
4062                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4063                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4064                         break;
4065                 handled += n;
4066                 addr += n;
4067                 len -= n;
4068                 v += n;
4069         } while (len);
4070
4071         return handled;
4072 }
4073
4074 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4075 {
4076         int handled = 0;
4077         int n;
4078
4079         do {
4080                 n = min(len, 8);
4081                 if (!(vcpu->arch.apic &&
4082                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4083                                          addr, n, v))
4084                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4085                         break;
4086                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4087                 handled += n;
4088                 addr += n;
4089                 len -= n;
4090                 v += n;
4091         } while (len);
4092
4093         return handled;
4094 }
4095
4096 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4097                         struct kvm_segment *var, int seg)
4098 {
4099         kvm_x86_ops->set_segment(vcpu, var, seg);
4100 }
4101
4102 void kvm_get_segment(struct kvm_vcpu *vcpu,
4103                      struct kvm_segment *var, int seg)
4104 {
4105         kvm_x86_ops->get_segment(vcpu, var, seg);
4106 }
4107
4108 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4109                            struct x86_exception *exception)
4110 {
4111         gpa_t t_gpa;
4112
4113         BUG_ON(!mmu_is_nested(vcpu));
4114
4115         /* NPT walks are always user-walks */
4116         access |= PFERR_USER_MASK;
4117         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4118
4119         return t_gpa;
4120 }
4121
4122 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4123                               struct x86_exception *exception)
4124 {
4125         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4126         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4127 }
4128
4129  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4130                                 struct x86_exception *exception)
4131 {
4132         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4133         access |= PFERR_FETCH_MASK;
4134         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4135 }
4136
4137 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4138                                struct x86_exception *exception)
4139 {
4140         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4141         access |= PFERR_WRITE_MASK;
4142         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4143 }
4144
4145 /* uses this to access any guest's mapped memory without checking CPL */
4146 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4147                                 struct x86_exception *exception)
4148 {
4149         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4150 }
4151
4152 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4153                                       struct kvm_vcpu *vcpu, u32 access,
4154                                       struct x86_exception *exception)
4155 {
4156         void *data = val;
4157         int r = X86EMUL_CONTINUE;
4158
4159         while (bytes) {
4160                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4161                                                             exception);
4162                 unsigned offset = addr & (PAGE_SIZE-1);
4163                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4164                 int ret;
4165
4166                 if (gpa == UNMAPPED_GVA)
4167                         return X86EMUL_PROPAGATE_FAULT;
4168                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4169                                                offset, toread);
4170                 if (ret < 0) {
4171                         r = X86EMUL_IO_NEEDED;
4172                         goto out;
4173                 }
4174
4175                 bytes -= toread;
4176                 data += toread;
4177                 addr += toread;
4178         }
4179 out:
4180         return r;
4181 }
4182
4183 /* used for instruction fetching */
4184 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4185                                 gva_t addr, void *val, unsigned int bytes,
4186                                 struct x86_exception *exception)
4187 {
4188         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4189         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4190         unsigned offset;
4191         int ret;
4192
4193         /* Inline kvm_read_guest_virt_helper for speed.  */
4194         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4195                                                     exception);
4196         if (unlikely(gpa == UNMAPPED_GVA))
4197                 return X86EMUL_PROPAGATE_FAULT;
4198
4199         offset = addr & (PAGE_SIZE-1);
4200         if (WARN_ON(offset + bytes > PAGE_SIZE))
4201                 bytes = (unsigned)PAGE_SIZE - offset;
4202         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4203                                        offset, bytes);
4204         if (unlikely(ret < 0))
4205                 return X86EMUL_IO_NEEDED;
4206
4207         return X86EMUL_CONTINUE;
4208 }
4209
4210 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4211                                gva_t addr, void *val, unsigned int bytes,
4212                                struct x86_exception *exception)
4213 {
4214         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4215         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4216
4217         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4218                                           exception);
4219 }
4220 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4221
4222 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4223                                       gva_t addr, void *val, unsigned int bytes,
4224                                       struct x86_exception *exception)
4225 {
4226         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4227         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4228 }
4229
4230 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4231                 unsigned long addr, void *val, unsigned int bytes)
4232 {
4233         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4234         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4235
4236         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4237 }
4238
4239 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4240                                        gva_t addr, void *val,
4241                                        unsigned int bytes,
4242                                        struct x86_exception *exception)
4243 {
4244         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4245         void *data = val;
4246         int r = X86EMUL_CONTINUE;
4247
4248         while (bytes) {
4249                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4250                                                              PFERR_WRITE_MASK,
4251                                                              exception);
4252                 unsigned offset = addr & (PAGE_SIZE-1);
4253                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4254                 int ret;
4255
4256                 if (gpa == UNMAPPED_GVA)
4257                         return X86EMUL_PROPAGATE_FAULT;
4258                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4259                 if (ret < 0) {
4260                         r = X86EMUL_IO_NEEDED;
4261                         goto out;
4262                 }
4263
4264                 bytes -= towrite;
4265                 data += towrite;
4266                 addr += towrite;
4267         }
4268 out:
4269         return r;
4270 }
4271 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4272
4273 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4274                                 gpa_t *gpa, struct x86_exception *exception,
4275                                 bool write)
4276 {
4277         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4278                 | (write ? PFERR_WRITE_MASK : 0);
4279
4280         if (vcpu_match_mmio_gva(vcpu, gva)
4281             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4282                                  vcpu->arch.access, access)) {
4283                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4284                                         (gva & (PAGE_SIZE - 1));
4285                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4286                 return 1;
4287         }
4288
4289         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4290
4291         if (*gpa == UNMAPPED_GVA)
4292                 return -1;
4293
4294         /* For APIC access vmexit */
4295         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4296                 return 1;
4297
4298         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4299                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4300                 return 1;
4301         }
4302
4303         return 0;
4304 }
4305
4306 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4307                         const void *val, int bytes)
4308 {
4309         int ret;
4310
4311         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4312         if (ret < 0)
4313                 return 0;
4314         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4315         return 1;
4316 }
4317
4318 struct read_write_emulator_ops {
4319         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4320                                   int bytes);
4321         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4322                                   void *val, int bytes);
4323         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4324                                int bytes, void *val);
4325         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4326                                     void *val, int bytes);
4327         bool write;
4328 };
4329
4330 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4331 {
4332         if (vcpu->mmio_read_completed) {
4333                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4334                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4335                 vcpu->mmio_read_completed = 0;
4336                 return 1;
4337         }
4338
4339         return 0;
4340 }
4341
4342 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4343                         void *val, int bytes)
4344 {
4345         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4346 }
4347
4348 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4349                          void *val, int bytes)
4350 {
4351         return emulator_write_phys(vcpu, gpa, val, bytes);
4352 }
4353
4354 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4355 {
4356         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4357         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4358 }
4359
4360 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4361                           void *val, int bytes)
4362 {
4363         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4364         return X86EMUL_IO_NEEDED;
4365 }
4366
4367 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4368                            void *val, int bytes)
4369 {
4370         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4371
4372         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4373         return X86EMUL_CONTINUE;
4374 }
4375
4376 static const struct read_write_emulator_ops read_emultor = {
4377         .read_write_prepare = read_prepare,
4378         .read_write_emulate = read_emulate,
4379         .read_write_mmio = vcpu_mmio_read,
4380         .read_write_exit_mmio = read_exit_mmio,
4381 };
4382
4383 static const struct read_write_emulator_ops write_emultor = {
4384         .read_write_emulate = write_emulate,
4385         .read_write_mmio = write_mmio,
4386         .read_write_exit_mmio = write_exit_mmio,
4387         .write = true,
4388 };
4389
4390 static int emulator_read_write_onepage(unsigned long addr, void *val,
4391                                        unsigned int bytes,
4392                                        struct x86_exception *exception,
4393                                        struct kvm_vcpu *vcpu,
4394                                        const struct read_write_emulator_ops *ops)
4395 {
4396         gpa_t gpa;
4397         int handled, ret;
4398         bool write = ops->write;
4399         struct kvm_mmio_fragment *frag;
4400
4401         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4402
4403         if (ret < 0)
4404                 return X86EMUL_PROPAGATE_FAULT;
4405
4406         /* For APIC access vmexit */
4407         if (ret)
4408                 goto mmio;
4409
4410         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4411                 return X86EMUL_CONTINUE;
4412
4413 mmio:
4414         /*
4415          * Is this MMIO handled locally?
4416          */
4417         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4418         if (handled == bytes)
4419                 return X86EMUL_CONTINUE;
4420
4421         gpa += handled;
4422         bytes -= handled;
4423         val += handled;
4424
4425         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4426         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4427         frag->gpa = gpa;
4428         frag->data = val;
4429         frag->len = bytes;
4430         return X86EMUL_CONTINUE;
4431 }
4432
4433 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4434                         unsigned long addr,
4435                         void *val, unsigned int bytes,
4436                         struct x86_exception *exception,
4437                         const struct read_write_emulator_ops *ops)
4438 {
4439         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4440         gpa_t gpa;
4441         int rc;
4442
4443         if (ops->read_write_prepare &&
4444                   ops->read_write_prepare(vcpu, val, bytes))
4445                 return X86EMUL_CONTINUE;
4446
4447         vcpu->mmio_nr_fragments = 0;
4448
4449         /* Crossing a page boundary? */
4450         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4451                 int now;
4452
4453                 now = -addr & ~PAGE_MASK;
4454                 rc = emulator_read_write_onepage(addr, val, now, exception,
4455                                                  vcpu, ops);
4456
4457                 if (rc != X86EMUL_CONTINUE)
4458                         return rc;
4459                 addr += now;
4460                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4461                         addr = (u32)addr;
4462                 val += now;
4463                 bytes -= now;
4464         }
4465
4466         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4467                                          vcpu, ops);
4468         if (rc != X86EMUL_CONTINUE)
4469                 return rc;
4470
4471         if (!vcpu->mmio_nr_fragments)
4472                 return rc;
4473
4474         gpa = vcpu->mmio_fragments[0].gpa;
4475
4476         vcpu->mmio_needed = 1;
4477         vcpu->mmio_cur_fragment = 0;
4478
4479         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4480         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4481         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4482         vcpu->run->mmio.phys_addr = gpa;
4483
4484         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4485 }
4486
4487 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4488                                   unsigned long addr,
4489                                   void *val,
4490                                   unsigned int bytes,
4491                                   struct x86_exception *exception)
4492 {
4493         return emulator_read_write(ctxt, addr, val, bytes,
4494                                    exception, &read_emultor);
4495 }
4496
4497 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4498                             unsigned long addr,
4499                             const void *val,
4500                             unsigned int bytes,
4501                             struct x86_exception *exception)
4502 {
4503         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4504                                    exception, &write_emultor);
4505 }
4506
4507 #define CMPXCHG_TYPE(t, ptr, old, new) \
4508         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4509
4510 #ifdef CONFIG_X86_64
4511 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4512 #else
4513 #  define CMPXCHG64(ptr, old, new) \
4514         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4515 #endif
4516
4517 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4518                                      unsigned long addr,
4519                                      const void *old,
4520                                      const void *new,
4521                                      unsigned int bytes,
4522                                      struct x86_exception *exception)
4523 {
4524         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4525         gpa_t gpa;
4526         struct page *page;
4527         char *kaddr;
4528         bool exchanged;
4529
4530         /* guests cmpxchg8b have to be emulated atomically */
4531         if (bytes > 8 || (bytes & (bytes - 1)))
4532                 goto emul_write;
4533
4534         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4535
4536         if (gpa == UNMAPPED_GVA ||
4537             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4538                 goto emul_write;
4539
4540         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4541                 goto emul_write;
4542
4543         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4544         if (is_error_page(page))
4545                 goto emul_write;
4546
4547         kaddr = kmap_atomic(page);
4548         kaddr += offset_in_page(gpa);
4549         switch (bytes) {
4550         case 1:
4551                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4552                 break;
4553         case 2:
4554                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4555                 break;
4556         case 4:
4557                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4558                 break;
4559         case 8:
4560                 exchanged = CMPXCHG64(kaddr, old, new);
4561                 break;
4562         default:
4563                 BUG();
4564         }
4565         kunmap_atomic(kaddr);
4566         kvm_release_page_dirty(page);
4567
4568         if (!exchanged)
4569                 return X86EMUL_CMPXCHG_FAILED;
4570
4571         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4572         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4573
4574         return X86EMUL_CONTINUE;
4575
4576 emul_write:
4577         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4578
4579         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4580 }
4581
4582 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4583 {
4584         /* TODO: String I/O for in kernel device */
4585         int r;
4586
4587         if (vcpu->arch.pio.in)
4588                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4589                                     vcpu->arch.pio.size, pd);
4590         else
4591                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4592                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4593                                      pd);
4594         return r;
4595 }
4596
4597 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4598                                unsigned short port, void *val,
4599                                unsigned int count, bool in)
4600 {
4601         vcpu->arch.pio.port = port;
4602         vcpu->arch.pio.in = in;
4603         vcpu->arch.pio.count  = count;
4604         vcpu->arch.pio.size = size;
4605
4606         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4607                 vcpu->arch.pio.count = 0;
4608                 return 1;
4609         }
4610
4611         vcpu->run->exit_reason = KVM_EXIT_IO;
4612         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4613         vcpu->run->io.size = size;
4614         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4615         vcpu->run->io.count = count;
4616         vcpu->run->io.port = port;
4617
4618         return 0;
4619 }
4620
4621 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4622                                     int size, unsigned short port, void *val,
4623                                     unsigned int count)
4624 {
4625         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4626         int ret;
4627
4628         if (vcpu->arch.pio.count)
4629                 goto data_avail;
4630
4631         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4632         if (ret) {
4633 data_avail:
4634                 memcpy(val, vcpu->arch.pio_data, size * count);
4635                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4636                 vcpu->arch.pio.count = 0;
4637                 return 1;
4638         }
4639
4640         return 0;
4641 }
4642
4643 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4644                                      int size, unsigned short port,
4645                                      const void *val, unsigned int count)
4646 {
4647         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4648
4649         memcpy(vcpu->arch.pio_data, val, size * count);
4650         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4651         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4652 }
4653
4654 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4655 {
4656         return kvm_x86_ops->get_segment_base(vcpu, seg);
4657 }
4658
4659 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4660 {
4661         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4662 }
4663
4664 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4665 {
4666         if (!need_emulate_wbinvd(vcpu))
4667                 return X86EMUL_CONTINUE;
4668
4669         if (kvm_x86_ops->has_wbinvd_exit()) {
4670                 int cpu = get_cpu();
4671
4672                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4673                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4674                                 wbinvd_ipi, NULL, 1);
4675                 put_cpu();
4676                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4677         } else
4678                 wbinvd();
4679         return X86EMUL_CONTINUE;
4680 }
4681
4682 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4683 {
4684         kvm_x86_ops->skip_emulated_instruction(vcpu);
4685         return kvm_emulate_wbinvd_noskip(vcpu);
4686 }
4687 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4688
4689
4690
4691 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4692 {
4693         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4694 }
4695
4696 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4697                            unsigned long *dest)
4698 {
4699         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4700 }
4701
4702 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4703                            unsigned long value)
4704 {
4705
4706         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4707 }
4708
4709 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4710 {
4711         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4712 }
4713
4714 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4715 {
4716         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4717         unsigned long value;
4718
4719         switch (cr) {
4720         case 0:
4721                 value = kvm_read_cr0(vcpu);
4722                 break;
4723         case 2:
4724                 value = vcpu->arch.cr2;
4725                 break;
4726         case 3:
4727                 value = kvm_read_cr3(vcpu);
4728                 break;
4729         case 4:
4730                 value = kvm_read_cr4(vcpu);
4731                 break;
4732         case 8:
4733                 value = kvm_get_cr8(vcpu);
4734                 break;
4735         default:
4736                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4737                 return 0;
4738         }
4739
4740         return value;
4741 }
4742
4743 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4744 {
4745         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4746         int res = 0;
4747
4748         switch (cr) {
4749         case 0:
4750                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4751                 break;
4752         case 2:
4753                 vcpu->arch.cr2 = val;
4754                 break;
4755         case 3:
4756                 res = kvm_set_cr3(vcpu, val);
4757                 break;
4758         case 4:
4759                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4760                 break;
4761         case 8:
4762                 res = kvm_set_cr8(vcpu, val);
4763                 break;
4764         default:
4765                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4766                 res = -1;
4767         }
4768
4769         return res;
4770 }
4771
4772 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4773 {
4774         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4775 }
4776
4777 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4778 {
4779         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4780 }
4781
4782 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4783 {
4784         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4785 }
4786
4787 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4788 {
4789         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4790 }
4791
4792 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4793 {
4794         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4795 }
4796
4797 static unsigned long emulator_get_cached_segment_base(
4798         struct x86_emulate_ctxt *ctxt, int seg)
4799 {
4800         return get_segment_base(emul_to_vcpu(ctxt), seg);
4801 }
4802
4803 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4804                                  struct desc_struct *desc, u32 *base3,
4805                                  int seg)
4806 {
4807         struct kvm_segment var;
4808
4809         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4810         *selector = var.selector;
4811
4812         if (var.unusable) {
4813                 memset(desc, 0, sizeof(*desc));
4814                 return false;
4815         }
4816
4817         if (var.g)
4818                 var.limit >>= 12;
4819         set_desc_limit(desc, var.limit);
4820         set_desc_base(desc, (unsigned long)var.base);
4821 #ifdef CONFIG_X86_64
4822         if (base3)
4823                 *base3 = var.base >> 32;
4824 #endif
4825         desc->type = var.type;
4826         desc->s = var.s;
4827         desc->dpl = var.dpl;
4828         desc->p = var.present;
4829         desc->avl = var.avl;
4830         desc->l = var.l;
4831         desc->d = var.db;
4832         desc->g = var.g;
4833
4834         return true;
4835 }
4836
4837 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4838                                  struct desc_struct *desc, u32 base3,
4839                                  int seg)
4840 {
4841         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4842         struct kvm_segment var;
4843
4844         var.selector = selector;
4845         var.base = get_desc_base(desc);
4846 #ifdef CONFIG_X86_64
4847         var.base |= ((u64)base3) << 32;
4848 #endif
4849         var.limit = get_desc_limit(desc);
4850         if (desc->g)
4851                 var.limit = (var.limit << 12) | 0xfff;
4852         var.type = desc->type;
4853         var.dpl = desc->dpl;
4854         var.db = desc->d;
4855         var.s = desc->s;
4856         var.l = desc->l;
4857         var.g = desc->g;
4858         var.avl = desc->avl;
4859         var.present = desc->p;
4860         var.unusable = !var.present;
4861         var.padding = 0;
4862
4863         kvm_set_segment(vcpu, &var, seg);
4864         return;
4865 }
4866
4867 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4868                             u32 msr_index, u64 *pdata)
4869 {
4870         struct msr_data msr;
4871         int r;
4872
4873         msr.index = msr_index;
4874         msr.host_initiated = false;
4875         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4876         if (r)
4877                 return r;
4878
4879         *pdata = msr.data;
4880         return 0;
4881 }
4882
4883 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4884                             u32 msr_index, u64 data)
4885 {
4886         struct msr_data msr;
4887
4888         msr.data = data;
4889         msr.index = msr_index;
4890         msr.host_initiated = false;
4891         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4892 }
4893
4894 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4895 {
4896         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4897
4898         return vcpu->arch.smbase;
4899 }
4900
4901 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4902 {
4903         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4904
4905         vcpu->arch.smbase = smbase;
4906 }
4907
4908 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4909                               u32 pmc)
4910 {
4911         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4912 }
4913
4914 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4915                              u32 pmc, u64 *pdata)
4916 {
4917         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4918 }
4919
4920 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4921 {
4922         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4923 }
4924
4925 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4926 {
4927         preempt_disable();
4928         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4929         /*
4930          * CR0.TS may reference the host fpu state, not the guest fpu state,
4931          * so it may be clear at this point.
4932          */
4933         clts();
4934 }
4935
4936 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4937 {
4938         preempt_enable();
4939 }
4940
4941 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4942                               struct x86_instruction_info *info,
4943                               enum x86_intercept_stage stage)
4944 {
4945         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4946 }
4947
4948 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4949                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4950 {
4951         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4952 }
4953
4954 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4955 {
4956         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4957 }
4958
4959 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4960 {
4961         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4962 }
4963
4964 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4965 {
4966         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4967 }
4968
4969 static const struct x86_emulate_ops emulate_ops = {
4970         .read_gpr            = emulator_read_gpr,
4971         .write_gpr           = emulator_write_gpr,
4972         .read_std            = kvm_read_guest_virt_system,
4973         .write_std           = kvm_write_guest_virt_system,
4974         .read_phys           = kvm_read_guest_phys_system,
4975         .fetch               = kvm_fetch_guest_virt,
4976         .read_emulated       = emulator_read_emulated,
4977         .write_emulated      = emulator_write_emulated,
4978         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4979         .invlpg              = emulator_invlpg,
4980         .pio_in_emulated     = emulator_pio_in_emulated,
4981         .pio_out_emulated    = emulator_pio_out_emulated,
4982         .get_segment         = emulator_get_segment,
4983         .set_segment         = emulator_set_segment,
4984         .get_cached_segment_base = emulator_get_cached_segment_base,
4985         .get_gdt             = emulator_get_gdt,
4986         .get_idt             = emulator_get_idt,
4987         .set_gdt             = emulator_set_gdt,
4988         .set_idt             = emulator_set_idt,
4989         .get_cr              = emulator_get_cr,
4990         .set_cr              = emulator_set_cr,
4991         .cpl                 = emulator_get_cpl,
4992         .get_dr              = emulator_get_dr,
4993         .set_dr              = emulator_set_dr,
4994         .get_smbase          = emulator_get_smbase,
4995         .set_smbase          = emulator_set_smbase,
4996         .set_msr             = emulator_set_msr,
4997         .get_msr             = emulator_get_msr,
4998         .check_pmc           = emulator_check_pmc,
4999         .read_pmc            = emulator_read_pmc,
5000         .halt                = emulator_halt,
5001         .wbinvd              = emulator_wbinvd,
5002         .fix_hypercall       = emulator_fix_hypercall,
5003         .get_fpu             = emulator_get_fpu,
5004         .put_fpu             = emulator_put_fpu,
5005         .intercept           = emulator_intercept,
5006         .get_cpuid           = emulator_get_cpuid,
5007         .set_nmi_mask        = emulator_set_nmi_mask,
5008 };
5009
5010 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5011 {
5012         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5013         /*
5014          * an sti; sti; sequence only disable interrupts for the first
5015          * instruction. So, if the last instruction, be it emulated or
5016          * not, left the system with the INT_STI flag enabled, it
5017          * means that the last instruction is an sti. We should not
5018          * leave the flag on in this case. The same goes for mov ss
5019          */
5020         if (int_shadow & mask)
5021                 mask = 0;
5022         if (unlikely(int_shadow || mask)) {
5023                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5024                 if (!mask)
5025                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5026         }
5027 }
5028
5029 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5030 {
5031         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5032         if (ctxt->exception.vector == PF_VECTOR)
5033                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5034
5035         if (ctxt->exception.error_code_valid)
5036                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5037                                       ctxt->exception.error_code);
5038         else
5039                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5040         return false;
5041 }
5042
5043 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5044 {
5045         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5046         int cs_db, cs_l;
5047
5048         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5049
5050         ctxt->eflags = kvm_get_rflags(vcpu);
5051         ctxt->eip = kvm_rip_read(vcpu);
5052         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5053                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5054                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5055                      cs_db                              ? X86EMUL_MODE_PROT32 :
5056                                                           X86EMUL_MODE_PROT16;
5057         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5058         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5059         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5060         ctxt->emul_flags = vcpu->arch.hflags;
5061
5062         init_decode_cache(ctxt);
5063         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5064 }
5065
5066 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5067 {
5068         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5069         int ret;
5070
5071         init_emulate_ctxt(vcpu);
5072
5073         ctxt->op_bytes = 2;
5074         ctxt->ad_bytes = 2;
5075         ctxt->_eip = ctxt->eip + inc_eip;
5076         ret = emulate_int_real(ctxt, irq);
5077
5078         if (ret != X86EMUL_CONTINUE)
5079                 return EMULATE_FAIL;
5080
5081         ctxt->eip = ctxt->_eip;
5082         kvm_rip_write(vcpu, ctxt->eip);
5083         kvm_set_rflags(vcpu, ctxt->eflags);
5084
5085         if (irq == NMI_VECTOR)
5086                 vcpu->arch.nmi_pending = 0;
5087         else
5088                 vcpu->arch.interrupt.pending = false;
5089
5090         return EMULATE_DONE;
5091 }
5092 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5093
5094 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5095 {
5096         int r = EMULATE_DONE;
5097
5098         ++vcpu->stat.insn_emulation_fail;
5099         trace_kvm_emulate_insn_failed(vcpu);
5100         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5101                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5102                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5103                 vcpu->run->internal.ndata = 0;
5104                 r = EMULATE_FAIL;
5105         }
5106         kvm_queue_exception(vcpu, UD_VECTOR);
5107
5108         return r;
5109 }
5110
5111 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5112                                   bool write_fault_to_shadow_pgtable,
5113                                   int emulation_type)
5114 {
5115         gpa_t gpa = cr2;
5116         pfn_t pfn;
5117
5118         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5119                 return false;
5120
5121         if (!vcpu->arch.mmu.direct_map) {
5122                 /*
5123                  * Write permission should be allowed since only
5124                  * write access need to be emulated.
5125                  */
5126                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5127
5128                 /*
5129                  * If the mapping is invalid in guest, let cpu retry
5130                  * it to generate fault.
5131                  */
5132                 if (gpa == UNMAPPED_GVA)
5133                         return true;
5134         }
5135
5136         /*
5137          * Do not retry the unhandleable instruction if it faults on the
5138          * readonly host memory, otherwise it will goto a infinite loop:
5139          * retry instruction -> write #PF -> emulation fail -> retry
5140          * instruction -> ...
5141          */
5142         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5143
5144         /*
5145          * If the instruction failed on the error pfn, it can not be fixed,
5146          * report the error to userspace.
5147          */
5148         if (is_error_noslot_pfn(pfn))
5149                 return false;
5150
5151         kvm_release_pfn_clean(pfn);
5152
5153         /* The instructions are well-emulated on direct mmu. */
5154         if (vcpu->arch.mmu.direct_map) {
5155                 unsigned int indirect_shadow_pages;
5156
5157                 spin_lock(&vcpu->kvm->mmu_lock);
5158                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5159                 spin_unlock(&vcpu->kvm->mmu_lock);
5160
5161                 if (indirect_shadow_pages)
5162                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5163
5164                 return true;
5165         }
5166
5167         /*
5168          * if emulation was due to access to shadowed page table
5169          * and it failed try to unshadow page and re-enter the
5170          * guest to let CPU execute the instruction.
5171          */
5172         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5173
5174         /*
5175          * If the access faults on its page table, it can not
5176          * be fixed by unprotecting shadow page and it should
5177          * be reported to userspace.
5178          */
5179         return !write_fault_to_shadow_pgtable;
5180 }
5181
5182 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5183                               unsigned long cr2,  int emulation_type)
5184 {
5185         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5186         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5187
5188         last_retry_eip = vcpu->arch.last_retry_eip;
5189         last_retry_addr = vcpu->arch.last_retry_addr;
5190
5191         /*
5192          * If the emulation is caused by #PF and it is non-page_table
5193          * writing instruction, it means the VM-EXIT is caused by shadow
5194          * page protected, we can zap the shadow page and retry this
5195          * instruction directly.
5196          *
5197          * Note: if the guest uses a non-page-table modifying instruction
5198          * on the PDE that points to the instruction, then we will unmap
5199          * the instruction and go to an infinite loop. So, we cache the
5200          * last retried eip and the last fault address, if we meet the eip
5201          * and the address again, we can break out of the potential infinite
5202          * loop.
5203          */
5204         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5205
5206         if (!(emulation_type & EMULTYPE_RETRY))
5207                 return false;
5208
5209         if (x86_page_table_writing_insn(ctxt))
5210                 return false;
5211
5212         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5213                 return false;
5214
5215         vcpu->arch.last_retry_eip = ctxt->eip;
5216         vcpu->arch.last_retry_addr = cr2;
5217
5218         if (!vcpu->arch.mmu.direct_map)
5219                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5220
5221         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5222
5223         return true;
5224 }
5225
5226 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5227 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5228
5229 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5230 {
5231         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5232                 /* This is a good place to trace that we are exiting SMM.  */
5233                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5234
5235                 if (unlikely(vcpu->arch.smi_pending)) {
5236                         kvm_make_request(KVM_REQ_SMI, vcpu);
5237                         vcpu->arch.smi_pending = 0;
5238                 } else {
5239                         /* Process a latched INIT, if any.  */
5240                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5241                 }
5242         }
5243
5244         kvm_mmu_reset_context(vcpu);
5245 }
5246
5247 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5248 {
5249         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5250
5251         vcpu->arch.hflags = emul_flags;
5252
5253         if (changed & HF_SMM_MASK)
5254                 kvm_smm_changed(vcpu);
5255 }
5256
5257 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5258                                 unsigned long *db)
5259 {
5260         u32 dr6 = 0;
5261         int i;
5262         u32 enable, rwlen;
5263
5264         enable = dr7;
5265         rwlen = dr7 >> 16;
5266         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5267                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5268                         dr6 |= (1 << i);
5269         return dr6;
5270 }
5271
5272 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5273 {
5274         struct kvm_run *kvm_run = vcpu->run;
5275
5276         /*
5277          * rflags is the old, "raw" value of the flags.  The new value has
5278          * not been saved yet.
5279          *
5280          * This is correct even for TF set by the guest, because "the
5281          * processor will not generate this exception after the instruction
5282          * that sets the TF flag".
5283          */
5284         if (unlikely(rflags & X86_EFLAGS_TF)) {
5285                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5286                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5287                                                   DR6_RTM;
5288                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5289                         kvm_run->debug.arch.exception = DB_VECTOR;
5290                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5291                         *r = EMULATE_USER_EXIT;
5292                 } else {
5293                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5294                         /*
5295                          * "Certain debug exceptions may clear bit 0-3.  The
5296                          * remaining contents of the DR6 register are never
5297                          * cleared by the processor".
5298                          */
5299                         vcpu->arch.dr6 &= ~15;
5300                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5301                         kvm_queue_exception(vcpu, DB_VECTOR);
5302                 }
5303         }
5304 }
5305
5306 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5307 {
5308         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5309             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5310                 struct kvm_run *kvm_run = vcpu->run;
5311                 unsigned long eip = kvm_get_linear_rip(vcpu);
5312                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5313                                            vcpu->arch.guest_debug_dr7,
5314                                            vcpu->arch.eff_db);
5315
5316                 if (dr6 != 0) {
5317                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5318                         kvm_run->debug.arch.pc = eip;
5319                         kvm_run->debug.arch.exception = DB_VECTOR;
5320                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5321                         *r = EMULATE_USER_EXIT;
5322                         return true;
5323                 }
5324         }
5325
5326         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5327             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5328                 unsigned long eip = kvm_get_linear_rip(vcpu);
5329                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5330                                            vcpu->arch.dr7,
5331                                            vcpu->arch.db);
5332
5333                 if (dr6 != 0) {
5334                         vcpu->arch.dr6 &= ~15;
5335                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5336                         kvm_queue_exception(vcpu, DB_VECTOR);
5337                         *r = EMULATE_DONE;
5338                         return true;
5339                 }
5340         }
5341
5342         return false;
5343 }
5344
5345 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5346                             unsigned long cr2,
5347                             int emulation_type,
5348                             void *insn,
5349                             int insn_len)
5350 {
5351         int r;
5352         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5353         bool writeback = true;
5354         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5355
5356         /*
5357          * Clear write_fault_to_shadow_pgtable here to ensure it is
5358          * never reused.
5359          */
5360         vcpu->arch.write_fault_to_shadow_pgtable = false;
5361         kvm_clear_exception_queue(vcpu);
5362
5363         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5364                 init_emulate_ctxt(vcpu);
5365
5366                 /*
5367                  * We will reenter on the same instruction since
5368                  * we do not set complete_userspace_io.  This does not
5369                  * handle watchpoints yet, those would be handled in
5370                  * the emulate_ops.
5371                  */
5372                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5373                         return r;
5374
5375                 ctxt->interruptibility = 0;
5376                 ctxt->have_exception = false;
5377                 ctxt->exception.vector = -1;
5378                 ctxt->perm_ok = false;
5379
5380                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5381
5382                 r = x86_decode_insn(ctxt, insn, insn_len);
5383
5384                 trace_kvm_emulate_insn_start(vcpu);
5385                 ++vcpu->stat.insn_emulation;
5386                 if (r != EMULATION_OK)  {
5387                         if (emulation_type & EMULTYPE_TRAP_UD)
5388                                 return EMULATE_FAIL;
5389                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5390                                                 emulation_type))
5391                                 return EMULATE_DONE;
5392                         if (emulation_type & EMULTYPE_SKIP)
5393                                 return EMULATE_FAIL;
5394                         return handle_emulation_failure(vcpu);
5395                 }
5396         }
5397
5398         if (emulation_type & EMULTYPE_SKIP) {
5399                 kvm_rip_write(vcpu, ctxt->_eip);
5400                 if (ctxt->eflags & X86_EFLAGS_RF)
5401                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5402                 return EMULATE_DONE;
5403         }
5404
5405         if (retry_instruction(ctxt, cr2, emulation_type))
5406                 return EMULATE_DONE;
5407
5408         /* this is needed for vmware backdoor interface to work since it
5409            changes registers values  during IO operation */
5410         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5411                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5412                 emulator_invalidate_register_cache(ctxt);
5413         }
5414
5415 restart:
5416         r = x86_emulate_insn(ctxt);
5417
5418         if (r == EMULATION_INTERCEPTED)
5419                 return EMULATE_DONE;
5420
5421         if (r == EMULATION_FAILED) {
5422                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5423                                         emulation_type))
5424                         return EMULATE_DONE;
5425
5426                 return handle_emulation_failure(vcpu);
5427         }
5428
5429         if (ctxt->have_exception) {
5430                 r = EMULATE_DONE;
5431                 if (inject_emulated_exception(vcpu))
5432                         return r;
5433         } else if (vcpu->arch.pio.count) {
5434                 if (!vcpu->arch.pio.in) {
5435                         /* FIXME: return into emulator if single-stepping.  */
5436                         vcpu->arch.pio.count = 0;
5437                 } else {
5438                         writeback = false;
5439                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5440                 }
5441                 r = EMULATE_USER_EXIT;
5442         } else if (vcpu->mmio_needed) {
5443                 if (!vcpu->mmio_is_write)
5444                         writeback = false;
5445                 r = EMULATE_USER_EXIT;
5446                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5447         } else if (r == EMULATION_RESTART)
5448                 goto restart;
5449         else
5450                 r = EMULATE_DONE;
5451
5452         if (writeback) {
5453                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5454                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5455                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5456                 if (vcpu->arch.hflags != ctxt->emul_flags)
5457                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5458                 kvm_rip_write(vcpu, ctxt->eip);
5459                 if (r == EMULATE_DONE)
5460                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5461                 if (!ctxt->have_exception ||
5462                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5463                         __kvm_set_rflags(vcpu, ctxt->eflags);
5464
5465                 /*
5466                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5467                  * do nothing, and it will be requested again as soon as
5468                  * the shadow expires.  But we still need to check here,
5469                  * because POPF has no interrupt shadow.
5470                  */
5471                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5472                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5473         } else
5474                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5475
5476         return r;
5477 }
5478 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5479
5480 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5481 {
5482         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5483         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5484                                             size, port, &val, 1);
5485         /* do not return to emulator after return from userspace */
5486         vcpu->arch.pio.count = 0;
5487         return ret;
5488 }
5489 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5490
5491 static void tsc_bad(void *info)
5492 {
5493         __this_cpu_write(cpu_tsc_khz, 0);
5494 }
5495
5496 static void tsc_khz_changed(void *data)
5497 {
5498         struct cpufreq_freqs *freq = data;
5499         unsigned long khz = 0;
5500
5501         if (data)
5502                 khz = freq->new;
5503         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5504                 khz = cpufreq_quick_get(raw_smp_processor_id());
5505         if (!khz)
5506                 khz = tsc_khz;
5507         __this_cpu_write(cpu_tsc_khz, khz);
5508 }
5509
5510 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5511                                      void *data)
5512 {
5513         struct cpufreq_freqs *freq = data;
5514         struct kvm *kvm;
5515         struct kvm_vcpu *vcpu;
5516         int i, send_ipi = 0;
5517
5518         /*
5519          * We allow guests to temporarily run on slowing clocks,
5520          * provided we notify them after, or to run on accelerating
5521          * clocks, provided we notify them before.  Thus time never
5522          * goes backwards.
5523          *
5524          * However, we have a problem.  We can't atomically update
5525          * the frequency of a given CPU from this function; it is
5526          * merely a notifier, which can be called from any CPU.
5527          * Changing the TSC frequency at arbitrary points in time
5528          * requires a recomputation of local variables related to
5529          * the TSC for each VCPU.  We must flag these local variables
5530          * to be updated and be sure the update takes place with the
5531          * new frequency before any guests proceed.
5532          *
5533          * Unfortunately, the combination of hotplug CPU and frequency
5534          * change creates an intractable locking scenario; the order
5535          * of when these callouts happen is undefined with respect to
5536          * CPU hotplug, and they can race with each other.  As such,
5537          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5538          * undefined; you can actually have a CPU frequency change take
5539          * place in between the computation of X and the setting of the
5540          * variable.  To protect against this problem, all updates of
5541          * the per_cpu tsc_khz variable are done in an interrupt
5542          * protected IPI, and all callers wishing to update the value
5543          * must wait for a synchronous IPI to complete (which is trivial
5544          * if the caller is on the CPU already).  This establishes the
5545          * necessary total order on variable updates.
5546          *
5547          * Note that because a guest time update may take place
5548          * anytime after the setting of the VCPU's request bit, the
5549          * correct TSC value must be set before the request.  However,
5550          * to ensure the update actually makes it to any guest which
5551          * starts running in hardware virtualization between the set
5552          * and the acquisition of the spinlock, we must also ping the
5553          * CPU after setting the request bit.
5554          *
5555          */
5556
5557         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5558                 return 0;
5559         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5560                 return 0;
5561
5562         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5563
5564         spin_lock(&kvm_lock);
5565         list_for_each_entry(kvm, &vm_list, vm_list) {
5566                 kvm_for_each_vcpu(i, vcpu, kvm) {
5567                         if (vcpu->cpu != freq->cpu)
5568                                 continue;
5569                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5570                         if (vcpu->cpu != smp_processor_id())
5571                                 send_ipi = 1;
5572                 }
5573         }
5574         spin_unlock(&kvm_lock);
5575
5576         if (freq->old < freq->new && send_ipi) {
5577                 /*
5578                  * We upscale the frequency.  Must make the guest
5579                  * doesn't see old kvmclock values while running with
5580                  * the new frequency, otherwise we risk the guest sees
5581                  * time go backwards.
5582                  *
5583                  * In case we update the frequency for another cpu
5584                  * (which might be in guest context) send an interrupt
5585                  * to kick the cpu out of guest context.  Next time
5586                  * guest context is entered kvmclock will be updated,
5587                  * so the guest will not see stale values.
5588                  */
5589                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5590         }
5591         return 0;
5592 }
5593
5594 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5595         .notifier_call  = kvmclock_cpufreq_notifier
5596 };
5597
5598 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5599                                         unsigned long action, void *hcpu)
5600 {
5601         unsigned int cpu = (unsigned long)hcpu;
5602
5603         switch (action) {
5604                 case CPU_ONLINE:
5605                 case CPU_DOWN_FAILED:
5606                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5607                         break;
5608                 case CPU_DOWN_PREPARE:
5609                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5610                         break;
5611         }
5612         return NOTIFY_OK;
5613 }
5614
5615 static struct notifier_block kvmclock_cpu_notifier_block = {
5616         .notifier_call  = kvmclock_cpu_notifier,
5617         .priority = -INT_MAX
5618 };
5619
5620 static void kvm_timer_init(void)
5621 {
5622         int cpu;
5623
5624         max_tsc_khz = tsc_khz;
5625
5626         cpu_notifier_register_begin();
5627         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5628 #ifdef CONFIG_CPU_FREQ
5629                 struct cpufreq_policy policy;
5630                 memset(&policy, 0, sizeof(policy));
5631                 cpu = get_cpu();
5632                 cpufreq_get_policy(&policy, cpu);
5633                 if (policy.cpuinfo.max_freq)
5634                         max_tsc_khz = policy.cpuinfo.max_freq;
5635                 put_cpu();
5636 #endif
5637                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5638                                           CPUFREQ_TRANSITION_NOTIFIER);
5639         }
5640         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5641         for_each_online_cpu(cpu)
5642                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5643
5644         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5645         cpu_notifier_register_done();
5646
5647 }
5648
5649 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5650
5651 int kvm_is_in_guest(void)
5652 {
5653         return __this_cpu_read(current_vcpu) != NULL;
5654 }
5655
5656 static int kvm_is_user_mode(void)
5657 {
5658         int user_mode = 3;
5659
5660         if (__this_cpu_read(current_vcpu))
5661                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5662
5663         return user_mode != 0;
5664 }
5665
5666 static unsigned long kvm_get_guest_ip(void)
5667 {
5668         unsigned long ip = 0;
5669
5670         if (__this_cpu_read(current_vcpu))
5671                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5672
5673         return ip;
5674 }
5675
5676 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5677         .is_in_guest            = kvm_is_in_guest,
5678         .is_user_mode           = kvm_is_user_mode,
5679         .get_guest_ip           = kvm_get_guest_ip,
5680 };
5681
5682 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5683 {
5684         __this_cpu_write(current_vcpu, vcpu);
5685 }
5686 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5687
5688 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5689 {
5690         __this_cpu_write(current_vcpu, NULL);
5691 }
5692 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5693
5694 static void kvm_set_mmio_spte_mask(void)
5695 {
5696         u64 mask;
5697         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5698
5699         /*
5700          * Set the reserved bits and the present bit of an paging-structure
5701          * entry to generate page fault with PFER.RSV = 1.
5702          */
5703          /* Mask the reserved physical address bits. */
5704         mask = rsvd_bits(maxphyaddr, 51);
5705
5706         /* Bit 62 is always reserved for 32bit host. */
5707         mask |= 0x3ull << 62;
5708
5709         /* Set the present bit. */
5710         mask |= 1ull;
5711
5712 #ifdef CONFIG_X86_64
5713         /*
5714          * If reserved bit is not supported, clear the present bit to disable
5715          * mmio page fault.
5716          */
5717         if (maxphyaddr == 52)
5718                 mask &= ~1ull;
5719 #endif
5720
5721         kvm_mmu_set_mmio_spte_mask(mask);
5722 }
5723
5724 #ifdef CONFIG_X86_64
5725 static void pvclock_gtod_update_fn(struct work_struct *work)
5726 {
5727         struct kvm *kvm;
5728
5729         struct kvm_vcpu *vcpu;
5730         int i;
5731
5732         spin_lock(&kvm_lock);
5733         list_for_each_entry(kvm, &vm_list, vm_list)
5734                 kvm_for_each_vcpu(i, vcpu, kvm)
5735                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5736         atomic_set(&kvm_guest_has_master_clock, 0);
5737         spin_unlock(&kvm_lock);
5738 }
5739
5740 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5741
5742 /*
5743  * Notification about pvclock gtod data update.
5744  */
5745 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5746                                void *priv)
5747 {
5748         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5749         struct timekeeper *tk = priv;
5750
5751         update_pvclock_gtod(tk);
5752
5753         /* disable master clock if host does not trust, or does not
5754          * use, TSC clocksource
5755          */
5756         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5757             atomic_read(&kvm_guest_has_master_clock) != 0)
5758                 queue_work(system_long_wq, &pvclock_gtod_work);
5759
5760         return 0;
5761 }
5762
5763 static struct notifier_block pvclock_gtod_notifier = {
5764         .notifier_call = pvclock_gtod_notify,
5765 };
5766 #endif
5767
5768 int kvm_arch_init(void *opaque)
5769 {
5770         int r;
5771         struct kvm_x86_ops *ops = opaque;
5772
5773         if (kvm_x86_ops) {
5774                 printk(KERN_ERR "kvm: already loaded the other module\n");
5775                 r = -EEXIST;
5776                 goto out;
5777         }
5778
5779         if (!ops->cpu_has_kvm_support()) {
5780                 printk(KERN_ERR "kvm: no hardware support\n");
5781                 r = -EOPNOTSUPP;
5782                 goto out;
5783         }
5784         if (ops->disabled_by_bios()) {
5785                 printk(KERN_ERR "kvm: disabled by bios\n");
5786                 r = -EOPNOTSUPP;
5787                 goto out;
5788         }
5789
5790         r = -ENOMEM;
5791         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5792         if (!shared_msrs) {
5793                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5794                 goto out;
5795         }
5796
5797 #ifdef CONFIG_PREEMPT_RT_FULL
5798         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5799                 printk(KERN_ERR "RT requires X86_FEATURE_CONSTANT_TSC\n");
5800                 return -EOPNOTSUPP;
5801         }
5802 #endif
5803
5804         r = kvm_mmu_module_init();
5805         if (r)
5806                 goto out_free_percpu;
5807
5808         kvm_set_mmio_spte_mask();
5809
5810         kvm_x86_ops = ops;
5811
5812         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5813                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5814
5815         kvm_timer_init();
5816
5817         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5818
5819         if (cpu_has_xsave)
5820                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5821
5822         kvm_lapic_init();
5823 #ifdef CONFIG_X86_64
5824         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5825 #endif
5826
5827         return 0;
5828
5829 out_free_percpu:
5830         free_percpu(shared_msrs);
5831 out:
5832         return r;
5833 }
5834
5835 void kvm_arch_exit(void)
5836 {
5837         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5838
5839         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5840                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5841                                             CPUFREQ_TRANSITION_NOTIFIER);
5842         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5843 #ifdef CONFIG_X86_64
5844         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5845 #endif
5846         kvm_x86_ops = NULL;
5847         kvm_mmu_module_exit();
5848         free_percpu(shared_msrs);
5849 }
5850
5851 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5852 {
5853         ++vcpu->stat.halt_exits;
5854         if (lapic_in_kernel(vcpu)) {
5855                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5856                 return 1;
5857         } else {
5858                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5859                 return 0;
5860         }
5861 }
5862 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5863
5864 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5865 {
5866         kvm_x86_ops->skip_emulated_instruction(vcpu);
5867         return kvm_vcpu_halt(vcpu);
5868 }
5869 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5870
5871 /*
5872  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5873  *
5874  * @apicid - apicid of vcpu to be kicked.
5875  */
5876 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5877 {
5878         struct kvm_lapic_irq lapic_irq;
5879
5880         lapic_irq.shorthand = 0;
5881         lapic_irq.dest_mode = 0;
5882         lapic_irq.dest_id = apicid;
5883         lapic_irq.msi_redir_hint = false;
5884
5885         lapic_irq.delivery_mode = APIC_DM_REMRD;
5886         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5887 }
5888
5889 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5890 {
5891         unsigned long nr, a0, a1, a2, a3, ret;
5892         int op_64_bit, r = 1;
5893
5894         kvm_x86_ops->skip_emulated_instruction(vcpu);
5895
5896         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5897                 return kvm_hv_hypercall(vcpu);
5898
5899         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5900         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5901         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5902         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5903         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5904
5905         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5906
5907         op_64_bit = is_64_bit_mode(vcpu);
5908         if (!op_64_bit) {
5909                 nr &= 0xFFFFFFFF;
5910                 a0 &= 0xFFFFFFFF;
5911                 a1 &= 0xFFFFFFFF;
5912                 a2 &= 0xFFFFFFFF;
5913                 a3 &= 0xFFFFFFFF;
5914         }
5915
5916         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5917                 ret = -KVM_EPERM;
5918                 goto out;
5919         }
5920
5921         switch (nr) {
5922         case KVM_HC_VAPIC_POLL_IRQ:
5923                 ret = 0;
5924                 break;
5925         case KVM_HC_KICK_CPU:
5926                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5927                 ret = 0;
5928                 break;
5929         default:
5930                 ret = -KVM_ENOSYS;
5931                 break;
5932         }
5933 out:
5934         if (!op_64_bit)
5935                 ret = (u32)ret;
5936         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5937         ++vcpu->stat.hypercalls;
5938         return r;
5939 }
5940 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5941
5942 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5943 {
5944         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5945         char instruction[3];
5946         unsigned long rip = kvm_rip_read(vcpu);
5947
5948         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5949
5950         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5951 }
5952
5953 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5954 {
5955         return vcpu->run->request_interrupt_window &&
5956                 likely(!pic_in_kernel(vcpu->kvm));
5957 }
5958
5959 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5960 {
5961         struct kvm_run *kvm_run = vcpu->run;
5962
5963         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5964         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5965         kvm_run->cr8 = kvm_get_cr8(vcpu);
5966         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5967         kvm_run->ready_for_interrupt_injection =
5968                 pic_in_kernel(vcpu->kvm) ||
5969                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
5970 }
5971
5972 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5973 {
5974         int max_irr, tpr;
5975
5976         if (!kvm_x86_ops->update_cr8_intercept)
5977                 return;
5978
5979         if (!vcpu->arch.apic)
5980                 return;
5981
5982         if (!vcpu->arch.apic->vapic_addr)
5983                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5984         else
5985                 max_irr = -1;
5986
5987         if (max_irr != -1)
5988                 max_irr >>= 4;
5989
5990         tpr = kvm_lapic_get_cr8(vcpu);
5991
5992         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5993 }
5994
5995 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5996 {
5997         int r;
5998
5999         /* try to reinject previous events if any */
6000         if (vcpu->arch.exception.pending) {
6001                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6002                                         vcpu->arch.exception.has_error_code,
6003                                         vcpu->arch.exception.error_code);
6004
6005                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6006                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6007                                              X86_EFLAGS_RF);
6008
6009                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6010                     (vcpu->arch.dr7 & DR7_GD)) {
6011                         vcpu->arch.dr7 &= ~DR7_GD;
6012                         kvm_update_dr7(vcpu);
6013                 }
6014
6015                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6016                                           vcpu->arch.exception.has_error_code,
6017                                           vcpu->arch.exception.error_code,
6018                                           vcpu->arch.exception.reinject);
6019                 return 0;
6020         }
6021
6022         if (vcpu->arch.nmi_injected) {
6023                 kvm_x86_ops->set_nmi(vcpu);
6024                 return 0;
6025         }
6026
6027         if (vcpu->arch.interrupt.pending) {
6028                 kvm_x86_ops->set_irq(vcpu);
6029                 return 0;
6030         }
6031
6032         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6033                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6034                 if (r != 0)
6035                         return r;
6036         }
6037
6038         /* try to inject new event if pending */
6039         if (vcpu->arch.nmi_pending) {
6040                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6041                         --vcpu->arch.nmi_pending;
6042                         vcpu->arch.nmi_injected = true;
6043                         kvm_x86_ops->set_nmi(vcpu);
6044                 }
6045         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6046                 /*
6047                  * Because interrupts can be injected asynchronously, we are
6048                  * calling check_nested_events again here to avoid a race condition.
6049                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6050                  * proposal and current concerns.  Perhaps we should be setting
6051                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6052                  */
6053                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6054                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6055                         if (r != 0)
6056                                 return r;
6057                 }
6058                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6059                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6060                                             false);
6061                         kvm_x86_ops->set_irq(vcpu);
6062                 }
6063         }
6064         return 0;
6065 }
6066
6067 static void process_nmi(struct kvm_vcpu *vcpu)
6068 {
6069         unsigned limit = 2;
6070
6071         /*
6072          * x86 is limited to one NMI running, and one NMI pending after it.
6073          * If an NMI is already in progress, limit further NMIs to just one.
6074          * Otherwise, allow two (and we'll inject the first one immediately).
6075          */
6076         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6077                 limit = 1;
6078
6079         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6080         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6081         kvm_make_request(KVM_REQ_EVENT, vcpu);
6082 }
6083
6084 #define put_smstate(type, buf, offset, val)                       \
6085         *(type *)((buf) + (offset) - 0x7e00) = val
6086
6087 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6088 {
6089         u32 flags = 0;
6090         flags |= seg->g       << 23;
6091         flags |= seg->db      << 22;
6092         flags |= seg->l       << 21;
6093         flags |= seg->avl     << 20;
6094         flags |= seg->present << 15;
6095         flags |= seg->dpl     << 13;
6096         flags |= seg->s       << 12;
6097         flags |= seg->type    << 8;
6098         return flags;
6099 }
6100
6101 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6102 {
6103         struct kvm_segment seg;
6104         int offset;
6105
6106         kvm_get_segment(vcpu, &seg, n);
6107         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6108
6109         if (n < 3)
6110                 offset = 0x7f84 + n * 12;
6111         else
6112                 offset = 0x7f2c + (n - 3) * 12;
6113
6114         put_smstate(u32, buf, offset + 8, seg.base);
6115         put_smstate(u32, buf, offset + 4, seg.limit);
6116         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6117 }
6118
6119 #ifdef CONFIG_X86_64
6120 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6121 {
6122         struct kvm_segment seg;
6123         int offset;
6124         u16 flags;
6125
6126         kvm_get_segment(vcpu, &seg, n);
6127         offset = 0x7e00 + n * 16;
6128
6129         flags = process_smi_get_segment_flags(&seg) >> 8;
6130         put_smstate(u16, buf, offset, seg.selector);
6131         put_smstate(u16, buf, offset + 2, flags);
6132         put_smstate(u32, buf, offset + 4, seg.limit);
6133         put_smstate(u64, buf, offset + 8, seg.base);
6134 }
6135 #endif
6136
6137 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6138 {
6139         struct desc_ptr dt;
6140         struct kvm_segment seg;
6141         unsigned long val;
6142         int i;
6143
6144         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6145         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6146         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6147         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6148
6149         for (i = 0; i < 8; i++)
6150                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6151
6152         kvm_get_dr(vcpu, 6, &val);
6153         put_smstate(u32, buf, 0x7fcc, (u32)val);
6154         kvm_get_dr(vcpu, 7, &val);
6155         put_smstate(u32, buf, 0x7fc8, (u32)val);
6156
6157         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6158         put_smstate(u32, buf, 0x7fc4, seg.selector);
6159         put_smstate(u32, buf, 0x7f64, seg.base);
6160         put_smstate(u32, buf, 0x7f60, seg.limit);
6161         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6162
6163         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6164         put_smstate(u32, buf, 0x7fc0, seg.selector);
6165         put_smstate(u32, buf, 0x7f80, seg.base);
6166         put_smstate(u32, buf, 0x7f7c, seg.limit);
6167         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6168
6169         kvm_x86_ops->get_gdt(vcpu, &dt);
6170         put_smstate(u32, buf, 0x7f74, dt.address);
6171         put_smstate(u32, buf, 0x7f70, dt.size);
6172
6173         kvm_x86_ops->get_idt(vcpu, &dt);
6174         put_smstate(u32, buf, 0x7f58, dt.address);
6175         put_smstate(u32, buf, 0x7f54, dt.size);
6176
6177         for (i = 0; i < 6; i++)
6178                 process_smi_save_seg_32(vcpu, buf, i);
6179
6180         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6181
6182         /* revision id */
6183         put_smstate(u32, buf, 0x7efc, 0x00020000);
6184         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6185 }
6186
6187 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6188 {
6189 #ifdef CONFIG_X86_64
6190         struct desc_ptr dt;
6191         struct kvm_segment seg;
6192         unsigned long val;
6193         int i;
6194
6195         for (i = 0; i < 16; i++)
6196                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6197
6198         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6199         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6200
6201         kvm_get_dr(vcpu, 6, &val);
6202         put_smstate(u64, buf, 0x7f68, val);
6203         kvm_get_dr(vcpu, 7, &val);
6204         put_smstate(u64, buf, 0x7f60, val);
6205
6206         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6207         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6208         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6209
6210         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6211
6212         /* revision id */
6213         put_smstate(u32, buf, 0x7efc, 0x00020064);
6214
6215         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6216
6217         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6218         put_smstate(u16, buf, 0x7e90, seg.selector);
6219         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6220         put_smstate(u32, buf, 0x7e94, seg.limit);
6221         put_smstate(u64, buf, 0x7e98, seg.base);
6222
6223         kvm_x86_ops->get_idt(vcpu, &dt);
6224         put_smstate(u32, buf, 0x7e84, dt.size);
6225         put_smstate(u64, buf, 0x7e88, dt.address);
6226
6227         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6228         put_smstate(u16, buf, 0x7e70, seg.selector);
6229         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6230         put_smstate(u32, buf, 0x7e74, seg.limit);
6231         put_smstate(u64, buf, 0x7e78, seg.base);
6232
6233         kvm_x86_ops->get_gdt(vcpu, &dt);
6234         put_smstate(u32, buf, 0x7e64, dt.size);
6235         put_smstate(u64, buf, 0x7e68, dt.address);
6236
6237         for (i = 0; i < 6; i++)
6238                 process_smi_save_seg_64(vcpu, buf, i);
6239 #else
6240         WARN_ON_ONCE(1);
6241 #endif
6242 }
6243
6244 static void process_smi(struct kvm_vcpu *vcpu)
6245 {
6246         struct kvm_segment cs, ds;
6247         struct desc_ptr dt;
6248         char buf[512];
6249         u32 cr0;
6250
6251         if (is_smm(vcpu)) {
6252                 vcpu->arch.smi_pending = true;
6253                 return;
6254         }
6255
6256         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6257         vcpu->arch.hflags |= HF_SMM_MASK;
6258         memset(buf, 0, 512);
6259         if (guest_cpuid_has_longmode(vcpu))
6260                 process_smi_save_state_64(vcpu, buf);
6261         else
6262                 process_smi_save_state_32(vcpu, buf);
6263
6264         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6265
6266         if (kvm_x86_ops->get_nmi_mask(vcpu))
6267                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6268         else
6269                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6270
6271         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6272         kvm_rip_write(vcpu, 0x8000);
6273
6274         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6275         kvm_x86_ops->set_cr0(vcpu, cr0);
6276         vcpu->arch.cr0 = cr0;
6277
6278         kvm_x86_ops->set_cr4(vcpu, 0);
6279
6280         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6281         dt.address = dt.size = 0;
6282         kvm_x86_ops->set_idt(vcpu, &dt);
6283
6284         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6285
6286         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6287         cs.base = vcpu->arch.smbase;
6288
6289         ds.selector = 0;
6290         ds.base = 0;
6291
6292         cs.limit    = ds.limit = 0xffffffff;
6293         cs.type     = ds.type = 0x3;
6294         cs.dpl      = ds.dpl = 0;
6295         cs.db       = ds.db = 0;
6296         cs.s        = ds.s = 1;
6297         cs.l        = ds.l = 0;
6298         cs.g        = ds.g = 1;
6299         cs.avl      = ds.avl = 0;
6300         cs.present  = ds.present = 1;
6301         cs.unusable = ds.unusable = 0;
6302         cs.padding  = ds.padding = 0;
6303
6304         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6305         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6306         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6307         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6308         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6309         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6310
6311         if (guest_cpuid_has_longmode(vcpu))
6312                 kvm_x86_ops->set_efer(vcpu, 0);
6313
6314         kvm_update_cpuid(vcpu);
6315         kvm_mmu_reset_context(vcpu);
6316 }
6317
6318 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6319 {
6320         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6321                 return;
6322
6323         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6324
6325         if (irqchip_split(vcpu->kvm))
6326                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6327         else {
6328                 kvm_x86_ops->sync_pir_to_irr(vcpu);
6329                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6330         }
6331         kvm_x86_ops->load_eoi_exitmap(vcpu);
6332 }
6333
6334 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6335 {
6336         ++vcpu->stat.tlb_flush;
6337         kvm_x86_ops->tlb_flush(vcpu);
6338 }
6339
6340 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6341 {
6342         struct page *page = NULL;
6343
6344         if (!lapic_in_kernel(vcpu))
6345                 return;
6346
6347         if (!kvm_x86_ops->set_apic_access_page_addr)
6348                 return;
6349
6350         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6351         if (is_error_page(page))
6352                 return;
6353         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6354
6355         /*
6356          * Do not pin apic access page in memory, the MMU notifier
6357          * will call us again if it is migrated or swapped out.
6358          */
6359         put_page(page);
6360 }
6361 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6362
6363 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6364                                            unsigned long address)
6365 {
6366         /*
6367          * The physical address of apic access page is stored in the VMCS.
6368          * Update it when it becomes invalid.
6369          */
6370         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6371                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6372 }
6373
6374 /*
6375  * Returns 1 to let vcpu_run() continue the guest execution loop without
6376  * exiting to the userspace.  Otherwise, the value will be returned to the
6377  * userspace.
6378  */
6379 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6380 {
6381         int r;
6382         bool req_int_win =
6383                 dm_request_for_irq_injection(vcpu) &&
6384                 kvm_cpu_accept_dm_intr(vcpu);
6385
6386         bool req_immediate_exit = false;
6387
6388         if (vcpu->requests) {
6389                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6390                         kvm_mmu_unload(vcpu);
6391                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6392                         __kvm_migrate_timers(vcpu);
6393                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6394                         kvm_gen_update_masterclock(vcpu->kvm);
6395                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6396                         kvm_gen_kvmclock_update(vcpu);
6397                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6398                         r = kvm_guest_time_update(vcpu);
6399                         if (unlikely(r))
6400                                 goto out;
6401                 }
6402                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6403                         kvm_mmu_sync_roots(vcpu);
6404                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6405                         kvm_vcpu_flush_tlb(vcpu);
6406                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6407                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6408                         r = 0;
6409                         goto out;
6410                 }
6411                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6412                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6413                         r = 0;
6414                         goto out;
6415                 }
6416                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6417                         vcpu->fpu_active = 0;
6418                         kvm_x86_ops->fpu_deactivate(vcpu);
6419                 }
6420                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6421                         /* Page is swapped out. Do synthetic halt */
6422                         vcpu->arch.apf.halted = true;
6423                         r = 1;
6424                         goto out;
6425                 }
6426                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6427                         record_steal_time(vcpu);
6428                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6429                         process_smi(vcpu);
6430                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6431                         process_nmi(vcpu);
6432                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6433                         kvm_pmu_handle_event(vcpu);
6434                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6435                         kvm_pmu_deliver_pmi(vcpu);
6436                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6437                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6438                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6439                                      (void *) vcpu->arch.eoi_exit_bitmap)) {
6440                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6441                                 vcpu->run->eoi.vector =
6442                                                 vcpu->arch.pending_ioapic_eoi;
6443                                 r = 0;
6444                                 goto out;
6445                         }
6446                 }
6447                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6448                         vcpu_scan_ioapic(vcpu);
6449                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6450                         kvm_vcpu_reload_apic_access_page(vcpu);
6451                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6452                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6453                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6454                         r = 0;
6455                         goto out;
6456                 }
6457                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6458                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6459                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6460                         r = 0;
6461                         goto out;
6462                 }
6463         }
6464
6465         /*
6466          * KVM_REQ_EVENT is not set when posted interrupts are set by
6467          * VT-d hardware, so we have to update RVI unconditionally.
6468          */
6469         if (kvm_lapic_enabled(vcpu)) {
6470                 /*
6471                  * Update architecture specific hints for APIC
6472                  * virtual interrupt delivery.
6473                  */
6474                 if (kvm_x86_ops->hwapic_irr_update)
6475                         kvm_x86_ops->hwapic_irr_update(vcpu,
6476                                 kvm_lapic_find_highest_irr(vcpu));
6477         }
6478
6479         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6480                 kvm_apic_accept_events(vcpu);
6481                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6482                         r = 1;
6483                         goto out;
6484                 }
6485
6486                 if (inject_pending_event(vcpu, req_int_win) != 0)
6487                         req_immediate_exit = true;
6488                 /* enable NMI/IRQ window open exits if needed */
6489                 else if (vcpu->arch.nmi_pending)
6490                         kvm_x86_ops->enable_nmi_window(vcpu);
6491                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6492                         kvm_x86_ops->enable_irq_window(vcpu);
6493
6494                 if (kvm_lapic_enabled(vcpu)) {
6495                         update_cr8_intercept(vcpu);
6496                         kvm_lapic_sync_to_vapic(vcpu);
6497                 }
6498         }
6499
6500         r = kvm_mmu_reload(vcpu);
6501         if (unlikely(r)) {
6502                 goto cancel_injection;
6503         }
6504
6505         preempt_disable();
6506
6507         kvm_x86_ops->prepare_guest_switch(vcpu);
6508         if (vcpu->fpu_active)
6509                 kvm_load_guest_fpu(vcpu);
6510         kvm_load_guest_xcr0(vcpu);
6511
6512         vcpu->mode = IN_GUEST_MODE;
6513
6514         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6515
6516         /* We should set ->mode before check ->requests,
6517          * see the comment in make_all_cpus_request.
6518          */
6519         smp_mb__after_srcu_read_unlock();
6520
6521         local_irq_disable();
6522
6523         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6524             || need_resched() || signal_pending(current)) {
6525                 vcpu->mode = OUTSIDE_GUEST_MODE;
6526                 smp_wmb();
6527                 local_irq_enable();
6528                 preempt_enable();
6529                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6530                 r = 1;
6531                 goto cancel_injection;
6532         }
6533
6534         if (req_immediate_exit)
6535                 smp_send_reschedule(vcpu->cpu);
6536
6537         trace_kvm_entry(vcpu->vcpu_id);
6538         wait_lapic_expire(vcpu);
6539         __kvm_guest_enter();
6540
6541         if (unlikely(vcpu->arch.switch_db_regs)) {
6542                 set_debugreg(0, 7);
6543                 set_debugreg(vcpu->arch.eff_db[0], 0);
6544                 set_debugreg(vcpu->arch.eff_db[1], 1);
6545                 set_debugreg(vcpu->arch.eff_db[2], 2);
6546                 set_debugreg(vcpu->arch.eff_db[3], 3);
6547                 set_debugreg(vcpu->arch.dr6, 6);
6548                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6549         }
6550
6551         kvm_x86_ops->run(vcpu);
6552
6553         /*
6554          * Do this here before restoring debug registers on the host.  And
6555          * since we do this before handling the vmexit, a DR access vmexit
6556          * can (a) read the correct value of the debug registers, (b) set
6557          * KVM_DEBUGREG_WONT_EXIT again.
6558          */
6559         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6560                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6561                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6562                 kvm_update_dr0123(vcpu);
6563                 kvm_update_dr6(vcpu);
6564                 kvm_update_dr7(vcpu);
6565                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6566         }
6567
6568         /*
6569          * If the guest has used debug registers, at least dr7
6570          * will be disabled while returning to the host.
6571          * If we don't have active breakpoints in the host, we don't
6572          * care about the messed up debug address registers. But if
6573          * we have some of them active, restore the old state.
6574          */
6575         if (hw_breakpoint_active())
6576                 hw_breakpoint_restore();
6577
6578         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6579
6580         vcpu->mode = OUTSIDE_GUEST_MODE;
6581         smp_wmb();
6582
6583         /* Interrupt is enabled by handle_external_intr() */
6584         kvm_x86_ops->handle_external_intr(vcpu);
6585
6586         ++vcpu->stat.exits;
6587
6588         /*
6589          * We must have an instruction between local_irq_enable() and
6590          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6591          * the interrupt shadow.  The stat.exits increment will do nicely.
6592          * But we need to prevent reordering, hence this barrier():
6593          */
6594         barrier();
6595
6596         kvm_guest_exit();
6597
6598         preempt_enable();
6599
6600         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6601
6602         /*
6603          * Profile KVM exit RIPs:
6604          */
6605         if (unlikely(prof_on == KVM_PROFILING)) {
6606                 unsigned long rip = kvm_rip_read(vcpu);
6607                 profile_hit(KVM_PROFILING, (void *)rip);
6608         }
6609
6610         if (unlikely(vcpu->arch.tsc_always_catchup))
6611                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6612
6613         if (vcpu->arch.apic_attention)
6614                 kvm_lapic_sync_from_vapic(vcpu);
6615
6616         r = kvm_x86_ops->handle_exit(vcpu);
6617         return r;
6618
6619 cancel_injection:
6620         kvm_x86_ops->cancel_injection(vcpu);
6621         if (unlikely(vcpu->arch.apic_attention))
6622                 kvm_lapic_sync_from_vapic(vcpu);
6623 out:
6624         return r;
6625 }
6626
6627 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6628 {
6629         if (!kvm_arch_vcpu_runnable(vcpu) &&
6630             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6631                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6632                 kvm_vcpu_block(vcpu);
6633                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6634
6635                 if (kvm_x86_ops->post_block)
6636                         kvm_x86_ops->post_block(vcpu);
6637
6638                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6639                         return 1;
6640         }
6641
6642         kvm_apic_accept_events(vcpu);
6643         switch(vcpu->arch.mp_state) {
6644         case KVM_MP_STATE_HALTED:
6645                 vcpu->arch.pv.pv_unhalted = false;
6646                 vcpu->arch.mp_state =
6647                         KVM_MP_STATE_RUNNABLE;
6648         case KVM_MP_STATE_RUNNABLE:
6649                 vcpu->arch.apf.halted = false;
6650                 break;
6651         case KVM_MP_STATE_INIT_RECEIVED:
6652                 break;
6653         default:
6654                 return -EINTR;
6655                 break;
6656         }
6657         return 1;
6658 }
6659
6660 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6661 {
6662         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6663                 !vcpu->arch.apf.halted);
6664 }
6665
6666 static int vcpu_run(struct kvm_vcpu *vcpu)
6667 {
6668         int r;
6669         struct kvm *kvm = vcpu->kvm;
6670
6671         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6672
6673         for (;;) {
6674                 if (kvm_vcpu_running(vcpu)) {
6675                         r = vcpu_enter_guest(vcpu);
6676                 } else {
6677                         r = vcpu_block(kvm, vcpu);
6678                 }
6679
6680                 if (r <= 0)
6681                         break;
6682
6683                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6684                 if (kvm_cpu_has_pending_timer(vcpu))
6685                         kvm_inject_pending_timer_irqs(vcpu);
6686
6687                 if (dm_request_for_irq_injection(vcpu) &&
6688                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6689                         r = 0;
6690                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6691                         ++vcpu->stat.request_irq_exits;
6692                         break;
6693                 }
6694
6695                 kvm_check_async_pf_completion(vcpu);
6696
6697                 if (signal_pending(current)) {
6698                         r = -EINTR;
6699                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6700                         ++vcpu->stat.signal_exits;
6701                         break;
6702                 }
6703                 if (need_resched()) {
6704                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6705                         cond_resched();
6706                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6707                 }
6708         }
6709
6710         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6711
6712         return r;
6713 }
6714
6715 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6716 {
6717         int r;
6718         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6719         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6720         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6721         if (r != EMULATE_DONE)
6722                 return 0;
6723         return 1;
6724 }
6725
6726 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6727 {
6728         BUG_ON(!vcpu->arch.pio.count);
6729
6730         return complete_emulated_io(vcpu);
6731 }
6732
6733 /*
6734  * Implements the following, as a state machine:
6735  *
6736  * read:
6737  *   for each fragment
6738  *     for each mmio piece in the fragment
6739  *       write gpa, len
6740  *       exit
6741  *       copy data
6742  *   execute insn
6743  *
6744  * write:
6745  *   for each fragment
6746  *     for each mmio piece in the fragment
6747  *       write gpa, len
6748  *       copy data
6749  *       exit
6750  */
6751 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6752 {
6753         struct kvm_run *run = vcpu->run;
6754         struct kvm_mmio_fragment *frag;
6755         unsigned len;
6756
6757         BUG_ON(!vcpu->mmio_needed);
6758
6759         /* Complete previous fragment */
6760         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6761         len = min(8u, frag->len);
6762         if (!vcpu->mmio_is_write)
6763                 memcpy(frag->data, run->mmio.data, len);
6764
6765         if (frag->len <= 8) {
6766                 /* Switch to the next fragment. */
6767                 frag++;
6768                 vcpu->mmio_cur_fragment++;
6769         } else {
6770                 /* Go forward to the next mmio piece. */
6771                 frag->data += len;
6772                 frag->gpa += len;
6773                 frag->len -= len;
6774         }
6775
6776         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6777                 vcpu->mmio_needed = 0;
6778
6779                 /* FIXME: return into emulator if single-stepping.  */
6780                 if (vcpu->mmio_is_write)
6781                         return 1;
6782                 vcpu->mmio_read_completed = 1;
6783                 return complete_emulated_io(vcpu);
6784         }
6785
6786         run->exit_reason = KVM_EXIT_MMIO;
6787         run->mmio.phys_addr = frag->gpa;
6788         if (vcpu->mmio_is_write)
6789                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6790         run->mmio.len = min(8u, frag->len);
6791         run->mmio.is_write = vcpu->mmio_is_write;
6792         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6793         return 0;
6794 }
6795
6796
6797 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6798 {
6799         struct fpu *fpu = &current->thread.fpu;
6800         int r;
6801         sigset_t sigsaved;
6802
6803         fpu__activate_curr(fpu);
6804
6805         if (vcpu->sigset_active)
6806                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6807
6808         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6809                 kvm_vcpu_block(vcpu);
6810                 kvm_apic_accept_events(vcpu);
6811                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6812                 r = -EAGAIN;
6813                 goto out;
6814         }
6815
6816         /* re-sync apic's tpr */
6817         if (!lapic_in_kernel(vcpu)) {
6818                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6819                         r = -EINVAL;
6820                         goto out;
6821                 }
6822         }
6823
6824         if (unlikely(vcpu->arch.complete_userspace_io)) {
6825                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6826                 vcpu->arch.complete_userspace_io = NULL;
6827                 r = cui(vcpu);
6828                 if (r <= 0)
6829                         goto out;
6830         } else
6831                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6832
6833         r = vcpu_run(vcpu);
6834
6835 out:
6836         post_kvm_run_save(vcpu);
6837         if (vcpu->sigset_active)
6838                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6839
6840         return r;
6841 }
6842
6843 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6844 {
6845         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6846                 /*
6847                  * We are here if userspace calls get_regs() in the middle of
6848                  * instruction emulation. Registers state needs to be copied
6849                  * back from emulation context to vcpu. Userspace shouldn't do
6850                  * that usually, but some bad designed PV devices (vmware
6851                  * backdoor interface) need this to work
6852                  */
6853                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6854                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6855         }
6856         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6857         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6858         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6859         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6860         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6861         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6862         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6863         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6864 #ifdef CONFIG_X86_64
6865         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6866         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6867         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6868         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6869         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6870         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6871         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6872         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6873 #endif
6874
6875         regs->rip = kvm_rip_read(vcpu);
6876         regs->rflags = kvm_get_rflags(vcpu);
6877
6878         return 0;
6879 }
6880
6881 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6882 {
6883         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6884         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6885
6886         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6887         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6888         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6889         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6890         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6891         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6892         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6893         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6894 #ifdef CONFIG_X86_64
6895         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6896         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6897         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6898         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6899         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6900         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6901         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6902         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6903 #endif
6904
6905         kvm_rip_write(vcpu, regs->rip);
6906         kvm_set_rflags(vcpu, regs->rflags);
6907
6908         vcpu->arch.exception.pending = false;
6909
6910         kvm_make_request(KVM_REQ_EVENT, vcpu);
6911
6912         return 0;
6913 }
6914
6915 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6916 {
6917         struct kvm_segment cs;
6918
6919         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6920         *db = cs.db;
6921         *l = cs.l;
6922 }
6923 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6924
6925 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6926                                   struct kvm_sregs *sregs)
6927 {
6928         struct desc_ptr dt;
6929
6930         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6931         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6932         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6933         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6934         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6935         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6936
6937         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6938         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6939
6940         kvm_x86_ops->get_idt(vcpu, &dt);
6941         sregs->idt.limit = dt.size;
6942         sregs->idt.base = dt.address;
6943         kvm_x86_ops->get_gdt(vcpu, &dt);
6944         sregs->gdt.limit = dt.size;
6945         sregs->gdt.base = dt.address;
6946
6947         sregs->cr0 = kvm_read_cr0(vcpu);
6948         sregs->cr2 = vcpu->arch.cr2;
6949         sregs->cr3 = kvm_read_cr3(vcpu);
6950         sregs->cr4 = kvm_read_cr4(vcpu);
6951         sregs->cr8 = kvm_get_cr8(vcpu);
6952         sregs->efer = vcpu->arch.efer;
6953         sregs->apic_base = kvm_get_apic_base(vcpu);
6954
6955         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6956
6957         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6958                 set_bit(vcpu->arch.interrupt.nr,
6959                         (unsigned long *)sregs->interrupt_bitmap);
6960
6961         return 0;
6962 }
6963
6964 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6965                                     struct kvm_mp_state *mp_state)
6966 {
6967         kvm_apic_accept_events(vcpu);
6968         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6969                                         vcpu->arch.pv.pv_unhalted)
6970                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6971         else
6972                 mp_state->mp_state = vcpu->arch.mp_state;
6973
6974         return 0;
6975 }
6976
6977 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6978                                     struct kvm_mp_state *mp_state)
6979 {
6980         if (!kvm_vcpu_has_lapic(vcpu) &&
6981             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6982                 return -EINVAL;
6983
6984         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6985                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6986                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6987         } else
6988                 vcpu->arch.mp_state = mp_state->mp_state;
6989         kvm_make_request(KVM_REQ_EVENT, vcpu);
6990         return 0;
6991 }
6992
6993 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6994                     int reason, bool has_error_code, u32 error_code)
6995 {
6996         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6997         int ret;
6998
6999         init_emulate_ctxt(vcpu);
7000
7001         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7002                                    has_error_code, error_code);
7003
7004         if (ret)
7005                 return EMULATE_FAIL;
7006
7007         kvm_rip_write(vcpu, ctxt->eip);
7008         kvm_set_rflags(vcpu, ctxt->eflags);
7009         kvm_make_request(KVM_REQ_EVENT, vcpu);
7010         return EMULATE_DONE;
7011 }
7012 EXPORT_SYMBOL_GPL(kvm_task_switch);
7013
7014 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7015                                   struct kvm_sregs *sregs)
7016 {
7017         struct msr_data apic_base_msr;
7018         int mmu_reset_needed = 0;
7019         int pending_vec, max_bits, idx;
7020         struct desc_ptr dt;
7021
7022         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7023                 return -EINVAL;
7024
7025         dt.size = sregs->idt.limit;
7026         dt.address = sregs->idt.base;
7027         kvm_x86_ops->set_idt(vcpu, &dt);
7028         dt.size = sregs->gdt.limit;
7029         dt.address = sregs->gdt.base;
7030         kvm_x86_ops->set_gdt(vcpu, &dt);
7031
7032         vcpu->arch.cr2 = sregs->cr2;
7033         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7034         vcpu->arch.cr3 = sregs->cr3;
7035         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7036
7037         kvm_set_cr8(vcpu, sregs->cr8);
7038
7039         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7040         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7041         apic_base_msr.data = sregs->apic_base;
7042         apic_base_msr.host_initiated = true;
7043         kvm_set_apic_base(vcpu, &apic_base_msr);
7044
7045         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7046         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7047         vcpu->arch.cr0 = sregs->cr0;
7048
7049         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7050         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7051         if (sregs->cr4 & X86_CR4_OSXSAVE)
7052                 kvm_update_cpuid(vcpu);
7053
7054         idx = srcu_read_lock(&vcpu->kvm->srcu);
7055         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7056                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7057                 mmu_reset_needed = 1;
7058         }
7059         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7060
7061         if (mmu_reset_needed)
7062                 kvm_mmu_reset_context(vcpu);
7063
7064         max_bits = KVM_NR_INTERRUPTS;
7065         pending_vec = find_first_bit(
7066                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7067         if (pending_vec < max_bits) {
7068                 kvm_queue_interrupt(vcpu, pending_vec, false);
7069                 pr_debug("Set back pending irq %d\n", pending_vec);
7070         }
7071
7072         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7073         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7074         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7075         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7076         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7077         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7078
7079         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7080         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7081
7082         update_cr8_intercept(vcpu);
7083
7084         /* Older userspace won't unhalt the vcpu on reset. */
7085         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7086             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7087             !is_protmode(vcpu))
7088                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7089
7090         kvm_make_request(KVM_REQ_EVENT, vcpu);
7091
7092         return 0;
7093 }
7094
7095 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7096                                         struct kvm_guest_debug *dbg)
7097 {
7098         unsigned long rflags;
7099         int i, r;
7100
7101         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7102                 r = -EBUSY;
7103                 if (vcpu->arch.exception.pending)
7104                         goto out;
7105                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7106                         kvm_queue_exception(vcpu, DB_VECTOR);
7107                 else
7108                         kvm_queue_exception(vcpu, BP_VECTOR);
7109         }
7110
7111         /*
7112          * Read rflags as long as potentially injected trace flags are still
7113          * filtered out.
7114          */
7115         rflags = kvm_get_rflags(vcpu);
7116
7117         vcpu->guest_debug = dbg->control;
7118         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7119                 vcpu->guest_debug = 0;
7120
7121         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7122                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7123                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7124                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7125         } else {
7126                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7127                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7128         }
7129         kvm_update_dr7(vcpu);
7130
7131         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7132                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7133                         get_segment_base(vcpu, VCPU_SREG_CS);
7134
7135         /*
7136          * Trigger an rflags update that will inject or remove the trace
7137          * flags.
7138          */
7139         kvm_set_rflags(vcpu, rflags);
7140
7141         kvm_x86_ops->update_bp_intercept(vcpu);
7142
7143         r = 0;
7144
7145 out:
7146
7147         return r;
7148 }
7149
7150 /*
7151  * Translate a guest virtual address to a guest physical address.
7152  */
7153 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7154                                     struct kvm_translation *tr)
7155 {
7156         unsigned long vaddr = tr->linear_address;
7157         gpa_t gpa;
7158         int idx;
7159
7160         idx = srcu_read_lock(&vcpu->kvm->srcu);
7161         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7162         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7163         tr->physical_address = gpa;
7164         tr->valid = gpa != UNMAPPED_GVA;
7165         tr->writeable = 1;
7166         tr->usermode = 0;
7167
7168         return 0;
7169 }
7170
7171 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7172 {
7173         struct fxregs_state *fxsave =
7174                         &vcpu->arch.guest_fpu.state.fxsave;
7175
7176         memcpy(fpu->fpr, fxsave->st_space, 128);
7177         fpu->fcw = fxsave->cwd;
7178         fpu->fsw = fxsave->swd;
7179         fpu->ftwx = fxsave->twd;
7180         fpu->last_opcode = fxsave->fop;
7181         fpu->last_ip = fxsave->rip;
7182         fpu->last_dp = fxsave->rdp;
7183         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7184
7185         return 0;
7186 }
7187
7188 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7189 {
7190         struct fxregs_state *fxsave =
7191                         &vcpu->arch.guest_fpu.state.fxsave;
7192
7193         memcpy(fxsave->st_space, fpu->fpr, 128);
7194         fxsave->cwd = fpu->fcw;
7195         fxsave->swd = fpu->fsw;
7196         fxsave->twd = fpu->ftwx;
7197         fxsave->fop = fpu->last_opcode;
7198         fxsave->rip = fpu->last_ip;
7199         fxsave->rdp = fpu->last_dp;
7200         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7201
7202         return 0;
7203 }
7204
7205 static void fx_init(struct kvm_vcpu *vcpu)
7206 {
7207         fpstate_init(&vcpu->arch.guest_fpu.state);
7208         if (cpu_has_xsaves)
7209                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7210                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7211
7212         /*
7213          * Ensure guest xcr0 is valid for loading
7214          */
7215         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7216
7217         vcpu->arch.cr0 |= X86_CR0_ET;
7218 }
7219
7220 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7221 {
7222         if (vcpu->guest_fpu_loaded)
7223                 return;
7224
7225         /*
7226          * Restore all possible states in the guest,
7227          * and assume host would use all available bits.
7228          * Guest xcr0 would be loaded later.
7229          */
7230         kvm_put_guest_xcr0(vcpu);
7231         vcpu->guest_fpu_loaded = 1;
7232         __kernel_fpu_begin();
7233         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7234         trace_kvm_fpu(1);
7235 }
7236
7237 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7238 {
7239         kvm_put_guest_xcr0(vcpu);
7240
7241         if (!vcpu->guest_fpu_loaded) {
7242                 vcpu->fpu_counter = 0;
7243                 return;
7244         }
7245
7246         vcpu->guest_fpu_loaded = 0;
7247         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7248         __kernel_fpu_end();
7249         ++vcpu->stat.fpu_reload;
7250         /*
7251          * If using eager FPU mode, or if the guest is a frequent user
7252          * of the FPU, just leave the FPU active for next time.
7253          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7254          * the FPU in bursts will revert to loading it on demand.
7255          */
7256         if (!vcpu->arch.eager_fpu) {
7257                 if (++vcpu->fpu_counter < 5)
7258                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7259         }
7260         trace_kvm_fpu(0);
7261 }
7262
7263 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7264 {
7265         kvmclock_reset(vcpu);
7266
7267         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7268         kvm_x86_ops->vcpu_free(vcpu);
7269 }
7270
7271 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7272                                                 unsigned int id)
7273 {
7274         struct kvm_vcpu *vcpu;
7275
7276         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7277                 printk_once(KERN_WARNING
7278                 "kvm: SMP vm created on host with unstable TSC; "
7279                 "guest TSC will not be reliable\n");
7280
7281         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7282
7283         return vcpu;
7284 }
7285
7286 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7287 {
7288         int r;
7289
7290         kvm_vcpu_mtrr_init(vcpu);
7291         r = vcpu_load(vcpu);
7292         if (r)
7293                 return r;
7294         kvm_vcpu_reset(vcpu, false);
7295         kvm_mmu_setup(vcpu);
7296         vcpu_put(vcpu);
7297         return r;
7298 }
7299
7300 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7301 {
7302         struct msr_data msr;
7303         struct kvm *kvm = vcpu->kvm;
7304
7305         if (vcpu_load(vcpu))
7306                 return;
7307         msr.data = 0x0;
7308         msr.index = MSR_IA32_TSC;
7309         msr.host_initiated = true;
7310         kvm_write_tsc(vcpu, &msr);
7311         vcpu_put(vcpu);
7312
7313         if (!kvmclock_periodic_sync)
7314                 return;
7315
7316         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7317                                         KVMCLOCK_SYNC_PERIOD);
7318 }
7319
7320 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7321 {
7322         int r;
7323         vcpu->arch.apf.msr_val = 0;
7324
7325         r = vcpu_load(vcpu);
7326         BUG_ON(r);
7327         kvm_mmu_unload(vcpu);
7328         vcpu_put(vcpu);
7329
7330         kvm_x86_ops->vcpu_free(vcpu);
7331 }
7332
7333 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7334 {
7335         vcpu->arch.hflags = 0;
7336
7337         atomic_set(&vcpu->arch.nmi_queued, 0);
7338         vcpu->arch.nmi_pending = 0;
7339         vcpu->arch.nmi_injected = false;
7340         kvm_clear_interrupt_queue(vcpu);
7341         kvm_clear_exception_queue(vcpu);
7342
7343         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7344         kvm_update_dr0123(vcpu);
7345         vcpu->arch.dr6 = DR6_INIT;
7346         kvm_update_dr6(vcpu);
7347         vcpu->arch.dr7 = DR7_FIXED_1;
7348         kvm_update_dr7(vcpu);
7349
7350         vcpu->arch.cr2 = 0;
7351
7352         kvm_make_request(KVM_REQ_EVENT, vcpu);
7353         vcpu->arch.apf.msr_val = 0;
7354         vcpu->arch.st.msr_val = 0;
7355
7356         kvmclock_reset(vcpu);
7357
7358         kvm_clear_async_pf_completion_queue(vcpu);
7359         kvm_async_pf_hash_reset(vcpu);
7360         vcpu->arch.apf.halted = false;
7361
7362         if (!init_event) {
7363                 kvm_pmu_reset(vcpu);
7364                 vcpu->arch.smbase = 0x30000;
7365         }
7366
7367         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7368         vcpu->arch.regs_avail = ~0;
7369         vcpu->arch.regs_dirty = ~0;
7370
7371         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7372 }
7373
7374 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7375 {
7376         struct kvm_segment cs;
7377
7378         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7379         cs.selector = vector << 8;
7380         cs.base = vector << 12;
7381         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7382         kvm_rip_write(vcpu, 0);
7383 }
7384
7385 int kvm_arch_hardware_enable(void)
7386 {
7387         struct kvm *kvm;
7388         struct kvm_vcpu *vcpu;
7389         int i;
7390         int ret;
7391         u64 local_tsc;
7392         u64 max_tsc = 0;
7393         bool stable, backwards_tsc = false;
7394
7395         kvm_shared_msr_cpu_online();
7396         ret = kvm_x86_ops->hardware_enable();
7397         if (ret != 0)
7398                 return ret;
7399
7400         local_tsc = rdtsc();
7401         stable = !check_tsc_unstable();
7402         list_for_each_entry(kvm, &vm_list, vm_list) {
7403                 kvm_for_each_vcpu(i, vcpu, kvm) {
7404                         if (!stable && vcpu->cpu == smp_processor_id())
7405                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7406                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7407                                 backwards_tsc = true;
7408                                 if (vcpu->arch.last_host_tsc > max_tsc)
7409                                         max_tsc = vcpu->arch.last_host_tsc;
7410                         }
7411                 }
7412         }
7413
7414         /*
7415          * Sometimes, even reliable TSCs go backwards.  This happens on
7416          * platforms that reset TSC during suspend or hibernate actions, but
7417          * maintain synchronization.  We must compensate.  Fortunately, we can
7418          * detect that condition here, which happens early in CPU bringup,
7419          * before any KVM threads can be running.  Unfortunately, we can't
7420          * bring the TSCs fully up to date with real time, as we aren't yet far
7421          * enough into CPU bringup that we know how much real time has actually
7422          * elapsed; our helper function, get_kernel_ns() will be using boot
7423          * variables that haven't been updated yet.
7424          *
7425          * So we simply find the maximum observed TSC above, then record the
7426          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7427          * the adjustment will be applied.  Note that we accumulate
7428          * adjustments, in case multiple suspend cycles happen before some VCPU
7429          * gets a chance to run again.  In the event that no KVM threads get a
7430          * chance to run, we will miss the entire elapsed period, as we'll have
7431          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7432          * loose cycle time.  This isn't too big a deal, since the loss will be
7433          * uniform across all VCPUs (not to mention the scenario is extremely
7434          * unlikely). It is possible that a second hibernate recovery happens
7435          * much faster than a first, causing the observed TSC here to be
7436          * smaller; this would require additional padding adjustment, which is
7437          * why we set last_host_tsc to the local tsc observed here.
7438          *
7439          * N.B. - this code below runs only on platforms with reliable TSC,
7440          * as that is the only way backwards_tsc is set above.  Also note
7441          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7442          * have the same delta_cyc adjustment applied if backwards_tsc
7443          * is detected.  Note further, this adjustment is only done once,
7444          * as we reset last_host_tsc on all VCPUs to stop this from being
7445          * called multiple times (one for each physical CPU bringup).
7446          *
7447          * Platforms with unreliable TSCs don't have to deal with this, they
7448          * will be compensated by the logic in vcpu_load, which sets the TSC to
7449          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7450          * guarantee that they stay in perfect synchronization.
7451          */
7452         if (backwards_tsc) {
7453                 u64 delta_cyc = max_tsc - local_tsc;
7454                 backwards_tsc_observed = true;
7455                 list_for_each_entry(kvm, &vm_list, vm_list) {
7456                         kvm_for_each_vcpu(i, vcpu, kvm) {
7457                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7458                                 vcpu->arch.last_host_tsc = local_tsc;
7459                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7460                         }
7461
7462                         /*
7463                          * We have to disable TSC offset matching.. if you were
7464                          * booting a VM while issuing an S4 host suspend....
7465                          * you may have some problem.  Solving this issue is
7466                          * left as an exercise to the reader.
7467                          */
7468                         kvm->arch.last_tsc_nsec = 0;
7469                         kvm->arch.last_tsc_write = 0;
7470                 }
7471
7472         }
7473         return 0;
7474 }
7475
7476 void kvm_arch_hardware_disable(void)
7477 {
7478         kvm_x86_ops->hardware_disable();
7479         drop_user_return_notifiers();
7480 }
7481
7482 int kvm_arch_hardware_setup(void)
7483 {
7484         int r;
7485
7486         r = kvm_x86_ops->hardware_setup();
7487         if (r != 0)
7488                 return r;
7489
7490         if (kvm_has_tsc_control) {
7491                 /*
7492                  * Make sure the user can only configure tsc_khz values that
7493                  * fit into a signed integer.
7494                  * A min value is not calculated needed because it will always
7495                  * be 1 on all machines.
7496                  */
7497                 u64 max = min(0x7fffffffULL,
7498                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7499                 kvm_max_guest_tsc_khz = max;
7500
7501                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7502         }
7503
7504         kvm_init_msr_list();
7505         return 0;
7506 }
7507
7508 void kvm_arch_hardware_unsetup(void)
7509 {
7510         kvm_x86_ops->hardware_unsetup();
7511 }
7512
7513 void kvm_arch_check_processor_compat(void *rtn)
7514 {
7515         kvm_x86_ops->check_processor_compatibility(rtn);
7516 }
7517
7518 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7519 {
7520         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7521 }
7522 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7523
7524 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7525 {
7526         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7527 }
7528
7529 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7530 {
7531         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7532 }
7533
7534 struct static_key kvm_no_apic_vcpu __read_mostly;
7535
7536 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7537 {
7538         struct page *page;
7539         struct kvm *kvm;
7540         int r;
7541
7542         BUG_ON(vcpu->kvm == NULL);
7543         kvm = vcpu->kvm;
7544
7545         vcpu->arch.pv.pv_unhalted = false;
7546         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7547         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7548                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7549         else
7550                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7551
7552         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7553         if (!page) {
7554                 r = -ENOMEM;
7555                 goto fail;
7556         }
7557         vcpu->arch.pio_data = page_address(page);
7558
7559         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7560
7561         r = kvm_mmu_create(vcpu);
7562         if (r < 0)
7563                 goto fail_free_pio_data;
7564
7565         if (irqchip_in_kernel(kvm)) {
7566                 r = kvm_create_lapic(vcpu);
7567                 if (r < 0)
7568                         goto fail_mmu_destroy;
7569         } else
7570                 static_key_slow_inc(&kvm_no_apic_vcpu);
7571
7572         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7573                                        GFP_KERNEL);
7574         if (!vcpu->arch.mce_banks) {
7575                 r = -ENOMEM;
7576                 goto fail_free_lapic;
7577         }
7578         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7579
7580         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7581                 r = -ENOMEM;
7582                 goto fail_free_mce_banks;
7583         }
7584
7585         fx_init(vcpu);
7586
7587         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7588         vcpu->arch.pv_time_enabled = false;
7589
7590         vcpu->arch.guest_supported_xcr0 = 0;
7591         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7592
7593         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7594
7595         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7596
7597         kvm_async_pf_hash_reset(vcpu);
7598         kvm_pmu_init(vcpu);
7599
7600         vcpu->arch.pending_external_vector = -1;
7601
7602         return 0;
7603
7604 fail_free_mce_banks:
7605         kfree(vcpu->arch.mce_banks);
7606 fail_free_lapic:
7607         kvm_free_lapic(vcpu);
7608 fail_mmu_destroy:
7609         kvm_mmu_destroy(vcpu);
7610 fail_free_pio_data:
7611         free_page((unsigned long)vcpu->arch.pio_data);
7612 fail:
7613         return r;
7614 }
7615
7616 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7617 {
7618         int idx;
7619
7620         kvm_pmu_destroy(vcpu);
7621         kfree(vcpu->arch.mce_banks);
7622         kvm_free_lapic(vcpu);
7623         idx = srcu_read_lock(&vcpu->kvm->srcu);
7624         kvm_mmu_destroy(vcpu);
7625         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7626         free_page((unsigned long)vcpu->arch.pio_data);
7627         if (!lapic_in_kernel(vcpu))
7628                 static_key_slow_dec(&kvm_no_apic_vcpu);
7629 }
7630
7631 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7632 {
7633         kvm_x86_ops->sched_in(vcpu, cpu);
7634 }
7635
7636 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7637 {
7638         if (type)
7639                 return -EINVAL;
7640
7641         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7642         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7643         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7644         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7645         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7646
7647         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7648         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7649         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7650         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7651                 &kvm->arch.irq_sources_bitmap);
7652
7653         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7654         mutex_init(&kvm->arch.apic_map_lock);
7655         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7656
7657         pvclock_update_vm_gtod_copy(kvm);
7658
7659         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7660         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7661
7662         return 0;
7663 }
7664
7665 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7666 {
7667         int r;
7668         r = vcpu_load(vcpu);
7669         BUG_ON(r);
7670         kvm_mmu_unload(vcpu);
7671         vcpu_put(vcpu);
7672 }
7673
7674 static void kvm_free_vcpus(struct kvm *kvm)
7675 {
7676         unsigned int i;
7677         struct kvm_vcpu *vcpu;
7678
7679         /*
7680          * Unpin any mmu pages first.
7681          */
7682         kvm_for_each_vcpu(i, vcpu, kvm) {
7683                 kvm_clear_async_pf_completion_queue(vcpu);
7684                 kvm_unload_vcpu_mmu(vcpu);
7685         }
7686         kvm_for_each_vcpu(i, vcpu, kvm)
7687                 kvm_arch_vcpu_free(vcpu);
7688
7689         mutex_lock(&kvm->lock);
7690         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7691                 kvm->vcpus[i] = NULL;
7692
7693         atomic_set(&kvm->online_vcpus, 0);
7694         mutex_unlock(&kvm->lock);
7695 }
7696
7697 void kvm_arch_sync_events(struct kvm *kvm)
7698 {
7699         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7700         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7701         kvm_free_all_assigned_devices(kvm);
7702         kvm_free_pit(kvm);
7703 }
7704
7705 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7706 {
7707         int i, r;
7708         unsigned long hva;
7709         struct kvm_memslots *slots = kvm_memslots(kvm);
7710         struct kvm_memory_slot *slot, old;
7711
7712         /* Called with kvm->slots_lock held.  */
7713         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7714                 return -EINVAL;
7715
7716         slot = id_to_memslot(slots, id);
7717         if (size) {
7718                 if (WARN_ON(slot->npages))
7719                         return -EEXIST;
7720
7721                 /*
7722                  * MAP_SHARED to prevent internal slot pages from being moved
7723                  * by fork()/COW.
7724                  */
7725                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7726                               MAP_SHARED | MAP_ANONYMOUS, 0);
7727                 if (IS_ERR((void *)hva))
7728                         return PTR_ERR((void *)hva);
7729         } else {
7730                 if (!slot->npages)
7731                         return 0;
7732
7733                 hva = 0;
7734         }
7735
7736         old = *slot;
7737         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7738                 struct kvm_userspace_memory_region m;
7739
7740                 m.slot = id | (i << 16);
7741                 m.flags = 0;
7742                 m.guest_phys_addr = gpa;
7743                 m.userspace_addr = hva;
7744                 m.memory_size = size;
7745                 r = __kvm_set_memory_region(kvm, &m);
7746                 if (r < 0)
7747                         return r;
7748         }
7749
7750         if (!size) {
7751                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7752                 WARN_ON(r < 0);
7753         }
7754
7755         return 0;
7756 }
7757 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7758
7759 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7760 {
7761         int r;
7762
7763         mutex_lock(&kvm->slots_lock);
7764         r = __x86_set_memory_region(kvm, id, gpa, size);
7765         mutex_unlock(&kvm->slots_lock);
7766
7767         return r;
7768 }
7769 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7770
7771 void kvm_arch_destroy_vm(struct kvm *kvm)
7772 {
7773         if (current->mm == kvm->mm) {
7774                 /*
7775                  * Free memory regions allocated on behalf of userspace,
7776                  * unless the the memory map has changed due to process exit
7777                  * or fd copying.
7778                  */
7779                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7780                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7781                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7782         }
7783         kvm_iommu_unmap_guest(kvm);
7784         kfree(kvm->arch.vpic);
7785         kfree(kvm->arch.vioapic);
7786         kvm_free_vcpus(kvm);
7787         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7788 }
7789
7790 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7791                            struct kvm_memory_slot *dont)
7792 {
7793         int i;
7794
7795         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7796                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7797                         kvfree(free->arch.rmap[i]);
7798                         free->arch.rmap[i] = NULL;
7799                 }
7800                 if (i == 0)
7801                         continue;
7802
7803                 if (!dont || free->arch.lpage_info[i - 1] !=
7804                              dont->arch.lpage_info[i - 1]) {
7805                         kvfree(free->arch.lpage_info[i - 1]);
7806                         free->arch.lpage_info[i - 1] = NULL;
7807                 }
7808         }
7809 }
7810
7811 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7812                             unsigned long npages)
7813 {
7814         int i;
7815
7816         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7817                 unsigned long ugfn;
7818                 int lpages;
7819                 int level = i + 1;
7820
7821                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7822                                       slot->base_gfn, level) + 1;
7823
7824                 slot->arch.rmap[i] =
7825                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7826                 if (!slot->arch.rmap[i])
7827                         goto out_free;
7828                 if (i == 0)
7829                         continue;
7830
7831                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7832                                         sizeof(*slot->arch.lpage_info[i - 1]));
7833                 if (!slot->arch.lpage_info[i - 1])
7834                         goto out_free;
7835
7836                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7837                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7838                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7839                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7840                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7841                 /*
7842                  * If the gfn and userspace address are not aligned wrt each
7843                  * other, or if explicitly asked to, disable large page
7844                  * support for this slot
7845                  */
7846                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7847                     !kvm_largepages_enabled()) {
7848                         unsigned long j;
7849
7850                         for (j = 0; j < lpages; ++j)
7851                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7852                 }
7853         }
7854
7855         return 0;
7856
7857 out_free:
7858         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7859                 kvfree(slot->arch.rmap[i]);
7860                 slot->arch.rmap[i] = NULL;
7861                 if (i == 0)
7862                         continue;
7863
7864                 kvfree(slot->arch.lpage_info[i - 1]);
7865                 slot->arch.lpage_info[i - 1] = NULL;
7866         }
7867         return -ENOMEM;
7868 }
7869
7870 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7871 {
7872         /*
7873          * memslots->generation has been incremented.
7874          * mmio generation may have reached its maximum value.
7875          */
7876         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7877 }
7878
7879 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7880                                 struct kvm_memory_slot *memslot,
7881                                 const struct kvm_userspace_memory_region *mem,
7882                                 enum kvm_mr_change change)
7883 {
7884         return 0;
7885 }
7886
7887 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7888                                      struct kvm_memory_slot *new)
7889 {
7890         /* Still write protect RO slot */
7891         if (new->flags & KVM_MEM_READONLY) {
7892                 kvm_mmu_slot_remove_write_access(kvm, new);
7893                 return;
7894         }
7895
7896         /*
7897          * Call kvm_x86_ops dirty logging hooks when they are valid.
7898          *
7899          * kvm_x86_ops->slot_disable_log_dirty is called when:
7900          *
7901          *  - KVM_MR_CREATE with dirty logging is disabled
7902          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7903          *
7904          * The reason is, in case of PML, we need to set D-bit for any slots
7905          * with dirty logging disabled in order to eliminate unnecessary GPA
7906          * logging in PML buffer (and potential PML buffer full VMEXT). This
7907          * guarantees leaving PML enabled during guest's lifetime won't have
7908          * any additonal overhead from PML when guest is running with dirty
7909          * logging disabled for memory slots.
7910          *
7911          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7912          * to dirty logging mode.
7913          *
7914          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7915          *
7916          * In case of write protect:
7917          *
7918          * Write protect all pages for dirty logging.
7919          *
7920          * All the sptes including the large sptes which point to this
7921          * slot are set to readonly. We can not create any new large
7922          * spte on this slot until the end of the logging.
7923          *
7924          * See the comments in fast_page_fault().
7925          */
7926         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7927                 if (kvm_x86_ops->slot_enable_log_dirty)
7928                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7929                 else
7930                         kvm_mmu_slot_remove_write_access(kvm, new);
7931         } else {
7932                 if (kvm_x86_ops->slot_disable_log_dirty)
7933                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7934         }
7935 }
7936
7937 void kvm_arch_commit_memory_region(struct kvm *kvm,
7938                                 const struct kvm_userspace_memory_region *mem,
7939                                 const struct kvm_memory_slot *old,
7940                                 const struct kvm_memory_slot *new,
7941                                 enum kvm_mr_change change)
7942 {
7943         int nr_mmu_pages = 0;
7944
7945         if (!kvm->arch.n_requested_mmu_pages)
7946                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7947
7948         if (nr_mmu_pages)
7949                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7950
7951         /*
7952          * Dirty logging tracks sptes in 4k granularity, meaning that large
7953          * sptes have to be split.  If live migration is successful, the guest
7954          * in the source machine will be destroyed and large sptes will be
7955          * created in the destination. However, if the guest continues to run
7956          * in the source machine (for example if live migration fails), small
7957          * sptes will remain around and cause bad performance.
7958          *
7959          * Scan sptes if dirty logging has been stopped, dropping those
7960          * which can be collapsed into a single large-page spte.  Later
7961          * page faults will create the large-page sptes.
7962          */
7963         if ((change != KVM_MR_DELETE) &&
7964                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7965                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7966                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7967
7968         /*
7969          * Set up write protection and/or dirty logging for the new slot.
7970          *
7971          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7972          * been zapped so no dirty logging staff is needed for old slot. For
7973          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7974          * new and it's also covered when dealing with the new slot.
7975          *
7976          * FIXME: const-ify all uses of struct kvm_memory_slot.
7977          */
7978         if (change != KVM_MR_DELETE)
7979                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7980 }
7981
7982 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7983 {
7984         kvm_mmu_invalidate_zap_all_pages(kvm);
7985 }
7986
7987 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7988                                    struct kvm_memory_slot *slot)
7989 {
7990         kvm_mmu_invalidate_zap_all_pages(kvm);
7991 }
7992
7993 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
7994 {
7995         if (!list_empty_careful(&vcpu->async_pf.done))
7996                 return true;
7997
7998         if (kvm_apic_has_events(vcpu))
7999                 return true;
8000
8001         if (vcpu->arch.pv.pv_unhalted)
8002                 return true;
8003
8004         if (atomic_read(&vcpu->arch.nmi_queued))
8005                 return true;
8006
8007         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8008                 return true;
8009
8010         if (kvm_arch_interrupt_allowed(vcpu) &&
8011             kvm_cpu_has_interrupt(vcpu))
8012                 return true;
8013
8014         return false;
8015 }
8016
8017 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8018 {
8019         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8020                 kvm_x86_ops->check_nested_events(vcpu, false);
8021
8022         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8023 }
8024
8025 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8026 {
8027         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8028 }
8029
8030 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8031 {
8032         return kvm_x86_ops->interrupt_allowed(vcpu);
8033 }
8034
8035 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8036 {
8037         if (is_64_bit_mode(vcpu))
8038                 return kvm_rip_read(vcpu);
8039         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8040                      kvm_rip_read(vcpu));
8041 }
8042 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8043
8044 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8045 {
8046         return kvm_get_linear_rip(vcpu) == linear_rip;
8047 }
8048 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8049
8050 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8051 {
8052         unsigned long rflags;
8053
8054         rflags = kvm_x86_ops->get_rflags(vcpu);
8055         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8056                 rflags &= ~X86_EFLAGS_TF;
8057         return rflags;
8058 }
8059 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8060
8061 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8062 {
8063         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8064             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8065                 rflags |= X86_EFLAGS_TF;
8066         kvm_x86_ops->set_rflags(vcpu, rflags);
8067 }
8068
8069 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8070 {
8071         __kvm_set_rflags(vcpu, rflags);
8072         kvm_make_request(KVM_REQ_EVENT, vcpu);
8073 }
8074 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8075
8076 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8077 {
8078         int r;
8079
8080         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8081               work->wakeup_all)
8082                 return;
8083
8084         r = kvm_mmu_reload(vcpu);
8085         if (unlikely(r))
8086                 return;
8087
8088         if (!vcpu->arch.mmu.direct_map &&
8089               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8090                 return;
8091
8092         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8093 }
8094
8095 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8096 {
8097         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8098 }
8099
8100 static inline u32 kvm_async_pf_next_probe(u32 key)
8101 {
8102         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8103 }
8104
8105 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8106 {
8107         u32 key = kvm_async_pf_hash_fn(gfn);
8108
8109         while (vcpu->arch.apf.gfns[key] != ~0)
8110                 key = kvm_async_pf_next_probe(key);
8111
8112         vcpu->arch.apf.gfns[key] = gfn;
8113 }
8114
8115 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8116 {
8117         int i;
8118         u32 key = kvm_async_pf_hash_fn(gfn);
8119
8120         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8121                      (vcpu->arch.apf.gfns[key] != gfn &&
8122                       vcpu->arch.apf.gfns[key] != ~0); i++)
8123                 key = kvm_async_pf_next_probe(key);
8124
8125         return key;
8126 }
8127
8128 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8129 {
8130         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8131 }
8132
8133 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8134 {
8135         u32 i, j, k;
8136
8137         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8138         while (true) {
8139                 vcpu->arch.apf.gfns[i] = ~0;
8140                 do {
8141                         j = kvm_async_pf_next_probe(j);
8142                         if (vcpu->arch.apf.gfns[j] == ~0)
8143                                 return;
8144                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8145                         /*
8146                          * k lies cyclically in ]i,j]
8147                          * |    i.k.j |
8148                          * |....j i.k.| or  |.k..j i...|
8149                          */
8150                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8151                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8152                 i = j;
8153         }
8154 }
8155
8156 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8157 {
8158
8159         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8160                                       sizeof(val));
8161 }
8162
8163 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8164                                      struct kvm_async_pf *work)
8165 {
8166         struct x86_exception fault;
8167
8168         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8169         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8170
8171         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8172             (vcpu->arch.apf.send_user_only &&
8173              kvm_x86_ops->get_cpl(vcpu) == 0))
8174                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8175         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8176                 fault.vector = PF_VECTOR;
8177                 fault.error_code_valid = true;
8178                 fault.error_code = 0;
8179                 fault.nested_page_fault = false;
8180                 fault.address = work->arch.token;
8181                 kvm_inject_page_fault(vcpu, &fault);
8182         }
8183 }
8184
8185 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8186                                  struct kvm_async_pf *work)
8187 {
8188         struct x86_exception fault;
8189
8190         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8191         if (work->wakeup_all)
8192                 work->arch.token = ~0; /* broadcast wakeup */
8193         else
8194                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8195
8196         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8197             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8198                 fault.vector = PF_VECTOR;
8199                 fault.error_code_valid = true;
8200                 fault.error_code = 0;
8201                 fault.nested_page_fault = false;
8202                 fault.address = work->arch.token;
8203                 kvm_inject_page_fault(vcpu, &fault);
8204         }
8205         vcpu->arch.apf.halted = false;
8206         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8207 }
8208
8209 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8210 {
8211         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8212                 return true;
8213         else
8214                 return !kvm_event_needs_reinjection(vcpu) &&
8215                         kvm_x86_ops->interrupt_allowed(vcpu);
8216 }
8217
8218 void kvm_arch_start_assignment(struct kvm *kvm)
8219 {
8220         atomic_inc(&kvm->arch.assigned_device_count);
8221 }
8222 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8223
8224 void kvm_arch_end_assignment(struct kvm *kvm)
8225 {
8226         atomic_dec(&kvm->arch.assigned_device_count);
8227 }
8228 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8229
8230 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8231 {
8232         return atomic_read(&kvm->arch.assigned_device_count);
8233 }
8234 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8235
8236 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8237 {
8238         atomic_inc(&kvm->arch.noncoherent_dma_count);
8239 }
8240 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8241
8242 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8243 {
8244         atomic_dec(&kvm->arch.noncoherent_dma_count);
8245 }
8246 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8247
8248 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8249 {
8250         return atomic_read(&kvm->arch.noncoherent_dma_count);
8251 }
8252 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8253
8254 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8255                                       struct irq_bypass_producer *prod)
8256 {
8257         struct kvm_kernel_irqfd *irqfd =
8258                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8259
8260         if (kvm_x86_ops->update_pi_irte) {
8261                 irqfd->producer = prod;
8262                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8263                                 prod->irq, irqfd->gsi, 1);
8264         }
8265
8266         return -EINVAL;
8267 }
8268
8269 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8270                                       struct irq_bypass_producer *prod)
8271 {
8272         int ret;
8273         struct kvm_kernel_irqfd *irqfd =
8274                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8275
8276         if (!kvm_x86_ops->update_pi_irte) {
8277                 WARN_ON(irqfd->producer != NULL);
8278                 return;
8279         }
8280
8281         WARN_ON(irqfd->producer != prod);
8282         irqfd->producer = NULL;
8283
8284         /*
8285          * When producer of consumer is unregistered, we change back to
8286          * remapped mode, so we can re-use the current implementation
8287          * when the irq is masked/disabed or the consumer side (KVM
8288          * int this case doesn't want to receive the interrupts.
8289         */
8290         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8291         if (ret)
8292                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8293                        " fails: %d\n", irqfd->consumer.token, ret);
8294 }
8295
8296 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8297                                    uint32_t guest_irq, bool set)
8298 {
8299         if (!kvm_x86_ops->update_pi_irte)
8300                 return -EINVAL;
8301
8302         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8303 }
8304
8305 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8306 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8307 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8309 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8310 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8311 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8312 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8313 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8314 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8315 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8316 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8317 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8318 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8319 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8320 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8321 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);