kernel/arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 118
 119 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 120 static u32 __read_mostly tsc_tolerance_ppm = 250;
 121 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 122
 123 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 124 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 125 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 126
 127 static bool __read_mostly backwards_tsc_observed = false;
 128
 129 #define KVM_NR_SHARED_MSRS 16
 130
 131 struct kvm_shared_msrs_global {
 132         int nr;
 133         u32 msrs[KVM_NR_SHARED_MSRS];
 134 };
 135
 136 struct kvm_shared_msrs {
 137         struct user_return_notifier urn;
 138         bool registered;
 139         struct kvm_shared_msr_values {
 140                 u64 host;
 141                 u64 curr;
 142         } values[KVM_NR_SHARED_MSRS];
 143 };
 144
 145 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 146 static struct kvm_shared_msrs __percpu *shared_msrs;
 147
 148 struct kvm_stats_debugfs_item debugfs_entries[] = {
 149         { "pf_fixed", VCPU_STAT(pf_fixed) },
 150         { "pf_guest", VCPU_STAT(pf_guest) },
 151         { "tlb_flush", VCPU_STAT(tlb_flush) },
 152         { "invlpg", VCPU_STAT(invlpg) },
 153         { "exits", VCPU_STAT(exits) },
 154         { "io_exits", VCPU_STAT(io_exits) },
 155         { "mmio_exits", VCPU_STAT(mmio_exits) },
 156         { "signal_exits", VCPU_STAT(signal_exits) },
 157         { "irq_window", VCPU_STAT(irq_window_exits) },
 158         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 159         { "halt_exits", VCPU_STAT(halt_exits) },
 160         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 161         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 162         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 163         { "hypercalls", VCPU_STAT(hypercalls) },
 164         { "request_irq", VCPU_STAT(request_irq_exits) },
 165         { "irq_exits", VCPU_STAT(irq_exits) },
 166         { "host_state_reload", VCPU_STAT(host_state_reload) },
 167         { "efer_reload", VCPU_STAT(efer_reload) },
 168         { "fpu_reload", VCPU_STAT(fpu_reload) },
 169         { "insn_emulation", VCPU_STAT(insn_emulation) },
 170         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 171         { "irq_injections", VCPU_STAT(irq_injections) },
 172         { "nmi_injections", VCPU_STAT(nmi_injections) },
 173         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 174         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 175         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 176         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 177         { "mmu_flooded", VM_STAT(mmu_flooded) },
 178         { "mmu_recycled", VM_STAT(mmu_recycled) },
 179         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 180         { "mmu_unsync", VM_STAT(mmu_unsync) },
 181         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 182         { "largepages", VM_STAT(lpages) },
 183         { NULL }
 184 };
 185
 186 u64 __read_mostly host_xcr0;
 187
 188 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 189
 190 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 191 {
 192         int i;
 193         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 194                 vcpu->arch.apf.gfns[i] = ~0;
 195 }
 196
 197 static void kvm_on_user_return(struct user_return_notifier *urn)
 198 {
 199         unsigned slot;
 200         struct kvm_shared_msrs *locals
 201                 = container_of(urn, struct kvm_shared_msrs, urn);
 202         struct kvm_shared_msr_values *values;
 203         unsigned long flags;
 204
 205         /*
 206          * Disabling irqs at this point since the following code could be
 207          * interrupted and executed through kvm_arch_hardware_disable()
 208          */
 209         local_irq_save(flags);
 210         if (locals->registered) {
 211                 locals->registered = false;
 212                 user_return_notifier_unregister(urn);
 213         }
 214         local_irq_restore(flags);
 215         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 216                 values = &locals->values[slot];
 217                 if (values->host != values->curr) {
 218                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 219                         values->curr = values->host;
 220                 }
 221         }
 222 }
 223
 224 static void shared_msr_update(unsigned slot, u32 msr)
 225 {
 226         u64 value;
 227         unsigned int cpu = smp_processor_id();
 228         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 229
 230         /* only read, and nobody should modify it at this time,
 231          * so don't need lock */
 232         if (slot >= shared_msrs_global.nr) {
 233                 printk(KERN_ERR "kvm: invalid MSR slot!");
 234                 return;
 235         }
 236         rdmsrl_safe(msr, &value);
 237         smsr->values[slot].host = value;
 238         smsr->values[slot].curr = value;
 239 }
 240
 241 void kvm_define_shared_msr(unsigned slot, u32 msr)
 242 {
 243         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 244         shared_msrs_global.msrs[slot] = msr;
 245         if (slot >= shared_msrs_global.nr)
 246                 shared_msrs_global.nr = slot + 1;
 247 }
 248 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 249
 250 static void kvm_shared_msr_cpu_online(void)
 251 {
 252         unsigned i;
 253
 254         for (i = 0; i < shared_msrs_global.nr; ++i)
 255                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 256 }
 257
 258 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 259 {
 260         unsigned int cpu = smp_processor_id();
 261         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 262         int err;
 263
 264         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 265                 return 0;
 266         smsr->values[slot].curr = value;
 267         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 268         if (err)
 269                 return 1;
 270
 271         if (!smsr->registered) {
 272                 smsr->urn.on_user_return = kvm_on_user_return;
 273                 user_return_notifier_register(&smsr->urn);
 274                 smsr->registered = true;
 275         }
 276         return 0;
 277 }
 278 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 279
 280 static void drop_user_return_notifiers(void)
 281 {
 282         unsigned int cpu = smp_processor_id();
 283         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 284
 285         if (smsr->registered)
 286                 kvm_on_user_return(&smsr->urn);
 287 }
 288
 289 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 290 {
 291         return vcpu->arch.apic_base;
 292 }
 293 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 294
 295 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 296 {
 297         u64 old_state = vcpu->arch.apic_base &
 298                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 299         u64 new_state = msr_info->data &
 300                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 301         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 302                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 303
 304         if (!msr_info->host_initiated &&
 305             ((msr_info->data & reserved_bits) != 0 ||
 306              new_state == X2APIC_ENABLE ||
 307              (new_state == MSR_IA32_APICBASE_ENABLE &&
 308               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 309              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 310               old_state == 0)))
 311                 return 1;
 312
 313         kvm_lapic_set_base(vcpu, msr_info->data);
 314         return 0;
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 317
 318 asmlinkage __visible void kvm_spurious_fault(void)
 319 {
 320         /* Fault while not rebooting.  We want the trace. */
 321         BUG();
 322 }
 323 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 324
 325 #define EXCPT_BENIGN            0
 326 #define EXCPT_CONTRIBUTORY      1
 327 #define EXCPT_PF                2
 328
 329 static int exception_class(int vector)
 330 {
 331         switch (vector) {
 332         case PF_VECTOR:
 333                 return EXCPT_PF;
 334         case DE_VECTOR:
 335         case TS_VECTOR:
 336         case NP_VECTOR:
 337         case SS_VECTOR:
 338         case GP_VECTOR:
 339                 return EXCPT_CONTRIBUTORY;
 340         default:
 341                 break;
 342         }
 343         return EXCPT_BENIGN;
 344 }
 345
 346 #define EXCPT_FAULT             0
 347 #define EXCPT_TRAP              1
 348 #define EXCPT_ABORT             2
 349 #define EXCPT_INTERRUPT         3
 350
 351 static int exception_type(int vector)
 352 {
 353         unsigned int mask;
 354
 355         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 356                 return EXCPT_INTERRUPT;
 357
 358         mask = 1 << vector;
 359
 360         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 361         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 362                 return EXCPT_TRAP;
 363
 364         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 365                 return EXCPT_ABORT;
 366
 367         /* Reserved exceptions will result in fault */
 368         return EXCPT_FAULT;
 369 }
 370
 371 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 372                 unsigned nr, bool has_error, u32 error_code,
 373                 bool reinject)
 374 {
 375         u32 prev_nr;
 376         int class1, class2;
 377
 378         kvm_make_request(KVM_REQ_EVENT, vcpu);
 379
 380         if (!vcpu->arch.exception.pending) {
 381         queue:
 382                 if (has_error && !is_protmode(vcpu))
 383                         has_error = false;
 384                 vcpu->arch.exception.pending = true;
 385                 vcpu->arch.exception.has_error_code = has_error;
 386                 vcpu->arch.exception.nr = nr;
 387                 vcpu->arch.exception.error_code = error_code;
 388                 vcpu->arch.exception.reinject = reinject;
 389                 return;
 390         }
 391
 392         /* to check exception */
 393         prev_nr = vcpu->arch.exception.nr;
 394         if (prev_nr == DF_VECTOR) {
 395                 /* triple fault -> shutdown */
 396                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 397                 return;
 398         }
 399         class1 = exception_class(prev_nr);
 400         class2 = exception_class(nr);
 401         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 402                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 403                 /* generate double fault per SDM Table 5-5 */
 404                 vcpu->arch.exception.pending = true;
 405                 vcpu->arch.exception.has_error_code = true;
 406                 vcpu->arch.exception.nr = DF_VECTOR;
 407                 vcpu->arch.exception.error_code = 0;
 408         } else
 409                 /* replace previous exception with a new one in a hope
 410                    that instruction re-execution will regenerate lost
 411                    exception */
 412                 goto queue;
 413 }
 414
 415 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 416 {
 417         kvm_multiple_exception(vcpu, nr, false, 0, false);
 418 }
 419 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 420
 421 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 422 {
 423         kvm_multiple_exception(vcpu, nr, false, 0, true);
 424 }
 425 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 426
 427 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 428 {
 429         if (err)
 430                 kvm_inject_gp(vcpu, 0);
 431         else
 432                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 433 }
 434 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 435
 436 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 437 {
 438         ++vcpu->stat.pf_guest;
 439         vcpu->arch.cr2 = fault->address;
 440         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 441 }
 442 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 443
 444 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 445 {
 446         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 447                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 448         else
 449                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 450
 451         return fault->nested_page_fault;
 452 }
 453
 454 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 455 {
 456         atomic_inc(&vcpu->arch.nmi_queued);
 457         kvm_make_request(KVM_REQ_NMI, vcpu);
 458 }
 459 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 460
 461 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 462 {
 463         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 464 }
 465 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 466
 467 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 468 {
 469         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 470 }
 471 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 472
 473 /*
 474  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 475  * a #GP and return false.
 476  */
 477 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 478 {
 479         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 480                 return true;
 481         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 482         return false;
 483 }
 484 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 485
 486 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 487 {
 488         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 489                 return true;
 490
 491         kvm_queue_exception(vcpu, UD_VECTOR);
 492         return false;
 493 }
 494 EXPORT_SYMBOL_GPL(kvm_require_dr);
 495
 496 /*
 497  * This function will be used to read from the physical memory of the currently
 498  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 499  * can read from guest physical or from the guest's guest physical memory.
 500  */
 501 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 502                             gfn_t ngfn, void *data, int offset, int len,
 503                             u32 access)
 504 {
 505         struct x86_exception exception;
 506         gfn_t real_gfn;
 507         gpa_t ngpa;
 508
 509         ngpa     = gfn_to_gpa(ngfn);
 510         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 511         if (real_gfn == UNMAPPED_GVA)
 512                 return -EFAULT;
 513
 514         real_gfn = gpa_to_gfn(real_gfn);
 515
 516         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 517 }
 518 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 519
 520 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 521                                void *data, int offset, int len, u32 access)
 522 {
 523         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 524                                        data, offset, len, access);
 525 }
 526
 527 /*
 528  * Load the pae pdptrs.  Return true is they are all valid.
 529  */
 530 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 531 {
 532         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 533         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 534         int i;
 535         int ret;
 536         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 537
 538         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 539                                       offset * sizeof(u64), sizeof(pdpte),
 540                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 541         if (ret < 0) {
 542                 ret = 0;
 543                 goto out;
 544         }
 545         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 546                 if (is_present_gpte(pdpte[i]) &&
 547                     (pdpte[i] &
 548                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 549                         ret = 0;
 550                         goto out;
 551                 }
 552         }
 553         ret = 1;
 554
 555         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 556         __set_bit(VCPU_EXREG_PDPTR,
 557                   (unsigned long *)&vcpu->arch.regs_avail);
 558         __set_bit(VCPU_EXREG_PDPTR,
 559                   (unsigned long *)&vcpu->arch.regs_dirty);
 560 out:
 561
 562         return ret;
 563 }
 564 EXPORT_SYMBOL_GPL(load_pdptrs);
 565
 566 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 567 {
 568         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 569         bool changed = true;
 570         int offset;
 571         gfn_t gfn;
 572         int r;
 573
 574         if (is_long_mode(vcpu) || !is_pae(vcpu))
 575                 return false;
 576
 577         if (!test_bit(VCPU_EXREG_PDPTR,
 578                       (unsigned long *)&vcpu->arch.regs_avail))
 579                 return true;
 580
 581         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 582         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 583         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 584                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 585         if (r < 0)
 586                 goto out;
 587         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 588 out:
 589
 590         return changed;
 591 }
 592
 593 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 594 {
 595         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 596         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 597
 598         cr0 |= X86_CR0_ET;
 599
 600 #ifdef CONFIG_X86_64
 601         if (cr0 & 0xffffffff00000000UL)
 602                 return 1;
 603 #endif
 604
 605         cr0 &= ~CR0_RESERVED_BITS;
 606
 607         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 608                 return 1;
 609
 610         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 611                 return 1;
 612
 613         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 614 #ifdef CONFIG_X86_64
 615                 if ((vcpu->arch.efer & EFER_LME)) {
 616                         int cs_db, cs_l;
 617
 618                         if (!is_pae(vcpu))
 619                                 return 1;
 620                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 621                         if (cs_l)
 622                                 return 1;
 623                 } else
 624 #endif
 625                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 626                                                  kvm_read_cr3(vcpu)))
 627                         return 1;
 628         }
 629
 630         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 631                 return 1;
 632
 633         kvm_x86_ops->set_cr0(vcpu, cr0);
 634
 635         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 636                 kvm_clear_async_pf_completion_queue(vcpu);
 637                 kvm_async_pf_hash_reset(vcpu);
 638         }
 639
 640         if ((cr0 ^ old_cr0) & update_bits)
 641                 kvm_mmu_reset_context(vcpu);
 642
 643         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 644             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 645             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 646                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 647
 648         return 0;
 649 }
 650 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 651
 652 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 653 {
 654         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 655 }
 656 EXPORT_SYMBOL_GPL(kvm_lmsw);
 657
 658 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 659 {
 660         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 661                         !vcpu->guest_xcr0_loaded) {
 662                 /* kvm_set_xcr() also depends on this */
 663                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 664                 vcpu->guest_xcr0_loaded = 1;
 665         }
 666 }
 667
 668 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 669 {
 670         if (vcpu->guest_xcr0_loaded) {
 671                 if (vcpu->arch.xcr0 != host_xcr0)
 672                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 673                 vcpu->guest_xcr0_loaded = 0;
 674         }
 675 }
 676
 677 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 678 {
 679         u64 xcr0 = xcr;
 680         u64 old_xcr0 = vcpu->arch.xcr0;
 681         u64 valid_bits;
 682
 683         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 684         if (index != XCR_XFEATURE_ENABLED_MASK)
 685                 return 1;
 686         if (!(xcr0 & XFEATURE_MASK_FP))
 687                 return 1;
 688         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 689                 return 1;
 690
 691         /*
 692          * Do not allow the guest to set bits that we do not support
 693          * saving.  However, xcr0 bit 0 is always set, even if the
 694          * emulated CPU does not support XSAVE (see fx_init).
 695          */
 696         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 697         if (xcr0 & ~valid_bits)
 698                 return 1;
 699
 700         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 701             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 702                 return 1;
 703
 704         if (xcr0 & XFEATURE_MASK_AVX512) {
 705                 if (!(xcr0 & XFEATURE_MASK_YMM))
 706                         return 1;
 707                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 708                         return 1;
 709         }
 710         vcpu->arch.xcr0 = xcr0;
 711
 712         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 713                 kvm_update_cpuid(vcpu);
 714         return 0;
 715 }
 716
 717 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 718 {
 719         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 720             __kvm_set_xcr(vcpu, index, xcr)) {
 721                 kvm_inject_gp(vcpu, 0);
 722                 return 1;
 723         }
 724         return 0;
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 727
 728 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 729 {
 730         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 731         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 732                                    X86_CR4_SMEP | X86_CR4_SMAP;
 733
 734         if (cr4 & CR4_RESERVED_BITS)
 735                 return 1;
 736
 737         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 738                 return 1;
 739
 740         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 741                 return 1;
 742
 743         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 744                 return 1;
 745
 746         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 747                 return 1;
 748
 749         if (is_long_mode(vcpu)) {
 750                 if (!(cr4 & X86_CR4_PAE))
 751                         return 1;
 752         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 753                    && ((cr4 ^ old_cr4) & pdptr_bits)
 754                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 755                                    kvm_read_cr3(vcpu)))
 756                 return 1;
 757
 758         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 759                 if (!guest_cpuid_has_pcid(vcpu))
 760                         return 1;
 761
 762                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 763                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 764                         return 1;
 765         }
 766
 767         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 768                 return 1;
 769
 770         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 771             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 772                 kvm_mmu_reset_context(vcpu);
 773
 774         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 775                 kvm_update_cpuid(vcpu);
 776
 777         return 0;
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 780
 781 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 782 {
 783 #ifdef CONFIG_X86_64
 784         cr3 &= ~CR3_PCID_INVD;
 785 #endif
 786
 787         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 788                 kvm_mmu_sync_roots(vcpu);
 789                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 790                 return 0;
 791         }
 792
 793         if (is_long_mode(vcpu)) {
 794                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 795                         return 1;
 796         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 797                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 798                 return 1;
 799
 800         vcpu->arch.cr3 = cr3;
 801         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 802         kvm_mmu_new_cr3(vcpu);
 803         return 0;
 804 }
 805 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 806
 807 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 808 {
 809         if (cr8 & CR8_RESERVED_BITS)
 810                 return 1;
 811         if (lapic_in_kernel(vcpu))
 812                 kvm_lapic_set_tpr(vcpu, cr8);
 813         else
 814                 vcpu->arch.cr8 = cr8;
 815         return 0;
 816 }
 817 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 818
 819 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 820 {
 821         if (lapic_in_kernel(vcpu))
 822                 return kvm_lapic_get_cr8(vcpu);
 823         else
 824                 return vcpu->arch.cr8;
 825 }
 826 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 827
 828 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 829 {
 830         int i;
 831
 832         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 833                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 834                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 835                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 836         }
 837 }
 838
 839 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 840 {
 841         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 842                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 843 }
 844
 845 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 846 {
 847         unsigned long dr7;
 848
 849         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 850                 dr7 = vcpu->arch.guest_debug_dr7;
 851         else
 852                 dr7 = vcpu->arch.dr7;
 853         kvm_x86_ops->set_dr7(vcpu, dr7);
 854         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 855         if (dr7 & DR7_BP_EN_MASK)
 856                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 857 }
 858
 859 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 860 {
 861         u64 fixed = DR6_FIXED_1;
 862
 863         if (!guest_cpuid_has_rtm(vcpu))
 864                 fixed |= DR6_RTM;
 865         return fixed;
 866 }
 867
 868 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 869 {
 870         switch (dr) {
 871         case 0 ... 3:
 872                 vcpu->arch.db[dr] = val;
 873                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 874                         vcpu->arch.eff_db[dr] = val;
 875                 break;
 876         case 4:
 877                 /* fall through */
 878         case 6:
 879                 if (val & 0xffffffff00000000ULL)
 880                         return -1; /* #GP */
 881                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 882                 kvm_update_dr6(vcpu);
 883                 break;
 884         case 5:
 885                 /* fall through */
 886         default: /* 7 */
 887                 if (val & 0xffffffff00000000ULL)
 888                         return -1; /* #GP */
 889                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 890                 kvm_update_dr7(vcpu);
 891                 break;
 892         }
 893
 894         return 0;
 895 }
 896
 897 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 898 {
 899         if (__kvm_set_dr(vcpu, dr, val)) {
 900                 kvm_inject_gp(vcpu, 0);
 901                 return 1;
 902         }
 903         return 0;
 904 }
 905 EXPORT_SYMBOL_GPL(kvm_set_dr);
 906
 907 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 908 {
 909         switch (dr) {
 910         case 0 ... 3:
 911                 *val = vcpu->arch.db[dr];
 912                 break;
 913         case 4:
 914                 /* fall through */
 915         case 6:
 916                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 917                         *val = vcpu->arch.dr6;
 918                 else
 919                         *val = kvm_x86_ops->get_dr6(vcpu);
 920                 break;
 921         case 5:
 922                 /* fall through */
 923         default: /* 7 */
 924                 *val = vcpu->arch.dr7;
 925                 break;
 926         }
 927         return 0;
 928 }
 929 EXPORT_SYMBOL_GPL(kvm_get_dr);
 930
 931 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 932 {
 933         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 934         u64 data;
 935         int err;
 936
 937         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 938         if (err)
 939                 return err;
 940         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 941         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 942         return err;
 943 }
 944 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 945
 946 /*
 947  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 948  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 949  *
 950  * This list is modified at module load time to reflect the
 951  * capabilities of the host cpu. This capabilities test skips MSRs that are
 952  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 953  * may depend on host virtualization features rather than host cpu features.
 954  */
 955
 956 static u32 msrs_to_save[] = {
 957         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 958         MSR_STAR,
 959 #ifdef CONFIG_X86_64
 960         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 961 #endif
 962         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 963         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 964 };
 965
 966 static unsigned num_msrs_to_save;
 967
 968 static u32 emulated_msrs[] = {
 969         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 970         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 971         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 972         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 973         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 974         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 975         HV_X64_MSR_RESET,
 976         HV_X64_MSR_VP_INDEX,
 977         HV_X64_MSR_VP_RUNTIME,
 978         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 979         MSR_KVM_PV_EOI_EN,
 980
 981         MSR_IA32_TSC_ADJUST,
 982         MSR_IA32_TSCDEADLINE,
 983         MSR_IA32_MISC_ENABLE,
 984         MSR_IA32_MCG_STATUS,
 985         MSR_IA32_MCG_CTL,
 986         MSR_IA32_SMBASE,
 987 };
 988
 989 static unsigned num_emulated_msrs;
 990
 991 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 992 {
 993         if (efer & efer_reserved_bits)
 994                 return false;
 995
 996         if (efer & EFER_FFXSR) {
 997                 struct kvm_cpuid_entry2 *feat;
 998
 999                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1000                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1001                         return false;
1002         }
1003
1004         if (efer & EFER_SVME) {
1005                 struct kvm_cpuid_entry2 *feat;
1006
1007                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1008                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1009                         return false;
1010         }
1011
1012         return true;
1013 }
1014 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1015
1016 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1017 {
1018         u64 old_efer = vcpu->arch.efer;
1019
1020         if (!kvm_valid_efer(vcpu, efer))
1021                 return 1;
1022
1023         if (is_paging(vcpu)
1024             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1025                 return 1;
1026
1027         efer &= ~EFER_LMA;
1028         efer |= vcpu->arch.efer & EFER_LMA;
1029
1030         kvm_x86_ops->set_efer(vcpu, efer);
1031
1032         /* Update reserved bits */
1033         if ((efer ^ old_efer) & EFER_NX)
1034                 kvm_mmu_reset_context(vcpu);
1035
1036         return 0;
1037 }
1038
1039 void kvm_enable_efer_bits(u64 mask)
1040 {
1041        efer_reserved_bits &= ~mask;
1042 }
1043 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1044
1045 /*
1046  * Writes msr value into into the appropriate "register".
1047  * Returns 0 on success, non-0 otherwise.
1048  * Assumes vcpu_load() was already called.
1049  */
1050 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1051 {
1052         switch (msr->index) {
1053         case MSR_FS_BASE:
1054         case MSR_GS_BASE:
1055         case MSR_KERNEL_GS_BASE:
1056         case MSR_CSTAR:
1057         case MSR_LSTAR:
1058                 if (is_noncanonical_address(msr->data))
1059                         return 1;
1060                 break;
1061         case MSR_IA32_SYSENTER_EIP:
1062         case MSR_IA32_SYSENTER_ESP:
1063                 /*
1064                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1065                  * non-canonical address is written on Intel but not on
1066                  * AMD (which ignores the top 32-bits, because it does
1067                  * not implement 64-bit SYSENTER).
1068                  *
1069                  * 64-bit code should hence be able to write a non-canonical
1070                  * value on AMD.  Making the address canonical ensures that
1071                  * vmentry does not fail on Intel after writing a non-canonical
1072                  * value, and that something deterministic happens if the guest
1073                  * invokes 64-bit SYSENTER.
1074                  */
1075                 msr->data = get_canonical(msr->data);
1076         }
1077         return kvm_x86_ops->set_msr(vcpu, msr);
1078 }
1079 EXPORT_SYMBOL_GPL(kvm_set_msr);
1080
1081 /*
1082  * Adapt set_msr() to msr_io()'s calling convention
1083  */
1084 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1085 {
1086         struct msr_data msr;
1087         int r;
1088
1089         msr.index = index;
1090         msr.host_initiated = true;
1091         r = kvm_get_msr(vcpu, &msr);
1092         if (r)
1093                 return r;
1094
1095         *data = msr.data;
1096         return 0;
1097 }
1098
1099 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1100 {
1101         struct msr_data msr;
1102
1103         msr.data = *data;
1104         msr.index = index;
1105         msr.host_initiated = true;
1106         return kvm_set_msr(vcpu, &msr);
1107 }
1108
1109 #ifdef CONFIG_X86_64
1110 struct pvclock_gtod_data {
1111         seqcount_t      seq;
1112
1113         struct { /* extract of a clocksource struct */
1114                 int vclock_mode;
1115                 cycle_t cycle_last;
1116                 cycle_t mask;
1117                 u32     mult;
1118                 u32     shift;
1119         } clock;
1120
1121         u64             boot_ns;
1122         u64             nsec_base;
1123 };
1124
1125 static struct pvclock_gtod_data pvclock_gtod_data;
1126
1127 static void update_pvclock_gtod(struct timekeeper *tk)
1128 {
1129         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1130         u64 boot_ns;
1131
1132         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1133
1134         write_seqcount_begin(&vdata->seq);
1135
1136         /* copy pvclock gtod data */
1137         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1138         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1139         vdata->clock.mask               = tk->tkr_mono.mask;
1140         vdata->clock.mult               = tk->tkr_mono.mult;
1141         vdata->clock.shift              = tk->tkr_mono.shift;
1142
1143         vdata->boot_ns                  = boot_ns;
1144         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1145
1146         write_seqcount_end(&vdata->seq);
1147 }
1148 #endif
1149
1150 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1151 {
1152         /*
1153          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1154          * vcpu_enter_guest.  This function is only called from
1155          * the physical CPU that is running vcpu.
1156          */
1157         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1158 }
1159
1160 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1161 {
1162         int version;
1163         int r;
1164         struct pvclock_wall_clock wc;
1165         struct timespec boot;
1166
1167         if (!wall_clock)
1168                 return;
1169
1170         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1171         if (r)
1172                 return;
1173
1174         if (version & 1)
1175                 ++version;  /* first time write, random junk */
1176
1177         ++version;
1178
1179         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1180
1181         /*
1182          * The guest calculates current wall clock time by adding
1183          * system time (updated by kvm_guest_time_update below) to the
1184          * wall clock specified here.  guest system time equals host
1185          * system time for us, thus we must fill in host boot time here.
1186          */
1187         getboottime(&boot);
1188
1189         if (kvm->arch.kvmclock_offset) {
1190                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1191                 boot = timespec_sub(boot, ts);
1192         }
1193         wc.sec = boot.tv_sec;
1194         wc.nsec = boot.tv_nsec;
1195         wc.version = version;
1196
1197         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1198
1199         version++;
1200         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1201 }
1202
1203 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1204 {
1205         uint32_t quotient, remainder;
1206
1207         /* Don't try to replace with do_div(), this one calculates
1208          * "(dividend << 32) / divisor" */
1209         __asm__ ( "divl %4"
1210                   : "=a" (quotient), "=d" (remainder)
1211                   : "0" (0), "1" (dividend), "r" (divisor) );
1212         return quotient;
1213 }
1214
1215 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1216                                s8 *pshift, u32 *pmultiplier)
1217 {
1218         uint64_t scaled64;
1219         int32_t  shift = 0;
1220         uint64_t tps64;
1221         uint32_t tps32;
1222
1223         tps64 = base_khz * 1000LL;
1224         scaled64 = scaled_khz * 1000LL;
1225         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1226                 tps64 >>= 1;
1227                 shift--;
1228         }
1229
1230         tps32 = (uint32_t)tps64;
1231         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1232                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1233                         scaled64 >>= 1;
1234                 else
1235                         tps32 <<= 1;
1236                 shift++;
1237         }
1238
1239         *pshift = shift;
1240         *pmultiplier = div_frac(scaled64, tps32);
1241
1242         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1243                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1244 }
1245
1246 #ifdef CONFIG_X86_64
1247 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1248 #endif
1249
1250 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1251 static unsigned long max_tsc_khz;
1252
1253 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1254 {
1255         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1256                                    vcpu->arch.virtual_tsc_shift);
1257 }
1258
1259 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1260 {
1261         u64 v = (u64)khz * (1000000 + ppm);
1262         do_div(v, 1000000);
1263         return v;
1264 }
1265
1266 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1267 {
1268         u64 ratio;
1269
1270         /* Guest TSC same frequency as host TSC? */
1271         if (!scale) {
1272                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1273                 return 0;
1274         }
1275
1276         /* TSC scaling supported? */
1277         if (!kvm_has_tsc_control) {
1278                 if (user_tsc_khz > tsc_khz) {
1279                         vcpu->arch.tsc_catchup = 1;
1280                         vcpu->arch.tsc_always_catchup = 1;
1281                         return 0;
1282                 } else {
1283                         WARN(1, "user requested TSC rate below hardware speed\n");
1284                         return -1;
1285                 }
1286         }
1287
1288         /* TSC scaling required  - calculate ratio */
1289         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1290                                 user_tsc_khz, tsc_khz);
1291
1292         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1293                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1294                           user_tsc_khz);
1295                 return -1;
1296         }
1297
1298         vcpu->arch.tsc_scaling_ratio = ratio;
1299         return 0;
1300 }
1301
1302 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1303 {
1304         u32 thresh_lo, thresh_hi;
1305         int use_scaling = 0;
1306
1307         /* tsc_khz can be zero if TSC calibration fails */
1308         if (this_tsc_khz == 0) {
1309                 /* set tsc_scaling_ratio to a safe value */
1310                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1311                 return -1;
1312         }
1313
1314         /* Compute a scale to convert nanoseconds in TSC cycles */
1315         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1316                            &vcpu->arch.virtual_tsc_shift,
1317                            &vcpu->arch.virtual_tsc_mult);
1318         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1319
1320         /*
1321          * Compute the variation in TSC rate which is acceptable
1322          * within the range of tolerance and decide if the
1323          * rate being applied is within that bounds of the hardware
1324          * rate.  If so, no scaling or compensation need be done.
1325          */
1326         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1327         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1328         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1329                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1330                 use_scaling = 1;
1331         }
1332         return set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1333 }
1334
1335 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1336 {
1337         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1338                                       vcpu->arch.virtual_tsc_mult,
1339                                       vcpu->arch.virtual_tsc_shift);
1340         tsc += vcpu->arch.this_tsc_write;
1341         return tsc;
1342 }
1343
1344 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1345 {
1346 #ifdef CONFIG_X86_64
1347         bool vcpus_matched;
1348         struct kvm_arch *ka = &vcpu->kvm->arch;
1349         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1350
1351         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1352                          atomic_read(&vcpu->kvm->online_vcpus));
1353
1354         /*
1355          * Once the masterclock is enabled, always perform request in
1356          * order to update it.
1357          *
1358          * In order to enable masterclock, the host clocksource must be TSC
1359          * and the vcpus need to have matched TSCs.  When that happens,
1360          * perform request to enable masterclock.
1361          */
1362         if (ka->use_master_clock ||
1363             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1364                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1365
1366         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1367                             atomic_read(&vcpu->kvm->online_vcpus),
1368                             ka->use_master_clock, gtod->clock.vclock_mode);
1369 #endif
1370 }
1371
1372 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1373 {
1374         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1375         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1376 }
1377
1378 /*
1379  * Multiply tsc by a fixed point number represented by ratio.
1380  *
1381  * The most significant 64-N bits (mult) of ratio represent the
1382  * integral part of the fixed point number; the remaining N bits
1383  * (frac) represent the fractional part, ie. ratio represents a fixed
1384  * point number (mult + frac * 2^(-N)).
1385  *
1386  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1387  */
1388 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1389 {
1390         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1391 }
1392
1393 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1394 {
1395         u64 _tsc = tsc;
1396         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1397
1398         if (ratio != kvm_default_tsc_scaling_ratio)
1399                 _tsc = __scale_tsc(ratio, tsc);
1400
1401         return _tsc;
1402 }
1403 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1404
1405 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1406 {
1407         u64 tsc;
1408
1409         tsc = kvm_scale_tsc(vcpu, rdtsc());
1410
1411         return target_tsc - tsc;
1412 }
1413
1414 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1415 {
1416         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1417 }
1418 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1419
1420 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1421 {
1422         struct kvm *kvm = vcpu->kvm;
1423         u64 offset, ns, elapsed;
1424         unsigned long flags;
1425         s64 usdiff;
1426         bool matched;
1427         bool already_matched;
1428         u64 data = msr->data;
1429
1430         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1431         offset = kvm_compute_tsc_offset(vcpu, data);
1432         ns = get_kernel_ns();
1433         elapsed = ns - kvm->arch.last_tsc_nsec;
1434
1435         if (vcpu->arch.virtual_tsc_khz) {
1436                 int faulted = 0;
1437
1438                 /* n.b - signed multiplication and division required */
1439                 usdiff = data - kvm->arch.last_tsc_write;
1440 #ifdef CONFIG_X86_64
1441                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1442 #else
1443                 /* do_div() only does unsigned */
1444                 asm("1: idivl %[divisor]\n"
1445                     "2: xor %%edx, %%edx\n"
1446                     "   movl $0, %[faulted]\n"
1447                     "3:\n"
1448                     ".section .fixup,\"ax\"\n"
1449                     "4: movl $1, %[faulted]\n"
1450                     "   jmp  3b\n"
1451                     ".previous\n"
1452
1453                 _ASM_EXTABLE(1b, 4b)
1454
1455                 : "=A"(usdiff), [faulted] "=r" (faulted)
1456                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1457
1458 #endif
1459                 do_div(elapsed, 1000);
1460                 usdiff -= elapsed;
1461                 if (usdiff < 0)
1462                         usdiff = -usdiff;
1463
1464                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1465                 if (faulted)
1466                         usdiff = USEC_PER_SEC;
1467         } else
1468                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1469
1470         /*
1471          * Special case: TSC write with a small delta (1 second) of virtual
1472          * cycle time against real time is interpreted as an attempt to
1473          * synchronize the CPU.
1474          *
1475          * For a reliable TSC, we can match TSC offsets, and for an unstable
1476          * TSC, we add elapsed time in this computation.  We could let the
1477          * compensation code attempt to catch up if we fall behind, but
1478          * it's better to try to match offsets from the beginning.
1479          */
1480         if (usdiff < USEC_PER_SEC &&
1481             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1482                 if (!check_tsc_unstable()) {
1483                         offset = kvm->arch.cur_tsc_offset;
1484                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1485                 } else {
1486                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1487                         data += delta;
1488                         offset = kvm_compute_tsc_offset(vcpu, data);
1489                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1490                 }
1491                 matched = true;
1492                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1493         } else {
1494                 /*
1495                  * We split periods of matched TSC writes into generations.
1496                  * For each generation, we track the original measured
1497                  * nanosecond time, offset, and write, so if TSCs are in
1498                  * sync, we can match exact offset, and if not, we can match
1499                  * exact software computation in compute_guest_tsc()
1500                  *
1501                  * These values are tracked in kvm->arch.cur_xxx variables.
1502                  */
1503                 kvm->arch.cur_tsc_generation++;
1504                 kvm->arch.cur_tsc_nsec = ns;
1505                 kvm->arch.cur_tsc_write = data;
1506                 kvm->arch.cur_tsc_offset = offset;
1507                 matched = false;
1508                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1509                          kvm->arch.cur_tsc_generation, data);
1510         }
1511
1512         /*
1513          * We also track th most recent recorded KHZ, write and time to
1514          * allow the matching interval to be extended at each write.
1515          */
1516         kvm->arch.last_tsc_nsec = ns;
1517         kvm->arch.last_tsc_write = data;
1518         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1519
1520         vcpu->arch.last_guest_tsc = data;
1521
1522         /* Keep track of which generation this VCPU has synchronized to */
1523         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1524         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1525         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1526
1527         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1528                 update_ia32_tsc_adjust_msr(vcpu, offset);
1529         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1530         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1531
1532         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1533         if (!matched) {
1534                 kvm->arch.nr_vcpus_matched_tsc = 0;
1535         } else if (!already_matched) {
1536                 kvm->arch.nr_vcpus_matched_tsc++;
1537         }
1538
1539         kvm_track_tsc_matching(vcpu);
1540         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1541 }
1542
1543 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1544
1545 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1546                                            s64 adjustment)
1547 {
1548         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1549 }
1550
1551 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1552 {
1553         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1554                 WARN_ON(adjustment < 0);
1555         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1556         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1557 }
1558
1559 #ifdef CONFIG_X86_64
1560
1561 static cycle_t read_tsc(void)
1562 {
1563         cycle_t ret = (cycle_t)rdtsc_ordered();
1564         u64 last = pvclock_gtod_data.clock.cycle_last;
1565
1566         if (likely(ret >= last))
1567                 return ret;
1568
1569         /*
1570          * GCC likes to generate cmov here, but this branch is extremely
1571          * predictable (it's just a funciton of time and the likely is
1572          * very likely) and there's a data dependence, so force GCC
1573          * to generate a branch instead.  I don't barrier() because
1574          * we don't actually need a barrier, and if this function
1575          * ever gets inlined it will generate worse code.
1576          */
1577         asm volatile ("");
1578         return last;
1579 }
1580
1581 static inline u64 vgettsc(cycle_t *cycle_now)
1582 {
1583         long v;
1584         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1585
1586         *cycle_now = read_tsc();
1587
1588         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1589         return v * gtod->clock.mult;
1590 }
1591
1592 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1593 {
1594         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1595         unsigned long seq;
1596         int mode;
1597         u64 ns;
1598
1599         do {
1600                 seq = read_seqcount_begin(&gtod->seq);
1601                 mode = gtod->clock.vclock_mode;
1602                 ns = gtod->nsec_base;
1603                 ns += vgettsc(cycle_now);
1604                 ns >>= gtod->clock.shift;
1605                 ns += gtod->boot_ns;
1606         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1607         *t = ns;
1608
1609         return mode;
1610 }
1611
1612 /* returns true if host is using tsc clocksource */
1613 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1614 {
1615         /* checked again under seqlock below */
1616         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1617                 return false;
1618
1619         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1620 }
1621 #endif
1622
1623 /*
1624  *
1625  * Assuming a stable TSC across physical CPUS, and a stable TSC
1626  * across virtual CPUs, the following condition is possible.
1627  * Each numbered line represents an event visible to both
1628  * CPUs at the next numbered event.
1629  *
1630  * "timespecX" represents host monotonic time. "tscX" represents
1631  * RDTSC value.
1632  *
1633  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1634  *
1635  * 1.  read timespec0,tsc0
1636  * 2.                                   | timespec1 = timespec0 + N
1637  *                                      | tsc1 = tsc0 + M
1638  * 3. transition to guest               | transition to guest
1639  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1640  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1641  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1642  *
1643  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1644  *
1645  *      - ret0 < ret1
1646  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1647  *              ...
1648  *      - 0 < N - M => M < N
1649  *
1650  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1651  * always the case (the difference between two distinct xtime instances
1652  * might be smaller then the difference between corresponding TSC reads,
1653  * when updating guest vcpus pvclock areas).
1654  *
1655  * To avoid that problem, do not allow visibility of distinct
1656  * system_timestamp/tsc_timestamp values simultaneously: use a master
1657  * copy of host monotonic time values. Update that master copy
1658  * in lockstep.
1659  *
1660  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1661  *
1662  */
1663
1664 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1665 {
1666 #ifdef CONFIG_X86_64
1667         struct kvm_arch *ka = &kvm->arch;
1668         int vclock_mode;
1669         bool host_tsc_clocksource, vcpus_matched;
1670
1671         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1672                         atomic_read(&kvm->online_vcpus));
1673
1674         /*
1675          * If the host uses TSC clock, then passthrough TSC as stable
1676          * to the guest.
1677          */
1678         host_tsc_clocksource = kvm_get_time_and_clockread(
1679                                         &ka->master_kernel_ns,
1680                                         &ka->master_cycle_now);
1681
1682         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1683                                 && !backwards_tsc_observed
1684                                 && !ka->boot_vcpu_runs_old_kvmclock;
1685
1686         if (ka->use_master_clock)
1687                 atomic_set(&kvm_guest_has_master_clock, 1);
1688
1689         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1690         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1691                                         vcpus_matched);
1692 #endif
1693 }
1694
1695 static void kvm_gen_update_masterclock(struct kvm *kvm)
1696 {
1697 #ifdef CONFIG_X86_64
1698         int i;
1699         struct kvm_vcpu *vcpu;
1700         struct kvm_arch *ka = &kvm->arch;
1701
1702         spin_lock(&ka->pvclock_gtod_sync_lock);
1703         kvm_make_mclock_inprogress_request(kvm);
1704         /* no guest entries from this point */
1705         pvclock_update_vm_gtod_copy(kvm);
1706
1707         kvm_for_each_vcpu(i, vcpu, kvm)
1708                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1709
1710         /* guest entries allowed */
1711         kvm_for_each_vcpu(i, vcpu, kvm)
1712                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1713
1714         spin_unlock(&ka->pvclock_gtod_sync_lock);
1715 #endif
1716 }
1717
1718 static int kvm_guest_time_update(struct kvm_vcpu *v)
1719 {
1720         unsigned long flags, this_tsc_khz, tgt_tsc_khz;
1721         struct kvm_vcpu_arch *vcpu = &v->arch;
1722         struct kvm_arch *ka = &v->kvm->arch;
1723         s64 kernel_ns;
1724         u64 tsc_timestamp, host_tsc;
1725         struct pvclock_vcpu_time_info guest_hv_clock;
1726         u8 pvclock_flags;
1727         bool use_master_clock;
1728
1729         kernel_ns = 0;
1730         host_tsc = 0;
1731
1732         /*
1733          * If the host uses TSC clock, then passthrough TSC as stable
1734          * to the guest.
1735          */
1736         spin_lock(&ka->pvclock_gtod_sync_lock);
1737         use_master_clock = ka->use_master_clock;
1738         if (use_master_clock) {
1739                 host_tsc = ka->master_cycle_now;
1740                 kernel_ns = ka->master_kernel_ns;
1741         }
1742         spin_unlock(&ka->pvclock_gtod_sync_lock);
1743
1744         /* Keep irq disabled to prevent changes to the clock */
1745         local_irq_save(flags);
1746         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1747         if (unlikely(this_tsc_khz == 0)) {
1748                 local_irq_restore(flags);
1749                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1750                 return 1;
1751         }
1752         if (!use_master_clock) {
1753                 host_tsc = rdtsc();
1754                 kernel_ns = get_kernel_ns();
1755         }
1756
1757         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1758
1759         /*
1760          * We may have to catch up the TSC to match elapsed wall clock
1761          * time for two reasons, even if kvmclock is used.
1762          *   1) CPU could have been running below the maximum TSC rate
1763          *   2) Broken TSC compensation resets the base at each VCPU
1764          *      entry to avoid unknown leaps of TSC even when running
1765          *      again on the same CPU.  This may cause apparent elapsed
1766          *      time to disappear, and the guest to stand still or run
1767          *      very slowly.
1768          */
1769         if (vcpu->tsc_catchup) {
1770                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1771                 if (tsc > tsc_timestamp) {
1772                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1773                         tsc_timestamp = tsc;
1774                 }
1775         }
1776
1777         local_irq_restore(flags);
1778
1779         if (!vcpu->pv_time_enabled)
1780                 return 0;
1781
1782         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1783                 tgt_tsc_khz = kvm_has_tsc_control ?
1784                         vcpu->virtual_tsc_khz : this_tsc_khz;
1785                 kvm_get_time_scale(NSEC_PER_SEC / 1000, tgt_tsc_khz,
1786                                    &vcpu->hv_clock.tsc_shift,
1787                                    &vcpu->hv_clock.tsc_to_system_mul);
1788                 vcpu->hw_tsc_khz = this_tsc_khz;
1789         }
1790
1791         /* With all the info we got, fill in the values */
1792         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1793         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1794         vcpu->last_guest_tsc = tsc_timestamp;
1795
1796         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1797                 &guest_hv_clock, sizeof(guest_hv_clock))))
1798                 return 0;
1799
1800         /* This VCPU is paused, but it's legal for a guest to read another
1801          * VCPU's kvmclock, so we really have to follow the specification where
1802          * it says that version is odd if data is being modified, and even after
1803          * it is consistent.
1804          *
1805          * Version field updates must be kept separate.  This is because
1806          * kvm_write_guest_cached might use a "rep movs" instruction, and
1807          * writes within a string instruction are weakly ordered.  So there
1808          * are three writes overall.
1809          *
1810          * As a small optimization, only write the version field in the first
1811          * and third write.  The vcpu->pv_time cache is still valid, because the
1812          * version field is the first in the struct.
1813          */
1814         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1815
1816         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1817         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1818                                 &vcpu->hv_clock,
1819                                 sizeof(vcpu->hv_clock.version));
1820
1821         smp_wmb();
1822
1823         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1824         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1825
1826         if (vcpu->pvclock_set_guest_stopped_request) {
1827                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1828                 vcpu->pvclock_set_guest_stopped_request = false;
1829         }
1830
1831         /* If the host uses TSC clocksource, then it is stable */
1832         if (use_master_clock)
1833                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1834
1835         vcpu->hv_clock.flags = pvclock_flags;
1836
1837         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1838
1839         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1840                                 &vcpu->hv_clock,
1841                                 sizeof(vcpu->hv_clock));
1842
1843         smp_wmb();
1844
1845         vcpu->hv_clock.version++;
1846         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1847                                 &vcpu->hv_clock,
1848                                 sizeof(vcpu->hv_clock.version));
1849         return 0;
1850 }
1851
1852 /*
1853  * kvmclock updates which are isolated to a given vcpu, such as
1854  * vcpu->cpu migration, should not allow system_timestamp from
1855  * the rest of the vcpus to remain static. Otherwise ntp frequency
1856  * correction applies to one vcpu's system_timestamp but not
1857  * the others.
1858  *
1859  * So in those cases, request a kvmclock update for all vcpus.
1860  * We need to rate-limit these requests though, as they can
1861  * considerably slow guests that have a large number of vcpus.
1862  * The time for a remote vcpu to update its kvmclock is bound
1863  * by the delay we use to rate-limit the updates.
1864  */
1865
1866 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1867
1868 static void kvmclock_update_fn(struct work_struct *work)
1869 {
1870         int i;
1871         struct delayed_work *dwork = to_delayed_work(work);
1872         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1873                                            kvmclock_update_work);
1874         struct kvm *kvm = container_of(ka, struct kvm, arch);
1875         struct kvm_vcpu *vcpu;
1876
1877         kvm_for_each_vcpu(i, vcpu, kvm) {
1878                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1879                 kvm_vcpu_kick(vcpu);
1880         }
1881 }
1882
1883 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1884 {
1885         struct kvm *kvm = v->kvm;
1886
1887         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1888         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1889                                         KVMCLOCK_UPDATE_DELAY);
1890 }
1891
1892 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1893
1894 static void kvmclock_sync_fn(struct work_struct *work)
1895 {
1896         struct delayed_work *dwork = to_delayed_work(work);
1897         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1898                                            kvmclock_sync_work);
1899         struct kvm *kvm = container_of(ka, struct kvm, arch);
1900
1901         if (!kvmclock_periodic_sync)
1902                 return;
1903
1904         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1905         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1906                                         KVMCLOCK_SYNC_PERIOD);
1907 }
1908
1909 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1910 {
1911         u64 mcg_cap = vcpu->arch.mcg_cap;
1912         unsigned bank_num = mcg_cap & 0xff;
1913
1914         switch (msr) {
1915         case MSR_IA32_MCG_STATUS:
1916                 vcpu->arch.mcg_status = data;
1917                 break;
1918         case MSR_IA32_MCG_CTL:
1919                 if (!(mcg_cap & MCG_CTL_P))
1920                         return 1;
1921                 if (data != 0 && data != ~(u64)0)
1922                         return -1;
1923                 vcpu->arch.mcg_ctl = data;
1924                 break;
1925         default:
1926                 if (msr >= MSR_IA32_MC0_CTL &&
1927                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1928                         u32 offset = msr - MSR_IA32_MC0_CTL;
1929                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1930                          * some Linux kernels though clear bit 10 in bank 4 to
1931                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1932                          * this to avoid an uncatched #GP in the guest
1933                          */
1934                         if ((offset & 0x3) == 0 &&
1935                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1936                                 return -1;
1937                         vcpu->arch.mce_banks[offset] = data;
1938                         break;
1939                 }
1940                 return 1;
1941         }
1942         return 0;
1943 }
1944
1945 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1946 {
1947         struct kvm *kvm = vcpu->kvm;
1948         int lm = is_long_mode(vcpu);
1949         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1950                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1951         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1952                 : kvm->arch.xen_hvm_config.blob_size_32;
1953         u32 page_num = data & ~PAGE_MASK;
1954         u64 page_addr = data & PAGE_MASK;
1955         u8 *page;
1956         int r;
1957
1958         r = -E2BIG;
1959         if (page_num >= blob_size)
1960                 goto out;
1961         r = -ENOMEM;
1962         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1963         if (IS_ERR(page)) {
1964                 r = PTR_ERR(page);
1965                 goto out;
1966         }
1967         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1968                 goto out_free;
1969         r = 0;
1970 out_free:
1971         kfree(page);
1972 out:
1973         return r;
1974 }
1975
1976 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1977 {
1978         gpa_t gpa = data & ~0x3f;
1979
1980         /* Bits 2:5 are reserved, Should be zero */
1981         if (data & 0x3c)
1982                 return 1;
1983
1984         vcpu->arch.apf.msr_val = data;
1985
1986         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1987                 kvm_clear_async_pf_completion_queue(vcpu);
1988                 kvm_async_pf_hash_reset(vcpu);
1989                 return 0;
1990         }
1991
1992         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1993                                         sizeof(u32)))
1994                 return 1;
1995
1996         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1997         kvm_async_pf_wakeup_all(vcpu);
1998         return 0;
1999 }
2000
2001 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2002 {
2003         vcpu->arch.pv_time_enabled = false;
2004 }
2005
2006 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2007 {
2008         u64 delta;
2009
2010         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2011                 return;
2012
2013         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2014         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2015         vcpu->arch.st.accum_steal = delta;
2016 }
2017
2018 static void record_steal_time(struct kvm_vcpu *vcpu)
2019 {
2020         accumulate_steal_time(vcpu);
2021
2022         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2023                 return;
2024
2025         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2026                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2027                 return;
2028
2029         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2030         vcpu->arch.st.steal.version += 2;
2031         vcpu->arch.st.accum_steal = 0;
2032
2033         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2034                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2035 }
2036
2037 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2038 {
2039         bool pr = false;
2040         u32 msr = msr_info->index;
2041         u64 data = msr_info->data;
2042
2043         switch (msr) {
2044         case MSR_AMD64_NB_CFG:
2045         case MSR_IA32_UCODE_REV:
2046         case MSR_IA32_UCODE_WRITE:
2047         case MSR_VM_HSAVE_PA:
2048         case MSR_AMD64_PATCH_LOADER:
2049         case MSR_AMD64_BU_CFG2:
2050                 break;
2051
2052         case MSR_EFER:
2053                 return set_efer(vcpu, data);
2054         case MSR_K7_HWCR:
2055                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2056                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2057                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2058                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2059                 if (data != 0) {
2060                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2061                                     data);
2062                         return 1;
2063                 }
2064                 break;
2065         case MSR_FAM10H_MMIO_CONF_BASE:
2066                 if (data != 0) {
2067                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2068                                     "0x%llx\n", data);
2069                         return 1;
2070                 }
2071                 break;
2072         case MSR_IA32_DEBUGCTLMSR:
2073                 if (!data) {
2074                         /* We support the non-activated case already */
2075                         break;
2076                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2077                         /* Values other than LBR and BTF are vendor-specific,
2078                            thus reserved and should throw a #GP */
2079                         return 1;
2080                 }
2081                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2082                             __func__, data);
2083                 break;
2084         case 0x200 ... 0x2ff:
2085                 return kvm_mtrr_set_msr(vcpu, msr, data);
2086         case MSR_IA32_APICBASE:
2087                 return kvm_set_apic_base(vcpu, msr_info);
2088         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2089                 return kvm_x2apic_msr_write(vcpu, msr, data);
2090         case MSR_IA32_TSCDEADLINE:
2091                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2092                 break;
2093         case MSR_IA32_TSC_ADJUST:
2094                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2095                         if (!msr_info->host_initiated) {
2096                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2097                                 adjust_tsc_offset_guest(vcpu, adj);
2098                         }
2099                         vcpu->arch.ia32_tsc_adjust_msr = data;
2100                 }
2101                 break;
2102         case MSR_IA32_MISC_ENABLE:
2103                 vcpu->arch.ia32_misc_enable_msr = data;
2104                 break;
2105         case MSR_IA32_SMBASE:
2106                 if (!msr_info->host_initiated)
2107                         return 1;
2108                 vcpu->arch.smbase = data;
2109                 break;
2110         case MSR_KVM_WALL_CLOCK_NEW:
2111         case MSR_KVM_WALL_CLOCK:
2112                 vcpu->kvm->arch.wall_clock = data;
2113                 kvm_write_wall_clock(vcpu->kvm, data);
2114                 break;
2115         case MSR_KVM_SYSTEM_TIME_NEW:
2116         case MSR_KVM_SYSTEM_TIME: {
2117                 u64 gpa_offset;
2118                 struct kvm_arch *ka = &vcpu->kvm->arch;
2119
2120                 kvmclock_reset(vcpu);
2121
2122                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2123                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2124
2125                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2126                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2127                                         &vcpu->requests);
2128
2129                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2130                 }
2131
2132                 vcpu->arch.time = data;
2133                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2134
2135                 /* we verify if the enable bit is set... */
2136                 if (!(data & 1))
2137                         break;
2138
2139                 gpa_offset = data & ~(PAGE_MASK | 1);
2140
2141                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2142                      &vcpu->arch.pv_time, data & ~1ULL,
2143                      sizeof(struct pvclock_vcpu_time_info)))
2144                         vcpu->arch.pv_time_enabled = false;
2145                 else
2146                         vcpu->arch.pv_time_enabled = true;
2147
2148                 break;
2149         }
2150         case MSR_KVM_ASYNC_PF_EN:
2151                 if (kvm_pv_enable_async_pf(vcpu, data))
2152                         return 1;
2153                 break;
2154         case MSR_KVM_STEAL_TIME:
2155
2156                 if (unlikely(!sched_info_on()))
2157                         return 1;
2158
2159                 if (data & KVM_STEAL_RESERVED_MASK)
2160                         return 1;
2161
2162                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2163                                                 data & KVM_STEAL_VALID_BITS,
2164                                                 sizeof(struct kvm_steal_time)))
2165                         return 1;
2166
2167                 vcpu->arch.st.msr_val = data;
2168
2169                 if (!(data & KVM_MSR_ENABLED))
2170                         break;
2171
2172                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2173
2174                 break;
2175         case MSR_KVM_PV_EOI_EN:
2176                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2177                         return 1;
2178                 break;
2179
2180         case MSR_IA32_MCG_CTL:
2181         case MSR_IA32_MCG_STATUS:
2182         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2183                 return set_msr_mce(vcpu, msr, data);
2184
2185         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2186         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2187                 pr = true; /* fall through */
2188         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2189         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2190                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2191                         return kvm_pmu_set_msr(vcpu, msr_info);
2192
2193                 if (pr || data != 0)
2194                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2195                                     "0x%x data 0x%llx\n", msr, data);
2196                 break;
2197         case MSR_K7_CLK_CTL:
2198                 /*
2199                  * Ignore all writes to this no longer documented MSR.
2200                  * Writes are only relevant for old K7 processors,
2201                  * all pre-dating SVM, but a recommended workaround from
2202                  * AMD for these chips. It is possible to specify the
2203                  * affected processor models on the command line, hence
2204                  * the need to ignore the workaround.
2205                  */
2206                 break;
2207         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2208         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2209         case HV_X64_MSR_CRASH_CTL:
2210                 return kvm_hv_set_msr_common(vcpu, msr, data,
2211                                              msr_info->host_initiated);
2212         case MSR_IA32_BBL_CR_CTL3:
2213                 /* Drop writes to this legacy MSR -- see rdmsr
2214                  * counterpart for further detail.
2215                  */
2216                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2217                 break;
2218         case MSR_AMD64_OSVW_ID_LENGTH:
2219                 if (!guest_cpuid_has_osvw(vcpu))
2220                         return 1;
2221                 vcpu->arch.osvw.length = data;
2222                 break;
2223         case MSR_AMD64_OSVW_STATUS:
2224                 if (!guest_cpuid_has_osvw(vcpu))
2225                         return 1;
2226                 vcpu->arch.osvw.status = data;
2227                 break;
2228         default:
2229                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2230                         return xen_hvm_config(vcpu, data);
2231                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2232                         return kvm_pmu_set_msr(vcpu, msr_info);
2233                 if (!ignore_msrs) {
2234                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2235                                     msr, data);
2236                         return 1;
2237                 } else {
2238                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2239                                     msr, data);
2240                         break;
2241                 }
2242         }
2243         return 0;
2244 }
2245 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2246
2247
2248 /*
2249  * Reads an msr value (of 'msr_index') into 'pdata'.
2250  * Returns 0 on success, non-0 otherwise.
2251  * Assumes vcpu_load() was already called.
2252  */
2253 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2254 {
2255         return kvm_x86_ops->get_msr(vcpu, msr);
2256 }
2257 EXPORT_SYMBOL_GPL(kvm_get_msr);
2258
2259 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2260 {
2261         u64 data;
2262         u64 mcg_cap = vcpu->arch.mcg_cap;
2263         unsigned bank_num = mcg_cap & 0xff;
2264
2265         switch (msr) {
2266         case MSR_IA32_P5_MC_ADDR:
2267         case MSR_IA32_P5_MC_TYPE:
2268                 data = 0;
2269                 break;
2270         case MSR_IA32_MCG_CAP:
2271                 data = vcpu->arch.mcg_cap;
2272                 break;
2273         case MSR_IA32_MCG_CTL:
2274                 if (!(mcg_cap & MCG_CTL_P))
2275                         return 1;
2276                 data = vcpu->arch.mcg_ctl;
2277                 break;
2278         case MSR_IA32_MCG_STATUS:
2279                 data = vcpu->arch.mcg_status;
2280                 break;
2281         default:
2282                 if (msr >= MSR_IA32_MC0_CTL &&
2283                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2284                         u32 offset = msr - MSR_IA32_MC0_CTL;
2285                         data = vcpu->arch.mce_banks[offset];
2286                         break;
2287                 }
2288                 return 1;
2289         }
2290         *pdata = data;
2291         return 0;
2292 }
2293
2294 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2295 {
2296         switch (msr_info->index) {
2297         case MSR_IA32_PLATFORM_ID:
2298         case MSR_IA32_EBL_CR_POWERON:
2299         case MSR_IA32_DEBUGCTLMSR:
2300         case MSR_IA32_LASTBRANCHFROMIP:
2301         case MSR_IA32_LASTBRANCHTOIP:
2302         case MSR_IA32_LASTINTFROMIP:
2303         case MSR_IA32_LASTINTTOIP:
2304         case MSR_K8_SYSCFG:
2305         case MSR_K8_TSEG_ADDR:
2306         case MSR_K8_TSEG_MASK:
2307         case MSR_K7_HWCR:
2308         case MSR_VM_HSAVE_PA:
2309         case MSR_K8_INT_PENDING_MSG:
2310         case MSR_AMD64_NB_CFG:
2311         case MSR_FAM10H_MMIO_CONF_BASE:
2312         case MSR_AMD64_BU_CFG2:
2313                 msr_info->data = 0;
2314                 break;
2315         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2316         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2317         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2318         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2319                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2320                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2321                 msr_info->data = 0;
2322                 break;
2323         case MSR_IA32_UCODE_REV:
2324                 msr_info->data = 0x100000000ULL;
2325                 break;
2326         case MSR_MTRRcap:
2327         case 0x200 ... 0x2ff:
2328                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2329         case 0xcd: /* fsb frequency */
2330                 msr_info->data = 3;
2331                 break;
2332                 /*
2333                  * MSR_EBC_FREQUENCY_ID
2334                  * Conservative value valid for even the basic CPU models.
2335                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2336                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2337                  * and 266MHz for model 3, or 4. Set Core Clock
2338                  * Frequency to System Bus Frequency Ratio to 1 (bits
2339                  * 31:24) even though these are only valid for CPU
2340                  * models > 2, however guests may end up dividing or
2341                  * multiplying by zero otherwise.
2342                  */
2343         case MSR_EBC_FREQUENCY_ID:
2344                 msr_info->data = 1 << 24;
2345                 break;
2346         case MSR_IA32_APICBASE:
2347                 msr_info->data = kvm_get_apic_base(vcpu);
2348                 break;
2349         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2350                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2351                 break;
2352         case MSR_IA32_TSCDEADLINE:
2353                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2354                 break;
2355         case MSR_IA32_TSC_ADJUST:
2356                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2357                 break;
2358         case MSR_IA32_MISC_ENABLE:
2359                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2360                 break;
2361         case MSR_IA32_SMBASE:
2362                 if (!msr_info->host_initiated)
2363                         return 1;
2364                 msr_info->data = vcpu->arch.smbase;
2365                 break;
2366         case MSR_IA32_PERF_STATUS:
2367                 /* TSC increment by tick */
2368                 msr_info->data = 1000ULL;
2369                 /* CPU multiplier */
2370                 msr_info->data |= (((uint64_t)4ULL) << 40);
2371                 break;
2372         case MSR_EFER:
2373                 msr_info->data = vcpu->arch.efer;
2374                 break;
2375         case MSR_KVM_WALL_CLOCK:
2376         case MSR_KVM_WALL_CLOCK_NEW:
2377                 msr_info->data = vcpu->kvm->arch.wall_clock;
2378                 break;
2379         case MSR_KVM_SYSTEM_TIME:
2380         case MSR_KVM_SYSTEM_TIME_NEW:
2381                 msr_info->data = vcpu->arch.time;
2382                 break;
2383         case MSR_KVM_ASYNC_PF_EN:
2384                 msr_info->data = vcpu->arch.apf.msr_val;
2385                 break;
2386         case MSR_KVM_STEAL_TIME:
2387                 msr_info->data = vcpu->arch.st.msr_val;
2388                 break;
2389         case MSR_KVM_PV_EOI_EN:
2390                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2391                 break;
2392         case MSR_IA32_P5_MC_ADDR:
2393         case MSR_IA32_P5_MC_TYPE:
2394         case MSR_IA32_MCG_CAP:
2395         case MSR_IA32_MCG_CTL:
2396         case MSR_IA32_MCG_STATUS:
2397         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2398                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2399         case MSR_K7_CLK_CTL:
2400                 /*
2401                  * Provide expected ramp-up count for K7. All other
2402                  * are set to zero, indicating minimum divisors for
2403                  * every field.
2404                  *
2405                  * This prevents guest kernels on AMD host with CPU
2406                  * type 6, model 8 and higher from exploding due to
2407                  * the rdmsr failing.
2408                  */
2409                 msr_info->data = 0x20000000;
2410                 break;
2411         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2412         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2413         case HV_X64_MSR_CRASH_CTL:
2414                 return kvm_hv_get_msr_common(vcpu,
2415                                              msr_info->index, &msr_info->data);
2416                 break;
2417         case MSR_IA32_BBL_CR_CTL3:
2418                 /* This legacy MSR exists but isn't fully documented in current
2419                  * silicon.  It is however accessed by winxp in very narrow
2420                  * scenarios where it sets bit #19, itself documented as
2421                  * a "reserved" bit.  Best effort attempt to source coherent
2422                  * read data here should the balance of the register be
2423                  * interpreted by the guest:
2424                  *
2425                  * L2 cache control register 3: 64GB range, 256KB size,
2426                  * enabled, latency 0x1, configured
2427                  */
2428                 msr_info->data = 0xbe702111;
2429                 break;
2430         case MSR_AMD64_OSVW_ID_LENGTH:
2431                 if (!guest_cpuid_has_osvw(vcpu))
2432                         return 1;
2433                 msr_info->data = vcpu->arch.osvw.length;
2434                 break;
2435         case MSR_AMD64_OSVW_STATUS:
2436                 if (!guest_cpuid_has_osvw(vcpu))
2437                         return 1;
2438                 msr_info->data = vcpu->arch.osvw.status;
2439                 break;
2440         default:
2441                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2442                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2443                 if (!ignore_msrs) {
2444                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2445                         return 1;
2446                 } else {
2447                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2448                         msr_info->data = 0;
2449                 }
2450                 break;
2451         }
2452         return 0;
2453 }
2454 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2455
2456 /*
2457  * Read or write a bunch of msrs. All parameters are kernel addresses.
2458  *
2459  * @return number of msrs set successfully.
2460  */
2461 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2462                     struct kvm_msr_entry *entries,
2463                     int (*do_msr)(struct kvm_vcpu *vcpu,
2464                                   unsigned index, u64 *data))
2465 {
2466         int i, idx;
2467
2468         idx = srcu_read_lock(&vcpu->kvm->srcu);
2469         for (i = 0; i < msrs->nmsrs; ++i)
2470                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2471                         break;
2472         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2473
2474         return i;
2475 }
2476
2477 /*
2478  * Read or write a bunch of msrs. Parameters are user addresses.
2479  *
2480  * @return number of msrs set successfully.
2481  */
2482 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2483                   int (*do_msr)(struct kvm_vcpu *vcpu,
2484                                 unsigned index, u64 *data),
2485                   int writeback)
2486 {
2487         struct kvm_msrs msrs;
2488         struct kvm_msr_entry *entries;
2489         int r, n;
2490         unsigned size;
2491
2492         r = -EFAULT;
2493         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2494                 goto out;
2495
2496         r = -E2BIG;
2497         if (msrs.nmsrs >= MAX_IO_MSRS)
2498                 goto out;
2499
2500         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2501         entries = memdup_user(user_msrs->entries, size);
2502         if (IS_ERR(entries)) {
2503                 r = PTR_ERR(entries);
2504                 goto out;
2505         }
2506
2507         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2508         if (r < 0)
2509                 goto out_free;
2510
2511         r = -EFAULT;
2512         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2513                 goto out_free;
2514
2515         r = n;
2516
2517 out_free:
2518         kfree(entries);
2519 out:
2520         return r;
2521 }
2522
2523 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2524 {
2525         int r;
2526
2527         switch (ext) {
2528         case KVM_CAP_IRQCHIP:
2529         case KVM_CAP_HLT:
2530         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2531         case KVM_CAP_SET_TSS_ADDR:
2532         case KVM_CAP_EXT_CPUID:
2533         case KVM_CAP_EXT_EMUL_CPUID:
2534         case KVM_CAP_CLOCKSOURCE:
2535         case KVM_CAP_PIT:
2536         case KVM_CAP_NOP_IO_DELAY:
2537         case KVM_CAP_MP_STATE:
2538         case KVM_CAP_SYNC_MMU:
2539         case KVM_CAP_USER_NMI:
2540         case KVM_CAP_REINJECT_CONTROL:
2541         case KVM_CAP_IRQ_INJECT_STATUS:
2542         case KVM_CAP_IOEVENTFD:
2543         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2544         case KVM_CAP_PIT2:
2545         case KVM_CAP_PIT_STATE2:
2546         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2547         case KVM_CAP_XEN_HVM:
2548         case KVM_CAP_ADJUST_CLOCK:
2549         case KVM_CAP_VCPU_EVENTS:
2550         case KVM_CAP_HYPERV:
2551         case KVM_CAP_HYPERV_VAPIC:
2552         case KVM_CAP_HYPERV_SPIN:
2553         case KVM_CAP_PCI_SEGMENT:
2554         case KVM_CAP_DEBUGREGS:
2555         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2556         case KVM_CAP_XSAVE:
2557         case KVM_CAP_ASYNC_PF:
2558         case KVM_CAP_GET_TSC_KHZ:
2559         case KVM_CAP_KVMCLOCK_CTRL:
2560         case KVM_CAP_READONLY_MEM:
2561         case KVM_CAP_HYPERV_TIME:
2562         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2563         case KVM_CAP_TSC_DEADLINE_TIMER:
2564         case KVM_CAP_ENABLE_CAP_VM:
2565         case KVM_CAP_DISABLE_QUIRKS:
2566         case KVM_CAP_SET_BOOT_CPU_ID:
2567         case KVM_CAP_SPLIT_IRQCHIP:
2568 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2569         case KVM_CAP_ASSIGN_DEV_IRQ:
2570         case KVM_CAP_PCI_2_3:
2571 #endif
2572                 r = 1;
2573                 break;
2574         case KVM_CAP_X86_SMM:
2575                 /* SMBASE is usually relocated above 1M on modern chipsets,
2576                  * and SMM handlers might indeed rely on 4G segment limits,
2577                  * so do not report SMM to be available if real mode is
2578                  * emulated via vm86 mode.  Still, do not go to great lengths
2579                  * to avoid userspace's usage of the feature, because it is a
2580                  * fringe case that is not enabled except via specific settings
2581                  * of the module parameters.
2582                  */
2583                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2584                 break;
2585         case KVM_CAP_COALESCED_MMIO:
2586                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2587                 break;
2588         case KVM_CAP_VAPIC:
2589                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2590                 break;
2591         case KVM_CAP_NR_VCPUS:
2592                 r = KVM_SOFT_MAX_VCPUS;
2593                 break;
2594         case KVM_CAP_MAX_VCPUS:
2595                 r = KVM_MAX_VCPUS;
2596                 break;
2597         case KVM_CAP_NR_MEMSLOTS:
2598                 r = KVM_USER_MEM_SLOTS;
2599                 break;
2600         case KVM_CAP_PV_MMU:    /* obsolete */
2601                 r = 0;
2602                 break;
2603 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2604         case KVM_CAP_IOMMU:
2605                 r = iommu_present(&pci_bus_type);
2606                 break;
2607 #endif
2608         case KVM_CAP_MCE:
2609                 r = KVM_MAX_MCE_BANKS;
2610                 break;
2611         case KVM_CAP_XCRS:
2612                 r = cpu_has_xsave;
2613                 break;
2614         case KVM_CAP_TSC_CONTROL:
2615                 r = kvm_has_tsc_control;
2616                 break;
2617         default:
2618                 r = 0;
2619                 break;
2620         }
2621         return r;
2622
2623 }
2624
2625 long kvm_arch_dev_ioctl(struct file *filp,
2626                         unsigned int ioctl, unsigned long arg)
2627 {
2628         void __user *argp = (void __user *)arg;
2629         long r;
2630
2631         switch (ioctl) {
2632         case KVM_GET_MSR_INDEX_LIST: {
2633                 struct kvm_msr_list __user *user_msr_list = argp;
2634                 struct kvm_msr_list msr_list;
2635                 unsigned n;
2636
2637                 r = -EFAULT;
2638                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2639                         goto out;
2640                 n = msr_list.nmsrs;
2641                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2642                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2643                         goto out;
2644                 r = -E2BIG;
2645                 if (n < msr_list.nmsrs)
2646                         goto out;
2647                 r = -EFAULT;
2648                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2649                                  num_msrs_to_save * sizeof(u32)))
2650                         goto out;
2651                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2652                                  &emulated_msrs,
2653                                  num_emulated_msrs * sizeof(u32)))
2654                         goto out;
2655                 r = 0;
2656                 break;
2657         }
2658         case KVM_GET_SUPPORTED_CPUID:
2659         case KVM_GET_EMULATED_CPUID: {
2660                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2661                 struct kvm_cpuid2 cpuid;
2662
2663                 r = -EFAULT;
2664                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2665                         goto out;
2666
2667                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2668                                             ioctl);
2669                 if (r)
2670                         goto out;
2671
2672                 r = -EFAULT;
2673                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2674                         goto out;
2675                 r = 0;
2676                 break;
2677         }
2678         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2679                 u64 mce_cap;
2680
2681                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2682                 r = -EFAULT;
2683                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2684                         goto out;
2685                 r = 0;
2686                 break;
2687         }
2688         default:
2689                 r = -EINVAL;
2690         }
2691 out:
2692         return r;
2693 }
2694
2695 static void wbinvd_ipi(void *garbage)
2696 {
2697         wbinvd();
2698 }
2699
2700 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2701 {
2702         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2703 }
2704
2705 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2706 {
2707         /* Address WBINVD may be executed by guest */
2708         if (need_emulate_wbinvd(vcpu)) {
2709                 if (kvm_x86_ops->has_wbinvd_exit())
2710                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2711                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2712                         smp_call_function_single(vcpu->cpu,
2713                                         wbinvd_ipi, NULL, 1);
2714         }
2715
2716         kvm_x86_ops->vcpu_load(vcpu, cpu);
2717
2718         /* Apply any externally detected TSC adjustments (due to suspend) */
2719         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2720                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2721                 vcpu->arch.tsc_offset_adjustment = 0;
2722                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2723         }
2724
2725         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2726                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2727                                 rdtsc() - vcpu->arch.last_host_tsc;
2728                 if (tsc_delta < 0)
2729                         mark_tsc_unstable("KVM discovered backwards TSC");
2730
2731                 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2732                                 kvm_x86_ops->set_hv_timer(vcpu,
2733                                         kvm_get_lapic_tscdeadline_msr(vcpu)))
2734                         kvm_lapic_switch_to_sw_timer(vcpu);
2735                 if (check_tsc_unstable()) {
2736                         u64 offset = kvm_compute_tsc_offset(vcpu,
2737                                                 vcpu->arch.last_guest_tsc);
2738                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2739                         vcpu->arch.tsc_catchup = 1;
2740                 }
2741                 /*
2742                  * On a host with synchronized TSC, there is no need to update
2743                  * kvmclock on vcpu->cpu migration
2744                  */
2745                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2746                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2747                 if (vcpu->cpu != cpu)
2748                         kvm_migrate_timers(vcpu);
2749                 vcpu->cpu = cpu;
2750         }
2751
2752         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2753 }
2754
2755 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2756 {
2757         kvm_x86_ops->vcpu_put(vcpu);
2758         kvm_put_guest_fpu(vcpu);
2759         vcpu->arch.last_host_tsc = rdtsc();
2760 }
2761
2762 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2763                                     struct kvm_lapic_state *s)
2764 {
2765         kvm_x86_ops->sync_pir_to_irr(vcpu);
2766         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2767
2768         return 0;
2769 }
2770
2771 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2772                                     struct kvm_lapic_state *s)
2773 {
2774         kvm_apic_post_state_restore(vcpu, s);
2775         update_cr8_intercept(vcpu);
2776
2777         return 0;
2778 }
2779
2780 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2781 {
2782         return (!lapic_in_kernel(vcpu) ||
2783                 kvm_apic_accept_pic_intr(vcpu));
2784 }
2785
2786 /*
2787  * if userspace requested an interrupt window, check that the
2788  * interrupt window is open.
2789  *
2790  * No need to exit to userspace if we already have an interrupt queued.
2791  */
2792 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2793 {
2794         return kvm_arch_interrupt_allowed(vcpu) &&
2795                 !kvm_cpu_has_interrupt(vcpu) &&
2796                 !kvm_event_needs_reinjection(vcpu) &&
2797                 kvm_cpu_accept_dm_intr(vcpu);
2798 }
2799
2800 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2801                                     struct kvm_interrupt *irq)
2802 {
2803         if (irq->irq >= KVM_NR_INTERRUPTS)
2804                 return -EINVAL;
2805
2806         if (!irqchip_in_kernel(vcpu->kvm)) {
2807                 kvm_queue_interrupt(vcpu, irq->irq, false);
2808                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2809                 return 0;
2810         }
2811
2812         /*
2813          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2814          * fail for in-kernel 8259.
2815          */
2816         if (pic_in_kernel(vcpu->kvm))
2817                 return -ENXIO;
2818
2819         if (vcpu->arch.pending_external_vector != -1)
2820                 return -EEXIST;
2821
2822         vcpu->arch.pending_external_vector = irq->irq;
2823         kvm_make_request(KVM_REQ_EVENT, vcpu);
2824         return 0;
2825 }
2826
2827 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2828 {
2829         kvm_inject_nmi(vcpu);
2830
2831         return 0;
2832 }
2833
2834 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2835 {
2836         kvm_make_request(KVM_REQ_SMI, vcpu);
2837
2838         return 0;
2839 }
2840
2841 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2842                                            struct kvm_tpr_access_ctl *tac)
2843 {
2844         if (tac->flags)
2845                 return -EINVAL;
2846         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2847         return 0;
2848 }
2849
2850 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2851                                         u64 mcg_cap)
2852 {
2853         int r;
2854         unsigned bank_num = mcg_cap & 0xff, bank;
2855
2856         r = -EINVAL;
2857         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2858                 goto out;
2859         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2860                 goto out;
2861         r = 0;
2862         vcpu->arch.mcg_cap = mcg_cap;
2863         /* Init IA32_MCG_CTL to all 1s */
2864         if (mcg_cap & MCG_CTL_P)
2865                 vcpu->arch.mcg_ctl = ~(u64)0;
2866         /* Init IA32_MCi_CTL to all 1s */
2867         for (bank = 0; bank < bank_num; bank++)
2868                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2869 out:
2870         return r;
2871 }
2872
2873 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2874                                       struct kvm_x86_mce *mce)
2875 {
2876         u64 mcg_cap = vcpu->arch.mcg_cap;
2877         unsigned bank_num = mcg_cap & 0xff;
2878         u64 *banks = vcpu->arch.mce_banks;
2879
2880         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2881                 return -EINVAL;
2882         /*
2883          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2884          * reporting is disabled
2885          */
2886         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2887             vcpu->arch.mcg_ctl != ~(u64)0)
2888                 return 0;
2889         banks += 4 * mce->bank;
2890         /*
2891          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2892          * reporting is disabled for the bank
2893          */
2894         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2895                 return 0;
2896         if (mce->status & MCI_STATUS_UC) {
2897                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2898                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2899                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2900                         return 0;
2901                 }
2902                 if (banks[1] & MCI_STATUS_VAL)
2903                         mce->status |= MCI_STATUS_OVER;
2904                 banks[2] = mce->addr;
2905                 banks[3] = mce->misc;
2906                 vcpu->arch.mcg_status = mce->mcg_status;
2907                 banks[1] = mce->status;
2908                 kvm_queue_exception(vcpu, MC_VECTOR);
2909         } else if (!(banks[1] & MCI_STATUS_VAL)
2910                    || !(banks[1] & MCI_STATUS_UC)) {
2911                 if (banks[1] & MCI_STATUS_VAL)
2912                         mce->status |= MCI_STATUS_OVER;
2913                 banks[2] = mce->addr;
2914                 banks[3] = mce->misc;
2915                 banks[1] = mce->status;
2916         } else
2917                 banks[1] |= MCI_STATUS_OVER;
2918         return 0;
2919 }
2920
2921 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2922                                                struct kvm_vcpu_events *events)
2923 {
2924         process_nmi(vcpu);
2925         events->exception.injected =
2926                 vcpu->arch.exception.pending &&
2927                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2928         events->exception.nr = vcpu->arch.exception.nr;
2929         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2930         events->exception.pad = 0;
2931         events->exception.error_code = vcpu->arch.exception.error_code;
2932
2933         events->interrupt.injected =
2934                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2935         events->interrupt.nr = vcpu->arch.interrupt.nr;
2936         events->interrupt.soft = 0;
2937         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2938
2939         events->nmi.injected = vcpu->arch.nmi_injected;
2940         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2941         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2942         events->nmi.pad = 0;
2943
2944         events->sipi_vector = 0; /* never valid when reporting to user space */
2945
2946         events->smi.smm = is_smm(vcpu);
2947         events->smi.pending = vcpu->arch.smi_pending;
2948         events->smi.smm_inside_nmi =
2949                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2950         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2951
2952         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2953                          | KVM_VCPUEVENT_VALID_SHADOW
2954                          | KVM_VCPUEVENT_VALID_SMM);
2955         memset(&events->reserved, 0, sizeof(events->reserved));
2956 }
2957
2958 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
2959
2960 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2961                                               struct kvm_vcpu_events *events)
2962 {
2963         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2964                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2965                               | KVM_VCPUEVENT_VALID_SHADOW
2966                               | KVM_VCPUEVENT_VALID_SMM))
2967                 return -EINVAL;
2968
2969         process_nmi(vcpu);
2970         vcpu->arch.exception.pending = events->exception.injected;
2971         vcpu->arch.exception.nr = events->exception.nr;
2972         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2973         vcpu->arch.exception.error_code = events->exception.error_code;
2974
2975         vcpu->arch.interrupt.pending = events->interrupt.injected;
2976         vcpu->arch.interrupt.nr = events->interrupt.nr;
2977         vcpu->arch.interrupt.soft = events->interrupt.soft;
2978         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2979                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2980                                                   events->interrupt.shadow);
2981
2982         vcpu->arch.nmi_injected = events->nmi.injected;
2983         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2984                 vcpu->arch.nmi_pending = events->nmi.pending;
2985         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2986
2987         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2988             kvm_vcpu_has_lapic(vcpu))
2989                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2990
2991         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2992                 u32 hflags = vcpu->arch.hflags;
2993                 if (events->smi.smm)
2994                         hflags |= HF_SMM_MASK;
2995                 else
2996                         hflags &= ~HF_SMM_MASK;
2997                 kvm_set_hflags(vcpu, hflags);
2998
2999                 vcpu->arch.smi_pending = events->smi.pending;
3000                 if (events->smi.smm_inside_nmi)
3001                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3002                 else
3003                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3004                 if (kvm_vcpu_has_lapic(vcpu)) {
3005                         if (events->smi.latched_init)
3006                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3007                         else
3008                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3009                 }
3010         }
3011
3012         kvm_make_request(KVM_REQ_EVENT, vcpu);
3013
3014         return 0;
3015 }
3016
3017 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3018                                              struct kvm_debugregs *dbgregs)
3019 {
3020         unsigned long val;
3021
3022         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3023         kvm_get_dr(vcpu, 6, &val);
3024         dbgregs->dr6 = val;
3025         dbgregs->dr7 = vcpu->arch.dr7;
3026         dbgregs->flags = 0;
3027         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3028 }
3029
3030 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3031                                             struct kvm_debugregs *dbgregs)
3032 {
3033         if (dbgregs->flags)
3034                 return -EINVAL;
3035
3036         if (dbgregs->dr6 & ~0xffffffffull)
3037                 return -EINVAL;
3038         if (dbgregs->dr7 & ~0xffffffffull)
3039                 return -EINVAL;
3040
3041         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3042         kvm_update_dr0123(vcpu);
3043         vcpu->arch.dr6 = dbgregs->dr6;
3044         kvm_update_dr6(vcpu);
3045         vcpu->arch.dr7 = dbgregs->dr7;
3046         kvm_update_dr7(vcpu);
3047
3048         return 0;
3049 }
3050
3051 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3052
3053 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3054 {
3055         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3056         u64 xstate_bv = xsave->header.xfeatures;
3057         u64 valid;
3058
3059         /*
3060          * Copy legacy XSAVE area, to avoid complications with CPUID
3061          * leaves 0 and 1 in the loop below.
3062          */
3063         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3064
3065         /* Set XSTATE_BV */
3066         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3067         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3068
3069         /*
3070          * Copy each region from the possibly compacted offset to the
3071          * non-compacted offset.
3072          */
3073         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3074         while (valid) {
3075                 u64 feature = valid & -valid;
3076                 int index = fls64(feature) - 1;
3077                 void *src = get_xsave_addr(xsave, feature);
3078
3079                 if (src) {
3080                         u32 size, offset, ecx, edx;
3081                         cpuid_count(XSTATE_CPUID, index,
3082                                     &size, &offset, &ecx, &edx);
3083                         memcpy(dest + offset, src, size);
3084                 }
3085
3086                 valid -= feature;
3087         }
3088 }
3089
3090 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3091 {
3092         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3093         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3094         u64 valid;
3095
3096         /*
3097          * Copy legacy XSAVE area, to avoid complications with CPUID
3098          * leaves 0 and 1 in the loop below.
3099          */
3100         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3101
3102         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3103         xsave->header.xfeatures = xstate_bv;
3104         if (cpu_has_xsaves)
3105                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3106
3107         /*
3108          * Copy each region from the non-compacted offset to the
3109          * possibly compacted offset.
3110          */
3111         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3112         while (valid) {
3113                 u64 feature = valid & -valid;
3114                 int index = fls64(feature) - 1;
3115                 void *dest = get_xsave_addr(xsave, feature);
3116
3117                 if (dest) {
3118                         u32 size, offset, ecx, edx;
3119                         cpuid_count(XSTATE_CPUID, index,
3120                                     &size, &offset, &ecx, &edx);
3121                         memcpy(dest, src + offset, size);
3122                 }
3123
3124                 valid -= feature;
3125         }
3126 }
3127
3128 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3129                                          struct kvm_xsave *guest_xsave)
3130 {
3131         if (cpu_has_xsave) {
3132                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3133                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3134         } else {
3135                 memcpy(guest_xsave->region,
3136                         &vcpu->arch.guest_fpu.state.fxsave,
3137                         sizeof(struct fxregs_state));
3138                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3139                         XFEATURE_MASK_FPSSE;
3140         }
3141 }
3142
3143 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3144                                         struct kvm_xsave *guest_xsave)
3145 {
3146         u64 xstate_bv =
3147                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3148
3149         if (cpu_has_xsave) {
3150                 /*
3151                  * Here we allow setting states that are not present in
3152                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3153                  * with old userspace.
3154                  */
3155                 if (xstate_bv & ~kvm_supported_xcr0())
3156                         return -EINVAL;
3157                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3158         } else {
3159                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3160                         return -EINVAL;
3161                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3162                         guest_xsave->region, sizeof(struct fxregs_state));
3163         }
3164         return 0;
3165 }
3166
3167 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3168                                         struct kvm_xcrs *guest_xcrs)
3169 {
3170         if (!cpu_has_xsave) {
3171                 guest_xcrs->nr_xcrs = 0;
3172                 return;
3173         }
3174
3175         guest_xcrs->nr_xcrs = 1;
3176         guest_xcrs->flags = 0;
3177         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3178         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3179 }
3180
3181 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3182                                        struct kvm_xcrs *guest_xcrs)
3183 {
3184         int i, r = 0;
3185
3186         if (!cpu_has_xsave)
3187                 return -EINVAL;
3188
3189         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3190                 return -EINVAL;
3191
3192         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3193                 /* Only support XCR0 currently */
3194                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3195                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3196                                 guest_xcrs->xcrs[i].value);
3197                         break;
3198                 }
3199         if (r)
3200                 r = -EINVAL;
3201         return r;
3202 }
3203
3204 /*
3205  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3206  * stopped by the hypervisor.  This function will be called from the host only.
3207  * EINVAL is returned when the host attempts to set the flag for a guest that
3208  * does not support pv clocks.
3209  */
3210 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3211 {
3212         if (!vcpu->arch.pv_time_enabled)
3213                 return -EINVAL;
3214         vcpu->arch.pvclock_set_guest_stopped_request = true;
3215         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3216         return 0;
3217 }
3218
3219 long kvm_arch_vcpu_ioctl(struct file *filp,
3220                          unsigned int ioctl, unsigned long arg)
3221 {
3222         struct kvm_vcpu *vcpu = filp->private_data;
3223         void __user *argp = (void __user *)arg;
3224         int r;
3225         union {
3226                 struct kvm_lapic_state *lapic;
3227                 struct kvm_xsave *xsave;
3228                 struct kvm_xcrs *xcrs;
3229                 void *buffer;
3230         } u;
3231
3232         u.buffer = NULL;
3233         switch (ioctl) {
3234         case KVM_GET_LAPIC: {
3235                 r = -EINVAL;
3236                 if (!vcpu->arch.apic)
3237                         goto out;
3238                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3239
3240                 r = -ENOMEM;
3241                 if (!u.lapic)
3242                         goto out;
3243                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3244                 if (r)
3245                         goto out;
3246                 r = -EFAULT;
3247                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3248                         goto out;
3249                 r = 0;
3250                 break;
3251         }
3252         case KVM_SET_LAPIC: {
3253                 r = -EINVAL;
3254                 if (!vcpu->arch.apic)
3255                         goto out;
3256                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3257                 if (IS_ERR(u.lapic))
3258                         return PTR_ERR(u.lapic);
3259
3260                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3261                 break;
3262         }
3263         case KVM_INTERRUPT: {
3264                 struct kvm_interrupt irq;
3265
3266                 r = -EFAULT;
3267                 if (copy_from_user(&irq, argp, sizeof irq))
3268                         goto out;
3269                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3270                 break;
3271         }
3272         case KVM_NMI: {
3273                 r = kvm_vcpu_ioctl_nmi(vcpu);
3274                 break;
3275         }
3276         case KVM_SMI: {
3277                 r = kvm_vcpu_ioctl_smi(vcpu);
3278                 break;
3279         }
3280         case KVM_SET_CPUID: {
3281                 struct kvm_cpuid __user *cpuid_arg = argp;
3282                 struct kvm_cpuid cpuid;
3283
3284                 r = -EFAULT;
3285                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3286                         goto out;
3287                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3288                 break;
3289         }
3290         case KVM_SET_CPUID2: {
3291                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3292                 struct kvm_cpuid2 cpuid;
3293
3294                 r = -EFAULT;
3295                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3296                         goto out;
3297                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3298                                               cpuid_arg->entries);
3299                 break;
3300         }
3301         case KVM_GET_CPUID2: {
3302                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3303                 struct kvm_cpuid2 cpuid;
3304
3305                 r = -EFAULT;
3306                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3307                         goto out;
3308                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3309                                               cpuid_arg->entries);
3310                 if (r)
3311                         goto out;
3312                 r = -EFAULT;
3313                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3314                         goto out;
3315                 r = 0;
3316                 break;
3317         }
3318         case KVM_GET_MSRS:
3319                 r = msr_io(vcpu, argp, do_get_msr, 1);
3320                 break;
3321         case KVM_SET_MSRS:
3322                 r = msr_io(vcpu, argp, do_set_msr, 0);
3323                 break;
3324         case KVM_TPR_ACCESS_REPORTING: {
3325                 struct kvm_tpr_access_ctl tac;
3326
3327                 r = -EFAULT;
3328                 if (copy_from_user(&tac, argp, sizeof tac))
3329                         goto out;
3330                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3331                 if (r)
3332                         goto out;
3333                 r = -EFAULT;
3334                 if (copy_to_user(argp, &tac, sizeof tac))
3335                         goto out;
3336                 r = 0;
3337                 break;
3338         };
3339         case KVM_SET_VAPIC_ADDR: {
3340                 struct kvm_vapic_addr va;
3341                 int idx;
3342
3343                 r = -EINVAL;
3344                 if (!lapic_in_kernel(vcpu))
3345                         goto out;
3346                 r = -EFAULT;
3347                 if (copy_from_user(&va, argp, sizeof va))
3348                         goto out;
3349                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3350                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3351                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3352                 break;
3353         }
3354         case KVM_X86_SETUP_MCE: {
3355                 u64 mcg_cap;
3356
3357                 r = -EFAULT;
3358                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3359                         goto out;
3360                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3361                 break;
3362         }
3363         case KVM_X86_SET_MCE: {
3364                 struct kvm_x86_mce mce;
3365
3366                 r = -EFAULT;
3367                 if (copy_from_user(&mce, argp, sizeof mce))
3368                         goto out;
3369                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3370                 break;
3371         }
3372         case KVM_GET_VCPU_EVENTS: {
3373                 struct kvm_vcpu_events events;
3374
3375                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3376
3377                 r = -EFAULT;
3378                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3379                         break;
3380                 r = 0;
3381                 break;
3382         }
3383         case KVM_SET_VCPU_EVENTS: {
3384                 struct kvm_vcpu_events events;
3385
3386                 r = -EFAULT;
3387                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3388                         break;
3389
3390                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3391                 break;
3392         }
3393         case KVM_GET_DEBUGREGS: {
3394                 struct kvm_debugregs dbgregs;
3395
3396                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3397
3398                 r = -EFAULT;
3399                 if (copy_to_user(argp, &dbgregs,
3400                                  sizeof(struct kvm_debugregs)))
3401                         break;
3402                 r = 0;
3403                 break;
3404         }
3405         case KVM_SET_DEBUGREGS: {
3406                 struct kvm_debugregs dbgregs;
3407
3408                 r = -EFAULT;
3409                 if (copy_from_user(&dbgregs, argp,
3410                                    sizeof(struct kvm_debugregs)))
3411                         break;
3412
3413                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3414                 break;
3415         }
3416         case KVM_GET_XSAVE: {
3417                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3418                 r = -ENOMEM;
3419                 if (!u.xsave)
3420                         break;
3421
3422                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3423
3424                 r = -EFAULT;
3425                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3426                         break;
3427                 r = 0;
3428                 break;
3429         }
3430         case KVM_SET_XSAVE: {
3431                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3432                 if (IS_ERR(u.xsave))
3433                         return PTR_ERR(u.xsave);
3434
3435                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3436                 break;
3437         }
3438         case KVM_GET_XCRS: {
3439                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3440                 r = -ENOMEM;
3441                 if (!u.xcrs)
3442                         break;
3443
3444                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3445
3446                 r = -EFAULT;
3447                 if (copy_to_user(argp, u.xcrs,
3448                                  sizeof(struct kvm_xcrs)))
3449                         break;
3450                 r = 0;
3451                 break;
3452         }
3453         case KVM_SET_XCRS: {
3454                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3455                 if (IS_ERR(u.xcrs))
3456                         return PTR_ERR(u.xcrs);
3457
3458                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3459                 break;
3460         }
3461         case KVM_SET_TSC_KHZ: {
3462                 u32 user_tsc_khz;
3463
3464                 r = -EINVAL;
3465                 user_tsc_khz = (u32)arg;
3466
3467                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3468                         goto out;
3469
3470                 if (user_tsc_khz == 0)
3471                         user_tsc_khz = tsc_khz;
3472
3473                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3474                         r = 0;
3475
3476                 goto out;
3477         }
3478         case KVM_GET_TSC_KHZ: {
3479                 r = vcpu->arch.virtual_tsc_khz;
3480                 goto out;
3481         }
3482         case KVM_KVMCLOCK_CTRL: {
3483                 r = kvm_set_guest_paused(vcpu);
3484                 goto out;
3485         }
3486         default:
3487                 r = -EINVAL;
3488         }
3489 out:
3490         kfree(u.buffer);
3491         return r;
3492 }
3493
3494 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3495 {
3496         return VM_FAULT_SIGBUS;
3497 }
3498
3499 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3500 {
3501         int ret;
3502
3503         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3504                 return -EINVAL;
3505         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3506         return ret;
3507 }
3508
3509 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3510                                               u64 ident_addr)
3511 {
3512         kvm->arch.ept_identity_map_addr = ident_addr;
3513         return 0;
3514 }
3515
3516 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3517                                           u32 kvm_nr_mmu_pages)
3518 {
3519         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3520                 return -EINVAL;
3521
3522         mutex_lock(&kvm->slots_lock);
3523
3524         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3525         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3526
3527         mutex_unlock(&kvm->slots_lock);
3528         return 0;
3529 }
3530
3531 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3532 {
3533         return kvm->arch.n_max_mmu_pages;
3534 }
3535
3536 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3537 {
3538         int r;
3539
3540         r = 0;
3541         switch (chip->chip_id) {
3542         case KVM_IRQCHIP_PIC_MASTER:
3543                 memcpy(&chip->chip.pic,
3544                         &pic_irqchip(kvm)->pics[0],
3545                         sizeof(struct kvm_pic_state));
3546                 break;
3547         case KVM_IRQCHIP_PIC_SLAVE:
3548                 memcpy(&chip->chip.pic,
3549                         &pic_irqchip(kvm)->pics[1],
3550                         sizeof(struct kvm_pic_state));
3551                 break;
3552         case KVM_IRQCHIP_IOAPIC:
3553                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3554                 break;
3555         default:
3556                 r = -EINVAL;
3557                 break;
3558         }
3559         return r;
3560 }
3561
3562 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3563 {
3564         int r;
3565
3566         r = 0;
3567         switch (chip->chip_id) {
3568         case KVM_IRQCHIP_PIC_MASTER:
3569                 spin_lock(&pic_irqchip(kvm)->lock);
3570                 memcpy(&pic_irqchip(kvm)->pics[0],
3571                         &chip->chip.pic,
3572                         sizeof(struct kvm_pic_state));
3573                 spin_unlock(&pic_irqchip(kvm)->lock);
3574                 break;
3575         case KVM_IRQCHIP_PIC_SLAVE:
3576                 spin_lock(&pic_irqchip(kvm)->lock);
3577                 memcpy(&pic_irqchip(kvm)->pics[1],
3578                         &chip->chip.pic,
3579                         sizeof(struct kvm_pic_state));
3580                 spin_unlock(&pic_irqchip(kvm)->lock);
3581                 break;
3582         case KVM_IRQCHIP_IOAPIC:
3583                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3584                 break;
3585         default:
3586                 r = -EINVAL;
3587                 break;
3588         }
3589         kvm_pic_update_irq(pic_irqchip(kvm));
3590         return r;
3591 }
3592
3593 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3594 {
3595         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3596         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3597         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3598         return 0;
3599 }
3600
3601 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3602 {
3603         int i;
3604         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3605         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3606         for (i = 0; i < 3; i++)
3607                 kvm_pit_load_count(kvm, i, ps->channels[i].count, 0);
3608         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3609         return 0;
3610 }
3611
3612 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3613 {
3614         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3615         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3616                 sizeof(ps->channels));
3617         ps->flags = kvm->arch.vpit->pit_state.flags;
3618         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3619         memset(&ps->reserved, 0, sizeof(ps->reserved));
3620         return 0;
3621 }
3622
3623 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3624 {
3625         int start = 0;
3626         int i;
3627         u32 prev_legacy, cur_legacy;
3628         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3629         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3630         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3631         if (!prev_legacy && cur_legacy)
3632                 start = 1;
3633         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3634                sizeof(kvm->arch.vpit->pit_state.channels));
3635         kvm->arch.vpit->pit_state.flags = ps->flags;
3636         for (i = 0; i < 3; i++)
3637                 kvm_pit_load_count(kvm, i, kvm->arch.vpit->pit_state.channels[i].count,
3638                                    start && i == 0);
3639         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3640         return 0;
3641 }
3642
3643 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3644                                  struct kvm_reinject_control *control)
3645 {
3646         if (!kvm->arch.vpit)
3647                 return -ENXIO;
3648         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3649         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3650         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3651         return 0;
3652 }
3653
3654 /**
3655  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3656  * @kvm: kvm instance
3657  * @log: slot id and address to which we copy the log
3658  *
3659  * Steps 1-4 below provide general overview of dirty page logging. See
3660  * kvm_get_dirty_log_protect() function description for additional details.
3661  *
3662  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3663  * always flush the TLB (step 4) even if previous step failed  and the dirty
3664  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3665  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3666  * writes will be marked dirty for next log read.
3667  *
3668  *   1. Take a snapshot of the bit and clear it if needed.
3669  *   2. Write protect the corresponding page.
3670  *   3. Copy the snapshot to the userspace.
3671  *   4. Flush TLB's if needed.
3672  */
3673 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3674 {
3675         bool is_dirty = false;
3676         int r;
3677
3678         mutex_lock(&kvm->slots_lock);
3679
3680         /*
3681          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3682          */
3683         if (kvm_x86_ops->flush_log_dirty)
3684                 kvm_x86_ops->flush_log_dirty(kvm);
3685
3686         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3687
3688         /*
3689          * All the TLBs can be flushed out of mmu lock, see the comments in
3690          * kvm_mmu_slot_remove_write_access().
3691          */
3692         lockdep_assert_held(&kvm->slots_lock);
3693         if (is_dirty)
3694                 kvm_flush_remote_tlbs(kvm);
3695
3696         mutex_unlock(&kvm->slots_lock);
3697         return r;
3698 }
3699
3700 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3701                         bool line_status)
3702 {
3703         if (!irqchip_in_kernel(kvm))
3704                 return -ENXIO;
3705
3706         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3707                                         irq_event->irq, irq_event->level,
3708                                         line_status);
3709         return 0;
3710 }
3711
3712 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3713                                    struct kvm_enable_cap *cap)
3714 {
3715         int r;
3716
3717         if (cap->flags)
3718                 return -EINVAL;
3719
3720         switch (cap->cap) {
3721         case KVM_CAP_DISABLE_QUIRKS:
3722                 kvm->arch.disabled_quirks = cap->args[0];
3723                 r = 0;
3724                 break;
3725         case KVM_CAP_SPLIT_IRQCHIP: {
3726                 mutex_lock(&kvm->lock);
3727                 r = -EINVAL;
3728                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3729                         goto split_irqchip_unlock;
3730                 r = -EEXIST;
3731                 if (irqchip_in_kernel(kvm))
3732                         goto split_irqchip_unlock;
3733                 if (atomic_read(&kvm->online_vcpus))
3734                         goto split_irqchip_unlock;
3735                 r = kvm_setup_empty_irq_routing(kvm);
3736                 if (r)
3737                         goto split_irqchip_unlock;
3738                 /* Pairs with irqchip_in_kernel. */
3739                 smp_wmb();
3740                 kvm->arch.irqchip_split = true;
3741                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3742                 r = 0;
3743 split_irqchip_unlock:
3744                 mutex_unlock(&kvm->lock);
3745                 break;
3746         }
3747         default:
3748                 r = -EINVAL;
3749                 break;
3750         }
3751         return r;
3752 }
3753
3754 long kvm_arch_vm_ioctl(struct file *filp,
3755                        unsigned int ioctl, unsigned long arg)
3756 {
3757         struct kvm *kvm = filp->private_data;
3758         void __user *argp = (void __user *)arg;
3759         int r = -ENOTTY;
3760         /*
3761          * This union makes it completely explicit to gcc-3.x
3762          * that these two variables' stack usage should be
3763          * combined, not added together.
3764          */
3765         union {
3766                 struct kvm_pit_state ps;
3767                 struct kvm_pit_state2 ps2;
3768                 struct kvm_pit_config pit_config;
3769         } u;
3770
3771         switch (ioctl) {
3772         case KVM_SET_TSS_ADDR:
3773                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3774                 break;
3775         case KVM_SET_IDENTITY_MAP_ADDR: {
3776                 u64 ident_addr;
3777
3778                 r = -EFAULT;
3779                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3780                         goto out;
3781                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3782                 break;
3783         }
3784         case KVM_SET_NR_MMU_PAGES:
3785                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3786                 break;
3787         case KVM_GET_NR_MMU_PAGES:
3788                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3789                 break;
3790         case KVM_CREATE_IRQCHIP: {
3791                 struct kvm_pic *vpic;
3792
3793                 mutex_lock(&kvm->lock);
3794                 r = -EEXIST;
3795                 if (kvm->arch.vpic)
3796                         goto create_irqchip_unlock;
3797                 r = -EINVAL;
3798                 if (atomic_read(&kvm->online_vcpus))
3799                         goto create_irqchip_unlock;
3800                 r = -ENOMEM;
3801                 vpic = kvm_create_pic(kvm);
3802                 if (vpic) {
3803                         r = kvm_ioapic_init(kvm);
3804                         if (r) {
3805                                 mutex_lock(&kvm->slots_lock);
3806                                 kvm_destroy_pic(vpic);
3807                                 mutex_unlock(&kvm->slots_lock);
3808                                 goto create_irqchip_unlock;
3809                         }
3810                 } else
3811                         goto create_irqchip_unlock;
3812                 r = kvm_setup_default_irq_routing(kvm);
3813                 if (r) {
3814                         mutex_lock(&kvm->slots_lock);
3815                         mutex_lock(&kvm->irq_lock);
3816                         kvm_ioapic_destroy(kvm);
3817                         kvm_destroy_pic(vpic);
3818                         mutex_unlock(&kvm->irq_lock);
3819                         mutex_unlock(&kvm->slots_lock);
3820                         goto create_irqchip_unlock;
3821                 }
3822                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3823                 smp_wmb();
3824                 kvm->arch.vpic = vpic;
3825         create_irqchip_unlock:
3826                 mutex_unlock(&kvm->lock);
3827                 break;
3828         }
3829         case KVM_CREATE_PIT:
3830                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3831                 goto create_pit;
3832         case KVM_CREATE_PIT2:
3833                 r = -EFAULT;
3834                 if (copy_from_user(&u.pit_config, argp,
3835                                    sizeof(struct kvm_pit_config)))
3836                         goto out;
3837         create_pit:
3838                 mutex_lock(&kvm->slots_lock);
3839                 r = -EEXIST;
3840                 if (kvm->arch.vpit)
3841                         goto create_pit_unlock;
3842                 r = -ENOMEM;
3843                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3844                 if (kvm->arch.vpit)
3845                         r = 0;
3846         create_pit_unlock:
3847                 mutex_unlock(&kvm->slots_lock);
3848                 break;
3849         case KVM_GET_IRQCHIP: {
3850                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3851                 struct kvm_irqchip *chip;
3852
3853                 chip = memdup_user(argp, sizeof(*chip));
3854                 if (IS_ERR(chip)) {
3855                         r = PTR_ERR(chip);
3856                         goto out;
3857                 }
3858
3859                 r = -ENXIO;
3860                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3861                         goto get_irqchip_out;
3862                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3863                 if (r)
3864                         goto get_irqchip_out;
3865                 r = -EFAULT;
3866                 if (copy_to_user(argp, chip, sizeof *chip))
3867                         goto get_irqchip_out;
3868                 r = 0;
3869         get_irqchip_out:
3870                 kfree(chip);
3871                 break;
3872         }
3873         case KVM_SET_IRQCHIP: {
3874                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3875                 struct kvm_irqchip *chip;
3876
3877                 chip = memdup_user(argp, sizeof(*chip));
3878                 if (IS_ERR(chip)) {
3879                         r = PTR_ERR(chip);
3880                         goto out;
3881                 }
3882
3883                 r = -ENXIO;
3884                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3885                         goto set_irqchip_out;
3886                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3887                 if (r)
3888                         goto set_irqchip_out;
3889                 r = 0;
3890         set_irqchip_out:
3891                 kfree(chip);
3892                 break;
3893         }
3894         case KVM_GET_PIT: {
3895                 r = -EFAULT;
3896                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3897                         goto out;
3898                 r = -ENXIO;
3899                 if (!kvm->arch.vpit)
3900                         goto out;
3901                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3902                 if (r)
3903                         goto out;
3904                 r = -EFAULT;
3905                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3906                         goto out;
3907                 r = 0;
3908                 break;
3909         }
3910         case KVM_SET_PIT: {
3911                 r = -EFAULT;
3912                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3913                         goto out;
3914                 r = -ENXIO;
3915                 if (!kvm->arch.vpit)
3916                         goto out;
3917                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3918                 break;
3919         }
3920         case KVM_GET_PIT2: {
3921                 r = -ENXIO;
3922                 if (!kvm->arch.vpit)
3923                         goto out;
3924                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3925                 if (r)
3926                         goto out;
3927                 r = -EFAULT;
3928                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3929                         goto out;
3930                 r = 0;
3931                 break;
3932         }
3933         case KVM_SET_PIT2: {
3934                 r = -EFAULT;
3935                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3936                         goto out;
3937                 r = -ENXIO;
3938                 if (!kvm->arch.vpit)
3939                         goto out;
3940                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3941                 break;
3942         }
3943         case KVM_REINJECT_CONTROL: {
3944                 struct kvm_reinject_control control;
3945                 r =  -EFAULT;
3946                 if (copy_from_user(&control, argp, sizeof(control)))
3947                         goto out;
3948                 r = kvm_vm_ioctl_reinject(kvm, &control);
3949                 break;
3950         }
3951         case KVM_SET_BOOT_CPU_ID:
3952                 r = 0;
3953                 mutex_lock(&kvm->lock);
3954                 if (atomic_read(&kvm->online_vcpus) != 0)
3955                         r = -EBUSY;
3956                 else
3957                         kvm->arch.bsp_vcpu_id = arg;
3958                 mutex_unlock(&kvm->lock);
3959                 break;
3960         case KVM_XEN_HVM_CONFIG: {
3961                 r = -EFAULT;
3962                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3963                                    sizeof(struct kvm_xen_hvm_config)))
3964                         goto out;
3965                 r = -EINVAL;
3966                 if (kvm->arch.xen_hvm_config.flags)
3967                         goto out;
3968                 r = 0;
3969                 break;
3970         }
3971         case KVM_SET_CLOCK: {
3972                 struct kvm_clock_data user_ns;
3973                 u64 now_ns;
3974                 s64 delta;
3975
3976                 r = -EFAULT;
3977                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3978                         goto out;
3979
3980                 r = -EINVAL;
3981                 if (user_ns.flags)
3982                         goto out;
3983
3984                 r = 0;
3985                 local_irq_disable();
3986                 now_ns = get_kernel_ns();
3987                 delta = user_ns.clock - now_ns;
3988                 local_irq_enable();
3989                 kvm->arch.kvmclock_offset = delta;
3990                 kvm_gen_update_masterclock(kvm);
3991                 break;
3992         }
3993         case KVM_GET_CLOCK: {
3994                 struct kvm_clock_data user_ns;
3995                 u64 now_ns;
3996
3997                 local_irq_disable();
3998                 now_ns = get_kernel_ns();
3999                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4000                 local_irq_enable();
4001                 user_ns.flags = 0;
4002                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4003
4004                 r = -EFAULT;
4005                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4006                         goto out;
4007                 r = 0;
4008                 break;
4009         }
4010         case KVM_ENABLE_CAP: {
4011                 struct kvm_enable_cap cap;
4012
4013                 r = -EFAULT;
4014                 if (copy_from_user(&cap, argp, sizeof(cap)))
4015                         goto out;
4016                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4017                 break;
4018         }
4019         default:
4020                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4021         }
4022 out:
4023         return r;
4024 }
4025
4026 static void kvm_init_msr_list(void)
4027 {
4028         u32 dummy[2];
4029         unsigned i, j;
4030
4031         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4032                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4033                         continue;
4034
4035                 /*
4036                  * Even MSRs that are valid in the host may not be exposed
4037                  * to the guests in some cases.
4038                  */
4039                 switch (msrs_to_save[i]) {
4040                 case MSR_IA32_BNDCFGS:
4041                         if (!kvm_x86_ops->mpx_supported())
4042                                 continue;
4043                         break;
4044                 case MSR_TSC_AUX:
4045                         if (!kvm_x86_ops->rdtscp_supported())
4046                                 continue;
4047                         break;
4048                 default:
4049                         break;
4050                 }
4051
4052                 if (j < i)
4053                         msrs_to_save[j] = msrs_to_save[i];
4054                 j++;
4055         }
4056         num_msrs_to_save = j;
4057
4058         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4059                 switch (emulated_msrs[i]) {
4060                 case MSR_IA32_SMBASE:
4061                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4062                                 continue;
4063                         break;
4064                 default:
4065                         break;
4066                 }
4067
4068                 if (j < i)
4069                         emulated_msrs[j] = emulated_msrs[i];
4070                 j++;
4071         }
4072         num_emulated_msrs = j;
4073 }
4074
4075 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4076                            const void *v)
4077 {
4078         int handled = 0;
4079         int n;
4080
4081         do {
4082                 n = min(len, 8);
4083                 if (!(vcpu->arch.apic &&
4084                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4085                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4086                         break;
4087                 handled += n;
4088                 addr += n;
4089                 len -= n;
4090                 v += n;
4091         } while (len);
4092
4093         return handled;
4094 }
4095
4096 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4097 {
4098         int handled = 0;
4099         int n;
4100
4101         do {
4102                 n = min(len, 8);
4103                 if (!(vcpu->arch.apic &&
4104                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4105                                          addr, n, v))
4106                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4107                         break;
4108                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4109                 handled += n;
4110                 addr += n;
4111                 len -= n;
4112                 v += n;
4113         } while (len);
4114
4115         return handled;
4116 }
4117
4118 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4119                         struct kvm_segment *var, int seg)
4120 {
4121         kvm_x86_ops->set_segment(vcpu, var, seg);
4122 }
4123
4124 void kvm_get_segment(struct kvm_vcpu *vcpu,
4125                      struct kvm_segment *var, int seg)
4126 {
4127         kvm_x86_ops->get_segment(vcpu, var, seg);
4128 }
4129
4130 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4131                            struct x86_exception *exception)
4132 {
4133         gpa_t t_gpa;
4134
4135         BUG_ON(!mmu_is_nested(vcpu));
4136
4137         /* NPT walks are always user-walks */
4138         access |= PFERR_USER_MASK;
4139         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4140
4141         return t_gpa;
4142 }
4143
4144 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4145                               struct x86_exception *exception)
4146 {
4147         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4148         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4149 }
4150
4151  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4152                                 struct x86_exception *exception)
4153 {
4154         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4155         access |= PFERR_FETCH_MASK;
4156         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4157 }
4158
4159 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4160                                struct x86_exception *exception)
4161 {
4162         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4163         access |= PFERR_WRITE_MASK;
4164         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4165 }
4166
4167 /* uses this to access any guest's mapped memory without checking CPL */
4168 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4169                                 struct x86_exception *exception)
4170 {
4171         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4172 }
4173
4174 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4175                                       struct kvm_vcpu *vcpu, u32 access,
4176                                       struct x86_exception *exception)
4177 {
4178         void *data = val;
4179         int r = X86EMUL_CONTINUE;
4180
4181         while (bytes) {
4182                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4183                                                             exception);
4184                 unsigned offset = addr & (PAGE_SIZE-1);
4185                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4186                 int ret;
4187
4188                 if (gpa == UNMAPPED_GVA)
4189                         return X86EMUL_PROPAGATE_FAULT;
4190                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4191                                                offset, toread);
4192                 if (ret < 0) {
4193                         r = X86EMUL_IO_NEEDED;
4194                         goto out;
4195                 }
4196
4197                 bytes -= toread;
4198                 data += toread;
4199                 addr += toread;
4200         }
4201 out:
4202         return r;
4203 }
4204
4205 /* used for instruction fetching */
4206 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4207                                 gva_t addr, void *val, unsigned int bytes,
4208                                 struct x86_exception *exception)
4209 {
4210         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4211         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4212         unsigned offset;
4213         int ret;
4214
4215         /* Inline kvm_read_guest_virt_helper for speed.  */
4216         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4217                                                     exception);
4218         if (unlikely(gpa == UNMAPPED_GVA))
4219                 return X86EMUL_PROPAGATE_FAULT;
4220
4221         offset = addr & (PAGE_SIZE-1);
4222         if (WARN_ON(offset + bytes > PAGE_SIZE))
4223                 bytes = (unsigned)PAGE_SIZE - offset;
4224         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4225                                        offset, bytes);
4226         if (unlikely(ret < 0))
4227                 return X86EMUL_IO_NEEDED;
4228
4229         return X86EMUL_CONTINUE;
4230 }
4231
4232 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4233                                gva_t addr, void *val, unsigned int bytes,
4234                                struct x86_exception *exception)
4235 {
4236         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4237         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4238
4239         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4240                                           exception);
4241 }
4242 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4243
4244 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4245                                       gva_t addr, void *val, unsigned int bytes,
4246                                       struct x86_exception *exception)
4247 {
4248         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4249         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4250 }
4251
4252 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4253                 unsigned long addr, void *val, unsigned int bytes)
4254 {
4255         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4256         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4257
4258         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4259 }
4260
4261 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4262                                        gva_t addr, void *val,
4263                                        unsigned int bytes,
4264                                        struct x86_exception *exception)
4265 {
4266         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4267         void *data = val;
4268         int r = X86EMUL_CONTINUE;
4269
4270         while (bytes) {
4271                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4272                                                              PFERR_WRITE_MASK,
4273                                                              exception);
4274                 unsigned offset = addr & (PAGE_SIZE-1);
4275                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4276                 int ret;
4277
4278                 if (gpa == UNMAPPED_GVA)
4279                         return X86EMUL_PROPAGATE_FAULT;
4280                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4281                 if (ret < 0) {
4282                         r = X86EMUL_IO_NEEDED;
4283                         goto out;
4284                 }
4285
4286                 bytes -= towrite;
4287                 data += towrite;
4288                 addr += towrite;
4289         }
4290 out:
4291         return r;
4292 }
4293 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4294
4295 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4296                                 gpa_t *gpa, struct x86_exception *exception,
4297                                 bool write)
4298 {
4299         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4300                 | (write ? PFERR_WRITE_MASK : 0);
4301
4302         if (vcpu_match_mmio_gva(vcpu, gva)
4303             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4304                                  vcpu->arch.access, access)) {
4305                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4306                                         (gva & (PAGE_SIZE - 1));
4307                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4308                 return 1;
4309         }
4310
4311         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4312
4313         if (*gpa == UNMAPPED_GVA)
4314                 return -1;
4315
4316         /* For APIC access vmexit */
4317         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4318                 return 1;
4319
4320         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4321                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4322                 return 1;
4323         }
4324
4325         return 0;
4326 }
4327
4328 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4329                         const void *val, int bytes)
4330 {
4331         int ret;
4332
4333         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4334         if (ret < 0)
4335                 return 0;
4336         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4337         return 1;
4338 }
4339
4340 struct read_write_emulator_ops {
4341         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4342                                   int bytes);
4343         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4344                                   void *val, int bytes);
4345         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4346                                int bytes, void *val);
4347         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4348                                     void *val, int bytes);
4349         bool write;
4350 };
4351
4352 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4353 {
4354         if (vcpu->mmio_read_completed) {
4355                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4356                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4357                 vcpu->mmio_read_completed = 0;
4358                 return 1;
4359         }
4360
4361         return 0;
4362 }
4363
4364 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4365                         void *val, int bytes)
4366 {
4367         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4368 }
4369
4370 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4371                          void *val, int bytes)
4372 {
4373         return emulator_write_phys(vcpu, gpa, val, bytes);
4374 }
4375
4376 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4377 {
4378         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4379         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4380 }
4381
4382 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4383                           void *val, int bytes)
4384 {
4385         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4386         return X86EMUL_IO_NEEDED;
4387 }
4388
4389 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4390                            void *val, int bytes)
4391 {
4392         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4393
4394         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4395         return X86EMUL_CONTINUE;
4396 }
4397
4398 static const struct read_write_emulator_ops read_emultor = {
4399         .read_write_prepare = read_prepare,
4400         .read_write_emulate = read_emulate,
4401         .read_write_mmio = vcpu_mmio_read,
4402         .read_write_exit_mmio = read_exit_mmio,
4403 };
4404
4405 static const struct read_write_emulator_ops write_emultor = {
4406         .read_write_emulate = write_emulate,
4407         .read_write_mmio = write_mmio,
4408         .read_write_exit_mmio = write_exit_mmio,
4409         .write = true,
4410 };
4411
4412 static int emulator_read_write_onepage(unsigned long addr, void *val,
4413                                        unsigned int bytes,
4414                                        struct x86_exception *exception,
4415                                        struct kvm_vcpu *vcpu,
4416                                        const struct read_write_emulator_ops *ops)
4417 {
4418         gpa_t gpa;
4419         int handled, ret;
4420         bool write = ops->write;
4421         struct kvm_mmio_fragment *frag;
4422
4423         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4424
4425         if (ret < 0)
4426                 return X86EMUL_PROPAGATE_FAULT;
4427
4428         /* For APIC access vmexit */
4429         if (ret)
4430                 goto mmio;
4431
4432         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4433                 return X86EMUL_CONTINUE;
4434
4435 mmio:
4436         /*
4437          * Is this MMIO handled locally?
4438          */
4439         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4440         if (handled == bytes)
4441                 return X86EMUL_CONTINUE;
4442
4443         gpa += handled;
4444         bytes -= handled;
4445         val += handled;
4446
4447         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4448         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4449         frag->gpa = gpa;
4450         frag->data = val;
4451         frag->len = bytes;
4452         return X86EMUL_CONTINUE;
4453 }
4454
4455 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4456                         unsigned long addr,
4457                         void *val, unsigned int bytes,
4458                         struct x86_exception *exception,
4459                         const struct read_write_emulator_ops *ops)
4460 {
4461         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4462         gpa_t gpa;
4463         int rc;
4464
4465         if (ops->read_write_prepare &&
4466                   ops->read_write_prepare(vcpu, val, bytes))
4467                 return X86EMUL_CONTINUE;
4468
4469         vcpu->mmio_nr_fragments = 0;
4470
4471         /* Crossing a page boundary? */
4472         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4473                 int now;
4474
4475                 now = -addr & ~PAGE_MASK;
4476                 rc = emulator_read_write_onepage(addr, val, now, exception,
4477                                                  vcpu, ops);
4478
4479                 if (rc != X86EMUL_CONTINUE)
4480                         return rc;
4481                 addr += now;
4482                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4483                         addr = (u32)addr;
4484                 val += now;
4485                 bytes -= now;
4486         }
4487
4488         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4489                                          vcpu, ops);
4490         if (rc != X86EMUL_CONTINUE)
4491                 return rc;
4492
4493         if (!vcpu->mmio_nr_fragments)
4494                 return rc;
4495
4496         gpa = vcpu->mmio_fragments[0].gpa;
4497
4498         vcpu->mmio_needed = 1;
4499         vcpu->mmio_cur_fragment = 0;
4500
4501         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4502         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4503         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4504         vcpu->run->mmio.phys_addr = gpa;
4505
4506         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4507 }
4508
4509 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4510                                   unsigned long addr,
4511                                   void *val,
4512                                   unsigned int bytes,
4513                                   struct x86_exception *exception)
4514 {
4515         return emulator_read_write(ctxt, addr, val, bytes,
4516                                    exception, &read_emultor);
4517 }
4518
4519 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4520                             unsigned long addr,
4521                             const void *val,
4522                             unsigned int bytes,
4523                             struct x86_exception *exception)
4524 {
4525         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4526                                    exception, &write_emultor);
4527 }
4528
4529 #define CMPXCHG_TYPE(t, ptr, old, new) \
4530         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4531
4532 #ifdef CONFIG_X86_64
4533 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4534 #else
4535 #  define CMPXCHG64(ptr, old, new) \
4536         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4537 #endif
4538
4539 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4540                                      unsigned long addr,
4541                                      const void *old,
4542                                      const void *new,
4543                                      unsigned int bytes,
4544                                      struct x86_exception *exception)
4545 {
4546         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4547         gpa_t gpa;
4548         struct page *page;
4549         char *kaddr;
4550         bool exchanged;
4551
4552         /* guests cmpxchg8b have to be emulated atomically */
4553         if (bytes > 8 || (bytes & (bytes - 1)))
4554                 goto emul_write;
4555
4556         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4557
4558         if (gpa == UNMAPPED_GVA ||
4559             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4560                 goto emul_write;
4561
4562         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4563                 goto emul_write;
4564
4565         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4566         if (is_error_page(page))
4567                 goto emul_write;
4568
4569         kaddr = kmap_atomic(page);
4570         kaddr += offset_in_page(gpa);
4571         switch (bytes) {
4572         case 1:
4573                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4574                 break;
4575         case 2:
4576                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4577                 break;
4578         case 4:
4579                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4580                 break;
4581         case 8:
4582                 exchanged = CMPXCHG64(kaddr, old, new);
4583                 break;
4584         default:
4585                 BUG();
4586         }
4587         kunmap_atomic(kaddr);
4588         kvm_release_page_dirty(page);
4589
4590         if (!exchanged)
4591                 return X86EMUL_CMPXCHG_FAILED;
4592
4593         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4594         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4595
4596         return X86EMUL_CONTINUE;
4597
4598 emul_write:
4599         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4600
4601         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4602 }
4603
4604 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4605 {
4606         /* TODO: String I/O for in kernel device */
4607         int r;
4608
4609         if (vcpu->arch.pio.in)
4610                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4611                                     vcpu->arch.pio.size, pd);
4612         else
4613                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4614                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4615                                      pd);
4616         return r;
4617 }
4618
4619 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4620                                unsigned short port, void *val,
4621                                unsigned int count, bool in)
4622 {
4623         vcpu->arch.pio.port = port;
4624         vcpu->arch.pio.in = in;
4625         vcpu->arch.pio.count  = count;
4626         vcpu->arch.pio.size = size;
4627
4628         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4629                 vcpu->arch.pio.count = 0;
4630                 return 1;
4631         }
4632
4633         vcpu->run->exit_reason = KVM_EXIT_IO;
4634         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4635         vcpu->run->io.size = size;
4636         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4637         vcpu->run->io.count = count;
4638         vcpu->run->io.port = port;
4639
4640         return 0;
4641 }
4642
4643 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4644                                     int size, unsigned short port, void *val,
4645                                     unsigned int count)
4646 {
4647         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4648         int ret;
4649
4650         if (vcpu->arch.pio.count)
4651                 goto data_avail;
4652
4653         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4654         if (ret) {
4655 data_avail:
4656                 memcpy(val, vcpu->arch.pio_data, size * count);
4657                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4658                 vcpu->arch.pio.count = 0;
4659                 return 1;
4660         }
4661
4662         return 0;
4663 }
4664
4665 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4666                                      int size, unsigned short port,
4667                                      const void *val, unsigned int count)
4668 {
4669         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4670
4671         memcpy(vcpu->arch.pio_data, val, size * count);
4672         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4673         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4674 }
4675
4676 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4677 {
4678         return kvm_x86_ops->get_segment_base(vcpu, seg);
4679 }
4680
4681 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4682 {
4683         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4684 }
4685
4686 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4687 {
4688         if (!need_emulate_wbinvd(vcpu))
4689                 return X86EMUL_CONTINUE;
4690
4691         if (kvm_x86_ops->has_wbinvd_exit()) {
4692                 int cpu = get_cpu();
4693
4694                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4695                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4696                                 wbinvd_ipi, NULL, 1);
4697                 put_cpu();
4698                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4699         } else
4700                 wbinvd();
4701         return X86EMUL_CONTINUE;
4702 }
4703
4704 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4705 {
4706         kvm_x86_ops->skip_emulated_instruction(vcpu);
4707         return kvm_emulate_wbinvd_noskip(vcpu);
4708 }
4709 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4710
4711
4712
4713 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4714 {
4715         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4716 }
4717
4718 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4719                            unsigned long *dest)
4720 {
4721         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4722 }
4723
4724 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4725                            unsigned long value)
4726 {
4727
4728         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4729 }
4730
4731 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4732 {
4733         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4734 }
4735
4736 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4737 {
4738         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4739         unsigned long value;
4740
4741         switch (cr) {
4742         case 0:
4743                 value = kvm_read_cr0(vcpu);
4744                 break;
4745         case 2:
4746                 value = vcpu->arch.cr2;
4747                 break;
4748         case 3:
4749                 value = kvm_read_cr3(vcpu);
4750                 break;
4751         case 4:
4752                 value = kvm_read_cr4(vcpu);
4753                 break;
4754         case 8:
4755                 value = kvm_get_cr8(vcpu);
4756                 break;
4757         default:
4758                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4759                 return 0;
4760         }
4761
4762         return value;
4763 }
4764
4765 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4766 {
4767         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4768         int res = 0;
4769
4770         switch (cr) {
4771         case 0:
4772                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4773                 break;
4774         case 2:
4775                 vcpu->arch.cr2 = val;
4776                 break;
4777         case 3:
4778                 res = kvm_set_cr3(vcpu, val);
4779                 break;
4780         case 4:
4781                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4782                 break;
4783         case 8:
4784                 res = kvm_set_cr8(vcpu, val);
4785                 break;
4786         default:
4787                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4788                 res = -1;
4789         }
4790
4791         return res;
4792 }
4793
4794 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4795 {
4796         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4797 }
4798
4799 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4800 {
4801         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4802 }
4803
4804 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4805 {
4806         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4807 }
4808
4809 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4810 {
4811         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4812 }
4813
4814 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4815 {
4816         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4817 }
4818
4819 static unsigned long emulator_get_cached_segment_base(
4820         struct x86_emulate_ctxt *ctxt, int seg)
4821 {
4822         return get_segment_base(emul_to_vcpu(ctxt), seg);
4823 }
4824
4825 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4826                                  struct desc_struct *desc, u32 *base3,
4827                                  int seg)
4828 {
4829         struct kvm_segment var;
4830
4831         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4832         *selector = var.selector;
4833
4834         if (var.unusable) {
4835                 memset(desc, 0, sizeof(*desc));
4836                 return false;
4837         }
4838
4839         if (var.g)
4840                 var.limit >>= 12;
4841         set_desc_limit(desc, var.limit);
4842         set_desc_base(desc, (unsigned long)var.base);
4843 #ifdef CONFIG_X86_64
4844         if (base3)
4845                 *base3 = var.base >> 32;
4846 #endif
4847         desc->type = var.type;
4848         desc->s = var.s;
4849         desc->dpl = var.dpl;
4850         desc->p = var.present;
4851         desc->avl = var.avl;
4852         desc->l = var.l;
4853         desc->d = var.db;
4854         desc->g = var.g;
4855
4856         return true;
4857 }
4858
4859 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4860                                  struct desc_struct *desc, u32 base3,
4861                                  int seg)
4862 {
4863         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4864         struct kvm_segment var;
4865
4866         var.selector = selector;
4867         var.base = get_desc_base(desc);
4868 #ifdef CONFIG_X86_64
4869         var.base |= ((u64)base3) << 32;
4870 #endif
4871         var.limit = get_desc_limit(desc);
4872         if (desc->g)
4873                 var.limit = (var.limit << 12) | 0xfff;
4874         var.type = desc->type;
4875         var.dpl = desc->dpl;
4876         var.db = desc->d;
4877         var.s = desc->s;
4878         var.l = desc->l;
4879         var.g = desc->g;
4880         var.avl = desc->avl;
4881         var.present = desc->p;
4882         var.unusable = !var.present;
4883         var.padding = 0;
4884
4885         kvm_set_segment(vcpu, &var, seg);
4886         return;
4887 }
4888
4889 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4890                             u32 msr_index, u64 *pdata)
4891 {
4892         struct msr_data msr;
4893         int r;
4894
4895         msr.index = msr_index;
4896         msr.host_initiated = false;
4897         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4898         if (r)
4899                 return r;
4900
4901         *pdata = msr.data;
4902         return 0;
4903 }
4904
4905 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4906                             u32 msr_index, u64 data)
4907 {
4908         struct msr_data msr;
4909
4910         msr.data = data;
4911         msr.index = msr_index;
4912         msr.host_initiated = false;
4913         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4914 }
4915
4916 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4917 {
4918         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4919
4920         return vcpu->arch.smbase;
4921 }
4922
4923 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4924 {
4925         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4926
4927         vcpu->arch.smbase = smbase;
4928 }
4929
4930 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4931                               u32 pmc)
4932 {
4933         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4934 }
4935
4936 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4937                              u32 pmc, u64 *pdata)
4938 {
4939         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4940 }
4941
4942 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4943 {
4944         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4945 }
4946
4947 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4948 {
4949         preempt_disable();
4950         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4951         /*
4952          * CR0.TS may reference the host fpu state, not the guest fpu state,
4953          * so it may be clear at this point.
4954          */
4955         clts();
4956 }
4957
4958 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4959 {
4960         preempt_enable();
4961 }
4962
4963 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4964                               struct x86_instruction_info *info,
4965                               enum x86_intercept_stage stage)
4966 {
4967         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4968 }
4969
4970 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4971                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4972 {
4973         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4974 }
4975
4976 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4977 {
4978         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4979 }
4980
4981 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4982 {
4983         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4984 }
4985
4986 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4987 {
4988         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4989 }
4990
4991 static const struct x86_emulate_ops emulate_ops = {
4992         .read_gpr            = emulator_read_gpr,
4993         .write_gpr           = emulator_write_gpr,
4994         .read_std            = kvm_read_guest_virt_system,
4995         .write_std           = kvm_write_guest_virt_system,
4996         .read_phys           = kvm_read_guest_phys_system,
4997         .fetch               = kvm_fetch_guest_virt,
4998         .read_emulated       = emulator_read_emulated,
4999         .write_emulated      = emulator_write_emulated,
5000         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5001         .invlpg              = emulator_invlpg,
5002         .pio_in_emulated     = emulator_pio_in_emulated,
5003         .pio_out_emulated    = emulator_pio_out_emulated,
5004         .get_segment         = emulator_get_segment,
5005         .set_segment         = emulator_set_segment,
5006         .get_cached_segment_base = emulator_get_cached_segment_base,
5007         .get_gdt             = emulator_get_gdt,
5008         .get_idt             = emulator_get_idt,
5009         .set_gdt             = emulator_set_gdt,
5010         .set_idt             = emulator_set_idt,
5011         .get_cr              = emulator_get_cr,
5012         .set_cr              = emulator_set_cr,
5013         .cpl                 = emulator_get_cpl,
5014         .get_dr              = emulator_get_dr,
5015         .set_dr              = emulator_set_dr,
5016         .get_smbase          = emulator_get_smbase,
5017         .set_smbase          = emulator_set_smbase,
5018         .set_msr             = emulator_set_msr,
5019         .get_msr             = emulator_get_msr,
5020         .check_pmc           = emulator_check_pmc,
5021         .read_pmc            = emulator_read_pmc,
5022         .halt                = emulator_halt,
5023         .wbinvd              = emulator_wbinvd,
5024         .fix_hypercall       = emulator_fix_hypercall,
5025         .get_fpu             = emulator_get_fpu,
5026         .put_fpu             = emulator_put_fpu,
5027         .intercept           = emulator_intercept,
5028         .get_cpuid           = emulator_get_cpuid,
5029         .set_nmi_mask        = emulator_set_nmi_mask,
5030 };
5031
5032 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5033 {
5034         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5035         /*
5036          * an sti; sti; sequence only disable interrupts for the first
5037          * instruction. So, if the last instruction, be it emulated or
5038          * not, left the system with the INT_STI flag enabled, it
5039          * means that the last instruction is an sti. We should not
5040          * leave the flag on in this case. The same goes for mov ss
5041          */
5042         if (int_shadow & mask)
5043                 mask = 0;
5044         if (unlikely(int_shadow || mask)) {
5045                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5046                 if (!mask)
5047                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5048         }
5049 }
5050
5051 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5052 {
5053         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5054         if (ctxt->exception.vector == PF_VECTOR)
5055                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5056
5057         if (ctxt->exception.error_code_valid)
5058                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5059                                       ctxt->exception.error_code);
5060         else
5061                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5062         return false;
5063 }
5064
5065 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5066 {
5067         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5068         int cs_db, cs_l;
5069
5070         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5071
5072         ctxt->eflags = kvm_get_rflags(vcpu);
5073         ctxt->eip = kvm_rip_read(vcpu);
5074         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5075                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5076                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5077                      cs_db                              ? X86EMUL_MODE_PROT32 :
5078                                                           X86EMUL_MODE_PROT16;
5079         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5080         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5081         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5082         ctxt->emul_flags = vcpu->arch.hflags;
5083
5084         init_decode_cache(ctxt);
5085         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5086 }
5087
5088 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5089 {
5090         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5091         int ret;
5092
5093         init_emulate_ctxt(vcpu);
5094
5095         ctxt->op_bytes = 2;
5096         ctxt->ad_bytes = 2;
5097         ctxt->_eip = ctxt->eip + inc_eip;
5098         ret = emulate_int_real(ctxt, irq);
5099
5100         if (ret != X86EMUL_CONTINUE)
5101                 return EMULATE_FAIL;
5102
5103         ctxt->eip = ctxt->_eip;
5104         kvm_rip_write(vcpu, ctxt->eip);
5105         kvm_set_rflags(vcpu, ctxt->eflags);
5106
5107         if (irq == NMI_VECTOR)
5108                 vcpu->arch.nmi_pending = 0;
5109         else
5110                 vcpu->arch.interrupt.pending = false;
5111
5112         return EMULATE_DONE;
5113 }
5114 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5115
5116 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5117 {
5118         int r = EMULATE_DONE;
5119
5120         ++vcpu->stat.insn_emulation_fail;
5121         trace_kvm_emulate_insn_failed(vcpu);
5122         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5123                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5124                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5125                 vcpu->run->internal.ndata = 0;
5126                 r = EMULATE_FAIL;
5127         }
5128         kvm_queue_exception(vcpu, UD_VECTOR);
5129
5130         return r;
5131 }
5132
5133 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5134                                   bool write_fault_to_shadow_pgtable,
5135                                   int emulation_type)
5136 {
5137         gpa_t gpa = cr2;
5138         pfn_t pfn;
5139
5140         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5141                 return false;
5142
5143         if (!vcpu->arch.mmu.direct_map) {
5144                 /*
5145                  * Write permission should be allowed since only
5146                  * write access need to be emulated.
5147                  */
5148                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5149
5150                 /*
5151                  * If the mapping is invalid in guest, let cpu retry
5152                  * it to generate fault.
5153                  */
5154                 if (gpa == UNMAPPED_GVA)
5155                         return true;
5156         }
5157
5158         /*
5159          * Do not retry the unhandleable instruction if it faults on the
5160          * readonly host memory, otherwise it will goto a infinite loop:
5161          * retry instruction -> write #PF -> emulation fail -> retry
5162          * instruction -> ...
5163          */
5164         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5165
5166         /*
5167          * If the instruction failed on the error pfn, it can not be fixed,
5168          * report the error to userspace.
5169          */
5170         if (is_error_noslot_pfn(pfn))
5171                 return false;
5172
5173         kvm_release_pfn_clean(pfn);
5174
5175         /* The instructions are well-emulated on direct mmu. */
5176         if (vcpu->arch.mmu.direct_map) {
5177                 unsigned int indirect_shadow_pages;
5178
5179                 spin_lock(&vcpu->kvm->mmu_lock);
5180                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5181                 spin_unlock(&vcpu->kvm->mmu_lock);
5182
5183                 if (indirect_shadow_pages)
5184                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5185
5186                 return true;
5187         }
5188
5189         /*
5190          * if emulation was due to access to shadowed page table
5191          * and it failed try to unshadow page and re-enter the
5192          * guest to let CPU execute the instruction.
5193          */
5194         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5195
5196         /*
5197          * If the access faults on its page table, it can not
5198          * be fixed by unprotecting shadow page and it should
5199          * be reported to userspace.
5200          */
5201         return !write_fault_to_shadow_pgtable;
5202 }
5203
5204 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5205                               unsigned long cr2,  int emulation_type)
5206 {
5207         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5208         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5209
5210         last_retry_eip = vcpu->arch.last_retry_eip;
5211         last_retry_addr = vcpu->arch.last_retry_addr;
5212
5213         /*
5214          * If the emulation is caused by #PF and it is non-page_table
5215          * writing instruction, it means the VM-EXIT is caused by shadow
5216          * page protected, we can zap the shadow page and retry this
5217          * instruction directly.
5218          *
5219          * Note: if the guest uses a non-page-table modifying instruction
5220          * on the PDE that points to the instruction, then we will unmap
5221          * the instruction and go to an infinite loop. So, we cache the
5222          * last retried eip and the last fault address, if we meet the eip
5223          * and the address again, we can break out of the potential infinite
5224          * loop.
5225          */
5226         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5227
5228         if (!(emulation_type & EMULTYPE_RETRY))
5229                 return false;
5230
5231         if (x86_page_table_writing_insn(ctxt))
5232                 return false;
5233
5234         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5235                 return false;
5236
5237         vcpu->arch.last_retry_eip = ctxt->eip;
5238         vcpu->arch.last_retry_addr = cr2;
5239
5240         if (!vcpu->arch.mmu.direct_map)
5241                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5242
5243         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5244
5245         return true;
5246 }
5247
5248 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5249 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5250
5251 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5252 {
5253         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5254                 /* This is a good place to trace that we are exiting SMM.  */
5255                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5256
5257                 if (unlikely(vcpu->arch.smi_pending)) {
5258                         kvm_make_request(KVM_REQ_SMI, vcpu);
5259                         vcpu->arch.smi_pending = 0;
5260                 } else {
5261                         /* Process a latched INIT, if any.  */
5262                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5263                 }
5264         }
5265
5266         kvm_mmu_reset_context(vcpu);
5267 }
5268
5269 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5270 {
5271         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5272
5273         vcpu->arch.hflags = emul_flags;
5274
5275         if (changed & HF_SMM_MASK)
5276                 kvm_smm_changed(vcpu);
5277 }
5278
5279 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5280                                 unsigned long *db)
5281 {
5282         u32 dr6 = 0;
5283         int i;
5284         u32 enable, rwlen;
5285
5286         enable = dr7;
5287         rwlen = dr7 >> 16;
5288         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5289                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5290                         dr6 |= (1 << i);
5291         return dr6;
5292 }
5293
5294 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5295 {
5296         struct kvm_run *kvm_run = vcpu->run;
5297
5298         /*
5299          * rflags is the old, "raw" value of the flags.  The new value has
5300          * not been saved yet.
5301          *
5302          * This is correct even for TF set by the guest, because "the
5303          * processor will not generate this exception after the instruction
5304          * that sets the TF flag".
5305          */
5306         if (unlikely(rflags & X86_EFLAGS_TF)) {
5307                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5308                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5309                                                   DR6_RTM;
5310                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5311                         kvm_run->debug.arch.exception = DB_VECTOR;
5312                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5313                         *r = EMULATE_USER_EXIT;
5314                 } else {
5315                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5316                         /*
5317                          * "Certain debug exceptions may clear bit 0-3.  The
5318                          * remaining contents of the DR6 register are never
5319                          * cleared by the processor".
5320                          */
5321                         vcpu->arch.dr6 &= ~15;
5322                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5323                         kvm_queue_exception(vcpu, DB_VECTOR);
5324                 }
5325         }
5326 }
5327
5328 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5329 {
5330         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5331             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5332                 struct kvm_run *kvm_run = vcpu->run;
5333                 unsigned long eip = kvm_get_linear_rip(vcpu);
5334                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5335                                            vcpu->arch.guest_debug_dr7,
5336                                            vcpu->arch.eff_db);
5337
5338                 if (dr6 != 0) {
5339                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5340                         kvm_run->debug.arch.pc = eip;
5341                         kvm_run->debug.arch.exception = DB_VECTOR;
5342                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5343                         *r = EMULATE_USER_EXIT;
5344                         return true;
5345                 }
5346         }
5347
5348         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5349             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5350                 unsigned long eip = kvm_get_linear_rip(vcpu);
5351                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5352                                            vcpu->arch.dr7,
5353                                            vcpu->arch.db);
5354
5355                 if (dr6 != 0) {
5356                         vcpu->arch.dr6 &= ~15;
5357                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5358                         kvm_queue_exception(vcpu, DB_VECTOR);
5359                         *r = EMULATE_DONE;
5360                         return true;
5361                 }
5362         }
5363
5364         return false;
5365 }
5366
5367 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5368                             unsigned long cr2,
5369                             int emulation_type,
5370                             void *insn,
5371                             int insn_len)
5372 {
5373         int r;
5374         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5375         bool writeback = true;
5376         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5377
5378         /*
5379          * Clear write_fault_to_shadow_pgtable here to ensure it is
5380          * never reused.
5381          */
5382         vcpu->arch.write_fault_to_shadow_pgtable = false;
5383         kvm_clear_exception_queue(vcpu);
5384
5385         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5386                 init_emulate_ctxt(vcpu);
5387
5388                 /*
5389                  * We will reenter on the same instruction since
5390                  * we do not set complete_userspace_io.  This does not
5391                  * handle watchpoints yet, those would be handled in
5392                  * the emulate_ops.
5393                  */
5394                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5395                         return r;
5396
5397                 ctxt->interruptibility = 0;
5398                 ctxt->have_exception = false;
5399                 ctxt->exception.vector = -1;
5400                 ctxt->perm_ok = false;
5401
5402                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5403
5404                 r = x86_decode_insn(ctxt, insn, insn_len);
5405
5406                 trace_kvm_emulate_insn_start(vcpu);
5407                 ++vcpu->stat.insn_emulation;
5408                 if (r != EMULATION_OK)  {
5409                         if (emulation_type & EMULTYPE_TRAP_UD)
5410                                 return EMULATE_FAIL;
5411                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5412                                                 emulation_type))
5413                                 return EMULATE_DONE;
5414                         if (emulation_type & EMULTYPE_SKIP)
5415                                 return EMULATE_FAIL;
5416                         return handle_emulation_failure(vcpu);
5417                 }
5418         }
5419
5420         if (emulation_type & EMULTYPE_SKIP) {
5421                 kvm_rip_write(vcpu, ctxt->_eip);
5422                 if (ctxt->eflags & X86_EFLAGS_RF)
5423                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5424                 return EMULATE_DONE;
5425         }
5426
5427         if (retry_instruction(ctxt, cr2, emulation_type))
5428                 return EMULATE_DONE;
5429
5430         /* this is needed for vmware backdoor interface to work since it
5431            changes registers values  during IO operation */
5432         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5433                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5434                 emulator_invalidate_register_cache(ctxt);
5435         }
5436
5437 restart:
5438         r = x86_emulate_insn(ctxt);
5439
5440         if (r == EMULATION_INTERCEPTED)
5441                 return EMULATE_DONE;
5442
5443         if (r == EMULATION_FAILED) {
5444                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5445                                         emulation_type))
5446                         return EMULATE_DONE;
5447
5448                 return handle_emulation_failure(vcpu);
5449         }
5450
5451         if (ctxt->have_exception) {
5452                 r = EMULATE_DONE;
5453                 if (inject_emulated_exception(vcpu))
5454                         return r;
5455         } else if (vcpu->arch.pio.count) {
5456                 if (!vcpu->arch.pio.in) {
5457                         /* FIXME: return into emulator if single-stepping.  */
5458                         vcpu->arch.pio.count = 0;
5459                 } else {
5460                         writeback = false;
5461                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5462                 }
5463                 r = EMULATE_USER_EXIT;
5464         } else if (vcpu->mmio_needed) {
5465                 if (!vcpu->mmio_is_write)
5466                         writeback = false;
5467                 r = EMULATE_USER_EXIT;
5468                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5469         } else if (r == EMULATION_RESTART)
5470                 goto restart;
5471         else
5472                 r = EMULATE_DONE;
5473
5474         if (writeback) {
5475                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5476                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5477                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5478                 if (vcpu->arch.hflags != ctxt->emul_flags)
5479                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5480                 kvm_rip_write(vcpu, ctxt->eip);
5481                 if (r == EMULATE_DONE)
5482                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5483                 if (!ctxt->have_exception ||
5484                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5485                         __kvm_set_rflags(vcpu, ctxt->eflags);
5486
5487                 /*
5488                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5489                  * do nothing, and it will be requested again as soon as
5490                  * the shadow expires.  But we still need to check here,
5491                  * because POPF has no interrupt shadow.
5492                  */
5493                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5494                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5495         } else
5496                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5497
5498         return r;
5499 }
5500 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5501
5502 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5503 {
5504         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5505         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5506                                             size, port, &val, 1);
5507         /* do not return to emulator after return from userspace */
5508         vcpu->arch.pio.count = 0;
5509         return ret;
5510 }
5511 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5512
5513 static void tsc_bad(void *info)
5514 {
5515         __this_cpu_write(cpu_tsc_khz, 0);
5516 }
5517
5518 static void tsc_khz_changed(void *data)
5519 {
5520         struct cpufreq_freqs *freq = data;
5521         unsigned long khz = 0;
5522
5523         if (data)
5524                 khz = freq->new;
5525         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5526                 khz = cpufreq_quick_get(raw_smp_processor_id());
5527         if (!khz)
5528                 khz = tsc_khz;
5529         __this_cpu_write(cpu_tsc_khz, khz);
5530 }
5531
5532 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5533                                      void *data)
5534 {
5535         struct cpufreq_freqs *freq = data;
5536         struct kvm *kvm;
5537         struct kvm_vcpu *vcpu;
5538         int i, send_ipi = 0;
5539
5540         /*
5541          * We allow guests to temporarily run on slowing clocks,
5542          * provided we notify them after, or to run on accelerating
5543          * clocks, provided we notify them before.  Thus time never
5544          * goes backwards.
5545          *
5546          * However, we have a problem.  We can't atomically update
5547          * the frequency of a given CPU from this function; it is
5548          * merely a notifier, which can be called from any CPU.
5549          * Changing the TSC frequency at arbitrary points in time
5550          * requires a recomputation of local variables related to
5551          * the TSC for each VCPU.  We must flag these local variables
5552          * to be updated and be sure the update takes place with the
5553          * new frequency before any guests proceed.
5554          *
5555          * Unfortunately, the combination of hotplug CPU and frequency
5556          * change creates an intractable locking scenario; the order
5557          * of when these callouts happen is undefined with respect to
5558          * CPU hotplug, and they can race with each other.  As such,
5559          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5560          * undefined; you can actually have a CPU frequency change take
5561          * place in between the computation of X and the setting of the
5562          * variable.  To protect against this problem, all updates of
5563          * the per_cpu tsc_khz variable are done in an interrupt
5564          * protected IPI, and all callers wishing to update the value
5565          * must wait for a synchronous IPI to complete (which is trivial
5566          * if the caller is on the CPU already).  This establishes the
5567          * necessary total order on variable updates.
5568          *
5569          * Note that because a guest time update may take place
5570          * anytime after the setting of the VCPU's request bit, the
5571          * correct TSC value must be set before the request.  However,
5572          * to ensure the update actually makes it to any guest which
5573          * starts running in hardware virtualization between the set
5574          * and the acquisition of the spinlock, we must also ping the
5575          * CPU after setting the request bit.
5576          *
5577          */
5578
5579         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5580                 return 0;
5581         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5582                 return 0;
5583
5584         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5585
5586         spin_lock(&kvm_lock);
5587         list_for_each_entry(kvm, &vm_list, vm_list) {
5588                 kvm_for_each_vcpu(i, vcpu, kvm) {
5589                         if (vcpu->cpu != freq->cpu)
5590                                 continue;
5591                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5592                         if (vcpu->cpu != smp_processor_id())
5593                                 send_ipi = 1;
5594                 }
5595         }
5596         spin_unlock(&kvm_lock);
5597
5598         if (freq->old < freq->new && send_ipi) {
5599                 /*
5600                  * We upscale the frequency.  Must make the guest
5601                  * doesn't see old kvmclock values while running with
5602                  * the new frequency, otherwise we risk the guest sees
5603                  * time go backwards.
5604                  *
5605                  * In case we update the frequency for another cpu
5606                  * (which might be in guest context) send an interrupt
5607                  * to kick the cpu out of guest context.  Next time
5608                  * guest context is entered kvmclock will be updated,
5609                  * so the guest will not see stale values.
5610                  */
5611                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5612         }
5613         return 0;
5614 }
5615
5616 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5617         .notifier_call  = kvmclock_cpufreq_notifier
5618 };
5619
5620 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5621                                         unsigned long action, void *hcpu)
5622 {
5623         unsigned int cpu = (unsigned long)hcpu;
5624
5625         switch (action) {
5626                 case CPU_ONLINE:
5627                 case CPU_DOWN_FAILED:
5628                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5629                         break;
5630                 case CPU_DOWN_PREPARE:
5631                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5632                         break;
5633         }
5634         return NOTIFY_OK;
5635 }
5636
5637 static struct notifier_block kvmclock_cpu_notifier_block = {
5638         .notifier_call  = kvmclock_cpu_notifier,
5639         .priority = -INT_MAX
5640 };
5641
5642 static void kvm_timer_init(void)
5643 {
5644         int cpu;
5645
5646         max_tsc_khz = tsc_khz;
5647
5648         cpu_notifier_register_begin();
5649         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5650 #ifdef CONFIG_CPU_FREQ
5651                 struct cpufreq_policy policy;
5652                 memset(&policy, 0, sizeof(policy));
5653                 cpu = get_cpu();
5654                 cpufreq_get_policy(&policy, cpu);
5655                 if (policy.cpuinfo.max_freq)
5656                         max_tsc_khz = policy.cpuinfo.max_freq;
5657                 put_cpu();
5658 #endif
5659                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5660                                           CPUFREQ_TRANSITION_NOTIFIER);
5661         }
5662         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5663         for_each_online_cpu(cpu)
5664                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5665
5666         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5667         cpu_notifier_register_done();
5668
5669 }
5670
5671 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5672
5673 int kvm_is_in_guest(void)
5674 {
5675         return __this_cpu_read(current_vcpu) != NULL;
5676 }
5677
5678 static int kvm_is_user_mode(void)
5679 {
5680         int user_mode = 3;
5681
5682         if (__this_cpu_read(current_vcpu))
5683                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5684
5685         return user_mode != 0;
5686 }
5687
5688 static unsigned long kvm_get_guest_ip(void)
5689 {
5690         unsigned long ip = 0;
5691
5692         if (__this_cpu_read(current_vcpu))
5693                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5694
5695         return ip;
5696 }
5697
5698 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5699         .is_in_guest            = kvm_is_in_guest,
5700         .is_user_mode           = kvm_is_user_mode,
5701         .get_guest_ip           = kvm_get_guest_ip,
5702 };
5703
5704 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5705 {
5706         __this_cpu_write(current_vcpu, vcpu);
5707 }
5708 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5709
5710 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5711 {
5712         __this_cpu_write(current_vcpu, NULL);
5713 }
5714 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5715
5716 static void kvm_set_mmio_spte_mask(void)
5717 {
5718         u64 mask;
5719         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5720
5721         /*
5722          * Set the reserved bits and the present bit of an paging-structure
5723          * entry to generate page fault with PFER.RSV = 1.
5724          */
5725          /* Mask the reserved physical address bits. */
5726         mask = rsvd_bits(maxphyaddr, 51);
5727
5728         /* Bit 62 is always reserved for 32bit host. */
5729         mask |= 0x3ull << 62;
5730
5731         /* Set the present bit. */
5732         mask |= 1ull;
5733
5734 #ifdef CONFIG_X86_64
5735         /*
5736          * If reserved bit is not supported, clear the present bit to disable
5737          * mmio page fault.
5738          */
5739         if (maxphyaddr == 52)
5740                 mask &= ~1ull;
5741 #endif
5742
5743         kvm_mmu_set_mmio_spte_mask(mask);
5744 }
5745
5746 #ifdef CONFIG_X86_64
5747 static void pvclock_gtod_update_fn(struct work_struct *work)
5748 {
5749         struct kvm *kvm;
5750
5751         struct kvm_vcpu *vcpu;
5752         int i;
5753
5754         spin_lock(&kvm_lock);
5755         list_for_each_entry(kvm, &vm_list, vm_list)
5756                 kvm_for_each_vcpu(i, vcpu, kvm)
5757                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5758         atomic_set(&kvm_guest_has_master_clock, 0);
5759         spin_unlock(&kvm_lock);
5760 }
5761
5762 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5763
5764 /*
5765  * Notification about pvclock gtod data update.
5766  */
5767 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5768                                void *priv)
5769 {
5770         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5771         struct timekeeper *tk = priv;
5772
5773         update_pvclock_gtod(tk);
5774
5775         /* disable master clock if host does not trust, or does not
5776          * use, TSC clocksource
5777          */
5778         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5779             atomic_read(&kvm_guest_has_master_clock) != 0)
5780                 queue_work(system_long_wq, &pvclock_gtod_work);
5781
5782         return 0;
5783 }
5784
5785 static struct notifier_block pvclock_gtod_notifier = {
5786         .notifier_call = pvclock_gtod_notify,
5787 };
5788 #endif
5789
5790 int kvm_arch_init(void *opaque)
5791 {
5792         int r;
5793         struct kvm_x86_ops *ops = opaque;
5794
5795         if (kvm_x86_ops) {
5796                 printk(KERN_ERR "kvm: already loaded the other module\n");
5797                 r = -EEXIST;
5798                 goto out;
5799         }
5800
5801         if (!ops->cpu_has_kvm_support()) {
5802                 printk(KERN_ERR "kvm: no hardware support\n");
5803                 r = -EOPNOTSUPP;
5804                 goto out;
5805         }
5806         if (ops->disabled_by_bios()) {
5807                 printk(KERN_ERR "kvm: disabled by bios\n");
5808                 r = -EOPNOTSUPP;
5809                 goto out;
5810         }
5811
5812         r = -ENOMEM;
5813         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5814         if (!shared_msrs) {
5815                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5816                 goto out;
5817         }
5818
5819 #ifdef CONFIG_PREEMPT_RT_FULL
5820         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5821                 printk(KERN_ERR "RT requires X86_FEATURE_CONSTANT_TSC\n");
5822                 return -EOPNOTSUPP;
5823         }
5824 #endif
5825
5826         r = kvm_mmu_module_init();
5827         if (r)
5828                 goto out_free_percpu;
5829
5830         kvm_set_mmio_spte_mask();
5831
5832         kvm_x86_ops = ops;
5833
5834         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5835                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5836
5837         kvm_timer_init();
5838
5839         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5840
5841         if (cpu_has_xsave)
5842                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5843
5844         kvm_lapic_init();
5845 #ifdef CONFIG_X86_64
5846         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5847 #endif
5848
5849         return 0;
5850
5851 out_free_percpu:
5852         free_percpu(shared_msrs);
5853 out:
5854         return r;
5855 }
5856
5857 void kvm_arch_exit(void)
5858 {
5859         kvm_lapic_exit();
5860         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5861
5862         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5863                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5864                                             CPUFREQ_TRANSITION_NOTIFIER);
5865         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5866 #ifdef CONFIG_X86_64
5867         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5868 #endif
5869         kvm_x86_ops = NULL;
5870         kvm_mmu_module_exit();
5871         free_percpu(shared_msrs);
5872 }
5873
5874 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5875 {
5876         ++vcpu->stat.halt_exits;
5877         if (lapic_in_kernel(vcpu)) {
5878                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5879                 return 1;
5880         } else {
5881                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5882                 return 0;
5883         }
5884 }
5885 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5886
5887 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5888 {
5889         kvm_x86_ops->skip_emulated_instruction(vcpu);
5890         return kvm_vcpu_halt(vcpu);
5891 }
5892 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5893
5894 /*
5895  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5896  *
5897  * @apicid - apicid of vcpu to be kicked.
5898  */
5899 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5900 {
5901         struct kvm_lapic_irq lapic_irq;
5902
5903         lapic_irq.shorthand = 0;
5904         lapic_irq.dest_mode = 0;
5905         lapic_irq.dest_id = apicid;
5906         lapic_irq.msi_redir_hint = false;
5907
5908         lapic_irq.delivery_mode = APIC_DM_REMRD;
5909         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5910 }
5911
5912 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5913 {
5914         unsigned long nr, a0, a1, a2, a3, ret;
5915         int op_64_bit, r = 1;
5916
5917         kvm_x86_ops->skip_emulated_instruction(vcpu);
5918
5919         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5920                 return kvm_hv_hypercall(vcpu);
5921
5922         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5923         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5924         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5925         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5926         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5927
5928         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5929
5930         op_64_bit = is_64_bit_mode(vcpu);
5931         if (!op_64_bit) {
5932                 nr &= 0xFFFFFFFF;
5933                 a0 &= 0xFFFFFFFF;
5934                 a1 &= 0xFFFFFFFF;
5935                 a2 &= 0xFFFFFFFF;
5936                 a3 &= 0xFFFFFFFF;
5937         }
5938
5939         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5940                 ret = -KVM_EPERM;
5941                 goto out;
5942         }
5943
5944         switch (nr) {
5945         case KVM_HC_VAPIC_POLL_IRQ:
5946                 ret = 0;
5947                 break;
5948         case KVM_HC_KICK_CPU:
5949                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5950                 ret = 0;
5951                 break;
5952         default:
5953                 ret = -KVM_ENOSYS;
5954                 break;
5955         }
5956 out:
5957         if (!op_64_bit)
5958                 ret = (u32)ret;
5959         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5960         ++vcpu->stat.hypercalls;
5961         return r;
5962 }
5963 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5964
5965 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5966 {
5967         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5968         char instruction[3];
5969         unsigned long rip = kvm_rip_read(vcpu);
5970
5971         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5972
5973         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5974 }
5975
5976 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5977 {
5978         return vcpu->run->request_interrupt_window &&
5979                 likely(!pic_in_kernel(vcpu->kvm));
5980 }
5981
5982 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5983 {
5984         struct kvm_run *kvm_run = vcpu->run;
5985
5986         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5987         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5988         kvm_run->cr8 = kvm_get_cr8(vcpu);
5989         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5990         kvm_run->ready_for_interrupt_injection =
5991                 pic_in_kernel(vcpu->kvm) ||
5992                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
5993 }
5994
5995 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5996 {
5997         int max_irr, tpr;
5998
5999         if (!kvm_x86_ops->update_cr8_intercept)
6000                 return;
6001
6002         if (!vcpu->arch.apic)
6003                 return;
6004
6005         if (!vcpu->arch.apic->vapic_addr)
6006                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6007         else
6008                 max_irr = -1;
6009
6010         if (max_irr != -1)
6011                 max_irr >>= 4;
6012
6013         tpr = kvm_lapic_get_cr8(vcpu);
6014
6015         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6016 }
6017
6018 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6019 {
6020         int r;
6021
6022         /* try to reinject previous events if any */
6023         if (vcpu->arch.exception.pending) {
6024                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6025                                         vcpu->arch.exception.has_error_code,
6026                                         vcpu->arch.exception.error_code);
6027
6028                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6029                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6030                                              X86_EFLAGS_RF);
6031
6032                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6033                     (vcpu->arch.dr7 & DR7_GD)) {
6034                         vcpu->arch.dr7 &= ~DR7_GD;
6035                         kvm_update_dr7(vcpu);
6036                 }
6037
6038                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6039                                           vcpu->arch.exception.has_error_code,
6040                                           vcpu->arch.exception.error_code,
6041                                           vcpu->arch.exception.reinject);
6042                 return 0;
6043         }
6044
6045         if (vcpu->arch.nmi_injected) {
6046                 kvm_x86_ops->set_nmi(vcpu);
6047                 return 0;
6048         }
6049
6050         if (vcpu->arch.interrupt.pending) {
6051                 kvm_x86_ops->set_irq(vcpu);
6052                 return 0;
6053         }
6054
6055         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6056                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6057                 if (r != 0)
6058                         return r;
6059         }
6060
6061         /* try to inject new event if pending */
6062         if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6063                 --vcpu->arch.nmi_pending;
6064                 vcpu->arch.nmi_injected = true;
6065                 kvm_x86_ops->set_nmi(vcpu);
6066         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6067                 /*
6068                  * Because interrupts can be injected asynchronously, we are
6069                  * calling check_nested_events again here to avoid a race condition.
6070                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6071                  * proposal and current concerns.  Perhaps we should be setting
6072                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6073                  */
6074                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6075                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6076                         if (r != 0)
6077                                 return r;
6078                 }
6079                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6080                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6081                                             false);
6082                         kvm_x86_ops->set_irq(vcpu);
6083                 }
6084         }
6085         return 0;
6086 }
6087
6088 static void process_nmi(struct kvm_vcpu *vcpu)
6089 {
6090         unsigned limit = 2;
6091
6092         /*
6093          * x86 is limited to one NMI running, and one NMI pending after it.
6094          * If an NMI is already in progress, limit further NMIs to just one.
6095          * Otherwise, allow two (and we'll inject the first one immediately).
6096          */
6097         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6098                 limit = 1;
6099
6100         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6101         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6102         kvm_make_request(KVM_REQ_EVENT, vcpu);
6103 }
6104
6105 #define put_smstate(type, buf, offset, val)                       \
6106         *(type *)((buf) + (offset) - 0x7e00) = val
6107
6108 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6109 {
6110         u32 flags = 0;
6111         flags |= seg->g       << 23;
6112         flags |= seg->db      << 22;
6113         flags |= seg->l       << 21;
6114         flags |= seg->avl     << 20;
6115         flags |= seg->present << 15;
6116         flags |= seg->dpl     << 13;
6117         flags |= seg->s       << 12;
6118         flags |= seg->type    << 8;
6119         return flags;
6120 }
6121
6122 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6123 {
6124         struct kvm_segment seg;
6125         int offset;
6126
6127         kvm_get_segment(vcpu, &seg, n);
6128         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6129
6130         if (n < 3)
6131                 offset = 0x7f84 + n * 12;
6132         else
6133                 offset = 0x7f2c + (n - 3) * 12;
6134
6135         put_smstate(u32, buf, offset + 8, seg.base);
6136         put_smstate(u32, buf, offset + 4, seg.limit);
6137         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6138 }
6139
6140 #ifdef CONFIG_X86_64
6141 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6142 {
6143         struct kvm_segment seg;
6144         int offset;
6145         u16 flags;
6146
6147         kvm_get_segment(vcpu, &seg, n);
6148         offset = 0x7e00 + n * 16;
6149
6150         flags = process_smi_get_segment_flags(&seg) >> 8;
6151         put_smstate(u16, buf, offset, seg.selector);
6152         put_smstate(u16, buf, offset + 2, flags);
6153         put_smstate(u32, buf, offset + 4, seg.limit);
6154         put_smstate(u64, buf, offset + 8, seg.base);
6155 }
6156 #endif
6157
6158 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6159 {
6160         struct desc_ptr dt;
6161         struct kvm_segment seg;
6162         unsigned long val;
6163         int i;
6164
6165         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6166         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6167         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6168         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6169
6170         for (i = 0; i < 8; i++)
6171                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6172
6173         kvm_get_dr(vcpu, 6, &val);
6174         put_smstate(u32, buf, 0x7fcc, (u32)val);
6175         kvm_get_dr(vcpu, 7, &val);
6176         put_smstate(u32, buf, 0x7fc8, (u32)val);
6177
6178         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6179         put_smstate(u32, buf, 0x7fc4, seg.selector);
6180         put_smstate(u32, buf, 0x7f64, seg.base);
6181         put_smstate(u32, buf, 0x7f60, seg.limit);
6182         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6183
6184         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6185         put_smstate(u32, buf, 0x7fc0, seg.selector);
6186         put_smstate(u32, buf, 0x7f80, seg.base);
6187         put_smstate(u32, buf, 0x7f7c, seg.limit);
6188         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6189
6190         kvm_x86_ops->get_gdt(vcpu, &dt);
6191         put_smstate(u32, buf, 0x7f74, dt.address);
6192         put_smstate(u32, buf, 0x7f70, dt.size);
6193
6194         kvm_x86_ops->get_idt(vcpu, &dt);
6195         put_smstate(u32, buf, 0x7f58, dt.address);
6196         put_smstate(u32, buf, 0x7f54, dt.size);
6197
6198         for (i = 0; i < 6; i++)
6199                 process_smi_save_seg_32(vcpu, buf, i);
6200
6201         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6202
6203         /* revision id */
6204         put_smstate(u32, buf, 0x7efc, 0x00020000);
6205         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6206 }
6207
6208 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6209 {
6210 #ifdef CONFIG_X86_64
6211         struct desc_ptr dt;
6212         struct kvm_segment seg;
6213         unsigned long val;
6214         int i;
6215
6216         for (i = 0; i < 16; i++)
6217                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6218
6219         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6220         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6221
6222         kvm_get_dr(vcpu, 6, &val);
6223         put_smstate(u64, buf, 0x7f68, val);
6224         kvm_get_dr(vcpu, 7, &val);
6225         put_smstate(u64, buf, 0x7f60, val);
6226
6227         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6228         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6229         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6230
6231         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6232
6233         /* revision id */
6234         put_smstate(u32, buf, 0x7efc, 0x00020064);
6235
6236         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6237
6238         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6239         put_smstate(u16, buf, 0x7e90, seg.selector);
6240         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6241         put_smstate(u32, buf, 0x7e94, seg.limit);
6242         put_smstate(u64, buf, 0x7e98, seg.base);
6243
6244         kvm_x86_ops->get_idt(vcpu, &dt);
6245         put_smstate(u32, buf, 0x7e84, dt.size);
6246         put_smstate(u64, buf, 0x7e88, dt.address);
6247
6248         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6249         put_smstate(u16, buf, 0x7e70, seg.selector);
6250         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6251         put_smstate(u32, buf, 0x7e74, seg.limit);
6252         put_smstate(u64, buf, 0x7e78, seg.base);
6253
6254         kvm_x86_ops->get_gdt(vcpu, &dt);
6255         put_smstate(u32, buf, 0x7e64, dt.size);
6256         put_smstate(u64, buf, 0x7e68, dt.address);
6257
6258         for (i = 0; i < 6; i++)
6259                 process_smi_save_seg_64(vcpu, buf, i);
6260 #else
6261         WARN_ON_ONCE(1);
6262 #endif
6263 }
6264
6265 static void process_smi(struct kvm_vcpu *vcpu)
6266 {
6267         struct kvm_segment cs, ds;
6268         struct desc_ptr dt;
6269         char buf[512];
6270         u32 cr0;
6271
6272         if (is_smm(vcpu)) {
6273                 vcpu->arch.smi_pending = true;
6274                 return;
6275         }
6276
6277         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6278         vcpu->arch.hflags |= HF_SMM_MASK;
6279         memset(buf, 0, 512);
6280         if (guest_cpuid_has_longmode(vcpu))
6281                 process_smi_save_state_64(vcpu, buf);
6282         else
6283                 process_smi_save_state_32(vcpu, buf);
6284
6285         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6286
6287         if (kvm_x86_ops->get_nmi_mask(vcpu))
6288                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6289         else
6290                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6291
6292         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6293         kvm_rip_write(vcpu, 0x8000);
6294
6295         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6296         kvm_x86_ops->set_cr0(vcpu, cr0);
6297         vcpu->arch.cr0 = cr0;
6298
6299         kvm_x86_ops->set_cr4(vcpu, 0);
6300
6301         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6302         dt.address = dt.size = 0;
6303         kvm_x86_ops->set_idt(vcpu, &dt);
6304
6305         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6306
6307         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6308         cs.base = vcpu->arch.smbase;
6309
6310         ds.selector = 0;
6311         ds.base = 0;
6312
6313         cs.limit    = ds.limit = 0xffffffff;
6314         cs.type     = ds.type = 0x3;
6315         cs.dpl      = ds.dpl = 0;
6316         cs.db       = ds.db = 0;
6317         cs.s        = ds.s = 1;
6318         cs.l        = ds.l = 0;
6319         cs.g        = ds.g = 1;
6320         cs.avl      = ds.avl = 0;
6321         cs.present  = ds.present = 1;
6322         cs.unusable = ds.unusable = 0;
6323         cs.padding  = ds.padding = 0;
6324
6325         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6326         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6327         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6328         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6329         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6330         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6331
6332         if (guest_cpuid_has_longmode(vcpu))
6333                 kvm_x86_ops->set_efer(vcpu, 0);
6334
6335         kvm_update_cpuid(vcpu);
6336         kvm_mmu_reset_context(vcpu);
6337 }
6338
6339 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6340 {
6341         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6342                 return;
6343
6344         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6345
6346         if (irqchip_split(vcpu->kvm))
6347                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6348         else {
6349                 kvm_x86_ops->sync_pir_to_irr(vcpu);
6350                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6351         }
6352         kvm_x86_ops->load_eoi_exitmap(vcpu);
6353 }
6354
6355 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6356 {
6357         ++vcpu->stat.tlb_flush;
6358         kvm_x86_ops->tlb_flush(vcpu);
6359 }
6360
6361 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6362 {
6363         struct page *page = NULL;
6364
6365         if (!lapic_in_kernel(vcpu))
6366                 return;
6367
6368         if (!kvm_x86_ops->set_apic_access_page_addr)
6369                 return;
6370
6371         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6372         if (is_error_page(page))
6373                 return;
6374         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6375
6376         /*
6377          * Do not pin apic access page in memory, the MMU notifier
6378          * will call us again if it is migrated or swapped out.
6379          */
6380         put_page(page);
6381 }
6382 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6383
6384 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6385                                            unsigned long address)
6386 {
6387         /*
6388          * The physical address of apic access page is stored in the VMCS.
6389          * Update it when it becomes invalid.
6390          */
6391         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6392                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6393 }
6394
6395 /*
6396  * Returns 1 to let vcpu_run() continue the guest execution loop without
6397  * exiting to the userspace.  Otherwise, the value will be returned to the
6398  * userspace.
6399  */
6400 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6401 {
6402         int r;
6403         bool req_int_win =
6404                 dm_request_for_irq_injection(vcpu) &&
6405                 kvm_cpu_accept_dm_intr(vcpu);
6406
6407         bool req_immediate_exit = false;
6408
6409         if (vcpu->requests) {
6410                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6411                         kvm_mmu_unload(vcpu);
6412                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6413                         __kvm_migrate_timers(vcpu);
6414                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6415                         kvm_gen_update_masterclock(vcpu->kvm);
6416                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6417                         kvm_gen_kvmclock_update(vcpu);
6418                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6419                         r = kvm_guest_time_update(vcpu);
6420                         if (unlikely(r))
6421                                 goto out;
6422                 }
6423                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6424                         kvm_mmu_sync_roots(vcpu);
6425                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6426                         kvm_vcpu_flush_tlb(vcpu);
6427                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6428                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6429                         r = 0;
6430                         goto out;
6431                 }
6432                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6433                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6434                         r = 0;
6435                         goto out;
6436                 }
6437                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6438                         vcpu->fpu_active = 0;
6439                         kvm_x86_ops->fpu_deactivate(vcpu);
6440                 }
6441                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6442                         /* Page is swapped out. Do synthetic halt */
6443                         vcpu->arch.apf.halted = true;
6444                         r = 1;
6445                         goto out;
6446                 }
6447                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6448                         record_steal_time(vcpu);
6449                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6450                         process_smi(vcpu);
6451                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6452                         process_nmi(vcpu);
6453                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6454                         kvm_pmu_handle_event(vcpu);
6455                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6456                         kvm_pmu_deliver_pmi(vcpu);
6457                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6458                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6459                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6460                                      (void *) vcpu->arch.eoi_exit_bitmap)) {
6461                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6462                                 vcpu->run->eoi.vector =
6463                                                 vcpu->arch.pending_ioapic_eoi;
6464                                 r = 0;
6465                                 goto out;
6466                         }
6467                 }
6468                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6469                         vcpu_scan_ioapic(vcpu);
6470                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6471                         kvm_vcpu_reload_apic_access_page(vcpu);
6472                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6473                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6474                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6475                         r = 0;
6476                         goto out;
6477                 }
6478                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6479                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6480                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6481                         r = 0;
6482                         goto out;
6483                 }
6484         }
6485
6486         /*
6487          * KVM_REQ_EVENT is not set when posted interrupts are set by
6488          * VT-d hardware, so we have to update RVI unconditionally.
6489          */
6490         if (kvm_lapic_enabled(vcpu)) {
6491                 /*
6492                  * Update architecture specific hints for APIC
6493                  * virtual interrupt delivery.
6494                  */
6495                 if (kvm_x86_ops->hwapic_irr_update)
6496                         kvm_x86_ops->hwapic_irr_update(vcpu,
6497                                 kvm_lapic_find_highest_irr(vcpu));
6498         }
6499
6500         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6501                 kvm_apic_accept_events(vcpu);
6502                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6503                         r = 1;
6504                         goto out;
6505                 }
6506
6507                 if (inject_pending_event(vcpu, req_int_win) != 0)
6508                         req_immediate_exit = true;
6509                 /* enable NMI/IRQ window open exits if needed */
6510                 else {
6511                         if (vcpu->arch.nmi_pending)
6512                                 kvm_x86_ops->enable_nmi_window(vcpu);
6513                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6514                                 kvm_x86_ops->enable_irq_window(vcpu);
6515                 }
6516
6517                 if (kvm_lapic_enabled(vcpu)) {
6518                         update_cr8_intercept(vcpu);
6519                         kvm_lapic_sync_to_vapic(vcpu);
6520                 }
6521         }
6522
6523         r = kvm_mmu_reload(vcpu);
6524         if (unlikely(r)) {
6525                 goto cancel_injection;
6526         }
6527
6528         preempt_disable();
6529
6530         kvm_x86_ops->prepare_guest_switch(vcpu);
6531         if (vcpu->fpu_active)
6532                 kvm_load_guest_fpu(vcpu);
6533         vcpu->mode = IN_GUEST_MODE;
6534
6535         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6536
6537         /* We should set ->mode before check ->requests,
6538          * see the comment in make_all_cpus_request.
6539          */
6540         smp_mb__after_srcu_read_unlock();
6541
6542         local_irq_disable();
6543
6544         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6545             || need_resched() || signal_pending(current)) {
6546                 vcpu->mode = OUTSIDE_GUEST_MODE;
6547                 smp_wmb();
6548                 local_irq_enable();
6549                 preempt_enable();
6550                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6551                 r = 1;
6552                 goto cancel_injection;
6553         }
6554
6555         kvm_load_guest_xcr0(vcpu);
6556
6557         if (req_immediate_exit)
6558                 smp_send_reschedule(vcpu->cpu);
6559
6560         trace_kvm_entry(vcpu->vcpu_id);
6561         wait_lapic_expire(vcpu);
6562         __kvm_guest_enter();
6563
6564         if (unlikely(vcpu->arch.switch_db_regs)) {
6565                 set_debugreg(0, 7);
6566                 set_debugreg(vcpu->arch.eff_db[0], 0);
6567                 set_debugreg(vcpu->arch.eff_db[1], 1);
6568                 set_debugreg(vcpu->arch.eff_db[2], 2);
6569                 set_debugreg(vcpu->arch.eff_db[3], 3);
6570                 set_debugreg(vcpu->arch.dr6, 6);
6571                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6572         }
6573
6574         kvm_x86_ops->run(vcpu);
6575
6576         /*
6577          * Do this here before restoring debug registers on the host.  And
6578          * since we do this before handling the vmexit, a DR access vmexit
6579          * can (a) read the correct value of the debug registers, (b) set
6580          * KVM_DEBUGREG_WONT_EXIT again.
6581          */
6582         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6583                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6584                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6585                 kvm_update_dr0123(vcpu);
6586                 kvm_update_dr6(vcpu);
6587                 kvm_update_dr7(vcpu);
6588                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6589         }
6590
6591         /*
6592          * If the guest has used debug registers, at least dr7
6593          * will be disabled while returning to the host.
6594          * If we don't have active breakpoints in the host, we don't
6595          * care about the messed up debug address registers. But if
6596          * we have some of them active, restore the old state.
6597          */
6598         if (hw_breakpoint_active())
6599                 hw_breakpoint_restore();
6600
6601         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6602
6603         vcpu->mode = OUTSIDE_GUEST_MODE;
6604         smp_wmb();
6605
6606         kvm_put_guest_xcr0(vcpu);
6607
6608         /* Interrupt is enabled by handle_external_intr() */
6609         kvm_x86_ops->handle_external_intr(vcpu);
6610
6611         ++vcpu->stat.exits;
6612
6613         /*
6614          * We must have an instruction between local_irq_enable() and
6615          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6616          * the interrupt shadow.  The stat.exits increment will do nicely.
6617          * But we need to prevent reordering, hence this barrier():
6618          */
6619         barrier();
6620
6621         kvm_guest_exit();
6622
6623         preempt_enable();
6624
6625         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6626
6627         /*
6628          * Profile KVM exit RIPs:
6629          */
6630         if (unlikely(prof_on == KVM_PROFILING)) {
6631                 unsigned long rip = kvm_rip_read(vcpu);
6632                 profile_hit(KVM_PROFILING, (void *)rip);
6633         }
6634
6635         if (unlikely(vcpu->arch.tsc_always_catchup))
6636                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6637
6638         if (vcpu->arch.apic_attention)
6639                 kvm_lapic_sync_from_vapic(vcpu);
6640
6641         r = kvm_x86_ops->handle_exit(vcpu);
6642         return r;
6643
6644 cancel_injection:
6645         kvm_x86_ops->cancel_injection(vcpu);
6646         if (unlikely(vcpu->arch.apic_attention))
6647                 kvm_lapic_sync_from_vapic(vcpu);
6648 out:
6649         return r;
6650 }
6651
6652 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6653 {
6654         if (!kvm_arch_vcpu_runnable(vcpu) &&
6655             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6656                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6657                 kvm_vcpu_block(vcpu);
6658                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6659
6660                 if (kvm_x86_ops->post_block)
6661                         kvm_x86_ops->post_block(vcpu);
6662
6663                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6664                         return 1;
6665         }
6666
6667         kvm_apic_accept_events(vcpu);
6668         switch(vcpu->arch.mp_state) {
6669         case KVM_MP_STATE_HALTED:
6670                 vcpu->arch.pv.pv_unhalted = false;
6671                 vcpu->arch.mp_state =
6672                         KVM_MP_STATE_RUNNABLE;
6673         case KVM_MP_STATE_RUNNABLE:
6674                 vcpu->arch.apf.halted = false;
6675                 break;
6676         case KVM_MP_STATE_INIT_RECEIVED:
6677                 break;
6678         default:
6679                 return -EINTR;
6680                 break;
6681         }
6682         return 1;
6683 }
6684
6685 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6686 {
6687         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6688                 !vcpu->arch.apf.halted);
6689 }
6690
6691 static int vcpu_run(struct kvm_vcpu *vcpu)
6692 {
6693         int r;
6694         struct kvm *kvm = vcpu->kvm;
6695
6696         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6697
6698         for (;;) {
6699                 if (kvm_vcpu_running(vcpu)) {
6700                         r = vcpu_enter_guest(vcpu);
6701                 } else {
6702                         r = vcpu_block(kvm, vcpu);
6703                 }
6704
6705                 if (r <= 0)
6706                         break;
6707
6708                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6709                 if (kvm_cpu_has_pending_timer(vcpu))
6710                         kvm_inject_pending_timer_irqs(vcpu);
6711
6712                 if (dm_request_for_irq_injection(vcpu) &&
6713                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6714                         r = 0;
6715                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6716                         ++vcpu->stat.request_irq_exits;
6717                         break;
6718                 }
6719
6720                 kvm_check_async_pf_completion(vcpu);
6721
6722                 if (signal_pending(current)) {
6723                         r = -EINTR;
6724                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6725                         ++vcpu->stat.signal_exits;
6726                         break;
6727                 }
6728                 if (need_resched()) {
6729                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6730                         cond_resched();
6731                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6732                 }
6733         }
6734
6735         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6736
6737         return r;
6738 }
6739
6740 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6741 {
6742         int r;
6743         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6744         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6745         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6746         if (r != EMULATE_DONE)
6747                 return 0;
6748         return 1;
6749 }
6750
6751 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6752 {
6753         BUG_ON(!vcpu->arch.pio.count);
6754
6755         return complete_emulated_io(vcpu);
6756 }
6757
6758 /*
6759  * Implements the following, as a state machine:
6760  *
6761  * read:
6762  *   for each fragment
6763  *     for each mmio piece in the fragment
6764  *       write gpa, len
6765  *       exit
6766  *       copy data
6767  *   execute insn
6768  *
6769  * write:
6770  *   for each fragment
6771  *     for each mmio piece in the fragment
6772  *       write gpa, len
6773  *       copy data
6774  *       exit
6775  */
6776 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6777 {
6778         struct kvm_run *run = vcpu->run;
6779         struct kvm_mmio_fragment *frag;
6780         unsigned len;
6781
6782         BUG_ON(!vcpu->mmio_needed);
6783
6784         /* Complete previous fragment */
6785         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6786         len = min(8u, frag->len);
6787         if (!vcpu->mmio_is_write)
6788                 memcpy(frag->data, run->mmio.data, len);
6789
6790         if (frag->len <= 8) {
6791                 /* Switch to the next fragment. */
6792                 frag++;
6793                 vcpu->mmio_cur_fragment++;
6794         } else {
6795                 /* Go forward to the next mmio piece. */
6796                 frag->data += len;
6797                 frag->gpa += len;
6798                 frag->len -= len;
6799         }
6800
6801         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6802                 vcpu->mmio_needed = 0;
6803
6804                 /* FIXME: return into emulator if single-stepping.  */
6805                 if (vcpu->mmio_is_write)
6806                         return 1;
6807                 vcpu->mmio_read_completed = 1;
6808                 return complete_emulated_io(vcpu);
6809         }
6810
6811         run->exit_reason = KVM_EXIT_MMIO;
6812         run->mmio.phys_addr = frag->gpa;
6813         if (vcpu->mmio_is_write)
6814                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6815         run->mmio.len = min(8u, frag->len);
6816         run->mmio.is_write = vcpu->mmio_is_write;
6817         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6818         return 0;
6819 }
6820
6821
6822 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6823 {
6824         struct fpu *fpu = &current->thread.fpu;
6825         int r;
6826         sigset_t sigsaved;
6827
6828         fpu__activate_curr(fpu);
6829
6830         if (vcpu->sigset_active)
6831                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6832
6833         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6834                 kvm_vcpu_block(vcpu);
6835                 kvm_apic_accept_events(vcpu);
6836                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6837                 r = -EAGAIN;
6838                 goto out;
6839         }
6840
6841         /* re-sync apic's tpr */
6842         if (!lapic_in_kernel(vcpu)) {
6843                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6844                         r = -EINVAL;
6845                         goto out;
6846                 }
6847         }
6848
6849         if (unlikely(vcpu->arch.complete_userspace_io)) {
6850                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6851                 vcpu->arch.complete_userspace_io = NULL;
6852                 r = cui(vcpu);
6853                 if (r <= 0)
6854                         goto out;
6855         } else
6856                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6857
6858         r = vcpu_run(vcpu);
6859
6860 out:
6861         post_kvm_run_save(vcpu);
6862         if (vcpu->sigset_active)
6863                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6864
6865         return r;
6866 }
6867
6868 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6869 {
6870         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6871                 /*
6872                  * We are here if userspace calls get_regs() in the middle of
6873                  * instruction emulation. Registers state needs to be copied
6874                  * back from emulation context to vcpu. Userspace shouldn't do
6875                  * that usually, but some bad designed PV devices (vmware
6876                  * backdoor interface) need this to work
6877                  */
6878                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6879                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6880         }
6881         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6882         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6883         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6884         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6885         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6886         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6887         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6888         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6889 #ifdef CONFIG_X86_64
6890         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6891         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6892         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6893         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6894         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6895         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6896         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6897         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6898 #endif
6899
6900         regs->rip = kvm_rip_read(vcpu);
6901         regs->rflags = kvm_get_rflags(vcpu);
6902
6903         return 0;
6904 }
6905
6906 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6907 {
6908         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6909         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6910
6911         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6912         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6913         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6914         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6915         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6916         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6917         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6918         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6919 #ifdef CONFIG_X86_64
6920         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6921         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6922         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6923         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6924         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6925         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6926         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6927         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6928 #endif
6929
6930         kvm_rip_write(vcpu, regs->rip);
6931         kvm_set_rflags(vcpu, regs->rflags);
6932
6933         vcpu->arch.exception.pending = false;
6934
6935         kvm_make_request(KVM_REQ_EVENT, vcpu);
6936
6937         return 0;
6938 }
6939
6940 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6941 {
6942         struct kvm_segment cs;
6943
6944         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6945         *db = cs.db;
6946         *l = cs.l;
6947 }
6948 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6949
6950 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6951                                   struct kvm_sregs *sregs)
6952 {
6953         struct desc_ptr dt;
6954
6955         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6956         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6957         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6958         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6959         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6960         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6961
6962         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6963         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6964
6965         kvm_x86_ops->get_idt(vcpu, &dt);
6966         sregs->idt.limit = dt.size;
6967         sregs->idt.base = dt.address;
6968         kvm_x86_ops->get_gdt(vcpu, &dt);
6969         sregs->gdt.limit = dt.size;
6970         sregs->gdt.base = dt.address;
6971
6972         sregs->cr0 = kvm_read_cr0(vcpu);
6973         sregs->cr2 = vcpu->arch.cr2;
6974         sregs->cr3 = kvm_read_cr3(vcpu);
6975         sregs->cr4 = kvm_read_cr4(vcpu);
6976         sregs->cr8 = kvm_get_cr8(vcpu);
6977         sregs->efer = vcpu->arch.efer;
6978         sregs->apic_base = kvm_get_apic_base(vcpu);
6979
6980         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6981
6982         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6983                 set_bit(vcpu->arch.interrupt.nr,
6984                         (unsigned long *)sregs->interrupt_bitmap);
6985
6986         return 0;
6987 }
6988
6989 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6990                                     struct kvm_mp_state *mp_state)
6991 {
6992         kvm_apic_accept_events(vcpu);
6993         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6994                                         vcpu->arch.pv.pv_unhalted)
6995                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6996         else
6997                 mp_state->mp_state = vcpu->arch.mp_state;
6998
6999         return 0;
7000 }
7001
7002 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7003                                     struct kvm_mp_state *mp_state)
7004 {
7005         if (!kvm_vcpu_has_lapic(vcpu) &&
7006             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7007                 return -EINVAL;
7008
7009         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7010                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7011                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7012         } else
7013                 vcpu->arch.mp_state = mp_state->mp_state;
7014         kvm_make_request(KVM_REQ_EVENT, vcpu);
7015         return 0;
7016 }
7017
7018 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7019                     int reason, bool has_error_code, u32 error_code)
7020 {
7021         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7022         int ret;
7023
7024         init_emulate_ctxt(vcpu);
7025
7026         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7027                                    has_error_code, error_code);
7028
7029         if (ret)
7030                 return EMULATE_FAIL;
7031
7032         kvm_rip_write(vcpu, ctxt->eip);
7033         kvm_set_rflags(vcpu, ctxt->eflags);
7034         kvm_make_request(KVM_REQ_EVENT, vcpu);
7035         return EMULATE_DONE;
7036 }
7037 EXPORT_SYMBOL_GPL(kvm_task_switch);
7038
7039 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7040                                   struct kvm_sregs *sregs)
7041 {
7042         struct msr_data apic_base_msr;
7043         int mmu_reset_needed = 0;
7044         int pending_vec, max_bits, idx;
7045         struct desc_ptr dt;
7046
7047         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7048                 return -EINVAL;
7049
7050         dt.size = sregs->idt.limit;
7051         dt.address = sregs->idt.base;
7052         kvm_x86_ops->set_idt(vcpu, &dt);
7053         dt.size = sregs->gdt.limit;
7054         dt.address = sregs->gdt.base;
7055         kvm_x86_ops->set_gdt(vcpu, &dt);
7056
7057         vcpu->arch.cr2 = sregs->cr2;
7058         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7059         vcpu->arch.cr3 = sregs->cr3;
7060         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7061
7062         kvm_set_cr8(vcpu, sregs->cr8);
7063
7064         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7065         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7066         apic_base_msr.data = sregs->apic_base;
7067         apic_base_msr.host_initiated = true;
7068         kvm_set_apic_base(vcpu, &apic_base_msr);
7069
7070         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7071         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7072         vcpu->arch.cr0 = sregs->cr0;
7073
7074         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7075         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7076         if (sregs->cr4 & X86_CR4_OSXSAVE)
7077                 kvm_update_cpuid(vcpu);
7078
7079         idx = srcu_read_lock(&vcpu->kvm->srcu);
7080         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7081                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7082                 mmu_reset_needed = 1;
7083         }
7084         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7085
7086         if (mmu_reset_needed)
7087                 kvm_mmu_reset_context(vcpu);
7088
7089         max_bits = KVM_NR_INTERRUPTS;
7090         pending_vec = find_first_bit(
7091                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7092         if (pending_vec < max_bits) {
7093                 kvm_queue_interrupt(vcpu, pending_vec, false);
7094                 pr_debug("Set back pending irq %d\n", pending_vec);
7095         }
7096
7097         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7098         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7099         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7100         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7101         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7102         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7103
7104         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7105         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7106
7107         update_cr8_intercept(vcpu);
7108
7109         /* Older userspace won't unhalt the vcpu on reset. */
7110         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7111             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7112             !is_protmode(vcpu))
7113                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7114
7115         kvm_make_request(KVM_REQ_EVENT, vcpu);
7116
7117         return 0;
7118 }
7119
7120 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7121                                         struct kvm_guest_debug *dbg)
7122 {
7123         unsigned long rflags;
7124         int i, r;
7125
7126         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7127                 r = -EBUSY;
7128                 if (vcpu->arch.exception.pending)
7129                         goto out;
7130                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7131                         kvm_queue_exception(vcpu, DB_VECTOR);
7132                 else
7133                         kvm_queue_exception(vcpu, BP_VECTOR);
7134         }
7135
7136         /*
7137          * Read rflags as long as potentially injected trace flags are still
7138          * filtered out.
7139          */
7140         rflags = kvm_get_rflags(vcpu);
7141
7142         vcpu->guest_debug = dbg->control;
7143         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7144                 vcpu->guest_debug = 0;
7145
7146         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7147                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7148                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7149                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7150         } else {
7151                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7152                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7153         }
7154         kvm_update_dr7(vcpu);
7155
7156         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7157                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7158                         get_segment_base(vcpu, VCPU_SREG_CS);
7159
7160         /*
7161          * Trigger an rflags update that will inject or remove the trace
7162          * flags.
7163          */
7164         kvm_set_rflags(vcpu, rflags);
7165
7166         kvm_x86_ops->update_bp_intercept(vcpu);
7167
7168         r = 0;
7169
7170 out:
7171
7172         return r;
7173 }
7174
7175 /*
7176  * Translate a guest virtual address to a guest physical address.
7177  */
7178 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7179                                     struct kvm_translation *tr)
7180 {
7181         unsigned long vaddr = tr->linear_address;
7182         gpa_t gpa;
7183         int idx;
7184
7185         idx = srcu_read_lock(&vcpu->kvm->srcu);
7186         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7187         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7188         tr->physical_address = gpa;
7189         tr->valid = gpa != UNMAPPED_GVA;
7190         tr->writeable = 1;
7191         tr->usermode = 0;
7192
7193         return 0;
7194 }
7195
7196 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7197 {
7198         struct fxregs_state *fxsave =
7199                         &vcpu->arch.guest_fpu.state.fxsave;
7200
7201         memcpy(fpu->fpr, fxsave->st_space, 128);
7202         fpu->fcw = fxsave->cwd;
7203         fpu->fsw = fxsave->swd;
7204         fpu->ftwx = fxsave->twd;
7205         fpu->last_opcode = fxsave->fop;
7206         fpu->last_ip = fxsave->rip;
7207         fpu->last_dp = fxsave->rdp;
7208         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7209
7210         return 0;
7211 }
7212
7213 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7214 {
7215         struct fxregs_state *fxsave =
7216                         &vcpu->arch.guest_fpu.state.fxsave;
7217
7218         memcpy(fxsave->st_space, fpu->fpr, 128);
7219         fxsave->cwd = fpu->fcw;
7220         fxsave->swd = fpu->fsw;
7221         fxsave->twd = fpu->ftwx;
7222         fxsave->fop = fpu->last_opcode;
7223         fxsave->rip = fpu->last_ip;
7224         fxsave->rdp = fpu->last_dp;
7225         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7226
7227         return 0;
7228 }
7229
7230 static void fx_init(struct kvm_vcpu *vcpu)
7231 {
7232         fpstate_init(&vcpu->arch.guest_fpu.state);
7233         if (cpu_has_xsaves)
7234                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7235                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7236
7237         /*
7238          * Ensure guest xcr0 is valid for loading
7239          */
7240         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7241
7242         vcpu->arch.cr0 |= X86_CR0_ET;
7243 }
7244
7245 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7246 {
7247         if (vcpu->guest_fpu_loaded)
7248                 return;
7249
7250         /*
7251          * Restore all possible states in the guest,
7252          * and assume host would use all available bits.
7253          * Guest xcr0 would be loaded later.
7254          */
7255         vcpu->guest_fpu_loaded = 1;
7256         __kernel_fpu_begin();
7257         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7258         trace_kvm_fpu(1);
7259 }
7260
7261 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7262 {
7263         if (!vcpu->guest_fpu_loaded) {
7264                 vcpu->fpu_counter = 0;
7265                 return;
7266         }
7267
7268         vcpu->guest_fpu_loaded = 0;
7269         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7270         __kernel_fpu_end();
7271         ++vcpu->stat.fpu_reload;
7272         /*
7273          * If using eager FPU mode, or if the guest is a frequent user
7274          * of the FPU, just leave the FPU active for next time.
7275          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7276          * the FPU in bursts will revert to loading it on demand.
7277          */
7278         if (!vcpu->arch.eager_fpu) {
7279                 if (++vcpu->fpu_counter < 5)
7280                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7281         }
7282         trace_kvm_fpu(0);
7283 }
7284
7285 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7286 {
7287         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7288
7289         kvmclock_reset(vcpu);
7290
7291         kvm_x86_ops->vcpu_free(vcpu);
7292         free_cpumask_var(wbinvd_dirty_mask);
7293 }
7294
7295 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7296                                                 unsigned int id)
7297 {
7298         struct kvm_vcpu *vcpu;
7299
7300         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7301                 printk_once(KERN_WARNING
7302                 "kvm: SMP vm created on host with unstable TSC; "
7303                 "guest TSC will not be reliable\n");
7304
7305         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7306
7307         return vcpu;
7308 }
7309
7310 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7311 {
7312         int r;
7313
7314         kvm_vcpu_mtrr_init(vcpu);
7315         r = vcpu_load(vcpu);
7316         if (r)
7317                 return r;
7318         kvm_vcpu_reset(vcpu, false);
7319         kvm_mmu_setup(vcpu);
7320         vcpu_put(vcpu);
7321         return r;
7322 }
7323
7324 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7325 {
7326         struct msr_data msr;
7327         struct kvm *kvm = vcpu->kvm;
7328
7329         if (vcpu_load(vcpu))
7330                 return;
7331         msr.data = 0x0;
7332         msr.index = MSR_IA32_TSC;
7333         msr.host_initiated = true;
7334         kvm_write_tsc(vcpu, &msr);
7335         vcpu_put(vcpu);
7336
7337         if (!kvmclock_periodic_sync)
7338                 return;
7339
7340         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7341                                         KVMCLOCK_SYNC_PERIOD);
7342 }
7343
7344 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7345 {
7346         int r;
7347         vcpu->arch.apf.msr_val = 0;
7348
7349         r = vcpu_load(vcpu);
7350         BUG_ON(r);
7351         kvm_mmu_unload(vcpu);
7352         vcpu_put(vcpu);
7353
7354         kvm_x86_ops->vcpu_free(vcpu);
7355 }
7356
7357 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7358 {
7359         vcpu->arch.hflags = 0;
7360
7361         atomic_set(&vcpu->arch.nmi_queued, 0);
7362         vcpu->arch.nmi_pending = 0;
7363         vcpu->arch.nmi_injected = false;
7364         kvm_clear_interrupt_queue(vcpu);
7365         kvm_clear_exception_queue(vcpu);
7366
7367         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7368         kvm_update_dr0123(vcpu);
7369         vcpu->arch.dr6 = DR6_INIT;
7370         kvm_update_dr6(vcpu);
7371         vcpu->arch.dr7 = DR7_FIXED_1;
7372         kvm_update_dr7(vcpu);
7373
7374         vcpu->arch.cr2 = 0;
7375
7376         kvm_make_request(KVM_REQ_EVENT, vcpu);
7377         vcpu->arch.apf.msr_val = 0;
7378         vcpu->arch.st.msr_val = 0;
7379
7380         kvmclock_reset(vcpu);
7381
7382         kvm_clear_async_pf_completion_queue(vcpu);
7383         kvm_async_pf_hash_reset(vcpu);
7384         vcpu->arch.apf.halted = false;
7385
7386         if (!init_event) {
7387                 kvm_pmu_reset(vcpu);
7388                 vcpu->arch.smbase = 0x30000;
7389         }
7390
7391         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7392         vcpu->arch.regs_avail = ~0;
7393         vcpu->arch.regs_dirty = ~0;
7394
7395         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7396 }
7397
7398 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7399 {
7400         struct kvm_segment cs;
7401
7402         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7403         cs.selector = vector << 8;
7404         cs.base = vector << 12;
7405         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7406         kvm_rip_write(vcpu, 0);
7407 }
7408
7409 int kvm_arch_hardware_enable(void)
7410 {
7411         struct kvm *kvm;
7412         struct kvm_vcpu *vcpu;
7413         int i;
7414         int ret;
7415         u64 local_tsc;
7416         u64 max_tsc = 0;
7417         bool stable, backwards_tsc = false;
7418
7419         kvm_shared_msr_cpu_online();
7420         ret = kvm_x86_ops->hardware_enable();
7421         if (ret != 0)
7422                 return ret;
7423
7424         local_tsc = rdtsc();
7425         stable = !check_tsc_unstable();
7426         list_for_each_entry(kvm, &vm_list, vm_list) {
7427                 kvm_for_each_vcpu(i, vcpu, kvm) {
7428                         if (!stable && vcpu->cpu == smp_processor_id())
7429                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7430                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7431                                 backwards_tsc = true;
7432                                 if (vcpu->arch.last_host_tsc > max_tsc)
7433                                         max_tsc = vcpu->arch.last_host_tsc;
7434                         }
7435                 }
7436         }
7437
7438         /*
7439          * Sometimes, even reliable TSCs go backwards.  This happens on
7440          * platforms that reset TSC during suspend or hibernate actions, but
7441          * maintain synchronization.  We must compensate.  Fortunately, we can
7442          * detect that condition here, which happens early in CPU bringup,
7443          * before any KVM threads can be running.  Unfortunately, we can't
7444          * bring the TSCs fully up to date with real time, as we aren't yet far
7445          * enough into CPU bringup that we know how much real time has actually
7446          * elapsed; our helper function, get_kernel_ns() will be using boot
7447          * variables that haven't been updated yet.
7448          *
7449          * So we simply find the maximum observed TSC above, then record the
7450          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7451          * the adjustment will be applied.  Note that we accumulate
7452          * adjustments, in case multiple suspend cycles happen before some VCPU
7453          * gets a chance to run again.  In the event that no KVM threads get a
7454          * chance to run, we will miss the entire elapsed period, as we'll have
7455          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7456          * loose cycle time.  This isn't too big a deal, since the loss will be
7457          * uniform across all VCPUs (not to mention the scenario is extremely
7458          * unlikely). It is possible that a second hibernate recovery happens
7459          * much faster than a first, causing the observed TSC here to be
7460          * smaller; this would require additional padding adjustment, which is
7461          * why we set last_host_tsc to the local tsc observed here.
7462          *
7463          * N.B. - this code below runs only on platforms with reliable TSC,
7464          * as that is the only way backwards_tsc is set above.  Also note
7465          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7466          * have the same delta_cyc adjustment applied if backwards_tsc
7467          * is detected.  Note further, this adjustment is only done once,
7468          * as we reset last_host_tsc on all VCPUs to stop this from being
7469          * called multiple times (one for each physical CPU bringup).
7470          *
7471          * Platforms with unreliable TSCs don't have to deal with this, they
7472          * will be compensated by the logic in vcpu_load, which sets the TSC to
7473          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7474          * guarantee that they stay in perfect synchronization.
7475          */
7476         if (backwards_tsc) {
7477                 u64 delta_cyc = max_tsc - local_tsc;
7478                 backwards_tsc_observed = true;
7479                 list_for_each_entry(kvm, &vm_list, vm_list) {
7480                         kvm_for_each_vcpu(i, vcpu, kvm) {
7481                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7482                                 vcpu->arch.last_host_tsc = local_tsc;
7483                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7484                         }
7485
7486                         /*
7487                          * We have to disable TSC offset matching.. if you were
7488                          * booting a VM while issuing an S4 host suspend....
7489                          * you may have some problem.  Solving this issue is
7490                          * left as an exercise to the reader.
7491                          */
7492                         kvm->arch.last_tsc_nsec = 0;
7493                         kvm->arch.last_tsc_write = 0;
7494                 }
7495
7496         }
7497         return 0;
7498 }
7499
7500 void kvm_arch_hardware_disable(void)
7501 {
7502         kvm_x86_ops->hardware_disable();
7503         drop_user_return_notifiers();
7504 }
7505
7506 int kvm_arch_hardware_setup(void)
7507 {
7508         int r;
7509
7510         r = kvm_x86_ops->hardware_setup();
7511         if (r != 0)
7512                 return r;
7513
7514         if (kvm_has_tsc_control) {
7515                 /*
7516                  * Make sure the user can only configure tsc_khz values that
7517                  * fit into a signed integer.
7518                  * A min value is not calculated needed because it will always
7519                  * be 1 on all machines.
7520                  */
7521                 u64 max = min(0x7fffffffULL,
7522                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7523                 kvm_max_guest_tsc_khz = max;
7524
7525                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7526         }
7527
7528         kvm_init_msr_list();
7529         return 0;
7530 }
7531
7532 void kvm_arch_hardware_unsetup(void)
7533 {
7534         kvm_x86_ops->hardware_unsetup();
7535 }
7536
7537 void kvm_arch_check_processor_compat(void *rtn)
7538 {
7539         kvm_x86_ops->check_processor_compatibility(rtn);
7540 }
7541
7542 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7543 {
7544         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7545 }
7546 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7547
7548 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7549 {
7550         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7551 }
7552
7553 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7554 {
7555         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7556 }
7557
7558 struct static_key kvm_no_apic_vcpu __read_mostly;
7559
7560 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7561 {
7562         struct page *page;
7563         struct kvm *kvm;
7564         int r;
7565
7566         BUG_ON(vcpu->kvm == NULL);
7567         kvm = vcpu->kvm;
7568
7569         vcpu->arch.pv.pv_unhalted = false;
7570         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7571         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7572                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7573         else
7574                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7575
7576         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7577         if (!page) {
7578                 r = -ENOMEM;
7579                 goto fail;
7580         }
7581         vcpu->arch.pio_data = page_address(page);
7582
7583         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7584
7585         r = kvm_mmu_create(vcpu);
7586         if (r < 0)
7587                 goto fail_free_pio_data;
7588
7589         if (irqchip_in_kernel(kvm)) {
7590                 r = kvm_create_lapic(vcpu);
7591                 if (r < 0)
7592                         goto fail_mmu_destroy;
7593         } else
7594                 static_key_slow_inc(&kvm_no_apic_vcpu);
7595
7596         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7597                                        GFP_KERNEL);
7598         if (!vcpu->arch.mce_banks) {
7599                 r = -ENOMEM;
7600                 goto fail_free_lapic;
7601         }
7602         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7603
7604         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7605                 r = -ENOMEM;
7606                 goto fail_free_mce_banks;
7607         }
7608
7609         fx_init(vcpu);
7610
7611         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7612         vcpu->arch.pv_time_enabled = false;
7613
7614         vcpu->arch.guest_supported_xcr0 = 0;
7615         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7616
7617         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7618
7619         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7620
7621         kvm_async_pf_hash_reset(vcpu);
7622         kvm_pmu_init(vcpu);
7623
7624         vcpu->arch.pending_external_vector = -1;
7625
7626         return 0;
7627
7628 fail_free_mce_banks:
7629         kfree(vcpu->arch.mce_banks);
7630 fail_free_lapic:
7631         kvm_free_lapic(vcpu);
7632 fail_mmu_destroy:
7633         kvm_mmu_destroy(vcpu);
7634 fail_free_pio_data:
7635         free_page((unsigned long)vcpu->arch.pio_data);
7636 fail:
7637         return r;
7638 }
7639
7640 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7641 {
7642         int idx;
7643
7644         kvm_pmu_destroy(vcpu);
7645         kfree(vcpu->arch.mce_banks);
7646         kvm_free_lapic(vcpu);
7647         idx = srcu_read_lock(&vcpu->kvm->srcu);
7648         kvm_mmu_destroy(vcpu);
7649         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7650         free_page((unsigned long)vcpu->arch.pio_data);
7651         if (!lapic_in_kernel(vcpu))
7652                 static_key_slow_dec(&kvm_no_apic_vcpu);
7653 }
7654
7655 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7656 {
7657         kvm_x86_ops->sched_in(vcpu, cpu);
7658 }
7659
7660 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7661 {
7662         if (type)
7663                 return -EINVAL;
7664
7665         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7666         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7667         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7668         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7669         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7670
7671         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7672         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7673         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7674         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7675                 &kvm->arch.irq_sources_bitmap);
7676
7677         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7678         mutex_init(&kvm->arch.apic_map_lock);
7679         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7680
7681         pvclock_update_vm_gtod_copy(kvm);
7682
7683         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7684         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7685
7686         return 0;
7687 }
7688
7689 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7690 {
7691         int r;
7692         r = vcpu_load(vcpu);
7693         BUG_ON(r);
7694         kvm_mmu_unload(vcpu);
7695         vcpu_put(vcpu);
7696 }
7697
7698 static void kvm_free_vcpus(struct kvm *kvm)
7699 {
7700         unsigned int i;
7701         struct kvm_vcpu *vcpu;
7702
7703         /*
7704          * Unpin any mmu pages first.
7705          */
7706         kvm_for_each_vcpu(i, vcpu, kvm) {
7707                 kvm_clear_async_pf_completion_queue(vcpu);
7708                 kvm_unload_vcpu_mmu(vcpu);
7709         }
7710         kvm_for_each_vcpu(i, vcpu, kvm)
7711                 kvm_arch_vcpu_free(vcpu);
7712
7713         mutex_lock(&kvm->lock);
7714         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7715                 kvm->vcpus[i] = NULL;
7716
7717         atomic_set(&kvm->online_vcpus, 0);
7718         mutex_unlock(&kvm->lock);
7719 }
7720
7721 void kvm_arch_sync_events(struct kvm *kvm)
7722 {
7723         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7724         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7725         kvm_free_all_assigned_devices(kvm);
7726         kvm_free_pit(kvm);
7727 }
7728
7729 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7730 {
7731         int i, r;
7732         unsigned long hva;
7733         struct kvm_memslots *slots = kvm_memslots(kvm);
7734         struct kvm_memory_slot *slot, old;
7735
7736         /* Called with kvm->slots_lock held.  */
7737         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7738                 return -EINVAL;
7739
7740         slot = id_to_memslot(slots, id);
7741         if (size) {
7742                 if (WARN_ON(slot->npages))
7743                         return -EEXIST;
7744
7745                 /*
7746                  * MAP_SHARED to prevent internal slot pages from being moved
7747                  * by fork()/COW.
7748                  */
7749                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7750                               MAP_SHARED | MAP_ANONYMOUS, 0);
7751                 if (IS_ERR((void *)hva))
7752                         return PTR_ERR((void *)hva);
7753         } else {
7754                 if (!slot->npages)
7755                         return 0;
7756
7757                 hva = 0;
7758         }
7759
7760         old = *slot;
7761         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7762                 struct kvm_userspace_memory_region m;
7763
7764                 m.slot = id | (i << 16);
7765                 m.flags = 0;
7766                 m.guest_phys_addr = gpa;
7767                 m.userspace_addr = hva;
7768                 m.memory_size = size;
7769                 r = __kvm_set_memory_region(kvm, &m);
7770                 if (r < 0)
7771                         return r;
7772         }
7773
7774         if (!size) {
7775                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7776                 WARN_ON(r < 0);
7777         }
7778
7779         return 0;
7780 }
7781 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7782
7783 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7784 {
7785         int r;
7786
7787         mutex_lock(&kvm->slots_lock);
7788         r = __x86_set_memory_region(kvm, id, gpa, size);
7789         mutex_unlock(&kvm->slots_lock);
7790
7791         return r;
7792 }
7793 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7794
7795 void kvm_arch_destroy_vm(struct kvm *kvm)
7796 {
7797         if (current->mm == kvm->mm) {
7798                 /*
7799                  * Free memory regions allocated on behalf of userspace,
7800                  * unless the the memory map has changed due to process exit
7801                  * or fd copying.
7802                  */
7803                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7804                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7805                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7806         }
7807         kvm_iommu_unmap_guest(kvm);
7808         kfree(kvm->arch.vpic);
7809         kfree(kvm->arch.vioapic);
7810         kvm_free_vcpus(kvm);
7811         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7812 }
7813
7814 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7815                            struct kvm_memory_slot *dont)
7816 {
7817         int i;
7818
7819         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7820                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7821                         kvfree(free->arch.rmap[i]);
7822                         free->arch.rmap[i] = NULL;
7823                 }
7824                 if (i == 0)
7825                         continue;
7826
7827                 if (!dont || free->arch.lpage_info[i - 1] !=
7828                              dont->arch.lpage_info[i - 1]) {
7829                         kvfree(free->arch.lpage_info[i - 1]);
7830                         free->arch.lpage_info[i - 1] = NULL;
7831                 }
7832         }
7833 }
7834
7835 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7836                             unsigned long npages)
7837 {
7838         int i;
7839
7840         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7841                 unsigned long ugfn;
7842                 int lpages;
7843                 int level = i + 1;
7844
7845                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7846                                       slot->base_gfn, level) + 1;
7847
7848                 slot->arch.rmap[i] =
7849                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7850                 if (!slot->arch.rmap[i])
7851                         goto out_free;
7852                 if (i == 0)
7853                         continue;
7854
7855                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7856                                         sizeof(*slot->arch.lpage_info[i - 1]));
7857                 if (!slot->arch.lpage_info[i - 1])
7858                         goto out_free;
7859
7860                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7861                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7862                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7863                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7864                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7865                 /*
7866                  * If the gfn and userspace address are not aligned wrt each
7867                  * other, or if explicitly asked to, disable large page
7868                  * support for this slot
7869                  */
7870                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7871                     !kvm_largepages_enabled()) {
7872                         unsigned long j;
7873
7874                         for (j = 0; j < lpages; ++j)
7875                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7876                 }
7877         }
7878
7879         return 0;
7880
7881 out_free:
7882         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7883                 kvfree(slot->arch.rmap[i]);
7884                 slot->arch.rmap[i] = NULL;
7885                 if (i == 0)
7886                         continue;
7887
7888                 kvfree(slot->arch.lpage_info[i - 1]);
7889                 slot->arch.lpage_info[i - 1] = NULL;
7890         }
7891         return -ENOMEM;
7892 }
7893
7894 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7895 {
7896         /*
7897          * memslots->generation has been incremented.
7898          * mmio generation may have reached its maximum value.
7899          */
7900         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7901 }
7902
7903 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7904                                 struct kvm_memory_slot *memslot,
7905                                 const struct kvm_userspace_memory_region *mem,
7906                                 enum kvm_mr_change change)
7907 {
7908         return 0;
7909 }
7910
7911 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7912                                      struct kvm_memory_slot *new)
7913 {
7914         /* Still write protect RO slot */
7915         if (new->flags & KVM_MEM_READONLY) {
7916                 kvm_mmu_slot_remove_write_access(kvm, new);
7917                 return;
7918         }
7919
7920         /*
7921          * Call kvm_x86_ops dirty logging hooks when they are valid.
7922          *
7923          * kvm_x86_ops->slot_disable_log_dirty is called when:
7924          *
7925          *  - KVM_MR_CREATE with dirty logging is disabled
7926          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7927          *
7928          * The reason is, in case of PML, we need to set D-bit for any slots
7929          * with dirty logging disabled in order to eliminate unnecessary GPA
7930          * logging in PML buffer (and potential PML buffer full VMEXT). This
7931          * guarantees leaving PML enabled during guest's lifetime won't have
7932          * any additonal overhead from PML when guest is running with dirty
7933          * logging disabled for memory slots.
7934          *
7935          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7936          * to dirty logging mode.
7937          *
7938          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7939          *
7940          * In case of write protect:
7941          *
7942          * Write protect all pages for dirty logging.
7943          *
7944          * All the sptes including the large sptes which point to this
7945          * slot are set to readonly. We can not create any new large
7946          * spte on this slot until the end of the logging.
7947          *
7948          * See the comments in fast_page_fault().
7949          */
7950         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7951                 if (kvm_x86_ops->slot_enable_log_dirty)
7952                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7953                 else
7954                         kvm_mmu_slot_remove_write_access(kvm, new);
7955         } else {
7956                 if (kvm_x86_ops->slot_disable_log_dirty)
7957                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7958         }
7959 }
7960
7961 void kvm_arch_commit_memory_region(struct kvm *kvm,
7962                                 const struct kvm_userspace_memory_region *mem,
7963                                 const struct kvm_memory_slot *old,
7964                                 const struct kvm_memory_slot *new,
7965                                 enum kvm_mr_change change)
7966 {
7967         int nr_mmu_pages = 0;
7968
7969         if (!kvm->arch.n_requested_mmu_pages)
7970                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7971
7972         if (nr_mmu_pages)
7973                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7974
7975         /*
7976          * Dirty logging tracks sptes in 4k granularity, meaning that large
7977          * sptes have to be split.  If live migration is successful, the guest
7978          * in the source machine will be destroyed and large sptes will be
7979          * created in the destination. However, if the guest continues to run
7980          * in the source machine (for example if live migration fails), small
7981          * sptes will remain around and cause bad performance.
7982          *
7983          * Scan sptes if dirty logging has been stopped, dropping those
7984          * which can be collapsed into a single large-page spte.  Later
7985          * page faults will create the large-page sptes.
7986          */
7987         if ((change != KVM_MR_DELETE) &&
7988                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7989                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7990                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7991
7992         /*
7993          * Set up write protection and/or dirty logging for the new slot.
7994          *
7995          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7996          * been zapped so no dirty logging staff is needed for old slot. For
7997          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7998          * new and it's also covered when dealing with the new slot.
7999          *
8000          * FIXME: const-ify all uses of struct kvm_memory_slot.
8001          */
8002         if (change != KVM_MR_DELETE)
8003                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8004 }
8005
8006 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8007 {
8008         kvm_mmu_invalidate_zap_all_pages(kvm);
8009 }
8010
8011 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8012                                    struct kvm_memory_slot *slot)
8013 {
8014         kvm_mmu_invalidate_zap_all_pages(kvm);
8015 }
8016
8017 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8018 {
8019         if (!list_empty_careful(&vcpu->async_pf.done))
8020                 return true;
8021
8022         if (kvm_apic_has_events(vcpu))
8023                 return true;
8024
8025         if (vcpu->arch.pv.pv_unhalted)
8026                 return true;
8027
8028         if (atomic_read(&vcpu->arch.nmi_queued))
8029                 return true;
8030
8031         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8032                 return true;
8033
8034         if (kvm_arch_interrupt_allowed(vcpu) &&
8035             kvm_cpu_has_interrupt(vcpu))
8036                 return true;
8037
8038         return false;
8039 }
8040
8041 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8042 {
8043         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8044                 kvm_x86_ops->check_nested_events(vcpu, false);
8045
8046         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8047 }
8048
8049 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8050 {
8051         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8052 }
8053
8054 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8055 {
8056         return kvm_x86_ops->interrupt_allowed(vcpu);
8057 }
8058
8059 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8060 {
8061         if (is_64_bit_mode(vcpu))
8062                 return kvm_rip_read(vcpu);
8063         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8064                      kvm_rip_read(vcpu));
8065 }
8066 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8067
8068 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8069 {
8070         return kvm_get_linear_rip(vcpu) == linear_rip;
8071 }
8072 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8073
8074 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8075 {
8076         unsigned long rflags;
8077
8078         rflags = kvm_x86_ops->get_rflags(vcpu);
8079         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8080                 rflags &= ~X86_EFLAGS_TF;
8081         return rflags;
8082 }
8083 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8084
8085 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8086 {
8087         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8088             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8089                 rflags |= X86_EFLAGS_TF;
8090         kvm_x86_ops->set_rflags(vcpu, rflags);
8091 }
8092
8093 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8094 {
8095         __kvm_set_rflags(vcpu, rflags);
8096         kvm_make_request(KVM_REQ_EVENT, vcpu);
8097 }
8098 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8099
8100 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8101 {
8102         int r;
8103
8104         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8105               work->wakeup_all)
8106                 return;
8107
8108         r = kvm_mmu_reload(vcpu);
8109         if (unlikely(r))
8110                 return;
8111
8112         if (!vcpu->arch.mmu.direct_map &&
8113               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8114                 return;
8115
8116         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8117 }
8118
8119 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8120 {
8121         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8122 }
8123
8124 static inline u32 kvm_async_pf_next_probe(u32 key)
8125 {
8126         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8127 }
8128
8129 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8130 {
8131         u32 key = kvm_async_pf_hash_fn(gfn);
8132
8133         while (vcpu->arch.apf.gfns[key] != ~0)
8134                 key = kvm_async_pf_next_probe(key);
8135
8136         vcpu->arch.apf.gfns[key] = gfn;
8137 }
8138
8139 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8140 {
8141         int i;
8142         u32 key = kvm_async_pf_hash_fn(gfn);
8143
8144         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8145                      (vcpu->arch.apf.gfns[key] != gfn &&
8146                       vcpu->arch.apf.gfns[key] != ~0); i++)
8147                 key = kvm_async_pf_next_probe(key);
8148
8149         return key;
8150 }
8151
8152 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8153 {
8154         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8155 }
8156
8157 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8158 {
8159         u32 i, j, k;
8160
8161         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8162         while (true) {
8163                 vcpu->arch.apf.gfns[i] = ~0;
8164                 do {
8165                         j = kvm_async_pf_next_probe(j);
8166                         if (vcpu->arch.apf.gfns[j] == ~0)
8167                                 return;
8168                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8169                         /*
8170                          * k lies cyclically in ]i,j]
8171                          * |    i.k.j |
8172                          * |....j i.k.| or  |.k..j i...|
8173                          */
8174                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8175                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8176                 i = j;
8177         }
8178 }
8179
8180 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8181 {
8182
8183         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8184                                       sizeof(val));
8185 }
8186
8187 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8188                                      struct kvm_async_pf *work)
8189 {
8190         struct x86_exception fault;
8191
8192         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8193         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8194
8195         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8196             (vcpu->arch.apf.send_user_only &&
8197              kvm_x86_ops->get_cpl(vcpu) == 0))
8198                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8199         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8200                 fault.vector = PF_VECTOR;
8201                 fault.error_code_valid = true;
8202                 fault.error_code = 0;
8203                 fault.nested_page_fault = false;
8204                 fault.address = work->arch.token;
8205                 kvm_inject_page_fault(vcpu, &fault);
8206         }
8207 }
8208
8209 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8210                                  struct kvm_async_pf *work)
8211 {
8212         struct x86_exception fault;
8213
8214         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8215         if (work->wakeup_all)
8216                 work->arch.token = ~0; /* broadcast wakeup */
8217         else
8218                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8219
8220         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8221             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8222                 fault.vector = PF_VECTOR;
8223                 fault.error_code_valid = true;
8224                 fault.error_code = 0;
8225                 fault.nested_page_fault = false;
8226                 fault.address = work->arch.token;
8227                 kvm_inject_page_fault(vcpu, &fault);
8228         }
8229         vcpu->arch.apf.halted = false;
8230         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8231 }
8232
8233 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8234 {
8235         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8236                 return true;
8237         else
8238                 return !kvm_event_needs_reinjection(vcpu) &&
8239                         kvm_x86_ops->interrupt_allowed(vcpu);
8240 }
8241
8242 void kvm_arch_start_assignment(struct kvm *kvm)
8243 {
8244         atomic_inc(&kvm->arch.assigned_device_count);
8245 }
8246 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8247
8248 void kvm_arch_end_assignment(struct kvm *kvm)
8249 {
8250         atomic_dec(&kvm->arch.assigned_device_count);
8251 }
8252 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8253
8254 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8255 {
8256         return atomic_read(&kvm->arch.assigned_device_count);
8257 }
8258 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8259
8260 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8261 {
8262         atomic_inc(&kvm->arch.noncoherent_dma_count);
8263 }
8264 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8265
8266 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8267 {
8268         atomic_dec(&kvm->arch.noncoherent_dma_count);
8269 }
8270 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8271
8272 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8273 {
8274         return atomic_read(&kvm->arch.noncoherent_dma_count);
8275 }
8276 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8277
8278 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8279                                       struct irq_bypass_producer *prod)
8280 {
8281         struct kvm_kernel_irqfd *irqfd =
8282                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8283
8284         if (kvm_x86_ops->update_pi_irte) {
8285                 irqfd->producer = prod;
8286                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8287                                 prod->irq, irqfd->gsi, 1);
8288         }
8289
8290         return -EINVAL;
8291 }
8292
8293 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8294                                       struct irq_bypass_producer *prod)
8295 {
8296         int ret;
8297         struct kvm_kernel_irqfd *irqfd =
8298                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8299
8300         if (!kvm_x86_ops->update_pi_irte) {
8301                 WARN_ON(irqfd->producer != NULL);
8302                 return;
8303         }
8304
8305         WARN_ON(irqfd->producer != prod);
8306         irqfd->producer = NULL;
8307
8308         /*
8309          * When producer of consumer is unregistered, we change back to
8310          * remapped mode, so we can re-use the current implementation
8311          * when the irq is masked/disabed or the consumer side (KVM
8312          * int this case doesn't want to receive the interrupts.
8313         */
8314         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8315         if (ret)
8316                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8317                        " fails: %d\n", irqfd->consumer.token, ret);
8318 }
8319
8320 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8321                                    uint32_t guest_irq, bool set)
8322 {
8323         if (!kvm_x86_ops->update_pi_irte)
8324                 return -EINVAL;
8325
8326         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8327 }
8328
8329 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8330 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8331 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8332 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8333 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8334 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8335 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8336 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8337 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8338 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8339 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8340 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8341 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8342 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8343 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8344 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8345 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);