kernel/arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117
 118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 119 static u32 __read_mostly tsc_tolerance_ppm = 250;
 120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 121
 122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 125
 126 static bool __read_mostly backwards_tsc_observed = false;
 127
 128 #define KVM_NR_SHARED_MSRS 16
 129
 130 struct kvm_shared_msrs_global {
 131         int nr;
 132         u32 msrs[KVM_NR_SHARED_MSRS];
 133 };
 134
 135 struct kvm_shared_msrs {
 136         struct user_return_notifier urn;
 137         bool registered;
 138         struct kvm_shared_msr_values {
 139                 u64 host;
 140                 u64 curr;
 141         } values[KVM_NR_SHARED_MSRS];
 142 };
 143
 144 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 145 static struct kvm_shared_msrs __percpu *shared_msrs;
 146
 147 struct kvm_stats_debugfs_item debugfs_entries[] = {
 148         { "pf_fixed", VCPU_STAT(pf_fixed) },
 149         { "pf_guest", VCPU_STAT(pf_guest) },
 150         { "tlb_flush", VCPU_STAT(tlb_flush) },
 151         { "invlpg", VCPU_STAT(invlpg) },
 152         { "exits", VCPU_STAT(exits) },
 153         { "io_exits", VCPU_STAT(io_exits) },
 154         { "mmio_exits", VCPU_STAT(mmio_exits) },
 155         { "signal_exits", VCPU_STAT(signal_exits) },
 156         { "irq_window", VCPU_STAT(irq_window_exits) },
 157         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 158         { "halt_exits", VCPU_STAT(halt_exits) },
 159         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 160         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 161         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 162         { "hypercalls", VCPU_STAT(hypercalls) },
 163         { "request_irq", VCPU_STAT(request_irq_exits) },
 164         { "irq_exits", VCPU_STAT(irq_exits) },
 165         { "host_state_reload", VCPU_STAT(host_state_reload) },
 166         { "efer_reload", VCPU_STAT(efer_reload) },
 167         { "fpu_reload", VCPU_STAT(fpu_reload) },
 168         { "insn_emulation", VCPU_STAT(insn_emulation) },
 169         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 170         { "irq_injections", VCPU_STAT(irq_injections) },
 171         { "nmi_injections", VCPU_STAT(nmi_injections) },
 172         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 173         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 174         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 175         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 176         { "mmu_flooded", VM_STAT(mmu_flooded) },
 177         { "mmu_recycled", VM_STAT(mmu_recycled) },
 178         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 179         { "mmu_unsync", VM_STAT(mmu_unsync) },
 180         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 181         { "largepages", VM_STAT(lpages) },
 182         { NULL }
 183 };
 184
 185 u64 __read_mostly host_xcr0;
 186
 187 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 188
 189 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 190 {
 191         int i;
 192         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 193                 vcpu->arch.apf.gfns[i] = ~0;
 194 }
 195
 196 static void kvm_on_user_return(struct user_return_notifier *urn)
 197 {
 198         unsigned slot;
 199         struct kvm_shared_msrs *locals
 200                 = container_of(urn, struct kvm_shared_msrs, urn);
 201         struct kvm_shared_msr_values *values;
 202
 203         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 204                 values = &locals->values[slot];
 205                 if (values->host != values->curr) {
 206                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 207                         values->curr = values->host;
 208                 }
 209         }
 210         locals->registered = false;
 211         user_return_notifier_unregister(urn);
 212 }
 213
 214 static void shared_msr_update(unsigned slot, u32 msr)
 215 {
 216         u64 value;
 217         unsigned int cpu = smp_processor_id();
 218         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 219
 220         /* only read, and nobody should modify it at this time,
 221          * so don't need lock */
 222         if (slot >= shared_msrs_global.nr) {
 223                 printk(KERN_ERR "kvm: invalid MSR slot!");
 224                 return;
 225         }
 226         rdmsrl_safe(msr, &value);
 227         smsr->values[slot].host = value;
 228         smsr->values[slot].curr = value;
 229 }
 230
 231 void kvm_define_shared_msr(unsigned slot, u32 msr)
 232 {
 233         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 234         shared_msrs_global.msrs[slot] = msr;
 235         if (slot >= shared_msrs_global.nr)
 236                 shared_msrs_global.nr = slot + 1;
 237 }
 238 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 239
 240 static void kvm_shared_msr_cpu_online(void)
 241 {
 242         unsigned i;
 243
 244         for (i = 0; i < shared_msrs_global.nr; ++i)
 245                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 246 }
 247
 248 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 249 {
 250         unsigned int cpu = smp_processor_id();
 251         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 252         int err;
 253
 254         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 255                 return 0;
 256         smsr->values[slot].curr = value;
 257         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 258         if (err)
 259                 return 1;
 260
 261         if (!smsr->registered) {
 262                 smsr->urn.on_user_return = kvm_on_user_return;
 263                 user_return_notifier_register(&smsr->urn);
 264                 smsr->registered = true;
 265         }
 266         return 0;
 267 }
 268 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 269
 270 static void drop_user_return_notifiers(void)
 271 {
 272         unsigned int cpu = smp_processor_id();
 273         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 274
 275         if (smsr->registered)
 276                 kvm_on_user_return(&smsr->urn);
 277 }
 278
 279 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 280 {
 281         return vcpu->arch.apic_base;
 282 }
 283 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 284
 285 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 286 {
 287         u64 old_state = vcpu->arch.apic_base &
 288                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 289         u64 new_state = msr_info->data &
 290                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 291         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 292                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 293
 294         if (!msr_info->host_initiated &&
 295             ((msr_info->data & reserved_bits) != 0 ||
 296              new_state == X2APIC_ENABLE ||
 297              (new_state == MSR_IA32_APICBASE_ENABLE &&
 298               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 299              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 300               old_state == 0)))
 301                 return 1;
 302
 303         kvm_lapic_set_base(vcpu, msr_info->data);
 304         return 0;
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 307
 308 asmlinkage __visible void kvm_spurious_fault(void)
 309 {
 310         /* Fault while not rebooting.  We want the trace. */
 311         BUG();
 312 }
 313 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 314
 315 #define EXCPT_BENIGN            0
 316 #define EXCPT_CONTRIBUTORY      1
 317 #define EXCPT_PF                2
 318
 319 static int exception_class(int vector)
 320 {
 321         switch (vector) {
 322         case PF_VECTOR:
 323                 return EXCPT_PF;
 324         case DE_VECTOR:
 325         case TS_VECTOR:
 326         case NP_VECTOR:
 327         case SS_VECTOR:
 328         case GP_VECTOR:
 329                 return EXCPT_CONTRIBUTORY;
 330         default:
 331                 break;
 332         }
 333         return EXCPT_BENIGN;
 334 }
 335
 336 #define EXCPT_FAULT             0
 337 #define EXCPT_TRAP              1
 338 #define EXCPT_ABORT             2
 339 #define EXCPT_INTERRUPT         3
 340
 341 static int exception_type(int vector)
 342 {
 343         unsigned int mask;
 344
 345         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 346                 return EXCPT_INTERRUPT;
 347
 348         mask = 1 << vector;
 349
 350         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 351         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 352                 return EXCPT_TRAP;
 353
 354         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 355                 return EXCPT_ABORT;
 356
 357         /* Reserved exceptions will result in fault */
 358         return EXCPT_FAULT;
 359 }
 360
 361 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 362                 unsigned nr, bool has_error, u32 error_code,
 363                 bool reinject)
 364 {
 365         u32 prev_nr;
 366         int class1, class2;
 367
 368         kvm_make_request(KVM_REQ_EVENT, vcpu);
 369
 370         if (!vcpu->arch.exception.pending) {
 371         queue:
 372                 if (has_error && !is_protmode(vcpu))
 373                         has_error = false;
 374                 vcpu->arch.exception.pending = true;
 375                 vcpu->arch.exception.has_error_code = has_error;
 376                 vcpu->arch.exception.nr = nr;
 377                 vcpu->arch.exception.error_code = error_code;
 378                 vcpu->arch.exception.reinject = reinject;
 379                 return;
 380         }
 381
 382         /* to check exception */
 383         prev_nr = vcpu->arch.exception.nr;
 384         if (prev_nr == DF_VECTOR) {
 385                 /* triple fault -> shutdown */
 386                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 387                 return;
 388         }
 389         class1 = exception_class(prev_nr);
 390         class2 = exception_class(nr);
 391         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 392                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 393                 /* generate double fault per SDM Table 5-5 */
 394                 vcpu->arch.exception.pending = true;
 395                 vcpu->arch.exception.has_error_code = true;
 396                 vcpu->arch.exception.nr = DF_VECTOR;
 397                 vcpu->arch.exception.error_code = 0;
 398         } else
 399                 /* replace previous exception with a new one in a hope
 400                    that instruction re-execution will regenerate lost
 401                    exception */
 402                 goto queue;
 403 }
 404
 405 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 406 {
 407         kvm_multiple_exception(vcpu, nr, false, 0, false);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 410
 411 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 412 {
 413         kvm_multiple_exception(vcpu, nr, false, 0, true);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 416
 417 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 418 {
 419         if (err)
 420                 kvm_inject_gp(vcpu, 0);
 421         else
 422                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 425
 426 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 427 {
 428         ++vcpu->stat.pf_guest;
 429         vcpu->arch.cr2 = fault->address;
 430         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 431 }
 432 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 433
 434 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 435 {
 436         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 437                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 438         else
 439                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 440
 441         return fault->nested_page_fault;
 442 }
 443
 444 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 445 {
 446         atomic_inc(&vcpu->arch.nmi_queued);
 447         kvm_make_request(KVM_REQ_NMI, vcpu);
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 450
 451 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 452 {
 453         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 454 }
 455 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 456
 457 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 458 {
 459         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 460 }
 461 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 462
 463 /*
 464  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 465  * a #GP and return false.
 466  */
 467 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 468 {
 469         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 470                 return true;
 471         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 472         return false;
 473 }
 474 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 475
 476 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 477 {
 478         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 479                 return true;
 480
 481         kvm_queue_exception(vcpu, UD_VECTOR);
 482         return false;
 483 }
 484 EXPORT_SYMBOL_GPL(kvm_require_dr);
 485
 486 /*
 487  * This function will be used to read from the physical memory of the currently
 488  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 489  * can read from guest physical or from the guest's guest physical memory.
 490  */
 491 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 492                             gfn_t ngfn, void *data, int offset, int len,
 493                             u32 access)
 494 {
 495         struct x86_exception exception;
 496         gfn_t real_gfn;
 497         gpa_t ngpa;
 498
 499         ngpa     = gfn_to_gpa(ngfn);
 500         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 501         if (real_gfn == UNMAPPED_GVA)
 502                 return -EFAULT;
 503
 504         real_gfn = gpa_to_gfn(real_gfn);
 505
 506         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 507 }
 508 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 509
 510 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 511                                void *data, int offset, int len, u32 access)
 512 {
 513         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 514                                        data, offset, len, access);
 515 }
 516
 517 /*
 518  * Load the pae pdptrs.  Return true is they are all valid.
 519  */
 520 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 521 {
 522         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 523         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 524         int i;
 525         int ret;
 526         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 527
 528         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 529                                       offset * sizeof(u64), sizeof(pdpte),
 530                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 531         if (ret < 0) {
 532                 ret = 0;
 533                 goto out;
 534         }
 535         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 536                 if (is_present_gpte(pdpte[i]) &&
 537                     (pdpte[i] &
 538                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 539                         ret = 0;
 540                         goto out;
 541                 }
 542         }
 543         ret = 1;
 544
 545         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 546         __set_bit(VCPU_EXREG_PDPTR,
 547                   (unsigned long *)&vcpu->arch.regs_avail);
 548         __set_bit(VCPU_EXREG_PDPTR,
 549                   (unsigned long *)&vcpu->arch.regs_dirty);
 550 out:
 551
 552         return ret;
 553 }
 554 EXPORT_SYMBOL_GPL(load_pdptrs);
 555
 556 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 557 {
 558         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 559         bool changed = true;
 560         int offset;
 561         gfn_t gfn;
 562         int r;
 563
 564         if (is_long_mode(vcpu) || !is_pae(vcpu))
 565                 return false;
 566
 567         if (!test_bit(VCPU_EXREG_PDPTR,
 568                       (unsigned long *)&vcpu->arch.regs_avail))
 569                 return true;
 570
 571         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 572         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 573         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 574                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 575         if (r < 0)
 576                 goto out;
 577         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 578 out:
 579
 580         return changed;
 581 }
 582
 583 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 584 {
 585         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 586         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 587
 588         cr0 |= X86_CR0_ET;
 589
 590 #ifdef CONFIG_X86_64
 591         if (cr0 & 0xffffffff00000000UL)
 592                 return 1;
 593 #endif
 594
 595         cr0 &= ~CR0_RESERVED_BITS;
 596
 597         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 598                 return 1;
 599
 600         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 601                 return 1;
 602
 603         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 604 #ifdef CONFIG_X86_64
 605                 if ((vcpu->arch.efer & EFER_LME)) {
 606                         int cs_db, cs_l;
 607
 608                         if (!is_pae(vcpu))
 609                                 return 1;
 610                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 611                         if (cs_l)
 612                                 return 1;
 613                 } else
 614 #endif
 615                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 616                                                  kvm_read_cr3(vcpu)))
 617                         return 1;
 618         }
 619
 620         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 621                 return 1;
 622
 623         kvm_x86_ops->set_cr0(vcpu, cr0);
 624
 625         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 626                 kvm_clear_async_pf_completion_queue(vcpu);
 627                 kvm_async_pf_hash_reset(vcpu);
 628         }
 629
 630         if ((cr0 ^ old_cr0) & update_bits)
 631                 kvm_mmu_reset_context(vcpu);
 632
 633         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 634             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 635             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 636                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 637
 638         return 0;
 639 }
 640 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 641
 642 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 643 {
 644         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 645 }
 646 EXPORT_SYMBOL_GPL(kvm_lmsw);
 647
 648 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 649 {
 650         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 651                         !vcpu->guest_xcr0_loaded) {
 652                 /* kvm_set_xcr() also depends on this */
 653                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 654                 vcpu->guest_xcr0_loaded = 1;
 655         }
 656 }
 657
 658 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 659 {
 660         if (vcpu->guest_xcr0_loaded) {
 661                 if (vcpu->arch.xcr0 != host_xcr0)
 662                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 663                 vcpu->guest_xcr0_loaded = 0;
 664         }
 665 }
 666
 667 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 668 {
 669         u64 xcr0 = xcr;
 670         u64 old_xcr0 = vcpu->arch.xcr0;
 671         u64 valid_bits;
 672
 673         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 674         if (index != XCR_XFEATURE_ENABLED_MASK)
 675                 return 1;
 676         if (!(xcr0 & XFEATURE_MASK_FP))
 677                 return 1;
 678         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 679                 return 1;
 680
 681         /*
 682          * Do not allow the guest to set bits that we do not support
 683          * saving.  However, xcr0 bit 0 is always set, even if the
 684          * emulated CPU does not support XSAVE (see fx_init).
 685          */
 686         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 687         if (xcr0 & ~valid_bits)
 688                 return 1;
 689
 690         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 691             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 692                 return 1;
 693
 694         if (xcr0 & XFEATURE_MASK_AVX512) {
 695                 if (!(xcr0 & XFEATURE_MASK_YMM))
 696                         return 1;
 697                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 698                         return 1;
 699         }
 700         kvm_put_guest_xcr0(vcpu);
 701         vcpu->arch.xcr0 = xcr0;
 702
 703         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 704                 kvm_update_cpuid(vcpu);
 705         return 0;
 706 }
 707
 708 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 709 {
 710         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 711             __kvm_set_xcr(vcpu, index, xcr)) {
 712                 kvm_inject_gp(vcpu, 0);
 713                 return 1;
 714         }
 715         return 0;
 716 }
 717 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 718
 719 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 720 {
 721         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 722         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 723                                    X86_CR4_SMEP | X86_CR4_SMAP;
 724
 725         if (cr4 & CR4_RESERVED_BITS)
 726                 return 1;
 727
 728         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 729                 return 1;
 730
 731         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 732                 return 1;
 733
 734         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 735                 return 1;
 736
 737         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 738                 return 1;
 739
 740         if (is_long_mode(vcpu)) {
 741                 if (!(cr4 & X86_CR4_PAE))
 742                         return 1;
 743         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 744                    && ((cr4 ^ old_cr4) & pdptr_bits)
 745                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 746                                    kvm_read_cr3(vcpu)))
 747                 return 1;
 748
 749         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 750                 if (!guest_cpuid_has_pcid(vcpu))
 751                         return 1;
 752
 753                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 754                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 755                         return 1;
 756         }
 757
 758         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 759                 return 1;
 760
 761         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 762             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 763                 kvm_mmu_reset_context(vcpu);
 764
 765         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 766                 kvm_update_cpuid(vcpu);
 767
 768         return 0;
 769 }
 770 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 771
 772 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 773 {
 774 #ifdef CONFIG_X86_64
 775         cr3 &= ~CR3_PCID_INVD;
 776 #endif
 777
 778         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 779                 kvm_mmu_sync_roots(vcpu);
 780                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 781                 return 0;
 782         }
 783
 784         if (is_long_mode(vcpu)) {
 785                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 786                         return 1;
 787         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 788                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 789                 return 1;
 790
 791         vcpu->arch.cr3 = cr3;
 792         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 793         kvm_mmu_new_cr3(vcpu);
 794         return 0;
 795 }
 796 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 797
 798 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 799 {
 800         if (cr8 & CR8_RESERVED_BITS)
 801                 return 1;
 802         if (lapic_in_kernel(vcpu))
 803                 kvm_lapic_set_tpr(vcpu, cr8);
 804         else
 805                 vcpu->arch.cr8 = cr8;
 806         return 0;
 807 }
 808 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 809
 810 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 811 {
 812         if (lapic_in_kernel(vcpu))
 813                 return kvm_lapic_get_cr8(vcpu);
 814         else
 815                 return vcpu->arch.cr8;
 816 }
 817 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 818
 819 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 820 {
 821         int i;
 822
 823         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 824                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 825                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 826                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 827         }
 828 }
 829
 830 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 831 {
 832         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 833                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 834 }
 835
 836 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 837 {
 838         unsigned long dr7;
 839
 840         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 841                 dr7 = vcpu->arch.guest_debug_dr7;
 842         else
 843                 dr7 = vcpu->arch.dr7;
 844         kvm_x86_ops->set_dr7(vcpu, dr7);
 845         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 846         if (dr7 & DR7_BP_EN_MASK)
 847                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 848 }
 849
 850 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 851 {
 852         u64 fixed = DR6_FIXED_1;
 853
 854         if (!guest_cpuid_has_rtm(vcpu))
 855                 fixed |= DR6_RTM;
 856         return fixed;
 857 }
 858
 859 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 860 {
 861         switch (dr) {
 862         case 0 ... 3:
 863                 vcpu->arch.db[dr] = val;
 864                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 865                         vcpu->arch.eff_db[dr] = val;
 866                 break;
 867         case 4:
 868                 /* fall through */
 869         case 6:
 870                 if (val & 0xffffffff00000000ULL)
 871                         return -1; /* #GP */
 872                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 873                 kvm_update_dr6(vcpu);
 874                 break;
 875         case 5:
 876                 /* fall through */
 877         default: /* 7 */
 878                 if (val & 0xffffffff00000000ULL)
 879                         return -1; /* #GP */
 880                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 881                 kvm_update_dr7(vcpu);
 882                 break;
 883         }
 884
 885         return 0;
 886 }
 887
 888 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 889 {
 890         if (__kvm_set_dr(vcpu, dr, val)) {
 891                 kvm_inject_gp(vcpu, 0);
 892                 return 1;
 893         }
 894         return 0;
 895 }
 896 EXPORT_SYMBOL_GPL(kvm_set_dr);
 897
 898 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 899 {
 900         switch (dr) {
 901         case 0 ... 3:
 902                 *val = vcpu->arch.db[dr];
 903                 break;
 904         case 4:
 905                 /* fall through */
 906         case 6:
 907                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 908                         *val = vcpu->arch.dr6;
 909                 else
 910                         *val = kvm_x86_ops->get_dr6(vcpu);
 911                 break;
 912         case 5:
 913                 /* fall through */
 914         default: /* 7 */
 915                 *val = vcpu->arch.dr7;
 916                 break;
 917         }
 918         return 0;
 919 }
 920 EXPORT_SYMBOL_GPL(kvm_get_dr);
 921
 922 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 923 {
 924         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 925         u64 data;
 926         int err;
 927
 928         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 929         if (err)
 930                 return err;
 931         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 932         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 933         return err;
 934 }
 935 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 936
 937 /*
 938  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 939  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 940  *
 941  * This list is modified at module load time to reflect the
 942  * capabilities of the host cpu. This capabilities test skips MSRs that are
 943  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 944  * may depend on host virtualization features rather than host cpu features.
 945  */
 946
 947 static u32 msrs_to_save[] = {
 948         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 949         MSR_STAR,
 950 #ifdef CONFIG_X86_64
 951         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 952 #endif
 953         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 954         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 955 };
 956
 957 static unsigned num_msrs_to_save;
 958
 959 static u32 emulated_msrs[] = {
 960         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 961         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 962         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 963         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 964         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 965         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 966         HV_X64_MSR_RESET,
 967         HV_X64_MSR_VP_INDEX,
 968         HV_X64_MSR_VP_RUNTIME,
 969         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 970         MSR_KVM_PV_EOI_EN,
 971
 972         MSR_IA32_TSC_ADJUST,
 973         MSR_IA32_TSCDEADLINE,
 974         MSR_IA32_MISC_ENABLE,
 975         MSR_IA32_MCG_STATUS,
 976         MSR_IA32_MCG_CTL,
 977         MSR_IA32_SMBASE,
 978 };
 979
 980 static unsigned num_emulated_msrs;
 981
 982 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 983 {
 984         if (efer & efer_reserved_bits)
 985                 return false;
 986
 987         if (efer & EFER_FFXSR) {
 988                 struct kvm_cpuid_entry2 *feat;
 989
 990                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 991                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 992                         return false;
 993         }
 994
 995         if (efer & EFER_SVME) {
 996                 struct kvm_cpuid_entry2 *feat;
 997
 998                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 999                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1000                         return false;
1001         }
1002
1003         return true;
1004 }
1005 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1006
1007 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1008 {
1009         u64 old_efer = vcpu->arch.efer;
1010
1011         if (!kvm_valid_efer(vcpu, efer))
1012                 return 1;
1013
1014         if (is_paging(vcpu)
1015             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1016                 return 1;
1017
1018         efer &= ~EFER_LMA;
1019         efer |= vcpu->arch.efer & EFER_LMA;
1020
1021         kvm_x86_ops->set_efer(vcpu, efer);
1022
1023         /* Update reserved bits */
1024         if ((efer ^ old_efer) & EFER_NX)
1025                 kvm_mmu_reset_context(vcpu);
1026
1027         return 0;
1028 }
1029
1030 void kvm_enable_efer_bits(u64 mask)
1031 {
1032        efer_reserved_bits &= ~mask;
1033 }
1034 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1035
1036 /*
1037  * Writes msr value into into the appropriate "register".
1038  * Returns 0 on success, non-0 otherwise.
1039  * Assumes vcpu_load() was already called.
1040  */
1041 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1042 {
1043         switch (msr->index) {
1044         case MSR_FS_BASE:
1045         case MSR_GS_BASE:
1046         case MSR_KERNEL_GS_BASE:
1047         case MSR_CSTAR:
1048         case MSR_LSTAR:
1049                 if (is_noncanonical_address(msr->data))
1050                         return 1;
1051                 break;
1052         case MSR_IA32_SYSENTER_EIP:
1053         case MSR_IA32_SYSENTER_ESP:
1054                 /*
1055                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1056                  * non-canonical address is written on Intel but not on
1057                  * AMD (which ignores the top 32-bits, because it does
1058                  * not implement 64-bit SYSENTER).
1059                  *
1060                  * 64-bit code should hence be able to write a non-canonical
1061                  * value on AMD.  Making the address canonical ensures that
1062                  * vmentry does not fail on Intel after writing a non-canonical
1063                  * value, and that something deterministic happens if the guest
1064                  * invokes 64-bit SYSENTER.
1065                  */
1066                 msr->data = get_canonical(msr->data);
1067         }
1068         return kvm_x86_ops->set_msr(vcpu, msr);
1069 }
1070 EXPORT_SYMBOL_GPL(kvm_set_msr);
1071
1072 /*
1073  * Adapt set_msr() to msr_io()'s calling convention
1074  */
1075 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1076 {
1077         struct msr_data msr;
1078         int r;
1079
1080         msr.index = index;
1081         msr.host_initiated = true;
1082         r = kvm_get_msr(vcpu, &msr);
1083         if (r)
1084                 return r;
1085
1086         *data = msr.data;
1087         return 0;
1088 }
1089
1090 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1091 {
1092         struct msr_data msr;
1093
1094         msr.data = *data;
1095         msr.index = index;
1096         msr.host_initiated = true;
1097         return kvm_set_msr(vcpu, &msr);
1098 }
1099
1100 #ifdef CONFIG_X86_64
1101 struct pvclock_gtod_data {
1102         seqcount_t      seq;
1103
1104         struct { /* extract of a clocksource struct */
1105                 int vclock_mode;
1106                 cycle_t cycle_last;
1107                 cycle_t mask;
1108                 u32     mult;
1109                 u32     shift;
1110         } clock;
1111
1112         u64             boot_ns;
1113         u64             nsec_base;
1114 };
1115
1116 static struct pvclock_gtod_data pvclock_gtod_data;
1117
1118 static void update_pvclock_gtod(struct timekeeper *tk)
1119 {
1120         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1121         u64 boot_ns;
1122
1123         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1124
1125         write_seqcount_begin(&vdata->seq);
1126
1127         /* copy pvclock gtod data */
1128         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1129         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1130         vdata->clock.mask               = tk->tkr_mono.mask;
1131         vdata->clock.mult               = tk->tkr_mono.mult;
1132         vdata->clock.shift              = tk->tkr_mono.shift;
1133
1134         vdata->boot_ns                  = boot_ns;
1135         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1136
1137         write_seqcount_end(&vdata->seq);
1138 }
1139 #endif
1140
1141 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1142 {
1143         /*
1144          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1145          * vcpu_enter_guest.  This function is only called from
1146          * the physical CPU that is running vcpu.
1147          */
1148         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1149 }
1150
1151 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1152 {
1153         int version;
1154         int r;
1155         struct pvclock_wall_clock wc;
1156         struct timespec boot;
1157
1158         if (!wall_clock)
1159                 return;
1160
1161         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1162         if (r)
1163                 return;
1164
1165         if (version & 1)
1166                 ++version;  /* first time write, random junk */
1167
1168         ++version;
1169
1170         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1171
1172         /*
1173          * The guest calculates current wall clock time by adding
1174          * system time (updated by kvm_guest_time_update below) to the
1175          * wall clock specified here.  guest system time equals host
1176          * system time for us, thus we must fill in host boot time here.
1177          */
1178         getboottime(&boot);
1179
1180         if (kvm->arch.kvmclock_offset) {
1181                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1182                 boot = timespec_sub(boot, ts);
1183         }
1184         wc.sec = boot.tv_sec;
1185         wc.nsec = boot.tv_nsec;
1186         wc.version = version;
1187
1188         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1189
1190         version++;
1191         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1192 }
1193
1194 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1195 {
1196         uint32_t quotient, remainder;
1197
1198         /* Don't try to replace with do_div(), this one calculates
1199          * "(dividend << 32) / divisor" */
1200         __asm__ ( "divl %4"
1201                   : "=a" (quotient), "=d" (remainder)
1202                   : "0" (0), "1" (dividend), "r" (divisor) );
1203         return quotient;
1204 }
1205
1206 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1207                                s8 *pshift, u32 *pmultiplier)
1208 {
1209         uint64_t scaled64;
1210         int32_t  shift = 0;
1211         uint64_t tps64;
1212         uint32_t tps32;
1213
1214         tps64 = base_khz * 1000LL;
1215         scaled64 = scaled_khz * 1000LL;
1216         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1217                 tps64 >>= 1;
1218                 shift--;
1219         }
1220
1221         tps32 = (uint32_t)tps64;
1222         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1223                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1224                         scaled64 >>= 1;
1225                 else
1226                         tps32 <<= 1;
1227                 shift++;
1228         }
1229
1230         *pshift = shift;
1231         *pmultiplier = div_frac(scaled64, tps32);
1232
1233         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1234                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1235 }
1236
1237 #ifdef CONFIG_X86_64
1238 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1239 #endif
1240
1241 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1242 static unsigned long max_tsc_khz;
1243
1244 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1245 {
1246         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1247                                    vcpu->arch.virtual_tsc_shift);
1248 }
1249
1250 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1251 {
1252         u64 v = (u64)khz * (1000000 + ppm);
1253         do_div(v, 1000000);
1254         return v;
1255 }
1256
1257 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1258 {
1259         u64 ratio;
1260
1261         /* Guest TSC same frequency as host TSC? */
1262         if (!scale) {
1263                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1264                 return 0;
1265         }
1266
1267         /* TSC scaling supported? */
1268         if (!kvm_has_tsc_control) {
1269                 if (user_tsc_khz > tsc_khz) {
1270                         vcpu->arch.tsc_catchup = 1;
1271                         vcpu->arch.tsc_always_catchup = 1;
1272                         return 0;
1273                 } else {
1274                         WARN(1, "user requested TSC rate below hardware speed\n");
1275                         return -1;
1276                 }
1277         }
1278
1279         /* TSC scaling required  - calculate ratio */
1280         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1281                                 user_tsc_khz, tsc_khz);
1282
1283         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1284                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1285                           user_tsc_khz);
1286                 return -1;
1287         }
1288
1289         vcpu->arch.tsc_scaling_ratio = ratio;
1290         return 0;
1291 }
1292
1293 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1294 {
1295         u32 thresh_lo, thresh_hi;
1296         int use_scaling = 0;
1297
1298         /* tsc_khz can be zero if TSC calibration fails */
1299         if (this_tsc_khz == 0) {
1300                 /* set tsc_scaling_ratio to a safe value */
1301                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1302                 return -1;
1303         }
1304
1305         /* Compute a scale to convert nanoseconds in TSC cycles */
1306         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1307                            &vcpu->arch.virtual_tsc_shift,
1308                            &vcpu->arch.virtual_tsc_mult);
1309         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1310
1311         /*
1312          * Compute the variation in TSC rate which is acceptable
1313          * within the range of tolerance and decide if the
1314          * rate being applied is within that bounds of the hardware
1315          * rate.  If so, no scaling or compensation need be done.
1316          */
1317         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1318         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1319         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1320                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1321                 use_scaling = 1;
1322         }
1323         return set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1324 }
1325
1326 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1327 {
1328         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1329                                       vcpu->arch.virtual_tsc_mult,
1330                                       vcpu->arch.virtual_tsc_shift);
1331         tsc += vcpu->arch.this_tsc_write;
1332         return tsc;
1333 }
1334
1335 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1336 {
1337 #ifdef CONFIG_X86_64
1338         bool vcpus_matched;
1339         struct kvm_arch *ka = &vcpu->kvm->arch;
1340         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1341
1342         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1343                          atomic_read(&vcpu->kvm->online_vcpus));
1344
1345         /*
1346          * Once the masterclock is enabled, always perform request in
1347          * order to update it.
1348          *
1349          * In order to enable masterclock, the host clocksource must be TSC
1350          * and the vcpus need to have matched TSCs.  When that happens,
1351          * perform request to enable masterclock.
1352          */
1353         if (ka->use_master_clock ||
1354             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1355                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1356
1357         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1358                             atomic_read(&vcpu->kvm->online_vcpus),
1359                             ka->use_master_clock, gtod->clock.vclock_mode);
1360 #endif
1361 }
1362
1363 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1364 {
1365         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1366         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1367 }
1368
1369 /*
1370  * Multiply tsc by a fixed point number represented by ratio.
1371  *
1372  * The most significant 64-N bits (mult) of ratio represent the
1373  * integral part of the fixed point number; the remaining N bits
1374  * (frac) represent the fractional part, ie. ratio represents a fixed
1375  * point number (mult + frac * 2^(-N)).
1376  *
1377  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1378  */
1379 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1380 {
1381         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1382 }
1383
1384 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1385 {
1386         u64 _tsc = tsc;
1387         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1388
1389         if (ratio != kvm_default_tsc_scaling_ratio)
1390                 _tsc = __scale_tsc(ratio, tsc);
1391
1392         return _tsc;
1393 }
1394 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1395
1396 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1397 {
1398         u64 tsc;
1399
1400         tsc = kvm_scale_tsc(vcpu, rdtsc());
1401
1402         return target_tsc - tsc;
1403 }
1404
1405 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1406 {
1407         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1408 }
1409 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1410
1411 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1412 {
1413         struct kvm *kvm = vcpu->kvm;
1414         u64 offset, ns, elapsed;
1415         unsigned long flags;
1416         s64 usdiff;
1417         bool matched;
1418         bool already_matched;
1419         u64 data = msr->data;
1420
1421         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1422         offset = kvm_compute_tsc_offset(vcpu, data);
1423         ns = get_kernel_ns();
1424         elapsed = ns - kvm->arch.last_tsc_nsec;
1425
1426         if (vcpu->arch.virtual_tsc_khz) {
1427                 int faulted = 0;
1428
1429                 /* n.b - signed multiplication and division required */
1430                 usdiff = data - kvm->arch.last_tsc_write;
1431 #ifdef CONFIG_X86_64
1432                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1433 #else
1434                 /* do_div() only does unsigned */
1435                 asm("1: idivl %[divisor]\n"
1436                     "2: xor %%edx, %%edx\n"
1437                     "   movl $0, %[faulted]\n"
1438                     "3:\n"
1439                     ".section .fixup,\"ax\"\n"
1440                     "4: movl $1, %[faulted]\n"
1441                     "   jmp  3b\n"
1442                     ".previous\n"
1443
1444                 _ASM_EXTABLE(1b, 4b)
1445
1446                 : "=A"(usdiff), [faulted] "=r" (faulted)
1447                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1448
1449 #endif
1450                 do_div(elapsed, 1000);
1451                 usdiff -= elapsed;
1452                 if (usdiff < 0)
1453                         usdiff = -usdiff;
1454
1455                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1456                 if (faulted)
1457                         usdiff = USEC_PER_SEC;
1458         } else
1459                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1460
1461         /*
1462          * Special case: TSC write with a small delta (1 second) of virtual
1463          * cycle time against real time is interpreted as an attempt to
1464          * synchronize the CPU.
1465          *
1466          * For a reliable TSC, we can match TSC offsets, and for an unstable
1467          * TSC, we add elapsed time in this computation.  We could let the
1468          * compensation code attempt to catch up if we fall behind, but
1469          * it's better to try to match offsets from the beginning.
1470          */
1471         if (usdiff < USEC_PER_SEC &&
1472             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1473                 if (!check_tsc_unstable()) {
1474                         offset = kvm->arch.cur_tsc_offset;
1475                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1476                 } else {
1477                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1478                         data += delta;
1479                         offset = kvm_compute_tsc_offset(vcpu, data);
1480                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1481                 }
1482                 matched = true;
1483                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1484         } else {
1485                 /*
1486                  * We split periods of matched TSC writes into generations.
1487                  * For each generation, we track the original measured
1488                  * nanosecond time, offset, and write, so if TSCs are in
1489                  * sync, we can match exact offset, and if not, we can match
1490                  * exact software computation in compute_guest_tsc()
1491                  *
1492                  * These values are tracked in kvm->arch.cur_xxx variables.
1493                  */
1494                 kvm->arch.cur_tsc_generation++;
1495                 kvm->arch.cur_tsc_nsec = ns;
1496                 kvm->arch.cur_tsc_write = data;
1497                 kvm->arch.cur_tsc_offset = offset;
1498                 matched = false;
1499                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1500                          kvm->arch.cur_tsc_generation, data);
1501         }
1502
1503         /*
1504          * We also track th most recent recorded KHZ, write and time to
1505          * allow the matching interval to be extended at each write.
1506          */
1507         kvm->arch.last_tsc_nsec = ns;
1508         kvm->arch.last_tsc_write = data;
1509         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1510
1511         vcpu->arch.last_guest_tsc = data;
1512
1513         /* Keep track of which generation this VCPU has synchronized to */
1514         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1515         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1516         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1517
1518         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1519                 update_ia32_tsc_adjust_msr(vcpu, offset);
1520         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1521         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1522
1523         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1524         if (!matched) {
1525                 kvm->arch.nr_vcpus_matched_tsc = 0;
1526         } else if (!already_matched) {
1527                 kvm->arch.nr_vcpus_matched_tsc++;
1528         }
1529
1530         kvm_track_tsc_matching(vcpu);
1531         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1532 }
1533
1534 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1535
1536 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1537                                            s64 adjustment)
1538 {
1539         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1540 }
1541
1542 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1543 {
1544         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1545                 WARN_ON(adjustment < 0);
1546         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1547         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1548 }
1549
1550 #ifdef CONFIG_X86_64
1551
1552 static cycle_t read_tsc(void)
1553 {
1554         cycle_t ret = (cycle_t)rdtsc_ordered();
1555         u64 last = pvclock_gtod_data.clock.cycle_last;
1556
1557         if (likely(ret >= last))
1558                 return ret;
1559
1560         /*
1561          * GCC likes to generate cmov here, but this branch is extremely
1562          * predictable (it's just a funciton of time and the likely is
1563          * very likely) and there's a data dependence, so force GCC
1564          * to generate a branch instead.  I don't barrier() because
1565          * we don't actually need a barrier, and if this function
1566          * ever gets inlined it will generate worse code.
1567          */
1568         asm volatile ("");
1569         return last;
1570 }
1571
1572 static inline u64 vgettsc(cycle_t *cycle_now)
1573 {
1574         long v;
1575         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1576
1577         *cycle_now = read_tsc();
1578
1579         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1580         return v * gtod->clock.mult;
1581 }
1582
1583 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1584 {
1585         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1586         unsigned long seq;
1587         int mode;
1588         u64 ns;
1589
1590         do {
1591                 seq = read_seqcount_begin(&gtod->seq);
1592                 mode = gtod->clock.vclock_mode;
1593                 ns = gtod->nsec_base;
1594                 ns += vgettsc(cycle_now);
1595                 ns >>= gtod->clock.shift;
1596                 ns += gtod->boot_ns;
1597         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1598         *t = ns;
1599
1600         return mode;
1601 }
1602
1603 /* returns true if host is using tsc clocksource */
1604 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1605 {
1606         /* checked again under seqlock below */
1607         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1608                 return false;
1609
1610         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1611 }
1612 #endif
1613
1614 /*
1615  *
1616  * Assuming a stable TSC across physical CPUS, and a stable TSC
1617  * across virtual CPUs, the following condition is possible.
1618  * Each numbered line represents an event visible to both
1619  * CPUs at the next numbered event.
1620  *
1621  * "timespecX" represents host monotonic time. "tscX" represents
1622  * RDTSC value.
1623  *
1624  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1625  *
1626  * 1.  read timespec0,tsc0
1627  * 2.                                   | timespec1 = timespec0 + N
1628  *                                      | tsc1 = tsc0 + M
1629  * 3. transition to guest               | transition to guest
1630  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1631  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1632  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1633  *
1634  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1635  *
1636  *      - ret0 < ret1
1637  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1638  *              ...
1639  *      - 0 < N - M => M < N
1640  *
1641  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1642  * always the case (the difference between two distinct xtime instances
1643  * might be smaller then the difference between corresponding TSC reads,
1644  * when updating guest vcpus pvclock areas).
1645  *
1646  * To avoid that problem, do not allow visibility of distinct
1647  * system_timestamp/tsc_timestamp values simultaneously: use a master
1648  * copy of host monotonic time values. Update that master copy
1649  * in lockstep.
1650  *
1651  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1652  *
1653  */
1654
1655 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1656 {
1657 #ifdef CONFIG_X86_64
1658         struct kvm_arch *ka = &kvm->arch;
1659         int vclock_mode;
1660         bool host_tsc_clocksource, vcpus_matched;
1661
1662         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1663                         atomic_read(&kvm->online_vcpus));
1664
1665         /*
1666          * If the host uses TSC clock, then passthrough TSC as stable
1667          * to the guest.
1668          */
1669         host_tsc_clocksource = kvm_get_time_and_clockread(
1670                                         &ka->master_kernel_ns,
1671                                         &ka->master_cycle_now);
1672
1673         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1674                                 && !backwards_tsc_observed
1675                                 && !ka->boot_vcpu_runs_old_kvmclock;
1676
1677         if (ka->use_master_clock)
1678                 atomic_set(&kvm_guest_has_master_clock, 1);
1679
1680         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1681         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1682                                         vcpus_matched);
1683 #endif
1684 }
1685
1686 static void kvm_gen_update_masterclock(struct kvm *kvm)
1687 {
1688 #ifdef CONFIG_X86_64
1689         int i;
1690         struct kvm_vcpu *vcpu;
1691         struct kvm_arch *ka = &kvm->arch;
1692
1693         spin_lock(&ka->pvclock_gtod_sync_lock);
1694         kvm_make_mclock_inprogress_request(kvm);
1695         /* no guest entries from this point */
1696         pvclock_update_vm_gtod_copy(kvm);
1697
1698         kvm_for_each_vcpu(i, vcpu, kvm)
1699                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1700
1701         /* guest entries allowed */
1702         kvm_for_each_vcpu(i, vcpu, kvm)
1703                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1704
1705         spin_unlock(&ka->pvclock_gtod_sync_lock);
1706 #endif
1707 }
1708
1709 static int kvm_guest_time_update(struct kvm_vcpu *v)
1710 {
1711         unsigned long flags, this_tsc_khz, tgt_tsc_khz;
1712         struct kvm_vcpu_arch *vcpu = &v->arch;
1713         struct kvm_arch *ka = &v->kvm->arch;
1714         s64 kernel_ns;
1715         u64 tsc_timestamp, host_tsc;
1716         struct pvclock_vcpu_time_info guest_hv_clock;
1717         u8 pvclock_flags;
1718         bool use_master_clock;
1719
1720         kernel_ns = 0;
1721         host_tsc = 0;
1722
1723         /*
1724          * If the host uses TSC clock, then passthrough TSC as stable
1725          * to the guest.
1726          */
1727         spin_lock(&ka->pvclock_gtod_sync_lock);
1728         use_master_clock = ka->use_master_clock;
1729         if (use_master_clock) {
1730                 host_tsc = ka->master_cycle_now;
1731                 kernel_ns = ka->master_kernel_ns;
1732         }
1733         spin_unlock(&ka->pvclock_gtod_sync_lock);
1734
1735         /* Keep irq disabled to prevent changes to the clock */
1736         local_irq_save(flags);
1737         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1738         if (unlikely(this_tsc_khz == 0)) {
1739                 local_irq_restore(flags);
1740                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1741                 return 1;
1742         }
1743         if (!use_master_clock) {
1744                 host_tsc = rdtsc();
1745                 kernel_ns = get_kernel_ns();
1746         }
1747
1748         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1749
1750         /*
1751          * We may have to catch up the TSC to match elapsed wall clock
1752          * time for two reasons, even if kvmclock is used.
1753          *   1) CPU could have been running below the maximum TSC rate
1754          *   2) Broken TSC compensation resets the base at each VCPU
1755          *      entry to avoid unknown leaps of TSC even when running
1756          *      again on the same CPU.  This may cause apparent elapsed
1757          *      time to disappear, and the guest to stand still or run
1758          *      very slowly.
1759          */
1760         if (vcpu->tsc_catchup) {
1761                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1762                 if (tsc > tsc_timestamp) {
1763                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1764                         tsc_timestamp = tsc;
1765                 }
1766         }
1767
1768         local_irq_restore(flags);
1769
1770         if (!vcpu->pv_time_enabled)
1771                 return 0;
1772
1773         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1774                 tgt_tsc_khz = kvm_has_tsc_control ?
1775                         vcpu->virtual_tsc_khz : this_tsc_khz;
1776                 kvm_get_time_scale(NSEC_PER_SEC / 1000, tgt_tsc_khz,
1777                                    &vcpu->hv_clock.tsc_shift,
1778                                    &vcpu->hv_clock.tsc_to_system_mul);
1779                 vcpu->hw_tsc_khz = this_tsc_khz;
1780         }
1781
1782         /* With all the info we got, fill in the values */
1783         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1784         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1785         vcpu->last_guest_tsc = tsc_timestamp;
1786
1787         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1788                 &guest_hv_clock, sizeof(guest_hv_clock))))
1789                 return 0;
1790
1791         /* This VCPU is paused, but it's legal for a guest to read another
1792          * VCPU's kvmclock, so we really have to follow the specification where
1793          * it says that version is odd if data is being modified, and even after
1794          * it is consistent.
1795          *
1796          * Version field updates must be kept separate.  This is because
1797          * kvm_write_guest_cached might use a "rep movs" instruction, and
1798          * writes within a string instruction are weakly ordered.  So there
1799          * are three writes overall.
1800          *
1801          * As a small optimization, only write the version field in the first
1802          * and third write.  The vcpu->pv_time cache is still valid, because the
1803          * version field is the first in the struct.
1804          */
1805         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1806
1807         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1808         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1809                                 &vcpu->hv_clock,
1810                                 sizeof(vcpu->hv_clock.version));
1811
1812         smp_wmb();
1813
1814         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1815         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1816
1817         if (vcpu->pvclock_set_guest_stopped_request) {
1818                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1819                 vcpu->pvclock_set_guest_stopped_request = false;
1820         }
1821
1822         /* If the host uses TSC clocksource, then it is stable */
1823         if (use_master_clock)
1824                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1825
1826         vcpu->hv_clock.flags = pvclock_flags;
1827
1828         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1829
1830         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1831                                 &vcpu->hv_clock,
1832                                 sizeof(vcpu->hv_clock));
1833
1834         smp_wmb();
1835
1836         vcpu->hv_clock.version++;
1837         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1838                                 &vcpu->hv_clock,
1839                                 sizeof(vcpu->hv_clock.version));
1840         return 0;
1841 }
1842
1843 /*
1844  * kvmclock updates which are isolated to a given vcpu, such as
1845  * vcpu->cpu migration, should not allow system_timestamp from
1846  * the rest of the vcpus to remain static. Otherwise ntp frequency
1847  * correction applies to one vcpu's system_timestamp but not
1848  * the others.
1849  *
1850  * So in those cases, request a kvmclock update for all vcpus.
1851  * We need to rate-limit these requests though, as they can
1852  * considerably slow guests that have a large number of vcpus.
1853  * The time for a remote vcpu to update its kvmclock is bound
1854  * by the delay we use to rate-limit the updates.
1855  */
1856
1857 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1858
1859 static void kvmclock_update_fn(struct work_struct *work)
1860 {
1861         int i;
1862         struct delayed_work *dwork = to_delayed_work(work);
1863         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1864                                            kvmclock_update_work);
1865         struct kvm *kvm = container_of(ka, struct kvm, arch);
1866         struct kvm_vcpu *vcpu;
1867
1868         kvm_for_each_vcpu(i, vcpu, kvm) {
1869                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1870                 kvm_vcpu_kick(vcpu);
1871         }
1872 }
1873
1874 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1875 {
1876         struct kvm *kvm = v->kvm;
1877
1878         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1879         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1880                                         KVMCLOCK_UPDATE_DELAY);
1881 }
1882
1883 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1884
1885 static void kvmclock_sync_fn(struct work_struct *work)
1886 {
1887         struct delayed_work *dwork = to_delayed_work(work);
1888         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1889                                            kvmclock_sync_work);
1890         struct kvm *kvm = container_of(ka, struct kvm, arch);
1891
1892         if (!kvmclock_periodic_sync)
1893                 return;
1894
1895         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1896         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1897                                         KVMCLOCK_SYNC_PERIOD);
1898 }
1899
1900 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1901 {
1902         u64 mcg_cap = vcpu->arch.mcg_cap;
1903         unsigned bank_num = mcg_cap & 0xff;
1904
1905         switch (msr) {
1906         case MSR_IA32_MCG_STATUS:
1907                 vcpu->arch.mcg_status = data;
1908                 break;
1909         case MSR_IA32_MCG_CTL:
1910                 if (!(mcg_cap & MCG_CTL_P))
1911                         return 1;
1912                 if (data != 0 && data != ~(u64)0)
1913                         return -1;
1914                 vcpu->arch.mcg_ctl = data;
1915                 break;
1916         default:
1917                 if (msr >= MSR_IA32_MC0_CTL &&
1918                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1919                         u32 offset = msr - MSR_IA32_MC0_CTL;
1920                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1921                          * some Linux kernels though clear bit 10 in bank 4 to
1922                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1923                          * this to avoid an uncatched #GP in the guest
1924                          */
1925                         if ((offset & 0x3) == 0 &&
1926                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1927                                 return -1;
1928                         vcpu->arch.mce_banks[offset] = data;
1929                         break;
1930                 }
1931                 return 1;
1932         }
1933         return 0;
1934 }
1935
1936 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1937 {
1938         struct kvm *kvm = vcpu->kvm;
1939         int lm = is_long_mode(vcpu);
1940         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1941                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1942         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1943                 : kvm->arch.xen_hvm_config.blob_size_32;
1944         u32 page_num = data & ~PAGE_MASK;
1945         u64 page_addr = data & PAGE_MASK;
1946         u8 *page;
1947         int r;
1948
1949         r = -E2BIG;
1950         if (page_num >= blob_size)
1951                 goto out;
1952         r = -ENOMEM;
1953         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1954         if (IS_ERR(page)) {
1955                 r = PTR_ERR(page);
1956                 goto out;
1957         }
1958         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1959                 goto out_free;
1960         r = 0;
1961 out_free:
1962         kfree(page);
1963 out:
1964         return r;
1965 }
1966
1967 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1968 {
1969         gpa_t gpa = data & ~0x3f;
1970
1971         /* Bits 2:5 are reserved, Should be zero */
1972         if (data & 0x3c)
1973                 return 1;
1974
1975         vcpu->arch.apf.msr_val = data;
1976
1977         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1978                 kvm_clear_async_pf_completion_queue(vcpu);
1979                 kvm_async_pf_hash_reset(vcpu);
1980                 return 0;
1981         }
1982
1983         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1984                                         sizeof(u32)))
1985                 return 1;
1986
1987         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1988         kvm_async_pf_wakeup_all(vcpu);
1989         return 0;
1990 }
1991
1992 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1993 {
1994         vcpu->arch.pv_time_enabled = false;
1995 }
1996
1997 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1998 {
1999         u64 delta;
2000
2001         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2002                 return;
2003
2004         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2005         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2006         vcpu->arch.st.accum_steal = delta;
2007 }
2008
2009 static void record_steal_time(struct kvm_vcpu *vcpu)
2010 {
2011         accumulate_steal_time(vcpu);
2012
2013         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2014                 return;
2015
2016         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2017                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2018                 return;
2019
2020         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2021         vcpu->arch.st.steal.version += 2;
2022         vcpu->arch.st.accum_steal = 0;
2023
2024         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2025                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2026 }
2027
2028 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2029 {
2030         bool pr = false;
2031         u32 msr = msr_info->index;
2032         u64 data = msr_info->data;
2033
2034         switch (msr) {
2035         case MSR_AMD64_NB_CFG:
2036         case MSR_IA32_UCODE_REV:
2037         case MSR_IA32_UCODE_WRITE:
2038         case MSR_VM_HSAVE_PA:
2039         case MSR_AMD64_PATCH_LOADER:
2040         case MSR_AMD64_BU_CFG2:
2041                 break;
2042
2043         case MSR_EFER:
2044                 return set_efer(vcpu, data);
2045         case MSR_K7_HWCR:
2046                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2047                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2048                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2049                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2050                 if (data != 0) {
2051                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2052                                     data);
2053                         return 1;
2054                 }
2055                 break;
2056         case MSR_FAM10H_MMIO_CONF_BASE:
2057                 if (data != 0) {
2058                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2059                                     "0x%llx\n", data);
2060                         return 1;
2061                 }
2062                 break;
2063         case MSR_IA32_DEBUGCTLMSR:
2064                 if (!data) {
2065                         /* We support the non-activated case already */
2066                         break;
2067                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2068                         /* Values other than LBR and BTF are vendor-specific,
2069                            thus reserved and should throw a #GP */
2070                         return 1;
2071                 }
2072                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2073                             __func__, data);
2074                 break;
2075         case 0x200 ... 0x2ff:
2076                 return kvm_mtrr_set_msr(vcpu, msr, data);
2077         case MSR_IA32_APICBASE:
2078                 return kvm_set_apic_base(vcpu, msr_info);
2079         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2080                 return kvm_x2apic_msr_write(vcpu, msr, data);
2081         case MSR_IA32_TSCDEADLINE:
2082                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2083                 break;
2084         case MSR_IA32_TSC_ADJUST:
2085                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2086                         if (!msr_info->host_initiated) {
2087                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2088                                 adjust_tsc_offset_guest(vcpu, adj);
2089                         }
2090                         vcpu->arch.ia32_tsc_adjust_msr = data;
2091                 }
2092                 break;
2093         case MSR_IA32_MISC_ENABLE:
2094                 vcpu->arch.ia32_misc_enable_msr = data;
2095                 break;
2096         case MSR_IA32_SMBASE:
2097                 if (!msr_info->host_initiated)
2098                         return 1;
2099                 vcpu->arch.smbase = data;
2100                 break;
2101         case MSR_KVM_WALL_CLOCK_NEW:
2102         case MSR_KVM_WALL_CLOCK:
2103                 vcpu->kvm->arch.wall_clock = data;
2104                 kvm_write_wall_clock(vcpu->kvm, data);
2105                 break;
2106         case MSR_KVM_SYSTEM_TIME_NEW:
2107         case MSR_KVM_SYSTEM_TIME: {
2108                 u64 gpa_offset;
2109                 struct kvm_arch *ka = &vcpu->kvm->arch;
2110
2111                 kvmclock_reset(vcpu);
2112
2113                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2114                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2115
2116                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2117                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2118                                         &vcpu->requests);
2119
2120                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2121                 }
2122
2123                 vcpu->arch.time = data;
2124                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2125
2126                 /* we verify if the enable bit is set... */
2127                 if (!(data & 1))
2128                         break;
2129
2130                 gpa_offset = data & ~(PAGE_MASK | 1);
2131
2132                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2133                      &vcpu->arch.pv_time, data & ~1ULL,
2134                      sizeof(struct pvclock_vcpu_time_info)))
2135                         vcpu->arch.pv_time_enabled = false;
2136                 else
2137                         vcpu->arch.pv_time_enabled = true;
2138
2139                 break;
2140         }
2141         case MSR_KVM_ASYNC_PF_EN:
2142                 if (kvm_pv_enable_async_pf(vcpu, data))
2143                         return 1;
2144                 break;
2145         case MSR_KVM_STEAL_TIME:
2146
2147                 if (unlikely(!sched_info_on()))
2148                         return 1;
2149
2150                 if (data & KVM_STEAL_RESERVED_MASK)
2151                         return 1;
2152
2153                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2154                                                 data & KVM_STEAL_VALID_BITS,
2155                                                 sizeof(struct kvm_steal_time)))
2156                         return 1;
2157
2158                 vcpu->arch.st.msr_val = data;
2159
2160                 if (!(data & KVM_MSR_ENABLED))
2161                         break;
2162
2163                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2164
2165                 break;
2166         case MSR_KVM_PV_EOI_EN:
2167                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2168                         return 1;
2169                 break;
2170
2171         case MSR_IA32_MCG_CTL:
2172         case MSR_IA32_MCG_STATUS:
2173         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2174                 return set_msr_mce(vcpu, msr, data);
2175
2176         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2177         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2178                 pr = true; /* fall through */
2179         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2180         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2181                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2182                         return kvm_pmu_set_msr(vcpu, msr_info);
2183
2184                 if (pr || data != 0)
2185                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2186                                     "0x%x data 0x%llx\n", msr, data);
2187                 break;
2188         case MSR_K7_CLK_CTL:
2189                 /*
2190                  * Ignore all writes to this no longer documented MSR.
2191                  * Writes are only relevant for old K7 processors,
2192                  * all pre-dating SVM, but a recommended workaround from
2193                  * AMD for these chips. It is possible to specify the
2194                  * affected processor models on the command line, hence
2195                  * the need to ignore the workaround.
2196                  */
2197                 break;
2198         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2199         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2200         case HV_X64_MSR_CRASH_CTL:
2201                 return kvm_hv_set_msr_common(vcpu, msr, data,
2202                                              msr_info->host_initiated);
2203         case MSR_IA32_BBL_CR_CTL3:
2204                 /* Drop writes to this legacy MSR -- see rdmsr
2205                  * counterpart for further detail.
2206                  */
2207                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2208                 break;
2209         case MSR_AMD64_OSVW_ID_LENGTH:
2210                 if (!guest_cpuid_has_osvw(vcpu))
2211                         return 1;
2212                 vcpu->arch.osvw.length = data;
2213                 break;
2214         case MSR_AMD64_OSVW_STATUS:
2215                 if (!guest_cpuid_has_osvw(vcpu))
2216                         return 1;
2217                 vcpu->arch.osvw.status = data;
2218                 break;
2219         default:
2220                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2221                         return xen_hvm_config(vcpu, data);
2222                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2223                         return kvm_pmu_set_msr(vcpu, msr_info);
2224                 if (!ignore_msrs) {
2225                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2226                                     msr, data);
2227                         return 1;
2228                 } else {
2229                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2230                                     msr, data);
2231                         break;
2232                 }
2233         }
2234         return 0;
2235 }
2236 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2237
2238
2239 /*
2240  * Reads an msr value (of 'msr_index') into 'pdata'.
2241  * Returns 0 on success, non-0 otherwise.
2242  * Assumes vcpu_load() was already called.
2243  */
2244 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2245 {
2246         return kvm_x86_ops->get_msr(vcpu, msr);
2247 }
2248 EXPORT_SYMBOL_GPL(kvm_get_msr);
2249
2250 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2251 {
2252         u64 data;
2253         u64 mcg_cap = vcpu->arch.mcg_cap;
2254         unsigned bank_num = mcg_cap & 0xff;
2255
2256         switch (msr) {
2257         case MSR_IA32_P5_MC_ADDR:
2258         case MSR_IA32_P5_MC_TYPE:
2259                 data = 0;
2260                 break;
2261         case MSR_IA32_MCG_CAP:
2262                 data = vcpu->arch.mcg_cap;
2263                 break;
2264         case MSR_IA32_MCG_CTL:
2265                 if (!(mcg_cap & MCG_CTL_P))
2266                         return 1;
2267                 data = vcpu->arch.mcg_ctl;
2268                 break;
2269         case MSR_IA32_MCG_STATUS:
2270                 data = vcpu->arch.mcg_status;
2271                 break;
2272         default:
2273                 if (msr >= MSR_IA32_MC0_CTL &&
2274                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2275                         u32 offset = msr - MSR_IA32_MC0_CTL;
2276                         data = vcpu->arch.mce_banks[offset];
2277                         break;
2278                 }
2279                 return 1;
2280         }
2281         *pdata = data;
2282         return 0;
2283 }
2284
2285 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2286 {
2287         switch (msr_info->index) {
2288         case MSR_IA32_PLATFORM_ID:
2289         case MSR_IA32_EBL_CR_POWERON:
2290         case MSR_IA32_DEBUGCTLMSR:
2291         case MSR_IA32_LASTBRANCHFROMIP:
2292         case MSR_IA32_LASTBRANCHTOIP:
2293         case MSR_IA32_LASTINTFROMIP:
2294         case MSR_IA32_LASTINTTOIP:
2295         case MSR_K8_SYSCFG:
2296         case MSR_K8_TSEG_ADDR:
2297         case MSR_K8_TSEG_MASK:
2298         case MSR_K7_HWCR:
2299         case MSR_VM_HSAVE_PA:
2300         case MSR_K8_INT_PENDING_MSG:
2301         case MSR_AMD64_NB_CFG:
2302         case MSR_FAM10H_MMIO_CONF_BASE:
2303         case MSR_AMD64_BU_CFG2:
2304                 msr_info->data = 0;
2305                 break;
2306         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2307         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2308         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2309         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2310                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2311                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2312                 msr_info->data = 0;
2313                 break;
2314         case MSR_IA32_UCODE_REV:
2315                 msr_info->data = 0x100000000ULL;
2316                 break;
2317         case MSR_MTRRcap:
2318         case 0x200 ... 0x2ff:
2319                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2320         case 0xcd: /* fsb frequency */
2321                 msr_info->data = 3;
2322                 break;
2323                 /*
2324                  * MSR_EBC_FREQUENCY_ID
2325                  * Conservative value valid for even the basic CPU models.
2326                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2327                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2328                  * and 266MHz for model 3, or 4. Set Core Clock
2329                  * Frequency to System Bus Frequency Ratio to 1 (bits
2330                  * 31:24) even though these are only valid for CPU
2331                  * models > 2, however guests may end up dividing or
2332                  * multiplying by zero otherwise.
2333                  */
2334         case MSR_EBC_FREQUENCY_ID:
2335                 msr_info->data = 1 << 24;
2336                 break;
2337         case MSR_IA32_APICBASE:
2338                 msr_info->data = kvm_get_apic_base(vcpu);
2339                 break;
2340         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2341                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2342                 break;
2343         case MSR_IA32_TSCDEADLINE:
2344                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2345                 break;
2346         case MSR_IA32_TSC_ADJUST:
2347                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2348                 break;
2349         case MSR_IA32_MISC_ENABLE:
2350                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2351                 break;
2352         case MSR_IA32_SMBASE:
2353                 if (!msr_info->host_initiated)
2354                         return 1;
2355                 msr_info->data = vcpu->arch.smbase;
2356                 break;
2357         case MSR_IA32_PERF_STATUS:
2358                 /* TSC increment by tick */
2359                 msr_info->data = 1000ULL;
2360                 /* CPU multiplier */
2361                 msr_info->data |= (((uint64_t)4ULL) << 40);
2362                 break;
2363         case MSR_EFER:
2364                 msr_info->data = vcpu->arch.efer;
2365                 break;
2366         case MSR_KVM_WALL_CLOCK:
2367         case MSR_KVM_WALL_CLOCK_NEW:
2368                 msr_info->data = vcpu->kvm->arch.wall_clock;
2369                 break;
2370         case MSR_KVM_SYSTEM_TIME:
2371         case MSR_KVM_SYSTEM_TIME_NEW:
2372                 msr_info->data = vcpu->arch.time;
2373                 break;
2374         case MSR_KVM_ASYNC_PF_EN:
2375                 msr_info->data = vcpu->arch.apf.msr_val;
2376                 break;
2377         case MSR_KVM_STEAL_TIME:
2378                 msr_info->data = vcpu->arch.st.msr_val;
2379                 break;
2380         case MSR_KVM_PV_EOI_EN:
2381                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2382                 break;
2383         case MSR_IA32_P5_MC_ADDR:
2384         case MSR_IA32_P5_MC_TYPE:
2385         case MSR_IA32_MCG_CAP:
2386         case MSR_IA32_MCG_CTL:
2387         case MSR_IA32_MCG_STATUS:
2388         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2389                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2390         case MSR_K7_CLK_CTL:
2391                 /*
2392                  * Provide expected ramp-up count for K7. All other
2393                  * are set to zero, indicating minimum divisors for
2394                  * every field.
2395                  *
2396                  * This prevents guest kernels on AMD host with CPU
2397                  * type 6, model 8 and higher from exploding due to
2398                  * the rdmsr failing.
2399                  */
2400                 msr_info->data = 0x20000000;
2401                 break;
2402         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2403         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2404         case HV_X64_MSR_CRASH_CTL:
2405                 return kvm_hv_get_msr_common(vcpu,
2406                                              msr_info->index, &msr_info->data);
2407                 break;
2408         case MSR_IA32_BBL_CR_CTL3:
2409                 /* This legacy MSR exists but isn't fully documented in current
2410                  * silicon.  It is however accessed by winxp in very narrow
2411                  * scenarios where it sets bit #19, itself documented as
2412                  * a "reserved" bit.  Best effort attempt to source coherent
2413                  * read data here should the balance of the register be
2414                  * interpreted by the guest:
2415                  *
2416                  * L2 cache control register 3: 64GB range, 256KB size,
2417                  * enabled, latency 0x1, configured
2418                  */
2419                 msr_info->data = 0xbe702111;
2420                 break;
2421         case MSR_AMD64_OSVW_ID_LENGTH:
2422                 if (!guest_cpuid_has_osvw(vcpu))
2423                         return 1;
2424                 msr_info->data = vcpu->arch.osvw.length;
2425                 break;
2426         case MSR_AMD64_OSVW_STATUS:
2427                 if (!guest_cpuid_has_osvw(vcpu))
2428                         return 1;
2429                 msr_info->data = vcpu->arch.osvw.status;
2430                 break;
2431         default:
2432                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2433                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2434                 if (!ignore_msrs) {
2435                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2436                         return 1;
2437                 } else {
2438                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2439                         msr_info->data = 0;
2440                 }
2441                 break;
2442         }
2443         return 0;
2444 }
2445 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2446
2447 /*
2448  * Read or write a bunch of msrs. All parameters are kernel addresses.
2449  *
2450  * @return number of msrs set successfully.
2451  */
2452 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2453                     struct kvm_msr_entry *entries,
2454                     int (*do_msr)(struct kvm_vcpu *vcpu,
2455                                   unsigned index, u64 *data))
2456 {
2457         int i, idx;
2458
2459         idx = srcu_read_lock(&vcpu->kvm->srcu);
2460         for (i = 0; i < msrs->nmsrs; ++i)
2461                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2462                         break;
2463         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2464
2465         return i;
2466 }
2467
2468 /*
2469  * Read or write a bunch of msrs. Parameters are user addresses.
2470  *
2471  * @return number of msrs set successfully.
2472  */
2473 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2474                   int (*do_msr)(struct kvm_vcpu *vcpu,
2475                                 unsigned index, u64 *data),
2476                   int writeback)
2477 {
2478         struct kvm_msrs msrs;
2479         struct kvm_msr_entry *entries;
2480         int r, n;
2481         unsigned size;
2482
2483         r = -EFAULT;
2484         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2485                 goto out;
2486
2487         r = -E2BIG;
2488         if (msrs.nmsrs >= MAX_IO_MSRS)
2489                 goto out;
2490
2491         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2492         entries = memdup_user(user_msrs->entries, size);
2493         if (IS_ERR(entries)) {
2494                 r = PTR_ERR(entries);
2495                 goto out;
2496         }
2497
2498         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2499         if (r < 0)
2500                 goto out_free;
2501
2502         r = -EFAULT;
2503         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2504                 goto out_free;
2505
2506         r = n;
2507
2508 out_free:
2509         kfree(entries);
2510 out:
2511         return r;
2512 }
2513
2514 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2515 {
2516         int r;
2517
2518         switch (ext) {
2519         case KVM_CAP_IRQCHIP:
2520         case KVM_CAP_HLT:
2521         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2522         case KVM_CAP_SET_TSS_ADDR:
2523         case KVM_CAP_EXT_CPUID:
2524         case KVM_CAP_EXT_EMUL_CPUID:
2525         case KVM_CAP_CLOCKSOURCE:
2526         case KVM_CAP_PIT:
2527         case KVM_CAP_NOP_IO_DELAY:
2528         case KVM_CAP_MP_STATE:
2529         case KVM_CAP_SYNC_MMU:
2530         case KVM_CAP_USER_NMI:
2531         case KVM_CAP_REINJECT_CONTROL:
2532         case KVM_CAP_IRQ_INJECT_STATUS:
2533         case KVM_CAP_IOEVENTFD:
2534         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2535         case KVM_CAP_PIT2:
2536         case KVM_CAP_PIT_STATE2:
2537         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2538         case KVM_CAP_XEN_HVM:
2539         case KVM_CAP_ADJUST_CLOCK:
2540         case KVM_CAP_VCPU_EVENTS:
2541         case KVM_CAP_HYPERV:
2542         case KVM_CAP_HYPERV_VAPIC:
2543         case KVM_CAP_HYPERV_SPIN:
2544         case KVM_CAP_PCI_SEGMENT:
2545         case KVM_CAP_DEBUGREGS:
2546         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2547         case KVM_CAP_XSAVE:
2548         case KVM_CAP_ASYNC_PF:
2549         case KVM_CAP_GET_TSC_KHZ:
2550         case KVM_CAP_KVMCLOCK_CTRL:
2551         case KVM_CAP_READONLY_MEM:
2552         case KVM_CAP_HYPERV_TIME:
2553         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2554         case KVM_CAP_TSC_DEADLINE_TIMER:
2555         case KVM_CAP_ENABLE_CAP_VM:
2556         case KVM_CAP_DISABLE_QUIRKS:
2557         case KVM_CAP_SET_BOOT_CPU_ID:
2558         case KVM_CAP_SPLIT_IRQCHIP:
2559 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2560         case KVM_CAP_ASSIGN_DEV_IRQ:
2561         case KVM_CAP_PCI_2_3:
2562 #endif
2563                 r = 1;
2564                 break;
2565         case KVM_CAP_X86_SMM:
2566                 /* SMBASE is usually relocated above 1M on modern chipsets,
2567                  * and SMM handlers might indeed rely on 4G segment limits,
2568                  * so do not report SMM to be available if real mode is
2569                  * emulated via vm86 mode.  Still, do not go to great lengths
2570                  * to avoid userspace's usage of the feature, because it is a
2571                  * fringe case that is not enabled except via specific settings
2572                  * of the module parameters.
2573                  */
2574                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2575                 break;
2576         case KVM_CAP_COALESCED_MMIO:
2577                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2578                 break;
2579         case KVM_CAP_VAPIC:
2580                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2581                 break;
2582         case KVM_CAP_NR_VCPUS:
2583                 r = KVM_SOFT_MAX_VCPUS;
2584                 break;
2585         case KVM_CAP_MAX_VCPUS:
2586                 r = KVM_MAX_VCPUS;
2587                 break;
2588         case KVM_CAP_NR_MEMSLOTS:
2589                 r = KVM_USER_MEM_SLOTS;
2590                 break;
2591         case KVM_CAP_PV_MMU:    /* obsolete */
2592                 r = 0;
2593                 break;
2594 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2595         case KVM_CAP_IOMMU:
2596                 r = iommu_present(&pci_bus_type);
2597                 break;
2598 #endif
2599         case KVM_CAP_MCE:
2600                 r = KVM_MAX_MCE_BANKS;
2601                 break;
2602         case KVM_CAP_XCRS:
2603                 r = cpu_has_xsave;
2604                 break;
2605         case KVM_CAP_TSC_CONTROL:
2606                 r = kvm_has_tsc_control;
2607                 break;
2608         default:
2609                 r = 0;
2610                 break;
2611         }
2612         return r;
2613
2614 }
2615
2616 long kvm_arch_dev_ioctl(struct file *filp,
2617                         unsigned int ioctl, unsigned long arg)
2618 {
2619         void __user *argp = (void __user *)arg;
2620         long r;
2621
2622         switch (ioctl) {
2623         case KVM_GET_MSR_INDEX_LIST: {
2624                 struct kvm_msr_list __user *user_msr_list = argp;
2625                 struct kvm_msr_list msr_list;
2626                 unsigned n;
2627
2628                 r = -EFAULT;
2629                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2630                         goto out;
2631                 n = msr_list.nmsrs;
2632                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2633                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2634                         goto out;
2635                 r = -E2BIG;
2636                 if (n < msr_list.nmsrs)
2637                         goto out;
2638                 r = -EFAULT;
2639                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2640                                  num_msrs_to_save * sizeof(u32)))
2641                         goto out;
2642                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2643                                  &emulated_msrs,
2644                                  num_emulated_msrs * sizeof(u32)))
2645                         goto out;
2646                 r = 0;
2647                 break;
2648         }
2649         case KVM_GET_SUPPORTED_CPUID:
2650         case KVM_GET_EMULATED_CPUID: {
2651                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2652                 struct kvm_cpuid2 cpuid;
2653
2654                 r = -EFAULT;
2655                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2656                         goto out;
2657
2658                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2659                                             ioctl);
2660                 if (r)
2661                         goto out;
2662
2663                 r = -EFAULT;
2664                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2665                         goto out;
2666                 r = 0;
2667                 break;
2668         }
2669         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2670                 u64 mce_cap;
2671
2672                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2673                 r = -EFAULT;
2674                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2675                         goto out;
2676                 r = 0;
2677                 break;
2678         }
2679         default:
2680                 r = -EINVAL;
2681         }
2682 out:
2683         return r;
2684 }
2685
2686 static void wbinvd_ipi(void *garbage)
2687 {
2688         wbinvd();
2689 }
2690
2691 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2692 {
2693         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2694 }
2695
2696 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2697 {
2698         /* Address WBINVD may be executed by guest */
2699         if (need_emulate_wbinvd(vcpu)) {
2700                 if (kvm_x86_ops->has_wbinvd_exit())
2701                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2702                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2703                         smp_call_function_single(vcpu->cpu,
2704                                         wbinvd_ipi, NULL, 1);
2705         }
2706
2707         kvm_x86_ops->vcpu_load(vcpu, cpu);
2708
2709         /* Apply any externally detected TSC adjustments (due to suspend) */
2710         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2711                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2712                 vcpu->arch.tsc_offset_adjustment = 0;
2713                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2714         }
2715
2716         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2717                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2718                                 rdtsc() - vcpu->arch.last_host_tsc;
2719                 if (tsc_delta < 0)
2720                         mark_tsc_unstable("KVM discovered backwards TSC");
2721                 if (check_tsc_unstable()) {
2722                         u64 offset = kvm_compute_tsc_offset(vcpu,
2723                                                 vcpu->arch.last_guest_tsc);
2724                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2725                         vcpu->arch.tsc_catchup = 1;
2726                 }
2727                 /*
2728                  * On a host with synchronized TSC, there is no need to update
2729                  * kvmclock on vcpu->cpu migration
2730                  */
2731                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2732                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2733                 if (vcpu->cpu != cpu)
2734                         kvm_migrate_timers(vcpu);
2735                 vcpu->cpu = cpu;
2736         }
2737
2738         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2739 }
2740
2741 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2742 {
2743         kvm_x86_ops->vcpu_put(vcpu);
2744         kvm_put_guest_fpu(vcpu);
2745         vcpu->arch.last_host_tsc = rdtsc();
2746 }
2747
2748 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2749                                     struct kvm_lapic_state *s)
2750 {
2751         kvm_x86_ops->sync_pir_to_irr(vcpu);
2752         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2753
2754         return 0;
2755 }
2756
2757 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2758                                     struct kvm_lapic_state *s)
2759 {
2760         kvm_apic_post_state_restore(vcpu, s);
2761         update_cr8_intercept(vcpu);
2762
2763         return 0;
2764 }
2765
2766 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2767 {
2768         return (!lapic_in_kernel(vcpu) ||
2769                 kvm_apic_accept_pic_intr(vcpu));
2770 }
2771
2772 /*
2773  * if userspace requested an interrupt window, check that the
2774  * interrupt window is open.
2775  *
2776  * No need to exit to userspace if we already have an interrupt queued.
2777  */
2778 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2779 {
2780         return kvm_arch_interrupt_allowed(vcpu) &&
2781                 !kvm_cpu_has_interrupt(vcpu) &&
2782                 !kvm_event_needs_reinjection(vcpu) &&
2783                 kvm_cpu_accept_dm_intr(vcpu);
2784 }
2785
2786 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2787                                     struct kvm_interrupt *irq)
2788 {
2789         if (irq->irq >= KVM_NR_INTERRUPTS)
2790                 return -EINVAL;
2791
2792         if (!irqchip_in_kernel(vcpu->kvm)) {
2793                 kvm_queue_interrupt(vcpu, irq->irq, false);
2794                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2795                 return 0;
2796         }
2797
2798         /*
2799          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2800          * fail for in-kernel 8259.
2801          */
2802         if (pic_in_kernel(vcpu->kvm))
2803                 return -ENXIO;
2804
2805         if (vcpu->arch.pending_external_vector != -1)
2806                 return -EEXIST;
2807
2808         vcpu->arch.pending_external_vector = irq->irq;
2809         kvm_make_request(KVM_REQ_EVENT, vcpu);
2810         return 0;
2811 }
2812
2813 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2814 {
2815         kvm_inject_nmi(vcpu);
2816
2817         return 0;
2818 }
2819
2820 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2821 {
2822         kvm_make_request(KVM_REQ_SMI, vcpu);
2823
2824         return 0;
2825 }
2826
2827 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2828                                            struct kvm_tpr_access_ctl *tac)
2829 {
2830         if (tac->flags)
2831                 return -EINVAL;
2832         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2833         return 0;
2834 }
2835
2836 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2837                                         u64 mcg_cap)
2838 {
2839         int r;
2840         unsigned bank_num = mcg_cap & 0xff, bank;
2841
2842         r = -EINVAL;
2843         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2844                 goto out;
2845         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2846                 goto out;
2847         r = 0;
2848         vcpu->arch.mcg_cap = mcg_cap;
2849         /* Init IA32_MCG_CTL to all 1s */
2850         if (mcg_cap & MCG_CTL_P)
2851                 vcpu->arch.mcg_ctl = ~(u64)0;
2852         /* Init IA32_MCi_CTL to all 1s */
2853         for (bank = 0; bank < bank_num; bank++)
2854                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2855 out:
2856         return r;
2857 }
2858
2859 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2860                                       struct kvm_x86_mce *mce)
2861 {
2862         u64 mcg_cap = vcpu->arch.mcg_cap;
2863         unsigned bank_num = mcg_cap & 0xff;
2864         u64 *banks = vcpu->arch.mce_banks;
2865
2866         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2867                 return -EINVAL;
2868         /*
2869          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2870          * reporting is disabled
2871          */
2872         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2873             vcpu->arch.mcg_ctl != ~(u64)0)
2874                 return 0;
2875         banks += 4 * mce->bank;
2876         /*
2877          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2878          * reporting is disabled for the bank
2879          */
2880         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2881                 return 0;
2882         if (mce->status & MCI_STATUS_UC) {
2883                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2884                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2885                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2886                         return 0;
2887                 }
2888                 if (banks[1] & MCI_STATUS_VAL)
2889                         mce->status |= MCI_STATUS_OVER;
2890                 banks[2] = mce->addr;
2891                 banks[3] = mce->misc;
2892                 vcpu->arch.mcg_status = mce->mcg_status;
2893                 banks[1] = mce->status;
2894                 kvm_queue_exception(vcpu, MC_VECTOR);
2895         } else if (!(banks[1] & MCI_STATUS_VAL)
2896                    || !(banks[1] & MCI_STATUS_UC)) {
2897                 if (banks[1] & MCI_STATUS_VAL)
2898                         mce->status |= MCI_STATUS_OVER;
2899                 banks[2] = mce->addr;
2900                 banks[3] = mce->misc;
2901                 banks[1] = mce->status;
2902         } else
2903                 banks[1] |= MCI_STATUS_OVER;
2904         return 0;
2905 }
2906
2907 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2908                                                struct kvm_vcpu_events *events)
2909 {
2910         process_nmi(vcpu);
2911         events->exception.injected =
2912                 vcpu->arch.exception.pending &&
2913                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2914         events->exception.nr = vcpu->arch.exception.nr;
2915         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2916         events->exception.pad = 0;
2917         events->exception.error_code = vcpu->arch.exception.error_code;
2918
2919         events->interrupt.injected =
2920                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2921         events->interrupt.nr = vcpu->arch.interrupt.nr;
2922         events->interrupt.soft = 0;
2923         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2924
2925         events->nmi.injected = vcpu->arch.nmi_injected;
2926         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2927         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2928         events->nmi.pad = 0;
2929
2930         events->sipi_vector = 0; /* never valid when reporting to user space */
2931
2932         events->smi.smm = is_smm(vcpu);
2933         events->smi.pending = vcpu->arch.smi_pending;
2934         events->smi.smm_inside_nmi =
2935                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2936         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2937
2938         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2939                          | KVM_VCPUEVENT_VALID_SHADOW
2940                          | KVM_VCPUEVENT_VALID_SMM);
2941         memset(&events->reserved, 0, sizeof(events->reserved));
2942 }
2943
2944 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2945                                               struct kvm_vcpu_events *events)
2946 {
2947         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2948                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2949                               | KVM_VCPUEVENT_VALID_SHADOW
2950                               | KVM_VCPUEVENT_VALID_SMM))
2951                 return -EINVAL;
2952
2953         process_nmi(vcpu);
2954         vcpu->arch.exception.pending = events->exception.injected;
2955         vcpu->arch.exception.nr = events->exception.nr;
2956         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2957         vcpu->arch.exception.error_code = events->exception.error_code;
2958
2959         vcpu->arch.interrupt.pending = events->interrupt.injected;
2960         vcpu->arch.interrupt.nr = events->interrupt.nr;
2961         vcpu->arch.interrupt.soft = events->interrupt.soft;
2962         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2963                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2964                                                   events->interrupt.shadow);
2965
2966         vcpu->arch.nmi_injected = events->nmi.injected;
2967         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2968                 vcpu->arch.nmi_pending = events->nmi.pending;
2969         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2970
2971         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2972             kvm_vcpu_has_lapic(vcpu))
2973                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2974
2975         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2976                 if (events->smi.smm)
2977                         vcpu->arch.hflags |= HF_SMM_MASK;
2978                 else
2979                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2980                 vcpu->arch.smi_pending = events->smi.pending;
2981                 if (events->smi.smm_inside_nmi)
2982                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2983                 else
2984                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2985                 if (kvm_vcpu_has_lapic(vcpu)) {
2986                         if (events->smi.latched_init)
2987                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2988                         else
2989                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2990                 }
2991         }
2992
2993         kvm_make_request(KVM_REQ_EVENT, vcpu);
2994
2995         return 0;
2996 }
2997
2998 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2999                                              struct kvm_debugregs *dbgregs)
3000 {
3001         unsigned long val;
3002
3003         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3004         kvm_get_dr(vcpu, 6, &val);
3005         dbgregs->dr6 = val;
3006         dbgregs->dr7 = vcpu->arch.dr7;
3007         dbgregs->flags = 0;
3008         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3009 }
3010
3011 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3012                                             struct kvm_debugregs *dbgregs)
3013 {
3014         if (dbgregs->flags)
3015                 return -EINVAL;
3016
3017         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3018         kvm_update_dr0123(vcpu);
3019         vcpu->arch.dr6 = dbgregs->dr6;
3020         kvm_update_dr6(vcpu);
3021         vcpu->arch.dr7 = dbgregs->dr7;
3022         kvm_update_dr7(vcpu);
3023
3024         return 0;
3025 }
3026
3027 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3028
3029 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3030 {
3031         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3032         u64 xstate_bv = xsave->header.xfeatures;
3033         u64 valid;
3034
3035         /*
3036          * Copy legacy XSAVE area, to avoid complications with CPUID
3037          * leaves 0 and 1 in the loop below.
3038          */
3039         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3040
3041         /* Set XSTATE_BV */
3042         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3043
3044         /*
3045          * Copy each region from the possibly compacted offset to the
3046          * non-compacted offset.
3047          */
3048         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3049         while (valid) {
3050                 u64 feature = valid & -valid;
3051                 int index = fls64(feature) - 1;
3052                 void *src = get_xsave_addr(xsave, feature);
3053
3054                 if (src) {
3055                         u32 size, offset, ecx, edx;
3056                         cpuid_count(XSTATE_CPUID, index,
3057                                     &size, &offset, &ecx, &edx);
3058                         memcpy(dest + offset, src, size);
3059                 }
3060
3061                 valid -= feature;
3062         }
3063 }
3064
3065 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3066 {
3067         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3068         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3069         u64 valid;
3070
3071         /*
3072          * Copy legacy XSAVE area, to avoid complications with CPUID
3073          * leaves 0 and 1 in the loop below.
3074          */
3075         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3076
3077         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3078         xsave->header.xfeatures = xstate_bv;
3079         if (cpu_has_xsaves)
3080                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3081
3082         /*
3083          * Copy each region from the non-compacted offset to the
3084          * possibly compacted offset.
3085          */
3086         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3087         while (valid) {
3088                 u64 feature = valid & -valid;
3089                 int index = fls64(feature) - 1;
3090                 void *dest = get_xsave_addr(xsave, feature);
3091
3092                 if (dest) {
3093                         u32 size, offset, ecx, edx;
3094                         cpuid_count(XSTATE_CPUID, index,
3095                                     &size, &offset, &ecx, &edx);
3096                         memcpy(dest, src + offset, size);
3097                 }
3098
3099                 valid -= feature;
3100         }
3101 }
3102
3103 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3104                                          struct kvm_xsave *guest_xsave)
3105 {
3106         if (cpu_has_xsave) {
3107                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3108                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3109         } else {
3110                 memcpy(guest_xsave->region,
3111                         &vcpu->arch.guest_fpu.state.fxsave,
3112                         sizeof(struct fxregs_state));
3113                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3114                         XFEATURE_MASK_FPSSE;
3115         }
3116 }
3117
3118 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3119                                         struct kvm_xsave *guest_xsave)
3120 {
3121         u64 xstate_bv =
3122                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3123
3124         if (cpu_has_xsave) {
3125                 /*
3126                  * Here we allow setting states that are not present in
3127                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3128                  * with old userspace.
3129                  */
3130                 if (xstate_bv & ~kvm_supported_xcr0())
3131                         return -EINVAL;
3132                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3133         } else {
3134                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3135                         return -EINVAL;
3136                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3137                         guest_xsave->region, sizeof(struct fxregs_state));
3138         }
3139         return 0;
3140 }
3141
3142 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3143                                         struct kvm_xcrs *guest_xcrs)
3144 {
3145         if (!cpu_has_xsave) {
3146                 guest_xcrs->nr_xcrs = 0;
3147                 return;
3148         }
3149
3150         guest_xcrs->nr_xcrs = 1;
3151         guest_xcrs->flags = 0;
3152         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3153         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3154 }
3155
3156 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3157                                        struct kvm_xcrs *guest_xcrs)
3158 {
3159         int i, r = 0;
3160
3161         if (!cpu_has_xsave)
3162                 return -EINVAL;
3163
3164         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3165                 return -EINVAL;
3166
3167         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3168                 /* Only support XCR0 currently */
3169                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3170                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3171                                 guest_xcrs->xcrs[i].value);
3172                         break;
3173                 }
3174         if (r)
3175                 r = -EINVAL;
3176         return r;
3177 }
3178
3179 /*
3180  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3181  * stopped by the hypervisor.  This function will be called from the host only.
3182  * EINVAL is returned when the host attempts to set the flag for a guest that
3183  * does not support pv clocks.
3184  */
3185 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3186 {
3187         if (!vcpu->arch.pv_time_enabled)
3188                 return -EINVAL;
3189         vcpu->arch.pvclock_set_guest_stopped_request = true;
3190         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3191         return 0;
3192 }
3193
3194 long kvm_arch_vcpu_ioctl(struct file *filp,
3195                          unsigned int ioctl, unsigned long arg)
3196 {
3197         struct kvm_vcpu *vcpu = filp->private_data;
3198         void __user *argp = (void __user *)arg;
3199         int r;
3200         union {
3201                 struct kvm_lapic_state *lapic;
3202                 struct kvm_xsave *xsave;
3203                 struct kvm_xcrs *xcrs;
3204                 void *buffer;
3205         } u;
3206
3207         u.buffer = NULL;
3208         switch (ioctl) {
3209         case KVM_GET_LAPIC: {
3210                 r = -EINVAL;
3211                 if (!vcpu->arch.apic)
3212                         goto out;
3213                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3214
3215                 r = -ENOMEM;
3216                 if (!u.lapic)
3217                         goto out;
3218                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3219                 if (r)
3220                         goto out;
3221                 r = -EFAULT;
3222                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3223                         goto out;
3224                 r = 0;
3225                 break;
3226         }
3227         case KVM_SET_LAPIC: {
3228                 r = -EINVAL;
3229                 if (!vcpu->arch.apic)
3230                         goto out;
3231                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3232                 if (IS_ERR(u.lapic))
3233                         return PTR_ERR(u.lapic);
3234
3235                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3236                 break;
3237         }
3238         case KVM_INTERRUPT: {
3239                 struct kvm_interrupt irq;
3240
3241                 r = -EFAULT;
3242                 if (copy_from_user(&irq, argp, sizeof irq))
3243                         goto out;
3244                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3245                 break;
3246         }
3247         case KVM_NMI: {
3248                 r = kvm_vcpu_ioctl_nmi(vcpu);
3249                 break;
3250         }
3251         case KVM_SMI: {
3252                 r = kvm_vcpu_ioctl_smi(vcpu);
3253                 break;
3254         }
3255         case KVM_SET_CPUID: {
3256                 struct kvm_cpuid __user *cpuid_arg = argp;
3257                 struct kvm_cpuid cpuid;
3258
3259                 r = -EFAULT;
3260                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3261                         goto out;
3262                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3263                 break;
3264         }
3265         case KVM_SET_CPUID2: {
3266                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3267                 struct kvm_cpuid2 cpuid;
3268
3269                 r = -EFAULT;
3270                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3271                         goto out;
3272                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3273                                               cpuid_arg->entries);
3274                 break;
3275         }
3276         case KVM_GET_CPUID2: {
3277                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3278                 struct kvm_cpuid2 cpuid;
3279
3280                 r = -EFAULT;
3281                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3282                         goto out;
3283                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3284                                               cpuid_arg->entries);
3285                 if (r)
3286                         goto out;
3287                 r = -EFAULT;
3288                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3289                         goto out;
3290                 r = 0;
3291                 break;
3292         }
3293         case KVM_GET_MSRS:
3294                 r = msr_io(vcpu, argp, do_get_msr, 1);
3295                 break;
3296         case KVM_SET_MSRS:
3297                 r = msr_io(vcpu, argp, do_set_msr, 0);
3298                 break;
3299         case KVM_TPR_ACCESS_REPORTING: {
3300                 struct kvm_tpr_access_ctl tac;
3301
3302                 r = -EFAULT;
3303                 if (copy_from_user(&tac, argp, sizeof tac))
3304                         goto out;
3305                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3306                 if (r)
3307                         goto out;
3308                 r = -EFAULT;
3309                 if (copy_to_user(argp, &tac, sizeof tac))
3310                         goto out;
3311                 r = 0;
3312                 break;
3313         };
3314         case KVM_SET_VAPIC_ADDR: {
3315                 struct kvm_vapic_addr va;
3316
3317                 r = -EINVAL;
3318                 if (!lapic_in_kernel(vcpu))
3319                         goto out;
3320                 r = -EFAULT;
3321                 if (copy_from_user(&va, argp, sizeof va))
3322                         goto out;
3323                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3324                 break;
3325         }
3326         case KVM_X86_SETUP_MCE: {
3327                 u64 mcg_cap;
3328
3329                 r = -EFAULT;
3330                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3331                         goto out;
3332                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3333                 break;
3334         }
3335         case KVM_X86_SET_MCE: {
3336                 struct kvm_x86_mce mce;
3337
3338                 r = -EFAULT;
3339                 if (copy_from_user(&mce, argp, sizeof mce))
3340                         goto out;
3341                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3342                 break;
3343         }
3344         case KVM_GET_VCPU_EVENTS: {
3345                 struct kvm_vcpu_events events;
3346
3347                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3348
3349                 r = -EFAULT;
3350                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3351                         break;
3352                 r = 0;
3353                 break;
3354         }
3355         case KVM_SET_VCPU_EVENTS: {
3356                 struct kvm_vcpu_events events;
3357
3358                 r = -EFAULT;
3359                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3360                         break;
3361
3362                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3363                 break;
3364         }
3365         case KVM_GET_DEBUGREGS: {
3366                 struct kvm_debugregs dbgregs;
3367
3368                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3369
3370                 r = -EFAULT;
3371                 if (copy_to_user(argp, &dbgregs,
3372                                  sizeof(struct kvm_debugregs)))
3373                         break;
3374                 r = 0;
3375                 break;
3376         }
3377         case KVM_SET_DEBUGREGS: {
3378                 struct kvm_debugregs dbgregs;
3379
3380                 r = -EFAULT;
3381                 if (copy_from_user(&dbgregs, argp,
3382                                    sizeof(struct kvm_debugregs)))
3383                         break;
3384
3385                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3386                 break;
3387         }
3388         case KVM_GET_XSAVE: {
3389                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3390                 r = -ENOMEM;
3391                 if (!u.xsave)
3392                         break;
3393
3394                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3395
3396                 r = -EFAULT;
3397                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3398                         break;
3399                 r = 0;
3400                 break;
3401         }
3402         case KVM_SET_XSAVE: {
3403                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3404                 if (IS_ERR(u.xsave))
3405                         return PTR_ERR(u.xsave);
3406
3407                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3408                 break;
3409         }
3410         case KVM_GET_XCRS: {
3411                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3412                 r = -ENOMEM;
3413                 if (!u.xcrs)
3414                         break;
3415
3416                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3417
3418                 r = -EFAULT;
3419                 if (copy_to_user(argp, u.xcrs,
3420                                  sizeof(struct kvm_xcrs)))
3421                         break;
3422                 r = 0;
3423                 break;
3424         }
3425         case KVM_SET_XCRS: {
3426                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3427                 if (IS_ERR(u.xcrs))
3428                         return PTR_ERR(u.xcrs);
3429
3430                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3431                 break;
3432         }
3433         case KVM_SET_TSC_KHZ: {
3434                 u32 user_tsc_khz;
3435
3436                 r = -EINVAL;
3437                 user_tsc_khz = (u32)arg;
3438
3439                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3440                         goto out;
3441
3442                 if (user_tsc_khz == 0)
3443                         user_tsc_khz = tsc_khz;
3444
3445                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3446                         r = 0;
3447
3448                 goto out;
3449         }
3450         case KVM_GET_TSC_KHZ: {
3451                 r = vcpu->arch.virtual_tsc_khz;
3452                 goto out;
3453         }
3454         case KVM_KVMCLOCK_CTRL: {
3455                 r = kvm_set_guest_paused(vcpu);
3456                 goto out;
3457         }
3458         default:
3459                 r = -EINVAL;
3460         }
3461 out:
3462         kfree(u.buffer);
3463         return r;
3464 }
3465
3466 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3467 {
3468         return VM_FAULT_SIGBUS;
3469 }
3470
3471 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3472 {
3473         int ret;
3474
3475         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3476                 return -EINVAL;
3477         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3478         return ret;
3479 }
3480
3481 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3482                                               u64 ident_addr)
3483 {
3484         kvm->arch.ept_identity_map_addr = ident_addr;
3485         return 0;
3486 }
3487
3488 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3489                                           u32 kvm_nr_mmu_pages)
3490 {
3491         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3492                 return -EINVAL;
3493
3494         mutex_lock(&kvm->slots_lock);
3495
3496         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3497         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3498
3499         mutex_unlock(&kvm->slots_lock);
3500         return 0;
3501 }
3502
3503 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3504 {
3505         return kvm->arch.n_max_mmu_pages;
3506 }
3507
3508 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3509 {
3510         int r;
3511
3512         r = 0;
3513         switch (chip->chip_id) {
3514         case KVM_IRQCHIP_PIC_MASTER:
3515                 memcpy(&chip->chip.pic,
3516                         &pic_irqchip(kvm)->pics[0],
3517                         sizeof(struct kvm_pic_state));
3518                 break;
3519         case KVM_IRQCHIP_PIC_SLAVE:
3520                 memcpy(&chip->chip.pic,
3521                         &pic_irqchip(kvm)->pics[1],
3522                         sizeof(struct kvm_pic_state));
3523                 break;
3524         case KVM_IRQCHIP_IOAPIC:
3525                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3526                 break;
3527         default:
3528                 r = -EINVAL;
3529                 break;
3530         }
3531         return r;
3532 }
3533
3534 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3535 {
3536         int r;
3537
3538         r = 0;
3539         switch (chip->chip_id) {
3540         case KVM_IRQCHIP_PIC_MASTER:
3541                 spin_lock(&pic_irqchip(kvm)->lock);
3542                 memcpy(&pic_irqchip(kvm)->pics[0],
3543                         &chip->chip.pic,
3544                         sizeof(struct kvm_pic_state));
3545                 spin_unlock(&pic_irqchip(kvm)->lock);
3546                 break;
3547         case KVM_IRQCHIP_PIC_SLAVE:
3548                 spin_lock(&pic_irqchip(kvm)->lock);
3549                 memcpy(&pic_irqchip(kvm)->pics[1],
3550                         &chip->chip.pic,
3551                         sizeof(struct kvm_pic_state));
3552                 spin_unlock(&pic_irqchip(kvm)->lock);
3553                 break;
3554         case KVM_IRQCHIP_IOAPIC:
3555                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3556                 break;
3557         default:
3558                 r = -EINVAL;
3559                 break;
3560         }
3561         kvm_pic_update_irq(pic_irqchip(kvm));
3562         return r;
3563 }
3564
3565 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3566 {
3567         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3568         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3569         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3570         return 0;
3571 }
3572
3573 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3574 {
3575         int i;
3576         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3577         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3578         for (i = 0; i < 3; i++)
3579                 kvm_pit_load_count(kvm, i, ps->channels[i].count, 0);
3580         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3581         return 0;
3582 }
3583
3584 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3585 {
3586         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3587         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3588                 sizeof(ps->channels));
3589         ps->flags = kvm->arch.vpit->pit_state.flags;
3590         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3591         memset(&ps->reserved, 0, sizeof(ps->reserved));
3592         return 0;
3593 }
3594
3595 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3596 {
3597         int start = 0;
3598         int i;
3599         u32 prev_legacy, cur_legacy;
3600         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3601         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3602         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3603         if (!prev_legacy && cur_legacy)
3604                 start = 1;
3605         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3606                sizeof(kvm->arch.vpit->pit_state.channels));
3607         kvm->arch.vpit->pit_state.flags = ps->flags;
3608         for (i = 0; i < 3; i++)
3609                 kvm_pit_load_count(kvm, i, kvm->arch.vpit->pit_state.channels[i].count,
3610                                    start && i == 0);
3611         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3612         return 0;
3613 }
3614
3615 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3616                                  struct kvm_reinject_control *control)
3617 {
3618         if (!kvm->arch.vpit)
3619                 return -ENXIO;
3620         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3621         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3622         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3623         return 0;
3624 }
3625
3626 /**
3627  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3628  * @kvm: kvm instance
3629  * @log: slot id and address to which we copy the log
3630  *
3631  * Steps 1-4 below provide general overview of dirty page logging. See
3632  * kvm_get_dirty_log_protect() function description for additional details.
3633  *
3634  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3635  * always flush the TLB (step 4) even if previous step failed  and the dirty
3636  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3637  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3638  * writes will be marked dirty for next log read.
3639  *
3640  *   1. Take a snapshot of the bit and clear it if needed.
3641  *   2. Write protect the corresponding page.
3642  *   3. Copy the snapshot to the userspace.
3643  *   4. Flush TLB's if needed.
3644  */
3645 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3646 {
3647         bool is_dirty = false;
3648         int r;
3649
3650         mutex_lock(&kvm->slots_lock);
3651
3652         /*
3653          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3654          */
3655         if (kvm_x86_ops->flush_log_dirty)
3656                 kvm_x86_ops->flush_log_dirty(kvm);
3657
3658         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3659
3660         /*
3661          * All the TLBs can be flushed out of mmu lock, see the comments in
3662          * kvm_mmu_slot_remove_write_access().
3663          */
3664         lockdep_assert_held(&kvm->slots_lock);
3665         if (is_dirty)
3666                 kvm_flush_remote_tlbs(kvm);
3667
3668         mutex_unlock(&kvm->slots_lock);
3669         return r;
3670 }
3671
3672 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3673                         bool line_status)
3674 {
3675         if (!irqchip_in_kernel(kvm))
3676                 return -ENXIO;
3677
3678         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3679                                         irq_event->irq, irq_event->level,
3680                                         line_status);
3681         return 0;
3682 }
3683
3684 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3685                                    struct kvm_enable_cap *cap)
3686 {
3687         int r;
3688
3689         if (cap->flags)
3690                 return -EINVAL;
3691
3692         switch (cap->cap) {
3693         case KVM_CAP_DISABLE_QUIRKS:
3694                 kvm->arch.disabled_quirks = cap->args[0];
3695                 r = 0;
3696                 break;
3697         case KVM_CAP_SPLIT_IRQCHIP: {
3698                 mutex_lock(&kvm->lock);
3699                 r = -EINVAL;
3700                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3701                         goto split_irqchip_unlock;
3702                 r = -EEXIST;
3703                 if (irqchip_in_kernel(kvm))
3704                         goto split_irqchip_unlock;
3705                 if (atomic_read(&kvm->online_vcpus))
3706                         goto split_irqchip_unlock;
3707                 r = kvm_setup_empty_irq_routing(kvm);
3708                 if (r)
3709                         goto split_irqchip_unlock;
3710                 /* Pairs with irqchip_in_kernel. */
3711                 smp_wmb();
3712                 kvm->arch.irqchip_split = true;
3713                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3714                 r = 0;
3715 split_irqchip_unlock:
3716                 mutex_unlock(&kvm->lock);
3717                 break;
3718         }
3719         default:
3720                 r = -EINVAL;
3721                 break;
3722         }
3723         return r;
3724 }
3725
3726 long kvm_arch_vm_ioctl(struct file *filp,
3727                        unsigned int ioctl, unsigned long arg)
3728 {
3729         struct kvm *kvm = filp->private_data;
3730         void __user *argp = (void __user *)arg;
3731         int r = -ENOTTY;
3732         /*
3733          * This union makes it completely explicit to gcc-3.x
3734          * that these two variables' stack usage should be
3735          * combined, not added together.
3736          */
3737         union {
3738                 struct kvm_pit_state ps;
3739                 struct kvm_pit_state2 ps2;
3740                 struct kvm_pit_config pit_config;
3741         } u;
3742
3743         switch (ioctl) {
3744         case KVM_SET_TSS_ADDR:
3745                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3746                 break;
3747         case KVM_SET_IDENTITY_MAP_ADDR: {
3748                 u64 ident_addr;
3749
3750                 r = -EFAULT;
3751                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3752                         goto out;
3753                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3754                 break;
3755         }
3756         case KVM_SET_NR_MMU_PAGES:
3757                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3758                 break;
3759         case KVM_GET_NR_MMU_PAGES:
3760                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3761                 break;
3762         case KVM_CREATE_IRQCHIP: {
3763                 struct kvm_pic *vpic;
3764
3765                 mutex_lock(&kvm->lock);
3766                 r = -EEXIST;
3767                 if (kvm->arch.vpic)
3768                         goto create_irqchip_unlock;
3769                 r = -EINVAL;
3770                 if (atomic_read(&kvm->online_vcpus))
3771                         goto create_irqchip_unlock;
3772                 r = -ENOMEM;
3773                 vpic = kvm_create_pic(kvm);
3774                 if (vpic) {
3775                         r = kvm_ioapic_init(kvm);
3776                         if (r) {
3777                                 mutex_lock(&kvm->slots_lock);
3778                                 kvm_destroy_pic(vpic);
3779                                 mutex_unlock(&kvm->slots_lock);
3780                                 goto create_irqchip_unlock;
3781                         }
3782                 } else
3783                         goto create_irqchip_unlock;
3784                 r = kvm_setup_default_irq_routing(kvm);
3785                 if (r) {
3786                         mutex_lock(&kvm->slots_lock);
3787                         mutex_lock(&kvm->irq_lock);
3788                         kvm_ioapic_destroy(kvm);
3789                         kvm_destroy_pic(vpic);
3790                         mutex_unlock(&kvm->irq_lock);
3791                         mutex_unlock(&kvm->slots_lock);
3792                         goto create_irqchip_unlock;
3793                 }
3794                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3795                 smp_wmb();
3796                 kvm->arch.vpic = vpic;
3797         create_irqchip_unlock:
3798                 mutex_unlock(&kvm->lock);
3799                 break;
3800         }
3801         case KVM_CREATE_PIT:
3802                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3803                 goto create_pit;
3804         case KVM_CREATE_PIT2:
3805                 r = -EFAULT;
3806                 if (copy_from_user(&u.pit_config, argp,
3807                                    sizeof(struct kvm_pit_config)))
3808                         goto out;
3809         create_pit:
3810                 mutex_lock(&kvm->slots_lock);
3811                 r = -EEXIST;
3812                 if (kvm->arch.vpit)
3813                         goto create_pit_unlock;
3814                 r = -ENOMEM;
3815                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3816                 if (kvm->arch.vpit)
3817                         r = 0;
3818         create_pit_unlock:
3819                 mutex_unlock(&kvm->slots_lock);
3820                 break;
3821         case KVM_GET_IRQCHIP: {
3822                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3823                 struct kvm_irqchip *chip;
3824
3825                 chip = memdup_user(argp, sizeof(*chip));
3826                 if (IS_ERR(chip)) {
3827                         r = PTR_ERR(chip);
3828                         goto out;
3829                 }
3830
3831                 r = -ENXIO;
3832                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3833                         goto get_irqchip_out;
3834                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3835                 if (r)
3836                         goto get_irqchip_out;
3837                 r = -EFAULT;
3838                 if (copy_to_user(argp, chip, sizeof *chip))
3839                         goto get_irqchip_out;
3840                 r = 0;
3841         get_irqchip_out:
3842                 kfree(chip);
3843                 break;
3844         }
3845         case KVM_SET_IRQCHIP: {
3846                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3847                 struct kvm_irqchip *chip;
3848
3849                 chip = memdup_user(argp, sizeof(*chip));
3850                 if (IS_ERR(chip)) {
3851                         r = PTR_ERR(chip);
3852                         goto out;
3853                 }
3854
3855                 r = -ENXIO;
3856                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3857                         goto set_irqchip_out;
3858                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3859                 if (r)
3860                         goto set_irqchip_out;
3861                 r = 0;
3862         set_irqchip_out:
3863                 kfree(chip);
3864                 break;
3865         }
3866         case KVM_GET_PIT: {
3867                 r = -EFAULT;
3868                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3869                         goto out;
3870                 r = -ENXIO;
3871                 if (!kvm->arch.vpit)
3872                         goto out;
3873                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3874                 if (r)
3875                         goto out;
3876                 r = -EFAULT;
3877                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3878                         goto out;
3879                 r = 0;
3880                 break;
3881         }
3882         case KVM_SET_PIT: {
3883                 r = -EFAULT;
3884                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3885                         goto out;
3886                 r = -ENXIO;
3887                 if (!kvm->arch.vpit)
3888                         goto out;
3889                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3890                 break;
3891         }
3892         case KVM_GET_PIT2: {
3893                 r = -ENXIO;
3894                 if (!kvm->arch.vpit)
3895                         goto out;
3896                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3897                 if (r)
3898                         goto out;
3899                 r = -EFAULT;
3900                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3901                         goto out;
3902                 r = 0;
3903                 break;
3904         }
3905         case KVM_SET_PIT2: {
3906                 r = -EFAULT;
3907                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3908                         goto out;
3909                 r = -ENXIO;
3910                 if (!kvm->arch.vpit)
3911                         goto out;
3912                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3913                 break;
3914         }
3915         case KVM_REINJECT_CONTROL: {
3916                 struct kvm_reinject_control control;
3917                 r =  -EFAULT;
3918                 if (copy_from_user(&control, argp, sizeof(control)))
3919                         goto out;
3920                 r = kvm_vm_ioctl_reinject(kvm, &control);
3921                 break;
3922         }
3923         case KVM_SET_BOOT_CPU_ID:
3924                 r = 0;
3925                 mutex_lock(&kvm->lock);
3926                 if (atomic_read(&kvm->online_vcpus) != 0)
3927                         r = -EBUSY;
3928                 else
3929                         kvm->arch.bsp_vcpu_id = arg;
3930                 mutex_unlock(&kvm->lock);
3931                 break;
3932         case KVM_XEN_HVM_CONFIG: {
3933                 r = -EFAULT;
3934                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3935                                    sizeof(struct kvm_xen_hvm_config)))
3936                         goto out;
3937                 r = -EINVAL;
3938                 if (kvm->arch.xen_hvm_config.flags)
3939                         goto out;
3940                 r = 0;
3941                 break;
3942         }
3943         case KVM_SET_CLOCK: {
3944                 struct kvm_clock_data user_ns;
3945                 u64 now_ns;
3946                 s64 delta;
3947
3948                 r = -EFAULT;
3949                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3950                         goto out;
3951
3952                 r = -EINVAL;
3953                 if (user_ns.flags)
3954                         goto out;
3955
3956                 r = 0;
3957                 local_irq_disable();
3958                 now_ns = get_kernel_ns();
3959                 delta = user_ns.clock - now_ns;
3960                 local_irq_enable();
3961                 kvm->arch.kvmclock_offset = delta;
3962                 kvm_gen_update_masterclock(kvm);
3963                 break;
3964         }
3965         case KVM_GET_CLOCK: {
3966                 struct kvm_clock_data user_ns;
3967                 u64 now_ns;
3968
3969                 local_irq_disable();
3970                 now_ns = get_kernel_ns();
3971                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3972                 local_irq_enable();
3973                 user_ns.flags = 0;
3974                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3975
3976                 r = -EFAULT;
3977                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3978                         goto out;
3979                 r = 0;
3980                 break;
3981         }
3982         case KVM_ENABLE_CAP: {
3983                 struct kvm_enable_cap cap;
3984
3985                 r = -EFAULT;
3986                 if (copy_from_user(&cap, argp, sizeof(cap)))
3987                         goto out;
3988                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3989                 break;
3990         }
3991         default:
3992                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3993         }
3994 out:
3995         return r;
3996 }
3997
3998 static void kvm_init_msr_list(void)
3999 {
4000         u32 dummy[2];
4001         unsigned i, j;
4002
4003         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4004                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4005                         continue;
4006
4007                 /*
4008                  * Even MSRs that are valid in the host may not be exposed
4009                  * to the guests in some cases.
4010                  */
4011                 switch (msrs_to_save[i]) {
4012                 case MSR_IA32_BNDCFGS:
4013                         if (!kvm_x86_ops->mpx_supported())
4014                                 continue;
4015                         break;
4016                 case MSR_TSC_AUX:
4017                         if (!kvm_x86_ops->rdtscp_supported())
4018                                 continue;
4019                         break;
4020                 default:
4021                         break;
4022                 }
4023
4024                 if (j < i)
4025                         msrs_to_save[j] = msrs_to_save[i];
4026                 j++;
4027         }
4028         num_msrs_to_save = j;
4029
4030         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4031                 switch (emulated_msrs[i]) {
4032                 case MSR_IA32_SMBASE:
4033                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4034                                 continue;
4035                         break;
4036                 default:
4037                         break;
4038                 }
4039
4040                 if (j < i)
4041                         emulated_msrs[j] = emulated_msrs[i];
4042                 j++;
4043         }
4044         num_emulated_msrs = j;
4045 }
4046
4047 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4048                            const void *v)
4049 {
4050         int handled = 0;
4051         int n;
4052
4053         do {
4054                 n = min(len, 8);
4055                 if (!(vcpu->arch.apic &&
4056                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4057                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4058                         break;
4059                 handled += n;
4060                 addr += n;
4061                 len -= n;
4062                 v += n;
4063         } while (len);
4064
4065         return handled;
4066 }
4067
4068 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4069 {
4070         int handled = 0;
4071         int n;
4072
4073         do {
4074                 n = min(len, 8);
4075                 if (!(vcpu->arch.apic &&
4076                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4077                                          addr, n, v))
4078                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4079                         break;
4080                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4081                 handled += n;
4082                 addr += n;
4083                 len -= n;
4084                 v += n;
4085         } while (len);
4086
4087         return handled;
4088 }
4089
4090 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4091                         struct kvm_segment *var, int seg)
4092 {
4093         kvm_x86_ops->set_segment(vcpu, var, seg);
4094 }
4095
4096 void kvm_get_segment(struct kvm_vcpu *vcpu,
4097                      struct kvm_segment *var, int seg)
4098 {
4099         kvm_x86_ops->get_segment(vcpu, var, seg);
4100 }
4101
4102 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4103                            struct x86_exception *exception)
4104 {
4105         gpa_t t_gpa;
4106
4107         BUG_ON(!mmu_is_nested(vcpu));
4108
4109         /* NPT walks are always user-walks */
4110         access |= PFERR_USER_MASK;
4111         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4112
4113         return t_gpa;
4114 }
4115
4116 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4117                               struct x86_exception *exception)
4118 {
4119         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4120         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4121 }
4122
4123  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4124                                 struct x86_exception *exception)
4125 {
4126         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4127         access |= PFERR_FETCH_MASK;
4128         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4129 }
4130
4131 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4132                                struct x86_exception *exception)
4133 {
4134         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4135         access |= PFERR_WRITE_MASK;
4136         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4137 }
4138
4139 /* uses this to access any guest's mapped memory without checking CPL */
4140 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4141                                 struct x86_exception *exception)
4142 {
4143         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4144 }
4145
4146 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4147                                       struct kvm_vcpu *vcpu, u32 access,
4148                                       struct x86_exception *exception)
4149 {
4150         void *data = val;
4151         int r = X86EMUL_CONTINUE;
4152
4153         while (bytes) {
4154                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4155                                                             exception);
4156                 unsigned offset = addr & (PAGE_SIZE-1);
4157                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4158                 int ret;
4159
4160                 if (gpa == UNMAPPED_GVA)
4161                         return X86EMUL_PROPAGATE_FAULT;
4162                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4163                                                offset, toread);
4164                 if (ret < 0) {
4165                         r = X86EMUL_IO_NEEDED;
4166                         goto out;
4167                 }
4168
4169                 bytes -= toread;
4170                 data += toread;
4171                 addr += toread;
4172         }
4173 out:
4174         return r;
4175 }
4176
4177 /* used for instruction fetching */
4178 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4179                                 gva_t addr, void *val, unsigned int bytes,
4180                                 struct x86_exception *exception)
4181 {
4182         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4183         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4184         unsigned offset;
4185         int ret;
4186
4187         /* Inline kvm_read_guest_virt_helper for speed.  */
4188         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4189                                                     exception);
4190         if (unlikely(gpa == UNMAPPED_GVA))
4191                 return X86EMUL_PROPAGATE_FAULT;
4192
4193         offset = addr & (PAGE_SIZE-1);
4194         if (WARN_ON(offset + bytes > PAGE_SIZE))
4195                 bytes = (unsigned)PAGE_SIZE - offset;
4196         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4197                                        offset, bytes);
4198         if (unlikely(ret < 0))
4199                 return X86EMUL_IO_NEEDED;
4200
4201         return X86EMUL_CONTINUE;
4202 }
4203
4204 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4205                                gva_t addr, void *val, unsigned int bytes,
4206                                struct x86_exception *exception)
4207 {
4208         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4209         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4210
4211         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4212                                           exception);
4213 }
4214 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4215
4216 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4217                                       gva_t addr, void *val, unsigned int bytes,
4218                                       struct x86_exception *exception)
4219 {
4220         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4221         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4222 }
4223
4224 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4225                 unsigned long addr, void *val, unsigned int bytes)
4226 {
4227         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4228         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4229
4230         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4231 }
4232
4233 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4234                                        gva_t addr, void *val,
4235                                        unsigned int bytes,
4236                                        struct x86_exception *exception)
4237 {
4238         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4239         void *data = val;
4240         int r = X86EMUL_CONTINUE;
4241
4242         while (bytes) {
4243                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4244                                                              PFERR_WRITE_MASK,
4245                                                              exception);
4246                 unsigned offset = addr & (PAGE_SIZE-1);
4247                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4248                 int ret;
4249
4250                 if (gpa == UNMAPPED_GVA)
4251                         return X86EMUL_PROPAGATE_FAULT;
4252                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4253                 if (ret < 0) {
4254                         r = X86EMUL_IO_NEEDED;
4255                         goto out;
4256                 }
4257
4258                 bytes -= towrite;
4259                 data += towrite;
4260                 addr += towrite;
4261         }
4262 out:
4263         return r;
4264 }
4265 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4266
4267 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4268                                 gpa_t *gpa, struct x86_exception *exception,
4269                                 bool write)
4270 {
4271         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4272                 | (write ? PFERR_WRITE_MASK : 0);
4273
4274         if (vcpu_match_mmio_gva(vcpu, gva)
4275             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4276                                  vcpu->arch.access, access)) {
4277                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4278                                         (gva & (PAGE_SIZE - 1));
4279                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4280                 return 1;
4281         }
4282
4283         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4284
4285         if (*gpa == UNMAPPED_GVA)
4286                 return -1;
4287
4288         /* For APIC access vmexit */
4289         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4290                 return 1;
4291
4292         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4293                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4294                 return 1;
4295         }
4296
4297         return 0;
4298 }
4299
4300 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4301                         const void *val, int bytes)
4302 {
4303         int ret;
4304
4305         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4306         if (ret < 0)
4307                 return 0;
4308         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4309         return 1;
4310 }
4311
4312 struct read_write_emulator_ops {
4313         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4314                                   int bytes);
4315         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4316                                   void *val, int bytes);
4317         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4318                                int bytes, void *val);
4319         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4320                                     void *val, int bytes);
4321         bool write;
4322 };
4323
4324 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4325 {
4326         if (vcpu->mmio_read_completed) {
4327                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4328                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4329                 vcpu->mmio_read_completed = 0;
4330                 return 1;
4331         }
4332
4333         return 0;
4334 }
4335
4336 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4337                         void *val, int bytes)
4338 {
4339         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4340 }
4341
4342 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4343                          void *val, int bytes)
4344 {
4345         return emulator_write_phys(vcpu, gpa, val, bytes);
4346 }
4347
4348 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4349 {
4350         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4351         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4352 }
4353
4354 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4355                           void *val, int bytes)
4356 {
4357         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4358         return X86EMUL_IO_NEEDED;
4359 }
4360
4361 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4362                            void *val, int bytes)
4363 {
4364         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4365
4366         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4367         return X86EMUL_CONTINUE;
4368 }
4369
4370 static const struct read_write_emulator_ops read_emultor = {
4371         .read_write_prepare = read_prepare,
4372         .read_write_emulate = read_emulate,
4373         .read_write_mmio = vcpu_mmio_read,
4374         .read_write_exit_mmio = read_exit_mmio,
4375 };
4376
4377 static const struct read_write_emulator_ops write_emultor = {
4378         .read_write_emulate = write_emulate,
4379         .read_write_mmio = write_mmio,
4380         .read_write_exit_mmio = write_exit_mmio,
4381         .write = true,
4382 };
4383
4384 static int emulator_read_write_onepage(unsigned long addr, void *val,
4385                                        unsigned int bytes,
4386                                        struct x86_exception *exception,
4387                                        struct kvm_vcpu *vcpu,
4388                                        const struct read_write_emulator_ops *ops)
4389 {
4390         gpa_t gpa;
4391         int handled, ret;
4392         bool write = ops->write;
4393         struct kvm_mmio_fragment *frag;
4394
4395         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4396
4397         if (ret < 0)
4398                 return X86EMUL_PROPAGATE_FAULT;
4399
4400         /* For APIC access vmexit */
4401         if (ret)
4402                 goto mmio;
4403
4404         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4405                 return X86EMUL_CONTINUE;
4406
4407 mmio:
4408         /*
4409          * Is this MMIO handled locally?
4410          */
4411         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4412         if (handled == bytes)
4413                 return X86EMUL_CONTINUE;
4414
4415         gpa += handled;
4416         bytes -= handled;
4417         val += handled;
4418
4419         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4420         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4421         frag->gpa = gpa;
4422         frag->data = val;
4423         frag->len = bytes;
4424         return X86EMUL_CONTINUE;
4425 }
4426
4427 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4428                         unsigned long addr,
4429                         void *val, unsigned int bytes,
4430                         struct x86_exception *exception,
4431                         const struct read_write_emulator_ops *ops)
4432 {
4433         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4434         gpa_t gpa;
4435         int rc;
4436
4437         if (ops->read_write_prepare &&
4438                   ops->read_write_prepare(vcpu, val, bytes))
4439                 return X86EMUL_CONTINUE;
4440
4441         vcpu->mmio_nr_fragments = 0;
4442
4443         /* Crossing a page boundary? */
4444         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4445                 int now;
4446
4447                 now = -addr & ~PAGE_MASK;
4448                 rc = emulator_read_write_onepage(addr, val, now, exception,
4449                                                  vcpu, ops);
4450
4451                 if (rc != X86EMUL_CONTINUE)
4452                         return rc;
4453                 addr += now;
4454                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4455                         addr = (u32)addr;
4456                 val += now;
4457                 bytes -= now;
4458         }
4459
4460         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4461                                          vcpu, ops);
4462         if (rc != X86EMUL_CONTINUE)
4463                 return rc;
4464
4465         if (!vcpu->mmio_nr_fragments)
4466                 return rc;
4467
4468         gpa = vcpu->mmio_fragments[0].gpa;
4469
4470         vcpu->mmio_needed = 1;
4471         vcpu->mmio_cur_fragment = 0;
4472
4473         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4474         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4475         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4476         vcpu->run->mmio.phys_addr = gpa;
4477
4478         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4479 }
4480
4481 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4482                                   unsigned long addr,
4483                                   void *val,
4484                                   unsigned int bytes,
4485                                   struct x86_exception *exception)
4486 {
4487         return emulator_read_write(ctxt, addr, val, bytes,
4488                                    exception, &read_emultor);
4489 }
4490
4491 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4492                             unsigned long addr,
4493                             const void *val,
4494                             unsigned int bytes,
4495                             struct x86_exception *exception)
4496 {
4497         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4498                                    exception, &write_emultor);
4499 }
4500
4501 #define CMPXCHG_TYPE(t, ptr, old, new) \
4502         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4503
4504 #ifdef CONFIG_X86_64
4505 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4506 #else
4507 #  define CMPXCHG64(ptr, old, new) \
4508         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4509 #endif
4510
4511 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4512                                      unsigned long addr,
4513                                      const void *old,
4514                                      const void *new,
4515                                      unsigned int bytes,
4516                                      struct x86_exception *exception)
4517 {
4518         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4519         gpa_t gpa;
4520         struct page *page;
4521         char *kaddr;
4522         bool exchanged;
4523
4524         /* guests cmpxchg8b have to be emulated atomically */
4525         if (bytes > 8 || (bytes & (bytes - 1)))
4526                 goto emul_write;
4527
4528         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4529
4530         if (gpa == UNMAPPED_GVA ||
4531             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4532                 goto emul_write;
4533
4534         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4535                 goto emul_write;
4536
4537         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4538         if (is_error_page(page))
4539                 goto emul_write;
4540
4541         kaddr = kmap_atomic(page);
4542         kaddr += offset_in_page(gpa);
4543         switch (bytes) {
4544         case 1:
4545                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4546                 break;
4547         case 2:
4548                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4549                 break;
4550         case 4:
4551                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4552                 break;
4553         case 8:
4554                 exchanged = CMPXCHG64(kaddr, old, new);
4555                 break;
4556         default:
4557                 BUG();
4558         }
4559         kunmap_atomic(kaddr);
4560         kvm_release_page_dirty(page);
4561
4562         if (!exchanged)
4563                 return X86EMUL_CMPXCHG_FAILED;
4564
4565         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4566         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4567
4568         return X86EMUL_CONTINUE;
4569
4570 emul_write:
4571         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4572
4573         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4574 }
4575
4576 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4577 {
4578         /* TODO: String I/O for in kernel device */
4579         int r;
4580
4581         if (vcpu->arch.pio.in)
4582                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4583                                     vcpu->arch.pio.size, pd);
4584         else
4585                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4586                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4587                                      pd);
4588         return r;
4589 }
4590
4591 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4592                                unsigned short port, void *val,
4593                                unsigned int count, bool in)
4594 {
4595         vcpu->arch.pio.port = port;
4596         vcpu->arch.pio.in = in;
4597         vcpu->arch.pio.count  = count;
4598         vcpu->arch.pio.size = size;
4599
4600         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4601                 vcpu->arch.pio.count = 0;
4602                 return 1;
4603         }
4604
4605         vcpu->run->exit_reason = KVM_EXIT_IO;
4606         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4607         vcpu->run->io.size = size;
4608         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4609         vcpu->run->io.count = count;
4610         vcpu->run->io.port = port;
4611
4612         return 0;
4613 }
4614
4615 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4616                                     int size, unsigned short port, void *val,
4617                                     unsigned int count)
4618 {
4619         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4620         int ret;
4621
4622         if (vcpu->arch.pio.count)
4623                 goto data_avail;
4624
4625         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4626         if (ret) {
4627 data_avail:
4628                 memcpy(val, vcpu->arch.pio_data, size * count);
4629                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4630                 vcpu->arch.pio.count = 0;
4631                 return 1;
4632         }
4633
4634         return 0;
4635 }
4636
4637 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4638                                      int size, unsigned short port,
4639                                      const void *val, unsigned int count)
4640 {
4641         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4642
4643         memcpy(vcpu->arch.pio_data, val, size * count);
4644         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4645         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4646 }
4647
4648 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4649 {
4650         return kvm_x86_ops->get_segment_base(vcpu, seg);
4651 }
4652
4653 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4654 {
4655         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4656 }
4657
4658 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4659 {
4660         if (!need_emulate_wbinvd(vcpu))
4661                 return X86EMUL_CONTINUE;
4662
4663         if (kvm_x86_ops->has_wbinvd_exit()) {
4664                 int cpu = get_cpu();
4665
4666                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4667                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4668                                 wbinvd_ipi, NULL, 1);
4669                 put_cpu();
4670                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4671         } else
4672                 wbinvd();
4673         return X86EMUL_CONTINUE;
4674 }
4675
4676 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4677 {
4678         kvm_x86_ops->skip_emulated_instruction(vcpu);
4679         return kvm_emulate_wbinvd_noskip(vcpu);
4680 }
4681 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4682
4683
4684
4685 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4686 {
4687         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4688 }
4689
4690 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4691                            unsigned long *dest)
4692 {
4693         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4694 }
4695
4696 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4697                            unsigned long value)
4698 {
4699
4700         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4701 }
4702
4703 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4704 {
4705         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4706 }
4707
4708 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4709 {
4710         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4711         unsigned long value;
4712
4713         switch (cr) {
4714         case 0:
4715                 value = kvm_read_cr0(vcpu);
4716                 break;
4717         case 2:
4718                 value = vcpu->arch.cr2;
4719                 break;
4720         case 3:
4721                 value = kvm_read_cr3(vcpu);
4722                 break;
4723         case 4:
4724                 value = kvm_read_cr4(vcpu);
4725                 break;
4726         case 8:
4727                 value = kvm_get_cr8(vcpu);
4728                 break;
4729         default:
4730                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4731                 return 0;
4732         }
4733
4734         return value;
4735 }
4736
4737 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4738 {
4739         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4740         int res = 0;
4741
4742         switch (cr) {
4743         case 0:
4744                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4745                 break;
4746         case 2:
4747                 vcpu->arch.cr2 = val;
4748                 break;
4749         case 3:
4750                 res = kvm_set_cr3(vcpu, val);
4751                 break;
4752         case 4:
4753                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4754                 break;
4755         case 8:
4756                 res = kvm_set_cr8(vcpu, val);
4757                 break;
4758         default:
4759                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4760                 res = -1;
4761         }
4762
4763         return res;
4764 }
4765
4766 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4767 {
4768         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4769 }
4770
4771 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4772 {
4773         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4774 }
4775
4776 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4777 {
4778         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4779 }
4780
4781 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4782 {
4783         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4784 }
4785
4786 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4787 {
4788         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4789 }
4790
4791 static unsigned long emulator_get_cached_segment_base(
4792         struct x86_emulate_ctxt *ctxt, int seg)
4793 {
4794         return get_segment_base(emul_to_vcpu(ctxt), seg);
4795 }
4796
4797 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4798                                  struct desc_struct *desc, u32 *base3,
4799                                  int seg)
4800 {
4801         struct kvm_segment var;
4802
4803         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4804         *selector = var.selector;
4805
4806         if (var.unusable) {
4807                 memset(desc, 0, sizeof(*desc));
4808                 return false;
4809         }
4810
4811         if (var.g)
4812                 var.limit >>= 12;
4813         set_desc_limit(desc, var.limit);
4814         set_desc_base(desc, (unsigned long)var.base);
4815 #ifdef CONFIG_X86_64
4816         if (base3)
4817                 *base3 = var.base >> 32;
4818 #endif
4819         desc->type = var.type;
4820         desc->s = var.s;
4821         desc->dpl = var.dpl;
4822         desc->p = var.present;
4823         desc->avl = var.avl;
4824         desc->l = var.l;
4825         desc->d = var.db;
4826         desc->g = var.g;
4827
4828         return true;
4829 }
4830
4831 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4832                                  struct desc_struct *desc, u32 base3,
4833                                  int seg)
4834 {
4835         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4836         struct kvm_segment var;
4837
4838         var.selector = selector;
4839         var.base = get_desc_base(desc);
4840 #ifdef CONFIG_X86_64
4841         var.base |= ((u64)base3) << 32;
4842 #endif
4843         var.limit = get_desc_limit(desc);
4844         if (desc->g)
4845                 var.limit = (var.limit << 12) | 0xfff;
4846         var.type = desc->type;
4847         var.dpl = desc->dpl;
4848         var.db = desc->d;
4849         var.s = desc->s;
4850         var.l = desc->l;
4851         var.g = desc->g;
4852         var.avl = desc->avl;
4853         var.present = desc->p;
4854         var.unusable = !var.present;
4855         var.padding = 0;
4856
4857         kvm_set_segment(vcpu, &var, seg);
4858         return;
4859 }
4860
4861 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4862                             u32 msr_index, u64 *pdata)
4863 {
4864         struct msr_data msr;
4865         int r;
4866
4867         msr.index = msr_index;
4868         msr.host_initiated = false;
4869         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4870         if (r)
4871                 return r;
4872
4873         *pdata = msr.data;
4874         return 0;
4875 }
4876
4877 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4878                             u32 msr_index, u64 data)
4879 {
4880         struct msr_data msr;
4881
4882         msr.data = data;
4883         msr.index = msr_index;
4884         msr.host_initiated = false;
4885         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4886 }
4887
4888 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4889 {
4890         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4891
4892         return vcpu->arch.smbase;
4893 }
4894
4895 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4896 {
4897         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4898
4899         vcpu->arch.smbase = smbase;
4900 }
4901
4902 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4903                               u32 pmc)
4904 {
4905         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4906 }
4907
4908 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4909                              u32 pmc, u64 *pdata)
4910 {
4911         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4912 }
4913
4914 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4915 {
4916         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4917 }
4918
4919 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4920 {
4921         preempt_disable();
4922         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4923         /*
4924          * CR0.TS may reference the host fpu state, not the guest fpu state,
4925          * so it may be clear at this point.
4926          */
4927         clts();
4928 }
4929
4930 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4931 {
4932         preempt_enable();
4933 }
4934
4935 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4936                               struct x86_instruction_info *info,
4937                               enum x86_intercept_stage stage)
4938 {
4939         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4940 }
4941
4942 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4943                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4944 {
4945         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4946 }
4947
4948 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4949 {
4950         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4951 }
4952
4953 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4954 {
4955         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4956 }
4957
4958 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4959 {
4960         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4961 }
4962
4963 static const struct x86_emulate_ops emulate_ops = {
4964         .read_gpr            = emulator_read_gpr,
4965         .write_gpr           = emulator_write_gpr,
4966         .read_std            = kvm_read_guest_virt_system,
4967         .write_std           = kvm_write_guest_virt_system,
4968         .read_phys           = kvm_read_guest_phys_system,
4969         .fetch               = kvm_fetch_guest_virt,
4970         .read_emulated       = emulator_read_emulated,
4971         .write_emulated      = emulator_write_emulated,
4972         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4973         .invlpg              = emulator_invlpg,
4974         .pio_in_emulated     = emulator_pio_in_emulated,
4975         .pio_out_emulated    = emulator_pio_out_emulated,
4976         .get_segment         = emulator_get_segment,
4977         .set_segment         = emulator_set_segment,
4978         .get_cached_segment_base = emulator_get_cached_segment_base,
4979         .get_gdt             = emulator_get_gdt,
4980         .get_idt             = emulator_get_idt,
4981         .set_gdt             = emulator_set_gdt,
4982         .set_idt             = emulator_set_idt,
4983         .get_cr              = emulator_get_cr,
4984         .set_cr              = emulator_set_cr,
4985         .cpl                 = emulator_get_cpl,
4986         .get_dr              = emulator_get_dr,
4987         .set_dr              = emulator_set_dr,
4988         .get_smbase          = emulator_get_smbase,
4989         .set_smbase          = emulator_set_smbase,
4990         .set_msr             = emulator_set_msr,
4991         .get_msr             = emulator_get_msr,
4992         .check_pmc           = emulator_check_pmc,
4993         .read_pmc            = emulator_read_pmc,
4994         .halt                = emulator_halt,
4995         .wbinvd              = emulator_wbinvd,
4996         .fix_hypercall       = emulator_fix_hypercall,
4997         .get_fpu             = emulator_get_fpu,
4998         .put_fpu             = emulator_put_fpu,
4999         .intercept           = emulator_intercept,
5000         .get_cpuid           = emulator_get_cpuid,
5001         .set_nmi_mask        = emulator_set_nmi_mask,
5002 };
5003
5004 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5005 {
5006         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5007         /*
5008          * an sti; sti; sequence only disable interrupts for the first
5009          * instruction. So, if the last instruction, be it emulated or
5010          * not, left the system with the INT_STI flag enabled, it
5011          * means that the last instruction is an sti. We should not
5012          * leave the flag on in this case. The same goes for mov ss
5013          */
5014         if (int_shadow & mask)
5015                 mask = 0;
5016         if (unlikely(int_shadow || mask)) {
5017                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5018                 if (!mask)
5019                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5020         }
5021 }
5022
5023 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5024 {
5025         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5026         if (ctxt->exception.vector == PF_VECTOR)
5027                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5028
5029         if (ctxt->exception.error_code_valid)
5030                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5031                                       ctxt->exception.error_code);
5032         else
5033                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5034         return false;
5035 }
5036
5037 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5038 {
5039         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5040         int cs_db, cs_l;
5041
5042         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5043
5044         ctxt->eflags = kvm_get_rflags(vcpu);
5045         ctxt->eip = kvm_rip_read(vcpu);
5046         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5047                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5048                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5049                      cs_db                              ? X86EMUL_MODE_PROT32 :
5050                                                           X86EMUL_MODE_PROT16;
5051         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5052         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5053         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5054         ctxt->emul_flags = vcpu->arch.hflags;
5055
5056         init_decode_cache(ctxt);
5057         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5058 }
5059
5060 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5061 {
5062         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5063         int ret;
5064
5065         init_emulate_ctxt(vcpu);
5066
5067         ctxt->op_bytes = 2;
5068         ctxt->ad_bytes = 2;
5069         ctxt->_eip = ctxt->eip + inc_eip;
5070         ret = emulate_int_real(ctxt, irq);
5071
5072         if (ret != X86EMUL_CONTINUE)
5073                 return EMULATE_FAIL;
5074
5075         ctxt->eip = ctxt->_eip;
5076         kvm_rip_write(vcpu, ctxt->eip);
5077         kvm_set_rflags(vcpu, ctxt->eflags);
5078
5079         if (irq == NMI_VECTOR)
5080                 vcpu->arch.nmi_pending = 0;
5081         else
5082                 vcpu->arch.interrupt.pending = false;
5083
5084         return EMULATE_DONE;
5085 }
5086 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5087
5088 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5089 {
5090         int r = EMULATE_DONE;
5091
5092         ++vcpu->stat.insn_emulation_fail;
5093         trace_kvm_emulate_insn_failed(vcpu);
5094         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5095                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5096                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5097                 vcpu->run->internal.ndata = 0;
5098                 r = EMULATE_FAIL;
5099         }
5100         kvm_queue_exception(vcpu, UD_VECTOR);
5101
5102         return r;
5103 }
5104
5105 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5106                                   bool write_fault_to_shadow_pgtable,
5107                                   int emulation_type)
5108 {
5109         gpa_t gpa = cr2;
5110         pfn_t pfn;
5111
5112         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5113                 return false;
5114
5115         if (!vcpu->arch.mmu.direct_map) {
5116                 /*
5117                  * Write permission should be allowed since only
5118                  * write access need to be emulated.
5119                  */
5120                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5121
5122                 /*
5123                  * If the mapping is invalid in guest, let cpu retry
5124                  * it to generate fault.
5125                  */
5126                 if (gpa == UNMAPPED_GVA)
5127                         return true;
5128         }
5129
5130         /*
5131          * Do not retry the unhandleable instruction if it faults on the
5132          * readonly host memory, otherwise it will goto a infinite loop:
5133          * retry instruction -> write #PF -> emulation fail -> retry
5134          * instruction -> ...
5135          */
5136         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5137
5138         /*
5139          * If the instruction failed on the error pfn, it can not be fixed,
5140          * report the error to userspace.
5141          */
5142         if (is_error_noslot_pfn(pfn))
5143                 return false;
5144
5145         kvm_release_pfn_clean(pfn);
5146
5147         /* The instructions are well-emulated on direct mmu. */
5148         if (vcpu->arch.mmu.direct_map) {
5149                 unsigned int indirect_shadow_pages;
5150
5151                 spin_lock(&vcpu->kvm->mmu_lock);
5152                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5153                 spin_unlock(&vcpu->kvm->mmu_lock);
5154
5155                 if (indirect_shadow_pages)
5156                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5157
5158                 return true;
5159         }
5160
5161         /*
5162          * if emulation was due to access to shadowed page table
5163          * and it failed try to unshadow page and re-enter the
5164          * guest to let CPU execute the instruction.
5165          */
5166         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5167
5168         /*
5169          * If the access faults on its page table, it can not
5170          * be fixed by unprotecting shadow page and it should
5171          * be reported to userspace.
5172          */
5173         return !write_fault_to_shadow_pgtable;
5174 }
5175
5176 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5177                               unsigned long cr2,  int emulation_type)
5178 {
5179         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5180         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5181
5182         last_retry_eip = vcpu->arch.last_retry_eip;
5183         last_retry_addr = vcpu->arch.last_retry_addr;
5184
5185         /*
5186          * If the emulation is caused by #PF and it is non-page_table
5187          * writing instruction, it means the VM-EXIT is caused by shadow
5188          * page protected, we can zap the shadow page and retry this
5189          * instruction directly.
5190          *
5191          * Note: if the guest uses a non-page-table modifying instruction
5192          * on the PDE that points to the instruction, then we will unmap
5193          * the instruction and go to an infinite loop. So, we cache the
5194          * last retried eip and the last fault address, if we meet the eip
5195          * and the address again, we can break out of the potential infinite
5196          * loop.
5197          */
5198         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5199
5200         if (!(emulation_type & EMULTYPE_RETRY))
5201                 return false;
5202
5203         if (x86_page_table_writing_insn(ctxt))
5204                 return false;
5205
5206         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5207                 return false;
5208
5209         vcpu->arch.last_retry_eip = ctxt->eip;
5210         vcpu->arch.last_retry_addr = cr2;
5211
5212         if (!vcpu->arch.mmu.direct_map)
5213                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5214
5215         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5216
5217         return true;
5218 }
5219
5220 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5221 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5222
5223 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5224 {
5225         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5226                 /* This is a good place to trace that we are exiting SMM.  */
5227                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5228
5229                 if (unlikely(vcpu->arch.smi_pending)) {
5230                         kvm_make_request(KVM_REQ_SMI, vcpu);
5231                         vcpu->arch.smi_pending = 0;
5232                 } else {
5233                         /* Process a latched INIT, if any.  */
5234                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5235                 }
5236         }
5237
5238         kvm_mmu_reset_context(vcpu);
5239 }
5240
5241 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5242 {
5243         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5244
5245         vcpu->arch.hflags = emul_flags;
5246
5247         if (changed & HF_SMM_MASK)
5248                 kvm_smm_changed(vcpu);
5249 }
5250
5251 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5252                                 unsigned long *db)
5253 {
5254         u32 dr6 = 0;
5255         int i;
5256         u32 enable, rwlen;
5257
5258         enable = dr7;
5259         rwlen = dr7 >> 16;
5260         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5261                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5262                         dr6 |= (1 << i);
5263         return dr6;
5264 }
5265
5266 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5267 {
5268         struct kvm_run *kvm_run = vcpu->run;
5269
5270         /*
5271          * rflags is the old, "raw" value of the flags.  The new value has
5272          * not been saved yet.
5273          *
5274          * This is correct even for TF set by the guest, because "the
5275          * processor will not generate this exception after the instruction
5276          * that sets the TF flag".
5277          */
5278         if (unlikely(rflags & X86_EFLAGS_TF)) {
5279                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5280                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5281                                                   DR6_RTM;
5282                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5283                         kvm_run->debug.arch.exception = DB_VECTOR;
5284                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5285                         *r = EMULATE_USER_EXIT;
5286                 } else {
5287                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5288                         /*
5289                          * "Certain debug exceptions may clear bit 0-3.  The
5290                          * remaining contents of the DR6 register are never
5291                          * cleared by the processor".
5292                          */
5293                         vcpu->arch.dr6 &= ~15;
5294                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5295                         kvm_queue_exception(vcpu, DB_VECTOR);
5296                 }
5297         }
5298 }
5299
5300 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5301 {
5302         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5303             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5304                 struct kvm_run *kvm_run = vcpu->run;
5305                 unsigned long eip = kvm_get_linear_rip(vcpu);
5306                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5307                                            vcpu->arch.guest_debug_dr7,
5308                                            vcpu->arch.eff_db);
5309
5310                 if (dr6 != 0) {
5311                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5312                         kvm_run->debug.arch.pc = eip;
5313                         kvm_run->debug.arch.exception = DB_VECTOR;
5314                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5315                         *r = EMULATE_USER_EXIT;
5316                         return true;
5317                 }
5318         }
5319
5320         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5321             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5322                 unsigned long eip = kvm_get_linear_rip(vcpu);
5323                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5324                                            vcpu->arch.dr7,
5325                                            vcpu->arch.db);
5326
5327                 if (dr6 != 0) {
5328                         vcpu->arch.dr6 &= ~15;
5329                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5330                         kvm_queue_exception(vcpu, DB_VECTOR);
5331                         *r = EMULATE_DONE;
5332                         return true;
5333                 }
5334         }
5335
5336         return false;
5337 }
5338
5339 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5340                             unsigned long cr2,
5341                             int emulation_type,
5342                             void *insn,
5343                             int insn_len)
5344 {
5345         int r;
5346         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5347         bool writeback = true;
5348         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5349
5350         /*
5351          * Clear write_fault_to_shadow_pgtable here to ensure it is
5352          * never reused.
5353          */
5354         vcpu->arch.write_fault_to_shadow_pgtable = false;
5355         kvm_clear_exception_queue(vcpu);
5356
5357         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5358                 init_emulate_ctxt(vcpu);
5359
5360                 /*
5361                  * We will reenter on the same instruction since
5362                  * we do not set complete_userspace_io.  This does not
5363                  * handle watchpoints yet, those would be handled in
5364                  * the emulate_ops.
5365                  */
5366                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5367                         return r;
5368
5369                 ctxt->interruptibility = 0;
5370                 ctxt->have_exception = false;
5371                 ctxt->exception.vector = -1;
5372                 ctxt->perm_ok = false;
5373
5374                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5375
5376                 r = x86_decode_insn(ctxt, insn, insn_len);
5377
5378                 trace_kvm_emulate_insn_start(vcpu);
5379                 ++vcpu->stat.insn_emulation;
5380                 if (r != EMULATION_OK)  {
5381                         if (emulation_type & EMULTYPE_TRAP_UD)
5382                                 return EMULATE_FAIL;
5383                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5384                                                 emulation_type))
5385                                 return EMULATE_DONE;
5386                         if (emulation_type & EMULTYPE_SKIP)
5387                                 return EMULATE_FAIL;
5388                         return handle_emulation_failure(vcpu);
5389                 }
5390         }
5391
5392         if (emulation_type & EMULTYPE_SKIP) {
5393                 kvm_rip_write(vcpu, ctxt->_eip);
5394                 if (ctxt->eflags & X86_EFLAGS_RF)
5395                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5396                 return EMULATE_DONE;
5397         }
5398
5399         if (retry_instruction(ctxt, cr2, emulation_type))
5400                 return EMULATE_DONE;
5401
5402         /* this is needed for vmware backdoor interface to work since it
5403            changes registers values  during IO operation */
5404         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5405                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5406                 emulator_invalidate_register_cache(ctxt);
5407         }
5408
5409 restart:
5410         r = x86_emulate_insn(ctxt);
5411
5412         if (r == EMULATION_INTERCEPTED)
5413                 return EMULATE_DONE;
5414
5415         if (r == EMULATION_FAILED) {
5416                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5417                                         emulation_type))
5418                         return EMULATE_DONE;
5419
5420                 return handle_emulation_failure(vcpu);
5421         }
5422
5423         if (ctxt->have_exception) {
5424                 r = EMULATE_DONE;
5425                 if (inject_emulated_exception(vcpu))
5426                         return r;
5427         } else if (vcpu->arch.pio.count) {
5428                 if (!vcpu->arch.pio.in) {
5429                         /* FIXME: return into emulator if single-stepping.  */
5430                         vcpu->arch.pio.count = 0;
5431                 } else {
5432                         writeback = false;
5433                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5434                 }
5435                 r = EMULATE_USER_EXIT;
5436         } else if (vcpu->mmio_needed) {
5437                 if (!vcpu->mmio_is_write)
5438                         writeback = false;
5439                 r = EMULATE_USER_EXIT;
5440                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5441         } else if (r == EMULATION_RESTART)
5442                 goto restart;
5443         else
5444                 r = EMULATE_DONE;
5445
5446         if (writeback) {
5447                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5448                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5449                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5450                 if (vcpu->arch.hflags != ctxt->emul_flags)
5451                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5452                 kvm_rip_write(vcpu, ctxt->eip);
5453                 if (r == EMULATE_DONE)
5454                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5455                 if (!ctxt->have_exception ||
5456                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5457                         __kvm_set_rflags(vcpu, ctxt->eflags);
5458
5459                 /*
5460                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5461                  * do nothing, and it will be requested again as soon as
5462                  * the shadow expires.  But we still need to check here,
5463                  * because POPF has no interrupt shadow.
5464                  */
5465                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5466                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5467         } else
5468                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5469
5470         return r;
5471 }
5472 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5473
5474 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5475 {
5476         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5477         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5478                                             size, port, &val, 1);
5479         /* do not return to emulator after return from userspace */
5480         vcpu->arch.pio.count = 0;
5481         return ret;
5482 }
5483 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5484
5485 static void tsc_bad(void *info)
5486 {
5487         __this_cpu_write(cpu_tsc_khz, 0);
5488 }
5489
5490 static void tsc_khz_changed(void *data)
5491 {
5492         struct cpufreq_freqs *freq = data;
5493         unsigned long khz = 0;
5494
5495         if (data)
5496                 khz = freq->new;
5497         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5498                 khz = cpufreq_quick_get(raw_smp_processor_id());
5499         if (!khz)
5500                 khz = tsc_khz;
5501         __this_cpu_write(cpu_tsc_khz, khz);
5502 }
5503
5504 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5505                                      void *data)
5506 {
5507         struct cpufreq_freqs *freq = data;
5508         struct kvm *kvm;
5509         struct kvm_vcpu *vcpu;
5510         int i, send_ipi = 0;
5511
5512         /*
5513          * We allow guests to temporarily run on slowing clocks,
5514          * provided we notify them after, or to run on accelerating
5515          * clocks, provided we notify them before.  Thus time never
5516          * goes backwards.
5517          *
5518          * However, we have a problem.  We can't atomically update
5519          * the frequency of a given CPU from this function; it is
5520          * merely a notifier, which can be called from any CPU.
5521          * Changing the TSC frequency at arbitrary points in time
5522          * requires a recomputation of local variables related to
5523          * the TSC for each VCPU.  We must flag these local variables
5524          * to be updated and be sure the update takes place with the
5525          * new frequency before any guests proceed.
5526          *
5527          * Unfortunately, the combination of hotplug CPU and frequency
5528          * change creates an intractable locking scenario; the order
5529          * of when these callouts happen is undefined with respect to
5530          * CPU hotplug, and they can race with each other.  As such,
5531          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5532          * undefined; you can actually have a CPU frequency change take
5533          * place in between the computation of X and the setting of the
5534          * variable.  To protect against this problem, all updates of
5535          * the per_cpu tsc_khz variable are done in an interrupt
5536          * protected IPI, and all callers wishing to update the value
5537          * must wait for a synchronous IPI to complete (which is trivial
5538          * if the caller is on the CPU already).  This establishes the
5539          * necessary total order on variable updates.
5540          *
5541          * Note that because a guest time update may take place
5542          * anytime after the setting of the VCPU's request bit, the
5543          * correct TSC value must be set before the request.  However,
5544          * to ensure the update actually makes it to any guest which
5545          * starts running in hardware virtualization between the set
5546          * and the acquisition of the spinlock, we must also ping the
5547          * CPU after setting the request bit.
5548          *
5549          */
5550
5551         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5552                 return 0;
5553         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5554                 return 0;
5555
5556         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5557
5558         spin_lock(&kvm_lock);
5559         list_for_each_entry(kvm, &vm_list, vm_list) {
5560                 kvm_for_each_vcpu(i, vcpu, kvm) {
5561                         if (vcpu->cpu != freq->cpu)
5562                                 continue;
5563                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5564                         if (vcpu->cpu != smp_processor_id())
5565                                 send_ipi = 1;
5566                 }
5567         }
5568         spin_unlock(&kvm_lock);
5569
5570         if (freq->old < freq->new && send_ipi) {
5571                 /*
5572                  * We upscale the frequency.  Must make the guest
5573                  * doesn't see old kvmclock values while running with
5574                  * the new frequency, otherwise we risk the guest sees
5575                  * time go backwards.
5576                  *
5577                  * In case we update the frequency for another cpu
5578                  * (which might be in guest context) send an interrupt
5579                  * to kick the cpu out of guest context.  Next time
5580                  * guest context is entered kvmclock will be updated,
5581                  * so the guest will not see stale values.
5582                  */
5583                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5584         }
5585         return 0;
5586 }
5587
5588 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5589         .notifier_call  = kvmclock_cpufreq_notifier
5590 };
5591
5592 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5593                                         unsigned long action, void *hcpu)
5594 {
5595         unsigned int cpu = (unsigned long)hcpu;
5596
5597         switch (action) {
5598                 case CPU_ONLINE:
5599                 case CPU_DOWN_FAILED:
5600                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5601                         break;
5602                 case CPU_DOWN_PREPARE:
5603                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5604                         break;
5605         }
5606         return NOTIFY_OK;
5607 }
5608
5609 static struct notifier_block kvmclock_cpu_notifier_block = {
5610         .notifier_call  = kvmclock_cpu_notifier,
5611         .priority = -INT_MAX
5612 };
5613
5614 static void kvm_timer_init(void)
5615 {
5616         int cpu;
5617
5618         max_tsc_khz = tsc_khz;
5619
5620         cpu_notifier_register_begin();
5621         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5622 #ifdef CONFIG_CPU_FREQ
5623                 struct cpufreq_policy policy;
5624                 memset(&policy, 0, sizeof(policy));
5625                 cpu = get_cpu();
5626                 cpufreq_get_policy(&policy, cpu);
5627                 if (policy.cpuinfo.max_freq)
5628                         max_tsc_khz = policy.cpuinfo.max_freq;
5629                 put_cpu();
5630 #endif
5631                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5632                                           CPUFREQ_TRANSITION_NOTIFIER);
5633         }
5634         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5635         for_each_online_cpu(cpu)
5636                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5637
5638         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5639         cpu_notifier_register_done();
5640
5641 }
5642
5643 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5644
5645 int kvm_is_in_guest(void)
5646 {
5647         return __this_cpu_read(current_vcpu) != NULL;
5648 }
5649
5650 static int kvm_is_user_mode(void)
5651 {
5652         int user_mode = 3;
5653
5654         if (__this_cpu_read(current_vcpu))
5655                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5656
5657         return user_mode != 0;
5658 }
5659
5660 static unsigned long kvm_get_guest_ip(void)
5661 {
5662         unsigned long ip = 0;
5663
5664         if (__this_cpu_read(current_vcpu))
5665                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5666
5667         return ip;
5668 }
5669
5670 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5671         .is_in_guest            = kvm_is_in_guest,
5672         .is_user_mode           = kvm_is_user_mode,
5673         .get_guest_ip           = kvm_get_guest_ip,
5674 };
5675
5676 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5677 {
5678         __this_cpu_write(current_vcpu, vcpu);
5679 }
5680 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5681
5682 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5683 {
5684         __this_cpu_write(current_vcpu, NULL);
5685 }
5686 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5687
5688 static void kvm_set_mmio_spte_mask(void)
5689 {
5690         u64 mask;
5691         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5692
5693         /*
5694          * Set the reserved bits and the present bit of an paging-structure
5695          * entry to generate page fault with PFER.RSV = 1.
5696          */
5697          /* Mask the reserved physical address bits. */
5698         mask = rsvd_bits(maxphyaddr, 51);
5699
5700         /* Bit 62 is always reserved for 32bit host. */
5701         mask |= 0x3ull << 62;
5702
5703         /* Set the present bit. */
5704         mask |= 1ull;
5705
5706 #ifdef CONFIG_X86_64
5707         /*
5708          * If reserved bit is not supported, clear the present bit to disable
5709          * mmio page fault.
5710          */
5711         if (maxphyaddr == 52)
5712                 mask &= ~1ull;
5713 #endif
5714
5715         kvm_mmu_set_mmio_spte_mask(mask);
5716 }
5717
5718 #ifdef CONFIG_X86_64
5719 static void pvclock_gtod_update_fn(struct work_struct *work)
5720 {
5721         struct kvm *kvm;
5722
5723         struct kvm_vcpu *vcpu;
5724         int i;
5725
5726         spin_lock(&kvm_lock);
5727         list_for_each_entry(kvm, &vm_list, vm_list)
5728                 kvm_for_each_vcpu(i, vcpu, kvm)
5729                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5730         atomic_set(&kvm_guest_has_master_clock, 0);
5731         spin_unlock(&kvm_lock);
5732 }
5733
5734 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5735
5736 /*
5737  * Notification about pvclock gtod data update.
5738  */
5739 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5740                                void *priv)
5741 {
5742         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5743         struct timekeeper *tk = priv;
5744
5745         update_pvclock_gtod(tk);
5746
5747         /* disable master clock if host does not trust, or does not
5748          * use, TSC clocksource
5749          */
5750         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5751             atomic_read(&kvm_guest_has_master_clock) != 0)
5752                 queue_work(system_long_wq, &pvclock_gtod_work);
5753
5754         return 0;
5755 }
5756
5757 static struct notifier_block pvclock_gtod_notifier = {
5758         .notifier_call = pvclock_gtod_notify,
5759 };
5760 #endif
5761
5762 int kvm_arch_init(void *opaque)
5763 {
5764         int r;
5765         struct kvm_x86_ops *ops = opaque;
5766
5767         if (kvm_x86_ops) {
5768                 printk(KERN_ERR "kvm: already loaded the other module\n");
5769                 r = -EEXIST;
5770                 goto out;
5771         }
5772
5773         if (!ops->cpu_has_kvm_support()) {
5774                 printk(KERN_ERR "kvm: no hardware support\n");
5775                 r = -EOPNOTSUPP;
5776                 goto out;
5777         }
5778         if (ops->disabled_by_bios()) {
5779                 printk(KERN_ERR "kvm: disabled by bios\n");
5780                 r = -EOPNOTSUPP;
5781                 goto out;
5782         }
5783
5784         r = -ENOMEM;
5785         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5786         if (!shared_msrs) {
5787                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5788                 goto out;
5789         }
5790
5791 #ifdef CONFIG_PREEMPT_RT_FULL
5792         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5793                 printk(KERN_ERR "RT requires X86_FEATURE_CONSTANT_TSC\n");
5794                 return -EOPNOTSUPP;
5795         }
5796 #endif
5797
5798         r = kvm_mmu_module_init();
5799         if (r)
5800                 goto out_free_percpu;
5801
5802         kvm_set_mmio_spte_mask();
5803
5804         kvm_x86_ops = ops;
5805
5806         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5807                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5808
5809         kvm_timer_init();
5810
5811         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5812
5813         if (cpu_has_xsave)
5814                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5815
5816         kvm_lapic_init();
5817 #ifdef CONFIG_X86_64
5818         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5819 #endif
5820
5821         return 0;
5822
5823 out_free_percpu:
5824         free_percpu(shared_msrs);
5825 out:
5826         return r;
5827 }
5828
5829 void kvm_arch_exit(void)
5830 {
5831         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5832
5833         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5834                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5835                                             CPUFREQ_TRANSITION_NOTIFIER);
5836         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5837 #ifdef CONFIG_X86_64
5838         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5839 #endif
5840         kvm_x86_ops = NULL;
5841         kvm_mmu_module_exit();
5842         free_percpu(shared_msrs);
5843 }
5844
5845 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5846 {
5847         ++vcpu->stat.halt_exits;
5848         if (lapic_in_kernel(vcpu)) {
5849                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5850                 return 1;
5851         } else {
5852                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5853                 return 0;
5854         }
5855 }
5856 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5857
5858 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5859 {
5860         kvm_x86_ops->skip_emulated_instruction(vcpu);
5861         return kvm_vcpu_halt(vcpu);
5862 }
5863 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5864
5865 /*
5866  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5867  *
5868  * @apicid - apicid of vcpu to be kicked.
5869  */
5870 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5871 {
5872         struct kvm_lapic_irq lapic_irq;
5873
5874         lapic_irq.shorthand = 0;
5875         lapic_irq.dest_mode = 0;
5876         lapic_irq.dest_id = apicid;
5877         lapic_irq.msi_redir_hint = false;
5878
5879         lapic_irq.delivery_mode = APIC_DM_REMRD;
5880         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5881 }
5882
5883 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5884 {
5885         unsigned long nr, a0, a1, a2, a3, ret;
5886         int op_64_bit, r = 1;
5887
5888         kvm_x86_ops->skip_emulated_instruction(vcpu);
5889
5890         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5891                 return kvm_hv_hypercall(vcpu);
5892
5893         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5894         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5895         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5896         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5897         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5898
5899         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5900
5901         op_64_bit = is_64_bit_mode(vcpu);
5902         if (!op_64_bit) {
5903                 nr &= 0xFFFFFFFF;
5904                 a0 &= 0xFFFFFFFF;
5905                 a1 &= 0xFFFFFFFF;
5906                 a2 &= 0xFFFFFFFF;
5907                 a3 &= 0xFFFFFFFF;
5908         }
5909
5910         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5911                 ret = -KVM_EPERM;
5912                 goto out;
5913         }
5914
5915         switch (nr) {
5916         case KVM_HC_VAPIC_POLL_IRQ:
5917                 ret = 0;
5918                 break;
5919         case KVM_HC_KICK_CPU:
5920                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5921                 ret = 0;
5922                 break;
5923         default:
5924                 ret = -KVM_ENOSYS;
5925                 break;
5926         }
5927 out:
5928         if (!op_64_bit)
5929                 ret = (u32)ret;
5930         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5931         ++vcpu->stat.hypercalls;
5932         return r;
5933 }
5934 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5935
5936 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5937 {
5938         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5939         char instruction[3];
5940         unsigned long rip = kvm_rip_read(vcpu);
5941
5942         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5943
5944         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5945 }
5946
5947 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5948 {
5949         return vcpu->run->request_interrupt_window &&
5950                 likely(!pic_in_kernel(vcpu->kvm));
5951 }
5952
5953 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5954 {
5955         struct kvm_run *kvm_run = vcpu->run;
5956
5957         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5958         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5959         kvm_run->cr8 = kvm_get_cr8(vcpu);
5960         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5961         kvm_run->ready_for_interrupt_injection =
5962                 pic_in_kernel(vcpu->kvm) ||
5963                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
5964 }
5965
5966 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5967 {
5968         int max_irr, tpr;
5969
5970         if (!kvm_x86_ops->update_cr8_intercept)
5971                 return;
5972
5973         if (!vcpu->arch.apic)
5974                 return;
5975
5976         if (!vcpu->arch.apic->vapic_addr)
5977                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5978         else
5979                 max_irr = -1;
5980
5981         if (max_irr != -1)
5982                 max_irr >>= 4;
5983
5984         tpr = kvm_lapic_get_cr8(vcpu);
5985
5986         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5987 }
5988
5989 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5990 {
5991         int r;
5992
5993         /* try to reinject previous events if any */
5994         if (vcpu->arch.exception.pending) {
5995                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5996                                         vcpu->arch.exception.has_error_code,
5997                                         vcpu->arch.exception.error_code);
5998
5999                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6000                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6001                                              X86_EFLAGS_RF);
6002
6003                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6004                     (vcpu->arch.dr7 & DR7_GD)) {
6005                         vcpu->arch.dr7 &= ~DR7_GD;
6006                         kvm_update_dr7(vcpu);
6007                 }
6008
6009                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6010                                           vcpu->arch.exception.has_error_code,
6011                                           vcpu->arch.exception.error_code,
6012                                           vcpu->arch.exception.reinject);
6013                 return 0;
6014         }
6015
6016         if (vcpu->arch.nmi_injected) {
6017                 kvm_x86_ops->set_nmi(vcpu);
6018                 return 0;
6019         }
6020
6021         if (vcpu->arch.interrupt.pending) {
6022                 kvm_x86_ops->set_irq(vcpu);
6023                 return 0;
6024         }
6025
6026         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6027                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6028                 if (r != 0)
6029                         return r;
6030         }
6031
6032         /* try to inject new event if pending */
6033         if (vcpu->arch.nmi_pending) {
6034                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6035                         --vcpu->arch.nmi_pending;
6036                         vcpu->arch.nmi_injected = true;
6037                         kvm_x86_ops->set_nmi(vcpu);
6038                 }
6039         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6040                 /*
6041                  * Because interrupts can be injected asynchronously, we are
6042                  * calling check_nested_events again here to avoid a race condition.
6043                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6044                  * proposal and current concerns.  Perhaps we should be setting
6045                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6046                  */
6047                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6048                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6049                         if (r != 0)
6050                                 return r;
6051                 }
6052                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6053                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6054                                             false);
6055                         kvm_x86_ops->set_irq(vcpu);
6056                 }
6057         }
6058         return 0;
6059 }
6060
6061 static void process_nmi(struct kvm_vcpu *vcpu)
6062 {
6063         unsigned limit = 2;
6064
6065         /*
6066          * x86 is limited to one NMI running, and one NMI pending after it.
6067          * If an NMI is already in progress, limit further NMIs to just one.
6068          * Otherwise, allow two (and we'll inject the first one immediately).
6069          */
6070         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6071                 limit = 1;
6072
6073         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6074         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6075         kvm_make_request(KVM_REQ_EVENT, vcpu);
6076 }
6077
6078 #define put_smstate(type, buf, offset, val)                       \
6079         *(type *)((buf) + (offset) - 0x7e00) = val
6080
6081 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6082 {
6083         u32 flags = 0;
6084         flags |= seg->g       << 23;
6085         flags |= seg->db      << 22;
6086         flags |= seg->l       << 21;
6087         flags |= seg->avl     << 20;
6088         flags |= seg->present << 15;
6089         flags |= seg->dpl     << 13;
6090         flags |= seg->s       << 12;
6091         flags |= seg->type    << 8;
6092         return flags;
6093 }
6094
6095 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6096 {
6097         struct kvm_segment seg;
6098         int offset;
6099
6100         kvm_get_segment(vcpu, &seg, n);
6101         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6102
6103         if (n < 3)
6104                 offset = 0x7f84 + n * 12;
6105         else
6106                 offset = 0x7f2c + (n - 3) * 12;
6107
6108         put_smstate(u32, buf, offset + 8, seg.base);
6109         put_smstate(u32, buf, offset + 4, seg.limit);
6110         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6111 }
6112
6113 #ifdef CONFIG_X86_64
6114 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6115 {
6116         struct kvm_segment seg;
6117         int offset;
6118         u16 flags;
6119
6120         kvm_get_segment(vcpu, &seg, n);
6121         offset = 0x7e00 + n * 16;
6122
6123         flags = process_smi_get_segment_flags(&seg) >> 8;
6124         put_smstate(u16, buf, offset, seg.selector);
6125         put_smstate(u16, buf, offset + 2, flags);
6126         put_smstate(u32, buf, offset + 4, seg.limit);
6127         put_smstate(u64, buf, offset + 8, seg.base);
6128 }
6129 #endif
6130
6131 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6132 {
6133         struct desc_ptr dt;
6134         struct kvm_segment seg;
6135         unsigned long val;
6136         int i;
6137
6138         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6139         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6140         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6141         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6142
6143         for (i = 0; i < 8; i++)
6144                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6145
6146         kvm_get_dr(vcpu, 6, &val);
6147         put_smstate(u32, buf, 0x7fcc, (u32)val);
6148         kvm_get_dr(vcpu, 7, &val);
6149         put_smstate(u32, buf, 0x7fc8, (u32)val);
6150
6151         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6152         put_smstate(u32, buf, 0x7fc4, seg.selector);
6153         put_smstate(u32, buf, 0x7f64, seg.base);
6154         put_smstate(u32, buf, 0x7f60, seg.limit);
6155         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6156
6157         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6158         put_smstate(u32, buf, 0x7fc0, seg.selector);
6159         put_smstate(u32, buf, 0x7f80, seg.base);
6160         put_smstate(u32, buf, 0x7f7c, seg.limit);
6161         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6162
6163         kvm_x86_ops->get_gdt(vcpu, &dt);
6164         put_smstate(u32, buf, 0x7f74, dt.address);
6165         put_smstate(u32, buf, 0x7f70, dt.size);
6166
6167         kvm_x86_ops->get_idt(vcpu, &dt);
6168         put_smstate(u32, buf, 0x7f58, dt.address);
6169         put_smstate(u32, buf, 0x7f54, dt.size);
6170
6171         for (i = 0; i < 6; i++)
6172                 process_smi_save_seg_32(vcpu, buf, i);
6173
6174         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6175
6176         /* revision id */
6177         put_smstate(u32, buf, 0x7efc, 0x00020000);
6178         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6179 }
6180
6181 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6182 {
6183 #ifdef CONFIG_X86_64
6184         struct desc_ptr dt;
6185         struct kvm_segment seg;
6186         unsigned long val;
6187         int i;
6188
6189         for (i = 0; i < 16; i++)
6190                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6191
6192         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6193         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6194
6195         kvm_get_dr(vcpu, 6, &val);
6196         put_smstate(u64, buf, 0x7f68, val);
6197         kvm_get_dr(vcpu, 7, &val);
6198         put_smstate(u64, buf, 0x7f60, val);
6199
6200         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6201         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6202         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6203
6204         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6205
6206         /* revision id */
6207         put_smstate(u32, buf, 0x7efc, 0x00020064);
6208
6209         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6210
6211         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6212         put_smstate(u16, buf, 0x7e90, seg.selector);
6213         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6214         put_smstate(u32, buf, 0x7e94, seg.limit);
6215         put_smstate(u64, buf, 0x7e98, seg.base);
6216
6217         kvm_x86_ops->get_idt(vcpu, &dt);
6218         put_smstate(u32, buf, 0x7e84, dt.size);
6219         put_smstate(u64, buf, 0x7e88, dt.address);
6220
6221         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6222         put_smstate(u16, buf, 0x7e70, seg.selector);
6223         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6224         put_smstate(u32, buf, 0x7e74, seg.limit);
6225         put_smstate(u64, buf, 0x7e78, seg.base);
6226
6227         kvm_x86_ops->get_gdt(vcpu, &dt);
6228         put_smstate(u32, buf, 0x7e64, dt.size);
6229         put_smstate(u64, buf, 0x7e68, dt.address);
6230
6231         for (i = 0; i < 6; i++)
6232                 process_smi_save_seg_64(vcpu, buf, i);
6233 #else
6234         WARN_ON_ONCE(1);
6235 #endif
6236 }
6237
6238 static void process_smi(struct kvm_vcpu *vcpu)
6239 {
6240         struct kvm_segment cs, ds;
6241         struct desc_ptr dt;
6242         char buf[512];
6243         u32 cr0;
6244
6245         if (is_smm(vcpu)) {
6246                 vcpu->arch.smi_pending = true;
6247                 return;
6248         }
6249
6250         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6251         vcpu->arch.hflags |= HF_SMM_MASK;
6252         memset(buf, 0, 512);
6253         if (guest_cpuid_has_longmode(vcpu))
6254                 process_smi_save_state_64(vcpu, buf);
6255         else
6256                 process_smi_save_state_32(vcpu, buf);
6257
6258         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6259
6260         if (kvm_x86_ops->get_nmi_mask(vcpu))
6261                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6262         else
6263                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6264
6265         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6266         kvm_rip_write(vcpu, 0x8000);
6267
6268         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6269         kvm_x86_ops->set_cr0(vcpu, cr0);
6270         vcpu->arch.cr0 = cr0;
6271
6272         kvm_x86_ops->set_cr4(vcpu, 0);
6273
6274         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6275         dt.address = dt.size = 0;
6276         kvm_x86_ops->set_idt(vcpu, &dt);
6277
6278         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6279
6280         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6281         cs.base = vcpu->arch.smbase;
6282
6283         ds.selector = 0;
6284         ds.base = 0;
6285
6286         cs.limit    = ds.limit = 0xffffffff;
6287         cs.type     = ds.type = 0x3;
6288         cs.dpl      = ds.dpl = 0;
6289         cs.db       = ds.db = 0;
6290         cs.s        = ds.s = 1;
6291         cs.l        = ds.l = 0;
6292         cs.g        = ds.g = 1;
6293         cs.avl      = ds.avl = 0;
6294         cs.present  = ds.present = 1;
6295         cs.unusable = ds.unusable = 0;
6296         cs.padding  = ds.padding = 0;
6297
6298         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6299         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6300         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6301         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6302         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6303         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6304
6305         if (guest_cpuid_has_longmode(vcpu))
6306                 kvm_x86_ops->set_efer(vcpu, 0);
6307
6308         kvm_update_cpuid(vcpu);
6309         kvm_mmu_reset_context(vcpu);
6310 }
6311
6312 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6313 {
6314         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6315                 return;
6316
6317         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6318
6319         if (irqchip_split(vcpu->kvm))
6320                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6321         else {
6322                 kvm_x86_ops->sync_pir_to_irr(vcpu);
6323                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6324         }
6325         kvm_x86_ops->load_eoi_exitmap(vcpu);
6326 }
6327
6328 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6329 {
6330         ++vcpu->stat.tlb_flush;
6331         kvm_x86_ops->tlb_flush(vcpu);
6332 }
6333
6334 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6335 {
6336         struct page *page = NULL;
6337
6338         if (!lapic_in_kernel(vcpu))
6339                 return;
6340
6341         if (!kvm_x86_ops->set_apic_access_page_addr)
6342                 return;
6343
6344         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6345         if (is_error_page(page))
6346                 return;
6347         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6348
6349         /*
6350          * Do not pin apic access page in memory, the MMU notifier
6351          * will call us again if it is migrated or swapped out.
6352          */
6353         put_page(page);
6354 }
6355 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6356
6357 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6358                                            unsigned long address)
6359 {
6360         /*
6361          * The physical address of apic access page is stored in the VMCS.
6362          * Update it when it becomes invalid.
6363          */
6364         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6365                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6366 }
6367
6368 /*
6369  * Returns 1 to let vcpu_run() continue the guest execution loop without
6370  * exiting to the userspace.  Otherwise, the value will be returned to the
6371  * userspace.
6372  */
6373 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6374 {
6375         int r;
6376         bool req_int_win =
6377                 dm_request_for_irq_injection(vcpu) &&
6378                 kvm_cpu_accept_dm_intr(vcpu);
6379
6380         bool req_immediate_exit = false;
6381
6382         if (vcpu->requests) {
6383                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6384                         kvm_mmu_unload(vcpu);
6385                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6386                         __kvm_migrate_timers(vcpu);
6387                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6388                         kvm_gen_update_masterclock(vcpu->kvm);
6389                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6390                         kvm_gen_kvmclock_update(vcpu);
6391                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6392                         r = kvm_guest_time_update(vcpu);
6393                         if (unlikely(r))
6394                                 goto out;
6395                 }
6396                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6397                         kvm_mmu_sync_roots(vcpu);
6398                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6399                         kvm_vcpu_flush_tlb(vcpu);
6400                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6401                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6402                         r = 0;
6403                         goto out;
6404                 }
6405                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6406                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6407                         r = 0;
6408                         goto out;
6409                 }
6410                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6411                         vcpu->fpu_active = 0;
6412                         kvm_x86_ops->fpu_deactivate(vcpu);
6413                 }
6414                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6415                         /* Page is swapped out. Do synthetic halt */
6416                         vcpu->arch.apf.halted = true;
6417                         r = 1;
6418                         goto out;
6419                 }
6420                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6421                         record_steal_time(vcpu);
6422                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6423                         process_smi(vcpu);
6424                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6425                         process_nmi(vcpu);
6426                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6427                         kvm_pmu_handle_event(vcpu);
6428                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6429                         kvm_pmu_deliver_pmi(vcpu);
6430                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6431                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6432                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6433                                      (void *) vcpu->arch.eoi_exit_bitmap)) {
6434                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6435                                 vcpu->run->eoi.vector =
6436                                                 vcpu->arch.pending_ioapic_eoi;
6437                                 r = 0;
6438                                 goto out;
6439                         }
6440                 }
6441                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6442                         vcpu_scan_ioapic(vcpu);
6443                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6444                         kvm_vcpu_reload_apic_access_page(vcpu);
6445                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6446                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6447                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6448                         r = 0;
6449                         goto out;
6450                 }
6451                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6452                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6453                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6454                         r = 0;
6455                         goto out;
6456                 }
6457         }
6458
6459         /*
6460          * KVM_REQ_EVENT is not set when posted interrupts are set by
6461          * VT-d hardware, so we have to update RVI unconditionally.
6462          */
6463         if (kvm_lapic_enabled(vcpu)) {
6464                 /*
6465                  * Update architecture specific hints for APIC
6466                  * virtual interrupt delivery.
6467                  */
6468                 if (kvm_x86_ops->hwapic_irr_update)
6469                         kvm_x86_ops->hwapic_irr_update(vcpu,
6470                                 kvm_lapic_find_highest_irr(vcpu));
6471         }
6472
6473         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6474                 kvm_apic_accept_events(vcpu);
6475                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6476                         r = 1;
6477                         goto out;
6478                 }
6479
6480                 if (inject_pending_event(vcpu, req_int_win) != 0)
6481                         req_immediate_exit = true;
6482                 /* enable NMI/IRQ window open exits if needed */
6483                 else if (vcpu->arch.nmi_pending)
6484                         kvm_x86_ops->enable_nmi_window(vcpu);
6485                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6486                         kvm_x86_ops->enable_irq_window(vcpu);
6487
6488                 if (kvm_lapic_enabled(vcpu)) {
6489                         update_cr8_intercept(vcpu);
6490                         kvm_lapic_sync_to_vapic(vcpu);
6491                 }
6492         }
6493
6494         r = kvm_mmu_reload(vcpu);
6495         if (unlikely(r)) {
6496                 goto cancel_injection;
6497         }
6498
6499         preempt_disable();
6500
6501         kvm_x86_ops->prepare_guest_switch(vcpu);
6502         if (vcpu->fpu_active)
6503                 kvm_load_guest_fpu(vcpu);
6504         kvm_load_guest_xcr0(vcpu);
6505
6506         vcpu->mode = IN_GUEST_MODE;
6507
6508         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6509
6510         /* We should set ->mode before check ->requests,
6511          * see the comment in make_all_cpus_request.
6512          */
6513         smp_mb__after_srcu_read_unlock();
6514
6515         local_irq_disable();
6516
6517         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6518             || need_resched() || signal_pending(current)) {
6519                 vcpu->mode = OUTSIDE_GUEST_MODE;
6520                 smp_wmb();
6521                 local_irq_enable();
6522                 preempt_enable();
6523                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6524                 r = 1;
6525                 goto cancel_injection;
6526         }
6527
6528         if (req_immediate_exit)
6529                 smp_send_reschedule(vcpu->cpu);
6530
6531         trace_kvm_entry(vcpu->vcpu_id);
6532         wait_lapic_expire(vcpu);
6533         __kvm_guest_enter();
6534
6535         if (unlikely(vcpu->arch.switch_db_regs)) {
6536                 set_debugreg(0, 7);
6537                 set_debugreg(vcpu->arch.eff_db[0], 0);
6538                 set_debugreg(vcpu->arch.eff_db[1], 1);
6539                 set_debugreg(vcpu->arch.eff_db[2], 2);
6540                 set_debugreg(vcpu->arch.eff_db[3], 3);
6541                 set_debugreg(vcpu->arch.dr6, 6);
6542                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6543         }
6544
6545         kvm_x86_ops->run(vcpu);
6546
6547         /*
6548          * Do this here before restoring debug registers on the host.  And
6549          * since we do this before handling the vmexit, a DR access vmexit
6550          * can (a) read the correct value of the debug registers, (b) set
6551          * KVM_DEBUGREG_WONT_EXIT again.
6552          */
6553         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6554                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6555                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6556                 kvm_update_dr0123(vcpu);
6557                 kvm_update_dr6(vcpu);
6558                 kvm_update_dr7(vcpu);
6559                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6560         }
6561
6562         /*
6563          * If the guest has used debug registers, at least dr7
6564          * will be disabled while returning to the host.
6565          * If we don't have active breakpoints in the host, we don't
6566          * care about the messed up debug address registers. But if
6567          * we have some of them active, restore the old state.
6568          */
6569         if (hw_breakpoint_active())
6570                 hw_breakpoint_restore();
6571
6572         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6573
6574         vcpu->mode = OUTSIDE_GUEST_MODE;
6575         smp_wmb();
6576
6577         /* Interrupt is enabled by handle_external_intr() */
6578         kvm_x86_ops->handle_external_intr(vcpu);
6579
6580         ++vcpu->stat.exits;
6581
6582         /*
6583          * We must have an instruction between local_irq_enable() and
6584          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6585          * the interrupt shadow.  The stat.exits increment will do nicely.
6586          * But we need to prevent reordering, hence this barrier():
6587          */
6588         barrier();
6589
6590         kvm_guest_exit();
6591
6592         preempt_enable();
6593
6594         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6595
6596         /*
6597          * Profile KVM exit RIPs:
6598          */
6599         if (unlikely(prof_on == KVM_PROFILING)) {
6600                 unsigned long rip = kvm_rip_read(vcpu);
6601                 profile_hit(KVM_PROFILING, (void *)rip);
6602         }
6603
6604         if (unlikely(vcpu->arch.tsc_always_catchup))
6605                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6606
6607         if (vcpu->arch.apic_attention)
6608                 kvm_lapic_sync_from_vapic(vcpu);
6609
6610         r = kvm_x86_ops->handle_exit(vcpu);
6611         return r;
6612
6613 cancel_injection:
6614         kvm_x86_ops->cancel_injection(vcpu);
6615         if (unlikely(vcpu->arch.apic_attention))
6616                 kvm_lapic_sync_from_vapic(vcpu);
6617 out:
6618         return r;
6619 }
6620
6621 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6622 {
6623         if (!kvm_arch_vcpu_runnable(vcpu) &&
6624             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6625                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6626                 kvm_vcpu_block(vcpu);
6627                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6628
6629                 if (kvm_x86_ops->post_block)
6630                         kvm_x86_ops->post_block(vcpu);
6631
6632                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6633                         return 1;
6634         }
6635
6636         kvm_apic_accept_events(vcpu);
6637         switch(vcpu->arch.mp_state) {
6638         case KVM_MP_STATE_HALTED:
6639                 vcpu->arch.pv.pv_unhalted = false;
6640                 vcpu->arch.mp_state =
6641                         KVM_MP_STATE_RUNNABLE;
6642         case KVM_MP_STATE_RUNNABLE:
6643                 vcpu->arch.apf.halted = false;
6644                 break;
6645         case KVM_MP_STATE_INIT_RECEIVED:
6646                 break;
6647         default:
6648                 return -EINTR;
6649                 break;
6650         }
6651         return 1;
6652 }
6653
6654 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6655 {
6656         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6657                 !vcpu->arch.apf.halted);
6658 }
6659
6660 static int vcpu_run(struct kvm_vcpu *vcpu)
6661 {
6662         int r;
6663         struct kvm *kvm = vcpu->kvm;
6664
6665         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6666
6667         for (;;) {
6668                 if (kvm_vcpu_running(vcpu)) {
6669                         r = vcpu_enter_guest(vcpu);
6670                 } else {
6671                         r = vcpu_block(kvm, vcpu);
6672                 }
6673
6674                 if (r <= 0)
6675                         break;
6676
6677                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6678                 if (kvm_cpu_has_pending_timer(vcpu))
6679                         kvm_inject_pending_timer_irqs(vcpu);
6680
6681                 if (dm_request_for_irq_injection(vcpu) &&
6682                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6683                         r = 0;
6684                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6685                         ++vcpu->stat.request_irq_exits;
6686                         break;
6687                 }
6688
6689                 kvm_check_async_pf_completion(vcpu);
6690
6691                 if (signal_pending(current)) {
6692                         r = -EINTR;
6693                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6694                         ++vcpu->stat.signal_exits;
6695                         break;
6696                 }
6697                 if (need_resched()) {
6698                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6699                         cond_resched();
6700                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6701                 }
6702         }
6703
6704         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6705
6706         return r;
6707 }
6708
6709 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6710 {
6711         int r;
6712         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6713         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6714         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6715         if (r != EMULATE_DONE)
6716                 return 0;
6717         return 1;
6718 }
6719
6720 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6721 {
6722         BUG_ON(!vcpu->arch.pio.count);
6723
6724         return complete_emulated_io(vcpu);
6725 }
6726
6727 /*
6728  * Implements the following, as a state machine:
6729  *
6730  * read:
6731  *   for each fragment
6732  *     for each mmio piece in the fragment
6733  *       write gpa, len
6734  *       exit
6735  *       copy data
6736  *   execute insn
6737  *
6738  * write:
6739  *   for each fragment
6740  *     for each mmio piece in the fragment
6741  *       write gpa, len
6742  *       copy data
6743  *       exit
6744  */
6745 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6746 {
6747         struct kvm_run *run = vcpu->run;
6748         struct kvm_mmio_fragment *frag;
6749         unsigned len;
6750
6751         BUG_ON(!vcpu->mmio_needed);
6752
6753         /* Complete previous fragment */
6754         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6755         len = min(8u, frag->len);
6756         if (!vcpu->mmio_is_write)
6757                 memcpy(frag->data, run->mmio.data, len);
6758
6759         if (frag->len <= 8) {
6760                 /* Switch to the next fragment. */
6761                 frag++;
6762                 vcpu->mmio_cur_fragment++;
6763         } else {
6764                 /* Go forward to the next mmio piece. */
6765                 frag->data += len;
6766                 frag->gpa += len;
6767                 frag->len -= len;
6768         }
6769
6770         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6771                 vcpu->mmio_needed = 0;
6772
6773                 /* FIXME: return into emulator if single-stepping.  */
6774                 if (vcpu->mmio_is_write)
6775                         return 1;
6776                 vcpu->mmio_read_completed = 1;
6777                 return complete_emulated_io(vcpu);
6778         }
6779
6780         run->exit_reason = KVM_EXIT_MMIO;
6781         run->mmio.phys_addr = frag->gpa;
6782         if (vcpu->mmio_is_write)
6783                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6784         run->mmio.len = min(8u, frag->len);
6785         run->mmio.is_write = vcpu->mmio_is_write;
6786         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6787         return 0;
6788 }
6789
6790
6791 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6792 {
6793         struct fpu *fpu = &current->thread.fpu;
6794         int r;
6795         sigset_t sigsaved;
6796
6797         fpu__activate_curr(fpu);
6798
6799         if (vcpu->sigset_active)
6800                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6801
6802         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6803                 kvm_vcpu_block(vcpu);
6804                 kvm_apic_accept_events(vcpu);
6805                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6806                 r = -EAGAIN;
6807                 goto out;
6808         }
6809
6810         /* re-sync apic's tpr */
6811         if (!lapic_in_kernel(vcpu)) {
6812                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6813                         r = -EINVAL;
6814                         goto out;
6815                 }
6816         }
6817
6818         if (unlikely(vcpu->arch.complete_userspace_io)) {
6819                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6820                 vcpu->arch.complete_userspace_io = NULL;
6821                 r = cui(vcpu);
6822                 if (r <= 0)
6823                         goto out;
6824         } else
6825                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6826
6827         r = vcpu_run(vcpu);
6828
6829 out:
6830         post_kvm_run_save(vcpu);
6831         if (vcpu->sigset_active)
6832                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6833
6834         return r;
6835 }
6836
6837 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6838 {
6839         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6840                 /*
6841                  * We are here if userspace calls get_regs() in the middle of
6842                  * instruction emulation. Registers state needs to be copied
6843                  * back from emulation context to vcpu. Userspace shouldn't do
6844                  * that usually, but some bad designed PV devices (vmware
6845                  * backdoor interface) need this to work
6846                  */
6847                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6848                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6849         }
6850         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6851         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6852         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6853         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6854         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6855         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6856         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6857         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6858 #ifdef CONFIG_X86_64
6859         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6860         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6861         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6862         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6863         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6864         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6865         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6866         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6867 #endif
6868
6869         regs->rip = kvm_rip_read(vcpu);
6870         regs->rflags = kvm_get_rflags(vcpu);
6871
6872         return 0;
6873 }
6874
6875 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6876 {
6877         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6878         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6879
6880         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6881         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6882         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6883         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6884         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6885         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6886         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6887         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6888 #ifdef CONFIG_X86_64
6889         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6890         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6891         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6892         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6893         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6894         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6895         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6896         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6897 #endif
6898
6899         kvm_rip_write(vcpu, regs->rip);
6900         kvm_set_rflags(vcpu, regs->rflags);
6901
6902         vcpu->arch.exception.pending = false;
6903
6904         kvm_make_request(KVM_REQ_EVENT, vcpu);
6905
6906         return 0;
6907 }
6908
6909 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6910 {
6911         struct kvm_segment cs;
6912
6913         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6914         *db = cs.db;
6915         *l = cs.l;
6916 }
6917 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6918
6919 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6920                                   struct kvm_sregs *sregs)
6921 {
6922         struct desc_ptr dt;
6923
6924         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6925         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6926         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6927         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6928         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6929         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6930
6931         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6932         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6933
6934         kvm_x86_ops->get_idt(vcpu, &dt);
6935         sregs->idt.limit = dt.size;
6936         sregs->idt.base = dt.address;
6937         kvm_x86_ops->get_gdt(vcpu, &dt);
6938         sregs->gdt.limit = dt.size;
6939         sregs->gdt.base = dt.address;
6940
6941         sregs->cr0 = kvm_read_cr0(vcpu);
6942         sregs->cr2 = vcpu->arch.cr2;
6943         sregs->cr3 = kvm_read_cr3(vcpu);
6944         sregs->cr4 = kvm_read_cr4(vcpu);
6945         sregs->cr8 = kvm_get_cr8(vcpu);
6946         sregs->efer = vcpu->arch.efer;
6947         sregs->apic_base = kvm_get_apic_base(vcpu);
6948
6949         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6950
6951         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6952                 set_bit(vcpu->arch.interrupt.nr,
6953                         (unsigned long *)sregs->interrupt_bitmap);
6954
6955         return 0;
6956 }
6957
6958 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6959                                     struct kvm_mp_state *mp_state)
6960 {
6961         kvm_apic_accept_events(vcpu);
6962         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6963                                         vcpu->arch.pv.pv_unhalted)
6964                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6965         else
6966                 mp_state->mp_state = vcpu->arch.mp_state;
6967
6968         return 0;
6969 }
6970
6971 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6972                                     struct kvm_mp_state *mp_state)
6973 {
6974         if (!kvm_vcpu_has_lapic(vcpu) &&
6975             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6976                 return -EINVAL;
6977
6978         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6979                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6980                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6981         } else
6982                 vcpu->arch.mp_state = mp_state->mp_state;
6983         kvm_make_request(KVM_REQ_EVENT, vcpu);
6984         return 0;
6985 }
6986
6987 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6988                     int reason, bool has_error_code, u32 error_code)
6989 {
6990         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6991         int ret;
6992
6993         init_emulate_ctxt(vcpu);
6994
6995         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6996                                    has_error_code, error_code);
6997
6998         if (ret)
6999                 return EMULATE_FAIL;
7000
7001         kvm_rip_write(vcpu, ctxt->eip);
7002         kvm_set_rflags(vcpu, ctxt->eflags);
7003         kvm_make_request(KVM_REQ_EVENT, vcpu);
7004         return EMULATE_DONE;
7005 }
7006 EXPORT_SYMBOL_GPL(kvm_task_switch);
7007
7008 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7009                                   struct kvm_sregs *sregs)
7010 {
7011         struct msr_data apic_base_msr;
7012         int mmu_reset_needed = 0;
7013         int pending_vec, max_bits, idx;
7014         struct desc_ptr dt;
7015
7016         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7017                 return -EINVAL;
7018
7019         dt.size = sregs->idt.limit;
7020         dt.address = sregs->idt.base;
7021         kvm_x86_ops->set_idt(vcpu, &dt);
7022         dt.size = sregs->gdt.limit;
7023         dt.address = sregs->gdt.base;
7024         kvm_x86_ops->set_gdt(vcpu, &dt);
7025
7026         vcpu->arch.cr2 = sregs->cr2;
7027         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7028         vcpu->arch.cr3 = sregs->cr3;
7029         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7030
7031         kvm_set_cr8(vcpu, sregs->cr8);
7032
7033         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7034         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7035         apic_base_msr.data = sregs->apic_base;
7036         apic_base_msr.host_initiated = true;
7037         kvm_set_apic_base(vcpu, &apic_base_msr);
7038
7039         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7040         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7041         vcpu->arch.cr0 = sregs->cr0;
7042
7043         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7044         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7045         if (sregs->cr4 & X86_CR4_OSXSAVE)
7046                 kvm_update_cpuid(vcpu);
7047
7048         idx = srcu_read_lock(&vcpu->kvm->srcu);
7049         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7050                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7051                 mmu_reset_needed = 1;
7052         }
7053         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7054
7055         if (mmu_reset_needed)
7056                 kvm_mmu_reset_context(vcpu);
7057
7058         max_bits = KVM_NR_INTERRUPTS;
7059         pending_vec = find_first_bit(
7060                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7061         if (pending_vec < max_bits) {
7062                 kvm_queue_interrupt(vcpu, pending_vec, false);
7063                 pr_debug("Set back pending irq %d\n", pending_vec);
7064         }
7065
7066         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7067         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7068         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7069         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7070         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7071         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7072
7073         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7074         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7075
7076         update_cr8_intercept(vcpu);
7077
7078         /* Older userspace won't unhalt the vcpu on reset. */
7079         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7080             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7081             !is_protmode(vcpu))
7082                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7083
7084         kvm_make_request(KVM_REQ_EVENT, vcpu);
7085
7086         return 0;
7087 }
7088
7089 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7090                                         struct kvm_guest_debug *dbg)
7091 {
7092         unsigned long rflags;
7093         int i, r;
7094
7095         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7096                 r = -EBUSY;
7097                 if (vcpu->arch.exception.pending)
7098                         goto out;
7099                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7100                         kvm_queue_exception(vcpu, DB_VECTOR);
7101                 else
7102                         kvm_queue_exception(vcpu, BP_VECTOR);
7103         }
7104
7105         /*
7106          * Read rflags as long as potentially injected trace flags are still
7107          * filtered out.
7108          */
7109         rflags = kvm_get_rflags(vcpu);
7110
7111         vcpu->guest_debug = dbg->control;
7112         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7113                 vcpu->guest_debug = 0;
7114
7115         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7116                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7117                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7118                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7119         } else {
7120                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7121                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7122         }
7123         kvm_update_dr7(vcpu);
7124
7125         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7126                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7127                         get_segment_base(vcpu, VCPU_SREG_CS);
7128
7129         /*
7130          * Trigger an rflags update that will inject or remove the trace
7131          * flags.
7132          */
7133         kvm_set_rflags(vcpu, rflags);
7134
7135         kvm_x86_ops->update_bp_intercept(vcpu);
7136
7137         r = 0;
7138
7139 out:
7140
7141         return r;
7142 }
7143
7144 /*
7145  * Translate a guest virtual address to a guest physical address.
7146  */
7147 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7148                                     struct kvm_translation *tr)
7149 {
7150         unsigned long vaddr = tr->linear_address;
7151         gpa_t gpa;
7152         int idx;
7153
7154         idx = srcu_read_lock(&vcpu->kvm->srcu);
7155         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7156         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7157         tr->physical_address = gpa;
7158         tr->valid = gpa != UNMAPPED_GVA;
7159         tr->writeable = 1;
7160         tr->usermode = 0;
7161
7162         return 0;
7163 }
7164
7165 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7166 {
7167         struct fxregs_state *fxsave =
7168                         &vcpu->arch.guest_fpu.state.fxsave;
7169
7170         memcpy(fpu->fpr, fxsave->st_space, 128);
7171         fpu->fcw = fxsave->cwd;
7172         fpu->fsw = fxsave->swd;
7173         fpu->ftwx = fxsave->twd;
7174         fpu->last_opcode = fxsave->fop;
7175         fpu->last_ip = fxsave->rip;
7176         fpu->last_dp = fxsave->rdp;
7177         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7178
7179         return 0;
7180 }
7181
7182 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7183 {
7184         struct fxregs_state *fxsave =
7185                         &vcpu->arch.guest_fpu.state.fxsave;
7186
7187         memcpy(fxsave->st_space, fpu->fpr, 128);
7188         fxsave->cwd = fpu->fcw;
7189         fxsave->swd = fpu->fsw;
7190         fxsave->twd = fpu->ftwx;
7191         fxsave->fop = fpu->last_opcode;
7192         fxsave->rip = fpu->last_ip;
7193         fxsave->rdp = fpu->last_dp;
7194         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7195
7196         return 0;
7197 }
7198
7199 static void fx_init(struct kvm_vcpu *vcpu)
7200 {
7201         fpstate_init(&vcpu->arch.guest_fpu.state);
7202         if (cpu_has_xsaves)
7203                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7204                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7205
7206         /*
7207          * Ensure guest xcr0 is valid for loading
7208          */
7209         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7210
7211         vcpu->arch.cr0 |= X86_CR0_ET;
7212 }
7213
7214 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7215 {
7216         if (vcpu->guest_fpu_loaded)
7217                 return;
7218
7219         /*
7220          * Restore all possible states in the guest,
7221          * and assume host would use all available bits.
7222          * Guest xcr0 would be loaded later.
7223          */
7224         kvm_put_guest_xcr0(vcpu);
7225         vcpu->guest_fpu_loaded = 1;
7226         __kernel_fpu_begin();
7227         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7228         trace_kvm_fpu(1);
7229 }
7230
7231 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7232 {
7233         kvm_put_guest_xcr0(vcpu);
7234
7235         if (!vcpu->guest_fpu_loaded) {
7236                 vcpu->fpu_counter = 0;
7237                 return;
7238         }
7239
7240         vcpu->guest_fpu_loaded = 0;
7241         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7242         __kernel_fpu_end();
7243         ++vcpu->stat.fpu_reload;
7244         /*
7245          * If using eager FPU mode, or if the guest is a frequent user
7246          * of the FPU, just leave the FPU active for next time.
7247          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7248          * the FPU in bursts will revert to loading it on demand.
7249          */
7250         if (!vcpu->arch.eager_fpu) {
7251                 if (++vcpu->fpu_counter < 5)
7252                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7253         }
7254         trace_kvm_fpu(0);
7255 }
7256
7257 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7258 {
7259         kvmclock_reset(vcpu);
7260
7261         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7262         kvm_x86_ops->vcpu_free(vcpu);
7263 }
7264
7265 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7266                                                 unsigned int id)
7267 {
7268         struct kvm_vcpu *vcpu;
7269
7270         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7271                 printk_once(KERN_WARNING
7272                 "kvm: SMP vm created on host with unstable TSC; "
7273                 "guest TSC will not be reliable\n");
7274
7275         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7276
7277         return vcpu;
7278 }
7279
7280 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7281 {
7282         int r;
7283
7284         kvm_vcpu_mtrr_init(vcpu);
7285         r = vcpu_load(vcpu);
7286         if (r)
7287                 return r;
7288         kvm_vcpu_reset(vcpu, false);
7289         kvm_mmu_setup(vcpu);
7290         vcpu_put(vcpu);
7291         return r;
7292 }
7293
7294 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7295 {
7296         struct msr_data msr;
7297         struct kvm *kvm = vcpu->kvm;
7298
7299         if (vcpu_load(vcpu))
7300                 return;
7301         msr.data = 0x0;
7302         msr.index = MSR_IA32_TSC;
7303         msr.host_initiated = true;
7304         kvm_write_tsc(vcpu, &msr);
7305         vcpu_put(vcpu);
7306
7307         if (!kvmclock_periodic_sync)
7308                 return;
7309
7310         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7311                                         KVMCLOCK_SYNC_PERIOD);
7312 }
7313
7314 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7315 {
7316         int r;
7317         vcpu->arch.apf.msr_val = 0;
7318
7319         r = vcpu_load(vcpu);
7320         BUG_ON(r);
7321         kvm_mmu_unload(vcpu);
7322         vcpu_put(vcpu);
7323
7324         kvm_x86_ops->vcpu_free(vcpu);
7325 }
7326
7327 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7328 {
7329         vcpu->arch.hflags = 0;
7330
7331         atomic_set(&vcpu->arch.nmi_queued, 0);
7332         vcpu->arch.nmi_pending = 0;
7333         vcpu->arch.nmi_injected = false;
7334         kvm_clear_interrupt_queue(vcpu);
7335         kvm_clear_exception_queue(vcpu);
7336
7337         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7338         kvm_update_dr0123(vcpu);
7339         vcpu->arch.dr6 = DR6_INIT;
7340         kvm_update_dr6(vcpu);
7341         vcpu->arch.dr7 = DR7_FIXED_1;
7342         kvm_update_dr7(vcpu);
7343
7344         vcpu->arch.cr2 = 0;
7345
7346         kvm_make_request(KVM_REQ_EVENT, vcpu);
7347         vcpu->arch.apf.msr_val = 0;
7348         vcpu->arch.st.msr_val = 0;
7349
7350         kvmclock_reset(vcpu);
7351
7352         kvm_clear_async_pf_completion_queue(vcpu);
7353         kvm_async_pf_hash_reset(vcpu);
7354         vcpu->arch.apf.halted = false;
7355
7356         if (!init_event) {
7357                 kvm_pmu_reset(vcpu);
7358                 vcpu->arch.smbase = 0x30000;
7359         }
7360
7361         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7362         vcpu->arch.regs_avail = ~0;
7363         vcpu->arch.regs_dirty = ~0;
7364
7365         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7366 }
7367
7368 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7369 {
7370         struct kvm_segment cs;
7371
7372         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7373         cs.selector = vector << 8;
7374         cs.base = vector << 12;
7375         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7376         kvm_rip_write(vcpu, 0);
7377 }
7378
7379 int kvm_arch_hardware_enable(void)
7380 {
7381         struct kvm *kvm;
7382         struct kvm_vcpu *vcpu;
7383         int i;
7384         int ret;
7385         u64 local_tsc;
7386         u64 max_tsc = 0;
7387         bool stable, backwards_tsc = false;
7388
7389         kvm_shared_msr_cpu_online();
7390         ret = kvm_x86_ops->hardware_enable();
7391         if (ret != 0)
7392                 return ret;
7393
7394         local_tsc = rdtsc();
7395         stable = !check_tsc_unstable();
7396         list_for_each_entry(kvm, &vm_list, vm_list) {
7397                 kvm_for_each_vcpu(i, vcpu, kvm) {
7398                         if (!stable && vcpu->cpu == smp_processor_id())
7399                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7400                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7401                                 backwards_tsc = true;
7402                                 if (vcpu->arch.last_host_tsc > max_tsc)
7403                                         max_tsc = vcpu->arch.last_host_tsc;
7404                         }
7405                 }
7406         }
7407
7408         /*
7409          * Sometimes, even reliable TSCs go backwards.  This happens on
7410          * platforms that reset TSC during suspend or hibernate actions, but
7411          * maintain synchronization.  We must compensate.  Fortunately, we can
7412          * detect that condition here, which happens early in CPU bringup,
7413          * before any KVM threads can be running.  Unfortunately, we can't
7414          * bring the TSCs fully up to date with real time, as we aren't yet far
7415          * enough into CPU bringup that we know how much real time has actually
7416          * elapsed; our helper function, get_kernel_ns() will be using boot
7417          * variables that haven't been updated yet.
7418          *
7419          * So we simply find the maximum observed TSC above, then record the
7420          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7421          * the adjustment will be applied.  Note that we accumulate
7422          * adjustments, in case multiple suspend cycles happen before some VCPU
7423          * gets a chance to run again.  In the event that no KVM threads get a
7424          * chance to run, we will miss the entire elapsed period, as we'll have
7425          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7426          * loose cycle time.  This isn't too big a deal, since the loss will be
7427          * uniform across all VCPUs (not to mention the scenario is extremely
7428          * unlikely). It is possible that a second hibernate recovery happens
7429          * much faster than a first, causing the observed TSC here to be
7430          * smaller; this would require additional padding adjustment, which is
7431          * why we set last_host_tsc to the local tsc observed here.
7432          *
7433          * N.B. - this code below runs only on platforms with reliable TSC,
7434          * as that is the only way backwards_tsc is set above.  Also note
7435          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7436          * have the same delta_cyc adjustment applied if backwards_tsc
7437          * is detected.  Note further, this adjustment is only done once,
7438          * as we reset last_host_tsc on all VCPUs to stop this from being
7439          * called multiple times (one for each physical CPU bringup).
7440          *
7441          * Platforms with unreliable TSCs don't have to deal with this, they
7442          * will be compensated by the logic in vcpu_load, which sets the TSC to
7443          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7444          * guarantee that they stay in perfect synchronization.
7445          */
7446         if (backwards_tsc) {
7447                 u64 delta_cyc = max_tsc - local_tsc;
7448                 backwards_tsc_observed = true;
7449                 list_for_each_entry(kvm, &vm_list, vm_list) {
7450                         kvm_for_each_vcpu(i, vcpu, kvm) {
7451                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7452                                 vcpu->arch.last_host_tsc = local_tsc;
7453                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7454                         }
7455
7456                         /*
7457                          * We have to disable TSC offset matching.. if you were
7458                          * booting a VM while issuing an S4 host suspend....
7459                          * you may have some problem.  Solving this issue is
7460                          * left as an exercise to the reader.
7461                          */
7462                         kvm->arch.last_tsc_nsec = 0;
7463                         kvm->arch.last_tsc_write = 0;
7464                 }
7465
7466         }
7467         return 0;
7468 }
7469
7470 void kvm_arch_hardware_disable(void)
7471 {
7472         kvm_x86_ops->hardware_disable();
7473         drop_user_return_notifiers();
7474 }
7475
7476 int kvm_arch_hardware_setup(void)
7477 {
7478         int r;
7479
7480         r = kvm_x86_ops->hardware_setup();
7481         if (r != 0)
7482                 return r;
7483
7484         if (kvm_has_tsc_control) {
7485                 /*
7486                  * Make sure the user can only configure tsc_khz values that
7487                  * fit into a signed integer.
7488                  * A min value is not calculated needed because it will always
7489                  * be 1 on all machines.
7490                  */
7491                 u64 max = min(0x7fffffffULL,
7492                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7493                 kvm_max_guest_tsc_khz = max;
7494
7495                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7496         }
7497
7498         kvm_init_msr_list();
7499         return 0;
7500 }
7501
7502 void kvm_arch_hardware_unsetup(void)
7503 {
7504         kvm_x86_ops->hardware_unsetup();
7505 }
7506
7507 void kvm_arch_check_processor_compat(void *rtn)
7508 {
7509         kvm_x86_ops->check_processor_compatibility(rtn);
7510 }
7511
7512 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7513 {
7514         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7515 }
7516 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7517
7518 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7519 {
7520         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7521 }
7522
7523 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7524 {
7525         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7526 }
7527
7528 struct static_key kvm_no_apic_vcpu __read_mostly;
7529
7530 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7531 {
7532         struct page *page;
7533         struct kvm *kvm;
7534         int r;
7535
7536         BUG_ON(vcpu->kvm == NULL);
7537         kvm = vcpu->kvm;
7538
7539         vcpu->arch.pv.pv_unhalted = false;
7540         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7541         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7542                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7543         else
7544                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7545
7546         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7547         if (!page) {
7548                 r = -ENOMEM;
7549                 goto fail;
7550         }
7551         vcpu->arch.pio_data = page_address(page);
7552
7553         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7554
7555         r = kvm_mmu_create(vcpu);
7556         if (r < 0)
7557                 goto fail_free_pio_data;
7558
7559         if (irqchip_in_kernel(kvm)) {
7560                 r = kvm_create_lapic(vcpu);
7561                 if (r < 0)
7562                         goto fail_mmu_destroy;
7563         } else
7564                 static_key_slow_inc(&kvm_no_apic_vcpu);
7565
7566         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7567                                        GFP_KERNEL);
7568         if (!vcpu->arch.mce_banks) {
7569                 r = -ENOMEM;
7570                 goto fail_free_lapic;
7571         }
7572         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7573
7574         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7575                 r = -ENOMEM;
7576                 goto fail_free_mce_banks;
7577         }
7578
7579         fx_init(vcpu);
7580
7581         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7582         vcpu->arch.pv_time_enabled = false;
7583
7584         vcpu->arch.guest_supported_xcr0 = 0;
7585         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7586
7587         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7588
7589         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7590
7591         kvm_async_pf_hash_reset(vcpu);
7592         kvm_pmu_init(vcpu);
7593
7594         vcpu->arch.pending_external_vector = -1;
7595
7596         return 0;
7597
7598 fail_free_mce_banks:
7599         kfree(vcpu->arch.mce_banks);
7600 fail_free_lapic:
7601         kvm_free_lapic(vcpu);
7602 fail_mmu_destroy:
7603         kvm_mmu_destroy(vcpu);
7604 fail_free_pio_data:
7605         free_page((unsigned long)vcpu->arch.pio_data);
7606 fail:
7607         return r;
7608 }
7609
7610 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7611 {
7612         int idx;
7613
7614         kvm_pmu_destroy(vcpu);
7615         kfree(vcpu->arch.mce_banks);
7616         kvm_free_lapic(vcpu);
7617         idx = srcu_read_lock(&vcpu->kvm->srcu);
7618         kvm_mmu_destroy(vcpu);
7619         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7620         free_page((unsigned long)vcpu->arch.pio_data);
7621         if (!lapic_in_kernel(vcpu))
7622                 static_key_slow_dec(&kvm_no_apic_vcpu);
7623 }
7624
7625 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7626 {
7627         kvm_x86_ops->sched_in(vcpu, cpu);
7628 }
7629
7630 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7631 {
7632         if (type)
7633                 return -EINVAL;
7634
7635         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7636         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7637         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7638         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7639         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7640
7641         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7642         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7643         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7644         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7645                 &kvm->arch.irq_sources_bitmap);
7646
7647         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7648         mutex_init(&kvm->arch.apic_map_lock);
7649         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7650
7651         pvclock_update_vm_gtod_copy(kvm);
7652
7653         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7654         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7655
7656         return 0;
7657 }
7658
7659 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7660 {
7661         int r;
7662         r = vcpu_load(vcpu);
7663         BUG_ON(r);
7664         kvm_mmu_unload(vcpu);
7665         vcpu_put(vcpu);
7666 }
7667
7668 static void kvm_free_vcpus(struct kvm *kvm)
7669 {
7670         unsigned int i;
7671         struct kvm_vcpu *vcpu;
7672
7673         /*
7674          * Unpin any mmu pages first.
7675          */
7676         kvm_for_each_vcpu(i, vcpu, kvm) {
7677                 kvm_clear_async_pf_completion_queue(vcpu);
7678                 kvm_unload_vcpu_mmu(vcpu);
7679         }
7680         kvm_for_each_vcpu(i, vcpu, kvm)
7681                 kvm_arch_vcpu_free(vcpu);
7682
7683         mutex_lock(&kvm->lock);
7684         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7685                 kvm->vcpus[i] = NULL;
7686
7687         atomic_set(&kvm->online_vcpus, 0);
7688         mutex_unlock(&kvm->lock);
7689 }
7690
7691 void kvm_arch_sync_events(struct kvm *kvm)
7692 {
7693         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7694         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7695         kvm_free_all_assigned_devices(kvm);
7696         kvm_free_pit(kvm);
7697 }
7698
7699 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7700 {
7701         int i, r;
7702         unsigned long hva;
7703         struct kvm_memslots *slots = kvm_memslots(kvm);
7704         struct kvm_memory_slot *slot, old;
7705
7706         /* Called with kvm->slots_lock held.  */
7707         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7708                 return -EINVAL;
7709
7710         slot = id_to_memslot(slots, id);
7711         if (size) {
7712                 if (WARN_ON(slot->npages))
7713                         return -EEXIST;
7714
7715                 /*
7716                  * MAP_SHARED to prevent internal slot pages from being moved
7717                  * by fork()/COW.
7718                  */
7719                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7720                               MAP_SHARED | MAP_ANONYMOUS, 0);
7721                 if (IS_ERR((void *)hva))
7722                         return PTR_ERR((void *)hva);
7723         } else {
7724                 if (!slot->npages)
7725                         return 0;
7726
7727                 hva = 0;
7728         }
7729
7730         old = *slot;
7731         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7732                 struct kvm_userspace_memory_region m;
7733
7734                 m.slot = id | (i << 16);
7735                 m.flags = 0;
7736                 m.guest_phys_addr = gpa;
7737                 m.userspace_addr = hva;
7738                 m.memory_size = size;
7739                 r = __kvm_set_memory_region(kvm, &m);
7740                 if (r < 0)
7741                         return r;
7742         }
7743
7744         if (!size) {
7745                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7746                 WARN_ON(r < 0);
7747         }
7748
7749         return 0;
7750 }
7751 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7752
7753 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7754 {
7755         int r;
7756
7757         mutex_lock(&kvm->slots_lock);
7758         r = __x86_set_memory_region(kvm, id, gpa, size);
7759         mutex_unlock(&kvm->slots_lock);
7760
7761         return r;
7762 }
7763 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7764
7765 void kvm_arch_destroy_vm(struct kvm *kvm)
7766 {
7767         if (current->mm == kvm->mm) {
7768                 /*
7769                  * Free memory regions allocated on behalf of userspace,
7770                  * unless the the memory map has changed due to process exit
7771                  * or fd copying.
7772                  */
7773                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7774                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7775                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7776         }
7777         kvm_iommu_unmap_guest(kvm);
7778         kfree(kvm->arch.vpic);
7779         kfree(kvm->arch.vioapic);
7780         kvm_free_vcpus(kvm);
7781         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7782 }
7783
7784 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7785                            struct kvm_memory_slot *dont)
7786 {
7787         int i;
7788
7789         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7790                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7791                         kvfree(free->arch.rmap[i]);
7792                         free->arch.rmap[i] = NULL;
7793                 }
7794                 if (i == 0)
7795                         continue;
7796
7797                 if (!dont || free->arch.lpage_info[i - 1] !=
7798                              dont->arch.lpage_info[i - 1]) {
7799                         kvfree(free->arch.lpage_info[i - 1]);
7800                         free->arch.lpage_info[i - 1] = NULL;
7801                 }
7802         }
7803 }
7804
7805 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7806                             unsigned long npages)
7807 {
7808         int i;
7809
7810         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7811                 unsigned long ugfn;
7812                 int lpages;
7813                 int level = i + 1;
7814
7815                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7816                                       slot->base_gfn, level) + 1;
7817
7818                 slot->arch.rmap[i] =
7819                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7820                 if (!slot->arch.rmap[i])
7821                         goto out_free;
7822                 if (i == 0)
7823                         continue;
7824
7825                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7826                                         sizeof(*slot->arch.lpage_info[i - 1]));
7827                 if (!slot->arch.lpage_info[i - 1])
7828                         goto out_free;
7829
7830                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7831                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7832                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7833                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7834                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7835                 /*
7836                  * If the gfn and userspace address are not aligned wrt each
7837                  * other, or if explicitly asked to, disable large page
7838                  * support for this slot
7839                  */
7840                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7841                     !kvm_largepages_enabled()) {
7842                         unsigned long j;
7843
7844                         for (j = 0; j < lpages; ++j)
7845                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7846                 }
7847         }
7848
7849         return 0;
7850
7851 out_free:
7852         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7853                 kvfree(slot->arch.rmap[i]);
7854                 slot->arch.rmap[i] = NULL;
7855                 if (i == 0)
7856                         continue;
7857
7858                 kvfree(slot->arch.lpage_info[i - 1]);
7859                 slot->arch.lpage_info[i - 1] = NULL;
7860         }
7861         return -ENOMEM;
7862 }
7863
7864 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7865 {
7866         /*
7867          * memslots->generation has been incremented.
7868          * mmio generation may have reached its maximum value.
7869          */
7870         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7871 }
7872
7873 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7874                                 struct kvm_memory_slot *memslot,
7875                                 const struct kvm_userspace_memory_region *mem,
7876                                 enum kvm_mr_change change)
7877 {
7878         return 0;
7879 }
7880
7881 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7882                                      struct kvm_memory_slot *new)
7883 {
7884         /* Still write protect RO slot */
7885         if (new->flags & KVM_MEM_READONLY) {
7886                 kvm_mmu_slot_remove_write_access(kvm, new);
7887                 return;
7888         }
7889
7890         /*
7891          * Call kvm_x86_ops dirty logging hooks when they are valid.
7892          *
7893          * kvm_x86_ops->slot_disable_log_dirty is called when:
7894          *
7895          *  - KVM_MR_CREATE with dirty logging is disabled
7896          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7897          *
7898          * The reason is, in case of PML, we need to set D-bit for any slots
7899          * with dirty logging disabled in order to eliminate unnecessary GPA
7900          * logging in PML buffer (and potential PML buffer full VMEXT). This
7901          * guarantees leaving PML enabled during guest's lifetime won't have
7902          * any additonal overhead from PML when guest is running with dirty
7903          * logging disabled for memory slots.
7904          *
7905          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7906          * to dirty logging mode.
7907          *
7908          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7909          *
7910          * In case of write protect:
7911          *
7912          * Write protect all pages for dirty logging.
7913          *
7914          * All the sptes including the large sptes which point to this
7915          * slot are set to readonly. We can not create any new large
7916          * spte on this slot until the end of the logging.
7917          *
7918          * See the comments in fast_page_fault().
7919          */
7920         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7921                 if (kvm_x86_ops->slot_enable_log_dirty)
7922                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7923                 else
7924                         kvm_mmu_slot_remove_write_access(kvm, new);
7925         } else {
7926                 if (kvm_x86_ops->slot_disable_log_dirty)
7927                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7928         }
7929 }
7930
7931 void kvm_arch_commit_memory_region(struct kvm *kvm,
7932                                 const struct kvm_userspace_memory_region *mem,
7933                                 const struct kvm_memory_slot *old,
7934                                 const struct kvm_memory_slot *new,
7935                                 enum kvm_mr_change change)
7936 {
7937         int nr_mmu_pages = 0;
7938
7939         if (!kvm->arch.n_requested_mmu_pages)
7940                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7941
7942         if (nr_mmu_pages)
7943                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7944
7945         /*
7946          * Dirty logging tracks sptes in 4k granularity, meaning that large
7947          * sptes have to be split.  If live migration is successful, the guest
7948          * in the source machine will be destroyed and large sptes will be
7949          * created in the destination. However, if the guest continues to run
7950          * in the source machine (for example if live migration fails), small
7951          * sptes will remain around and cause bad performance.
7952          *
7953          * Scan sptes if dirty logging has been stopped, dropping those
7954          * which can be collapsed into a single large-page spte.  Later
7955          * page faults will create the large-page sptes.
7956          */
7957         if ((change != KVM_MR_DELETE) &&
7958                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7959                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7960                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7961
7962         /*
7963          * Set up write protection and/or dirty logging for the new slot.
7964          *
7965          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7966          * been zapped so no dirty logging staff is needed for old slot. For
7967          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7968          * new and it's also covered when dealing with the new slot.
7969          *
7970          * FIXME: const-ify all uses of struct kvm_memory_slot.
7971          */
7972         if (change != KVM_MR_DELETE)
7973                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7974 }
7975
7976 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7977 {
7978         kvm_mmu_invalidate_zap_all_pages(kvm);
7979 }
7980
7981 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7982                                    struct kvm_memory_slot *slot)
7983 {
7984         kvm_mmu_invalidate_zap_all_pages(kvm);
7985 }
7986
7987 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
7988 {
7989         if (!list_empty_careful(&vcpu->async_pf.done))
7990                 return true;
7991
7992         if (kvm_apic_has_events(vcpu))
7993                 return true;
7994
7995         if (vcpu->arch.pv.pv_unhalted)
7996                 return true;
7997
7998         if (atomic_read(&vcpu->arch.nmi_queued))
7999                 return true;
8000
8001         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8002                 return true;
8003
8004         if (kvm_arch_interrupt_allowed(vcpu) &&
8005             kvm_cpu_has_interrupt(vcpu))
8006                 return true;
8007
8008         return false;
8009 }
8010
8011 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8012 {
8013         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8014                 kvm_x86_ops->check_nested_events(vcpu, false);
8015
8016         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8017 }
8018
8019 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8020 {
8021         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8022 }
8023
8024 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8025 {
8026         return kvm_x86_ops->interrupt_allowed(vcpu);
8027 }
8028
8029 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8030 {
8031         if (is_64_bit_mode(vcpu))
8032                 return kvm_rip_read(vcpu);
8033         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8034                      kvm_rip_read(vcpu));
8035 }
8036 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8037
8038 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8039 {
8040         return kvm_get_linear_rip(vcpu) == linear_rip;
8041 }
8042 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8043
8044 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8045 {
8046         unsigned long rflags;
8047
8048         rflags = kvm_x86_ops->get_rflags(vcpu);
8049         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8050                 rflags &= ~X86_EFLAGS_TF;
8051         return rflags;
8052 }
8053 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8054
8055 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8056 {
8057         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8058             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8059                 rflags |= X86_EFLAGS_TF;
8060         kvm_x86_ops->set_rflags(vcpu, rflags);
8061 }
8062
8063 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8064 {
8065         __kvm_set_rflags(vcpu, rflags);
8066         kvm_make_request(KVM_REQ_EVENT, vcpu);
8067 }
8068 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8069
8070 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8071 {
8072         int r;
8073
8074         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8075               work->wakeup_all)
8076                 return;
8077
8078         r = kvm_mmu_reload(vcpu);
8079         if (unlikely(r))
8080                 return;
8081
8082         if (!vcpu->arch.mmu.direct_map &&
8083               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8084                 return;
8085
8086         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8087 }
8088
8089 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8090 {
8091         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8092 }
8093
8094 static inline u32 kvm_async_pf_next_probe(u32 key)
8095 {
8096         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8097 }
8098
8099 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8100 {
8101         u32 key = kvm_async_pf_hash_fn(gfn);
8102
8103         while (vcpu->arch.apf.gfns[key] != ~0)
8104                 key = kvm_async_pf_next_probe(key);
8105
8106         vcpu->arch.apf.gfns[key] = gfn;
8107 }
8108
8109 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8110 {
8111         int i;
8112         u32 key = kvm_async_pf_hash_fn(gfn);
8113
8114         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8115                      (vcpu->arch.apf.gfns[key] != gfn &&
8116                       vcpu->arch.apf.gfns[key] != ~0); i++)
8117                 key = kvm_async_pf_next_probe(key);
8118
8119         return key;
8120 }
8121
8122 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8123 {
8124         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8125 }
8126
8127 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8128 {
8129         u32 i, j, k;
8130
8131         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8132         while (true) {
8133                 vcpu->arch.apf.gfns[i] = ~0;
8134                 do {
8135                         j = kvm_async_pf_next_probe(j);
8136                         if (vcpu->arch.apf.gfns[j] == ~0)
8137                                 return;
8138                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8139                         /*
8140                          * k lies cyclically in ]i,j]
8141                          * |    i.k.j |
8142                          * |....j i.k.| or  |.k..j i...|
8143                          */
8144                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8145                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8146                 i = j;
8147         }
8148 }
8149
8150 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8151 {
8152
8153         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8154                                       sizeof(val));
8155 }
8156
8157 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8158                                      struct kvm_async_pf *work)
8159 {
8160         struct x86_exception fault;
8161
8162         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8163         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8164
8165         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8166             (vcpu->arch.apf.send_user_only &&
8167              kvm_x86_ops->get_cpl(vcpu) == 0))
8168                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8169         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8170                 fault.vector = PF_VECTOR;
8171                 fault.error_code_valid = true;
8172                 fault.error_code = 0;
8173                 fault.nested_page_fault = false;
8174                 fault.address = work->arch.token;
8175                 kvm_inject_page_fault(vcpu, &fault);
8176         }
8177 }
8178
8179 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8180                                  struct kvm_async_pf *work)
8181 {
8182         struct x86_exception fault;
8183
8184         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8185         if (work->wakeup_all)
8186                 work->arch.token = ~0; /* broadcast wakeup */
8187         else
8188                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8189
8190         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8191             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8192                 fault.vector = PF_VECTOR;
8193                 fault.error_code_valid = true;
8194                 fault.error_code = 0;
8195                 fault.nested_page_fault = false;
8196                 fault.address = work->arch.token;
8197                 kvm_inject_page_fault(vcpu, &fault);
8198         }
8199         vcpu->arch.apf.halted = false;
8200         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8201 }
8202
8203 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8204 {
8205         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8206                 return true;
8207         else
8208                 return !kvm_event_needs_reinjection(vcpu) &&
8209                         kvm_x86_ops->interrupt_allowed(vcpu);
8210 }
8211
8212 void kvm_arch_start_assignment(struct kvm *kvm)
8213 {
8214         atomic_inc(&kvm->arch.assigned_device_count);
8215 }
8216 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8217
8218 void kvm_arch_end_assignment(struct kvm *kvm)
8219 {
8220         atomic_dec(&kvm->arch.assigned_device_count);
8221 }
8222 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8223
8224 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8225 {
8226         return atomic_read(&kvm->arch.assigned_device_count);
8227 }
8228 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8229
8230 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8231 {
8232         atomic_inc(&kvm->arch.noncoherent_dma_count);
8233 }
8234 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8235
8236 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8237 {
8238         atomic_dec(&kvm->arch.noncoherent_dma_count);
8239 }
8240 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8241
8242 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8243 {
8244         return atomic_read(&kvm->arch.noncoherent_dma_count);
8245 }
8246 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8247
8248 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8249                                       struct irq_bypass_producer *prod)
8250 {
8251         struct kvm_kernel_irqfd *irqfd =
8252                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8253
8254         if (kvm_x86_ops->update_pi_irte) {
8255                 irqfd->producer = prod;
8256                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8257                                 prod->irq, irqfd->gsi, 1);
8258         }
8259
8260         return -EINVAL;
8261 }
8262
8263 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8264                                       struct irq_bypass_producer *prod)
8265 {
8266         int ret;
8267         struct kvm_kernel_irqfd *irqfd =
8268                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8269
8270         if (!kvm_x86_ops->update_pi_irte) {
8271                 WARN_ON(irqfd->producer != NULL);
8272                 return;
8273         }
8274
8275         WARN_ON(irqfd->producer != prod);
8276         irqfd->producer = NULL;
8277
8278         /*
8279          * When producer of consumer is unregistered, we change back to
8280          * remapped mode, so we can re-use the current implementation
8281          * when the irq is masked/disabed or the consumer side (KVM
8282          * int this case doesn't want to receive the interrupts.
8283         */
8284         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8285         if (ret)
8286                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8287                        " fails: %d\n", irqfd->consumer.token, ret);
8288 }
8289
8290 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8291                                    uint32_t guest_irq, bool set)
8292 {
8293         if (!kvm_x86_ops->update_pi_irte)
8294                 return -EINVAL;
8295
8296         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8297 }
8298
8299 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8300 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8301 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8302 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8303 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8304 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8305 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8306 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8307 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8309 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8310 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8311 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8312 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8313 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8314 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8315 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);