2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11 #include <linux/slab.h>
13 #include <asm/sigcontext.h>
14 #include <asm/processor.h>
15 #include <asm/math_emu.h>
16 #include <asm/tlbflush.h>
17 #include <asm/uaccess.h>
18 #include <asm/ptrace.h>
20 #include <asm/fpu-internal.h>
23 static DEFINE_PER_CPU(bool, in_kernel_fpu);
25 void kernel_fpu_disable(void)
27 WARN_ON(this_cpu_read(in_kernel_fpu));
28 this_cpu_write(in_kernel_fpu, true);
31 void kernel_fpu_enable(void)
33 this_cpu_write(in_kernel_fpu, false);
37 * Were we in an interrupt that interrupted kernel mode?
39 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
40 * pair does nothing at all: the thread must not have fpu (so
41 * that we don't try to save the FPU state), and TS must
42 * be set (so that the clts/stts pair does nothing that is
43 * visible in the interrupted kernel thread).
45 * Except for the eagerfpu case when we return true; in the likely case
46 * the thread has FPU but we are not going to set/clear TS.
48 static inline bool interrupted_kernel_fpu_idle(void)
50 if (this_cpu_read(in_kernel_fpu))
56 return !__thread_has_fpu(current) &&
57 (read_cr0() & X86_CR0_TS);
61 * Were we in user mode (or vm86 mode) when we were
64 * Doing kernel_fpu_begin/end() is ok if we are running
65 * in an interrupt context from user mode - we'll just
66 * save the FPU state as required.
68 static inline bool interrupted_user_mode(void)
70 struct pt_regs *regs = get_irq_regs();
71 return regs && user_mode(regs);
75 * Can we use the FPU in kernel mode with the
76 * whole "kernel_fpu_begin/end()" sequence?
78 * It's always ok in process context (ie "not interrupt")
79 * but it is sometimes ok even from an irq.
81 bool irq_fpu_usable(void)
83 return !in_interrupt() ||
84 interrupted_user_mode() ||
85 interrupted_kernel_fpu_idle();
87 EXPORT_SYMBOL(irq_fpu_usable);
89 void __kernel_fpu_begin(void)
91 struct task_struct *me = current;
93 this_cpu_write(in_kernel_fpu, true);
95 if (__thread_has_fpu(me)) {
98 this_cpu_write(fpu_owner_task, NULL);
103 EXPORT_SYMBOL(__kernel_fpu_begin);
105 void __kernel_fpu_end(void)
107 struct task_struct *me = current;
109 if (__thread_has_fpu(me)) {
110 if (WARN_ON(restore_fpu_checking(me)))
112 } else if (!use_eager_fpu()) {
116 this_cpu_write(in_kernel_fpu, false);
118 EXPORT_SYMBOL(__kernel_fpu_end);
120 void unlazy_fpu(struct task_struct *tsk)
123 if (__thread_has_fpu(tsk)) {
124 if (use_eager_fpu()) {
127 __save_init_fpu(tsk);
128 __thread_fpu_end(tsk);
133 EXPORT_SYMBOL(unlazy_fpu);
135 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
136 unsigned int xstate_size;
137 EXPORT_SYMBOL_GPL(xstate_size);
138 static struct i387_fxsave_struct fx_scratch;
140 static void mxcsr_feature_mask_init(void)
142 unsigned long mask = 0;
145 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
146 asm volatile("fxsave %0" : "+m" (fx_scratch));
147 mask = fx_scratch.mxcsr_mask;
151 mxcsr_feature_mask &= mask;
154 static void init_thread_xstate(void)
157 * Note that xstate_size might be overwriten later during
163 * Disable xsave as we do not support it if i387
164 * emulation is enabled.
166 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
167 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
168 xstate_size = sizeof(struct i387_soft_struct);
173 xstate_size = sizeof(struct i387_fxsave_struct);
175 xstate_size = sizeof(struct i387_fsave_struct);
178 * Quirk: we don't yet handle the XSAVES* instructions
179 * correctly, as we don't correctly convert between
180 * standard and compacted format when interfacing
181 * with user-space - so disable it for now.
183 * The difference is small: with recent CPUs the
184 * compacted format is only marginally smaller than
185 * the standard FPU state format.
187 * ( This is easy to backport while we are fixing
190 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
194 * Called at bootup to set up the initial FPU state that is later cloned
195 * into all processes.
201 unsigned long cr4_mask = 0;
203 #ifndef CONFIG_MATH_EMULATION
205 pr_emerg("No FPU found and no math emulation present\n");
206 pr_emerg("Giving up\n");
212 cr4_mask |= X86_CR4_OSFXSR;
214 cr4_mask |= X86_CR4_OSXMMEXCPT;
216 cr4_set_bits(cr4_mask);
219 cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
225 * init_thread_xstate is only called once to avoid overriding
226 * xstate_size during boot time or during CPU hotplug.
228 if (xstate_size == 0)
229 init_thread_xstate();
231 mxcsr_feature_mask_init();
236 void fpu_finit(struct fpu *fpu)
239 finit_soft_fpu(&fpu->state->soft);
243 memset(fpu->state, 0, xstate_size);
246 fx_finit(&fpu->state->fxsave);
248 struct i387_fsave_struct *fp = &fpu->state->fsave;
249 fp->cwd = 0xffff037fu;
250 fp->swd = 0xffff0000u;
251 fp->twd = 0xffffffffu;
252 fp->fos = 0xffff0000u;
255 EXPORT_SYMBOL_GPL(fpu_finit);
258 * The _current_ task is using the FPU for the first time
259 * so initialize it and set the mxcsr to its default
260 * value at reset if we support XMM instructions and then
261 * remember the current task has used the FPU.
263 int init_fpu(struct task_struct *tsk)
267 if (tsk_used_math(tsk)) {
268 if (cpu_has_fpu && tsk == current)
270 task_disable_lazy_fpu_restore(tsk);
275 * Memory allocation at the first usage of the FPU and other state.
277 ret = fpu_alloc(&tsk->thread.fpu);
281 fpu_finit(&tsk->thread.fpu);
283 set_stopped_child_used_math(tsk);
286 EXPORT_SYMBOL_GPL(init_fpu);
289 * The xstateregs_active() routine is the same as the fpregs_active() routine,
290 * as the "regset->n" for the xstate regset will be updated based on the feature
291 * capabilites supported by the xsave.
293 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
295 return tsk_used_math(target) ? regset->n : 0;
298 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
300 return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
303 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
304 unsigned int pos, unsigned int count,
305 void *kbuf, void __user *ubuf)
312 ret = init_fpu(target);
316 sanitize_i387_state(target);
318 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
319 &target->thread.fpu.state->fxsave, 0, -1);
322 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
323 unsigned int pos, unsigned int count,
324 const void *kbuf, const void __user *ubuf)
331 ret = init_fpu(target);
335 sanitize_i387_state(target);
337 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
338 &target->thread.fpu.state->fxsave, 0, -1);
341 * mxcsr reserved bits must be masked to zero for security reasons.
343 target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
346 * update the header bits in the xsave header, indicating the
347 * presence of FP and SSE state.
350 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
355 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
356 unsigned int pos, unsigned int count,
357 void *kbuf, void __user *ubuf)
359 struct xsave_struct *xsave;
365 ret = init_fpu(target);
369 xsave = &target->thread.fpu.state->xsave;
372 * Copy the 48bytes defined by the software first into the xstate
373 * memory layout in the thread struct, so that we can copy the entire
374 * xstateregs to the user using one user_regset_copyout().
376 memcpy(&xsave->i387.sw_reserved,
377 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
379 * Copy the xstate memory layout.
381 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
385 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
386 unsigned int pos, unsigned int count,
387 const void *kbuf, const void __user *ubuf)
389 struct xsave_struct *xsave;
395 ret = init_fpu(target);
399 xsave = &target->thread.fpu.state->xsave;
401 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
403 * mxcsr reserved bits must be masked to zero for security reasons.
405 xsave->i387.mxcsr &= mxcsr_feature_mask;
406 xsave->xsave_hdr.xstate_bv &= pcntxt_mask;
408 * These bits must be zero.
410 memset(&xsave->xsave_hdr.reserved, 0, 48);
414 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
417 * FPU tag word conversions.
420 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
422 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
424 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
426 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
427 /* and move the valid bits to the lower byte. */
428 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
429 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
430 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
435 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
436 #define FP_EXP_TAG_VALID 0
437 #define FP_EXP_TAG_ZERO 1
438 #define FP_EXP_TAG_SPECIAL 2
439 #define FP_EXP_TAG_EMPTY 3
441 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
444 u32 tos = (fxsave->swd >> 11) & 7;
445 u32 twd = (unsigned long) fxsave->twd;
447 u32 ret = 0xffff0000u;
450 for (i = 0; i < 8; i++, twd >>= 1) {
452 st = FPREG_ADDR(fxsave, (i - tos) & 7);
454 switch (st->exponent & 0x7fff) {
456 tag = FP_EXP_TAG_SPECIAL;
459 if (!st->significand[0] &&
460 !st->significand[1] &&
461 !st->significand[2] &&
463 tag = FP_EXP_TAG_ZERO;
465 tag = FP_EXP_TAG_SPECIAL;
468 if (st->significand[3] & 0x8000)
469 tag = FP_EXP_TAG_VALID;
471 tag = FP_EXP_TAG_SPECIAL;
475 tag = FP_EXP_TAG_EMPTY;
477 ret |= tag << (2 * i);
483 * FXSR floating point environment conversions.
487 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
489 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
490 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
491 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
494 env->cwd = fxsave->cwd | 0xffff0000u;
495 env->swd = fxsave->swd | 0xffff0000u;
496 env->twd = twd_fxsr_to_i387(fxsave);
499 env->fip = fxsave->rip;
500 env->foo = fxsave->rdp;
502 * should be actually ds/cs at fpu exception time, but
503 * that information is not available in 64bit mode.
505 env->fcs = task_pt_regs(tsk)->cs;
506 if (tsk == current) {
507 savesegment(ds, env->fos);
509 env->fos = tsk->thread.ds;
511 env->fos |= 0xffff0000;
513 env->fip = fxsave->fip;
514 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
515 env->foo = fxsave->foo;
516 env->fos = fxsave->fos;
519 for (i = 0; i < 8; ++i)
520 memcpy(&to[i], &from[i], sizeof(to[0]));
523 void convert_to_fxsr(struct task_struct *tsk,
524 const struct user_i387_ia32_struct *env)
527 struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
528 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
529 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
532 fxsave->cwd = env->cwd;
533 fxsave->swd = env->swd;
534 fxsave->twd = twd_i387_to_fxsr(env->twd);
535 fxsave->fop = (u16) ((u32) env->fcs >> 16);
537 fxsave->rip = env->fip;
538 fxsave->rdp = env->foo;
539 /* cs and ds ignored */
541 fxsave->fip = env->fip;
542 fxsave->fcs = (env->fcs & 0xffff);
543 fxsave->foo = env->foo;
544 fxsave->fos = env->fos;
547 for (i = 0; i < 8; ++i)
548 memcpy(&to[i], &from[i], sizeof(from[0]));
551 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
552 unsigned int pos, unsigned int count,
553 void *kbuf, void __user *ubuf)
555 struct user_i387_ia32_struct env;
558 ret = init_fpu(target);
562 if (!static_cpu_has(X86_FEATURE_FPU))
563 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
566 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
567 &target->thread.fpu.state->fsave, 0,
570 sanitize_i387_state(target);
572 if (kbuf && pos == 0 && count == sizeof(env)) {
573 convert_from_fxsr(kbuf, target);
577 convert_from_fxsr(&env, target);
579 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
582 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
583 unsigned int pos, unsigned int count,
584 const void *kbuf, const void __user *ubuf)
586 struct user_i387_ia32_struct env;
589 ret = init_fpu(target);
593 sanitize_i387_state(target);
595 if (!static_cpu_has(X86_FEATURE_FPU))
596 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
599 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
600 &target->thread.fpu.state->fsave, 0,
603 if (pos > 0 || count < sizeof(env))
604 convert_from_fxsr(&env, target);
606 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
608 convert_to_fxsr(target, &env);
611 * update the header bit in the xsave header, indicating the
615 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
620 * FPU state for core dumps.
621 * This is only used for a.out dumps now.
622 * It is declared generically using elf_fpregset_t (which is
623 * struct user_i387_struct) but is in fact only used for 32-bit
624 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
626 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
628 struct task_struct *tsk = current;
631 fpvalid = !!used_math();
633 fpvalid = !fpregs_get(tsk, NULL,
634 0, sizeof(struct user_i387_ia32_struct),
639 EXPORT_SYMBOL(dump_fpu);
641 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
643 static int __init no_387(char *s)
645 setup_clear_cpu_cap(X86_FEATURE_FPU);
649 __setup("no387", no_387);
651 void fpu_detect(struct cpuinfo_x86 *c)
659 cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
662 asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
663 : "+m" (fsw), "+m" (fcw));
665 if (fsw == 0 && (fcw & 0x103f) == 0x003f)
666 set_cpu_cap(c, X86_FEATURE_FPU);
668 clear_cpu_cap(c, X86_FEATURE_FPU);
670 /* The final cr0 value is set in fpu_init() */